adv.c revision 1.29
1 /* $NetBSD: adv.c,v 1.29 2001/11/13 13:14:32 lukem Exp $ */ 2 3 /* 4 * Generic driver for the Advanced Systems Inc. Narrow SCSI controllers 5 * 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * Author: Baldassare Dante Profeta <dante (at) mclink.it> 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: adv.c,v 1.29 2001/11/13 13:14:32 lukem Exp $"); 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/callout.h> 47 #include <sys/kernel.h> 48 #include <sys/errno.h> 49 #include <sys/ioctl.h> 50 #include <sys/device.h> 51 #include <sys/malloc.h> 52 #include <sys/buf.h> 53 #include <sys/proc.h> 54 #include <sys/user.h> 55 56 #include <machine/bus.h> 57 #include <machine/intr.h> 58 59 #include <uvm/uvm_extern.h> 60 61 #include <dev/scsipi/scsi_all.h> 62 #include <dev/scsipi/scsipi_all.h> 63 #include <dev/scsipi/scsiconf.h> 64 65 #include <dev/ic/advlib.h> 66 #include <dev/ic/adv.h> 67 68 #ifndef DDB 69 #define Debugger() panic("should call debugger here (adv.c)") 70 #endif /* ! DDB */ 71 72 73 /* #define ASC_DEBUG */ 74 75 /******************************************************************************/ 76 77 78 static int adv_alloc_control_data __P((ASC_SOFTC *)); 79 static void adv_free_control_data __P((ASC_SOFTC *)); 80 static int adv_create_ccbs __P((ASC_SOFTC *, ADV_CCB *, int)); 81 static void adv_free_ccb __P((ASC_SOFTC *, ADV_CCB *)); 82 static void adv_reset_ccb __P((ADV_CCB *)); 83 static int adv_init_ccb __P((ASC_SOFTC *, ADV_CCB *)); 84 static ADV_CCB *adv_get_ccb __P((ASC_SOFTC *)); 85 static void adv_queue_ccb __P((ASC_SOFTC *, ADV_CCB *)); 86 static void adv_start_ccbs __P((ASC_SOFTC *)); 87 88 89 static void adv_scsipi_request __P((struct scsipi_channel *, 90 scsipi_adapter_req_t, void *)); 91 static void advminphys __P((struct buf *)); 92 static void adv_narrow_isr_callback __P((ASC_SOFTC *, ASC_QDONE_INFO *)); 93 94 static int adv_poll __P((ASC_SOFTC *, struct scsipi_xfer *, int)); 95 static void adv_timeout __P((void *)); 96 static void adv_watchdog __P((void *)); 97 98 99 /******************************************************************************/ 100 101 #define ADV_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */ 102 #define ADV_WATCH_TIMEOUT 1000 /* time to wait for watchdog (mSec) */ 103 104 /******************************************************************************/ 105 /* Control Blocks routines */ 106 /******************************************************************************/ 107 108 109 static int 110 adv_alloc_control_data(sc) 111 ASC_SOFTC *sc; 112 { 113 int error; 114 115 /* 116 * Allocate the control blocks. 117 */ 118 if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct adv_control), 119 PAGE_SIZE, 0, &sc->sc_control_seg, 1, 120 &sc->sc_control_nsegs, BUS_DMA_NOWAIT)) != 0) { 121 printf("%s: unable to allocate control structures," 122 " error = %d\n", sc->sc_dev.dv_xname, error); 123 return (error); 124 } 125 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_control_seg, 126 sc->sc_control_nsegs, sizeof(struct adv_control), 127 (caddr_t *) & sc->sc_control, 128 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 129 printf("%s: unable to map control structures, error = %d\n", 130 sc->sc_dev.dv_xname, error); 131 return (error); 132 } 133 /* 134 * Create and load the DMA map used for the control blocks. 135 */ 136 if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct adv_control), 137 1, sizeof(struct adv_control), 0, BUS_DMA_NOWAIT, 138 &sc->sc_dmamap_control)) != 0) { 139 printf("%s: unable to create control DMA map, error = %d\n", 140 sc->sc_dev.dv_xname, error); 141 return (error); 142 } 143 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control, 144 sc->sc_control, sizeof(struct adv_control), NULL, 145 BUS_DMA_NOWAIT)) != 0) { 146 printf("%s: unable to load control DMA map, error = %d\n", 147 sc->sc_dev.dv_xname, error); 148 return (error); 149 } 150 151 /* 152 * Initialize the overrun_buf address. 153 */ 154 sc->overrun_buf = sc->sc_dmamap_control->dm_segs[0].ds_addr + 155 offsetof(struct adv_control, overrun_buf); 156 157 return (0); 158 } 159 160 static void 161 adv_free_control_data(sc) 162 ASC_SOFTC *sc; 163 { 164 165 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmamap_control); 166 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap_control); 167 sc->sc_dmamap_control = NULL; 168 169 bus_dmamem_unmap(sc->sc_dmat, (caddr_t) sc->sc_control, 170 sizeof(struct adv_control)); 171 bus_dmamem_free(sc->sc_dmat, &sc->sc_control_seg, 172 sc->sc_control_nsegs); 173 } 174 175 /* 176 * Create a set of ccbs and add them to the free list. Called once 177 * by adv_init(). We return the number of CCBs successfully created. 178 */ 179 static int 180 adv_create_ccbs(sc, ccbstore, count) 181 ASC_SOFTC *sc; 182 ADV_CCB *ccbstore; 183 int count; 184 { 185 ADV_CCB *ccb; 186 int i, error; 187 188 memset(ccbstore, 0, sizeof(ADV_CCB) * count); 189 for (i = 0; i < count; i++) { 190 ccb = &ccbstore[i]; 191 if ((error = adv_init_ccb(sc, ccb)) != 0) { 192 printf("%s: unable to initialize ccb, error = %d\n", 193 sc->sc_dev.dv_xname, error); 194 return (i); 195 } 196 TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain); 197 } 198 199 return (i); 200 } 201 202 203 /* 204 * A ccb is put onto the free list. 205 */ 206 static void 207 adv_free_ccb(sc, ccb) 208 ASC_SOFTC *sc; 209 ADV_CCB *ccb; 210 { 211 int s; 212 213 s = splbio(); 214 adv_reset_ccb(ccb); 215 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain); 216 splx(s); 217 } 218 219 220 static void 221 adv_reset_ccb(ccb) 222 ADV_CCB *ccb; 223 { 224 225 ccb->flags = 0; 226 } 227 228 229 static int 230 adv_init_ccb(sc, ccb) 231 ASC_SOFTC *sc; 232 ADV_CCB *ccb; 233 { 234 int hashnum, error; 235 236 callout_init(&ccb->ccb_watchdog); 237 238 /* 239 * Create the DMA map for this CCB. 240 */ 241 error = bus_dmamap_create(sc->sc_dmat, 242 (ASC_MAX_SG_LIST - 1) * PAGE_SIZE, 243 ASC_MAX_SG_LIST, (ASC_MAX_SG_LIST - 1) * PAGE_SIZE, 244 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->dmamap_xfer); 245 if (error) { 246 printf("%s: unable to create DMA map, error = %d\n", 247 sc->sc_dev.dv_xname, error); 248 return (error); 249 } 250 251 /* 252 * put in the phystokv hash table 253 * Never gets taken out. 254 */ 255 ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr + 256 ADV_CCB_OFF(ccb); 257 hashnum = CCB_HASH(ccb->hashkey); 258 ccb->nexthash = sc->sc_ccbhash[hashnum]; 259 sc->sc_ccbhash[hashnum] = ccb; 260 261 adv_reset_ccb(ccb); 262 return (0); 263 } 264 265 266 /* 267 * Get a free ccb 268 * 269 * If there are none, see if we can allocate a new one 270 */ 271 static ADV_CCB * 272 adv_get_ccb(sc) 273 ASC_SOFTC *sc; 274 { 275 ADV_CCB *ccb = 0; 276 int s; 277 278 s = splbio(); 279 ccb = TAILQ_FIRST(&sc->sc_free_ccb); 280 if (ccb != NULL) { 281 TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain); 282 ccb->flags |= CCB_ALLOC; 283 } 284 splx(s); 285 return (ccb); 286 } 287 288 289 /* 290 * Given a physical address, find the ccb that it corresponds to. 291 */ 292 ADV_CCB * 293 adv_ccb_phys_kv(sc, ccb_phys) 294 ASC_SOFTC *sc; 295 u_long ccb_phys; 296 { 297 int hashnum = CCB_HASH(ccb_phys); 298 ADV_CCB *ccb = sc->sc_ccbhash[hashnum]; 299 300 while (ccb) { 301 if (ccb->hashkey == ccb_phys) 302 break; 303 ccb = ccb->nexthash; 304 } 305 return (ccb); 306 } 307 308 309 /* 310 * Queue a CCB to be sent to the controller, and send it if possible. 311 */ 312 static void 313 adv_queue_ccb(sc, ccb) 314 ASC_SOFTC *sc; 315 ADV_CCB *ccb; 316 { 317 318 TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain); 319 320 adv_start_ccbs(sc); 321 } 322 323 324 static void 325 adv_start_ccbs(sc) 326 ASC_SOFTC *sc; 327 { 328 ADV_CCB *ccb; 329 330 while ((ccb = sc->sc_waiting_ccb.tqh_first) != NULL) { 331 if (ccb->flags & CCB_WATCHDOG) 332 callout_stop(&ccb->ccb_watchdog); 333 334 if (AscExeScsiQueue(sc, &ccb->scsiq) == ASC_BUSY) { 335 ccb->flags |= CCB_WATCHDOG; 336 callout_reset(&ccb->ccb_watchdog, 337 (ADV_WATCH_TIMEOUT * hz) / 1000, 338 adv_watchdog, ccb); 339 break; 340 } 341 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain); 342 343 if ((ccb->xs->xs_control & XS_CTL_POLL) == 0) 344 callout_reset(&ccb->xs->xs_callout, 345 ((u_int64_t)ccb->timeout * (u_int64_t)hz) / 1000, 346 adv_timeout, ccb); 347 } 348 } 349 350 351 /******************************************************************************/ 352 /* SCSI layer interfacing routines */ 353 /******************************************************************************/ 354 355 356 int 357 adv_init(sc) 358 ASC_SOFTC *sc; 359 { 360 int warn; 361 362 if (!AscFindSignature(sc->sc_iot, sc->sc_ioh)) { 363 printf("adv_init: failed to find signature\n"); 364 return (1); 365 } 366 367 /* 368 * Read the board configuration 369 */ 370 AscInitASC_SOFTC(sc); 371 warn = AscInitFromEEP(sc); 372 if (warn) { 373 printf("%s -get: ", sc->sc_dev.dv_xname); 374 switch (warn) { 375 case -1: 376 printf("Chip is not halted\n"); 377 break; 378 379 case -2: 380 printf("Couldn't get MicroCode Start" 381 " address\n"); 382 break; 383 384 case ASC_WARN_IO_PORT_ROTATE: 385 printf("I/O port address modified\n"); 386 break; 387 388 case ASC_WARN_AUTO_CONFIG: 389 printf("I/O port increment switch enabled\n"); 390 break; 391 392 case ASC_WARN_EEPROM_CHKSUM: 393 printf("EEPROM checksum error\n"); 394 break; 395 396 case ASC_WARN_IRQ_MODIFIED: 397 printf("IRQ modified\n"); 398 break; 399 400 case ASC_WARN_CMD_QNG_CONFLICT: 401 printf("tag queuing enabled w/o disconnects\n"); 402 break; 403 404 default: 405 printf("unknown warning %d\n", warn); 406 } 407 } 408 if (sc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT) 409 sc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT; 410 411 /* 412 * Modify the board configuration 413 */ 414 warn = AscInitFromASC_SOFTC(sc); 415 if (warn) { 416 printf("%s -set: ", sc->sc_dev.dv_xname); 417 switch (warn) { 418 case ASC_WARN_CMD_QNG_CONFLICT: 419 printf("tag queuing enabled w/o disconnects\n"); 420 break; 421 422 case ASC_WARN_AUTO_CONFIG: 423 printf("I/O port increment switch enabled\n"); 424 break; 425 426 default: 427 printf("unknown warning %d\n", warn); 428 } 429 } 430 sc->isr_callback = (ASC_CALLBACK) adv_narrow_isr_callback; 431 432 return (0); 433 } 434 435 436 void 437 adv_attach(sc) 438 ASC_SOFTC *sc; 439 { 440 struct scsipi_adapter *adapt = &sc->sc_adapter; 441 struct scsipi_channel *chan = &sc->sc_channel; 442 int i, error; 443 444 /* 445 * Initialize board RISC chip and enable interrupts. 446 */ 447 switch (AscInitDriver(sc)) { 448 case 0: 449 /* AllOK */ 450 break; 451 452 case 1: 453 panic("%s: bad signature", sc->sc_dev.dv_xname); 454 break; 455 456 case 2: 457 panic("%s: unable to load MicroCode", 458 sc->sc_dev.dv_xname); 459 break; 460 461 case 3: 462 panic("%s: unable to initialize MicroCode", 463 sc->sc_dev.dv_xname); 464 break; 465 466 default: 467 panic("%s: unable to initialize board RISC chip", 468 sc->sc_dev.dv_xname); 469 } 470 471 /* 472 * Fill in the scsipi_adapter. 473 */ 474 memset(adapt, 0, sizeof(*adapt)); 475 adapt->adapt_dev = &sc->sc_dev; 476 adapt->adapt_nchannels = 1; 477 /* adapt_openings initialized below */ 478 /* adapt_max_periph initialized below */ 479 adapt->adapt_request = adv_scsipi_request; 480 adapt->adapt_minphys = advminphys; 481 482 /* 483 * Fill in the scsipi_channel. 484 */ 485 memset(chan, 0, sizeof(*chan)); 486 chan->chan_adapter = adapt; 487 chan->chan_bustype = &scsi_bustype; 488 chan->chan_channel = 0; 489 chan->chan_ntargets = 8; 490 chan->chan_nluns = 8; 491 chan->chan_id = sc->chip_scsi_id; 492 493 TAILQ_INIT(&sc->sc_free_ccb); 494 TAILQ_INIT(&sc->sc_waiting_ccb); 495 496 /* 497 * Allocate the Control Blocks and the overrun buffer. 498 */ 499 error = adv_alloc_control_data(sc); 500 if (error) 501 return; /* (error) */ 502 503 /* 504 * Create and initialize the Control Blocks. 505 */ 506 i = adv_create_ccbs(sc, sc->sc_control->ccbs, ADV_MAX_CCB); 507 if (i == 0) { 508 printf("%s: unable to create control blocks\n", 509 sc->sc_dev.dv_xname); 510 return; /* (ENOMEM) */ ; 511 } else if (i != ADV_MAX_CCB) { 512 printf("%s: WARNING: only %d of %d control blocks created\n", 513 sc->sc_dev.dv_xname, i, ADV_MAX_CCB); 514 } 515 516 adapt->adapt_openings = i; 517 adapt->adapt_max_periph = adapt->adapt_openings; 518 519 sc->sc_child = config_found(&sc->sc_dev, chan, scsiprint); 520 } 521 522 int 523 adv_detach(sc, flags) 524 ASC_SOFTC *sc; 525 int flags; 526 { 527 int rv = 0; 528 529 if (sc->sc_child != NULL) 530 rv = config_detach(sc->sc_child, flags); 531 532 adv_free_control_data(sc); 533 534 return (rv); 535 } 536 537 static void 538 advminphys(bp) 539 struct buf *bp; 540 { 541 542 if (bp->b_bcount > ((ASC_MAX_SG_LIST - 1) * PAGE_SIZE)) 543 bp->b_bcount = ((ASC_MAX_SG_LIST - 1) * PAGE_SIZE); 544 minphys(bp); 545 } 546 547 548 /* 549 * start a scsi operation given the command and the data address. Also needs 550 * the unit, target and lu. 551 */ 552 553 static void 554 adv_scsipi_request(chan, req, arg) 555 struct scsipi_channel *chan; 556 scsipi_adapter_req_t req; 557 void *arg; 558 { 559 struct scsipi_xfer *xs; 560 struct scsipi_periph *periph; 561 ASC_SOFTC *sc = (void *)chan->chan_adapter->adapt_dev; 562 bus_dma_tag_t dmat = sc->sc_dmat; 563 ADV_CCB *ccb; 564 int s, flags, error, nsegs; 565 566 switch (req) { 567 case ADAPTER_REQ_RUN_XFER: 568 xs = arg; 569 periph = xs->xs_periph; 570 flags = xs->xs_control; 571 572 /* 573 * Get a CCB to use. 574 */ 575 ccb = adv_get_ccb(sc); 576 #ifdef DIAGNOSTIC 577 /* 578 * This should never happen as we track the resources 579 * in the mid-layer. 580 */ 581 if (ccb == NULL) { 582 scsipi_printaddr(periph); 583 printf("unable to allocate ccb\n"); 584 panic("adv_scsipi_request"); 585 } 586 #endif 587 588 ccb->xs = xs; 589 ccb->timeout = xs->timeout; 590 591 /* 592 * Build up the request 593 */ 594 memset(&ccb->scsiq, 0, sizeof(ASC_SCSI_Q)); 595 596 ccb->scsiq.q2.ccb_ptr = 597 sc->sc_dmamap_control->dm_segs[0].ds_addr + 598 ADV_CCB_OFF(ccb); 599 600 ccb->scsiq.cdbptr = &xs->cmd->opcode; 601 ccb->scsiq.q2.cdb_len = xs->cmdlen; 602 ccb->scsiq.q1.target_id = 603 ASC_TID_TO_TARGET_ID(periph->periph_target); 604 ccb->scsiq.q1.target_lun = periph->periph_lun; 605 ccb->scsiq.q2.target_ix = 606 ASC_TIDLUN_TO_IX(periph->periph_target, 607 periph->periph_lun); 608 ccb->scsiq.q1.sense_addr = 609 sc->sc_dmamap_control->dm_segs[0].ds_addr + 610 ADV_CCB_OFF(ccb) + offsetof(struct adv_ccb, scsi_sense); 611 ccb->scsiq.q1.sense_len = sizeof(struct scsipi_sense_data); 612 613 /* 614 * If there are any outstanding requests for the current 615 * target, then every 255th request send an ORDERED request. 616 * This heuristic tries to retain the benefit of request 617 * sorting while preventing request starvation. 255 is the 618 * max number of tags or pending commands a device may have 619 * outstanding. 620 */ 621 sc->reqcnt[periph->periph_target]++; 622 if (((sc->reqcnt[periph->periph_target] > 0) && 623 (sc->reqcnt[periph->periph_target] % 255) == 0) || 624 xs->bp == NULL || (xs->bp->b_flags & B_ASYNC) == 0) { 625 ccb->scsiq.q2.tag_code = M2_QTAG_MSG_ORDERED; 626 } else { 627 ccb->scsiq.q2.tag_code = M2_QTAG_MSG_SIMPLE; 628 } 629 630 if (xs->datalen) { 631 /* 632 * Map the DMA transfer. 633 */ 634 #ifdef TFS 635 if (flags & SCSI_DATA_UIO) { 636 error = bus_dmamap_load_uio(dmat, 637 ccb->dmamap_xfer, (struct uio *) xs->data, 638 ((flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT : 639 BUS_DMA_WAITOK) | BUS_DMA_STREAMING | 640 ((flags & XS_CTL_DATA_IN) ? BUS_DMA_READ : 641 BUS_DMA_WRITE)); 642 } else 643 #endif /* TFS */ 644 { 645 error = bus_dmamap_load(dmat, ccb->dmamap_xfer, 646 xs->data, xs->datalen, NULL, 647 ((flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT : 648 BUS_DMA_WAITOK) | BUS_DMA_STREAMING | 649 ((flags & XS_CTL_DATA_IN) ? BUS_DMA_READ : 650 BUS_DMA_WRITE)); 651 } 652 653 switch (error) { 654 case 0: 655 break; 656 657 658 case ENOMEM: 659 case EAGAIN: 660 xs->error = XS_RESOURCE_SHORTAGE; 661 goto out_bad; 662 663 default: 664 xs->error = XS_DRIVER_STUFFUP; 665 if (error == EFBIG) { 666 printf("%s: adv_scsi_cmd, more than %d" 667 " dma segments\n", 668 sc->sc_dev.dv_xname, 669 ASC_MAX_SG_LIST); 670 } else { 671 printf("%s: adv_scsi_cmd, error %d" 672 " loading dma map\n", 673 sc->sc_dev.dv_xname, error); 674 } 675 676 out_bad: 677 adv_free_ccb(sc, ccb); 678 scsipi_done(xs); 679 return; 680 } 681 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0, 682 ccb->dmamap_xfer->dm_mapsize, 683 (flags & XS_CTL_DATA_IN) ? 684 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 685 686 memset(&ccb->sghead, 0, sizeof(ASC_SG_HEAD)); 687 688 for (nsegs = 0; 689 nsegs < ccb->dmamap_xfer->dm_nsegs; nsegs++) { 690 ccb->sghead.sg_list[nsegs].addr = 691 ccb->dmamap_xfer->dm_segs[nsegs].ds_addr; 692 ccb->sghead.sg_list[nsegs].bytes = 693 ccb->dmamap_xfer->dm_segs[nsegs].ds_len; 694 } 695 696 ccb->sghead.entry_cnt = ccb->scsiq.q1.sg_queue_cnt = 697 ccb->dmamap_xfer->dm_nsegs; 698 699 ccb->scsiq.q1.cntl |= ASC_QC_SG_HEAD; 700 ccb->scsiq.sg_head = &ccb->sghead; 701 ccb->scsiq.q1.data_addr = 0; 702 ccb->scsiq.q1.data_cnt = 0; 703 } else { 704 /* 705 * No data xfer, use non S/G values. 706 */ 707 ccb->scsiq.q1.data_addr = 0; 708 ccb->scsiq.q1.data_cnt = 0; 709 } 710 711 #ifdef ASC_DEBUG 712 printf("id = 0, lun = 0, cmd = 0, ccb = 0x0 \n", 713 periph->periph_target, 714 periph->periph_lun, xs->cmd->opcode, 715 (unsigned long)ccb); 716 #endif 717 s = splbio(); 718 adv_queue_ccb(sc, ccb); 719 splx(s); 720 721 if ((flags & XS_CTL_POLL) == 0) 722 return; 723 724 /* Not allowed to use interrupts, poll for completion. */ 725 if (adv_poll(sc, xs, ccb->timeout)) { 726 adv_timeout(ccb); 727 if (adv_poll(sc, xs, ccb->timeout)) 728 adv_timeout(ccb); 729 } 730 return; 731 732 case ADAPTER_REQ_GROW_RESOURCES: 733 /* XXX Not supported. */ 734 return; 735 736 case ADAPTER_REQ_SET_XFER_MODE: 737 { 738 /* 739 * We can't really set the mode, but we know how to 740 * query what the firmware negotiated. 741 */ 742 struct scsipi_xfer_mode *xm = arg; 743 u_int8_t sdtr_data; 744 ASC_SCSI_BIT_ID_TYPE tid_bit; 745 746 tid_bit = ASC_TIX_TO_TARGET_ID(xm->xm_target); 747 748 xm->xm_mode = 0; 749 xm->xm_period = 0; 750 xm->xm_offset = 0; 751 752 if (sc->init_sdtr & tid_bit) { 753 xm->xm_mode |= PERIPH_CAP_SYNC; 754 sdtr_data = sc->sdtr_data[xm->xm_target]; 755 xm->xm_period = 756 sc->sdtr_period_tbl[(sdtr_data >> 4) & 757 (sc->max_sdtr_index - 1)]; 758 xm->xm_offset = sdtr_data & ASC_SYN_MAX_OFFSET; 759 } 760 761 if (sc->use_tagged_qng & tid_bit) 762 xm->xm_mode |= PERIPH_CAP_TQING; 763 764 scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm); 765 return; 766 } 767 } 768 } 769 770 int 771 adv_intr(arg) 772 void *arg; 773 { 774 ASC_SOFTC *sc = arg; 775 776 #ifdef ASC_DEBUG 777 int int_pend = FALSE; 778 779 if(ASC_IS_INT_PENDING(sc->sc_iot, sc->sc_ioh)) 780 { 781 int_pend = TRUE; 782 printf("ISR - "); 783 } 784 #endif 785 AscISR(sc); 786 #ifdef ASC_DEBUG 787 if(int_pend) 788 printf("\n"); 789 #endif 790 791 return (1); 792 } 793 794 795 /* 796 * Poll a particular unit, looking for a particular xs 797 */ 798 static int 799 adv_poll(sc, xs, count) 800 ASC_SOFTC *sc; 801 struct scsipi_xfer *xs; 802 int count; 803 { 804 805 /* timeouts are in msec, so we loop in 1000 usec cycles */ 806 while (count) { 807 adv_intr(sc); 808 if (xs->xs_status & XS_STS_DONE) 809 return (0); 810 delay(1000); /* only happens in boot so ok */ 811 count--; 812 } 813 return (1); 814 } 815 816 817 static void 818 adv_timeout(arg) 819 void *arg; 820 { 821 ADV_CCB *ccb = arg; 822 struct scsipi_xfer *xs = ccb->xs; 823 struct scsipi_periph *periph = xs->xs_periph; 824 ASC_SOFTC *sc = 825 (void *)periph->periph_channel->chan_adapter->adapt_dev; 826 int s; 827 828 scsipi_printaddr(periph); 829 printf("timed out"); 830 831 s = splbio(); 832 833 /* 834 * If it has been through before, then a previous abort has failed, 835 * don't try abort again, reset the bus instead. 836 */ 837 if (ccb->flags & CCB_ABORT) { 838 /* abort timed out */ 839 printf(" AGAIN. Resetting Bus\n"); 840 /* Lets try resetting the bus! */ 841 if (AscResetBus(sc) == ASC_ERROR) { 842 ccb->timeout = sc->scsi_reset_wait; 843 adv_queue_ccb(sc, ccb); 844 } 845 } else { 846 /* abort the operation that has timed out */ 847 printf("\n"); 848 AscAbortCCB(sc, ccb); 849 ccb->xs->error = XS_TIMEOUT; 850 ccb->timeout = ADV_ABORT_TIMEOUT; 851 ccb->flags |= CCB_ABORT; 852 adv_queue_ccb(sc, ccb); 853 } 854 855 splx(s); 856 } 857 858 859 static void 860 adv_watchdog(arg) 861 void *arg; 862 { 863 ADV_CCB *ccb = arg; 864 struct scsipi_xfer *xs = ccb->xs; 865 struct scsipi_periph *periph = xs->xs_periph; 866 ASC_SOFTC *sc = 867 (void *)periph->periph_channel->chan_adapter->adapt_dev; 868 int s; 869 870 s = splbio(); 871 872 ccb->flags &= ~CCB_WATCHDOG; 873 adv_start_ccbs(sc); 874 875 splx(s); 876 } 877 878 879 /******************************************************************************/ 880 /* NARROW boards Interrupt callbacks */ 881 /******************************************************************************/ 882 883 884 /* 885 * adv_narrow_isr_callback() - Second Level Interrupt Handler called by AscISR() 886 * 887 * Interrupt callback function for the Narrow SCSI Asc Library. 888 */ 889 static void 890 adv_narrow_isr_callback(sc, qdonep) 891 ASC_SOFTC *sc; 892 ASC_QDONE_INFO *qdonep; 893 { 894 bus_dma_tag_t dmat = sc->sc_dmat; 895 ADV_CCB *ccb; 896 struct scsipi_xfer *xs; 897 struct scsipi_sense_data *s1, *s2; 898 899 900 ccb = adv_ccb_phys_kv(sc, qdonep->d2.ccb_ptr); 901 xs = ccb->xs; 902 903 #ifdef ASC_DEBUG 904 printf(" - ccb=0x%lx, id=%d, lun=%d, cmd=%d, ", 905 (unsigned long)ccb, 906 xs->xs_periph->periph_target, 907 xs->xs_periph->periph_lun, xs->cmd->opcode); 908 #endif 909 callout_stop(&ccb->xs->xs_callout); 910 911 /* 912 * If we were a data transfer, unload the map that described 913 * the data buffer. 914 */ 915 if (xs->datalen) { 916 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0, 917 ccb->dmamap_xfer->dm_mapsize, 918 (xs->xs_control & XS_CTL_DATA_IN) ? 919 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 920 bus_dmamap_unload(dmat, ccb->dmamap_xfer); 921 } 922 if ((ccb->flags & CCB_ALLOC) == 0) { 923 printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname); 924 Debugger(); 925 return; 926 } 927 /* 928 * 'qdonep' contains the command's ending status. 929 */ 930 #ifdef ASC_DEBUG 931 printf("d_s=%d, h_s=%d", qdonep->d3.done_stat, qdonep->d3.host_stat); 932 #endif 933 switch (qdonep->d3.done_stat) { 934 case ASC_QD_NO_ERROR: 935 switch (qdonep->d3.host_stat) { 936 case ASC_QHSTA_NO_ERROR: 937 xs->error = XS_NOERROR; 938 xs->resid = 0; 939 break; 940 941 default: 942 /* QHSTA error occurred */ 943 xs->error = XS_DRIVER_STUFFUP; 944 break; 945 } 946 947 /* 948 * If an INQUIRY command completed successfully, then call 949 * the AscInquiryHandling() function to patch bugged boards. 950 */ 951 if ((xs->cmd->opcode == SCSICMD_Inquiry) && 952 (xs->xs_periph->periph_lun == 0) && 953 (xs->datalen - qdonep->remain_bytes) >= 8) { 954 AscInquiryHandling(sc, 955 xs->xs_periph->periph_target & 0x7, 956 (ASC_SCSI_INQUIRY *) xs->data); 957 } 958 break; 959 960 case ASC_QD_WITH_ERROR: 961 switch (qdonep->d3.host_stat) { 962 case ASC_QHSTA_NO_ERROR: 963 if (qdonep->d3.scsi_stat == SS_CHK_CONDITION) { 964 s1 = &ccb->scsi_sense; 965 s2 = &xs->sense.scsi_sense; 966 *s2 = *s1; 967 xs->error = XS_SENSE; 968 } else { 969 xs->error = XS_DRIVER_STUFFUP; 970 } 971 break; 972 973 case ASC_QHSTA_M_SEL_TIMEOUT: 974 xs->error = XS_SELTIMEOUT; 975 break; 976 977 default: 978 /* QHSTA error occurred */ 979 xs->error = XS_DRIVER_STUFFUP; 980 break; 981 } 982 break; 983 984 case ASC_QD_ABORTED_BY_HOST: 985 default: 986 xs->error = XS_DRIVER_STUFFUP; 987 break; 988 } 989 990 991 adv_free_ccb(sc, ccb); 992 scsipi_done(xs); 993 } 994
Indexes created Thu Oct 23 22:10:10 GMT 2025