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adw.c revision 1.37
      1 /* $NetBSD: adw.c,v 1.37 2001/11/15 09:48:04 lukem Exp $	 */
      2 
      3 /*
      4  * Generic driver for the Advanced Systems Inc. SCSI controllers
      5  *
      6  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
      7  * All rights reserved.
      8  *
      9  * Author: Baldassare Dante Profeta <dante (at) mclink.it>
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *        This product includes software developed by the NetBSD
     22  *        Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 #include <sys/cdefs.h>
     41 __KERNEL_RCSID(0, "$NetBSD: adw.c,v 1.37 2001/11/15 09:48:04 lukem Exp $");
     42 
     43 #include <sys/param.h>
     44 #include <sys/systm.h>
     45 #include <sys/callout.h>
     46 #include <sys/kernel.h>
     47 #include <sys/errno.h>
     48 #include <sys/ioctl.h>
     49 #include <sys/device.h>
     50 #include <sys/malloc.h>
     51 #include <sys/buf.h>
     52 #include <sys/proc.h>
     53 #include <sys/user.h>
     54 
     55 #include <machine/bus.h>
     56 #include <machine/intr.h>
     57 
     58 #include <uvm/uvm_extern.h>
     59 
     60 #include <dev/scsipi/scsi_all.h>
     61 #include <dev/scsipi/scsipi_all.h>
     62 #include <dev/scsipi/scsiconf.h>
     63 
     64 #include <dev/ic/adwlib.h>
     65 #include <dev/ic/adwmcode.h>
     66 #include <dev/ic/adw.h>
     67 
     68 #ifndef DDB
     69 #define	Debugger()	panic("should call debugger here (adw.c)")
     70 #endif				/* ! DDB */
     71 
     72 /******************************************************************************/
     73 
     74 
     75 static int adw_alloc_controls(ADW_SOFTC *);
     76 static int adw_alloc_carriers(ADW_SOFTC *);
     77 static int adw_create_ccbs(ADW_SOFTC *, ADW_CCB *, int);
     78 static void adw_free_ccb(ADW_SOFTC *, ADW_CCB *);
     79 static void adw_reset_ccb(ADW_CCB *);
     80 static int adw_init_ccb(ADW_SOFTC *, ADW_CCB *);
     81 static ADW_CCB *adw_get_ccb(ADW_SOFTC *);
     82 static int adw_queue_ccb(ADW_SOFTC *, ADW_CCB *);
     83 
     84 static void adw_scsipi_request(struct scsipi_channel *,
     85 	scsipi_adapter_req_t, void *);
     86 static int adw_build_req(ADW_SOFTC *, ADW_CCB *);
     87 static void adw_build_sglist(ADW_CCB *, ADW_SCSI_REQ_Q *, ADW_SG_BLOCK *);
     88 static void adwminphys(struct buf *);
     89 static void adw_isr_callback(ADW_SOFTC *, ADW_SCSI_REQ_Q *);
     90 static void adw_async_callback(ADW_SOFTC *, u_int8_t);
     91 
     92 static void adw_print_info(ADW_SOFTC *, int);
     93 
     94 static int adw_poll(ADW_SOFTC *, struct scsipi_xfer *, int);
     95 static void adw_timeout(void *);
     96 static void adw_reset_bus(ADW_SOFTC *);
     97 
     98 
     99 /******************************************************************************/
    100 /*                       DMA Mapping for Control Blocks                       */
    101 /******************************************************************************/
    102 
    103 
    104 static int
    105 adw_alloc_controls(ADW_SOFTC *sc)
    106 {
    107 	bus_dma_segment_t seg;
    108 	int             error, rseg;
    109 
    110 	/*
    111          * Allocate the control structure.
    112          */
    113 	if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct adw_control),
    114 			   PAGE_SIZE, 0, &seg, 1, &rseg,
    115 			   BUS_DMA_NOWAIT)) != 0) {
    116 		printf("%s: unable to allocate control structures,"
    117 		       " error = %d\n", sc->sc_dev.dv_xname, error);
    118 		return (error);
    119 	}
    120 	if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
    121 		   sizeof(struct adw_control), (caddr_t *) & sc->sc_control,
    122 				 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
    123 		printf("%s: unable to map control structures, error = %d\n",
    124 		       sc->sc_dev.dv_xname, error);
    125 		return (error);
    126 	}
    127 
    128 	/*
    129          * Create and load the DMA map used for the control blocks.
    130          */
    131 	if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct adw_control),
    132 			   1, sizeof(struct adw_control), 0, BUS_DMA_NOWAIT,
    133 				       &sc->sc_dmamap_control)) != 0) {
    134 		printf("%s: unable to create control DMA map, error = %d\n",
    135 		       sc->sc_dev.dv_xname, error);
    136 		return (error);
    137 	}
    138 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control,
    139 			   sc->sc_control, sizeof(struct adw_control), NULL,
    140 				     BUS_DMA_NOWAIT)) != 0) {
    141 		printf("%s: unable to load control DMA map, error = %d\n",
    142 		       sc->sc_dev.dv_xname, error);
    143 		return (error);
    144 	}
    145 
    146 	return (0);
    147 }
    148 
    149 
    150 static int
    151 adw_alloc_carriers(ADW_SOFTC *sc)
    152 {
    153 	bus_dma_segment_t seg;
    154 	int             error, rseg;
    155 
    156 	/*
    157          * Allocate the control structure.
    158          */
    159 	sc->sc_control->carriers = malloc(sizeof(ADW_CARRIER) * ADW_MAX_CARRIER,
    160 			M_DEVBUF, M_WAITOK);
    161 	if(!sc->sc_control->carriers) {
    162 		printf("%s: malloc() failed in allocating carrier structures\n",
    163 		       sc->sc_dev.dv_xname);
    164 		return (ENOMEM);
    165 	}
    166 
    167 	if ((error = bus_dmamem_alloc(sc->sc_dmat,
    168 			sizeof(ADW_CARRIER) * ADW_MAX_CARRIER,
    169 			0x10, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
    170 		printf("%s: unable to allocate carrier structures,"
    171 		       " error = %d\n", sc->sc_dev.dv_xname, error);
    172 		return (error);
    173 	}
    174 	if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
    175 			sizeof(ADW_CARRIER) * ADW_MAX_CARRIER,
    176 			(caddr_t *) &sc->sc_control->carriers,
    177 			BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
    178 		printf("%s: unable to map carrier structures,"
    179 			" error = %d\n", sc->sc_dev.dv_xname, error);
    180 		return (error);
    181 	}
    182 
    183 	/*
    184          * Create and load the DMA map used for the control blocks.
    185          */
    186 	if ((error = bus_dmamap_create(sc->sc_dmat,
    187 			sizeof(ADW_CARRIER) * ADW_MAX_CARRIER, 1,
    188 			sizeof(ADW_CARRIER) * ADW_MAX_CARRIER, 0,BUS_DMA_NOWAIT,
    189 			&sc->sc_dmamap_carrier)) != 0) {
    190 		printf("%s: unable to create carriers DMA map,"
    191 			" error = %d\n", sc->sc_dev.dv_xname, error);
    192 		return (error);
    193 	}
    194 	if ((error = bus_dmamap_load(sc->sc_dmat,
    195 			sc->sc_dmamap_carrier, sc->sc_control->carriers,
    196 			sizeof(ADW_CARRIER) * ADW_MAX_CARRIER, NULL,
    197 			BUS_DMA_NOWAIT)) != 0) {
    198 		printf("%s: unable to load carriers DMA map,"
    199 			" error = %d\n", sc->sc_dev.dv_xname, error);
    200 		return (error);
    201 	}
    202 
    203 	return (0);
    204 }
    205 
    206 
    207 /******************************************************************************/
    208 /*                           Control Blocks routines                          */
    209 /******************************************************************************/
    210 
    211 
    212 /*
    213  * Create a set of ccbs and add them to the free list.  Called once
    214  * by adw_init().  We return the number of CCBs successfully created.
    215  */
    216 static int
    217 adw_create_ccbs(ADW_SOFTC *sc, ADW_CCB *ccbstore, int count)
    218 {
    219 	ADW_CCB        *ccb;
    220 	int             i, error;
    221 
    222 	for (i = 0; i < count; i++) {
    223 		ccb = &ccbstore[i];
    224 		if ((error = adw_init_ccb(sc, ccb)) != 0) {
    225 			printf("%s: unable to initialize ccb, error = %d\n",
    226 			       sc->sc_dev.dv_xname, error);
    227 			return (i);
    228 		}
    229 		TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain);
    230 	}
    231 
    232 	return (i);
    233 }
    234 
    235 
    236 /*
    237  * A ccb is put onto the free list.
    238  */
    239 static void
    240 adw_free_ccb(ADW_SOFTC *sc, ADW_CCB *ccb)
    241 {
    242 	int             s;
    243 
    244 	s = splbio();
    245 
    246 	adw_reset_ccb(ccb);
    247 	TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
    248 
    249 	splx(s);
    250 }
    251 
    252 
    253 static void
    254 adw_reset_ccb(ADW_CCB *ccb)
    255 {
    256 
    257 	ccb->flags = 0;
    258 }
    259 
    260 
    261 static int
    262 adw_init_ccb(ADW_SOFTC *sc, ADW_CCB *ccb)
    263 {
    264 	int	hashnum, error;
    265 
    266 	/*
    267          * Create the DMA map for this CCB.
    268          */
    269 	error = bus_dmamap_create(sc->sc_dmat,
    270 				  (ADW_MAX_SG_LIST - 1) * PAGE_SIZE,
    271 			 ADW_MAX_SG_LIST, (ADW_MAX_SG_LIST - 1) * PAGE_SIZE,
    272 		   0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->dmamap_xfer);
    273 	if (error) {
    274 		printf("%s: unable to create CCB DMA map, error = %d\n",
    275 		       sc->sc_dev.dv_xname, error);
    276 		return (error);
    277 	}
    278 
    279 	/*
    280 	 * put in the phystokv hash table
    281 	 * Never gets taken out.
    282 	 */
    283 	ccb->hashkey = htole32(sc->sc_dmamap_control->dm_segs[0].ds_addr +
    284 	    ADW_CCB_OFF(ccb));
    285 	hashnum = CCB_HASH(ccb->hashkey);
    286 	ccb->nexthash = sc->sc_ccbhash[hashnum];
    287 	sc->sc_ccbhash[hashnum] = ccb;
    288 	adw_reset_ccb(ccb);
    289 	return (0);
    290 }
    291 
    292 
    293 /*
    294  * Get a free ccb
    295  *
    296  * If there are none, see if we can allocate a new one
    297  */
    298 static ADW_CCB *
    299 adw_get_ccb(ADW_SOFTC *sc)
    300 {
    301 	ADW_CCB        *ccb = 0;
    302 	int             s;
    303 
    304 	s = splbio();
    305 
    306 	ccb = sc->sc_free_ccb.tqh_first;
    307 	if (ccb != NULL) {
    308 		TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
    309 		ccb->flags |= CCB_ALLOC;
    310 	}
    311 	splx(s);
    312 	return (ccb);
    313 }
    314 
    315 
    316 /*
    317  * Given a physical address, find the ccb that it corresponds to.
    318  */
    319 ADW_CCB *
    320 adw_ccb_phys_kv(ADW_SOFTC *sc, u_int32_t ccb_phys)
    321 {
    322 	int hashnum = CCB_HASH(ccb_phys);
    323 	ADW_CCB *ccb = sc->sc_ccbhash[hashnum];
    324 
    325 	while (ccb) {
    326 		if (ccb->hashkey == ccb_phys)
    327 			break;
    328 		ccb = ccb->nexthash;
    329 	}
    330 	return (ccb);
    331 }
    332 
    333 
    334 /*
    335  * Queue a CCB to be sent to the controller, and send it if possible.
    336  */
    337 static int
    338 adw_queue_ccb(ADW_SOFTC *sc, ADW_CCB *ccb)
    339 {
    340 	int		errcode = ADW_SUCCESS;
    341 
    342 	TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
    343 
    344 	while ((ccb = sc->sc_waiting_ccb.tqh_first) != NULL) {
    345 
    346 		TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
    347 		errcode = AdwExeScsiQueue(sc, &ccb->scsiq);
    348 		switch(errcode) {
    349 		case ADW_SUCCESS:
    350 			break;
    351 
    352 		case ADW_BUSY:
    353 			printf("ADW_BUSY\n");
    354 			return(ADW_BUSY);
    355 
    356 		case ADW_ERROR:
    357 			printf("ADW_ERROR\n");
    358 			return(ADW_ERROR);
    359 		}
    360 
    361 		TAILQ_INSERT_TAIL(&sc->sc_pending_ccb, ccb, chain);
    362 
    363 		if ((ccb->xs->xs_control & XS_CTL_POLL) == 0)
    364 			callout_reset(&ccb->xs->xs_callout,
    365 			    (ccb->timeout * hz) / 1000, adw_timeout, ccb);
    366 	}
    367 
    368 	return(errcode);
    369 }
    370 
    371 
    372 /******************************************************************************/
    373 /*                       SCSI layer interfacing routines                      */
    374 /******************************************************************************/
    375 
    376 
    377 int
    378 adw_init(ADW_SOFTC *sc)
    379 {
    380 	u_int16_t       warn_code;
    381 
    382 
    383 	sc->cfg.lib_version = (ADW_LIB_VERSION_MAJOR << 8) |
    384 		ADW_LIB_VERSION_MINOR;
    385 	sc->cfg.chip_version =
    386 		ADW_GET_CHIP_VERSION(sc->sc_iot, sc->sc_ioh, sc->bus_type);
    387 
    388 	/*
    389 	 * Reset the chip to start and allow register writes.
    390 	 */
    391 	if (ADW_FIND_SIGNATURE(sc->sc_iot, sc->sc_ioh) == 0) {
    392 		panic("adw_init: adw_find_signature failed");
    393 	} else {
    394 		AdwResetChip(sc->sc_iot, sc->sc_ioh);
    395 
    396 		warn_code = AdwInitFromEEPROM(sc);
    397 
    398 		if (warn_code & ADW_WARN_EEPROM_CHKSUM)
    399 			printf("%s: Bad checksum found. "
    400 			       "Setting default values\n",
    401 			       sc->sc_dev.dv_xname);
    402 		if (warn_code & ADW_WARN_EEPROM_TERMINATION)
    403 			printf("%s: Bad bus termination setting."
    404 			       "Using automatic termination.\n",
    405 			       sc->sc_dev.dv_xname);
    406 	}
    407 
    408 	sc->isr_callback = (ADW_CALLBACK) adw_isr_callback;
    409 	sc->async_callback = (ADW_CALLBACK) adw_async_callback;
    410 
    411 	return 0;
    412 }
    413 
    414 
    415 void
    416 adw_attach(ADW_SOFTC *sc)
    417 {
    418 	struct scsipi_adapter *adapt = &sc->sc_adapter;
    419 	struct scsipi_channel *chan = &sc->sc_channel;
    420 	int             ncontrols, error;
    421 
    422 	TAILQ_INIT(&sc->sc_free_ccb);
    423 	TAILQ_INIT(&sc->sc_waiting_ccb);
    424 	TAILQ_INIT(&sc->sc_pending_ccb);
    425 
    426 	/*
    427          * Allocate the Control Blocks.
    428          */
    429 	error = adw_alloc_controls(sc);
    430 	if (error)
    431 		return; /* (error) */ ;
    432 
    433 	memset(sc->sc_control, 0, sizeof(struct adw_control));
    434 
    435 	/*
    436 	 * Create and initialize the Control Blocks.
    437 	 */
    438 	ncontrols = adw_create_ccbs(sc, sc->sc_control->ccbs, ADW_MAX_CCB);
    439 	if (ncontrols == 0) {
    440 		printf("%s: unable to create Control Blocks\n",
    441 		       sc->sc_dev.dv_xname);
    442 		return; /* (ENOMEM) */ ;
    443 	} else if (ncontrols != ADW_MAX_CCB) {
    444 		printf("%s: WARNING: only %d of %d Control Blocks"
    445 		       " created\n",
    446 		       sc->sc_dev.dv_xname, ncontrols, ADW_MAX_CCB);
    447 	}
    448 
    449 	/*
    450 	 * Create and initialize the Carriers.
    451 	 */
    452 	error = adw_alloc_carriers(sc);
    453 	if (error)
    454 		return; /* (error) */ ;
    455 
    456 	/*
    457 	 * Zero's the freeze_device status
    458 	 */
    459 	 memset(sc->sc_freeze_dev, 0, sizeof(sc->sc_freeze_dev));
    460 
    461 	/*
    462 	 * Initialize the adapter
    463 	 */
    464 	switch (AdwInitDriver(sc)) {
    465 	case ADW_IERR_BIST_PRE_TEST:
    466 		panic("%s: BIST pre-test error",
    467 		      sc->sc_dev.dv_xname);
    468 		break;
    469 
    470 	case ADW_IERR_BIST_RAM_TEST:
    471 		panic("%s: BIST RAM test error",
    472 		      sc->sc_dev.dv_xname);
    473 		break;
    474 
    475 	case ADW_IERR_MCODE_CHKSUM:
    476 		panic("%s: Microcode checksum error",
    477 		      sc->sc_dev.dv_xname);
    478 		break;
    479 
    480 	case ADW_IERR_ILLEGAL_CONNECTION:
    481 		panic("%s: All three connectors are in use",
    482 		      sc->sc_dev.dv_xname);
    483 		break;
    484 
    485 	case ADW_IERR_REVERSED_CABLE:
    486 		panic("%s: Cable is reversed",
    487 		      sc->sc_dev.dv_xname);
    488 		break;
    489 
    490 	case ADW_IERR_HVD_DEVICE:
    491 		panic("%s: HVD attached to LVD connector",
    492 		      sc->sc_dev.dv_xname);
    493 		break;
    494 
    495 	case ADW_IERR_SINGLE_END_DEVICE:
    496 		panic("%s: single-ended device is attached to"
    497 		      " one of the connectors",
    498 		      sc->sc_dev.dv_xname);
    499 		break;
    500 
    501 	case ADW_IERR_NO_CARRIER:
    502 		panic("%s: unable to create Carriers",
    503 		      sc->sc_dev.dv_xname);
    504 		break;
    505 
    506 	case ADW_WARN_BUSRESET_ERROR:
    507 		printf("%s: WARNING: Bus Reset Error\n",
    508 		      sc->sc_dev.dv_xname);
    509 		break;
    510 	}
    511 
    512 	/*
    513 	 * Fill in the scsipi_adapter.
    514 	 */
    515 	memset(adapt, 0, sizeof(*adapt));
    516 	adapt->adapt_dev = &sc->sc_dev;
    517 	adapt->adapt_nchannels = 1;
    518 	adapt->adapt_openings = ncontrols;
    519 	adapt->adapt_max_periph = adapt->adapt_openings;
    520 	adapt->adapt_request = adw_scsipi_request;
    521 	adapt->adapt_minphys = adwminphys;
    522 
    523 	/*
    524 	 * Fill in the scsipi_channel.
    525 	 */
    526 	memset(chan, 0, sizeof(*chan));
    527 	chan->chan_adapter = adapt;
    528 	chan->chan_bustype = &scsi_bustype;
    529 	chan->chan_channel = 0;
    530 	chan->chan_ntargets = ADW_MAX_TID + 1;
    531 	chan->chan_nluns = 7;
    532 	chan->chan_id = sc->chip_scsi_id;
    533 
    534 	config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
    535 }
    536 
    537 
    538 static void
    539 adwminphys(struct buf *bp)
    540 {
    541 
    542 	if (bp->b_bcount > ((ADW_MAX_SG_LIST - 1) * PAGE_SIZE))
    543 		bp->b_bcount = ((ADW_MAX_SG_LIST - 1) * PAGE_SIZE);
    544 	minphys(bp);
    545 }
    546 
    547 
    548 /*
    549  * start a scsi operation given the command and the data address.
    550  * Also needs the unit, target and lu.
    551  */
    552 static void
    553 adw_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
    554 	void *arg)
    555 {
    556 	struct scsipi_xfer *xs;
    557 	ADW_SOFTC      *sc = (void *)chan->chan_adapter->adapt_dev;
    558 	ADW_CCB        *ccb;
    559 	int            s, retry;
    560 
    561 	switch (req) {
    562 	case ADAPTER_REQ_RUN_XFER:
    563 		xs = arg;
    564 
    565 		/*
    566 		 * get a ccb to use. If the transfer
    567 		 * is from a buf (possibly from interrupt time)
    568 		 * then we can't allow it to sleep
    569 		 */
    570 
    571 		ccb = adw_get_ccb(sc);
    572 #ifdef DIAGNOSTIC
    573 		/*
    574                  * This should never happen as we track the resources
    575 		 * in the mid-layer.
    576                  */
    577 		if (ccb == NULL) {
    578 			scsipi_printaddr(xs->xs_periph);
    579 			printf("unable to allocate ccb\n");
    580 			panic("adw_scsipi_request");
    581 		}
    582 #endif
    583 
    584 		ccb->xs = xs;
    585 		ccb->timeout = xs->timeout;
    586 
    587 		if (adw_build_req(sc, ccb)) {
    588 			s = splbio();
    589 			retry = adw_queue_ccb(sc, ccb);
    590 			splx(s);
    591 
    592 			switch(retry) {
    593 			case ADW_BUSY:
    594 				xs->error = XS_RESOURCE_SHORTAGE;
    595 				adw_free_ccb(sc, ccb);
    596 				scsipi_done(xs);
    597 				return;
    598 
    599 			case ADW_ERROR:
    600 				xs->error = XS_DRIVER_STUFFUP;
    601 				adw_free_ccb(sc, ccb);
    602 				scsipi_done(xs);
    603 				return;
    604 			}
    605 			if ((xs->xs_control & XS_CTL_POLL) == 0)
    606 				return;
    607 			/*
    608 			 * Not allowed to use interrupts, poll for completion.
    609 			 */
    610 			if (adw_poll(sc, xs, ccb->timeout)) {
    611 				adw_timeout(ccb);
    612 				if (adw_poll(sc, xs, ccb->timeout))
    613 					adw_timeout(ccb);
    614 			}
    615 		}
    616 		return;
    617 
    618 	case ADAPTER_REQ_GROW_RESOURCES:
    619 		/* XXX Not supported. */
    620 		return;
    621 
    622 	case ADAPTER_REQ_SET_XFER_MODE:
    623 		/* XXX XXX XXX */
    624 		return;
    625 	}
    626 }
    627 
    628 
    629 /*
    630  * Build a request structure for the Wide Boards.
    631  */
    632 static int
    633 adw_build_req(ADW_SOFTC *sc, ADW_CCB *ccb)
    634 {
    635 	struct scsipi_xfer *xs = ccb->xs;
    636 	struct scsipi_periph *periph = xs->xs_periph;
    637 	bus_dma_tag_t   dmat = sc->sc_dmat;
    638 	ADW_SCSI_REQ_Q *scsiqp;
    639 	int             error;
    640 
    641 	scsiqp = &ccb->scsiq;
    642 	memset(scsiqp, 0, sizeof(ADW_SCSI_REQ_Q));
    643 
    644 	/*
    645 	 * Set the ADW_SCSI_REQ_Q 'ccb_ptr' to point to the
    646 	 * physical CCB structure.
    647 	 */
    648 	scsiqp->ccb_ptr = ccb->hashkey;
    649 
    650 	/*
    651 	 * Build the ADW_SCSI_REQ_Q request.
    652 	 */
    653 
    654 	/*
    655 	 * Set CDB length and copy it to the request structure.
    656 	 * For wide  boards a CDB length maximum of 16 bytes
    657 	 * is supported.
    658 	 */
    659 	memcpy(&scsiqp->cdb, xs->cmd, ((scsiqp->cdb_len = xs->cmdlen) <= 12)?
    660 			xs->cmdlen : 12 );
    661 	if(xs->cmdlen > 12)
    662 		memcpy(&scsiqp->cdb16, &(xs->cmd[12]), xs->cmdlen - 12);
    663 
    664 	scsiqp->target_id = periph->periph_target;
    665 	scsiqp->target_lun = periph->periph_lun;
    666 
    667 	scsiqp->vsense_addr = &ccb->scsi_sense;
    668 	scsiqp->sense_addr = htole32(sc->sc_dmamap_control->dm_segs[0].ds_addr +
    669 			ADW_CCB_OFF(ccb) + offsetof(struct adw_ccb, scsi_sense));
    670 	scsiqp->sense_len = sizeof(struct scsipi_sense_data);
    671 
    672 	/*
    673 	 * Build ADW_SCSI_REQ_Q for a scatter-gather buffer command.
    674 	 */
    675 	if (xs->datalen) {
    676 		/*
    677                  * Map the DMA transfer.
    678                  */
    679 #ifdef TFS
    680 		if (xs->xs_control & SCSI_DATA_UIO) {
    681 			error = bus_dmamap_load_uio(dmat,
    682 				ccb->dmamap_xfer, (struct uio *) xs->data,
    683 			        ((flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
    684 			         BUS_DMA_WAITOK) | BUS_DMA_STREAMING |
    685 				 ((flags & XS_CTL_DATA_IN) ? BUS_DMA_READ :
    686 				  BUS_DMA_WRITE));
    687 		} else
    688 #endif		/* TFS */
    689 		{
    690 			error = bus_dmamap_load(dmat,
    691 			      ccb->dmamap_xfer, xs->data, xs->datalen, NULL,
    692 			      ((xs->xs_control & XS_CTL_NOSLEEP) ?
    693 			       BUS_DMA_NOWAIT : BUS_DMA_WAITOK) |
    694 			       BUS_DMA_STREAMING |
    695 			       ((xs->xs_control & XS_CTL_DATA_IN) ?
    696 			        BUS_DMA_READ : BUS_DMA_WRITE));
    697 		}
    698 
    699 		switch (error) {
    700 		case 0:
    701 			break;
    702 		case ENOMEM:
    703 		case EAGAIN:
    704 			xs->error = XS_RESOURCE_SHORTAGE;
    705 			goto out_bad;
    706 
    707 		default:
    708 			xs->error = XS_DRIVER_STUFFUP;
    709 			printf("%s: error %d loading DMA map\n",
    710 			    sc->sc_dev.dv_xname, error);
    711 out_bad:
    712 			adw_free_ccb(sc, ccb);
    713 			scsipi_done(xs);
    714 			return(0);
    715 		}
    716 
    717 		bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
    718 		    ccb->dmamap_xfer->dm_mapsize,
    719 		    (xs->xs_control & XS_CTL_DATA_IN) ?
    720 		    BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
    721 
    722 		/*
    723 		 * Build scatter-gather list.
    724 		 */
    725 		scsiqp->data_cnt = htole32(xs->datalen);
    726 		scsiqp->vdata_addr = xs->data;
    727 		scsiqp->data_addr = htole32(ccb->dmamap_xfer->dm_segs[0].ds_addr);
    728 		memset(ccb->sg_block, 0,
    729 		    sizeof(ADW_SG_BLOCK) * ADW_NUM_SG_BLOCK);
    730 		adw_build_sglist(ccb, scsiqp, ccb->sg_block);
    731 	} else {
    732 		/*
    733                  * No data xfer, use non S/G values.
    734                  */
    735 		scsiqp->data_cnt = 0;
    736 		scsiqp->vdata_addr = 0;
    737 		scsiqp->data_addr = 0;
    738 	}
    739 
    740 	return (1);
    741 }
    742 
    743 
    744 /*
    745  * Build scatter-gather list for Wide Boards.
    746  */
    747 static void
    748 adw_build_sglist(ADW_CCB *ccb, ADW_SCSI_REQ_Q *scsiqp, ADW_SG_BLOCK *sg_block)
    749 {
    750 	u_long          sg_block_next_addr;	/* block and its next */
    751 	u_int32_t       sg_block_physical_addr;
    752 	int             i;	/* how many SG entries */
    753 	bus_dma_segment_t *sg_list = &ccb->dmamap_xfer->dm_segs[0];
    754 	int             sg_elem_cnt = ccb->dmamap_xfer->dm_nsegs;
    755 
    756 
    757 	sg_block_next_addr = (u_long) sg_block;	/* allow math operation */
    758 	sg_block_physical_addr = le32toh(ccb->hashkey) +
    759 	    offsetof(struct adw_ccb, sg_block[0]);
    760 	scsiqp->sg_real_addr = htole32(sg_block_physical_addr);
    761 
    762 	/*
    763 	 * If there are more than NO_OF_SG_PER_BLOCK dma segments (hw sg-list)
    764 	 * then split the request into multiple sg-list blocks.
    765 	 */
    766 
    767 	do {
    768 		for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) {
    769 			sg_block->sg_list[i].sg_addr = htole32(sg_list->ds_addr);
    770 			sg_block->sg_list[i].sg_count = htole32(sg_list->ds_len);
    771 
    772 			if (--sg_elem_cnt == 0) {
    773 				/* last entry, get out */
    774 				sg_block->sg_cnt = i + 1;
    775 				sg_block->sg_ptr = NULL; /* next link = NULL */
    776 				return;
    777 			}
    778 			sg_list++;
    779 		}
    780 		sg_block_next_addr += sizeof(ADW_SG_BLOCK);
    781 		sg_block_physical_addr += sizeof(ADW_SG_BLOCK);
    782 
    783 		sg_block->sg_cnt = NO_OF_SG_PER_BLOCK;
    784 		sg_block->sg_ptr = htole32(sg_block_physical_addr);
    785 		sg_block = (ADW_SG_BLOCK *) sg_block_next_addr;	/* virt. addr */
    786 	} while (1);
    787 }
    788 
    789 
    790 /******************************************************************************/
    791 /*                       Interrupts and TimeOut routines                      */
    792 /******************************************************************************/
    793 
    794 
    795 int
    796 adw_intr(void *arg)
    797 {
    798 	ADW_SOFTC      *sc = arg;
    799 
    800 
    801 	if(AdwISR(sc) != ADW_FALSE) {
    802 		return (1);
    803 	}
    804 
    805 	return (0);
    806 }
    807 
    808 
    809 /*
    810  * Poll a particular unit, looking for a particular xs
    811  */
    812 static int
    813 adw_poll(ADW_SOFTC *sc, struct scsipi_xfer *xs, int count)
    814 {
    815 
    816 	/* timeouts are in msec, so we loop in 1000 usec cycles */
    817 	while (count) {
    818 		adw_intr(sc);
    819 		if (xs->xs_status & XS_STS_DONE)
    820 			return (0);
    821 		delay(1000);	/* only happens in boot so ok */
    822 		count--;
    823 	}
    824 	return (1);
    825 }
    826 
    827 
    828 static void
    829 adw_timeout(void *arg)
    830 {
    831 	ADW_CCB        *ccb = arg;
    832 	struct scsipi_xfer *xs = ccb->xs;
    833 	struct scsipi_periph *periph = xs->xs_periph;
    834 	ADW_SOFTC      *sc =
    835 	    (void *)periph->periph_channel->chan_adapter->adapt_dev;
    836 	int             s;
    837 
    838 	scsipi_printaddr(periph);
    839 	printf("timed out");
    840 
    841 	s = splbio();
    842 
    843 	if (ccb->flags & CCB_ABORTED) {
    844 	/*
    845 	 * Abort Timed Out
    846 	 *
    847 	 * No more opportunities. Lets try resetting the bus and
    848 	 * reinitialize the host adapter.
    849 	 */
    850 		callout_stop(&xs->xs_callout);
    851 		printf(" AGAIN. Resetting SCSI Bus\n");
    852 		adw_reset_bus(sc);
    853 		splx(s);
    854 		return;
    855 	} else if (ccb->flags & CCB_ABORTING) {
    856 	/*
    857 	 * Abort the operation that has timed out.
    858 	 *
    859 	 * Second opportunity.
    860 	 */
    861 		printf("\n");
    862 		xs->error = XS_TIMEOUT;
    863 		ccb->flags |= CCB_ABORTED;
    864 #if 0
    865 		/*
    866 		 * - XXX - 3.3a microcode is BROKEN!!!
    867 		 *
    868 		 * We cannot abort a CCB, so we can only hope the command
    869 		 * get completed before the next timeout, otherwise a
    870 		 * Bus Reset will arrive inexorably.
    871 		 */
    872 		/*
    873 		 * ADW_ABORT_CCB() makes the board to generate an interrupt
    874 		 *
    875 		 * - XXX - The above assertion MUST be verified (and this
    876 		 *         code changed as well [callout_*()]), when the
    877 		 *         ADW_ABORT_CCB will be working again
    878 		 */
    879 		ADW_ABORT_CCB(sc, ccb);
    880 #endif
    881 		/*
    882 		 * waiting for multishot callout_reset() let's restart it
    883 		 * by hand so the next time a timeout event will occour
    884 		 * we will reset the bus.
    885 		 */
    886 		callout_reset(&xs->xs_callout,
    887 			    (ccb->timeout * hz) / 1000, adw_timeout, ccb);
    888 	} else {
    889 	/*
    890 	 * Abort the operation that has timed out.
    891 	 *
    892 	 * First opportunity.
    893 	 */
    894 		printf("\n");
    895 		xs->error = XS_TIMEOUT;
    896 		ccb->flags |= CCB_ABORTING;
    897 #if 0
    898 		/*
    899 		 * - XXX - 3.3a microcode is BROKEN!!!
    900 		 *
    901 		 * We cannot abort a CCB, so we can only hope the command
    902 		 * get completed before the next 2 timeout, otherwise a
    903 		 * Bus Reset will arrive inexorably.
    904 		 */
    905 		/*
    906 		 * ADW_ABORT_CCB() makes the board to generate an interrupt
    907 		 *
    908 		 * - XXX - The above assertion MUST be verified (and this
    909 		 *         code changed as well [callout_*()]), when the
    910 		 *         ADW_ABORT_CCB will be working again
    911 		 */
    912 		ADW_ABORT_CCB(sc, ccb);
    913 #endif
    914 		/*
    915 		 * waiting for multishot callout_reset() let's restart it
    916 		 * by hand so to give a second opportunity to the command
    917 		 * which timed-out.
    918 		 */
    919 		callout_reset(&xs->xs_callout,
    920 			    (ccb->timeout * hz) / 1000, adw_timeout, ccb);
    921 	}
    922 
    923 	splx(s);
    924 }
    925 
    926 
    927 static void
    928 adw_reset_bus(ADW_SOFTC *sc)
    929 {
    930 	ADW_CCB	*ccb;
    931 	int	 s;
    932 	struct scsipi_xfer *xs;
    933 
    934 	s = splbio();
    935 	AdwResetSCSIBus(sc);
    936 	while((ccb = TAILQ_LAST(&sc->sc_pending_ccb,
    937 			adw_pending_ccb)) != NULL) {
    938 		callout_stop(&ccb->xs->xs_callout);
    939 		TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
    940 		xs = ccb->xs;
    941 		adw_free_ccb(sc, ccb);
    942 		xs->error = XS_RESOURCE_SHORTAGE;
    943 		scsipi_done(xs);
    944 	}
    945 	splx(s);
    946 }
    947 
    948 
    949 /******************************************************************************/
    950 /*              Host Adapter and Peripherals Information Routines             */
    951 /******************************************************************************/
    952 
    953 
    954 static void
    955 adw_print_info(ADW_SOFTC *sc, int tid)
    956 {
    957 	bus_space_tag_t iot = sc->sc_iot;
    958 	bus_space_handle_t ioh = sc->sc_ioh;
    959 	u_int16_t wdtr_able, wdtr_done, wdtr;
    960     	u_int16_t sdtr_able, sdtr_done, sdtr, period;
    961 	static int wdtr_reneg = 0, sdtr_reneg = 0;
    962 
    963 	if (tid == 0){
    964 		wdtr_reneg = sdtr_reneg = 0;
    965 	}
    966 
    967 	printf("%s: target %d ", sc->sc_dev.dv_xname, tid);
    968 
    969 	ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_SDTR_ABLE, wdtr_able);
    970 	if(wdtr_able & ADW_TID_TO_TIDMASK(tid)) {
    971 		ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_SDTR_DONE, wdtr_done);
    972 		ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_DEVICE_HSHK_CFG_TABLE +
    973 			(2 * tid), wdtr);
    974 		printf("using %d-bits wide, ", (wdtr & 0x8000)? 16 : 8);
    975 		if((wdtr_done & ADW_TID_TO_TIDMASK(tid)) == 0)
    976 			wdtr_reneg = 1;
    977 	} else {
    978 		printf("wide transfers disabled, ");
    979 	}
    980 
    981 	ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_SDTR_ABLE, sdtr_able);
    982 	if(sdtr_able & ADW_TID_TO_TIDMASK(tid)) {
    983 		ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_SDTR_DONE, sdtr_done);
    984 		ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_DEVICE_HSHK_CFG_TABLE +
    985 			(2 * tid), sdtr);
    986 		sdtr &=  ~0x8000;
    987 		if((sdtr & 0x1F) != 0) {
    988 			if((sdtr & 0x1F00) == 0x1100){
    989 				printf("80.0 MHz");
    990 			} else if((sdtr & 0x1F00) == 0x1000){
    991 				printf("40.0 MHz");
    992 			} else {
    993 				/* <= 20.0 MHz */
    994 				period = (((sdtr >> 8) * 25) + 50)/4;
    995 				if(period == 0) {
    996 					/* Should never happen. */
    997 					printf("? MHz");
    998 				} else {
    999 					printf("%d.%d MHz", 250/period,
   1000 						ADW_TENTHS(250, period));
   1001 				}
   1002 			}
   1003 			printf(" synchronous transfers\n");
   1004 		} else {
   1005 			printf("asynchronous transfers\n");
   1006 		}
   1007 		if((sdtr_done & ADW_TID_TO_TIDMASK(tid)) == 0)
   1008 			sdtr_reneg = 1;
   1009 	} else {
   1010 		printf("synchronous transfers disabled\n");
   1011 	}
   1012 
   1013 	if(wdtr_reneg || sdtr_reneg) {
   1014 		printf("%s: target %d %s", sc->sc_dev.dv_xname, tid,
   1015 			(wdtr_reneg)? ((sdtr_reneg)? "wide/sync" : "wide") :
   1016 			((sdtr_reneg)? "sync" : "") );
   1017 		printf(" renegotiation pending before next command.\n");
   1018 	}
   1019 }
   1020 
   1021 
   1022 /******************************************************************************/
   1023 /*                        WIDE boards Interrupt callbacks                     */
   1024 /******************************************************************************/
   1025 
   1026 
   1027 /*
   1028  * adw_isr_callback() - Second Level Interrupt Handler called by AdwISR()
   1029  *
   1030  * Interrupt callback function for the Wide SCSI Adv Library.
   1031  *
   1032  * Notice:
   1033  * Interrupts are disabled by the caller (AdwISR() function), and will be
   1034  * enabled at the end of the caller.
   1035  */
   1036 static void
   1037 adw_isr_callback(ADW_SOFTC *sc, ADW_SCSI_REQ_Q *scsiq)
   1038 {
   1039 	bus_dma_tag_t   dmat = sc->sc_dmat;
   1040 	ADW_CCB        *ccb;
   1041 	struct scsipi_xfer *xs;
   1042 	struct scsipi_sense_data *s1, *s2;
   1043 
   1044 
   1045 	ccb = adw_ccb_phys_kv(sc, scsiq->ccb_ptr);
   1046 
   1047 	callout_stop(&ccb->xs->xs_callout);
   1048 
   1049 	xs = ccb->xs;
   1050 
   1051 	/*
   1052          * If we were a data transfer, unload the map that described
   1053          * the data buffer.
   1054          */
   1055 	if (xs->datalen) {
   1056 		bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
   1057 				ccb->dmamap_xfer->dm_mapsize,
   1058 			 (xs->xs_control & XS_CTL_DATA_IN) ?
   1059 			 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1060 		bus_dmamap_unload(dmat, ccb->dmamap_xfer);
   1061 	}
   1062 
   1063 	if ((ccb->flags & CCB_ALLOC) == 0) {
   1064 		printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname);
   1065 		Debugger();
   1066 		return;
   1067 	}
   1068 
   1069 	/*
   1070 	 * 'done_status' contains the command's ending status.
   1071 	 * 'host_status' conatins the host adapter status.
   1072 	 * 'scsi_status' contains the scsi peripheral status.
   1073 	 */
   1074 	if ((scsiq->host_status == QHSTA_NO_ERROR) &&
   1075 	   ((scsiq->done_status == QD_NO_ERROR) ||
   1076 	    (scsiq->done_status == QD_WITH_ERROR))) {
   1077 		switch (scsiq->scsi_status) {
   1078 		case SCSI_STATUS_GOOD:
   1079 			if ((scsiq->cdb[0] == INQUIRY) &&
   1080 			    (scsiq->target_lun == 0)) {
   1081 				adw_print_info(sc, scsiq->target_id);
   1082 			}
   1083 			xs->error = XS_NOERROR;
   1084 			xs->resid = le32toh(scsiq->data_cnt);
   1085 			sc->sc_freeze_dev[scsiq->target_id] = 0;
   1086 			break;
   1087 
   1088 		case SCSI_STATUS_CHECK_CONDITION:
   1089 		case SCSI_STATUS_CMD_TERMINATED:
   1090 			s1 = &ccb->scsi_sense;
   1091 			s2 = &xs->sense.scsi_sense;
   1092 			*s2 = *s1;
   1093 			xs->error = XS_SENSE;
   1094 			sc->sc_freeze_dev[scsiq->target_id] = 1;
   1095 			break;
   1096 
   1097 		default:
   1098 			xs->error = XS_BUSY;
   1099 			sc->sc_freeze_dev[scsiq->target_id] = 1;
   1100 			break;
   1101 		}
   1102 	} else if (scsiq->done_status == QD_ABORTED_BY_HOST) {
   1103 		xs->error = XS_DRIVER_STUFFUP;
   1104 	} else {
   1105 		switch (scsiq->host_status) {
   1106 		case QHSTA_M_SEL_TIMEOUT:
   1107 			xs->error = XS_SELTIMEOUT;
   1108 			break;
   1109 
   1110 		case QHSTA_M_SXFR_OFF_UFLW:
   1111 		case QHSTA_M_SXFR_OFF_OFLW:
   1112 		case QHSTA_M_DATA_OVER_RUN:
   1113 			printf("%s: Overrun/Overflow/Underflow condition\n",
   1114 				sc->sc_dev.dv_xname);
   1115 			xs->error = XS_DRIVER_STUFFUP;
   1116 			break;
   1117 
   1118 		case QHSTA_M_SXFR_DESELECTED:
   1119 		case QHSTA_M_UNEXPECTED_BUS_FREE:
   1120 			printf("%s: Unexpected BUS free\n",sc->sc_dev.dv_xname);
   1121 			xs->error = XS_DRIVER_STUFFUP;
   1122 			break;
   1123 
   1124 		case QHSTA_M_SCSI_BUS_RESET:
   1125 		case QHSTA_M_SCSI_BUS_RESET_UNSOL:
   1126 			printf("%s: BUS Reset\n", sc->sc_dev.dv_xname);
   1127 			xs->error = XS_DRIVER_STUFFUP;
   1128 			break;
   1129 
   1130 		case QHSTA_M_BUS_DEVICE_RESET:
   1131 			printf("%s: Device Reset\n", sc->sc_dev.dv_xname);
   1132 			xs->error = XS_DRIVER_STUFFUP;
   1133 			break;
   1134 
   1135 		case QHSTA_M_QUEUE_ABORTED:
   1136 			printf("%s: Queue Aborted\n", sc->sc_dev.dv_xname);
   1137 			xs->error = XS_DRIVER_STUFFUP;
   1138 			break;
   1139 
   1140 		case QHSTA_M_SXFR_SDMA_ERR:
   1141 		case QHSTA_M_SXFR_SXFR_PERR:
   1142 		case QHSTA_M_RDMA_PERR:
   1143 			/*
   1144 			 * DMA Error. This should *NEVER* happen!
   1145 			 *
   1146 			 * Lets try resetting the bus and reinitialize
   1147 			 * the host adapter.
   1148 			 */
   1149 			printf("%s: DMA Error. Reseting bus\n",
   1150 				sc->sc_dev.dv_xname);
   1151 			TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
   1152 			adw_reset_bus(sc);
   1153 			xs->error = XS_BUSY;
   1154 			goto done;
   1155 
   1156 		case QHSTA_M_WTM_TIMEOUT:
   1157 		case QHSTA_M_SXFR_WD_TMO:
   1158 			/* The SCSI bus hung in a phase */
   1159 			printf("%s: Watch Dog timer expired. Reseting bus\n",
   1160 				sc->sc_dev.dv_xname);
   1161 			TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
   1162 			adw_reset_bus(sc);
   1163 			xs->error = XS_BUSY;
   1164 			goto done;
   1165 
   1166 		case QHSTA_M_SXFR_XFR_PH_ERR:
   1167 			printf("%s: Transfer Error\n", sc->sc_dev.dv_xname);
   1168 			xs->error = XS_DRIVER_STUFFUP;
   1169 			break;
   1170 
   1171 		case QHSTA_M_BAD_CMPL_STATUS_IN:
   1172 			/* No command complete after a status message */
   1173 			printf("%s: Bad Completion Status\n",
   1174 				sc->sc_dev.dv_xname);
   1175 			xs->error = XS_DRIVER_STUFFUP;
   1176 			break;
   1177 
   1178 		case QHSTA_M_AUTO_REQ_SENSE_FAIL:
   1179 			printf("%s: Auto Sense Failed\n", sc->sc_dev.dv_xname);
   1180 			xs->error = XS_DRIVER_STUFFUP;
   1181 			break;
   1182 
   1183 		case QHSTA_M_INVALID_DEVICE:
   1184 			printf("%s: Invalid Device\n", sc->sc_dev.dv_xname);
   1185 			xs->error = XS_DRIVER_STUFFUP;
   1186 			break;
   1187 
   1188 		case QHSTA_M_NO_AUTO_REQ_SENSE:
   1189 			/*
   1190 			 * User didn't request sense, but we got a
   1191 			 * check condition.
   1192 			 */
   1193 			printf("%s: Unexpected Check Condition\n",
   1194 					sc->sc_dev.dv_xname);
   1195 			xs->error = XS_DRIVER_STUFFUP;
   1196 			break;
   1197 
   1198 		case QHSTA_M_SXFR_UNKNOWN_ERROR:
   1199 			printf("%s: Unknown Error\n", sc->sc_dev.dv_xname);
   1200 			xs->error = XS_DRIVER_STUFFUP;
   1201 			break;
   1202 
   1203 		default:
   1204 			panic("%s: Unhandled Host Status Error %x",
   1205 			      sc->sc_dev.dv_xname, scsiq->host_status);
   1206 		}
   1207 	}
   1208 
   1209 	TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
   1210 done:	adw_free_ccb(sc, ccb);
   1211 	scsipi_done(xs);
   1212 }
   1213 
   1214 
   1215 /*
   1216  * adw_async_callback() - Adv Library asynchronous event callback function.
   1217  */
   1218 static void
   1219 adw_async_callback(ADW_SOFTC *sc, u_int8_t code)
   1220 {
   1221 	switch (code) {
   1222 	case ADV_ASYNC_SCSI_BUS_RESET_DET:
   1223 		/* The firmware detected a SCSI Bus reset. */
   1224 		printf("%s: SCSI Bus reset detected\n", sc->sc_dev.dv_xname);
   1225 		break;
   1226 
   1227 	case ADV_ASYNC_RDMA_FAILURE:
   1228 		/*
   1229 		 * Handle RDMA failure by resetting the SCSI Bus and
   1230 		 * possibly the chip if it is unresponsive.
   1231 		 */
   1232 		printf("%s: RDMA failure. Resetting the SCSI Bus and"
   1233 				" the adapter\n", sc->sc_dev.dv_xname);
   1234 		AdwResetSCSIBus(sc);
   1235 		break;
   1236 
   1237 	case ADV_HOST_SCSI_BUS_RESET:
   1238 		/* Host generated SCSI bus reset occurred. */
   1239 		printf("%s: Host generated SCSI bus reset occurred\n",
   1240 				sc->sc_dev.dv_xname);
   1241 		break;
   1242 
   1243 	case ADV_ASYNC_CARRIER_READY_FAILURE:
   1244 		/* Carrier Ready failure. */
   1245 		printf("%s: Carrier Ready failure!\n", sc->sc_dev.dv_xname);
   1246 		break;
   1247 
   1248 	default:
   1249 		break;
   1250 	}
   1251 }
   1252