adw.h revision 1.13 1 1.13 perry /* $NetBSD: adw.h,v 1.13 2005/02/27 00:27:00 perry Exp $ */
2 1.1 dante
3 1.1 dante /*
4 1.1 dante * Generic driver definitions and exported functions for the Advanced
5 1.1 dante * Systems Inc. SCSI controllers
6 1.13 perry *
7 1.5 dante * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
8 1.1 dante * All rights reserved.
9 1.1 dante *
10 1.1 dante * Author: Baldassare Dante Profeta <dante (at) mclink.it>
11 1.1 dante *
12 1.1 dante * Redistribution and use in source and binary forms, with or without
13 1.1 dante * modification, are permitted provided that the following conditions
14 1.1 dante * are met:
15 1.1 dante * 1. Redistributions of source code must retain the above copyright
16 1.1 dante * notice, this list of conditions and the following disclaimer.
17 1.1 dante * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 dante * notice, this list of conditions and the following disclaimer in the
19 1.1 dante * documentation and/or other materials provided with the distribution.
20 1.1 dante * 3. All advertising materials mentioning features or use of this software
21 1.1 dante * must display the following acknowledgement:
22 1.1 dante * This product includes software developed by the NetBSD
23 1.1 dante * Foundation, Inc. and its contributors.
24 1.1 dante * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 dante * contributors may be used to endorse or promote products derived
26 1.1 dante * from this software without specific prior written permission.
27 1.1 dante *
28 1.1 dante * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 dante * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 dante * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 dante * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 dante * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 dante * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 dante * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 dante * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 dante * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 dante * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 dante * POSSIBILITY OF SUCH DAMAGE.
39 1.1 dante */
40 1.1 dante
41 1.1 dante #ifndef _ADVANSYS_WIDE_H_
42 1.1 dante #define _ADVANSYS_WIDE_H_
43 1.1 dante
44 1.1 dante /******************************************************************************/
45 1.1 dante
46 1.1 dante typedef int (* ADW_ISR_CALLBACK) (ADW_SOFTC *, ADW_SCSI_REQ_Q *);
47 1.5 dante typedef void (* ADW_ASYNC_CALLBACK) (ADW_SOFTC *, u_int8_t);
48 1.5 dante
49 1.5 dante
50 1.5 dante /*
51 1.2 dante * per request scatter-gather element limit
52 1.2 dante * We could have up to 256 SG lists.
53 1.2 dante */
54 1.5 dante #define ADW_MAX_SG_LIST 255
55 1.1 dante
56 1.13 perry /*
57 1.1 dante * Scatter-Gather Definitions per request.
58 1.1 dante */
59 1.1 dante
60 1.1 dante #define NO_OF_SG_PER_BLOCK 15
61 1.1 dante
62 1.1 dante /* Number of SG blocks needed. */
63 1.1 dante #define ADW_NUM_SG_BLOCK \
64 1.1 dante ((ADW_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)
65 1.1 dante
66 1.1 dante
67 1.5 dante struct adw_ccb {
68 1.5 dante ADW_SCSI_REQ_Q scsiq;
69 1.1 dante ADW_SG_BLOCK sg_block[ADW_NUM_SG_BLOCK];
70 1.5 dante
71 1.12 thorpej struct scsi_sense_data scsi_sense;
72 1.1 dante
73 1.1 dante TAILQ_ENTRY(adw_ccb) chain;
74 1.2 dante struct adw_ccb *nexthash;
75 1.3 thorpej u_int32_t hashkey;
76 1.5 dante
77 1.1 dante struct scsipi_xfer *xs; /* the scsipi_xfer for this cmd */
78 1.1 dante int flags; /* see below */
79 1.1 dante
80 1.1 dante int timeout;
81 1.1 dante /*
82 1.1 dante * This DMA map maps the buffer involved in the transfer.
83 1.1 dante */
84 1.1 dante bus_dmamap_t dmamap_xfer;
85 1.1 dante };
86 1.1 dante
87 1.1 dante typedef struct adw_ccb ADW_CCB;
88 1.1 dante
89 1.1 dante /* flags for ADW_CCB */
90 1.4 dante #define CCB_ALLOC 0x01
91 1.4 dante #define CCB_ABORTING 0x02
92 1.4 dante #define CCB_ABORTED 0x04
93 1.1 dante
94 1.1 dante
95 1.7 dante #define ADW_MAX_CCB 63 /* Max. number commands per device (63) */
96 1.1 dante
97 1.5 dante struct adw_control {
98 1.5 dante ADW_CCB ccbs[ADW_MAX_CCB]; /* all our control blocks */
99 1.5 dante ADW_CARRIER *carriers; /* all our carriers */
100 1.1 dante };
101 1.1 dante
102 1.1 dante /*
103 1.1 dante * Offset of a CCB from the beginning of the control DMA mapping.
104 1.1 dante */
105 1.1 dante #define ADW_CCB_OFF(c) (offsetof(struct adw_control, ccbs[0]) + \
106 1.1 dante (((u_long)(c)) - ((u_long)&sc->sc_control->ccbs[0])))
107 1.1 dante
108 1.1 dante /******************************************************************************/
109 1.1 dante
110 1.11 perry int adw_init(ADW_SOFTC *);
111 1.11 perry void adw_attach(ADW_SOFTC *);
112 1.11 perry int adw_intr(void *);
113 1.11 perry ADW_CCB *adw_ccb_phys_kv(ADW_SOFTC *, u_int32_t);
114 1.1 dante
115 1.1 dante /******************************************************************************/
116 1.1 dante
117 1.1 dante #endif /* _ADVANSYS_ADW_H_ */
118