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adw.h revision 1.7
      1  1.7    dante /*      $NetBSD: adw.h,v 1.7 2000/05/08 17:21:34 dante Exp $        */
      2  1.1    dante 
      3  1.1    dante /*
      4  1.1    dante  * Generic driver definitions and exported functions for the Advanced
      5  1.1    dante  * Systems Inc. SCSI controllers
      6  1.1    dante  *
      7  1.5    dante  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
      8  1.1    dante  * All rights reserved.
      9  1.1    dante  *
     10  1.1    dante  * Author: Baldassare Dante Profeta <dante (at) mclink.it>
     11  1.1    dante  *
     12  1.1    dante  * Redistribution and use in source and binary forms, with or without
     13  1.1    dante  * modification, are permitted provided that the following conditions
     14  1.1    dante  * are met:
     15  1.1    dante  * 1. Redistributions of source code must retain the above copyright
     16  1.1    dante  *    notice, this list of conditions and the following disclaimer.
     17  1.1    dante  * 2. Redistributions in binary form must reproduce the above copyright
     18  1.1    dante  *    notice, this list of conditions and the following disclaimer in the
     19  1.1    dante  *    documentation and/or other materials provided with the distribution.
     20  1.1    dante  * 3. All advertising materials mentioning features or use of this software
     21  1.1    dante  *    must display the following acknowledgement:
     22  1.1    dante  *        This product includes software developed by the NetBSD
     23  1.1    dante  *        Foundation, Inc. and its contributors.
     24  1.1    dante  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25  1.1    dante  *    contributors may be used to endorse or promote products derived
     26  1.1    dante  *    from this software without specific prior written permission.
     27  1.1    dante  *
     28  1.1    dante  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29  1.1    dante  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30  1.1    dante  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31  1.1    dante  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32  1.1    dante  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33  1.1    dante  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34  1.1    dante  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35  1.1    dante  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36  1.1    dante  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37  1.1    dante  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38  1.1    dante  * POSSIBILITY OF SUCH DAMAGE.
     39  1.1    dante  */
     40  1.1    dante 
     41  1.1    dante #ifndef _ADVANSYS_WIDE_H_
     42  1.1    dante #define _ADVANSYS_WIDE_H_
     43  1.1    dante 
     44  1.1    dante /******************************************************************************/
     45  1.1    dante 
     46  1.1    dante typedef int (* ADW_ISR_CALLBACK) (ADW_SOFTC *, ADW_SCSI_REQ_Q *);
     47  1.5    dante typedef void (* ADW_ASYNC_CALLBACK) (ADW_SOFTC *, u_int8_t);
     48  1.5    dante 
     49  1.5    dante 
     50  1.5    dante /*
     51  1.7    dante  * ADW_CARRIER must be exactly 16 BYTES
     52  1.5    dante  * Every adw_carrier structure _MUST_ always be aligned on a 16 bytes boundary
     53  1.5    dante  */
     54  1.5    dante struct adw_carrier {
     55  1.5    dante /* ---------- the microcode wants the field below ---------- */
     56  1.7    dante 	u_int32_t	carr_id;  /* Carrier ID */
     57  1.5    dante 	u_int32_t	carr_pa;  /* Carrier Physical Address */
     58  1.5    dante 	u_int32_t	areq_vpa; /* ADW_SCSI_REQ_Q Physical Address */
     59  1.5    dante 	/*
     60  1.5    dante 	 * next_vpa [31:4]	Carrier Physical Next Pointer
     61  1.5    dante 	 *
     62  1.5    dante 	 * next_vpa [3:1]	Reserved Bits
     63  1.5    dante 	 * next_vpa [0]		Done Flag set in Response Queue.
     64  1.5    dante 	 */
     65  1.5    dante 	u_int32_t	next_vpa;
     66  1.5    dante /* ----------                                     ---------- */
     67  1.5    dante };
     68  1.5    dante 
     69  1.5    dante typedef struct adw_carrier ADW_CARRIER;
     70  1.5    dante 
     71  1.5    dante 
     72  1.5    dante /*
     73  1.5    dante  * Mask used to eliminate low 4 bits of carrier 'next_vpa' field.
     74  1.5    dante  */
     75  1.6    dante #define ASC_NEXT_VPA_MASK	0xFFFFFFF0
     76  1.5    dante 
     77  1.6    dante #define ASC_RQ_DONE		0x00000001
     78  1.6    dante #define ASC_RQ_GOOD		0x00000002
     79  1.6    dante #define ASC_CQ_STOPPER		0x00000000
     80  1.5    dante 
     81  1.5    dante #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK)
     82  1.5    dante 
     83  1.1    dante 
     84  1.2    dante /*
     85  1.2    dante  * per request scatter-gather element limit
     86  1.2    dante  * We could have up to 256 SG lists.
     87  1.2    dante  */
     88  1.5    dante #define ADW_MAX_SG_LIST		255
     89  1.1    dante 
     90  1.1    dante /*
     91  1.1    dante  * Scatter-Gather Definitions per request.
     92  1.1    dante  */
     93  1.1    dante 
     94  1.1    dante #define NO_OF_SG_PER_BLOCK	15
     95  1.1    dante 
     96  1.1    dante /* Number of SG blocks needed. */
     97  1.1    dante #define ADW_NUM_SG_BLOCK \
     98  1.1    dante 	((ADW_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)
     99  1.1    dante 
    100  1.1    dante 
    101  1.5    dante struct adw_ccb {
    102  1.5    dante 	ADW_SCSI_REQ_Q		scsiq;
    103  1.1    dante 	ADW_SG_BLOCK		sg_block[ADW_NUM_SG_BLOCK];
    104  1.5    dante 
    105  1.1    dante 	struct scsipi_sense_data scsi_sense;
    106  1.1    dante 
    107  1.1    dante 	TAILQ_ENTRY(adw_ccb)	chain;
    108  1.2    dante 	struct adw_ccb		*nexthash;
    109  1.3  thorpej 	u_int32_t		hashkey;
    110  1.5    dante 
    111  1.1    dante 	struct scsipi_xfer	*xs;	/* the scsipi_xfer for this cmd */
    112  1.1    dante 	int			flags;	/* see below */
    113  1.1    dante 
    114  1.1    dante 	int			timeout;
    115  1.1    dante 	/*
    116  1.1    dante 	 * This DMA map maps the buffer involved in the transfer.
    117  1.1    dante 	 */
    118  1.1    dante 	bus_dmamap_t		dmamap_xfer;
    119  1.1    dante };
    120  1.1    dante 
    121  1.1    dante typedef struct adw_ccb ADW_CCB;
    122  1.1    dante 
    123  1.1    dante /* flags for ADW_CCB */
    124  1.4    dante #define CCB_ALLOC	0x01
    125  1.4    dante #define CCB_ABORTING	0x02
    126  1.4    dante #define CCB_ABORTED	0x04
    127  1.1    dante 
    128  1.1    dante 
    129  1.7    dante #define ADW_MAX_CARRIER	253	/* Max. number of host commands (253) */
    130  1.7    dante #define ADW_MAX_CCB	63	/* Max. number commands per device (63) */
    131  1.1    dante 
    132  1.5    dante struct adw_control {
    133  1.5    dante 	ADW_CCB		ccbs[ADW_MAX_CCB];	/* all our control blocks */
    134  1.5    dante 	ADW_CARRIER	*carriers;		/* all our carriers */
    135  1.1    dante };
    136  1.1    dante 
    137  1.1    dante /*
    138  1.7    dante  * Bus Address of a Carrier.
    139  1.7    dante  * ba = base_ba + v_address - base_va
    140  1.5    dante  */
    141  1.7    dante #define	ADW_CARRIER_BADDR(sc,x)	((sc)->sc_dmamap_carrier->dm_segs[0].ds_addr + \
    142  1.5    dante 			(((u_long)x) - ((u_long)(sc)->sc_control->carriers)))
    143  1.7    dante /*
    144  1.7    dante  * Virtual Address of a Carrier.
    145  1.7    dante  * va = base_va + bus_address - base_ba
    146  1.7    dante  */
    147  1.7    dante #define	ADW_CARRIER_VADDR(sc,x)	((ADW_CARRIER *) \
    148  1.7    dante 			(((u_int8_t *)(sc)->sc_control->carriers) + \
    149  1.7    dante 			((u_long)x) - \
    150  1.7    dante 			(sc)->sc_dmamap_carrier->dm_segs[0].ds_addr))
    151  1.5    dante /*
    152  1.1    dante  * Offset of a CCB from the beginning of the control DMA mapping.
    153  1.1    dante  */
    154  1.1    dante #define	ADW_CCB_OFF(c)	(offsetof(struct adw_control, ccbs[0]) +	\
    155  1.1    dante 		    (((u_long)(c)) - ((u_long)&sc->sc_control->ccbs[0])))
    156  1.1    dante 
    157  1.1    dante /******************************************************************************/
    158  1.1    dante 
    159  1.1    dante int adw_init __P((ADW_SOFTC *sc));
    160  1.1    dante void adw_attach __P((ADW_SOFTC *sc));
    161  1.1    dante int adw_intr __P((void *arg));
    162  1.3  thorpej ADW_CCB *adw_ccb_phys_kv __P((ADW_SOFTC *, u_int32_t));
    163  1.5    dante ADW_CARRIER *adw_carrier_phys_kv __P((ADW_SOFTC *, u_int32_t));
    164  1.1    dante 
    165  1.1    dante /******************************************************************************/
    166  1.1    dante 
    167  1.1    dante #endif /* _ADVANSYS_ADW_H_ */
    168