adw.h revision 1.5
1 /* $NetBSD: adw.h,v 1.5 2000/02/03 20:29:15 dante Exp $ */ 2 3 /* 4 * Generic driver definitions and exported functions for the Advanced 5 * Systems Inc. SCSI controllers 6 * 7 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 8 * All rights reserved. 9 * 10 * Author: Baldassare Dante Profeta <dante (at) mclink.it> 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 #ifndef _ADVANSYS_WIDE_H_ 42 #define _ADVANSYS_WIDE_H_ 43 44 /******************************************************************************/ 45 46 typedef int (* ADW_ISR_CALLBACK) (ADW_SOFTC *, ADW_SCSI_REQ_Q *); 47 typedef void (* ADW_ASYNC_CALLBACK) (ADW_SOFTC *, u_int8_t); 48 49 50 /* 51 * Every adw_carrier structure _MUST_ always be aligned on a 16 bytes boundary 52 */ 53 struct adw_carrier { 54 /* ---------- the microcode wants the field below ---------- */ 55 u_int32_t unused; /* Carrier Virtual Address -UNUSED- */ 56 u_int32_t carr_pa; /* Carrier Physical Address */ 57 u_int32_t areq_vpa; /* ADW_SCSI_REQ_Q Physical Address */ 58 /* 59 * next_vpa [31:4] Carrier Physical Next Pointer 60 * 61 * next_vpa [3:1] Reserved Bits 62 * next_vpa [0] Done Flag set in Response Queue. 63 */ 64 u_int32_t next_vpa; 65 /* ---------- ---------- */ 66 struct adw_carrier *nexthash; /* Carrier Virtual Address */ 67 68 int id; 69 /* 70 * This DMA map maps the buffer involved in the carrier transfer. 71 */ 72 // bus_dmamap_t dmamap_xfer; 73 }; 74 75 typedef struct adw_carrier ADW_CARRIER; 76 77 #define ADW_CARRIER_SIZE ((((int)((sizeof(ADW_CARRIER)-1)/16))+1)*16) 78 79 80 /* 81 * Mask used to eliminate low 4 bits of carrier 'next_vpa' field. 82 */ 83 #define ASC_NEXT_VPA_MASK 0xFFFFFFF0 84 85 #define ASC_RQ_DONE 0x00000001 86 #define ASC_CQ_STOPPER 0x00000000 87 88 #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK) 89 90 91 /* 92 * per request scatter-gather element limit 93 * We could have up to 256 SG lists. 94 */ 95 #define ADW_MAX_SG_LIST 255 96 97 /* 98 * Scatter-Gather Definitions per request. 99 */ 100 101 #define NO_OF_SG_PER_BLOCK 15 102 103 /* Number of SG blocks needed. */ 104 #define ADW_NUM_SG_BLOCK \ 105 ((ADW_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK) 106 107 108 struct adw_ccb { 109 ADW_SCSI_REQ_Q scsiq; 110 ADW_SG_BLOCK sg_block[ADW_NUM_SG_BLOCK]; 111 112 ADW_CARRIER *carr_list; /* carriers involved */ 113 114 struct scsipi_sense_data scsi_sense; 115 116 TAILQ_ENTRY(adw_ccb) chain; 117 struct adw_ccb *nexthash; 118 u_int32_t hashkey; 119 120 struct scsipi_xfer *xs; /* the scsipi_xfer for this cmd */ 121 int flags; /* see below */ 122 123 int timeout; 124 /* 125 * This DMA map maps the buffer involved in the transfer. 126 */ 127 bus_dmamap_t dmamap_xfer; 128 }; 129 130 typedef struct adw_ccb ADW_CCB; 131 132 /* flags for ADW_CCB */ 133 #define CCB_ALLOC 0x01 134 #define CCB_ABORTING 0x02 135 #define CCB_ABORTED 0x04 136 137 138 #define ADW_MAX_CARRIER 20 /* Max. number of host commands (253) */ 139 #define ADW_MAX_CCB 16 /* Max. number commands per device (63) */ 140 141 struct adw_control { 142 ADW_CCB ccbs[ADW_MAX_CCB]; /* all our control blocks */ 143 ADW_CARRIER *carriers; /* all our carriers */ 144 bus_dmamap_t dmamap_xfer; 145 }; 146 147 /* 148 * Offset of a carrier from the beginning of the carriers DMA mapping. 149 */ 150 #define ADW_CARRIER_ADDR(sc, x) ((sc)->sc_dmamap_carrier->dm_segs[0].ds_addr + \ 151 (((u_long)x) - ((u_long)(sc)->sc_control->carriers))) 152 /* 153 * Offset of a CCB from the beginning of the control DMA mapping. 154 */ 155 #define ADW_CCB_OFF(c) (offsetof(struct adw_control, ccbs[0]) + \ 156 (((u_long)(c)) - ((u_long)&sc->sc_control->ccbs[0]))) 157 158 /******************************************************************************/ 159 160 int adw_init __P((ADW_SOFTC *sc)); 161 void adw_attach __P((ADW_SOFTC *sc)); 162 int adw_intr __P((void *arg)); 163 ADW_CCB *adw_ccb_phys_kv __P((ADW_SOFTC *, u_int32_t)); 164 ADW_CARRIER *adw_carrier_phys_kv __P((ADW_SOFTC *, u_int32_t)); 165 166 /******************************************************************************/ 167 168 #endif /* _ADVANSYS_ADW_H_ */ 169
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