adw.h revision 1.6 1 /* $NetBSD: adw.h,v 1.6 2000/04/30 18:52:15 dante Exp $ */
2
3 /*
4 * Generic driver definitions and exported functions for the Advanced
5 * Systems Inc. SCSI controllers
6 *
7 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
8 * All rights reserved.
9 *
10 * Author: Baldassare Dante Profeta <dante (at) mclink.it>
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 */
40
41 #ifndef _ADVANSYS_WIDE_H_
42 #define _ADVANSYS_WIDE_H_
43
44 /******************************************************************************/
45
46 typedef int (* ADW_ISR_CALLBACK) (ADW_SOFTC *, ADW_SCSI_REQ_Q *);
47 typedef void (* ADW_ASYNC_CALLBACK) (ADW_SOFTC *, u_int8_t);
48
49
50 /*
51 * Every adw_carrier structure _MUST_ always be aligned on a 16 bytes boundary
52 */
53 struct adw_carrier {
54 /* ---------- the microcode wants the field below ---------- */
55 u_int32_t unused; /* Carrier Virtual Address -UNUSED- */
56 u_int32_t carr_pa; /* Carrier Physical Address */
57 u_int32_t areq_vpa; /* ADW_SCSI_REQ_Q Physical Address */
58 /*
59 * next_vpa [31:4] Carrier Physical Next Pointer
60 *
61 * next_vpa [3:1] Reserved Bits
62 * next_vpa [0] Done Flag set in Response Queue.
63 */
64 u_int32_t next_vpa;
65 /* ---------- ---------- */
66 struct adw_carrier *nexthash; /* Carrier Virtual Address */
67
68 int id;
69 /*
70 * This DMA map maps the buffer involved in the carrier transfer.
71 */
72 // bus_dmamap_t dmamap_xfer;
73 };
74
75 typedef struct adw_carrier ADW_CARRIER;
76
77 #define ADW_CARRIER_SIZE ((((int)((sizeof(ADW_CARRIER)-1)/16))+1)*16)
78
79
80 /*
81 * Mask used to eliminate low 4 bits of carrier 'next_vpa' field.
82 */
83 #define ASC_NEXT_VPA_MASK 0xFFFFFFF0
84
85 #define ASC_RQ_DONE 0x00000001
86 #define ASC_RQ_GOOD 0x00000002
87 #define ASC_CQ_STOPPER 0x00000000
88
89 #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK)
90
91
92 /*
93 * per request scatter-gather element limit
94 * We could have up to 256 SG lists.
95 */
96 #define ADW_MAX_SG_LIST 255
97
98 /*
99 * Scatter-Gather Definitions per request.
100 */
101
102 #define NO_OF_SG_PER_BLOCK 15
103
104 /* Number of SG blocks needed. */
105 #define ADW_NUM_SG_BLOCK \
106 ((ADW_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)
107
108
109 struct adw_ccb {
110 ADW_SCSI_REQ_Q scsiq;
111 ADW_SG_BLOCK sg_block[ADW_NUM_SG_BLOCK];
112
113 ADW_CARRIER *carr_list; /* carriers involved */
114
115 struct scsipi_sense_data scsi_sense;
116
117 TAILQ_ENTRY(adw_ccb) chain;
118 struct adw_ccb *nexthash;
119 u_int32_t hashkey;
120
121 struct scsipi_xfer *xs; /* the scsipi_xfer for this cmd */
122 int flags; /* see below */
123
124 int timeout;
125 /*
126 * This DMA map maps the buffer involved in the transfer.
127 */
128 bus_dmamap_t dmamap_xfer;
129 };
130
131 typedef struct adw_ccb ADW_CCB;
132
133 /* flags for ADW_CCB */
134 #define CCB_ALLOC 0x01
135 #define CCB_ABORTING 0x02
136 #define CCB_ABORTED 0x04
137
138
139 #define ADW_MAX_CARRIER 20 /* Max. number of host commands (253) */
140 #define ADW_MAX_CCB 16 /* Max. number commands per device (63) */
141
142 struct adw_control {
143 ADW_CCB ccbs[ADW_MAX_CCB]; /* all our control blocks */
144 ADW_CARRIER *carriers; /* all our carriers */
145 bus_dmamap_t dmamap_xfer;
146 };
147
148 /*
149 * Offset of a carrier from the beginning of the carriers DMA mapping.
150 */
151 #define ADW_CARRIER_ADDR(sc, x) ((sc)->sc_dmamap_carrier->dm_segs[0].ds_addr + \
152 (((u_long)x) - ((u_long)(sc)->sc_control->carriers)))
153 /*
154 * Offset of a CCB from the beginning of the control DMA mapping.
155 */
156 #define ADW_CCB_OFF(c) (offsetof(struct adw_control, ccbs[0]) + \
157 (((u_long)(c)) - ((u_long)&sc->sc_control->ccbs[0])))
158
159 /******************************************************************************/
160
161 int adw_init __P((ADW_SOFTC *sc));
162 void adw_attach __P((ADW_SOFTC *sc));
163 int adw_intr __P((void *arg));
164 ADW_CCB *adw_ccb_phys_kv __P((ADW_SOFTC *, u_int32_t));
165 ADW_CARRIER *adw_carrier_phys_kv __P((ADW_SOFTC *, u_int32_t));
166
167 /******************************************************************************/
168
169 #endif /* _ADVANSYS_ADW_H_ */
170