aha.c revision 1.26
1 /* $NetBSD: aha.c,v 1.26 2000/03/23 07:01:28 thorpej Exp $ */ 2 3 #include "opt_ddb.h" 4 5 #undef AHADIAG 6 #ifdef DDB 7 #define integrate 8 #else 9 #define integrate static inline 10 #endif 11 12 /*- 13 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 14 * All rights reserved. 15 * 16 * This code is derived from software contributed to The NetBSD Foundation 17 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace 18 * Simulation Facility, NASA Ames Research Center. 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 1. Redistributions of source code must retain the above copyright 24 * notice, this list of conditions and the following disclaimer. 25 * 2. Redistributions in binary form must reproduce the above copyright 26 * notice, this list of conditions and the following disclaimer in the 27 * documentation and/or other materials provided with the distribution. 28 * 3. All advertising materials mentioning features or use of this software 29 * must display the following acknowledgement: 30 * This product includes software developed by the NetBSD 31 * Foundation, Inc. and its contributors. 32 * 4. Neither the name of The NetBSD Foundation nor the names of its 33 * contributors may be used to endorse or promote products derived 34 * from this software without specific prior written permission. 35 * 36 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 38 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 39 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 40 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 41 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 42 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 43 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 44 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 45 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 46 * POSSIBILITY OF SUCH DAMAGE. 47 */ 48 49 /* 50 * Originally written by Julian Elischer (julian (at) tfs.com) 51 * for TRW Financial Systems for use under the MACH(2.5) operating system. 52 * 53 * TRW Financial Systems, in accordance with their agreement with Carnegie 54 * Mellon University, makes this software available to CMU to distribute 55 * or use in any manner that they see fit as long as this message is kept with 56 * the software. For this reason TFS also grants any other persons or 57 * organisations permission to use or modify this software. 58 * 59 * TFS supplies this software to be publicly redistributed 60 * on the understanding that TFS is not responsible for the correct 61 * functioning of this software in any circumstances. 62 */ 63 64 #include <sys/types.h> 65 #include <sys/param.h> 66 #include <sys/systm.h> 67 #include <sys/callout.h> 68 #include <sys/kernel.h> 69 #include <sys/errno.h> 70 #include <sys/ioctl.h> 71 #include <sys/device.h> 72 #include <sys/malloc.h> 73 #include <sys/buf.h> 74 #include <sys/proc.h> 75 #include <sys/user.h> 76 77 #include <machine/bus.h> 78 #include <machine/intr.h> 79 80 #include <dev/scsipi/scsi_all.h> 81 #include <dev/scsipi/scsipi_all.h> 82 #include <dev/scsipi/scsiconf.h> 83 84 #include <dev/ic/ahareg.h> 85 #include <dev/ic/ahavar.h> 86 87 #ifndef DDB 88 #define Debugger() panic("should call debugger here (aha1542.c)") 89 #endif /* ! DDB */ 90 91 #define AHA_MAXXFER ((AHA_NSEG - 1) << PGSHIFT) 92 93 #ifdef AHADEBUG 94 int aha_debug = 1; 95 #endif /* AHADEBUG */ 96 97 int aha_cmd __P((bus_space_tag_t, bus_space_handle_t, struct aha_softc *, int, 98 u_char *, int, u_char *)); 99 integrate void aha_finish_ccbs __P((struct aha_softc *)); 100 integrate void aha_reset_ccb __P((struct aha_softc *, struct aha_ccb *)); 101 void aha_free_ccb __P((struct aha_softc *, struct aha_ccb *)); 102 integrate int aha_init_ccb __P((struct aha_softc *, struct aha_ccb *)); 103 struct aha_ccb *aha_get_ccb __P((struct aha_softc *, int)); 104 struct aha_ccb *aha_ccb_phys_kv __P((struct aha_softc *, u_long)); 105 void aha_queue_ccb __P((struct aha_softc *, struct aha_ccb *)); 106 void aha_collect_mbo __P((struct aha_softc *)); 107 void aha_start_ccbs __P((struct aha_softc *)); 108 void aha_done __P((struct aha_softc *, struct aha_ccb *)); 109 int aha_init __P((struct aha_softc *)); 110 void aha_inquire_setup_information __P((struct aha_softc *)); 111 void ahaminphys __P((struct buf *)); 112 int aha_scsi_cmd __P((struct scsipi_xfer *)); 113 int aha_poll __P((struct aha_softc *, struct scsipi_xfer *, int)); 114 void aha_timeout __P((void *arg)); 115 int aha_create_ccbs __P((struct aha_softc *, struct aha_ccb *, int)); 116 117 /* the below structure is so we have a default dev struct for out link struct */ 118 struct scsipi_device aha_dev = { 119 NULL, /* Use default error handler */ 120 NULL, /* have a queue, served by this */ 121 NULL, /* have no async handler */ 122 NULL, /* Use default 'done' routine */ 123 }; 124 125 #define AHA_RESET_TIMEOUT 2000 /* time to wait for reset (mSec) */ 126 #define AHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */ 127 128 /* 129 * aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf) 130 * 131 * Activate Adapter command 132 * icnt: number of args (outbound bytes including opcode) 133 * ibuf: argument buffer 134 * ocnt: number of expected returned bytes 135 * obuf: result buffer 136 * wait: number of seconds to wait for response 137 * 138 * Performs an adapter command through the ports. Not to be confused with a 139 * scsi command, which is read in via the dma; one of the adapter commands 140 * tells it to read in a scsi command. 141 */ 142 int 143 aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf) 144 bus_space_tag_t iot; 145 bus_space_handle_t ioh; 146 struct aha_softc *sc; 147 int icnt, ocnt; 148 u_char *ibuf, *obuf; 149 { 150 const char *name; 151 register int i; 152 int wait; 153 u_char sts; 154 u_char opcode = ibuf[0]; 155 156 if (sc != NULL) 157 name = sc->sc_dev.dv_xname; 158 else 159 name = "(aha probe)"; 160 161 /* 162 * Calculate a reasonable timeout for the command. 163 */ 164 switch (opcode) { 165 case AHA_INQUIRE_DEVICES: 166 wait = 90 * 20000; 167 break; 168 default: 169 wait = 1 * 20000; 170 break; 171 } 172 173 /* 174 * Wait for the adapter to go idle, unless it's one of 175 * the commands which don't need this 176 */ 177 if (opcode != AHA_MBO_INTR_EN) { 178 for (i = 20000; i; i--) { /* 1 sec? */ 179 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); 180 if (sts & AHA_STAT_IDLE) 181 break; 182 delay(50); 183 } 184 if (!i) { 185 printf("%s: aha_cmd, host not idle(0x%x)\n", 186 name, sts); 187 return (1); 188 } 189 } 190 /* 191 * Now that it is idle, if we expect output, preflush the 192 * queue feeding to us. 193 */ 194 if (ocnt) { 195 while ((bus_space_read_1(iot, ioh, AHA_STAT_PORT)) & AHA_STAT_DF) 196 bus_space_read_1(iot, ioh, AHA_DATA_PORT); 197 } 198 /* 199 * Output the command and the number of arguments given 200 * for each byte, first check the port is empty. 201 */ 202 while (icnt--) { 203 for (i = wait; i; i--) { 204 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); 205 if (!(sts & AHA_STAT_CDF)) 206 break; 207 delay(50); 208 } 209 if (!i) { 210 if (opcode != AHA_INQUIRE_REVISION) 211 printf("%s: aha_cmd, cmd/data port full\n", name); 212 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST); 213 return (1); 214 } 215 bus_space_write_1(iot, ioh, AHA_CMD_PORT, *ibuf++); 216 } 217 /* 218 * If we expect input, loop that many times, each time, 219 * looking for the data register to have valid data 220 */ 221 while (ocnt--) { 222 for (i = wait; i; i--) { 223 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); 224 if (sts & AHA_STAT_DF) 225 break; 226 delay(50); 227 } 228 if (!i) { 229 if (opcode != AHA_INQUIRE_REVISION) 230 printf("%s: aha_cmd, cmd/data port empty %d\n", 231 name, ocnt); 232 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST); 233 return (1); 234 } 235 *obuf++ = bus_space_read_1(iot, ioh, AHA_DATA_PORT); 236 } 237 /* 238 * Wait for the board to report a finished instruction. 239 * We may get an extra interrupt for the HACC signal, but this is 240 * unimportant. 241 */ 242 if (opcode != AHA_MBO_INTR_EN) { 243 for (i = 20000; i; i--) { /* 1 sec? */ 244 sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT); 245 /* XXX Need to save this in the interrupt handler? */ 246 if (sts & AHA_INTR_HACC) 247 break; 248 delay(50); 249 } 250 if (!i) { 251 printf("%s: aha_cmd, host not finished(0x%x)\n", 252 name, sts); 253 return (1); 254 } 255 } 256 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST); 257 return (0); 258 } 259 260 void 261 aha_attach(sc, apd) 262 struct aha_softc *sc; 263 struct aha_probe_data *apd; 264 { 265 266 TAILQ_INIT(&sc->sc_free_ccb); 267 TAILQ_INIT(&sc->sc_waiting_ccb); 268 TAILQ_INIT(&sc->sc_queue); 269 270 /* 271 * Fill in the adapter. 272 */ 273 sc->sc_adapter.scsipi_cmd = aha_scsi_cmd; 274 sc->sc_adapter.scsipi_minphys = ahaminphys; 275 276 /* 277 * fill in the prototype scsipi_link. 278 */ 279 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 280 sc->sc_link.adapter_softc = sc; 281 sc->sc_link.scsipi_scsi.adapter_target = apd->sc_scsi_dev; 282 sc->sc_link.adapter = &sc->sc_adapter; 283 sc->sc_link.device = &aha_dev; 284 sc->sc_link.openings = 2; 285 sc->sc_link.scsipi_scsi.max_target = 7; 286 sc->sc_link.scsipi_scsi.max_lun = 7; 287 sc->sc_link.type = BUS_SCSI; 288 289 aha_inquire_setup_information(sc); 290 if (aha_init(sc) != 0) { 291 /* Error during initialization! */ 292 return; 293 } 294 295 /* 296 * ask the adapter what subunits are present 297 */ 298 config_found(&sc->sc_dev, &sc->sc_link, scsiprint); 299 } 300 301 integrate void 302 aha_finish_ccbs(sc) 303 struct aha_softc *sc; 304 { 305 struct aha_mbx_in *wmbi; 306 struct aha_ccb *ccb; 307 int i; 308 309 wmbi = wmbx->tmbi; 310 311 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 312 AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in), 313 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 314 315 if (wmbi->stat == AHA_MBI_FREE) { 316 for (i = 0; i < AHA_MBX_SIZE; i++) { 317 if (wmbi->stat != AHA_MBI_FREE) { 318 printf("%s: mbi not in round-robin order\n", 319 sc->sc_dev.dv_xname); 320 goto AGAIN; 321 } 322 aha_nextmbx(wmbi, wmbx, mbi); 323 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 324 AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in), 325 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 326 } 327 #ifdef AHADIAGnot 328 printf("%s: mbi interrupt with no full mailboxes\n", 329 sc->sc_dev.dv_xname); 330 #endif 331 return; 332 } 333 334 AGAIN: 335 do { 336 ccb = aha_ccb_phys_kv(sc, phystol(wmbi->ccb_addr)); 337 if (!ccb) { 338 printf("%s: bad mbi ccb pointer; skipping\n", 339 sc->sc_dev.dv_xname); 340 goto next; 341 } 342 343 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 344 AHA_CCB_OFF(ccb), sizeof(struct aha_ccb), 345 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 346 347 #ifdef AHADEBUG 348 if (aha_debug) { 349 u_char *cp = &ccb->scsi_cmd; 350 printf("op=%x %x %x %x %x %x\n", 351 cp[0], cp[1], cp[2], cp[3], cp[4], cp[5]); 352 printf("stat %x for mbi addr = 0x%08x, ", 353 wmbi->stat, wmbi); 354 printf("ccb addr = 0x%x\n", ccb); 355 } 356 #endif /* AHADEBUG */ 357 358 switch (wmbi->stat) { 359 case AHA_MBI_OK: 360 case AHA_MBI_ERROR: 361 if ((ccb->flags & CCB_ABORT) != 0) { 362 /* 363 * If we already started an abort, wait for it 364 * to complete before clearing the CCB. We 365 * could instead just clear CCB_SENDING, but 366 * what if the mailbox was already received? 367 * The worst that happens here is that we clear 368 * the CCB a bit later than we need to. BFD. 369 */ 370 goto next; 371 } 372 break; 373 374 case AHA_MBI_ABORT: 375 case AHA_MBI_UNKNOWN: 376 /* 377 * Even if the CCB wasn't found, we clear it anyway. 378 * See preceeding comment. 379 */ 380 break; 381 382 default: 383 printf("%s: bad mbi status %02x; skipping\n", 384 sc->sc_dev.dv_xname, wmbi->stat); 385 goto next; 386 } 387 388 callout_stop(&ccb->xs->xs_callout); 389 aha_done(sc, ccb); 390 391 next: 392 wmbi->stat = AHA_MBI_FREE; 393 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 394 AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in), 395 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 396 aha_nextmbx(wmbi, wmbx, mbi); 397 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 398 AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in), 399 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 400 } while (wmbi->stat != AHA_MBI_FREE); 401 402 wmbx->tmbi = wmbi; 403 } 404 405 /* 406 * Catch an interrupt from the adaptor 407 */ 408 int 409 aha_intr(arg) 410 void *arg; 411 { 412 struct aha_softc *sc = arg; 413 bus_space_tag_t iot = sc->sc_iot; 414 bus_space_handle_t ioh = sc->sc_ioh; 415 u_char sts; 416 417 #ifdef AHADEBUG 418 printf("%s: aha_intr ", sc->sc_dev.dv_xname); 419 #endif /*AHADEBUG */ 420 421 /* 422 * First acknowlege the interrupt, Then if it's not telling about 423 * a completed operation just return. 424 */ 425 sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT); 426 if ((sts & AHA_INTR_ANYINTR) == 0) 427 return (0); 428 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST); 429 430 #ifdef AHADIAG 431 /* Make sure we clear CCB_SENDING before finishing a CCB. */ 432 aha_collect_mbo(sc); 433 #endif 434 435 /* Mail box out empty? */ 436 if (sts & AHA_INTR_MBOA) { 437 struct aha_toggle toggle; 438 439 toggle.cmd.opcode = AHA_MBO_INTR_EN; 440 toggle.cmd.enable = 0; 441 aha_cmd(iot, ioh, sc, 442 sizeof(toggle.cmd), (u_char *)&toggle.cmd, 443 0, (u_char *)0); 444 aha_start_ccbs(sc); 445 } 446 447 /* Mail box in full? */ 448 if (sts & AHA_INTR_MBIF) 449 aha_finish_ccbs(sc); 450 451 return (1); 452 } 453 454 integrate void 455 aha_reset_ccb(sc, ccb) 456 struct aha_softc *sc; 457 struct aha_ccb *ccb; 458 { 459 460 ccb->flags = 0; 461 } 462 463 /* 464 * A ccb is put onto the free list. 465 */ 466 void 467 aha_free_ccb(sc, ccb) 468 struct aha_softc *sc; 469 struct aha_ccb *ccb; 470 { 471 int s; 472 473 s = splbio(); 474 475 aha_reset_ccb(sc, ccb); 476 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain); 477 478 /* 479 * If there were none, wake anybody waiting for one to come free, 480 * starting with queued entries. 481 */ 482 if (ccb->chain.tqe_next == 0) 483 wakeup(&sc->sc_free_ccb); 484 485 splx(s); 486 } 487 488 integrate int 489 aha_init_ccb(sc, ccb) 490 struct aha_softc *sc; 491 struct aha_ccb *ccb; 492 { 493 bus_dma_tag_t dmat = sc->sc_dmat; 494 int hashnum, error; 495 496 callout_init(&ccb->xs->xs_callout); 497 498 /* 499 * Create the DMA map for this CCB. 500 */ 501 error = bus_dmamap_create(dmat, AHA_MAXXFER, AHA_NSEG, AHA_MAXXFER, 502 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &ccb->dmamap_xfer); 503 if (error) { 504 printf("%s: unable to create ccb DMA map, error = %d\n", 505 sc->sc_dev.dv_xname, error); 506 return (error); 507 } 508 509 /* 510 * put in the phystokv hash table 511 * Never gets taken out. 512 */ 513 ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr + 514 AHA_CCB_OFF(ccb); 515 hashnum = CCB_HASH(ccb->hashkey); 516 ccb->nexthash = sc->sc_ccbhash[hashnum]; 517 sc->sc_ccbhash[hashnum] = ccb; 518 aha_reset_ccb(sc, ccb); 519 return (0); 520 } 521 522 /* 523 * Create a set of ccbs and add them to the free list. Called once 524 * by aha_init(). We return the number of CCBs successfully created. 525 */ 526 int 527 aha_create_ccbs(sc, ccbstore, count) 528 struct aha_softc *sc; 529 struct aha_ccb *ccbstore; 530 int count; 531 { 532 struct aha_ccb *ccb; 533 int i, error; 534 535 bzero(ccbstore, sizeof(struct aha_ccb) * count); 536 for (i = 0; i < count; i++) { 537 ccb = &ccbstore[i]; 538 if ((error = aha_init_ccb(sc, ccb)) != 0) { 539 printf("%s: unable to initialize ccb, error = %d\n", 540 sc->sc_dev.dv_xname, error); 541 goto out; 542 } 543 TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain); 544 } 545 out: 546 return (i); 547 } 548 549 /* 550 * Get a free ccb 551 * 552 * If there are none, see if we can allocate a new one. If so, put it in 553 * the hash table too otherwise either return an error or sleep. 554 */ 555 struct aha_ccb * 556 aha_get_ccb(sc, flags) 557 struct aha_softc *sc; 558 int flags; 559 { 560 struct aha_ccb *ccb; 561 int s; 562 563 s = splbio(); 564 565 /* 566 * If we can and have to, sleep waiting for one to come free 567 * but only if we can't allocate a new one. 568 */ 569 for (;;) { 570 ccb = sc->sc_free_ccb.tqh_first; 571 if (ccb) { 572 TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain); 573 break; 574 } 575 if ((flags & XS_CTL_NOSLEEP) != 0) 576 goto out; 577 tsleep(&sc->sc_free_ccb, PRIBIO, "ahaccb", 0); 578 } 579 580 ccb->flags |= CCB_ALLOC; 581 582 out: 583 splx(s); 584 return (ccb); 585 } 586 587 /* 588 * Given a physical address, find the ccb that it corresponds to. 589 */ 590 struct aha_ccb * 591 aha_ccb_phys_kv(sc, ccb_phys) 592 struct aha_softc *sc; 593 u_long ccb_phys; 594 { 595 int hashnum = CCB_HASH(ccb_phys); 596 struct aha_ccb *ccb = sc->sc_ccbhash[hashnum]; 597 598 while (ccb) { 599 if (ccb->hashkey == ccb_phys) 600 break; 601 ccb = ccb->nexthash; 602 } 603 return (ccb); 604 } 605 606 /* 607 * Queue a CCB to be sent to the controller, and send it if possible. 608 */ 609 void 610 aha_queue_ccb(sc, ccb) 611 struct aha_softc *sc; 612 struct aha_ccb *ccb; 613 { 614 615 TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain); 616 aha_start_ccbs(sc); 617 } 618 619 /* 620 * Garbage collect mailboxes that are no longer in use. 621 */ 622 void 623 aha_collect_mbo(sc) 624 struct aha_softc *sc; 625 { 626 struct aha_mbx_out *wmbo; /* Mail Box Out pointer */ 627 #ifdef AHADIAG 628 struct aha_ccb *ccb; 629 #endif 630 631 wmbo = wmbx->cmbo; 632 633 while (sc->sc_mbofull > 0) { 634 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 635 AHA_MBO_OFF(wmbo), sizeof(struct aha_mbx_out), 636 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 637 if (wmbo->cmd != AHA_MBO_FREE) 638 break; 639 640 #ifdef AHADIAG 641 ccb = aha_ccb_phys_kv(sc, phystol(wmbo->ccb_addr)); 642 ccb->flags &= ~CCB_SENDING; 643 #endif 644 645 --sc->sc_mbofull; 646 aha_nextmbx(wmbo, wmbx, mbo); 647 } 648 649 wmbx->cmbo = wmbo; 650 } 651 652 /* 653 * Send as many CCBs as we have empty mailboxes for. 654 */ 655 void 656 aha_start_ccbs(sc) 657 struct aha_softc *sc; 658 { 659 bus_space_tag_t iot = sc->sc_iot; 660 bus_space_handle_t ioh = sc->sc_ioh; 661 struct aha_mbx_out *wmbo; /* Mail Box Out pointer */ 662 struct aha_ccb *ccb; 663 664 wmbo = wmbx->tmbo; 665 666 while ((ccb = sc->sc_waiting_ccb.tqh_first) != NULL) { 667 if (sc->sc_mbofull >= AHA_MBX_SIZE) { 668 aha_collect_mbo(sc); 669 if (sc->sc_mbofull >= AHA_MBX_SIZE) { 670 struct aha_toggle toggle; 671 672 toggle.cmd.opcode = AHA_MBO_INTR_EN; 673 toggle.cmd.enable = 1; 674 aha_cmd(iot, ioh, sc, 675 sizeof(toggle.cmd), (u_char *)&toggle.cmd, 676 0, (u_char *)0); 677 break; 678 } 679 } 680 681 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain); 682 #ifdef AHADIAG 683 ccb->flags |= CCB_SENDING; 684 #endif 685 686 /* Link ccb to mbo. */ 687 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + 688 AHA_CCB_OFF(ccb), wmbo->ccb_addr); 689 if (ccb->flags & CCB_ABORT) 690 wmbo->cmd = AHA_MBO_ABORT; 691 else 692 wmbo->cmd = AHA_MBO_START; 693 694 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 695 AHA_MBO_OFF(wmbo), sizeof(struct aha_mbx_out), 696 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 697 698 /* Tell the card to poll immediately. */ 699 bus_space_write_1(iot, ioh, AHA_CMD_PORT, AHA_START_SCSI); 700 701 if ((ccb->xs->xs_control & XS_CTL_POLL) == 0) 702 callout_reset(&ccb->xs->xs_callout, 703 (ccb->timeout * hz) / 1000, aha_timeout, ccb); 704 705 ++sc->sc_mbofull; 706 aha_nextmbx(wmbo, wmbx, mbo); 707 } 708 709 wmbx->tmbo = wmbo; 710 } 711 712 /* 713 * We have a ccb which has been processed by the 714 * adaptor, now we look to see how the operation 715 * went. Wake up the owner if waiting 716 */ 717 void 718 aha_done(sc, ccb) 719 struct aha_softc *sc; 720 struct aha_ccb *ccb; 721 { 722 bus_dma_tag_t dmat = sc->sc_dmat; 723 struct scsipi_sense_data *s1, *s2; 724 struct scsipi_xfer *xs = ccb->xs; 725 726 SC_DEBUG(xs->sc_link, SDEV_DB2, ("aha_done\n")); 727 728 /* 729 * If we were a data transfer, unload the map that described 730 * the data buffer. 731 */ 732 if (xs->datalen) { 733 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0, 734 ccb->dmamap_xfer->dm_mapsize, 735 (xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMASYNC_POSTREAD : 736 BUS_DMASYNC_POSTWRITE); 737 bus_dmamap_unload(dmat, ccb->dmamap_xfer); 738 } 739 740 /* 741 * Otherwise, put the results of the operation 742 * into the xfer and call whoever started it 743 */ 744 #ifdef AHADIAG 745 if (ccb->flags & CCB_SENDING) { 746 printf("%s: exiting ccb still in transit!\n", sc->sc_dev.dv_xname); 747 Debugger(); 748 return; 749 } 750 #endif 751 if ((ccb->flags & CCB_ALLOC) == 0) { 752 printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname); 753 Debugger(); 754 return; 755 } 756 if (xs->error == XS_NOERROR) { 757 if (ccb->host_stat != AHA_OK) { 758 switch (ccb->host_stat) { 759 case AHA_SEL_TIMEOUT: /* No response */ 760 xs->error = XS_SELTIMEOUT; 761 break; 762 default: /* Other scsi protocol messes */ 763 printf("%s: host_stat %x\n", 764 sc->sc_dev.dv_xname, ccb->host_stat); 765 xs->error = XS_DRIVER_STUFFUP; 766 break; 767 } 768 } else if (ccb->target_stat != SCSI_OK) { 769 switch (ccb->target_stat) { 770 case SCSI_CHECK: 771 s1 = (struct scsipi_sense_data *) (((char *) (&ccb->scsi_cmd)) + 772 ccb->scsi_cmd_length); 773 s2 = &xs->sense.scsi_sense; 774 *s2 = *s1; 775 xs->error = XS_SENSE; 776 break; 777 case SCSI_BUSY: 778 xs->error = XS_BUSY; 779 break; 780 default: 781 printf("%s: target_stat %x\n", 782 sc->sc_dev.dv_xname, ccb->target_stat); 783 xs->error = XS_DRIVER_STUFFUP; 784 break; 785 } 786 } else 787 xs->resid = 0; 788 } 789 aha_free_ccb(sc, ccb); 790 xs->xs_status |= XS_STS_DONE; 791 scsipi_done(xs); 792 793 /* 794 * If there are queue entries in the software queue, try to 795 * run the first one. We should be more or less guaranteed 796 * to succeed, since we just freed a CCB. 797 * 798 * NOTE: aha_scsi_cmd() relies on our calling it with 799 * the first entry in the queue. 800 */ 801 if ((xs = TAILQ_FIRST(&sc->sc_queue)) != NULL) 802 (void) aha_scsi_cmd(xs); 803 } 804 805 /* 806 * Find the board and find its irq/drq 807 */ 808 int 809 aha_find(iot, ioh, sc) 810 bus_space_tag_t iot; 811 bus_space_handle_t ioh; 812 struct aha_probe_data *sc; 813 { 814 int i; 815 u_char sts; 816 struct aha_config config; 817 int irq, drq; 818 819 /* 820 * reset board, If it doesn't respond, assume 821 * that it's not there.. good for the probe 822 */ 823 824 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_HRST | AHA_CTRL_SRST); 825 826 delay(100); 827 for (i = AHA_RESET_TIMEOUT; i; i--) { 828 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); 829 if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT)) 830 break; 831 delay(1000); /* calibrated in msec */ 832 } 833 if (!i) { 834 #ifdef AHADEBUG 835 if (aha_debug) 836 printf("aha_find: No answer from adaptec board\n"); 837 #endif /* AHADEBUG */ 838 return (0); 839 } 840 841 /* 842 * setup dma channel from jumpers and save int 843 * level 844 */ 845 delay(1000); /* for Bustek 545 */ 846 config.cmd.opcode = AHA_INQUIRE_CONFIG; 847 aha_cmd(iot, ioh, (struct aha_softc *)0, 848 sizeof(config.cmd), (u_char *)&config.cmd, 849 sizeof(config.reply), (u_char *)&config.reply); 850 switch (config.reply.chan) { 851 case EISADMA: 852 drq = -1; 853 break; 854 case CHAN0: 855 drq = 0; 856 break; 857 case CHAN5: 858 drq = 5; 859 break; 860 case CHAN6: 861 drq = 6; 862 break; 863 case CHAN7: 864 drq = 7; 865 break; 866 default: 867 printf("aha_find: illegal drq setting %x\n", config.reply.chan); 868 return (0); 869 } 870 871 switch (config.reply.intr) { 872 case INT9: 873 irq = 9; 874 break; 875 case INT10: 876 irq = 10; 877 break; 878 case INT11: 879 irq = 11; 880 break; 881 case INT12: 882 irq = 12; 883 break; 884 case INT14: 885 irq = 14; 886 break; 887 case INT15: 888 irq = 15; 889 break; 890 default: 891 printf("aha_find: illegal irq setting %x\n", config.reply.intr); 892 return (0); 893 } 894 895 if (sc) { 896 sc->sc_irq = irq; 897 sc->sc_drq = drq; 898 sc->sc_scsi_dev = config.reply.scsi_dev; 899 } 900 901 return (1); 902 } 903 904 /* 905 * Start the board, ready for normal operation 906 */ 907 int 908 aha_init(sc) 909 struct aha_softc *sc; 910 { 911 bus_space_tag_t iot = sc->sc_iot; 912 bus_space_handle_t ioh = sc->sc_ioh; 913 bus_dma_segment_t seg; 914 struct aha_devices devices; 915 struct aha_setup setup; 916 struct aha_mailbox mailbox; 917 int error, i, j, initial_ccbs, rseg; 918 919 /* 920 * XXX 921 * If we are a 1542C or later, disable the extended BIOS so that the 922 * mailbox interface is unlocked. 923 * No need to check the extended BIOS flags as some of the 924 * extensions that cause us problems are not flagged in that byte. 925 */ 926 if (!strncmp(sc->sc_model, "1542C", 5)) { 927 struct aha_extbios extbios; 928 struct aha_unlock unlock; 929 930 printf("%s: unlocking mailbox interface\n", sc->sc_dev.dv_xname); 931 extbios.cmd.opcode = AHA_EXT_BIOS; 932 aha_cmd(iot, ioh, sc, 933 sizeof(extbios.cmd), (u_char *)&extbios.cmd, 934 sizeof(extbios.reply), (u_char *)&extbios.reply); 935 936 #ifdef AHADEBUG 937 printf("%s: flags=%02x, mailboxlock=%02x\n", 938 sc->sc_dev.dv_xname, 939 extbios.reply.flags, extbios.reply.mailboxlock); 940 #endif /* AHADEBUG */ 941 942 unlock.cmd.opcode = AHA_MBX_ENABLE; 943 unlock.cmd.junk = 0; 944 unlock.cmd.magic = extbios.reply.mailboxlock; 945 aha_cmd(iot, ioh, sc, 946 sizeof(unlock.cmd), (u_char *)&unlock.cmd, 947 0, (u_char *)0); 948 } 949 950 #if 0 951 /* 952 * Change the bus on/off times to not clash with other dma users. 953 */ 954 aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_ON_TIME_SET, 7); 955 aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_OFF_TIME_SET, 4); 956 #endif 957 958 /* Inquire Installed Devices (to force synchronous negotiation). */ 959 devices.cmd.opcode = AHA_INQUIRE_DEVICES; 960 aha_cmd(iot, ioh, sc, 961 sizeof(devices.cmd), (u_char *)&devices.cmd, 962 sizeof(devices.reply), (u_char *)&devices.reply); 963 964 /* Count installed units */ 965 initial_ccbs = 0; 966 for (i = 0; i < 8; i++) { 967 for (j = 0; j < 8; j++) { 968 if (((devices.reply.lun_map[i] >> j) & 1) == 1) 969 initial_ccbs += 1; 970 } 971 } 972 initial_ccbs *= sc->sc_link.openings; 973 if (initial_ccbs > AHA_CCB_MAX) 974 initial_ccbs = AHA_CCB_MAX; 975 if (initial_ccbs == 0) /* yes, this can happen */ 976 initial_ccbs = sc->sc_link.openings; 977 978 /* Obtain setup information from. */ 979 setup.cmd.opcode = AHA_INQUIRE_SETUP; 980 setup.cmd.len = sizeof(setup.reply); 981 aha_cmd(iot, ioh, sc, 982 sizeof(setup.cmd), (u_char *)&setup.cmd, 983 sizeof(setup.reply), (u_char *)&setup.reply); 984 985 printf("%s: %s, %s\n", 986 sc->sc_dev.dv_xname, 987 setup.reply.sync_neg ? "sync" : "async", 988 setup.reply.parity ? "parity" : "no parity"); 989 990 for (i = 0; i < 8; i++) { 991 if (!setup.reply.sync[i].valid || 992 (!setup.reply.sync[i].offset && !setup.reply.sync[i].period)) 993 continue; 994 printf("%s targ %d: sync, offset %d, period %dnsec\n", 995 sc->sc_dev.dv_xname, i, 996 setup.reply.sync[i].offset, setup.reply.sync[i].period * 50 + 200); 997 } 998 999 /* 1000 * Allocate the mailbox and control blocks. 1001 */ 1002 if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct aha_control), 1003 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 1004 printf("%s: unable to allocate control structures, " 1005 "error = %d\n", sc->sc_dev.dv_xname, error); 1006 return (error); 1007 } 1008 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 1009 sizeof(struct aha_control), (caddr_t *)&sc->sc_control, 1010 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 1011 printf("%s: unable to map control structures, error = %d\n", 1012 sc->sc_dev.dv_xname, error); 1013 return (error); 1014 } 1015 1016 /* 1017 * Create and load the DMA map used for the mailbox and 1018 * control blocks. 1019 */ 1020 if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct aha_control), 1021 1, sizeof(struct aha_control), 0, BUS_DMA_NOWAIT, 1022 &sc->sc_dmamap_control)) != 0) { 1023 printf("%s: unable to create control DMA map, error = %d\n", 1024 sc->sc_dev.dv_xname, error); 1025 return (error); 1026 } 1027 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control, 1028 sc->sc_control, sizeof(struct aha_control), NULL, 1029 BUS_DMA_NOWAIT)) != 0) { 1030 printf("%s: unable to load control DMA map, error = %d\n", 1031 sc->sc_dev.dv_xname, error); 1032 return (error); 1033 } 1034 1035 /* 1036 * Initialize the control blocks. 1037 */ 1038 i = aha_create_ccbs(sc, sc->sc_control->ac_ccbs, initial_ccbs); 1039 if (i == 0) { 1040 printf("%s: unable to create control blocks\n", 1041 sc->sc_dev.dv_xname); 1042 return (ENOMEM); 1043 } else if (i != initial_ccbs) { 1044 printf("%s: WARNING: only %d of %d control blocks created\n", 1045 sc->sc_dev.dv_xname, i, initial_ccbs); 1046 } 1047 1048 /* 1049 * Set up initial mail box for round-robin operation. 1050 */ 1051 for (i = 0; i < AHA_MBX_SIZE; i++) { 1052 wmbx->mbo[i].cmd = AHA_MBO_FREE; 1053 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 1054 AHA_MBO_OFF(&wmbx->mbo[i]), sizeof(struct aha_mbx_out), 1055 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1056 wmbx->mbi[i].stat = AHA_MBI_FREE; 1057 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 1058 AHA_MBI_OFF(&wmbx->mbi[i]), sizeof(struct aha_mbx_in), 1059 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1060 } 1061 wmbx->cmbo = wmbx->tmbo = &wmbx->mbo[0]; 1062 wmbx->tmbi = &wmbx->mbi[0]; 1063 sc->sc_mbofull = 0; 1064 1065 /* Initialize mail box. */ 1066 mailbox.cmd.opcode = AHA_MBX_INIT; 1067 mailbox.cmd.nmbx = AHA_MBX_SIZE; 1068 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + 1069 offsetof(struct aha_control, ac_mbx), mailbox.cmd.addr); 1070 aha_cmd(iot, ioh, sc, 1071 sizeof(mailbox.cmd), (u_char *)&mailbox.cmd, 1072 0, (u_char *)0); 1073 return (0); 1074 } 1075 1076 void 1077 aha_inquire_setup_information(sc) 1078 struct aha_softc *sc; 1079 { 1080 bus_space_tag_t iot = sc->sc_iot; 1081 bus_space_handle_t ioh = sc->sc_ioh; 1082 struct aha_revision revision; 1083 u_char sts; 1084 int i; 1085 char *p; 1086 1087 strcpy(sc->sc_model, "unknown"); 1088 1089 /* 1090 * Assume we have a board at this stage, do an adapter inquire 1091 * to find out what type of controller it is. If the command 1092 * fails, we assume it's either a crusty board or an old 1542 1093 * clone, and skip the board-specific stuff. 1094 */ 1095 revision.cmd.opcode = AHA_INQUIRE_REVISION; 1096 if (aha_cmd(iot, ioh, sc, 1097 sizeof(revision.cmd), (u_char *)&revision.cmd, 1098 sizeof(revision.reply), (u_char *)&revision.reply)) { 1099 /* 1100 * aha_cmd() already started the reset. It's not clear we 1101 * even need to bother here. 1102 */ 1103 for (i = AHA_RESET_TIMEOUT; i; i--) { 1104 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); 1105 if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT)) 1106 break; 1107 delay(1000); 1108 } 1109 if (!i) { 1110 #ifdef AHADEBUG 1111 printf("aha_init: soft reset failed\n"); 1112 #endif /* AHADEBUG */ 1113 return; 1114 } 1115 #ifdef AHADEBUG 1116 printf("aha_init: inquire command failed\n"); 1117 #endif /* AHADEBUG */ 1118 goto noinquire; 1119 } 1120 1121 #ifdef AHADEBUG 1122 printf("%s: inquire %x, %x, %x, %x\n", 1123 sc->sc_dev.dv_xname, 1124 revision.reply.boardid, revision.reply.spec_opts, 1125 revision.reply.revision_1, revision.reply.revision_2); 1126 #endif /* AHADEBUG */ 1127 1128 switch (revision.reply.boardid) { 1129 case BOARD_1540_16HEAD_BIOS: 1130 case BOARD_1540_64HEAD_BIOS: 1131 case BOARD_1540: 1132 strcpy(sc->sc_model, "1540"); 1133 break; 1134 case BOARD_1542: 1135 strcpy(sc->sc_model, "1540A/1542A/1542B"); 1136 break; 1137 case BOARD_1640: 1138 strcpy(sc->sc_model, "1640"); 1139 break; 1140 case BOARD_1740: 1141 strcpy(sc->sc_model, "1740"); 1142 break; 1143 case BOARD_1542C: 1144 strcpy(sc->sc_model, "1542C"); 1145 break; 1146 case BOARD_1542CF: 1147 strcpy(sc->sc_model, "1542CF"); 1148 break; 1149 case BOARD_1542CP: 1150 strcpy(sc->sc_model, "1542CP"); 1151 break; 1152 } 1153 1154 p = sc->sc_firmware; 1155 *p++ = revision.reply.revision_1; 1156 *p++ = '.'; 1157 *p++ = revision.reply.revision_2; 1158 *p = '\0'; 1159 1160 noinquire: 1161 printf("%s: model AHA-%s, firmware %s\n", 1162 sc->sc_dev.dv_xname, 1163 sc->sc_model, sc->sc_firmware); 1164 } 1165 1166 void 1167 ahaminphys(bp) 1168 struct buf *bp; 1169 { 1170 1171 if (bp->b_bcount > AHA_MAXXFER) 1172 bp->b_bcount = AHA_MAXXFER; 1173 minphys(bp); 1174 } 1175 1176 /* 1177 * start a scsi operation given the command and the data address. Also needs 1178 * the unit, target and lu. 1179 */ 1180 int 1181 aha_scsi_cmd(xs) 1182 struct scsipi_xfer *xs; 1183 { 1184 struct scsipi_link *sc_link = xs->sc_link; 1185 struct aha_softc *sc = sc_link->adapter_softc; 1186 bus_dma_tag_t dmat = sc->sc_dmat; 1187 struct aha_ccb *ccb; 1188 int error, seg, flags, s; 1189 int fromqueue = 0, dontqueue = 0, nowait = 0; 1190 1191 SC_DEBUG(sc_link, SDEV_DB2, ("aha_scsi_cmd\n")); 1192 1193 s = splbio(); /* protect the queue */ 1194 1195 /* 1196 * If we're running the queue from aha_done(), we've been 1197 * called with the first queue entry as our argument. 1198 */ 1199 if (xs == TAILQ_FIRST(&sc->sc_queue)) { 1200 TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q); 1201 fromqueue = 1; 1202 nowait = 1; 1203 goto get_ccb; 1204 } 1205 1206 /* Polled requests can't be queued for later. */ 1207 dontqueue = xs->xs_control & XS_CTL_POLL; 1208 1209 /* 1210 * If there are jobs in the queue, run them first. 1211 */ 1212 if (TAILQ_FIRST(&sc->sc_queue) != NULL) { 1213 /* 1214 * If we can't queue, we have to abort, since 1215 * we have to preserve order. 1216 */ 1217 if (dontqueue) { 1218 splx(s); 1219 xs->error = XS_DRIVER_STUFFUP; 1220 return (TRY_AGAIN_LATER); 1221 } 1222 1223 /* 1224 * Swap with the first queue entry. 1225 */ 1226 TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q); 1227 xs = TAILQ_FIRST(&sc->sc_queue); 1228 TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q); 1229 fromqueue = 1; 1230 } 1231 1232 get_ccb: 1233 /* 1234 * get a ccb to use. If the transfer 1235 * is from a buf (possibly from interrupt time) 1236 * then we can't allow it to sleep 1237 */ 1238 flags = xs->xs_control; 1239 if (nowait) 1240 flags |= XS_CTL_NOSLEEP; 1241 if ((ccb = aha_get_ccb(sc, flags)) == NULL) { 1242 /* 1243 * If we can't queue, we lose. 1244 */ 1245 if (dontqueue) { 1246 splx(s); 1247 xs->error = XS_DRIVER_STUFFUP; 1248 return (TRY_AGAIN_LATER); 1249 } 1250 1251 /* 1252 * Stuff ourselves into the queue, in front 1253 * if we came off in the first place. 1254 */ 1255 if (fromqueue) 1256 TAILQ_INSERT_HEAD(&sc->sc_queue, xs, adapter_q); 1257 else 1258 TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q); 1259 splx(s); 1260 return (SUCCESSFULLY_QUEUED); 1261 } 1262 1263 splx(s); /* done playing with the queue */ 1264 1265 ccb->xs = xs; 1266 ccb->timeout = xs->timeout; 1267 1268 /* 1269 * Put all the arguments for the xfer in the ccb 1270 */ 1271 if (flags & XS_CTL_RESET) { 1272 ccb->opcode = AHA_RESET_CCB; 1273 ccb->scsi_cmd_length = 0; 1274 } else { 1275 /* can't use S/G if zero length */ 1276 ccb->opcode = (xs->datalen ? AHA_INIT_SCAT_GATH_CCB 1277 : AHA_INITIATOR_CCB); 1278 bcopy(xs->cmd, &ccb->scsi_cmd, 1279 ccb->scsi_cmd_length = xs->cmdlen); 1280 } 1281 1282 if (xs->datalen) { 1283 /* 1284 * Map the DMA transfer. 1285 */ 1286 #ifdef TFS 1287 if (flags & XS_CTL_DATA_UIO) { 1288 error = bus_dmamap_load_uio(dmat, 1289 ccb->dmamap_xfer, (struct uio *)xs->data, 1290 (flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT : 1291 BUS_DMA_WAITOK); 1292 } else 1293 #endif 1294 { 1295 error = bus_dmamap_load(dmat, 1296 ccb->dmamap_xfer, xs->data, xs->datalen, NULL, 1297 (flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT : 1298 BUS_DMA_WAITOK); 1299 } 1300 1301 if (error) { 1302 if (error == EFBIG) { 1303 printf("%s: aha_scsi_cmd, more than %d" 1304 " dma segments\n", 1305 sc->sc_dev.dv_xname, AHA_NSEG); 1306 } else { 1307 printf("%s: aha_scsi_cmd, error %d loading" 1308 " dma map\n", 1309 sc->sc_dev.dv_xname, error); 1310 } 1311 goto bad; 1312 } 1313 1314 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0, 1315 ccb->dmamap_xfer->dm_mapsize, 1316 (flags & XS_CTL_DATA_IN) ? BUS_DMASYNC_PREREAD : 1317 BUS_DMASYNC_PREWRITE); 1318 1319 /* 1320 * Load the hardware scatter/gather map with the 1321 * contents of the DMA map. 1322 */ 1323 for (seg = 0; seg < ccb->dmamap_xfer->dm_nsegs; seg++) { 1324 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_addr, 1325 ccb->scat_gath[seg].seg_addr); 1326 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_len, 1327 ccb->scat_gath[seg].seg_len); 1328 } 1329 1330 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + 1331 AHA_CCB_OFF(ccb) + offsetof(struct aha_ccb, scat_gath), 1332 ccb->data_addr); 1333 ltophys(ccb->dmamap_xfer->dm_nsegs * 1334 sizeof(struct aha_scat_gath), ccb->data_length); 1335 } else { 1336 /* 1337 * No data xfer, use non S/G values. 1338 */ 1339 ltophys(0, ccb->data_addr); 1340 ltophys(0, ccb->data_length); 1341 } 1342 1343 ccb->data_out = 0; 1344 ccb->data_in = 0; 1345 ccb->target = sc_link->scsipi_scsi.target; 1346 ccb->lun = sc_link->scsipi_scsi.lun; 1347 ccb->req_sense_length = sizeof(ccb->scsi_sense); 1348 ccb->host_stat = 0x00; 1349 ccb->target_stat = 0x00; 1350 ccb->link_id = 0; 1351 ltophys(0, ccb->link_addr); 1352 1353 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 1354 AHA_CCB_OFF(ccb), sizeof(struct aha_ccb), 1355 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1356 1357 s = splbio(); 1358 aha_queue_ccb(sc, ccb); 1359 splx(s); 1360 1361 /* 1362 * Usually return SUCCESSFULLY QUEUED 1363 */ 1364 SC_DEBUG(sc_link, SDEV_DB3, ("cmd_sent\n")); 1365 if ((flags & XS_CTL_POLL) == 0) 1366 return (SUCCESSFULLY_QUEUED); 1367 1368 /* 1369 * If we can't use interrupts, poll on completion 1370 */ 1371 if (aha_poll(sc, xs, ccb->timeout)) { 1372 aha_timeout(ccb); 1373 if (aha_poll(sc, xs, ccb->timeout)) 1374 aha_timeout(ccb); 1375 } 1376 return (COMPLETE); 1377 1378 bad: 1379 xs->error = XS_DRIVER_STUFFUP; 1380 aha_free_ccb(sc, ccb); 1381 return (COMPLETE); 1382 } 1383 1384 /* 1385 * Poll a particular unit, looking for a particular xs 1386 */ 1387 int 1388 aha_poll(sc, xs, count) 1389 struct aha_softc *sc; 1390 struct scsipi_xfer *xs; 1391 int count; 1392 { 1393 bus_space_tag_t iot = sc->sc_iot; 1394 bus_space_handle_t ioh = sc->sc_ioh; 1395 1396 /* timeouts are in msec, so we loop in 1000 usec cycles */ 1397 while (count) { 1398 /* 1399 * If we had interrupts enabled, would we 1400 * have got an interrupt? 1401 */ 1402 if (bus_space_read_1(iot, ioh, AHA_INTR_PORT) & AHA_INTR_ANYINTR) 1403 aha_intr(sc); 1404 if (xs->xs_status & XS_STS_DONE) 1405 return (0); 1406 delay(1000); /* only happens in boot so ok */ 1407 count--; 1408 } 1409 return (1); 1410 } 1411 1412 void 1413 aha_timeout(arg) 1414 void *arg; 1415 { 1416 struct aha_ccb *ccb = arg; 1417 struct scsipi_xfer *xs = ccb->xs; 1418 struct scsipi_link *sc_link = xs->sc_link; 1419 struct aha_softc *sc = sc_link->adapter_softc; 1420 int s; 1421 1422 scsi_print_addr(sc_link); 1423 printf("timed out"); 1424 1425 s = splbio(); 1426 1427 #ifdef AHADIAG 1428 /* 1429 * If The ccb's mbx is not free, then the board has gone south? 1430 */ 1431 aha_collect_mbo(sc); 1432 if (ccb->flags & CCB_SENDING) { 1433 printf("%s: not taking commands!\n", sc->sc_dev.dv_xname); 1434 Debugger(); 1435 } 1436 #endif 1437 1438 /* 1439 * If it has been through before, then 1440 * a previous abort has failed, don't 1441 * try abort again 1442 */ 1443 if (ccb->flags & CCB_ABORT) { 1444 /* abort timed out */ 1445 printf(" AGAIN\n"); 1446 /* XXX Must reset! */ 1447 } else { 1448 /* abort the operation that has timed out */ 1449 printf("\n"); 1450 ccb->xs->error = XS_TIMEOUT; 1451 ccb->timeout = AHA_ABORT_TIMEOUT; 1452 ccb->flags |= CCB_ABORT; 1453 aha_queue_ccb(sc, ccb); 1454 } 1455 1456 splx(s); 1457 } 1458
Indexes created Tue Sep 23 07:09:52 GMT 2025