aha.c revision 1.31 1 /* $NetBSD: aha.c,v 1.31 2001/04/25 17:53:30 bouyer Exp $ */
2
3 #include "opt_ddb.h"
4
5 #undef AHADIAG
6 #ifdef DDB
7 #define integrate
8 #else
9 #define integrate static inline
10 #endif
11
12 /*-
13 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
14 * All rights reserved.
15 *
16 * This code is derived from software contributed to The NetBSD Foundation
17 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
18 * Simulation Facility, NASA Ames Research Center.
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 * 1. Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * 3. All advertising materials mentioning features or use of this software
29 * must display the following acknowledgement:
30 * This product includes software developed by the NetBSD
31 * Foundation, Inc. and its contributors.
32 * 4. Neither the name of The NetBSD Foundation nor the names of its
33 * contributors may be used to endorse or promote products derived
34 * from this software without specific prior written permission.
35 *
36 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
38 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
39 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
40 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
41 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
42 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
43 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
44 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
45 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
46 * POSSIBILITY OF SUCH DAMAGE.
47 */
48
49 /*
50 * Originally written by Julian Elischer (julian (at) tfs.com)
51 * for TRW Financial Systems for use under the MACH(2.5) operating system.
52 *
53 * TRW Financial Systems, in accordance with their agreement with Carnegie
54 * Mellon University, makes this software available to CMU to distribute
55 * or use in any manner that they see fit as long as this message is kept with
56 * the software. For this reason TFS also grants any other persons or
57 * organisations permission to use or modify this software.
58 *
59 * TFS supplies this software to be publicly redistributed
60 * on the understanding that TFS is not responsible for the correct
61 * functioning of this software in any circumstances.
62 */
63
64 #include <sys/types.h>
65 #include <sys/param.h>
66 #include <sys/systm.h>
67 #include <sys/callout.h>
68 #include <sys/kernel.h>
69 #include <sys/errno.h>
70 #include <sys/ioctl.h>
71 #include <sys/device.h>
72 #include <sys/malloc.h>
73 #include <sys/buf.h>
74 #include <sys/proc.h>
75 #include <sys/user.h>
76
77 #include <uvm/uvm_extern.h>
78
79 #include <machine/bus.h>
80 #include <machine/intr.h>
81
82 #include <dev/scsipi/scsi_all.h>
83 #include <dev/scsipi/scsipi_all.h>
84 #include <dev/scsipi/scsiconf.h>
85
86 #include <dev/ic/ahareg.h>
87 #include <dev/ic/ahavar.h>
88
89 #ifndef DDB
90 #define Debugger() panic("should call debugger here (aha1542.c)")
91 #endif /* ! DDB */
92
93 #define AHA_MAXXFER ((AHA_NSEG - 1) << PGSHIFT)
94
95 #ifdef AHADEBUG
96 int aha_debug = 1;
97 #endif /* AHADEBUG */
98
99 int aha_cmd __P((bus_space_tag_t, bus_space_handle_t, struct aha_softc *, int,
100 u_char *, int, u_char *));
101 integrate void aha_finish_ccbs __P((struct aha_softc *));
102 integrate void aha_reset_ccb __P((struct aha_softc *, struct aha_ccb *));
103 void aha_free_ccb __P((struct aha_softc *, struct aha_ccb *));
104 integrate int aha_init_ccb __P((struct aha_softc *, struct aha_ccb *));
105 struct aha_ccb *aha_get_ccb __P((struct aha_softc *));
106 struct aha_ccb *aha_ccb_phys_kv __P((struct aha_softc *, u_long));
107 void aha_queue_ccb __P((struct aha_softc *, struct aha_ccb *));
108 void aha_collect_mbo __P((struct aha_softc *));
109 void aha_start_ccbs __P((struct aha_softc *));
110 void aha_done __P((struct aha_softc *, struct aha_ccb *));
111 int aha_init __P((struct aha_softc *));
112 void aha_inquire_setup_information __P((struct aha_softc *));
113 void ahaminphys __P((struct buf *));
114 void aha_scsipi_request __P((struct scsipi_channel *,
115 scsipi_adapter_req_t, void *));
116 int aha_poll __P((struct aha_softc *, struct scsipi_xfer *, int));
117 void aha_timeout __P((void *arg));
118 int aha_create_ccbs __P((struct aha_softc *, struct aha_ccb *, int));
119
120 #define AHA_RESET_TIMEOUT 2000 /* time to wait for reset (mSec) */
121 #define AHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */
122
123 /*
124 * aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf)
125 *
126 * Activate Adapter command
127 * icnt: number of args (outbound bytes including opcode)
128 * ibuf: argument buffer
129 * ocnt: number of expected returned bytes
130 * obuf: result buffer
131 * wait: number of seconds to wait for response
132 *
133 * Performs an adapter command through the ports. Not to be confused with a
134 * scsi command, which is read in via the dma; one of the adapter commands
135 * tells it to read in a scsi command.
136 */
137 int
138 aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf)
139 bus_space_tag_t iot;
140 bus_space_handle_t ioh;
141 struct aha_softc *sc;
142 int icnt, ocnt;
143 u_char *ibuf, *obuf;
144 {
145 const char *name;
146 int i;
147 int wait;
148 u_char sts;
149 u_char opcode = ibuf[0];
150
151 if (sc != NULL)
152 name = sc->sc_dev.dv_xname;
153 else
154 name = "(aha probe)";
155
156 /*
157 * Calculate a reasonable timeout for the command.
158 */
159 switch (opcode) {
160 case AHA_INQUIRE_DEVICES:
161 wait = 90 * 20000;
162 break;
163 default:
164 wait = 1 * 20000;
165 break;
166 }
167
168 /*
169 * Wait for the adapter to go idle, unless it's one of
170 * the commands which don't need this
171 */
172 if (opcode != AHA_MBO_INTR_EN) {
173 for (i = 20000; i; i--) { /* 1 sec? */
174 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
175 if (sts & AHA_STAT_IDLE)
176 break;
177 delay(50);
178 }
179 if (!i) {
180 printf("%s: aha_cmd, host not idle(0x%x)\n",
181 name, sts);
182 return (1);
183 }
184 }
185 /*
186 * Now that it is idle, if we expect output, preflush the
187 * queue feeding to us.
188 */
189 if (ocnt) {
190 while ((bus_space_read_1(iot, ioh, AHA_STAT_PORT)) & AHA_STAT_DF)
191 bus_space_read_1(iot, ioh, AHA_DATA_PORT);
192 }
193 /*
194 * Output the command and the number of arguments given
195 * for each byte, first check the port is empty.
196 */
197 while (icnt--) {
198 for (i = wait; i; i--) {
199 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
200 if (!(sts & AHA_STAT_CDF))
201 break;
202 delay(50);
203 }
204 if (!i) {
205 if (opcode != AHA_INQUIRE_REVISION)
206 printf("%s: aha_cmd, cmd/data port full\n", name);
207 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST);
208 return (1);
209 }
210 bus_space_write_1(iot, ioh, AHA_CMD_PORT, *ibuf++);
211 }
212 /*
213 * If we expect input, loop that many times, each time,
214 * looking for the data register to have valid data
215 */
216 while (ocnt--) {
217 for (i = wait; i; i--) {
218 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
219 if (sts & AHA_STAT_DF)
220 break;
221 delay(50);
222 }
223 if (!i) {
224 if (opcode != AHA_INQUIRE_REVISION)
225 printf("%s: aha_cmd, cmd/data port empty %d\n",
226 name, ocnt);
227 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST);
228 return (1);
229 }
230 *obuf++ = bus_space_read_1(iot, ioh, AHA_DATA_PORT);
231 }
232 /*
233 * Wait for the board to report a finished instruction.
234 * We may get an extra interrupt for the HACC signal, but this is
235 * unimportant.
236 */
237 if (opcode != AHA_MBO_INTR_EN) {
238 for (i = 20000; i; i--) { /* 1 sec? */
239 sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT);
240 /* XXX Need to save this in the interrupt handler? */
241 if (sts & AHA_INTR_HACC)
242 break;
243 delay(50);
244 }
245 if (!i) {
246 printf("%s: aha_cmd, host not finished(0x%x)\n",
247 name, sts);
248 return (1);
249 }
250 }
251 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST);
252 return (0);
253 }
254
255 void
256 aha_attach(sc, apd)
257 struct aha_softc *sc;
258 struct aha_probe_data *apd;
259 {
260 struct scsipi_adapter *adapt = &sc->sc_adapter;
261 struct scsipi_channel *chan = &sc->sc_channel;
262
263 TAILQ_INIT(&sc->sc_free_ccb);
264 TAILQ_INIT(&sc->sc_waiting_ccb);
265
266 /*
267 * Fill in the scsipi_adapter.
268 */
269 memset(adapt, 0, sizeof(*adapt));
270 adapt->adapt_dev = &sc->sc_dev;
271 adapt->adapt_nchannels = 1;
272 /* adapt_openings initialized below */
273 /* adapt_max_periph initialized below */
274 adapt->adapt_request = aha_scsipi_request;
275 adapt->adapt_minphys = ahaminphys;
276
277 /*
278 * Fill in the scsipi_channel.
279 */
280 memset(chan, 0, sizeof(*chan));
281 chan->chan_adapter = adapt;
282 chan->chan_channel = 0;
283 chan->chan_ntargets = 8;
284 chan->chan_nluns = 8;
285 chan->chan_id = apd->sc_scsi_dev;
286
287 aha_inquire_setup_information(sc);
288 if (aha_init(sc) != 0) {
289 /* Error during initialization! */
290 return;
291 }
292
293 /*
294 * ask the adapter what subunits are present
295 */
296 config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
297 }
298
299 integrate void
300 aha_finish_ccbs(sc)
301 struct aha_softc *sc;
302 {
303 struct aha_mbx_in *wmbi;
304 struct aha_ccb *ccb;
305 int i;
306
307 wmbi = wmbx->tmbi;
308
309 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
310 AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in),
311 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
312
313 if (wmbi->stat == AHA_MBI_FREE) {
314 for (i = 0; i < AHA_MBX_SIZE; i++) {
315 if (wmbi->stat != AHA_MBI_FREE) {
316 printf("%s: mbi not in round-robin order\n",
317 sc->sc_dev.dv_xname);
318 goto AGAIN;
319 }
320 aha_nextmbx(wmbi, wmbx, mbi);
321 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
322 AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in),
323 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
324 }
325 #ifdef AHADIAGnot
326 printf("%s: mbi interrupt with no full mailboxes\n",
327 sc->sc_dev.dv_xname);
328 #endif
329 return;
330 }
331
332 AGAIN:
333 do {
334 ccb = aha_ccb_phys_kv(sc, phystol(wmbi->ccb_addr));
335 if (!ccb) {
336 printf("%s: bad mbi ccb pointer; skipping\n",
337 sc->sc_dev.dv_xname);
338 goto next;
339 }
340
341 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
342 AHA_CCB_OFF(ccb), sizeof(struct aha_ccb),
343 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
344
345 #ifdef AHADEBUG
346 if (aha_debug) {
347 u_char *cp = &ccb->scsi_cmd;
348 printf("op=%x %x %x %x %x %x\n",
349 cp[0], cp[1], cp[2], cp[3], cp[4], cp[5]);
350 printf("stat %x for mbi addr = 0x%08x, ",
351 wmbi->stat, wmbi);
352 printf("ccb addr = 0x%x\n", ccb);
353 }
354 #endif /* AHADEBUG */
355
356 switch (wmbi->stat) {
357 case AHA_MBI_OK:
358 case AHA_MBI_ERROR:
359 if ((ccb->flags & CCB_ABORT) != 0) {
360 /*
361 * If we already started an abort, wait for it
362 * to complete before clearing the CCB. We
363 * could instead just clear CCB_SENDING, but
364 * what if the mailbox was already received?
365 * The worst that happens here is that we clear
366 * the CCB a bit later than we need to. BFD.
367 */
368 goto next;
369 }
370 break;
371
372 case AHA_MBI_ABORT:
373 case AHA_MBI_UNKNOWN:
374 /*
375 * Even if the CCB wasn't found, we clear it anyway.
376 * See preceeding comment.
377 */
378 break;
379
380 default:
381 printf("%s: bad mbi status %02x; skipping\n",
382 sc->sc_dev.dv_xname, wmbi->stat);
383 goto next;
384 }
385
386 callout_stop(&ccb->xs->xs_callout);
387 aha_done(sc, ccb);
388
389 next:
390 wmbi->stat = AHA_MBI_FREE;
391 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
392 AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in),
393 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
394 aha_nextmbx(wmbi, wmbx, mbi);
395 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
396 AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in),
397 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
398 } while (wmbi->stat != AHA_MBI_FREE);
399
400 wmbx->tmbi = wmbi;
401 }
402
403 /*
404 * Catch an interrupt from the adaptor
405 */
406 int
407 aha_intr(arg)
408 void *arg;
409 {
410 struct aha_softc *sc = arg;
411 bus_space_tag_t iot = sc->sc_iot;
412 bus_space_handle_t ioh = sc->sc_ioh;
413 u_char sts;
414
415 #ifdef AHADEBUG
416 printf("%s: aha_intr ", sc->sc_dev.dv_xname);
417 #endif /*AHADEBUG */
418
419 /*
420 * First acknowlege the interrupt, Then if it's not telling about
421 * a completed operation just return.
422 */
423 sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT);
424 if ((sts & AHA_INTR_ANYINTR) == 0)
425 return (0);
426 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST);
427
428 #ifdef AHADIAG
429 /* Make sure we clear CCB_SENDING before finishing a CCB. */
430 aha_collect_mbo(sc);
431 #endif
432
433 /* Mail box out empty? */
434 if (sts & AHA_INTR_MBOA) {
435 struct aha_toggle toggle;
436
437 toggle.cmd.opcode = AHA_MBO_INTR_EN;
438 toggle.cmd.enable = 0;
439 aha_cmd(iot, ioh, sc,
440 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
441 0, (u_char *)0);
442 aha_start_ccbs(sc);
443 }
444
445 /* Mail box in full? */
446 if (sts & AHA_INTR_MBIF)
447 aha_finish_ccbs(sc);
448
449 return (1);
450 }
451
452 integrate void
453 aha_reset_ccb(sc, ccb)
454 struct aha_softc *sc;
455 struct aha_ccb *ccb;
456 {
457
458 ccb->flags = 0;
459 }
460
461 /*
462 * A ccb is put onto the free list.
463 */
464 void
465 aha_free_ccb(sc, ccb)
466 struct aha_softc *sc;
467 struct aha_ccb *ccb;
468 {
469 int s;
470
471 s = splbio();
472 aha_reset_ccb(sc, ccb);
473 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
474 splx(s);
475 }
476
477 integrate int
478 aha_init_ccb(sc, ccb)
479 struct aha_softc *sc;
480 struct aha_ccb *ccb;
481 {
482 bus_dma_tag_t dmat = sc->sc_dmat;
483 int hashnum, error;
484
485 /*
486 * Create the DMA map for this CCB.
487 */
488 error = bus_dmamap_create(dmat, AHA_MAXXFER, AHA_NSEG, AHA_MAXXFER,
489 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &ccb->dmamap_xfer);
490 if (error) {
491 printf("%s: unable to create ccb DMA map, error = %d\n",
492 sc->sc_dev.dv_xname, error);
493 return (error);
494 }
495
496 /*
497 * put in the phystokv hash table
498 * Never gets taken out.
499 */
500 ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr +
501 AHA_CCB_OFF(ccb);
502 hashnum = CCB_HASH(ccb->hashkey);
503 ccb->nexthash = sc->sc_ccbhash[hashnum];
504 sc->sc_ccbhash[hashnum] = ccb;
505 aha_reset_ccb(sc, ccb);
506 return (0);
507 }
508
509 /*
510 * Create a set of ccbs and add them to the free list. Called once
511 * by aha_init(). We return the number of CCBs successfully created.
512 */
513 int
514 aha_create_ccbs(sc, ccbstore, count)
515 struct aha_softc *sc;
516 struct aha_ccb *ccbstore;
517 int count;
518 {
519 struct aha_ccb *ccb;
520 int i, error;
521
522 bzero(ccbstore, sizeof(struct aha_ccb) * count);
523 for (i = 0; i < count; i++) {
524 ccb = &ccbstore[i];
525 if ((error = aha_init_ccb(sc, ccb)) != 0) {
526 printf("%s: unable to initialize ccb, error = %d\n",
527 sc->sc_dev.dv_xname, error);
528 goto out;
529 }
530 TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain);
531 }
532 out:
533 return (i);
534 }
535
536 /*
537 * Get a free ccb
538 *
539 * If there are none, see if we can allocate a new one. If so, put it in
540 * the hash table too otherwise either return an error or sleep.
541 */
542 struct aha_ccb *
543 aha_get_ccb(sc)
544 struct aha_softc *sc;
545 {
546 struct aha_ccb *ccb;
547 int s;
548
549 s = splbio();
550 ccb = TAILQ_FIRST(&sc->sc_free_ccb);
551 if (ccb != NULL) {
552 TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
553 ccb->flags |= CCB_ALLOC;
554 }
555 splx(s);
556 return (ccb);
557 }
558
559 /*
560 * Given a physical address, find the ccb that it corresponds to.
561 */
562 struct aha_ccb *
563 aha_ccb_phys_kv(sc, ccb_phys)
564 struct aha_softc *sc;
565 u_long ccb_phys;
566 {
567 int hashnum = CCB_HASH(ccb_phys);
568 struct aha_ccb *ccb = sc->sc_ccbhash[hashnum];
569
570 while (ccb) {
571 if (ccb->hashkey == ccb_phys)
572 break;
573 ccb = ccb->nexthash;
574 }
575 return (ccb);
576 }
577
578 /*
579 * Queue a CCB to be sent to the controller, and send it if possible.
580 */
581 void
582 aha_queue_ccb(sc, ccb)
583 struct aha_softc *sc;
584 struct aha_ccb *ccb;
585 {
586
587 TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
588 aha_start_ccbs(sc);
589 }
590
591 /*
592 * Garbage collect mailboxes that are no longer in use.
593 */
594 void
595 aha_collect_mbo(sc)
596 struct aha_softc *sc;
597 {
598 struct aha_mbx_out *wmbo; /* Mail Box Out pointer */
599 #ifdef AHADIAG
600 struct aha_ccb *ccb;
601 #endif
602
603 wmbo = wmbx->cmbo;
604
605 while (sc->sc_mbofull > 0) {
606 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
607 AHA_MBO_OFF(wmbo), sizeof(struct aha_mbx_out),
608 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
609 if (wmbo->cmd != AHA_MBO_FREE)
610 break;
611
612 #ifdef AHADIAG
613 ccb = aha_ccb_phys_kv(sc, phystol(wmbo->ccb_addr));
614 ccb->flags &= ~CCB_SENDING;
615 #endif
616
617 --sc->sc_mbofull;
618 aha_nextmbx(wmbo, wmbx, mbo);
619 }
620
621 wmbx->cmbo = wmbo;
622 }
623
624 /*
625 * Send as many CCBs as we have empty mailboxes for.
626 */
627 void
628 aha_start_ccbs(sc)
629 struct aha_softc *sc;
630 {
631 bus_space_tag_t iot = sc->sc_iot;
632 bus_space_handle_t ioh = sc->sc_ioh;
633 struct aha_mbx_out *wmbo; /* Mail Box Out pointer */
634 struct aha_ccb *ccb;
635
636 wmbo = wmbx->tmbo;
637
638 while ((ccb = sc->sc_waiting_ccb.tqh_first) != NULL) {
639 if (sc->sc_mbofull >= AHA_MBX_SIZE) {
640 aha_collect_mbo(sc);
641 if (sc->sc_mbofull >= AHA_MBX_SIZE) {
642 struct aha_toggle toggle;
643
644 toggle.cmd.opcode = AHA_MBO_INTR_EN;
645 toggle.cmd.enable = 1;
646 aha_cmd(iot, ioh, sc,
647 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
648 0, (u_char *)0);
649 break;
650 }
651 }
652
653 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
654 #ifdef AHADIAG
655 ccb->flags |= CCB_SENDING;
656 #endif
657
658 /* Link ccb to mbo. */
659 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
660 AHA_CCB_OFF(ccb), wmbo->ccb_addr);
661 if (ccb->flags & CCB_ABORT)
662 wmbo->cmd = AHA_MBO_ABORT;
663 else
664 wmbo->cmd = AHA_MBO_START;
665
666 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
667 AHA_MBO_OFF(wmbo), sizeof(struct aha_mbx_out),
668 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
669
670 /* Tell the card to poll immediately. */
671 bus_space_write_1(iot, ioh, AHA_CMD_PORT, AHA_START_SCSI);
672
673 if ((ccb->xs->xs_control & XS_CTL_POLL) == 0)
674 callout_reset(&ccb->xs->xs_callout,
675 (ccb->timeout * hz) / 1000, aha_timeout, ccb);
676
677 ++sc->sc_mbofull;
678 aha_nextmbx(wmbo, wmbx, mbo);
679 }
680
681 wmbx->tmbo = wmbo;
682 }
683
684 /*
685 * We have a ccb which has been processed by the
686 * adaptor, now we look to see how the operation
687 * went. Wake up the owner if waiting
688 */
689 void
690 aha_done(sc, ccb)
691 struct aha_softc *sc;
692 struct aha_ccb *ccb;
693 {
694 bus_dma_tag_t dmat = sc->sc_dmat;
695 struct scsipi_sense_data *s1, *s2;
696 struct scsipi_xfer *xs = ccb->xs;
697
698 SC_DEBUG(xs->xs_periph, SCSIPI_DB2, ("aha_done\n"));
699
700 /*
701 * If we were a data transfer, unload the map that described
702 * the data buffer.
703 */
704 if (xs->datalen) {
705 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
706 ccb->dmamap_xfer->dm_mapsize,
707 (xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMASYNC_POSTREAD :
708 BUS_DMASYNC_POSTWRITE);
709 bus_dmamap_unload(dmat, ccb->dmamap_xfer);
710 }
711
712 /*
713 * Otherwise, put the results of the operation
714 * into the xfer and call whoever started it
715 */
716 #ifdef AHADIAG
717 if (ccb->flags & CCB_SENDING) {
718 printf("%s: exiting ccb still in transit!\n", sc->sc_dev.dv_xname);
719 Debugger();
720 return;
721 }
722 #endif
723 if ((ccb->flags & CCB_ALLOC) == 0) {
724 printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname);
725 Debugger();
726 return;
727 }
728 if (xs->error == XS_NOERROR) {
729 if (ccb->host_stat != AHA_OK) {
730 switch (ccb->host_stat) {
731 case AHA_SEL_TIMEOUT: /* No response */
732 xs->error = XS_SELTIMEOUT;
733 break;
734 default: /* Other scsi protocol messes */
735 printf("%s: host_stat %x\n",
736 sc->sc_dev.dv_xname, ccb->host_stat);
737 xs->error = XS_DRIVER_STUFFUP;
738 break;
739 }
740 } else if (ccb->target_stat != SCSI_OK) {
741 switch (ccb->target_stat) {
742 case SCSI_CHECK:
743 s1 = (struct scsipi_sense_data *) (((char *) (&ccb->scsi_cmd)) +
744 ccb->scsi_cmd_length);
745 s2 = &xs->sense.scsi_sense;
746 *s2 = *s1;
747 xs->error = XS_SENSE;
748 break;
749 case SCSI_BUSY:
750 xs->error = XS_BUSY;
751 break;
752 default:
753 printf("%s: target_stat %x\n",
754 sc->sc_dev.dv_xname, ccb->target_stat);
755 xs->error = XS_DRIVER_STUFFUP;
756 break;
757 }
758 } else
759 xs->resid = 0;
760 }
761 aha_free_ccb(sc, ccb);
762 scsipi_done(xs);
763 }
764
765 /*
766 * Find the board and find its irq/drq
767 */
768 int
769 aha_find(iot, ioh, sc)
770 bus_space_tag_t iot;
771 bus_space_handle_t ioh;
772 struct aha_probe_data *sc;
773 {
774 int i;
775 u_char sts;
776 struct aha_config config;
777 int irq, drq;
778
779 /*
780 * reset board, If it doesn't respond, assume
781 * that it's not there.. good for the probe
782 */
783
784 bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_HRST | AHA_CTRL_SRST);
785
786 delay(100);
787 for (i = AHA_RESET_TIMEOUT; i; i--) {
788 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
789 if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT))
790 break;
791 delay(1000); /* calibrated in msec */
792 }
793 if (!i) {
794 #ifdef AHADEBUG
795 if (aha_debug)
796 printf("aha_find: No answer from adaptec board\n");
797 #endif /* AHADEBUG */
798 return (0);
799 }
800
801 /*
802 * setup dma channel from jumpers and save int
803 * level
804 */
805 delay(1000); /* for Bustek 545 */
806 config.cmd.opcode = AHA_INQUIRE_CONFIG;
807 aha_cmd(iot, ioh, (struct aha_softc *)0,
808 sizeof(config.cmd), (u_char *)&config.cmd,
809 sizeof(config.reply), (u_char *)&config.reply);
810 switch (config.reply.chan) {
811 case EISADMA:
812 drq = -1;
813 break;
814 case CHAN0:
815 drq = 0;
816 break;
817 case CHAN5:
818 drq = 5;
819 break;
820 case CHAN6:
821 drq = 6;
822 break;
823 case CHAN7:
824 drq = 7;
825 break;
826 default:
827 printf("aha_find: illegal drq setting %x\n", config.reply.chan);
828 return (0);
829 }
830
831 switch (config.reply.intr) {
832 case INT9:
833 irq = 9;
834 break;
835 case INT10:
836 irq = 10;
837 break;
838 case INT11:
839 irq = 11;
840 break;
841 case INT12:
842 irq = 12;
843 break;
844 case INT14:
845 irq = 14;
846 break;
847 case INT15:
848 irq = 15;
849 break;
850 default:
851 printf("aha_find: illegal irq setting %x\n", config.reply.intr);
852 return (0);
853 }
854
855 if (sc) {
856 sc->sc_irq = irq;
857 sc->sc_drq = drq;
858 sc->sc_scsi_dev = config.reply.scsi_dev;
859 }
860
861 return (1);
862 }
863
864 /*
865 * Start the board, ready for normal operation
866 */
867 int
868 aha_init(sc)
869 struct aha_softc *sc;
870 {
871 bus_space_tag_t iot = sc->sc_iot;
872 bus_space_handle_t ioh = sc->sc_ioh;
873 bus_dma_segment_t seg;
874 struct aha_devices devices;
875 struct aha_setup setup;
876 struct aha_mailbox mailbox;
877 int error, i, j, initial_ccbs, rseg;
878
879 /*
880 * XXX
881 * If we are a 1542C or later, disable the extended BIOS so that the
882 * mailbox interface is unlocked.
883 * No need to check the extended BIOS flags as some of the
884 * extensions that cause us problems are not flagged in that byte.
885 */
886 if (!strncmp(sc->sc_model, "1542C", 5)) {
887 struct aha_extbios extbios;
888 struct aha_unlock unlock;
889
890 printf("%s: unlocking mailbox interface\n", sc->sc_dev.dv_xname);
891 extbios.cmd.opcode = AHA_EXT_BIOS;
892 aha_cmd(iot, ioh, sc,
893 sizeof(extbios.cmd), (u_char *)&extbios.cmd,
894 sizeof(extbios.reply), (u_char *)&extbios.reply);
895
896 #ifdef AHADEBUG
897 printf("%s: flags=%02x, mailboxlock=%02x\n",
898 sc->sc_dev.dv_xname,
899 extbios.reply.flags, extbios.reply.mailboxlock);
900 #endif /* AHADEBUG */
901
902 unlock.cmd.opcode = AHA_MBX_ENABLE;
903 unlock.cmd.junk = 0;
904 unlock.cmd.magic = extbios.reply.mailboxlock;
905 aha_cmd(iot, ioh, sc,
906 sizeof(unlock.cmd), (u_char *)&unlock.cmd,
907 0, (u_char *)0);
908 }
909
910 #if 0
911 /*
912 * Change the bus on/off times to not clash with other dma users.
913 */
914 aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_ON_TIME_SET, 7);
915 aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_OFF_TIME_SET, 4);
916 #endif
917
918 /* Inquire Installed Devices (to force synchronous negotiation). */
919 devices.cmd.opcode = AHA_INQUIRE_DEVICES;
920 aha_cmd(iot, ioh, sc,
921 sizeof(devices.cmd), (u_char *)&devices.cmd,
922 sizeof(devices.reply), (u_char *)&devices.reply);
923
924 /* Count installed units */
925 initial_ccbs = 0;
926 for (i = 0; i < 8; i++) {
927 for (j = 0; j < 8; j++) {
928 if (((devices.reply.lun_map[i] >> j) & 1) == 1)
929 initial_ccbs += 1;
930 }
931 }
932 initial_ccbs *= 2;
933 if (initial_ccbs > AHA_CCB_MAX)
934 initial_ccbs = AHA_CCB_MAX;
935 if (initial_ccbs == 0) /* yes, this can happen */
936 initial_ccbs = 2;
937
938 /* Obtain setup information from. */
939 setup.cmd.opcode = AHA_INQUIRE_SETUP;
940 setup.cmd.len = sizeof(setup.reply);
941 aha_cmd(iot, ioh, sc,
942 sizeof(setup.cmd), (u_char *)&setup.cmd,
943 sizeof(setup.reply), (u_char *)&setup.reply);
944
945 printf("%s: %s, %s\n",
946 sc->sc_dev.dv_xname,
947 setup.reply.sync_neg ? "sync" : "async",
948 setup.reply.parity ? "parity" : "no parity");
949
950 for (i = 0; i < 8; i++) {
951 if (!setup.reply.sync[i].valid ||
952 (!setup.reply.sync[i].offset && !setup.reply.sync[i].period))
953 continue;
954 printf("%s targ %d: sync, offset %d, period %dnsec\n",
955 sc->sc_dev.dv_xname, i,
956 setup.reply.sync[i].offset, setup.reply.sync[i].period * 50 + 200);
957 }
958
959 /*
960 * Allocate the mailbox and control blocks.
961 */
962 if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct aha_control),
963 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
964 printf("%s: unable to allocate control structures, "
965 "error = %d\n", sc->sc_dev.dv_xname, error);
966 return (error);
967 }
968 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
969 sizeof(struct aha_control), (caddr_t *)&sc->sc_control,
970 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
971 printf("%s: unable to map control structures, error = %d\n",
972 sc->sc_dev.dv_xname, error);
973 return (error);
974 }
975
976 /*
977 * Create and load the DMA map used for the mailbox and
978 * control blocks.
979 */
980 if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct aha_control),
981 1, sizeof(struct aha_control), 0, BUS_DMA_NOWAIT,
982 &sc->sc_dmamap_control)) != 0) {
983 printf("%s: unable to create control DMA map, error = %d\n",
984 sc->sc_dev.dv_xname, error);
985 return (error);
986 }
987 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control,
988 sc->sc_control, sizeof(struct aha_control), NULL,
989 BUS_DMA_NOWAIT)) != 0) {
990 printf("%s: unable to load control DMA map, error = %d\n",
991 sc->sc_dev.dv_xname, error);
992 return (error);
993 }
994
995 /*
996 * Initialize the control blocks.
997 */
998 i = aha_create_ccbs(sc, sc->sc_control->ac_ccbs, initial_ccbs);
999 if (i == 0) {
1000 printf("%s: unable to create control blocks\n",
1001 sc->sc_dev.dv_xname);
1002 return (ENOMEM);
1003 } else if (i != initial_ccbs) {
1004 printf("%s: WARNING: only %d of %d control blocks created\n",
1005 sc->sc_dev.dv_xname, i, initial_ccbs);
1006 }
1007
1008 sc->sc_adapter.adapt_openings = i;
1009 sc->sc_adapter.adapt_max_periph = sc->sc_adapter.adapt_openings;
1010
1011 /*
1012 * Set up initial mail box for round-robin operation.
1013 */
1014 for (i = 0; i < AHA_MBX_SIZE; i++) {
1015 wmbx->mbo[i].cmd = AHA_MBO_FREE;
1016 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
1017 AHA_MBO_OFF(&wmbx->mbo[i]), sizeof(struct aha_mbx_out),
1018 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1019 wmbx->mbi[i].stat = AHA_MBI_FREE;
1020 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
1021 AHA_MBI_OFF(&wmbx->mbi[i]), sizeof(struct aha_mbx_in),
1022 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1023 }
1024 wmbx->cmbo = wmbx->tmbo = &wmbx->mbo[0];
1025 wmbx->tmbi = &wmbx->mbi[0];
1026 sc->sc_mbofull = 0;
1027
1028 /* Initialize mail box. */
1029 mailbox.cmd.opcode = AHA_MBX_INIT;
1030 mailbox.cmd.nmbx = AHA_MBX_SIZE;
1031 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
1032 offsetof(struct aha_control, ac_mbx), mailbox.cmd.addr);
1033 aha_cmd(iot, ioh, sc,
1034 sizeof(mailbox.cmd), (u_char *)&mailbox.cmd,
1035 0, (u_char *)0);
1036 return (0);
1037 }
1038
1039 void
1040 aha_inquire_setup_information(sc)
1041 struct aha_softc *sc;
1042 {
1043 bus_space_tag_t iot = sc->sc_iot;
1044 bus_space_handle_t ioh = sc->sc_ioh;
1045 struct aha_revision revision;
1046 u_char sts;
1047 int i;
1048 char *p;
1049
1050 strcpy(sc->sc_model, "unknown");
1051
1052 /*
1053 * Assume we have a board at this stage, do an adapter inquire
1054 * to find out what type of controller it is. If the command
1055 * fails, we assume it's either a crusty board or an old 1542
1056 * clone, and skip the board-specific stuff.
1057 */
1058 revision.cmd.opcode = AHA_INQUIRE_REVISION;
1059 if (aha_cmd(iot, ioh, sc,
1060 sizeof(revision.cmd), (u_char *)&revision.cmd,
1061 sizeof(revision.reply), (u_char *)&revision.reply)) {
1062 /*
1063 * aha_cmd() already started the reset. It's not clear we
1064 * even need to bother here.
1065 */
1066 for (i = AHA_RESET_TIMEOUT; i; i--) {
1067 sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
1068 if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT))
1069 break;
1070 delay(1000);
1071 }
1072 if (!i) {
1073 #ifdef AHADEBUG
1074 printf("aha_init: soft reset failed\n");
1075 #endif /* AHADEBUG */
1076 return;
1077 }
1078 #ifdef AHADEBUG
1079 printf("aha_init: inquire command failed\n");
1080 #endif /* AHADEBUG */
1081 goto noinquire;
1082 }
1083
1084 #ifdef AHADEBUG
1085 printf("%s: inquire %x, %x, %x, %x\n",
1086 sc->sc_dev.dv_xname,
1087 revision.reply.boardid, revision.reply.spec_opts,
1088 revision.reply.revision_1, revision.reply.revision_2);
1089 #endif /* AHADEBUG */
1090
1091 switch (revision.reply.boardid) {
1092 case BOARD_1540_16HEAD_BIOS:
1093 case BOARD_1540_64HEAD_BIOS:
1094 case BOARD_1540:
1095 strcpy(sc->sc_model, "1540");
1096 break;
1097 case BOARD_1542:
1098 strcpy(sc->sc_model, "1540A/1542A/1542B");
1099 break;
1100 case BOARD_1640:
1101 strcpy(sc->sc_model, "1640");
1102 break;
1103 case BOARD_1740:
1104 strcpy(sc->sc_model, "1740");
1105 break;
1106 case BOARD_1542C:
1107 strcpy(sc->sc_model, "1542C");
1108 break;
1109 case BOARD_1542CF:
1110 strcpy(sc->sc_model, "1542CF");
1111 break;
1112 case BOARD_1542CP:
1113 strcpy(sc->sc_model, "1542CP");
1114 break;
1115 }
1116
1117 p = sc->sc_firmware;
1118 *p++ = revision.reply.revision_1;
1119 *p++ = '.';
1120 *p++ = revision.reply.revision_2;
1121 *p = '\0';
1122
1123 noinquire:
1124 printf("%s: model AHA-%s, firmware %s\n",
1125 sc->sc_dev.dv_xname,
1126 sc->sc_model, sc->sc_firmware);
1127 }
1128
1129 void
1130 ahaminphys(bp)
1131 struct buf *bp;
1132 {
1133
1134 if (bp->b_bcount > AHA_MAXXFER)
1135 bp->b_bcount = AHA_MAXXFER;
1136 minphys(bp);
1137 }
1138
1139 /*
1140 * start a scsi operation given the command and the data address. Also needs
1141 * the unit, target and lu.
1142 */
1143
1144 void
1145 aha_scsipi_request(chan, req, arg)
1146 struct scsipi_channel *chan;
1147 scsipi_adapter_req_t req;
1148 void *arg;
1149 {
1150 struct scsipi_xfer *xs;
1151 struct scsipi_periph *periph;
1152 struct aha_softc *sc = (void *)chan->chan_adapter->adapt_dev;
1153 bus_dma_tag_t dmat = sc->sc_dmat;
1154 struct aha_ccb *ccb;
1155 int error, seg, flags, s;
1156
1157
1158 switch (req) {
1159 case ADAPTER_REQ_RUN_XFER:
1160 xs = arg;
1161 periph = xs->xs_periph;
1162 flags = xs->xs_control;
1163
1164 SC_DEBUG(periph, SCSIPI_DB2, ("aha_scsipi_request\n"));
1165
1166 /* Get a CCB to use. */
1167 ccb = aha_get_ccb(sc);
1168 #ifdef DIAGNOSTIC
1169 /*
1170 * This should never happen as we track the resources
1171 * in the mid-layer.
1172 */
1173 if (ccb == NULL) {
1174 scsipi_printaddr(periph);
1175 printf("unable to allocate ccb\n");
1176 panic("aha_scsipi_request");
1177 }
1178 #endif
1179
1180 ccb->xs = xs;
1181 ccb->timeout = xs->timeout;
1182
1183 /*
1184 * Put all the arguments for the xfer in the ccb
1185 */
1186 if (flags & XS_CTL_RESET) {
1187 ccb->opcode = AHA_RESET_CCB;
1188 ccb->scsi_cmd_length = 0;
1189 } else {
1190 /* can't use S/G if zero length */
1191 ccb->opcode = (xs->datalen ? AHA_INIT_SCAT_GATH_CCB
1192 : AHA_INITIATOR_CCB);
1193 bcopy(xs->cmd, &ccb->scsi_cmd,
1194 ccb->scsi_cmd_length = xs->cmdlen);
1195 }
1196
1197 if (xs->datalen) {
1198 /*
1199 * Map the DMA transfer.
1200 */
1201 #ifdef TFS
1202 if (flags & XS_CTL_DATA_UIO) {
1203 error = bus_dmamap_load_uio(dmat,
1204 ccb->dmamap_xfer, (struct uio *)xs->data,
1205 ((flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
1206 BUS_DMA_WAITOK) | BUS_DMA_STREAMING);
1207 } else
1208 #endif
1209 {
1210 error = bus_dmamap_load(dmat,
1211 ccb->dmamap_xfer, xs->data, xs->datalen,
1212 NULL,
1213 ((flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
1214 BUS_DMA_WAITOK) | BUS_DMA_STREAMING);
1215 }
1216
1217 switch (error) {
1218 case 0:
1219 break;
1220
1221 case ENOMEM:
1222 case EAGAIN:
1223 xs->error = XS_RESOURCE_SHORTAGE;
1224 goto out_bad;
1225
1226 default:
1227 xs->error = XS_DRIVER_STUFFUP;
1228 if (error == EFBIG) {
1229 printf("%s: aha_scsi_cmd, more than %d"
1230 " dma segments\n",
1231 sc->sc_dev.dv_xname, AHA_NSEG);
1232 } else {
1233 printf("%s: error %d loading DMA map\n",
1234 sc->sc_dev.dv_xname, error);
1235 }
1236 out_bad:
1237 aha_free_ccb(sc, ccb);
1238 scsipi_done(xs);
1239 return;
1240 }
1241
1242 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
1243 ccb->dmamap_xfer->dm_mapsize,
1244 (flags & XS_CTL_DATA_IN) ? BUS_DMASYNC_PREREAD :
1245 BUS_DMASYNC_PREWRITE);
1246
1247 /*
1248 * Load the hardware scatter/gather map with the
1249 * contents of the DMA map.
1250 */
1251 for (seg = 0; seg < ccb->dmamap_xfer->dm_nsegs; seg++) {
1252 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_addr,
1253 ccb->scat_gath[seg].seg_addr);
1254 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_len,
1255 ccb->scat_gath[seg].seg_len);
1256 }
1257
1258 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
1259 AHA_CCB_OFF(ccb) +
1260 offsetof(struct aha_ccb, scat_gath),
1261 ccb->data_addr);
1262 ltophys(ccb->dmamap_xfer->dm_nsegs *
1263 sizeof(struct aha_scat_gath), ccb->data_length);
1264 } else {
1265 /*
1266 * No data xfer, use non S/G values.
1267 */
1268 ltophys(0, ccb->data_addr);
1269 ltophys(0, ccb->data_length);
1270 }
1271
1272 ccb->data_out = 0;
1273 ccb->data_in = 0;
1274 ccb->target = periph->periph_target;
1275 ccb->lun = periph->periph_lun;
1276 ccb->req_sense_length = sizeof(ccb->scsi_sense);
1277 ccb->host_stat = 0x00;
1278 ccb->target_stat = 0x00;
1279 ccb->link_id = 0;
1280 ltophys(0, ccb->link_addr);
1281
1282 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
1283 AHA_CCB_OFF(ccb), sizeof(struct aha_ccb),
1284 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1285
1286 s = splbio();
1287 aha_queue_ccb(sc, ccb);
1288 splx(s);
1289
1290 SC_DEBUG(periph, SCSIPI_DB3, ("cmd_sent\n"));
1291 if ((flags & XS_CTL_POLL) == 0)
1292 return;
1293
1294 /* Not allowed to use interrupts, poll for completion. */
1295 if (aha_poll(sc, xs, ccb->timeout)) {
1296 aha_timeout(ccb);
1297 if (aha_poll(sc, xs, ccb->timeout))
1298 aha_timeout(ccb);
1299 }
1300 return;
1301
1302 case ADAPTER_REQ_GROW_RESOURCES:
1303 /* XXX Not supported. */
1304 return;
1305
1306 case ADAPTER_REQ_SET_XFER_MODE:
1307 /*
1308 * Can't really do this on the Adaptec; it has
1309 * its own config mechanism, but we do know how
1310 * to query what the firmware negotiated.
1311 */
1312 /* XXX XXX XXX */
1313 return;
1314 }
1315 }
1316
1317 /*
1318 * Poll a particular unit, looking for a particular xs
1319 */
1320 int
1321 aha_poll(sc, xs, count)
1322 struct aha_softc *sc;
1323 struct scsipi_xfer *xs;
1324 int count;
1325 {
1326 bus_space_tag_t iot = sc->sc_iot;
1327 bus_space_handle_t ioh = sc->sc_ioh;
1328
1329 /* timeouts are in msec, so we loop in 1000 usec cycles */
1330 while (count) {
1331 /*
1332 * If we had interrupts enabled, would we
1333 * have got an interrupt?
1334 */
1335 if (bus_space_read_1(iot, ioh, AHA_INTR_PORT) & AHA_INTR_ANYINTR)
1336 aha_intr(sc);
1337 if (xs->xs_status & XS_STS_DONE)
1338 return (0);
1339 delay(1000); /* only happens in boot so ok */
1340 count--;
1341 }
1342 return (1);
1343 }
1344
1345 void
1346 aha_timeout(arg)
1347 void *arg;
1348 {
1349 struct aha_ccb *ccb = arg;
1350 struct scsipi_xfer *xs = ccb->xs;
1351 struct scsipi_periph *periph = xs->xs_periph;
1352 struct aha_softc *sc =
1353 (void *)periph->periph_channel->chan_adapter->adapt_dev;
1354 int s;
1355
1356 scsipi_printaddr(periph);
1357 printf("timed out");
1358
1359 s = splbio();
1360
1361 #ifdef AHADIAG
1362 /*
1363 * If The ccb's mbx is not free, then the board has gone south?
1364 */
1365 aha_collect_mbo(sc);
1366 if (ccb->flags & CCB_SENDING) {
1367 printf("%s: not taking commands!\n", sc->sc_dev.dv_xname);
1368 Debugger();
1369 }
1370 #endif
1371
1372 /*
1373 * If it has been through before, then
1374 * a previous abort has failed, don't
1375 * try abort again
1376 */
1377 if (ccb->flags & CCB_ABORT) {
1378 /* abort timed out */
1379 printf(" AGAIN\n");
1380 /* XXX Must reset! */
1381 } else {
1382 /* abort the operation that has timed out */
1383 printf("\n");
1384 ccb->xs->error = XS_TIMEOUT;
1385 ccb->timeout = AHA_ABORT_TIMEOUT;
1386 ccb->flags |= CCB_ABORT;
1387 aha_queue_ccb(sc, ccb);
1388 }
1389
1390 splx(s);
1391 }
1392