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ahcisatavar.h revision 1.4.22.1
      1  1.4.22.1     matt /*	$NetBSD: ahcisatavar.h,v 1.4.22.1 2014/03/24 18:47:17 matt Exp $	*/
      2       1.1   bouyer 
      3       1.1   bouyer /*
      4       1.1   bouyer  * Copyright (c) 2006 Manuel Bouyer.
      5       1.1   bouyer  *
      6       1.1   bouyer  * Redistribution and use in source and binary forms, with or without
      7       1.1   bouyer  * modification, are permitted provided that the following conditions
      8       1.1   bouyer  * are met:
      9       1.1   bouyer  * 1. Redistributions of source code must retain the above copyright
     10       1.1   bouyer  *    notice, this list of conditions and the following disclaimer.
     11       1.1   bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     12       1.1   bouyer  *    notice, this list of conditions and the following disclaimer in the
     13       1.1   bouyer  *    documentation and/or other materials provided with the distribution.
     14       1.1   bouyer  *
     15       1.1   bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16       1.1   bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17       1.1   bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18       1.1   bouyer  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19       1.1   bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     20       1.1   bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     21       1.1   bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     22       1.1   bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     23       1.1   bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     24       1.1   bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     25       1.1   bouyer  *
     26       1.1   bouyer  */
     27       1.1   bouyer 
     28       1.1   bouyer #include <dev/ic/ahcisatareg.h>
     29       1.1   bouyer 
     30       1.1   bouyer #define AHCI_DEBUG
     31       1.1   bouyer 
     32       1.1   bouyer #define DEBUG_INTR   0x01
     33       1.1   bouyer #define DEBUG_XFERS  0x02
     34       1.1   bouyer #define DEBUG_FUNCS  0x08
     35       1.1   bouyer #define DEBUG_PROBE  0x10
     36       1.1   bouyer #define DEBUG_DETACH 0x20
     37       1.1   bouyer #ifdef AHCI_DEBUG
     38       1.1   bouyer extern int ahcidebug_mask;
     39       1.1   bouyer #define AHCIDEBUG_PRINT(args, level) \
     40       1.1   bouyer         if (ahcidebug_mask & (level)) \
     41       1.1   bouyer 		printf args
     42       1.1   bouyer #else
     43       1.1   bouyer #define AHCIDEBUG_PRINT(args, level)
     44       1.1   bouyer #endif
     45       1.1   bouyer 
     46       1.1   bouyer struct ahci_softc {
     47       1.1   bouyer 	struct atac_softc sc_atac;
     48       1.1   bouyer 	bus_space_tag_t sc_ahcit; /* ahci registers mapping */
     49       1.1   bouyer 	bus_space_handle_t sc_ahcih;
     50  1.4.22.1     matt 	bus_size_t sc_ahcis;
     51       1.1   bouyer 	bus_dma_tag_t sc_dmat; /* DMA memory mappings: */
     52       1.1   bouyer 	void *sc_cmd_hdr; /* command tables and received FIS */
     53       1.1   bouyer 	bus_dmamap_t sc_cmd_hdrd;
     54  1.4.22.1     matt 	bus_dma_segment_t sc_cmd_hdr_seg;
     55  1.4.22.1     matt 	int sc_cmd_hdr_nseg;
     56       1.3  xtraeme 	int sc_atac_capflags;
     57       1.1   bouyer 
     58  1.4.22.1     matt 	uint32_t sc_ahci_cap;	/* copy of AHCI_CAP */
     59       1.1   bouyer 	int sc_ncmds; /* number of command slots */
     60  1.4.22.1     matt 	uint32_t sc_ahci_ports;
     61       1.1   bouyer 	struct ata_channel *sc_chanarray[AHCI_MAX_PORTS];
     62       1.1   bouyer 	struct ahci_channel {
     63       1.1   bouyer 		struct ata_channel ata_channel; /* generic part */
     64       1.1   bouyer 		bus_space_handle_t ahcic_scontrol;
     65       1.1   bouyer 		bus_space_handle_t ahcic_sstatus;
     66       1.1   bouyer 		bus_space_handle_t ahcic_serror;
     67       1.1   bouyer 		/* pointers allocated from sc_cmd_hdrd */
     68       1.1   bouyer 		struct ahci_r_fis *ahcic_rfis; /* received FIS */
     69       1.1   bouyer 		bus_addr_t ahcic_bus_rfis;
     70       1.1   bouyer 		struct ahci_cmd_header *ahcic_cmdh; /* command headers */
     71       1.1   bouyer 		bus_addr_t ahcic_bus_cmdh;
     72       1.1   bouyer 		/* command tables (allocated per-channel) */
     73       1.1   bouyer 		bus_dmamap_t ahcic_cmd_tbld;
     74  1.4.22.1     matt 		bus_dma_segment_t ahcic_cmd_tbl_seg;
     75  1.4.22.1     matt 		int ahcic_cmd_tbl_nseg;
     76       1.1   bouyer 		struct ahci_cmd_tbl *ahcic_cmd_tbl[AHCI_MAX_CMDS];
     77       1.1   bouyer 		bus_addr_t ahcic_bus_cmd_tbl[AHCI_MAX_CMDS];
     78       1.1   bouyer 		bus_dmamap_t ahcic_datad[AHCI_MAX_CMDS];
     79  1.4.22.1     matt 		uint32_t  ahcic_cmds_active; /* active commands */
     80       1.1   bouyer 	} sc_channels[AHCI_MAX_PORTS];
     81  1.4.22.1     matt 
     82  1.4.22.1     matt 	void	(*sc_channel_start)(struct ahci_softc *, struct ata_channel *);
     83  1.4.22.1     matt 	void	(*sc_channel_stop)(struct ahci_softc *, struct ata_channel *);
     84  1.4.22.1     matt 
     85  1.4.22.1     matt 	bool sc_save_init_data;
     86  1.4.22.1     matt 	struct {
     87  1.4.22.1     matt 		uint32_t cap;
     88  1.4.22.1     matt 		uint32_t cap2;
     89  1.4.22.1     matt 		uint32_t ports;
     90  1.4.22.1     matt 	} sc_init_data;
     91       1.1   bouyer };
     92       1.1   bouyer 
     93       1.4     cube #define AHCINAME(sc) (device_xname((sc)->sc_atac.atac_dev))
     94       1.1   bouyer 
     95       1.1   bouyer #define AHCI_CMDH_SYNC(sc, achp, cmd, op) bus_dmamap_sync((sc)->sc_dmat, \
     96       1.1   bouyer     (sc)->sc_cmd_hdrd, \
     97       1.1   bouyer     (char *)(&(achp)->ahcic_cmdh[(cmd)]) - (char *)(sc)->sc_cmd_hdr, \
     98       1.1   bouyer     sizeof(struct ahci_cmd_header), (op))
     99       1.1   bouyer #define AHCI_RFIS_SYNC(sc, achp, op) bus_dmamap_sync((sc)->sc_dmat, \
    100       1.1   bouyer     (sc)->sc_cmd_hdrd, (void *)(achp)->ahcic_rfis - (sc)->sc_cmd_hdr, \
    101       1.1   bouyer     AHCI_RFIS_SIZE, (op))
    102       1.1   bouyer #define AHCI_CMDTBL_SYNC(sc, achp, cmd, op) bus_dmamap_sync((sc)->sc_dmat, \
    103       1.1   bouyer     (achp)->ahcic_cmd_tbld, AHCI_CMDTBL_SIZE * (cmd), \
    104       1.1   bouyer     AHCI_CMDTBL_SIZE, (op))
    105       1.1   bouyer 
    106       1.1   bouyer #define AHCI_READ(sc, reg) bus_space_read_4((sc)->sc_ahcit, \
    107       1.1   bouyer     (sc)->sc_ahcih, (reg))
    108       1.1   bouyer #define AHCI_WRITE(sc, reg, val) bus_space_write_4((sc)->sc_ahcit, \
    109       1.1   bouyer     (sc)->sc_ahcih, (reg), (val))
    110       1.1   bouyer 
    111       1.1   bouyer 
    112       1.1   bouyer void ahci_attach(struct ahci_softc *);
    113  1.4.22.1     matt int  ahci_detach(struct ahci_softc *, int);
    114  1.4.22.1     matt void ahci_resume(struct ahci_softc *);
    115       1.1   bouyer 
    116       1.1   bouyer int  ahci_intr(void *);
    117       1.2    joerg 
    118