aic6360.c revision 1.22 1 /* $NetBSD: aic6360.c,v 1.22 1994/12/31 05:34:00 mycroft Exp $ */
2
3 /*
4 * Copyright (c) 1994 Charles Hannum. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Charles Hannum.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * Copyright (c) 1994 Jarle Greipsland
21 * All rights reserved.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in the
30 * documentation and/or other materials provided with the distribution.
31 * 3. The name of the author may not be used to endorse or promote products
32 * derived from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
35 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
36 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
38 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
41 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
42 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
43 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
44 * POSSIBILITY OF SUCH DAMAGE.
45 */
46
47 /*
48 * Acknowledgements: Many of the algorithms used in this driver are
49 * inspired by the work of Julian Elischer (julian (at) tfs.com) and
50 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million!
51 */
52
53 /* TODO list:
54 * 1) Get the DMA stuff working.
55 * 2) Get the iov/uio stuff working. Is this a good thing ???
56 * 3) Get the synch stuff working.
57 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
58 */
59
60 /*
61 * A few customizable items:
62 */
63
64 /* The SCSI ID of the host adapter/computer */
65 #define AIC_SCSI_HOSTID 7
66
67 /* Use doubleword transfers to/from SCSI chip. Note: This requires
68 * motherboard support. Basicly, some motherboard chipsets are able to
69 * split a 32 bit I/O operation into two 16 bit I/O operations,
70 * transparently to the processor. This speeds up some things, notably long
71 * data transfers.
72 */
73 #define AIC_USE_DWORDS 0
74
75 /* Allow disconnects? Was mainly used in an early phase of the driver when
76 * the message system was very flaky. Should go away soon.
77 */
78 #define AIC_ALLOW_DISCONNECT 1
79
80 /* Synchronous data transfers? */
81 #define AIC_USE_SYNCHRONOUS 0
82 #define AIC_SYNC_PERIOD 200
83 #define AIC_SYNC_REQ_ACK_OFS 8
84
85 /* Wide data transfers? */
86 #define AIC_USE_WIDE 0
87 #define AIC_MAX_WIDTH 0
88
89 /* Max attempts made to transmit a message */
90 #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */
91
92 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/
93 #define AIC_USE_EISA_DMA 0
94 #define AIC_USE_ISA_DMA 0
95
96 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */
97 #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */
98
99 /* Some spin loop parameters (essentially how long to wait some places)
100 * The problem(?) is that sometimes we expect either to be able to transmit a
101 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid
102 * returning from the interrupt just to get yanked back for the next byte we
103 * may spin in the interrupt routine waiting for this byte to come. How long?
104 * This is really (SCSI) device and processor dependent. Tuneable, I guess.
105 */
106 #define AIC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */
107 #define AIC_MSGOUT_SPIN 1
108
109 /* Include debug functions? At the end of this file there are a bunch of
110 * functions that will print out various information regarding queued SCSI
111 * commands, driver state and chip contents. You can call them from the
112 * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the
113 * kernel uses less memory) but you lose the debugging facilities.
114 */
115 #define AIC_DEBUG 1
116
117 /* End of customizable parameters */
118
119 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA
120 #error "I said not yet! Start paying attention... grumble"
121 #endif
122
123 #include <sys/types.h>
124 #include <sys/param.h>
125 #include <sys/systm.h>
126 #include <sys/kernel.h>
127 #include <sys/errno.h>
128 #include <sys/ioctl.h>
129 #include <sys/device.h>
130 #include <sys/buf.h>
131 #include <sys/proc.h>
132 #include <sys/user.h>
133 #include <sys/queue.h>
134
135 #include <machine/pio.h>
136
137 #include <scsi/scsi_all.h>
138 #include <scsi/scsi_message.h>
139 #include <scsi/scsiconf.h>
140
141 #include <i386/isa/isavar.h>
142
143 /* Definitions, most of them has turned out to be unneccesary, but here they
144 * are anyway.
145 */
146
147 /* AIC6360 definitions */
148 #define IOBASE aic->sc_iobase
149 #define SCSISEQ (IOBASE + 0x00) /* SCSI sequence control */
150 #define SXFRCTL0 (IOBASE + 0x01) /* SCSI transfer control 0 */
151 #define SXFRCTL1 (IOBASE + 0x02) /* SCSI transfer control 1 */
152 #define SCSISIG (IOBASE + 0x03) /* SCSI signal in/out */
153 #define SCSIRATE (IOBASE + 0x04) /* SCSI rate control */
154 #define SCSIID (IOBASE + 0x05) /* SCSI ID */
155 #define SELID (IOBASE + 0x05) /* Selection/Reselection ID */
156 #define SCSIDAT (IOBASE + 0x06) /* SCSI Latched Data */
157 #define SCSIBUS (IOBASE + 0x07) /* SCSI Data Bus*/
158 #define STCNT0 (IOBASE + 0x08) /* SCSI transfer count */
159 #define STCNT1 (IOBASE + 0x09)
160 #define STCNT2 (IOBASE + 0x0a)
161 #define CLRSINT0 (IOBASE + 0x0b) /* Clear SCSI interrupts 0 */
162 #define SSTAT0 (IOBASE + 0x0b) /* SCSI interrupt status 0 */
163 #define CLRSINT1 (IOBASE + 0x0c) /* Clear SCSI interrupts 1 */
164 #define SSTAT1 (IOBASE + 0x0c) /* SCSI status 1 */
165 #define SSTAT2 (IOBASE + 0x0d) /* SCSI status 2 */
166 #define SCSITEST (IOBASE + 0x0e) /* SCSI test control */
167 #define SSTAT3 (IOBASE + 0x0e) /* SCSI status 3 */
168 #define CLRSERR (IOBASE + 0x0f) /* Clear SCSI errors */
169 #define SSTAT4 (IOBASE + 0x0f) /* SCSI status 4 */
170 #define SIMODE0 (IOBASE + 0x10) /* SCSI interrupt mode 0 */
171 #define SIMODE1 (IOBASE + 0x11) /* SCSI interrupt mode 1 */
172 #define DMACNTRL0 (IOBASE + 0x12) /* DMA control 0 */
173 #define DMACNTRL1 (IOBASE + 0x13) /* DMA control 1 */
174 #define DMASTAT (IOBASE + 0x14) /* DMA status */
175 #define FIFOSTAT (IOBASE + 0x15) /* FIFO status */
176 #define DMADATA (IOBASE + 0x16) /* DMA data */
177 #define DMADATAL (IOBASE + 0x16) /* DMA data low byte */
178 #define DMADATAH (IOBASE + 0x17) /* DMA data high byte */
179 #define BRSTCNTRL (IOBASE + 0x18) /* Burst Control */
180 #define DMADATALONG (IOBASE + 0x18)
181 #define PORTA (IOBASE + 0x1a) /* Port A */
182 #define PORTB (IOBASE + 0x1b) /* Port B */
183 #define REV (IOBASE + 0x1c) /* Revision (001 for 6360) */
184 #define STACK (IOBASE + 0x1d) /* Stack */
185 #define TEST (IOBASE + 0x1e) /* Test register */
186 #define ID (IOBASE + 0x1f) /* ID register */
187
188 #define IDSTRING "(C)1991ADAPTECAIC6360 "
189
190 /* What all the bits do */
191
192 /* SCSISEQ */
193 #define TEMODEO 0x80
194 #define ENSELO 0x40
195 #define ENSELI 0x20
196 #define ENRESELI 0x10
197 #define ENAUTOATNO 0x08
198 #define ENAUTOATNI 0x04
199 #define ENAUTOATNP 0x02
200 #define SCSIRSTO 0x01
201
202 /* SXFRCTL0 */
203 #define SCSIEN 0x80
204 #define DMAEN 0x40
205 #define CHEN 0x20
206 #define CLRSTCNT 0x10
207 #define SPIOEN 0x08
208 #define CLRCH 0x02
209
210 /* SXFRCTL1 */
211 #define BITBUCKET 0x80
212 #define SWRAPEN 0x40
213 #define ENSPCHK 0x20
214 #define STIMESEL1 0x10
215 #define STIMESEL0 0x08
216 #define STIMO_256ms 0x00
217 #define STIMO_128ms 0x08
218 #define STIMO_64ms 0x10
219 #define STIMO_32ms 0x18
220 #define ENSTIMER 0x04
221 #define BYTEALIGN 0x02
222
223 /* SCSISIG (in) */
224 #define CDI 0x80
225 #define IOI 0x40
226 #define MSGI 0x20
227 #define ATNI 0x10
228 #define SELI 0x08
229 #define BSYI 0x04
230 #define REQI 0x02
231 #define ACKI 0x01
232
233 /* Important! The 3 most significant bits of this register, in initiator mode,
234 * represents the "expected" SCSI bus phase and can be used to trigger phase
235 * mismatch and phase change interrupts. But more important: If there is a
236 * phase mismatch the chip will not transfer any data! This is actually a nice
237 * feature as it gives us a bit more control over what is happening when we are
238 * bursting data (in) through the FIFOs and the phase suddenly changes from
239 * DATA IN to STATUS or MESSAGE IN. The transfer will stop and wait for the
240 * proper phase to be set in this register instead of dumping the bits into the
241 * FIFOs.
242 */
243 /* SCSISIG (out) */
244 #define CDO 0x80
245 #define IOO 0x40
246 #define MSGO 0x20
247 #define ATNO 0x10
248 #define SELO 0x08
249 #define BSYO 0x04
250 #define REQO 0x02
251 #define ACKO 0x01
252
253 /* Information transfer phases */
254 #define PH_DATAOUT (0)
255 #define PH_DATAIN (IOI)
256 #define PH_CMD (CDI)
257 #define PH_STAT (CDI | IOI)
258 #define PH_MSGOUT (MSGI | CDI)
259 #define PH_MSGIN (MSGI | CDI | IOI)
260
261 #define PH_MASK (MSGI | CDI | IOI)
262
263 #define PH_INVALID 0xff
264
265 /* SCSIRATE */
266 #define SXFR2 0x40
267 #define SXFR1 0x20
268 #define SXFR0 0x10
269 #define SOFS3 0x08
270 #define SOFS2 0x04
271 #define SOFS1 0x02
272 #define SOFS0 0x01
273
274 /* SCSI ID */
275 #define OID2 0x40
276 #define OID1 0x20
277 #define OID0 0x10
278 #define OID_S 4 /* shift value */
279 #define TID2 0x04
280 #define TID1 0x02
281 #define TID0 0x01
282 #define SCSI_ID_MASK 0x7
283
284 /* SCSI selection/reselection ID (both target *and* initiator) */
285 #define SELID7 0x80
286 #define SELID6 0x40
287 #define SELID5 0x20
288 #define SELID4 0x10
289 #define SELID3 0x08
290 #define SELID2 0x04
291 #define SELID1 0x02
292 #define SELID0 0x01
293
294 /* CLRSINT0 Clears what? (interrupt and/or status bit) */
295 #define SETSDONE 0x80
296 #define CLRSELDO 0x40 /* I */
297 #define CLRSELDI 0x20 /* I+ */
298 #define CLRSELINGO 0x10 /* I */
299 #define CLRSWRAP 0x08 /* I+S */
300 #define CLRSDONE 0x04 /* I+S */
301 #define CLRSPIORDY 0x02 /* I */
302 #define CLRDMADONE 0x01 /* I */
303
304 /* SSTAT0 Howto clear */
305 #define TARGET 0x80
306 #define SELDO 0x40 /* Selfclearing */
307 #define SELDI 0x20 /* Selfclearing when CLRSELDI is set */
308 #define SELINGO 0x10 /* Selfclearing */
309 #define SWRAP 0x08 /* CLRSWAP */
310 #define SDONE 0x04 /* Not used in initiator mode */
311 #define SPIORDY 0x02 /* Selfclearing (op on SCSIDAT) */
312 #define DMADONE 0x01 /* Selfclearing (all FIFOs empty & T/C */
313
314 /* CLRSINT1 Clears what? */
315 #define CLRSELTIMO 0x80 /* I+S */
316 #define CLRATNO 0x40
317 #define CLRSCSIRSTI 0x20 /* I+S */
318 #define CLRBUSFREE 0x08 /* I+S */
319 #define CLRSCSIPERR 0x04 /* I+S */
320 #define CLRPHASECHG 0x02 /* I+S */
321 #define CLRREQINIT 0x01 /* I+S */
322
323 /* SSTAT1 How to clear? When set?*/
324 #define SELTO 0x80 /* C select out timeout */
325 #define ATNTARG 0x40 /* Not used in initiator mode */
326 #define SCSIRSTI 0x20 /* C RST asserted */
327 #define PHASEMIS 0x10 /* Selfclearing */
328 #define BUSFREE 0x08 /* C bus free condition */
329 #define SCSIPERR 0x04 /* C parity error on inbound data */
330 #define PHASECHG 0x02 /* C phase in SCSISIG doesn't match */
331 #define REQINIT 0x01 /* C or ACK asserting edge of REQ */
332
333 /* SSTAT2 */
334 #define SOFFSET 0x20
335 #define SEMPTY 0x10
336 #define SFULL 0x08
337 #define SFCNT2 0x04
338 #define SFCNT1 0x02
339 #define SFCNT0 0x01
340
341 /* SCSITEST */
342 #define SCTESTU 0x08
343 #define SCTESTD 0x04
344 #define STCTEST 0x01
345
346 /* SSTAT3 */
347 #define SCSICNT3 0x80
348 #define SCSICNT2 0x40
349 #define SCSICNT1 0x20
350 #define SCSICNT0 0x10
351 #define OFFCNT3 0x08
352 #define OFFCNT2 0x04
353 #define OFFCNT1 0x02
354 #define OFFCNT0 0x01
355
356 /* CLRSERR */
357 #define CLRSYNCERR 0x04
358 #define CLRFWERR 0x02
359 #define CLRFRERR 0x01
360
361 /* SSTAT4 */
362 #define SYNCERR 0x04
363 #define FWERR 0x02
364 #define FRERR 0x01
365
366 /* SIMODE0 */
367 #define ENSELDO 0x40
368 #define ENSELDI 0x20
369 #define ENSELINGO 0x10
370 #define ENSWRAP 0x08
371 #define ENSDONE 0x04
372 #define ENSPIORDY 0x02
373 #define ENDMADONE 0x01
374
375 /* SIMODE1 */
376 #define ENSELTIMO 0x80
377 #define ENATNTARG 0x40
378 #define ENSCSIRST 0x20
379 #define ENPHASEMIS 0x10
380 #define ENBUSFREE 0x08
381 #define ENSCSIPERR 0x04
382 #define ENPHASECHG 0x02
383 #define ENREQINIT 0x01
384
385 /* DMACNTRL0 */
386 #define ENDMA 0x80
387 #define B8MODE 0x40
388 #define DMA 0x20
389 #define DWORDPIO 0x10
390 #define WRITE 0x08
391 #define INTEN 0x04
392 #define RSTFIFO 0x02
393 #define SWINT 0x01
394
395 /* DMACNTRL1 */
396 #define PWRDWN 0x80
397 #define ENSTK32 0x40
398 #define STK4 0x10
399 #define STK3 0x08
400 #define STK2 0x04
401 #define STK1 0x02
402 #define STK0 0x01
403
404 /* DMASTAT */
405 #define ATDONE 0x80
406 #define WORDRDY 0x40
407 #define INTSTAT 0x20
408 #define DFIFOFULL 0x10
409 #define DFIFOEMP 0x08
410 #define DFIFOHF 0x04
411 #define DWORDRDY 0x02
412
413 /* BRSTCNTRL */
414 #define BON3 0x80
415 #define BON2 0x40
416 #define BON1 0x20
417 #define BON0 0x10
418 #define BOFF3 0x08
419 #define BOFF2 0x04
420 #define BOFF1 0x02
421 #define BOFF0 0x01
422
423 /* TEST */
424 #define BOFFTMR 0x40
425 #define BONTMR 0x20
426 #define STCNTH 0x10
427 #define STCNTM 0x08
428 #define STCNTL 0x04
429 #define SCSIBLK 0x02
430 #define DMABLK 0x01
431
432 #ifdef DDB
434 int Debugger();
435 #else DDB
436 #define Debugger() panic("should call debugger here (aic6360.c)")
437 #endif DDB
438
439 typedef u_long physaddr;
440 typedef u_long physlen;
441
442 struct aic_dma_seg {
443 physaddr seg_addr;
444 physlen seg_len;
445 };
446
447 extern int delaycount;
448 #define FUDGE(X) ((X)>>1) /* get 1 ms spincount */
449 #define MINIFUDGE(X) ((X)>>4) /* get (approx) 125us spincount */
450 #define AIC_NSEG 16
451 #define NUM_CONCURRENT 7 /* Only one per target for now */
452
453 /*
454 * ACB. Holds additional information for each SCSI command Comments: We
455 * need a separate scsi command block because we may need to overwrite it
456 * with a request sense command. Basicly, we refrain from fiddling with
457 * the scsi_xfer struct (except do the expected updating of return values).
458 * We'll generally update: xs->{flags,resid,error,sense,status} and
459 * occasionally xs->retries.
460 */
461 struct aic_acb {
462 struct scsi_generic scsi_cmd;
463 int scsi_cmd_length;
464 u_char *data_addr; /* Saved data pointer */
465 int data_length; /* Residue */
466
467 u_char target_stat; /* SCSI status byte */
468
469 /* struct aic_dma_seg dma[AIC_NSEG]; /* Physical addresses+len */
470
471 TAILQ_ENTRY(aic_acb) chain;
472 struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */
473 int flags;
474 #define ACB_FREE 0
475 #define ACB_ACTIVE 1
476 #define ACB_CHKSENSE 2
477 #define ACB_ABORTED 3
478 };
479
480 /*
481 * Some info about each (possible) target on the SCSI bus. This should
482 * probably have been a "per target+lunit" structure, but we'll leave it at
483 * this for now.
484 */
485 struct aic_tinfo {
486 int cmds; /* #commands processed */
487 int dconns; /* #disconnects */
488 int touts; /* #timeouts */
489 int perrs; /* #parity errors */
490 int senses; /* #request sense commands sent */
491 ushort lubusy; /* What local units/subr. are busy? */
492 u_char flags;
493 #define DO_SYNC 0x01 /* (Re)Negotiate synchronous options */
494 #define DO_WIDE 0x02 /* (Re)Negotiate wide options */
495 u_char period; /* Period suggestion */
496 u_char offset; /* Offset suggestion */
497 u_char width; /* Width suggestion */
498 u_char syncdata; /* True negotiated synch parameters */
499 } tinfo_t;
500
501 struct aic_softc {
502 struct device sc_dev;
503 struct isadev sc_id;
504 struct intrhand sc_ih;
505
506 int sc_iobase;
507 int sc_irq, sc_drq;
508
509 struct scsi_link sc_link; /* prototype for subdevs */
510 TAILQ_HEAD(, aic_acb) free_list, ready_list, nexus_list;
511 struct aic_acb *nexus; /* current command */
512 /* Command blocks and target info */
513 struct aic_acb acb[NUM_CONCURRENT];
514 struct aic_tinfo tinfo[8];
515 /* Data about the current nexus (updated for every cmd switch) */
516 u_char *dp; /* Current data pointer */
517 int dleft; /* Data bytes left to transfer */
518 u_char *cp; /* Current command pointer */
519 int cleft; /* Command bytes left to transfer */
520 /* Adapter state */
521 u_char phase; /* Current bus phase */
522 u_char prevphase; /* Previous bus phase */
523 u_char state; /* State applicable to the adapter */
524 #define AIC_IDLE 0x01
525 #define AIC_SELECTING 0x02 /* SCSI command is arbiting */
526 #define AIC_RESELECTED 0x04 /* Has been reselected */
527 #define AIC_CONNECTED 0x08 /* Actively using the SCSI bus */
528 #define AIC_DISCONNECT 0x10 /* MSG_DISCONNECT received */
529 #define AIC_CMDCOMPLETE 0x20 /* MSG_CMDCOMPLETE received */
530 #define AIC_CLEANING 0x40
531 u_char flags;
532 #define AIC_DROP_MSGIN 0x01 /* Discard all msgs (parity err detected) */
533 #define AIC_ABORTING 0x02 /* Bailing out */
534 #define AIC_DOINGDMA 0x04 /* The FIFO data path is active! */
535 /* Debugging stuff */
536 u_char progress; /* Set if interrupt has achieved progress */
537 /* Message stuff */
538 u_char msgpriq; /* Messages we want to send */
539 u_char msgoutq; /* Messages sent during last MESSAGE OUT */
540 u_char msgout; /* Message last transmitted */
541 #define SEND_DEV_RESET 0x01
542 #define SEND_PARITY_ERROR 0x02
543 #define SEND_ABORT 0x04
544 #define SEND_REJECT 0x08
545 #define SEND_INIT_DET_ERR 0x10
546 #define SEND_IDENTIFY 0x20
547 #define SEND_SDTR 0x40
548 #define SEND_WDTR 0x80
549 #define AIC_MAX_MSG_LEN 8
550 u_char omess[AIC_MAX_MSG_LEN]; /* Scratch area for messages */
551 u_char *omp; /* Message pointer (for multibyte messages) */
552 u_char imess[AIC_MAX_MSG_LEN];
553 u_char *imp; /* Message pointer (for multibyte messages) */
554 };
555
556 #if AIC_DEBUG
557 #define AIC_SHOWACBS 0x01
558 #define AIC_SHOWINTS 0x02
559 #define AIC_SHOWCMDS 0x04
560 #define AIC_SHOWMISC 0x08
561 #define AIC_SHOWTRACE 0x10
562 #define AIC_SHOWSTART 0x20
563 #define AIC_DOBREAK 0x40
564 int aic_debug = 0x00; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRACE; /**/
565 #define AIC_PRINT(b, s) do {if ((aic_debug & (b)) != 0) printf s;} while (0)
566 #define AIC_BREAK() do {if ((aic_debug & AIC_DOBREAK) != 0) Debugger();} while (0)
567 #define AIC_ASSERT(x) do {if (x) {} else {printf("aic at line %d: assertion failed\n", __LINE__); Debugger();}} while (0)
568 #else
569 #define AIC_PRINT(b, s)
570 #define AIC_BREAK()
571 #define AIC_ASSERT(x)
572 #endif
573
574 #define AIC_ACBS(s) AIC_PRINT(AIC_SHOWACBS, s)
575 #define AIC_INTS(s) AIC_PRINT(AIC_SHOWINTS, s)
576 #define AIC_CMDS(s) AIC_PRINT(AIC_SHOWCMDS, s)
577 #define AIC_MISC(s) AIC_PRINT(AIC_SHOWMISC, s)
578 #define AIC_TRACE(s) AIC_PRINT(AIC_SHOWTRACE, s)
579 #define AIC_START(s) AIC_PRINT(AIC_SHOWSTART, s)
580
581 int aicprobe __P((struct device *, void *, void *));
582 void aicattach __P((struct device *, struct device *, void *));
583 void aic_minphys __P((struct buf *));
584 int aicintr __P((struct aic_softc *));
585 void aic_init __P((struct aic_softc *));
586 void aic_done __P((struct aic_softc *, struct aic_acb *));
587 void aic_dequeue __P((struct aic_softc *, struct aic_acb *));
588 int aic_scsi_cmd __P((struct scsi_xfer *));
589 int aic_poll __P((struct aic_softc *, struct scsi_xfer *, int));
590 void aic_timeout __P((void *arg));
591 int aic_find __P((struct aic_softc *));
592 void aic_sched __P((struct aic_softc *));
593 void aic_scsi_reset __P((struct aic_softc *));
594 #if AIC_DEBUG
595 void aic_print_active_acb();
596 void aic_dump_driver();
597 void aic_dump6360();
598 #endif
599
600 struct cfdriver aiccd = {
601 NULL, "aic", aicprobe, aicattach, DV_DULL, sizeof(struct aic_softc)
602 };
603
604 struct scsi_adapter aic_switch = {
605 aic_scsi_cmd,
606 aic_minphys,
607 0,
608 0,
609 };
610
611 struct scsi_device aic_dev = {
612 NULL, /* Use default error handler */
613 NULL, /* have a queue, served by this */
614 NULL, /* have no async handler */
615 NULL, /* Use default 'done' routine */
616 };
617
618 /*
620 * INITIALIZATION ROUTINES (probe, attach ++)
621 */
622
623 /*
624 * aicprobe: probe for AIC6360 SCSI-controller
625 * returns non-zero value if a controller is found.
626 */
627 int
628 aicprobe(parent, match, aux)
629 struct device *parent;
630 void *match, *aux;
631 {
632 struct aic_softc *aic = match;
633 struct isa_attach_args *ia = aux;
634 int i, len, ic;
635
636 #ifdef NEWCONFIG
637 if (ia->ia_iobase == IOBASEUNK)
638 return 0;
639 #endif
640
641 aic->sc_iobase = ia->ia_iobase;
642 if (aic_find(aic) != 0)
643 return 0;
644
645 #ifdef NEWCONFIG
646 if (ia->ia_irq != IRQUNK) {
647 if (ia->ia_irq != aic->sc_irq) {
648 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
649 aic->sc_dev.dv_xname, ia->ia_irq, aic->sc_irq);
650 return 0;
651 }
652 } else
653 ia->ia_irq = aic->sc_irq;
654
655 if (ia->ia_drq != DRQUNK) {
656 if (ia->ia_drq != aic->sc_drq) {
657 printf("%s: drq mismatch; kernel configured %d != board configured %d\n",
658 aic->sc_dev.dv_xname, ia->ia_drq, aic->sc_drq);
659 return 0;
660 }
661 } else
662 ia->ia_drq = aic->sc_drq;
663 #endif
664
665 ia->ia_msize = 0;
666 ia->ia_iosize = 0x20;
667 return 1;
668 }
669
670 /* Do the real search-for-device.
671 * Prerequisite: aic->sc_iobase should be set to the proper value
672 */
673 int
674 aic_find(aic)
675 struct aic_softc *aic;
676 {
677 char chip_id[sizeof(IDSTRING)]; /* For chips that support it */
678 char *start;
679 int i;
680
681 /* Remove aic6360 from possible powerdown mode */
682 outb(DMACNTRL0, 0);
683
684 /* Thanks to mark (at) aggregate.com for the new method for detecting
685 * whether the chip is present or not. Bonus: may also work for
686 * the AIC-6260!
687 */
688 AIC_TRACE(("aic: probing for aic-chip at port 0x%x\n",
689 aic->sc_iobase));
690 /*
691 * Linux also init's the stack to 1-16 and then clears it,
692 * 6260's don't appear to have an ID reg - mpg
693 */
694 /* Push the sequence 0,1,..,15 on the stack */
695 #define STSIZE 16
696 outb(DMACNTRL1, 0); /* Reset stack pointer */
697 for (i = 0; i < STSIZE; i++)
698 outb(STACK, i);
699
700 /* See if we can pull out the same sequence */
701 outb(DMACNTRL1, 0);
702 for (i = 0; i < STSIZE && inb(STACK) == i; i++)
703 ;
704 if (i != STSIZE) {
705 AIC_START(("STACK futzed at %d.\n", i));
706 return ENXIO;
707 }
708
709 /* See if we can pull the id string out of the ID register,
710 * now only used for informational purposes.
711 */
712 bzero(chip_id, sizeof(chip_id));
713 insb(ID, chip_id, sizeof(IDSTRING)-1);
714 AIC_START(("AIC found at 0x%x ", aic->sc_iobase));
715 AIC_START(("ID: %s ",chip_id));
716 AIC_START(("chip revision %d\n",(int)inb(REV)));
717 return 0;
718 }
719
720 int
721 aicprint()
722 {
723 }
724
725 /*
726 * Attach the AIC6360, fill out some high and low level data structures
727 */
728 void
729 aicattach(parent, self, aux)
730 struct device *parent, *self;
731 void *aux;
732 {
733 struct isa_attach_args *ia = aux;
734 struct aic_softc *aic = (void *)self;
735
736 AIC_TRACE(("aicattach "));
737 aic->state = 0;
738 aic_init(aic); /* Init chip and driver */
739
740 /*
741 * Fill in the prototype scsi_link
742 */
743 aic->sc_link.adapter_softc = aic;
744 aic->sc_link.adapter_target = AIC_SCSI_HOSTID;
745 aic->sc_link.adapter = &aic_switch;
746 aic->sc_link.device = &aic_dev;
747 aic->sc_link.openings = 2;
748
749 printf("\n");
750
751 #ifdef NEWCONFIG
752 isa_establish(&aic->sc_id, &aic->sc_dev);
753 #endif
754 aic->sc_ih.ih_fun = aicintr;
755 aic->sc_ih.ih_arg = aic;
756 aic->sc_ih.ih_level = IPL_BIO;
757 intr_establish(ia->ia_irq, &aic->sc_ih);
758
759 config_found(self, &aic->sc_link, aicprint);
760 }
761
762
763 /* Initialize AIC6360 chip itself
764 * The following conditions should hold:
765 * aicprobe should have succeeded, i.e. the iobase address in aic_softc must
766 * be valid.
767 */
768 static void
769 aic6360_reset(aic)
770 struct aic_softc *aic;
771 {
772
773 outb(SCSITEST, 0); /* Doc. recommends to clear these two */
774 outb(TEST, 0); /* registers before operations commence */
775
776 /* Reset SCSI-FIFO and abort any transfers */
777 outb(SXFRCTL0, CHEN|CLRCH|CLRSTCNT);
778
779 /* Reset DMA-FIFO */
780 outb(DMACNTRL0, RSTFIFO);
781 outb(DMACNTRL1, 0);
782
783 outb(SCSISEQ, 0); /* Disable all selection features */
784 outb(SXFRCTL1, 0);
785
786 outb(SIMODE0, 0x00); /* Disable some interrupts */
787 outb(CLRSINT0, 0x7f); /* Clear a slew of interrupts */
788
789 outb(SIMODE1, 0x00); /* Disable some more interrupts */
790 outb(CLRSINT1, 0xef); /* Clear another slew of interrupts */
791
792 outb(SCSIRATE, 0); /* Disable synchronous transfers */
793
794 outb(CLRSERR, 0x07); /* Haven't seen ant errors (yet) */
795
796 outb(SCSIID, AIC_SCSI_HOSTID << OID_S); /* Set our SCSI-ID */
797 outb(BRSTCNTRL, EISA_BRST_TIM);
798 }
799
800 /* Pull the SCSI RST line for 500 us */
801 void
802 aic_scsi_reset(aic)
803 struct aic_softc *aic;
804 {
805
806 outb(SCSISEQ, SCSIRSTO);
807 delay(500);
808 outb(SCSISEQ, 0);
809 delay(50);
810 }
811
812 /*
813 * Initialize aic SCSI driver, also (conditonally) reset the SCSI bus.
814 * The reinitialization is still buggy (e.g. on SCSI resets).
815 */
816 void
817 aic_init(aic)
818 struct aic_softc *aic;
819 {
820 struct aic_acb *acb;
821 int r;
822
823 aic_scsi_reset(aic);
824 aic6360_reset(aic); /* Clean up our own hardware */
825
826 /*XXX*/ /* If not the first time (probably a reset condition),
827 * we should clean queues with active commands
828 */
829 if (aic->state == 0) { /* First time through */
830 TAILQ_INIT(&aic->ready_list);
831 TAILQ_INIT(&aic->nexus_list);
832 TAILQ_INIT(&aic->free_list);
833 aic->nexus = NULL;
834 acb = aic->acb;
835 bzero(acb, sizeof(aic->acb));
836 for (r = 0; r < sizeof(aic->acb) / sizeof(*acb); r++) {
837 TAILQ_INSERT_TAIL(&aic->free_list, acb, chain);
838 acb++;
839 }
840 bzero(&aic->tinfo, sizeof(aic->tinfo));
841 } else {
842 aic->state = AIC_CLEANING;
843 if ((acb = aic->nexus) != NULL) {
844 acb->xs->error = XS_DRIVER_STUFFUP;
845 untimeout(aic_timeout, acb);
846 aic_done(aic, acb);
847 }
848 while (acb = aic->nexus_list.tqh_first) {
849 acb->xs->error = XS_DRIVER_STUFFUP;
850 untimeout(aic_timeout, acb);
851 aic_done(aic, acb);
852 }
853 }
854
855 aic->prevphase = PH_INVALID;
856 for (r = 0; r < 8; r++) {
857 struct aic_tinfo *ti = &aic->tinfo[r];
858
859 ti->flags = 0;
860 #if AIC_USE_SYNCHRONOUS
861 ti->flags |= DO_SYNC;
862 ti->period = AIC_SYNC_PERIOD;
863 ti->offset = AIC_SYNC_REQ_ACK_OFS;
864 #endif
865 #if AIC_USE_WIDE
866 ti->flags |= DO_WIDE;
867 ti->width = AIC_MAX_WIDTH;
868 #endif
869 ti->syncdata = 0;
870 }
871
872 aic->state = AIC_IDLE;
873 outb(DMACNTRL0, INTEN);
874 }
875
876 void
877 aic_free_acb(aic, acb, flags)
878 struct aic_softc *aic;
879 struct aic_acb *acb;
880 int flags;
881 {
882 int s;
883
884 s = splbio();
885
886 acb->flags = ACB_FREE;
887 TAILQ_INSERT_HEAD(&aic->free_list, acb, chain);
888 if (acb->chain.tqe_next == 0)
889 wakeup(&aic->free_list);
890
891 splx(s);
892 }
893
894 struct aic_acb *
895 aic_get_acb(aic, flags)
896 struct aic_softc *aic;
897 int flags;
898 {
899 int s;
900 struct aic_acb *acb;
901
902 /* Get a aic command block */
903 s = splbio();
904
905 while ((acb = aic->free_list.tqh_first) == NULL &&
906 (flags & SCSI_NOSLEEP) == 0)
907 tsleep(&aic->free_list, PRIBIO, "aicacb", 0);
908 if (acb) {
909 TAILQ_REMOVE(&aic->free_list, acb, chain);
910 acb->flags = ACB_ACTIVE;
911 }
912
913 splx(s);
914 return acb;
915 }
916
917 /*
919 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
920 */
921
922 /*
923 * Expected sequence:
924 * 1) Command inserted into ready list
925 * 2) Command selected for execution
926 * 3) Command won arbitration and has selected target device
927 * 4) Send message out (identify message, eventually also sync.negotiations)
928 * 5) Send command
929 * 5a) Receive disconnect message, disconnect.
930 * 5b) Reselected by target
931 * 5c) Receive identify message from target.
932 * 6) Send or receive data
933 * 7) Receive status
934 * 8) Receive message (command complete etc.)
935 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd.
936 * Repeat 2-8 (no disconnects please...)
937 */
938
939 /*
940 * Start a SCSI-command
941 * This function is called by the higher level SCSI-driver to queue/run
942 * SCSI-commands.
943 */
944 int
945 aic_scsi_cmd(xs)
946 struct scsi_xfer *xs;
947 {
948 struct scsi_link *sc = xs->sc_link;
949 struct aic_softc *aic = sc->adapter_softc;
950 struct aic_acb *acb;
951 int s, flags;
952
953 AIC_TRACE(("aic_scsi_cmd "));
954 AIC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
955 sc->target));
956
957 flags = xs->flags;
958
959 if ((acb = aic_get_acb(aic, flags)) == NULL) {
960 xs->error = XS_DRIVER_STUFFUP;
961 return TRY_AGAIN_LATER;
962 }
963
964 /* Initialize acb */
965 acb->xs = xs;
966 bcopy(xs->cmd, &acb->scsi_cmd, xs->cmdlen);
967 acb->scsi_cmd_length = xs->cmdlen;
968 acb->data_addr = xs->data;
969 acb->data_length = xs->datalen;
970 acb->target_stat = 0;
971
972 s = splbio();
973
974 TAILQ_INSERT_TAIL(&aic->ready_list, acb, chain);
975 if (aic->state == AIC_IDLE)
976 aic_sched(aic);
977
978 if ((flags & SCSI_POLL) == 0) { /* Almost done. Wait outside */
979 timeout(aic_timeout, acb, (xs->timeout * hz) / 1000);
980 splx(s);
981 return SUCCESSFULLY_QUEUED;
982 }
983
984 splx(s);
985
986 /* Not allowed to use interrupts, use polling instead */
987 if (aic_poll(aic, xs, xs->timeout)) {
988 aic_timeout(acb);
989 if (aic_poll(aic, xs, 2000))
990 aic_timeout(acb);
991 }
992 return COMPLETE;
993 }
994
995 /*
996 * Adjust transfer size in buffer structure
997 */
998 void
999 aic_minphys(bp)
1000 struct buf *bp;
1001 {
1002
1003 AIC_TRACE(("aic_minphys "));
1004 if (bp->b_bcount > (AIC_NSEG << PGSHIFT))
1005 bp->b_bcount = (AIC_NSEG << PGSHIFT);
1006 }
1007
1008 /*
1009 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
1010 */
1011 int
1012 aic_poll(aic, xs, count)
1013 struct aic_softc *aic;
1014 struct scsi_xfer *xs;
1015 int count;
1016 {
1017
1018 AIC_TRACE(("aic_poll "));
1019 while (count) {
1020 /*
1021 * If we had interrupts enabled, would we
1022 * have got an interrupt?
1023 */
1024 if ((inb(DMASTAT) & INTSTAT) != 0)
1025 aicintr(aic);
1026 if ((xs->flags & ITSDONE) != 0)
1027 return 0;
1028 delay(1000);
1029 count--;
1030 }
1031 return 1;
1032 }
1033
1034 /*
1036 * Start a selection. This is used by aic_sched() to select an idle target,
1037 * and by aic_done() to immediately reselect a target to get sense information.
1038 */
1039 void
1040 aic_select(aic, target)
1041 struct aic_softc *aic;
1042 int target;
1043 {
1044
1045 outb(SCSIID, AIC_SCSI_HOSTID << OID_S | target);
1046 outb(SCSIRATE, aic->tinfo[target].syncdata);
1047 outb(SXFRCTL1, STIMO_256ms|ENSTIMER);
1048 /* Always enable reselections. */
1049 outb(SIMODE0, ENSELDI|ENSELDO);
1050 outb(SIMODE1, ENSCSIRST|ENSELTIMO);
1051 outb(SCSISEQ, ENRESELI|ENSELO|ENAUTOATNO);
1052
1053 aic->state = AIC_SELECTING;
1054 }
1055
1056 /*
1058 * Schedule a SCSI operation. This has now been pulled out of the interrupt
1059 * handler so that we may call it from aic_scsi_cmd and aic_done. This may
1060 * save us an unecessary interrupt just to get things going. Should only be
1061 * called when state == AIC_IDLE and at bio pl.
1062 */
1063 void
1064 aic_sched(aic)
1065 register struct aic_softc *aic;
1066 {
1067 struct aic_acb *acb;
1068 struct scsi_link *sc;
1069 struct aic_tinfo *ti;
1070
1071 /*
1072 * Find first acb in ready queue that is for a target/lunit pair that
1073 * is not busy.
1074 */
1075 outb(CLRSINT1, CLRSELTIMO|CLRBUSFREE|CLRSCSIPERR);
1076 for (acb = aic->ready_list.tqh_first; acb != NULL;
1077 acb = acb->chain.tqe_next) {
1078 sc = acb->xs->sc_link;
1079 ti = &aic->tinfo[sc->target];
1080 if ((ti->lubusy & (1<<sc->lun)) == 0) {
1081 AIC_MISC(("selecting %d:%d ", sc->target, sc->lun));
1082 TAILQ_REMOVE(&aic->ready_list, acb, chain);
1083 aic->nexus = acb;
1084 aic_select(aic, sc->target);
1085 return;
1086 } else
1087 AIC_MISC(("%d:%d busy\n", sc->target, sc->lun));
1088 }
1089 AIC_MISC(("idle "));
1090 /* Nothing to start; just enable reselections and wait. */
1091 outb(SIMODE0, ENSELDI);
1092 outb(SIMODE1, ENSCSIRST);
1093 outb(SCSISEQ, ENRESELI);
1094 }
1095
1096 /*
1098 * POST PROCESSING OF SCSI_CMD (usually current)
1099 */
1100 void
1101 aic_done(aic, acb)
1102 struct aic_softc *aic;
1103 struct aic_acb *acb;
1104 {
1105 struct scsi_xfer *xs = acb->xs;
1106 struct scsi_link *sc_link = xs->sc_link;
1107 struct aic_tinfo *ti = &aic->tinfo[sc_link->target];
1108
1109 AIC_TRACE(("aic_done "));
1110
1111 /*
1112 * Now, if we've come here with no error code, i.e. we've kept the
1113 * initial XS_NOERROR, and the status code signals that we should
1114 * check sense, we'll need to set up a request sense cmd block and
1115 * push the command back into the ready queue *before* any other
1116 * commands for this target/lunit, else we lose the sense info.
1117 * We don't support chk sense conditions for the request sense cmd.
1118 */
1119 if (xs->error == XS_NOERROR) {
1120 if (acb->flags == ACB_ABORTED) {
1121 xs->error = XS_DRIVER_STUFFUP;
1122 } else if (acb->flags == ACB_CHKSENSE) {
1123 xs->error = XS_SENSE;
1124 } else if (acb->target_stat == SCSI_CHECK) {
1125 struct scsi_sense *ss = (void *)&acb->scsi_cmd;
1126
1127 AIC_MISC(("requesting sense "));
1128 /* First, save the return values */
1129 xs->resid = acb->data_length;
1130 xs->status = acb->target_stat;
1131 /* Next, setup a request sense command block */
1132 bzero(ss, sizeof(*ss));
1133 ss->opcode = REQUEST_SENSE;
1134 ss->byte2 = sc_link->lun << 5;
1135 ss->length = sizeof(struct scsi_sense_data);
1136 acb->scsi_cmd_length = sizeof(*ss);
1137 acb->data_addr = (char *)&xs->sense;
1138 acb->data_length = sizeof(struct scsi_sense_data);
1139 acb->flags = ACB_CHKSENSE;
1140 ti->senses++;
1141 ti->lubusy &= ~(1<<sc_link->lun);
1142 if (acb == aic->nexus) {
1143 aic_select(aic, sc_link->target);
1144 } else {
1145 TAILQ_INSERT_HEAD(&aic->ready_list, acb, chain);
1146 }
1147 return;
1148 } else {
1149 xs->resid = acb->data_length;
1150 }
1151 }
1152
1153 xs->flags |= ITSDONE;
1154
1155 #if AIC_DEBUG
1156 if ((aic_debug & AIC_SHOWMISC) != 0) {
1157 if (xs->resid != 0)
1158 printf("resid=%d ", xs->resid);
1159 if (xs->error == XS_SENSE)
1160 printf("sense=0x%02x\n", xs->sense.error_code);
1161 else
1162 printf("error=%d\n", xs->error);
1163 }
1164 #endif
1165
1166 /*
1167 * Remove the ACB from whatever queue it's on. We have to do a bit of
1168 * a hack to figure out which queue it's on. Note that it is *not*
1169 * necessary to cdr down the ready queue, but we must cdr down the
1170 * nexus queue and see if it's there, so we can mark the unit as no
1171 * longer busy. This code is sickening, but it works.
1172 */
1173 if (acb == aic->nexus) {
1174 ti->lubusy &= ~(1<<sc_link->lun);
1175 aic->state = AIC_IDLE;
1176 aic->nexus = NULL;
1177 aic_sched(aic);
1178 } else
1179 aic_dequeue(aic, acb);
1180
1181 aic_free_acb(aic, acb, xs->flags);
1182 ti->cmds++;
1183 scsi_done(xs);
1184 }
1185
1186 void
1187 aic_dequeue(aic, acb)
1188 struct aic_softc *aic;
1189 struct aic_acb *acb;
1190 {
1191 struct scsi_link *sc_link = acb->xs->sc_link;
1192 struct aic_tinfo *ti = &aic->tinfo[sc_link->target];
1193
1194 if (aic->ready_list.tqh_last == &acb->chain.tqe_next) {
1195 TAILQ_REMOVE(&aic->ready_list, acb, chain);
1196 } else {
1197 register struct aic_acb *acb2;
1198 for (acb2 = aic->nexus_list.tqh_first; acb2 != NULL;
1199 acb2 = acb2->chain.tqe_next) {
1200 if (acb2 == acb)
1201 break;
1202 }
1203 if (acb2 != NULL) {
1204 TAILQ_REMOVE(&aic->nexus_list, acb, chain);
1205 ti->lubusy &= ~(1<<sc_link->lun);
1206 } else if (acb->chain.tqe_next) {
1207 TAILQ_REMOVE(&aic->ready_list, acb, chain);
1208 } else {
1209 printf("%s: can't find matching acb\n",
1210 aic->sc_dev.dv_xname);
1211 Debugger();
1212 }
1213 }
1214 }
1215
1216 /*
1218 * INTERRUPT/PROTOCOL ENGINE
1219 */
1220
1221 /* The message system:
1222 * This is a revamped message system that now should easier accomodate new
1223 * messages, if necessary.
1224 * Currently we accept these messages:
1225 * IDENTIFY (when reselecting)
1226 * COMMAND COMPLETE # (expect bus free after messages marked #)
1227 * NOOP
1228 * MESSAGE REJECT
1229 * SYNCHRONOUS DATA TRANSFER REQUEST
1230 * SAVE DATA POINTER
1231 * RESTORE POINTERS
1232 * DISCONNECT #
1233 *
1234 * We may send these messages in prioritized order:
1235 * BUS DEVICE RESET # if SCSI_RESET & xs->flags (or in weird sits.)
1236 * MESSAGE PARITY ERROR par. err. during MSGI
1237 * MESSAGE REJECT If we get a message we don't know how to handle
1238 * ABORT # send on errors
1239 * INITIATOR DETECTED ERROR also on errors (SCSI2) (during info xfer)
1240 * IDENTIFY At the start of each transfer
1241 * SYNCHRONOUS DATA TRANSFER REQUEST if appropriate
1242 * NOOP if nothing else fits the bill ...
1243 */
1244
1245 #define aic_sched_msgout(m) \
1246 do { \
1247 if (aic->msgpriq == 0) \
1248 outb(SCSISIG, aic->phase|ATNO); \
1249 aic->msgpriq |= (m); \
1250 } while (0)
1251
1252 #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80)
1253 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1254 #define ISEXTMSG(m) ((m) == 0x01)
1255 /*
1256 * Precondition:
1257 * The SCSI bus is already in the MSGI phase and there is a message byte
1258 * on the bus, along with an asserted REQ signal.
1259 */
1260 void
1261 aic_msgin(aic)
1262 register struct aic_softc *aic;
1263 {
1264 int n;
1265
1266 AIC_TRACE(("aic_msgin "));
1267 aic->progress = 0;
1268
1269 if (aic->prevphase == PH_MSGIN) {
1270 /* This is a continuation of the previous message. */
1271 n = aic->imp - aic->imess;
1272 goto nextbyte;
1273 }
1274
1275 /* This is a new MESSAGE IN phase. Clean up our state. */
1276 aic->flags &= ~AIC_DROP_MSGIN;
1277
1278 nextmsg:
1279 n = 0;
1280 aic->imp = &aic->imess[n];
1281
1282 nextbyte:
1283 /*
1284 * Read a whole message, but don't ack the last byte. If we reject the
1285 * message, we have to assert ATN during the message transfer phase
1286 * itself.
1287 */
1288 for (;;) {
1289 for (;;) {
1290 u_char sstat1 = inb(SSTAT1);
1291 if ((sstat1 & (REQINIT|BUSFREE)) == 0) {
1292 /* Wait for REQINIT. XXX Need timeout. */
1293 continue;
1294 }
1295 if ((sstat1 & (PHASECHG|BUSFREE)) != 0) {
1296 /*
1297 * Target left MESSAGE IN, probably because it
1298 * a) noticed our ATN signal, or
1299 * b) ran out of messages.
1300 */
1301 goto out;
1302 }
1303 /* Still in MESSAGE IN phase, and REQ is asserted. */
1304 if ((sstat1 & SCSIPERR) != 0) {
1305 aic_sched_msgout(SEND_PARITY_ERROR);
1306 aic->flags |= AIC_DROP_MSGIN;
1307 }
1308 break;
1309 }
1310
1311 /* Gather incoming message bytes if needed. */
1312 if ((aic->flags & AIC_DROP_MSGIN) == 0) {
1313 if (n >= AIC_MAX_MSG_LEN) {
1314 aic_sched_msgout(SEND_REJECT);
1315 aic->flags |= AIC_DROP_MSGIN;
1316 } else {
1317 *aic->imp++ = inb(SCSIDAT);
1318 n++;
1319 /*
1320 * This testing is suboptimal, but most
1321 * messages will be of the one byte variety, so
1322 * it should not affect performance
1323 * significantly.
1324 */
1325 if (n == 1 && IS1BYTEMSG(aic->imess[0]))
1326 break;
1327 if (n == 2 && IS2BYTEMSG(aic->imess[0]))
1328 break;
1329 if (n >= 3 && ISEXTMSG(aic->imess[0]) &&
1330 n == aic->imess[1] + 2)
1331 break;
1332 }
1333 }
1334
1335 /*
1336 * If we reach this spot we're either:
1337 * a) in the middle of a multi-byte message, or
1338 * b) dropping bytes.
1339 */
1340 outb(SXFRCTL0, CHEN|SPIOEN);
1341 /* Ack the last byte read. */
1342 (void) inb(SCSIDAT);
1343 outb(SXFRCTL0, CHEN);
1344 while ((inb(SCSISIG) & ACKI) != 0)
1345 ;
1346 }
1347
1348 aic->progress = 1;
1349 AIC_MISC(("n=%d imess=0x%02x ", n, aic->imess[0]));
1350
1351 /* We now have a complete message. Parse it. */
1352 switch (aic->state) {
1353 struct aic_acb *acb;
1354 struct scsi_link *sc;
1355 struct aic_tinfo *ti;
1356 int period, offset, width;
1357 u_char selid, target, lun;
1358
1359 case AIC_CONNECTED:
1360 AIC_ASSERT(aic->nexus != NULL);
1361 acb = aic->nexus;
1362 ti = &aic->tinfo[acb->xs->sc_link->target];
1363
1364 switch (aic->imess[0]) {
1365 case MSG_CMDCOMPLETE:
1366 if (aic->dleft < 0) {
1367 sc = acb->xs->sc_link;
1368 printf("%s: %d extra bytes from %d:%d\n",
1369 aic->sc_dev.dv_xname,
1370 -aic->dleft, sc->target, sc->lun);
1371 acb->data_length = 0;
1372 }
1373 acb->xs->resid = acb->data_length = aic->dleft;
1374 aic->state = AIC_CMDCOMPLETE;
1375 break;
1376
1377 case MSG_PARITY_ERROR:
1378 /* Resend the last message. */
1379 aic_sched_msgout(aic->msgout);
1380 break;
1381
1382 case MSG_MESSAGE_REJECT:
1383 AIC_MISC(("message rejected "));
1384 switch (aic->msgout) {
1385 case SEND_IDENTIFY:
1386 ti->flags &= ~(DO_SYNC|DO_WIDE);
1387 ti->syncdata = 0;
1388 outb(SCSIRATE, ti->syncdata);
1389 /* ... */
1390 break;
1391 case SEND_SDTR:
1392 ti->flags &= ~DO_SYNC;
1393 ti->syncdata = 0;
1394 outb(SCSIRATE, ti->syncdata);
1395 break;
1396 case SEND_WDTR:
1397 ti->flags &= ~DO_WIDE;
1398 /* ... */
1399 break;
1400 case SEND_INIT_DET_ERR:
1401 aic->flags |= AIC_ABORTING;
1402 aic_sched_msgout(SEND_ABORT);
1403 break;
1404 }
1405 break;
1406
1407 case MSG_NOOP:
1408 break;
1409
1410 case MSG_DISCONNECT:
1411 ti->dconns++;
1412 aic->state = AIC_DISCONNECT;
1413 break;
1414
1415 case MSG_SAVEDATAPOINTER:
1416 acb->data_addr = aic->dp;
1417 acb->data_length = aic->dleft;
1418 break;
1419
1420 case MSG_RESTOREPOINTERS:
1421 aic->dp = acb->data_addr;
1422 aic->dleft = acb->data_length;
1423 aic->cp = (u_char *)&acb->scsi_cmd;
1424 aic->cleft = acb->scsi_cmd_length;
1425 break;
1426
1427 case MSG_EXTENDED:
1428 switch (aic->imess[2]) {
1429 case MSG_EXT_SDTR:
1430 if (aic->imess[1] != 3)
1431 goto reject;
1432 period = (aic->imess[3] * 4 + 49)/50 - 2;
1433 offset = aic->imess[4];
1434 if (offset == 0) {
1435 ti->flags &= ~DO_SYNC;
1436 ti->syncdata = 0;
1437 outb(SCSIRATE, ti->syncdata);
1438 } else if (period > 7) {
1439 /* Too slow for aic6360. Do asynch
1440 * instead. Renegotiate the deal.
1441 */
1442 ti->period = 0;
1443 ti->offset = 0;
1444 aic_sched_msgout(SEND_SDTR);
1445 } else {
1446 ti->flags &= ~DO_SYNC;
1447 ti->syncdata = period<<4 | offset;
1448 outb(SCSIRATE, ti->syncdata);
1449 }
1450 break;
1451
1452 case MSG_EXT_WDTR:
1453 if (aic->imess[1] != 2)
1454 goto reject;
1455 width = aic->imess[3];
1456 if (width == 0) {
1457 ti->flags &= ~DO_WIDE;
1458 /* ... */
1459 } else if (width > AIC_MAX_WIDTH) {
1460 ti->width = 0;
1461 aic_sched_msgout(SEND_WDTR);
1462 } else {
1463 ti->flags &= ~DO_WIDE;
1464 /* ... */
1465 }
1466 break;
1467
1468 default:
1469 printf("aic at line %d: unrecognized MESSAGE IN; sending REJECT\n", __LINE__);
1470 AIC_BREAK();
1471 goto reject;
1472 }
1473 break;
1474
1475 default:
1476 printf("aic at line %d: unrecognized MESSAGE IN; sending REJECT\n", __LINE__);
1477 AIC_BREAK();
1478 reject:
1479 aic_sched_msgout(SEND_REJECT);
1480 break;
1481 }
1482 break;
1483
1484 case AIC_RESELECTED:
1485 if (!MSG_ISIDENTIFY(aic->imess[0])) {
1486 printf("aic at line %d: reselect without IDENTIFY; sending DEVICE RESET\n", __LINE__);
1487 AIC_BREAK();
1488 goto reset;
1489 }
1490
1491 /*
1492 * The SCSI chip made a snapshot of the data bus while the
1493 * reselection was being negotiated. This enables us to
1494 * determine which target did the reselect.
1495 */
1496 selid = inb(SELID) & ~(1<<AIC_SCSI_HOSTID);
1497 if (selid & (selid - 1)) {
1498 printf("aic at line %d: reselect with invalid selid %02x; sending DEVICE RESET\n", __LINE__, selid);
1499 AIC_BREAK();
1500 goto reset;
1501 }
1502
1503 /* Search wait queue for disconnected cmd
1504 * The list should be short, so I haven't bothered with
1505 * any more sophisticated structures than a simple
1506 * singly linked list.
1507 */
1508 target = ffs(selid) - 1;
1509 lun = aic->imess[0] & 0x07;
1510 for (acb = aic->nexus_list.tqh_first; acb != NULL;
1511 acb = acb->chain.tqe_next) {
1512 sc = acb->xs->sc_link;
1513 if (sc->target == target && sc->lun == lun)
1514 break;
1515 }
1516 if (acb == NULL) {
1517 printf("aic at line %d: reselect from target %d lun %d with no nexus; sending ABORT\n", __LINE__, target, lun);
1518 AIC_BREAK();
1519 goto abort;
1520 }
1521
1522 /* Make this nexus active again. */
1523 TAILQ_REMOVE(&aic->nexus_list, acb, chain);
1524 aic->state = AIC_CONNECTED;
1525 aic->nexus = acb;
1526 ti = &aic->tinfo[sc->target];
1527 ti->lubusy |= (1<<sc->lun);
1528 outb(SCSIRATE, ti->syncdata);
1529
1530 /* Do an implicit RESTORE POINTERS. */
1531 aic->dp = acb->data_addr;
1532 aic->dleft = acb->data_length;
1533 aic->cp = (u_char *)&acb->scsi_cmd;
1534 aic->cleft = acb->scsi_cmd_length;
1535 break;
1536
1537 default:
1538 printf("aic at line %d: unexpected MESSAGE IN; sending DEVICE RESET\n", __LINE__);
1539 AIC_BREAK();
1540 reset:
1541 aic->flags |= AIC_ABORTING;
1542 aic_sched_msgout(SEND_DEV_RESET);
1543 break;
1544
1545 abort:
1546 aic->flags |= AIC_ABORTING;
1547 aic_sched_msgout(SEND_ABORT);
1548 break;
1549 }
1550
1551 outb(SXFRCTL0, CHEN|SPIOEN);
1552 /* Ack the last message byte. */
1553 (void) inb(SCSIDAT);
1554 outb(SXFRCTL0, CHEN);
1555 while ((inb(SCSISIG) & ACKI) != 0)
1556 ;
1557
1558 /* Go get the next message, if any. */
1559 goto nextmsg;
1560
1561 out:
1562 AIC_MISC(("n=%d imess=0x%02x ", n, aic->imess[0]));
1563 }
1564
1565
1566 /* The message out (and in) stuff is a bit complicated:
1567 * If the target requests another message (sequence) without
1568 * having changed phase in between it really asks for a
1569 * retransmit, probably due to parity error(s).
1570 * The following messages can be sent:
1571 * IDENTIFY @ These 4 stem from SCSI command activity
1572 * SDTR @
1573 * WDTR @
1574 * DEV_RESET @
1575 * REJECT if MSGI doesn't make sense
1576 * PARITY_ERROR if parity error while in MSGI
1577 * INIT_DET_ERR if parity error while not in MSGI
1578 * ABORT if INIT_DET_ERR rejected
1579 * NOOP if asked for a message and there's nothing to send
1580 */
1581 void
1582 aic_msgout(aic)
1583 register struct aic_softc *aic;
1584 {
1585 struct aic_acb *acb;
1586 struct aic_tinfo *ti;
1587 int n;
1588
1589 AIC_TRACE(("aic_msgout "));
1590 aic->progress = 0;
1591
1592 /*
1593 * Set ATN. If we're just sending a trivial 1-byte message, we'll
1594 * clear ATN later on anyway.
1595 */
1596 outb(SCSISIG, PH_MSGOUT|ATNO);
1597 /* Reset the FIFO. */
1598 outb(DMACNTRL0, RSTFIFO);
1599 /* Enable REQ/ACK protocol. */
1600 outb(SXFRCTL0, CHEN|SPIOEN);
1601
1602 if (aic->prevphase == PH_MSGOUT) {
1603 if (aic->omp == aic->omess) {
1604 /*
1605 * This is a retransmission.
1606 *
1607 * We get here if the target stayed in MESSAGE OUT
1608 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1609 * that all of the previously transmitted messages must
1610 * be sent again, in the same order. Therefore, we
1611 * requeue all the previously transmitted messages, and
1612 * start again from the top. Our simple priority
1613 * scheme keeps the messages in the right order.
1614 */
1615 AIC_MISC(("retransmitting "));
1616 aic->msgpriq |= aic->msgoutq;
1617 } else {
1618 /* This is a continuation of the previous message. */
1619 n = aic->omp - aic->omess;
1620 goto nextbyte;
1621 }
1622 }
1623
1624 /* No messages transmitted so far. */
1625 aic->msgoutq = 0;
1626
1627 nextmsg:
1628 /* Pick up highest priority message. */
1629 aic->msgout = aic->msgpriq & -aic->msgpriq;
1630 aic->msgpriq &= ~aic->msgout;
1631 aic->msgoutq |= aic->msgout;
1632
1633 /* Build the outgoing message data. */
1634 switch (aic->msgout) {
1635 case SEND_IDENTIFY:
1636 if (aic->state != AIC_CONNECTED) {
1637 printf("aic at line %d: SEND_IDENTIFY while not connected; sending NOOP\n", __LINE__);
1638 AIC_BREAK();
1639 goto noop;
1640 }
1641 AIC_ASSERT(aic->nexus != NULL);
1642 acb = aic->nexus;
1643 aic->omess[0] =
1644 MSG_IDENTIFY(acb->xs->sc_link->lun, AIC_ALLOW_DISCONNECT);
1645 n = 1;
1646 break;
1647
1648 case SEND_SDTR:
1649 if (aic->state != AIC_CONNECTED) {
1650 printf("aic at line %d: SEND_SDTR while not connected; sending NOOP\n", __LINE__);
1651 AIC_BREAK();
1652 goto noop;
1653 }
1654 AIC_ASSERT(aic->nexus != NULL);
1655 ti = &aic->tinfo[aic->nexus->xs->sc_link->target];
1656 aic->omess[4] = MSG_EXTENDED;
1657 aic->omess[3] = 3;
1658 aic->omess[2] = MSG_EXT_SDTR;
1659 aic->omess[1] = ti->period >> 2;
1660 aic->omess[0] = ti->offset;
1661 n = 5;
1662 break;
1663
1664 case SEND_WDTR:
1665 if (aic->state != AIC_CONNECTED) {
1666 printf("aic at line %d: SEND_WDTR while not connected; sending NOOP\n", __LINE__);
1667 AIC_BREAK();
1668 goto noop;
1669 }
1670 AIC_ASSERT(aic->nexus != NULL);
1671 ti = &aic->tinfo[aic->nexus->xs->sc_link->target];
1672 aic->omess[3] = MSG_EXTENDED;
1673 aic->omess[2] = 2;
1674 aic->omess[1] = MSG_EXT_WDTR;
1675 aic->omess[0] = ti->width;
1676 n = 4;
1677 break;
1678
1679 case SEND_DEV_RESET:
1680 aic->omess[0] = MSG_BUS_DEV_RESET;
1681 n = 1;
1682 break;
1683
1684 case SEND_REJECT:
1685 aic->omess[0] = MSG_MESSAGE_REJECT;
1686 n = 1;
1687 break;
1688
1689 case SEND_PARITY_ERROR:
1690 aic->omess[0] = MSG_PARITY_ERROR;
1691 n = 1;
1692 break;
1693
1694 case SEND_INIT_DET_ERR:
1695 aic->omess[0] = MSG_INITIATOR_DET_ERR;
1696 n = 1;
1697 break;
1698
1699 case SEND_ABORT:
1700 aic->omess[0] = MSG_ABORT;
1701 n = 1;
1702 break;
1703
1704 case 0:
1705 printf("aic at line %d: unexpected MESSAGE OUT; sending NOOP\n", __LINE__);
1706 AIC_BREAK();
1707 noop:
1708 aic->omess[0] = MSG_NOOP;
1709 n = 1;
1710 break;
1711
1712 default:
1713 printf("aic at line %d: weird MESSAGE OUT; sending NOOP\n", __LINE__);
1714 AIC_BREAK();
1715 goto noop;
1716 }
1717 aic->omp = &aic->omess[n];
1718
1719 nextbyte:
1720 /* Send message bytes. */
1721 for (;;) {
1722 for (;;) {
1723 u_char sstat1 = inb(SSTAT1);
1724 if ((sstat1 & (REQINIT|BUSFREE)) == 0) {
1725 /* Wait for REQINIT. XXX Need timeout. */
1726 continue;
1727 }
1728 if ((sstat1 & (PHASECHG|BUSFREE)) != 0) {
1729 /*
1730 * Target left MESSAGE OUT, possibly to reject
1731 * our message.
1732 */
1733 goto out;
1734 }
1735 /* Still in MESSAGE OUT phase, and REQ is asserted. */
1736 break;
1737 }
1738
1739 --n;
1740
1741 /* Clear ATN before last byte if this is the last message. */
1742 if (n == 0 && aic->msgpriq == 0)
1743 outb(CLRSINT1, CLRATNO);
1744 /* Send message byte. */
1745 outb(SCSIDAT, *--aic->omp);
1746 /* Wait for ACK to be negated. XXX Need timeout. */
1747 while ((inb(SCSISIG) & ACKI) != 0)
1748 ;
1749
1750 if (n == 0)
1751 break;
1752 }
1753
1754 aic->progress = 1;
1755
1756 /* We get here only if the entire message has been transmitted. */
1757 if (aic->msgpriq != 0) {
1758 /* There are more outgoing messages. */
1759 goto nextmsg;
1760 }
1761
1762 /*
1763 * The last message has been transmitted. We need to remember the last
1764 * message transmitted (in case the target switches to MESSAGE IN phase
1765 * and sends a MESSAGE REJECT), and the list of messages transmitted
1766 * this time around (in case the target stays in MESSAGE OUT phase to
1767 * request a retransmit).
1768 */
1769
1770 out:
1771 /* Disable REQ/ACK protocol. */
1772 outb(SXFRCTL0, CHEN);
1773 }
1774
1775 /* aic_dataout_pio: perform a data transfer using the FIFO datapath in the aic6360
1777 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1778 * and ACK deasserted (i.e. waiting for a data byte)
1779 * This new revision has been optimized (I tried) to make the common case fast,
1780 * and the rarer cases (as a result) somewhat more comlex
1781 */
1782 int
1783 aic_dataout_pio(aic, p, n)
1784 register struct aic_softc *aic;
1785 u_char *p;
1786 int n;
1787 {
1788 register u_char dmastat;
1789 int out = 0;
1790 #define DOUTAMOUNT 128 /* Full FIFO */
1791
1792 /* Clear FIFOs and counters. */
1793 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH);
1794 outb(DMACNTRL0, RSTFIFO|WRITE);
1795 /* Enable FIFOs. */
1796 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN);
1797 outb(DMACNTRL0, ENDMA|DWORDPIO|WRITE);
1798
1799 /* Turn off ENREQINIT for now. */
1800 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENPHASECHG);
1801
1802 /* I have tried to make the main loop as tight as possible. This
1803 * means that some of the code following the loop is a bit more
1804 * complex than otherwise.
1805 */
1806 while (n > 0) {
1807 int xfer;
1808
1809 for (;;) {
1810 dmastat = inb(DMASTAT);
1811 if ((dmastat & DFIFOEMP) != 0)
1812 break;
1813 if ((dmastat & INTSTAT) != 0)
1814 goto phasechange;
1815 }
1816
1817 xfer = min(DOUTAMOUNT, n);
1818
1819 n -= xfer;
1820 out += xfer;
1821
1822 #if AIC_USE_DWORDS
1823 if (xfer >= 12) {
1824 outsl(DMADATALONG, p, xfer>>2);
1825 p += xfer & ~3;
1826 xfer &= 3;
1827 }
1828 #else
1829 if (xfer >= 8) {
1830 outsw(DMADATA, p, xfer>>1);
1831 p += xfer & ~1;
1832 xfer &= 1;
1833 }
1834 #endif
1835
1836 if (xfer > 0) {
1837 outb(DMACNTRL0, ENDMA|B8MODE|WRITE);
1838 outsb(DMADATA, p, xfer);
1839 p += xfer;
1840 outb(DMACNTRL0, ENDMA|DWORDPIO|WRITE);
1841 }
1842 }
1843
1844 /* See the bytes off chip */
1845 for (;;) {
1846 dmastat = inb(DMASTAT);
1847 if ((dmastat & DFIFOEMP) != 0 &&
1848 (inb(SSTAT2) & SEMPTY) != 0)
1849 break;
1850 if ((dmastat & INTSTAT) != 0)
1851 goto phasechange;
1852 }
1853
1854 phasechange:
1855 /* We now have the data off chip. */
1856 outb(SXFRCTL0, CHEN);
1857
1858 if ((dmastat & INTSTAT) != 0) {
1859 /* Some sort of phase change. */
1860 register u_char sstat2;
1861 int amount;
1862
1863 /* Stop transfers, do some accounting */
1864 amount = inb(FIFOSTAT);
1865 sstat2 = inb(SSTAT2);
1866 if ((sstat2 & 7) == 0)
1867 amount += sstat2 & SFULL ? 8 : 0;
1868 else
1869 amount += sstat2 & 7;
1870 out -= amount;
1871 AIC_MISC(("+%d ", amount));
1872 }
1873
1874 outb(DMACNTRL0, RSTFIFO);
1875 while ((inb(SXFRCTL0) & SCSIEN) != 0)
1876 ;
1877
1878 aic->progress = out != 0;
1879
1880 /* Turn on ENREQINIT again. */
1881 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENREQINIT|ENPHASECHG);
1882
1883 return out;
1884 }
1885
1886 /* aic_datain_pio: perform data transfers using the FIFO datapath in the aic6360
1888 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1889 * and ACK deasserted (i.e. at least one byte is ready).
1890 * For now, uses a pretty dumb algorithm, hangs around until all data has been
1891 * transferred. This, is OK for fast targets, but not so smart for slow
1892 * targets which don't disconnect or for huge transfers.
1893 */
1894 int
1895 aic_datain_pio(aic, p, n)
1896 register struct aic_softc *aic;
1897 u_char *p;
1898 int n;
1899 {
1900 register u_char dmastat;
1901 int in = 0;
1902 #define DINAMOUNT 128 /* Full FIFO */
1903
1904 /* Clear FIFOs and counters */
1905 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH);
1906 outb(DMACNTRL0, RSTFIFO);
1907 /* Enable FIFOs */
1908 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN);
1909 outb(DMACNTRL0, ENDMA|DWORDPIO);
1910
1911 /* Turn off ENREQINIT for now. */
1912 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENPHASECHG);
1913
1914 /* We leave this loop if one or more of the following is true:
1915 * a) phase != PH_DATAIN && FIFOs are empty
1916 * b) SCSIRSTI is set (a reset has occurred) or busfree is detected.
1917 */
1918 while (n > 0) {
1919 int xfer;
1920
1921 /* Wait for fifo half full or phase mismatch */
1922 for (;;) {
1923 dmastat = inb(DMASTAT);
1924 if ((dmastat & (DFIFOFULL|INTSTAT)) != 0)
1925 break;
1926 }
1927
1928 if ((dmastat & DFIFOFULL) != 0)
1929 xfer = DINAMOUNT;
1930 else {
1931 while ((inb(SSTAT2) & SEMPTY) == 0)
1932 ;
1933 xfer = inb(FIFOSTAT);
1934 }
1935
1936 xfer = min(xfer, n);
1937
1938 n -= xfer;
1939 in += xfer;
1940
1941 #if AIC_USE_DWORDS
1942 if (xfer >= 12) {
1943 insl(DMADATALONG, p, xfer>>2);
1944 p += xfer & ~3;
1945 xfer &= 3;
1946 }
1947 #else
1948 if (xfer >= 8) {
1949 insw(DMADATA, p, xfer>>1);
1950 p += xfer & ~1;
1951 xfer &= 1;
1952 }
1953 #endif
1954
1955 if (xfer > 0) {
1956 outb(DMACNTRL0, ENDMA|B8MODE);
1957 insb(DMADATA, p, xfer);
1958 p += xfer;
1959 outb(DMACNTRL0, ENDMA|DWORDPIO);
1960 }
1961
1962 if ((dmastat & INTSTAT) != 0)
1963 break;
1964 }
1965
1966 #if 0
1967 if (n > 0)
1968 printf("residual %d\n", n);
1969 #endif
1970
1971 /* Some SCSI-devices are rude enough to transfer more data than what
1972 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1973 * requested 512. Test for progress, i.e. real transfers. If no real
1974 * transfers have been performed (n is probably already zero) and the
1975 * FIFO is not empty, waste some bytes....
1976 */
1977 if (in == 0) {
1978 int extra = 0;
1979
1980 for (;;) {
1981 dmastat = inb(DMASTAT);
1982 if ((dmastat & DFIFOEMP) != 0)
1983 break;
1984 (void) inb(DMADATA); /* Throw it away */
1985 extra++;
1986 }
1987
1988 AIC_MISC(("aic: %d extra bytes\n", extra));
1989 aic->progress = extra != 0;
1990 } else
1991 aic->progress = 1;
1992
1993 /* Stop the FIFO data path */
1994 outb(SXFRCTL0, CHEN);
1995
1996 outb(DMACNTRL0, RSTFIFO);
1997 while ((inb(SXFRCTL0) & SCSIEN) != 0)
1998 ;
1999
2000 /* Turn on ENREQINIT again. */
2001 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENREQINIT|ENPHASECHG);
2002
2003 return in;
2004 }
2005
2006 /*
2008 * This is the workhorse routine of the driver.
2009 * Deficiencies (for now):
2010 * 1) always uses programmed I/O
2011 * 2) doesn't support synchronous transfers properly (yet)
2012 */
2013 int
2014 aicintr(aic)
2015 register struct aic_softc *aic;
2016 {
2017 u_char sstat0, sstat1;
2018 u_char phase;
2019 register struct aic_acb *acb;
2020 register struct scsi_link *sc;
2021 struct aic_tinfo *ti;
2022 int n;
2023
2024 /*
2025 * Clear INTEN. We enable it again before returning. This ensures
2026 * that we get another edge on the next `interesting' event.
2027 */
2028 outb(DMACNTRL0, 0);
2029 AIC_TRACE(("aicintr "));
2030
2031 /*
2032 * First check for abnormal conditions, such as reset.
2033 */
2034 sstat1 = inb(SSTAT1);
2035 AIC_MISC(("sstat1:0x%02x ", sstat1));
2036
2037 if ((sstat1 & SCSIRSTI) != 0) {
2038 printf("aic: reset in -- reinitializing....\n");
2039 goto reset;
2040 }
2041 if ((sstat1 & SCSIPERR) != 0) {
2042 printf("aic: SCSI bus parity error\n");
2043 outb(CLRSINT1, CLRSCSIPERR);
2044 if (aic->prevphase == PH_MSGIN) {
2045 aic_sched_msgout(SEND_PARITY_ERROR);
2046 aic->flags |= AIC_DROP_MSGIN;
2047 } else
2048 aic_sched_msgout(SEND_INIT_DET_ERR);
2049 }
2050
2051 /*
2052 * If we're not already busy doing something test for the following
2053 * conditions:
2054 * 1) We have been reselected by something
2055 * 2) We have selected something successfully
2056 * 3) Our selection process has timed out
2057 * 4) This is really a bus free interrupt just to get a new command
2058 * going?
2059 * 5) Spurious interrupt?
2060 */
2061 switch (aic->state) {
2062 case AIC_IDLE:
2063 case AIC_SELECTING:
2064 sstat0 = inb(SSTAT0);
2065 AIC_MISC(("sstat0:0x%02x ", sstat0));
2066
2067 if ((sstat0 & TARGET) != 0) {
2068 /*
2069 * We don't currently support target mode.
2070 */
2071 printf("aic at line %d: target mode selected; going to bus free\n",
2072 __LINE__);
2073 outb(SCSISIG, 0);
2074
2075 aic->state = AIC_IDLE;
2076 aic_sched(aic);
2077 goto out;
2078 } else if ((sstat0 & SELDI) != 0) {
2079 AIC_MISC(("reselected "));
2080
2081 /*
2082 * If we're trying to select a target ourselves,
2083 * push our command back into the ready list.
2084 */
2085 if (aic->state == AIC_SELECTING) {
2086 AIC_MISC(("backoff selector "));
2087 AIC_ASSERT(aic->nexus != NULL);
2088 acb = aic->nexus;
2089 aic->nexus = NULL;
2090 TAILQ_INSERT_HEAD(&aic->ready_list, acb, chain);
2091 }
2092
2093 aic->state = AIC_RESELECTED;
2094 } else if ((sstat0 & SELDO) != 0) {
2095 AIC_MISC(("selected "));
2096
2097 /* We have selected a target. Things to do:
2098 * a) Determine what message(s) to send.
2099 * b) Verify that we're still selecting the target.
2100 * c) Mark device as busy.
2101 */
2102 if (aic->state != AIC_SELECTING) {
2103 printf("aic at line %d: selection out while not selecting; resetting\n", __LINE__);
2104 AIC_BREAK();
2105 goto reset;
2106 }
2107 AIC_ASSERT(aic->nexus != NULL);
2108 acb = aic->nexus;
2109
2110 sc = acb->xs->sc_link;
2111 ti = &aic->tinfo[sc->target];
2112 if ((acb->xs->flags & SCSI_RESET) == 0) {
2113 aic->msgpriq = SEND_IDENTIFY;
2114 if (acb->flags != ACB_ABORTED) {
2115 if ((ti->flags & DO_SYNC) != 0)
2116 aic->msgpriq |= SEND_SDTR;
2117 if ((ti->flags & DO_WIDE) != 0)
2118 aic->msgpriq |= SEND_WDTR;
2119 } else {
2120 aic->flags |= AIC_ABORTING;
2121 aic->msgpriq |= SEND_ABORT;
2122 }
2123 } else
2124 aic->msgpriq = SEND_DEV_RESET;
2125
2126 ti->lubusy |= (1<<sc->lun);
2127
2128 /* Do an implicit RESTORE POINTERS. */
2129 aic->dp = acb->data_addr;
2130 aic->dleft = acb->data_length;
2131 aic->cp = (u_char *)&acb->scsi_cmd;
2132 aic->cleft = acb->scsi_cmd_length;
2133
2134 aic->state = AIC_CONNECTED;
2135 } else if ((sstat1 & SELTO) != 0) {
2136 AIC_MISC(("selection timeout "));
2137
2138 if (aic->state != AIC_SELECTING) {
2139 printf("aic at line %d: selection timeout while not selecting; resetting\n", __LINE__);
2140 AIC_BREAK();
2141 goto reset;
2142 }
2143 AIC_ASSERT(aic->nexus != NULL);
2144 acb = aic->nexus;
2145
2146 outb(SXFRCTL1, 0);
2147 outb(SCSISEQ, ENRESELI);
2148 outb(CLRSINT1, CLRSELTIMO);
2149
2150 acb->xs->error = XS_SELTIMEOUT;
2151 untimeout(aic_timeout, acb);
2152 delay(250);
2153 aic_done(aic, acb);
2154 goto out;
2155 } else {
2156 if (aic->state != AIC_IDLE) {
2157 printf("aic at line %d: BUS FREE while not idle; state=%d\n", __LINE__, aic->state);
2158 AIC_BREAK();
2159 goto out;
2160 }
2161
2162 aic_sched(aic);
2163 goto out;
2164 }
2165
2166 /*
2167 * Turn off selection stuff, and prepare to catch bus free
2168 * interrupts, parity errors, and phase changes.
2169 */
2170 outb(SXFRCTL1, 0);
2171 outb(SCSISEQ, ENAUTOATNP);
2172 outb(CLRSINT0, CLRSELDI|CLRSELDO);
2173 outb(CLRSINT1, CLRBUSFREE|CLRPHASECHG);
2174 outb(SIMODE0, 0);
2175 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENREQINIT|ENPHASECHG);
2176
2177 aic->flags = 0;
2178 aic->prevphase = PH_INVALID;
2179 goto dophase;
2180 }
2181
2182 outb(CLRSINT1, CLRPHASECHG);
2183
2184 if ((sstat1 & BUSFREE) != 0) {
2185 /* We've gone to BUS FREE phase. */
2186 outb(CLRSINT1, CLRBUSFREE);
2187
2188 switch (aic->state) {
2189 case AIC_RESELECTED:
2190 aic->state = AIC_IDLE;
2191 aic_sched(aic);
2192 break;
2193
2194 case AIC_CONNECTED:
2195 if ((aic->flags & AIC_ABORTING) == 0) {
2196 printf("aic at line %d: unexpected BUS FREE; aborting\n", __LINE__);
2197 AIC_BREAK();
2198 }
2199 AIC_ASSERT(aic->nexus != NULL);
2200 acb = aic->nexus;
2201 acb->xs->error = XS_DRIVER_STUFFUP;
2202 goto finish;
2203
2204 case AIC_DISCONNECT:
2205 AIC_ASSERT(aic->nexus != NULL);
2206 acb = aic->nexus;
2207 aic->state = AIC_IDLE;
2208 aic->nexus = NULL;
2209 TAILQ_INSERT_HEAD(&aic->nexus_list, acb, chain);
2210 aic_sched(aic);
2211 break;
2212
2213 case AIC_CMDCOMPLETE:
2214 AIC_ASSERT(aic->nexus != NULL);
2215 acb = aic->nexus;
2216 finish:
2217 untimeout(aic_timeout, acb);
2218 aic_done(aic, acb);
2219 break;
2220 }
2221 goto out;
2222 }
2223
2224 dophase:
2225 if ((sstat1 & REQINIT) == 0) {
2226 /* Wait for REQINIT. */
2227 goto out;
2228 }
2229
2230 phase = inb(SCSISIG) & PH_MASK;
2231 aic->phase = phase;
2232 outb(SCSISIG, phase);
2233
2234 switch (phase) {
2235 case PH_MSGOUT:
2236 /* If aborting, always handle MESSAGE OUT. */
2237 if ((aic->flags & AIC_ABORTING) == 0 &&
2238 (aic->state & AIC_CONNECTED) == 0)
2239 break;
2240 aic_msgout(aic);
2241 goto nextphase;
2242
2243 case PH_MSGIN:
2244 if ((aic->state & (AIC_CONNECTED|AIC_RESELECTED)) == 0)
2245 break;
2246 aic_msgin(aic);
2247 goto nextphase;
2248
2249 case PH_CMD: /* CMD phase & REQ asserted */
2250 if ((aic->state & AIC_CONNECTED) == 0)
2251 break;
2252 #if AIC_DEBUG
2253 if ((aic_debug & AIC_SHOWMISC) != 0) {
2254 AIC_ASSERT(aic->nexus != NULL);
2255 acb = aic->nexus;
2256 printf("cmd=0x%02x+%d ",
2257 acb->scsi_cmd.opcode, acb->scsi_cmd_length-1);
2258 }
2259 #endif
2260 n = aic_dataout_pio(aic, aic->cp, aic->cleft);
2261 aic->cp += n;
2262 aic->cleft -= n;
2263 goto nextphase;
2264
2265 case PH_DATAOUT:
2266 if ((aic->state & AIC_CONNECTED) == 0)
2267 break;
2268 AIC_MISC(("dataout dleft=%d ", aic->dleft));
2269 n = aic_dataout_pio(aic, aic->dp, aic->dleft);
2270 aic->dp += n;
2271 aic->dleft -= n;
2272 goto nextphase;
2273
2274 case PH_DATAIN:
2275 if ((aic->state & AIC_CONNECTED) == 0)
2276 break;
2277 AIC_MISC(("datain "));
2278 n = aic_datain_pio(aic, aic->dp, aic->dleft);
2279 aic->dp += n;
2280 aic->dleft -= n;
2281 goto nextphase;
2282
2283 case PH_STAT:
2284 if ((aic->state & AIC_CONNECTED) == 0)
2285 break;
2286 AIC_ASSERT(aic->nexus != NULL);
2287 acb = aic->nexus;
2288 outb(SXFRCTL0, CHEN|SPIOEN);
2289 outb(DMACNTRL0, RSTFIFO);
2290 acb->target_stat = inb(SCSIDAT);
2291 outb(SXFRCTL0, CHEN);
2292 outb(DMACNTRL0, RSTFIFO);
2293 while ((inb(SXFRCTL0) & SCSIEN) != 0)
2294 ;
2295 AIC_MISC(("target_stat=0x%02x ", acb->target_stat));
2296 goto nextphase;
2297 }
2298
2299 printf("aic at line %d: unexpected bus phase; resetting\n", __LINE__);
2300 AIC_BREAK();
2301 reset:
2302 aic_init(aic);
2303 return 1;
2304
2305 nextphase:
2306 aic->prevphase = phase;
2307
2308 out:
2309 outb(DMACNTRL0, INTEN);
2310 return 1;
2311 }
2312
2313 void
2314 aic_abort(aic, acb)
2315 struct aic_softc *aic;
2316 struct aic_acb *acb;
2317 {
2318
2319 if (aic->nexus == acb) {
2320 if (aic->state == AIC_CONNECTED) {
2321 aic->flags |= AIC_ABORTING;
2322 aic_sched_msgout(SEND_ABORT);
2323 }
2324 } else {
2325 aic_dequeue(aic, acb);
2326 TAILQ_INSERT_HEAD(&aic->ready_list, acb, chain);
2327 if (aic->state == AIC_IDLE)
2328 aic_sched(aic);
2329 }
2330 }
2331
2332 void
2333 aic_timeout(arg)
2334 void *arg;
2335 {
2336 struct aic_acb *acb = arg;
2337 struct scsi_xfer *xs = acb->xs;
2338 struct scsi_link *sc_link = xs->sc_link;
2339 struct aic_softc *aic = sc_link->adapter_softc;
2340 int s;
2341
2342 sc_print_addr(sc_link);
2343 printf("timed out");
2344
2345 s = splbio();
2346
2347 if (acb->flags == ACB_ABORTED) {
2348 /* abort timed out */
2349 printf(" AGAIN\n");
2350 acb->xs->retries = 0;
2351 aic_done(aic, acb);
2352 } else {
2353 /* abort the operation that has timed out */
2354 printf("\n");
2355 acb->xs->error = XS_TIMEOUT;
2356 acb->flags = ACB_ABORTED;
2357 aic_abort(aic, acb);
2358 /* 2 secs for the abort */
2359 if ((xs->flags & SCSI_POLL) == 0)
2360 timeout(aic_timeout, acb, 2 * hz);
2361 }
2362
2363 splx(s);
2364 }
2365
2366 #ifdef AIC_DEBUG
2368 /*
2369 * The following functions are mostly used for debugging purposes, either
2370 * directly called from the driver or from the kernel debugger.
2371 */
2372
2373 void
2374 aic_show_scsi_cmd(acb)
2375 struct aic_acb *acb;
2376 {
2377 u_char *b = (u_char *)&acb->scsi_cmd;
2378 struct scsi_link *sc = acb->xs->sc_link;
2379 int i;
2380
2381 sc_print_addr(sc);
2382 if ((acb->xs->flags & SCSI_RESET) == 0) {
2383 for (i = 0; i < acb->scsi_cmd_length; i++) {
2384 if (i)
2385 printf(",");
2386 printf("%x", b[i]);
2387 }
2388 printf("\n");
2389 } else
2390 printf("RESET\n");
2391 }
2392
2393 void
2394 aic_print_acb(acb)
2395 struct aic_acb *acb;
2396 {
2397
2398 printf("acb@%x xs=%x flags=%x", acb, acb->xs, acb->flags);
2399 printf(" dp=%x dleft=%d target_stat=%x\n",
2400 (long)acb->data_addr, acb->data_length, acb->target_stat);
2401 aic_show_scsi_cmd(acb);
2402 }
2403
2404 void
2405 aic_print_active_acb()
2406 {
2407 struct aic_acb *acb;
2408 struct aic_softc *aic = aiccd.cd_devs[0];
2409
2410 printf("ready list:\n");
2411 for (acb = aic->ready_list.tqh_first; acb != NULL;
2412 acb = acb->chain.tqe_next)
2413 aic_print_acb(acb);
2414 printf("nexus:\n");
2415 if (aic->nexus != NULL)
2416 aic_print_acb(aic->nexus);
2417 printf("nexus list:\n");
2418 for (acb = aic->nexus_list.tqh_first; acb != NULL;
2419 acb = acb->chain.tqe_next)
2420 aic_print_acb(acb);
2421 }
2422
2423 void
2424 aic_dump6360(aic)
2425 struct aic_softc *aic;
2426 {
2427
2428 printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIG=%x\n",
2429 inb(SCSISEQ), inb(SXFRCTL0), inb(SXFRCTL1), inb(SCSISIG));
2430 printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n",
2431 inb(SSTAT0), inb(SSTAT1), inb(SSTAT2), inb(SSTAT3), inb(SSTAT4));
2432 printf(" SIMODE0=%x SIMODE1=%x DMACNTRL0=%x DMACNTRL1=%x DMASTAT=%x\n",
2433 inb(SIMODE0), inb(SIMODE1), inb(DMACNTRL0), inb(DMACNTRL1),
2434 inb(DMASTAT));
2435 printf(" FIFOSTAT=%d SCSIBUS=0x%x\n",
2436 inb(FIFOSTAT), inb(SCSIBUS));
2437 }
2438
2439 void
2440 aic_dump_driver(aic)
2441 struct aic_softc *aic;
2442 {
2443 struct aic_tinfo *ti;
2444 int i;
2445
2446 printf("nexus=%x prevphase=%x\n", aic->nexus, aic->prevphase);
2447 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x msgout=%x\n",
2448 aic->state, aic->imess[0], aic->msgpriq, aic->msgoutq, aic->msgout);
2449 for (i = 0; i < 7; i++) {
2450 ti = &aic->tinfo[i];
2451 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2452 i, ti->cmds, ti->dconns, ti->touts);
2453 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2454 }
2455 }
2456 #endif
2457