aic6360.c revision 1.25
1 /* $NetBSD: aic6360.c,v 1.25 1995/01/07 06:49:35 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995 Charles Hannum. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Charles Hannum. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * Copyright (c) 1994 Jarle Greipsland 21 * All rights reserved. 22 * 23 * Redistribution and use in source and binary forms, with or without 24 * modification, are permitted provided that the following conditions 25 * are met: 26 * 1. Redistributions of source code must retain the above copyright 27 * notice, this list of conditions and the following disclaimer. 28 * 2. Redistributions in binary form must reproduce the above copyright 29 * notice, this list of conditions and the following disclaimer in the 30 * documentation and/or other materials provided with the distribution. 31 * 3. The name of the author may not be used to endorse or promote products 32 * derived from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 35 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 36 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 37 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 38 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 41 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 42 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 43 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 44 * POSSIBILITY OF SUCH DAMAGE. 45 */ 46 47 /* 48 * Acknowledgements: Many of the algorithms used in this driver are 49 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 50 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 51 */ 52 53 /* TODO list: 54 * 1) Get the DMA stuff working. 55 * 2) Get the iov/uio stuff working. Is this a good thing ??? 56 * 3) Get the synch stuff working. 57 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 58 */ 59 60 /* 61 * A few customizable items: 62 */ 63 64 /* The SCSI ID of the host adapter/computer */ 65 #define AIC_SCSI_HOSTID 7 66 67 /* Use doubleword transfers to/from SCSI chip. Note: This requires 68 * motherboard support. Basicly, some motherboard chipsets are able to 69 * split a 32 bit I/O operation into two 16 bit I/O operations, 70 * transparently to the processor. This speeds up some things, notably long 71 * data transfers. 72 */ 73 #define AIC_USE_DWORDS 0 74 75 /* Allow disconnects? Was mainly used in an early phase of the driver when 76 * the message system was very flaky. Should go away soon. 77 */ 78 #define AIC_ALLOW_DISCONNECT 1 79 80 /* Synchronous data transfers? */ 81 #define AIC_USE_SYNCHRONOUS 0 82 #define AIC_SYNC_PERIOD 200 83 #define AIC_SYNC_REQ_ACK_OFS 8 84 85 /* Wide data transfers? */ 86 #define AIC_USE_WIDE 0 87 #define AIC_MAX_WIDTH 0 88 89 /* Max attempts made to transmit a message */ 90 #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 91 92 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/ 93 #define AIC_USE_EISA_DMA 0 94 #define AIC_USE_ISA_DMA 0 95 96 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */ 97 #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */ 98 99 /* Some spin loop parameters (essentially how long to wait some places) 100 * The problem(?) is that sometimes we expect either to be able to transmit a 101 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 102 * returning from the interrupt just to get yanked back for the next byte we 103 * may spin in the interrupt routine waiting for this byte to come. How long? 104 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 105 */ 106 #define AIC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 107 #define AIC_MSGOUT_SPIN 1 108 109 /* Include debug functions? At the end of this file there are a bunch of 110 * functions that will print out various information regarding queued SCSI 111 * commands, driver state and chip contents. You can call them from the 112 * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the 113 * kernel uses less memory) but you lose the debugging facilities. 114 */ 115 #define AIC_DEBUG 1 116 117 /* End of customizable parameters */ 118 119 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA 120 #error "I said not yet! Start paying attention... grumble" 121 #endif 122 123 #include <sys/types.h> 124 #include <sys/param.h> 125 #include <sys/systm.h> 126 #include <sys/kernel.h> 127 #include <sys/errno.h> 128 #include <sys/ioctl.h> 129 #include <sys/device.h> 130 #include <sys/buf.h> 131 #include <sys/proc.h> 132 #include <sys/user.h> 133 #include <sys/queue.h> 134 135 #include <machine/pio.h> 136 137 #include <scsi/scsi_all.h> 138 #include <scsi/scsi_message.h> 139 #include <scsi/scsiconf.h> 140 141 #include <i386/isa/isavar.h> 142 143 /* Definitions, most of them has turned out to be unneccesary, but here they 144 * are anyway. 145 */ 146 147 /* AIC6360 definitions */ 148 #define IOBASE sc->sc_iobase 149 #define SCSISEQ (IOBASE + 0x00) /* SCSI sequence control */ 150 #define SXFRCTL0 (IOBASE + 0x01) /* SCSI transfer control 0 */ 151 #define SXFRCTL1 (IOBASE + 0x02) /* SCSI transfer control 1 */ 152 #define SCSISIG (IOBASE + 0x03) /* SCSI signal in/out */ 153 #define SCSIRATE (IOBASE + 0x04) /* SCSI rate control */ 154 #define SCSIID (IOBASE + 0x05) /* SCSI ID */ 155 #define SELID (IOBASE + 0x05) /* Selection/Reselection ID */ 156 #define SCSIDAT (IOBASE + 0x06) /* SCSI Latched Data */ 157 #define SCSIBUS (IOBASE + 0x07) /* SCSI Data Bus*/ 158 #define STCNT0 (IOBASE + 0x08) /* SCSI transfer count */ 159 #define STCNT1 (IOBASE + 0x09) 160 #define STCNT2 (IOBASE + 0x0a) 161 #define CLRSINT0 (IOBASE + 0x0b) /* Clear SCSI interrupts 0 */ 162 #define SSTAT0 (IOBASE + 0x0b) /* SCSI interrupt status 0 */ 163 #define CLRSINT1 (IOBASE + 0x0c) /* Clear SCSI interrupts 1 */ 164 #define SSTAT1 (IOBASE + 0x0c) /* SCSI status 1 */ 165 #define SSTAT2 (IOBASE + 0x0d) /* SCSI status 2 */ 166 #define SCSITEST (IOBASE + 0x0e) /* SCSI test control */ 167 #define SSTAT3 (IOBASE + 0x0e) /* SCSI status 3 */ 168 #define CLRSERR (IOBASE + 0x0f) /* Clear SCSI errors */ 169 #define SSTAT4 (IOBASE + 0x0f) /* SCSI status 4 */ 170 #define SIMODE0 (IOBASE + 0x10) /* SCSI interrupt mode 0 */ 171 #define SIMODE1 (IOBASE + 0x11) /* SCSI interrupt mode 1 */ 172 #define DMACNTRL0 (IOBASE + 0x12) /* DMA control 0 */ 173 #define DMACNTRL1 (IOBASE + 0x13) /* DMA control 1 */ 174 #define DMASTAT (IOBASE + 0x14) /* DMA status */ 175 #define FIFOSTAT (IOBASE + 0x15) /* FIFO status */ 176 #define DMADATA (IOBASE + 0x16) /* DMA data */ 177 #define DMADATAL (IOBASE + 0x16) /* DMA data low byte */ 178 #define DMADATAH (IOBASE + 0x17) /* DMA data high byte */ 179 #define BRSTCNTRL (IOBASE + 0x18) /* Burst Control */ 180 #define DMADATALONG (IOBASE + 0x18) 181 #define PORTA (IOBASE + 0x1a) /* Port A */ 182 #define PORTB (IOBASE + 0x1b) /* Port B */ 183 #define REV (IOBASE + 0x1c) /* Revision (001 for 6360) */ 184 #define STACK (IOBASE + 0x1d) /* Stack */ 185 #define TEST (IOBASE + 0x1e) /* Test register */ 186 #define ID (IOBASE + 0x1f) /* ID register */ 187 188 #define IDSTRING "(C)1991ADAPTECAIC6360 " 189 190 /* What all the bits do */ 191 192 /* SCSISEQ */ 193 #define TEMODEO 0x80 194 #define ENSELO 0x40 195 #define ENSELI 0x20 196 #define ENRESELI 0x10 197 #define ENAUTOATNO 0x08 198 #define ENAUTOATNI 0x04 199 #define ENAUTOATNP 0x02 200 #define SCSIRSTO 0x01 201 202 /* SXFRCTL0 */ 203 #define SCSIEN 0x80 204 #define DMAEN 0x40 205 #define CHEN 0x20 206 #define CLRSTCNT 0x10 207 #define SPIOEN 0x08 208 #define CLRCH 0x02 209 210 /* SXFRCTL1 */ 211 #define BITBUCKET 0x80 212 #define SWRAPEN 0x40 213 #define ENSPCHK 0x20 214 #define STIMESEL1 0x10 215 #define STIMESEL0 0x08 216 #define STIMO_256ms 0x00 217 #define STIMO_128ms 0x08 218 #define STIMO_64ms 0x10 219 #define STIMO_32ms 0x18 220 #define ENSTIMER 0x04 221 #define BYTEALIGN 0x02 222 223 /* SCSISIG (in) */ 224 #define CDI 0x80 225 #define IOI 0x40 226 #define MSGI 0x20 227 #define ATNI 0x10 228 #define SELI 0x08 229 #define BSYI 0x04 230 #define REQI 0x02 231 #define ACKI 0x01 232 233 /* Important! The 3 most significant bits of this register, in initiator mode, 234 * represents the "expected" SCSI bus phase and can be used to trigger phase 235 * mismatch and phase change interrupts. But more important: If there is a 236 * phase mismatch the chip will not transfer any data! This is actually a nice 237 * feature as it gives us a bit more control over what is happening when we are 238 * bursting data (in) through the FIFOs and the phase suddenly changes from 239 * DATA IN to STATUS or MESSAGE IN. The transfer will stop and wait for the 240 * proper phase to be set in this register instead of dumping the bits into the 241 * FIFOs. 242 */ 243 /* SCSISIG (out) */ 244 #define CDO 0x80 245 #define IOO 0x40 246 #define MSGO 0x20 247 #define ATNO 0x10 248 #define SELO 0x08 249 #define BSYO 0x04 250 #define REQO 0x02 251 #define ACKO 0x01 252 253 /* Information transfer phases */ 254 #define PH_DATAOUT (0) 255 #define PH_DATAIN (IOI) 256 #define PH_CMD (CDI) 257 #define PH_STAT (CDI | IOI) 258 #define PH_MSGOUT (MSGI | CDI) 259 #define PH_MSGIN (MSGI | CDI | IOI) 260 261 #define PH_MASK (MSGI | CDI | IOI) 262 263 #define PH_INVALID 0xff 264 265 /* SCSIRATE */ 266 #define SXFR2 0x40 267 #define SXFR1 0x20 268 #define SXFR0 0x10 269 #define SOFS3 0x08 270 #define SOFS2 0x04 271 #define SOFS1 0x02 272 #define SOFS0 0x01 273 274 /* SCSI ID */ 275 #define OID2 0x40 276 #define OID1 0x20 277 #define OID0 0x10 278 #define OID_S 4 /* shift value */ 279 #define TID2 0x04 280 #define TID1 0x02 281 #define TID0 0x01 282 #define SCSI_ID_MASK 0x7 283 284 /* SCSI selection/reselection ID (both target *and* initiator) */ 285 #define SELID7 0x80 286 #define SELID6 0x40 287 #define SELID5 0x20 288 #define SELID4 0x10 289 #define SELID3 0x08 290 #define SELID2 0x04 291 #define SELID1 0x02 292 #define SELID0 0x01 293 294 /* CLRSINT0 Clears what? (interrupt and/or status bit) */ 295 #define SETSDONE 0x80 296 #define CLRSELDO 0x40 /* I */ 297 #define CLRSELDI 0x20 /* I+ */ 298 #define CLRSELINGO 0x10 /* I */ 299 #define CLRSWRAP 0x08 /* I+S */ 300 #define CLRSDONE 0x04 /* I+S */ 301 #define CLRSPIORDY 0x02 /* I */ 302 #define CLRDMADONE 0x01 /* I */ 303 304 /* SSTAT0 Howto clear */ 305 #define TARGET 0x80 306 #define SELDO 0x40 /* Selfclearing */ 307 #define SELDI 0x20 /* Selfclearing when CLRSELDI is set */ 308 #define SELINGO 0x10 /* Selfclearing */ 309 #define SWRAP 0x08 /* CLRSWAP */ 310 #define SDONE 0x04 /* Not used in initiator mode */ 311 #define SPIORDY 0x02 /* Selfclearing (op on SCSIDAT) */ 312 #define DMADONE 0x01 /* Selfclearing (all FIFOs empty & T/C */ 313 314 /* CLRSINT1 Clears what? */ 315 #define CLRSELTIMO 0x80 /* I+S */ 316 #define CLRATNO 0x40 317 #define CLRSCSIRSTI 0x20 /* I+S */ 318 #define CLRBUSFREE 0x08 /* I+S */ 319 #define CLRSCSIPERR 0x04 /* I+S */ 320 #define CLRPHASECHG 0x02 /* I+S */ 321 #define CLRREQINIT 0x01 /* I+S */ 322 323 /* SSTAT1 How to clear? When set?*/ 324 #define SELTO 0x80 /* C select out timeout */ 325 #define ATNTARG 0x40 /* Not used in initiator mode */ 326 #define SCSIRSTI 0x20 /* C RST asserted */ 327 #define PHASEMIS 0x10 /* Selfclearing */ 328 #define BUSFREE 0x08 /* C bus free condition */ 329 #define SCSIPERR 0x04 /* C parity error on inbound data */ 330 #define PHASECHG 0x02 /* C phase in SCSISIG doesn't match */ 331 #define REQINIT 0x01 /* C or ACK asserting edge of REQ */ 332 333 /* SSTAT2 */ 334 #define SOFFSET 0x20 335 #define SEMPTY 0x10 336 #define SFULL 0x08 337 #define SFCNT2 0x04 338 #define SFCNT1 0x02 339 #define SFCNT0 0x01 340 341 /* SCSITEST */ 342 #define SCTESTU 0x08 343 #define SCTESTD 0x04 344 #define STCTEST 0x01 345 346 /* SSTAT3 */ 347 #define SCSICNT3 0x80 348 #define SCSICNT2 0x40 349 #define SCSICNT1 0x20 350 #define SCSICNT0 0x10 351 #define OFFCNT3 0x08 352 #define OFFCNT2 0x04 353 #define OFFCNT1 0x02 354 #define OFFCNT0 0x01 355 356 /* CLRSERR */ 357 #define CLRSYNCERR 0x04 358 #define CLRFWERR 0x02 359 #define CLRFRERR 0x01 360 361 /* SSTAT4 */ 362 #define SYNCERR 0x04 363 #define FWERR 0x02 364 #define FRERR 0x01 365 366 /* SIMODE0 */ 367 #define ENSELDO 0x40 368 #define ENSELDI 0x20 369 #define ENSELINGO 0x10 370 #define ENSWRAP 0x08 371 #define ENSDONE 0x04 372 #define ENSPIORDY 0x02 373 #define ENDMADONE 0x01 374 375 /* SIMODE1 */ 376 #define ENSELTIMO 0x80 377 #define ENATNTARG 0x40 378 #define ENSCSIRST 0x20 379 #define ENPHASEMIS 0x10 380 #define ENBUSFREE 0x08 381 #define ENSCSIPERR 0x04 382 #define ENPHASECHG 0x02 383 #define ENREQINIT 0x01 384 385 /* DMACNTRL0 */ 386 #define ENDMA 0x80 387 #define B8MODE 0x40 388 #define DMA 0x20 389 #define DWORDPIO 0x10 390 #define WRITE 0x08 391 #define INTEN 0x04 392 #define RSTFIFO 0x02 393 #define SWINT 0x01 394 395 /* DMACNTRL1 */ 396 #define PWRDWN 0x80 397 #define ENSTK32 0x40 398 #define STK4 0x10 399 #define STK3 0x08 400 #define STK2 0x04 401 #define STK1 0x02 402 #define STK0 0x01 403 404 /* DMASTAT */ 405 #define ATDONE 0x80 406 #define WORDRDY 0x40 407 #define INTSTAT 0x20 408 #define DFIFOFULL 0x10 409 #define DFIFOEMP 0x08 410 #define DFIFOHF 0x04 411 #define DWORDRDY 0x02 412 413 /* BRSTCNTRL */ 414 #define BON3 0x80 415 #define BON2 0x40 416 #define BON1 0x20 417 #define BON0 0x10 418 #define BOFF3 0x08 419 #define BOFF2 0x04 420 #define BOFF1 0x02 421 #define BOFF0 0x01 422 423 /* TEST */ 424 #define BOFFTMR 0x40 425 #define BONTMR 0x20 426 #define STCNTH 0x10 427 #define STCNTM 0x08 428 #define STCNTL 0x04 429 #define SCSIBLK 0x02 430 #define DMABLK 0x01 431 432 #ifdef DDB 434 int Debugger(); 435 #else DDB 436 #define Debugger() panic("should call debugger here (aic6360.c)") 437 #endif DDB 438 439 typedef u_long physaddr; 440 typedef u_long physlen; 441 442 struct aic_dma_seg { 443 physaddr seg_addr; 444 physlen seg_len; 445 }; 446 447 extern int delaycount; 448 #define FUDGE(X) ((X)>>1) /* get 1 ms spincount */ 449 #define MINIFUDGE(X) ((X)>>4) /* get (approx) 125us spincount */ 450 #define AIC_NSEG 16 451 #define NUM_CONCURRENT 7 /* Only one per target for now */ 452 453 /* 454 * ACB. Holds additional information for each SCSI command Comments: We 455 * need a separate scsi command block because we may need to overwrite it 456 * with a request sense command. Basicly, we refrain from fiddling with 457 * the scsi_xfer struct (except do the expected updating of return values). 458 * We'll generally update: xs->{flags,resid,error,sense,status} and 459 * occasionally xs->retries. 460 */ 461 struct aic_acb { 462 struct scsi_generic scsi_cmd; 463 int scsi_cmd_length; 464 u_char *data_addr; /* Saved data pointer */ 465 int data_length; /* Residue */ 466 467 u_char target_stat; /* SCSI status byte */ 468 469 /* struct aic_dma_seg dma[AIC_NSEG]; /* Physical addresses+len */ 470 471 TAILQ_ENTRY(aic_acb) chain; 472 struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ 473 int flags; 474 #define ACB_FREE 0 475 #define ACB_ACTIVE 1 476 #define ACB_CHKSENSE 2 477 #define ACB_ABORTED 3 478 }; 479 480 /* 481 * Some info about each (possible) target on the SCSI bus. This should 482 * probably have been a "per target+lunit" structure, but we'll leave it at 483 * this for now. 484 */ 485 struct aic_tinfo { 486 int cmds; /* #commands processed */ 487 int dconns; /* #disconnects */ 488 int touts; /* #timeouts */ 489 int perrs; /* #parity errors */ 490 int senses; /* #request sense commands sent */ 491 ushort lubusy; /* What local units/subr. are busy? */ 492 u_char flags; 493 #define DO_SYNC 0x01 /* (Re)Negotiate synchronous options */ 494 #define DO_WIDE 0x02 /* (Re)Negotiate wide options */ 495 u_char period; /* Period suggestion */ 496 u_char offset; /* Offset suggestion */ 497 u_char width; /* Width suggestion */ 498 u_char syncdata; /* True negotiated synch parameters */ 499 } tinfo_t; 500 501 struct aic_softc { 502 struct device sc_dev; 503 struct isadev sc_id; 504 struct intrhand sc_ih; 505 506 int sc_iobase; 507 int sc_irq, sc_drq; 508 509 struct scsi_link sc_link; /* prototype for subdevs */ 510 511 TAILQ_HEAD(, aic_acb) free_list, ready_list, nexus_list; 512 struct aic_acb *sc_nexus; /* current command */ 513 struct aic_acb sc_acb[NUM_CONCURRENT]; 514 struct aic_tinfo sc_tinfo[8]; 515 516 /* Data about the current nexus (updated for every cmd switch) */ 517 u_char *sc_dp; /* Current data pointer */ 518 size_t sc_dleft; /* Data bytes left to transfer */ 519 u_char *sc_cp; /* Current command pointer */ 520 size_t sc_cleft; /* Command bytes left to transfer */ 521 522 /* Adapter state */ 523 u_char sc_phase; /* Current bus phase */ 524 u_char sc_prevphase; /* Previous bus phase */ 525 u_char sc_state; /* State applicable to the adapter */ 526 #define AIC_IDLE 0x01 527 #define AIC_SELECTING 0x02 /* SCSI command is arbiting */ 528 #define AIC_RESELECTED 0x04 /* Has been reselected */ 529 #define AIC_CONNECTED 0x08 /* Actively using the SCSI bus */ 530 #define AIC_DISCONNECT 0x10 /* MSG_DISCONNECT received */ 531 #define AIC_CMDCOMPLETE 0x20 /* MSG_CMDCOMPLETE received */ 532 #define AIC_CLEANING 0x40 533 u_char sc_flags; 534 #define AIC_DROP_MSGIN 0x01 /* Discard all msgs (parity err detected) */ 535 #define AIC_ABORTING 0x02 /* Bailing out */ 536 #define AIC_DOINGDMA 0x04 /* The FIFO data path is active! */ 537 538 /* Debugging stuff */ 539 u_char sc_progress; /* Set if interrupt has achieved progress */ 540 541 /* Message stuff */ 542 u_char sc_msgpriq; /* Messages we want to send */ 543 u_char sc_msgoutq; /* Messages sent during last MESSAGE OUT */ 544 u_char sc_msgout; /* Message last transmitted */ 545 #define SEND_DEV_RESET 0x01 546 #define SEND_PARITY_ERROR 0x02 547 #define SEND_ABORT 0x04 548 #define SEND_REJECT 0x08 549 #define SEND_INIT_DET_ERR 0x10 550 #define SEND_IDENTIFY 0x20 551 #define SEND_SDTR 0x40 552 #define SEND_WDTR 0x80 553 #define AIC_MAX_MSG_LEN 8 554 u_char sc_omess[AIC_MAX_MSG_LEN]; 555 u_char *sc_omp; /* Outgoing message pointer */ 556 u_char sc_imess[AIC_MAX_MSG_LEN]; 557 u_char *sc_imp; /* Incoming message pointer */ 558 }; 559 560 #if AIC_DEBUG 561 #define AIC_SHOWACBS 0x01 562 #define AIC_SHOWINTS 0x02 563 #define AIC_SHOWCMDS 0x04 564 #define AIC_SHOWMISC 0x08 565 #define AIC_SHOWTRACE 0x10 566 #define AIC_SHOWSTART 0x20 567 #define AIC_DOBREAK 0x40 568 int aic_debug = 0x00; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRACE; /**/ 569 #define AIC_PRINT(b, s) do {if ((aic_debug & (b)) != 0) printf s;} while (0) 570 #define AIC_BREAK() do {if ((aic_debug & AIC_DOBREAK) != 0) Debugger();} while (0) 571 #define AIC_ASSERT(x) do {if (x) {} else {printf("%s at line %d: assertion failed\n", sc->sc_dev.dv_xname, __LINE__); Debugger();}} while (0) 572 #else 573 #define AIC_PRINT(b, s) 574 #define AIC_BREAK() 575 #define AIC_ASSERT(x) 576 #endif 577 578 #define AIC_ACBS(s) AIC_PRINT(AIC_SHOWACBS, s) 579 #define AIC_INTS(s) AIC_PRINT(AIC_SHOWINTS, s) 580 #define AIC_CMDS(s) AIC_PRINT(AIC_SHOWCMDS, s) 581 #define AIC_MISC(s) AIC_PRINT(AIC_SHOWMISC, s) 582 #define AIC_TRACE(s) AIC_PRINT(AIC_SHOWTRACE, s) 583 #define AIC_START(s) AIC_PRINT(AIC_SHOWSTART, s) 584 585 int aicprobe __P((struct device *, void *, void *)); 586 void aicattach __P((struct device *, struct device *, void *)); 587 void aic_minphys __P((struct buf *)); 588 int aicintr __P((struct aic_softc *)); 589 void aic_init __P((struct aic_softc *)); 590 void aic_done __P((struct aic_softc *, struct aic_acb *)); 591 void aic_dequeue __P((struct aic_softc *, struct aic_acb *)); 592 int aic_scsi_cmd __P((struct scsi_xfer *)); 593 int aic_poll __P((struct aic_softc *, struct scsi_xfer *, int)); 594 void aic_select __P((struct aic_softc *, struct aic_acb *)); 595 void aic_timeout __P((void *arg)); 596 int aic_find __P((struct aic_softc *)); 597 void aic_sched __P((struct aic_softc *)); 598 void aic_scsi_reset __P((struct aic_softc *)); 599 #if AIC_DEBUG 600 void aic_print_active_acb(); 601 void aic_dump_driver(); 602 void aic_dump6360(); 603 #endif 604 605 struct cfdriver aiccd = { 606 NULL, "aic", aicprobe, aicattach, DV_DULL, sizeof(struct aic_softc) 607 }; 608 609 struct scsi_adapter aic_switch = { 610 aic_scsi_cmd, 611 aic_minphys, 612 0, 613 0, 614 }; 615 616 struct scsi_device aic_dev = { 617 NULL, /* Use default error handler */ 618 NULL, /* have a queue, served by this */ 619 NULL, /* have no async handler */ 620 NULL, /* Use default 'done' routine */ 621 }; 622 623 /* 625 * INITIALIZATION ROUTINES (probe, attach ++) 626 */ 627 628 /* 629 * aicprobe: probe for AIC6360 SCSI-controller 630 * returns non-zero value if a controller is found. 631 */ 632 int 633 aicprobe(parent, match, aux) 634 struct device *parent; 635 void *match, *aux; 636 { 637 struct aic_softc *sc = match; 638 struct isa_attach_args *ia = aux; 639 int i, len, ic; 640 641 #ifdef NEWCONFIG 642 if (ia->ia_iobase == IOBASEUNK) 643 return 0; 644 #endif 645 646 sc->sc_iobase = ia->ia_iobase; 647 if (aic_find(sc) != 0) 648 return 0; 649 650 #ifdef NEWCONFIG 651 if (ia->ia_irq != IRQUNK) { 652 if (ia->ia_irq != sc->sc_irq) { 653 printf("%s: irq mismatch; kernel configured %d != board configured %d\n", 654 sc->sc_dev.dv_xname, ia->ia_irq, sc->sc_irq); 655 return 0; 656 } 657 } else 658 ia->ia_irq = sc->sc_irq; 659 660 if (ia->ia_drq != DRQUNK) { 661 if (ia->ia_drq != sc->sc_drq) { 662 printf("%s: drq mismatch; kernel configured %d != board configured %d\n", 663 sc->sc_dev.dv_xname, ia->ia_drq, sc->sc_drq); 664 return 0; 665 } 666 } else 667 ia->ia_drq = sc->sc_drq; 668 #endif 669 670 ia->ia_msize = 0; 671 ia->ia_iosize = 0x20; 672 return 1; 673 } 674 675 /* Do the real search-for-device. 676 * Prerequisite: sc->sc_iobase should be set to the proper value 677 */ 678 int 679 aic_find(sc) 680 struct aic_softc *sc; 681 { 682 char chip_id[sizeof(IDSTRING)]; /* For chips that support it */ 683 char *start; 684 int i; 685 686 /* Remove aic6360 from possible powerdown mode */ 687 outb(DMACNTRL0, 0); 688 689 /* Thanks to mark (at) aggregate.com for the new method for detecting 690 * whether the chip is present or not. Bonus: may also work for 691 * the AIC-6260! 692 */ 693 AIC_TRACE(("aic: probing for aic-chip at port 0x%x\n", 694 sc->sc_iobase)); 695 /* 696 * Linux also init's the stack to 1-16 and then clears it, 697 * 6260's don't appear to have an ID reg - mpg 698 */ 699 /* Push the sequence 0,1,..,15 on the stack */ 700 #define STSIZE 16 701 outb(DMACNTRL1, 0); /* Reset stack pointer */ 702 for (i = 0; i < STSIZE; i++) 703 outb(STACK, i); 704 705 /* See if we can pull out the same sequence */ 706 outb(DMACNTRL1, 0); 707 for (i = 0; i < STSIZE && inb(STACK) == i; i++) 708 ; 709 if (i != STSIZE) { 710 AIC_START(("STACK futzed at %d.\n", i)); 711 return ENXIO; 712 } 713 714 /* See if we can pull the id string out of the ID register, 715 * now only used for informational purposes. 716 */ 717 bzero(chip_id, sizeof(chip_id)); 718 insb(ID, chip_id, sizeof(IDSTRING)-1); 719 AIC_START(("AIC found at 0x%x ", sc->sc_iobase)); 720 AIC_START(("ID: %s ",chip_id)); 721 AIC_START(("chip revision %d\n",(int)inb(REV))); 722 return 0; 723 } 724 725 int 726 aicprint() 727 { 728 } 729 730 /* 731 * Attach the AIC6360, fill out some high and low level data structures 732 */ 733 void 734 aicattach(parent, self, aux) 735 struct device *parent, *self; 736 void *aux; 737 { 738 struct isa_attach_args *ia = aux; 739 struct aic_softc *sc = (void *)self; 740 741 AIC_TRACE(("aicattach ")); 742 sc->sc_state = 0; 743 aic_init(sc); /* Init chip and driver */ 744 745 /* 746 * Fill in the prototype scsi_link 747 */ 748 sc->sc_link.adapter_softc = sc; 749 sc->sc_link.adapter_target = AIC_SCSI_HOSTID; 750 sc->sc_link.adapter = &aic_switch; 751 sc->sc_link.device = &aic_dev; 752 sc->sc_link.openings = 2; 753 754 printf("\n"); 755 756 #ifdef NEWCONFIG 757 isa_establish(&sc->sc_id, &sc->sc_dev); 758 #endif 759 sc->sc_ih.ih_fun = aicintr; 760 sc->sc_ih.ih_arg = sc; 761 sc->sc_ih.ih_level = IPL_BIO; 762 intr_establish(ia->ia_irq, IST_EDGE, &sc->sc_ih); 763 764 config_found(self, &sc->sc_link, aicprint); 765 } 766 767 768 /* Initialize AIC6360 chip itself 769 * The following conditions should hold: 770 * aicprobe should have succeeded, i.e. the iobase address in aic_softc must 771 * be valid. 772 */ 773 static void 774 aic6360_reset(sc) 775 struct aic_softc *sc; 776 { 777 778 outb(SCSITEST, 0); /* Doc. recommends to clear these two */ 779 outb(TEST, 0); /* registers before operations commence */ 780 781 /* Reset SCSI-FIFO and abort any transfers */ 782 outb(SXFRCTL0, CHEN|CLRCH|CLRSTCNT); 783 784 /* Reset DMA-FIFO */ 785 outb(DMACNTRL0, RSTFIFO); 786 outb(DMACNTRL1, 0); 787 788 outb(SCSISEQ, 0); /* Disable all selection features */ 789 outb(SXFRCTL1, 0); 790 791 outb(SIMODE0, 0x00); /* Disable some interrupts */ 792 outb(CLRSINT0, 0x7f); /* Clear a slew of interrupts */ 793 794 outb(SIMODE1, 0x00); /* Disable some more interrupts */ 795 outb(CLRSINT1, 0xef); /* Clear another slew of interrupts */ 796 797 outb(SCSIRATE, 0); /* Disable synchronous transfers */ 798 799 outb(CLRSERR, 0x07); /* Haven't seen ant errors (yet) */ 800 801 outb(SCSIID, AIC_SCSI_HOSTID << OID_S); /* Set our SCSI-ID */ 802 outb(BRSTCNTRL, EISA_BRST_TIM); 803 } 804 805 /* Pull the SCSI RST line for 500 us */ 806 void 807 aic_scsi_reset(sc) 808 struct aic_softc *sc; 809 { 810 811 outb(SCSISEQ, SCSIRSTO); 812 delay(500); 813 outb(SCSISEQ, 0); 814 delay(50); 815 } 816 817 /* 818 * Initialize aic SCSI driver, also (conditonally) reset the SCSI bus. 819 * The reinitialization is still buggy (e.g. on SCSI resets). 820 */ 821 void 822 aic_init(sc) 823 struct aic_softc *sc; 824 { 825 struct aic_acb *acb; 826 int r; 827 828 aic_scsi_reset(sc); 829 aic6360_reset(sc); /* Clean up our own hardware */ 830 831 /*XXX*/ /* If not the first time (probably a reset condition), 832 * we should clean queues with active commands 833 */ 834 if (sc->sc_state == 0) { /* First time through */ 835 TAILQ_INIT(&sc->ready_list); 836 TAILQ_INIT(&sc->nexus_list); 837 TAILQ_INIT(&sc->free_list); 838 sc->sc_nexus = NULL; 839 acb = sc->sc_acb; 840 bzero(acb, sizeof(sc->sc_acb)); 841 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 842 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 843 acb++; 844 } 845 bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo)); 846 } else { 847 sc->sc_state = AIC_CLEANING; 848 if ((acb = sc->sc_nexus) != NULL) { 849 acb->xs->error = XS_DRIVER_STUFFUP; 850 untimeout(aic_timeout, acb); 851 aic_done(sc, acb); 852 } 853 while (acb = sc->nexus_list.tqh_first) { 854 acb->xs->error = XS_DRIVER_STUFFUP; 855 untimeout(aic_timeout, acb); 856 aic_done(sc, acb); 857 } 858 } 859 860 sc->sc_prevphase = PH_INVALID; 861 for (r = 0; r < 8; r++) { 862 struct aic_tinfo *ti = &sc->sc_tinfo[r]; 863 864 ti->flags = 0; 865 #if AIC_USE_SYNCHRONOUS 866 ti->flags |= DO_SYNC; 867 ti->period = AIC_SYNC_PERIOD; 868 ti->offset = AIC_SYNC_REQ_ACK_OFS; 869 #endif 870 #if AIC_USE_WIDE 871 ti->flags |= DO_WIDE; 872 ti->width = AIC_MAX_WIDTH; 873 #endif 874 ti->syncdata = 0; 875 } 876 877 sc->sc_state = AIC_IDLE; 878 outb(DMACNTRL0, INTEN); 879 } 880 881 void 882 aic_free_acb(sc, acb, flags) 883 struct aic_softc *sc; 884 struct aic_acb *acb; 885 int flags; 886 { 887 int s; 888 889 s = splbio(); 890 891 acb->flags = ACB_FREE; 892 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 893 if (acb->chain.tqe_next == 0) 894 wakeup(&sc->free_list); 895 896 splx(s); 897 } 898 899 struct aic_acb * 900 aic_get_acb(sc, flags) 901 struct aic_softc *sc; 902 int flags; 903 { 904 int s; 905 struct aic_acb *acb; 906 907 /* Get a aic command block */ 908 s = splbio(); 909 910 while ((acb = sc->free_list.tqh_first) == NULL && 911 (flags & SCSI_NOSLEEP) == 0) 912 tsleep(&sc->free_list, PRIBIO, "aicacb", 0); 913 if (acb) { 914 TAILQ_REMOVE(&sc->free_list, acb, chain); 915 acb->flags = ACB_ACTIVE; 916 } 917 918 splx(s); 919 return acb; 920 } 921 922 /* 924 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 925 */ 926 927 /* 928 * Expected sequence: 929 * 1) Command inserted into ready list 930 * 2) Command selected for execution 931 * 3) Command won arbitration and has selected target device 932 * 4) Send message out (identify message, eventually also sync.negotiations) 933 * 5) Send command 934 * 5a) Receive disconnect message, disconnect. 935 * 5b) Reselected by target 936 * 5c) Receive identify message from target. 937 * 6) Send or receive data 938 * 7) Receive status 939 * 8) Receive message (command complete etc.) 940 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd. 941 * Repeat 2-8 (no disconnects please...) 942 */ 943 944 /* 945 * Start a SCSI-command 946 * This function is called by the higher level SCSI-driver to queue/run 947 * SCSI-commands. 948 */ 949 int 950 aic_scsi_cmd(xs) 951 struct scsi_xfer *xs; 952 { 953 struct scsi_link *sc_link = xs->sc_link; 954 struct aic_softc *sc = sc_link->adapter_softc; 955 struct aic_acb *acb; 956 int s, flags; 957 958 AIC_TRACE(("aic_scsi_cmd ")); 959 AIC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 960 sc_link->target)); 961 962 flags = xs->flags; 963 964 if ((acb = aic_get_acb(sc, flags)) == NULL) { 965 xs->error = XS_DRIVER_STUFFUP; 966 return TRY_AGAIN_LATER; 967 } 968 969 /* Initialize acb */ 970 acb->xs = xs; 971 bcopy(xs->cmd, &acb->scsi_cmd, xs->cmdlen); 972 acb->scsi_cmd_length = xs->cmdlen; 973 acb->data_addr = xs->data; 974 acb->data_length = xs->datalen; 975 acb->target_stat = 0; 976 977 s = splbio(); 978 979 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 980 if (sc->sc_state == AIC_IDLE) 981 aic_sched(sc); 982 983 if ((flags & SCSI_POLL) == 0) { /* Almost done. Wait outside */ 984 timeout(aic_timeout, acb, (xs->timeout * hz) / 1000); 985 splx(s); 986 return SUCCESSFULLY_QUEUED; 987 } 988 989 splx(s); 990 991 /* Not allowed to use interrupts, use polling instead */ 992 if (aic_poll(sc, xs, xs->timeout)) { 993 aic_timeout(acb); 994 if (aic_poll(sc, xs, 2000)) 995 aic_timeout(acb); 996 } 997 return COMPLETE; 998 } 999 1000 /* 1001 * Adjust transfer size in buffer structure 1002 */ 1003 void 1004 aic_minphys(bp) 1005 struct buf *bp; 1006 { 1007 1008 AIC_TRACE(("aic_minphys ")); 1009 if (bp->b_bcount > (AIC_NSEG << PGSHIFT)) 1010 bp->b_bcount = (AIC_NSEG << PGSHIFT); 1011 } 1012 1013 /* 1014 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 1015 */ 1016 int 1017 aic_poll(sc, xs, count) 1018 struct aic_softc *sc; 1019 struct scsi_xfer *xs; 1020 int count; 1021 { 1022 1023 AIC_TRACE(("aic_poll ")); 1024 while (count) { 1025 /* 1026 * If we had interrupts enabled, would we 1027 * have got an interrupt? 1028 */ 1029 if ((inb(DMASTAT) & INTSTAT) != 0) 1030 aicintr(sc); 1031 if ((xs->flags & ITSDONE) != 0) 1032 return 0; 1033 delay(1000); 1034 count--; 1035 } 1036 return 1; 1037 } 1038 1039 /* 1041 * Start a selection. This is used by aic_sched() to select an idle target, 1042 * and by aic_done() to immediately reselect a target to get sense information. 1043 */ 1044 void 1045 aic_select(sc, acb) 1046 struct aic_softc *sc; 1047 struct aic_acb *acb; 1048 { 1049 struct scsi_link *sc_link = acb->xs->sc_link; 1050 int target = sc_link->target; 1051 struct aic_tinfo *ti = &sc->sc_tinfo[target]; 1052 1053 outb(SCSIID, AIC_SCSI_HOSTID << OID_S | target); 1054 outb(SCSIRATE, ti->syncdata); 1055 outb(SXFRCTL1, STIMO_256ms|ENSTIMER); 1056 /* Always enable reselections. */ 1057 outb(SIMODE0, ENSELDI|ENSELDO); 1058 outb(SIMODE1, ENSCSIRST|ENSELTIMO); 1059 outb(SCSISEQ, ENRESELI|ENSELO|ENAUTOATNO); 1060 1061 sc->sc_state = AIC_SELECTING; 1062 } 1063 1064 /* 1066 * Schedule a SCSI operation. This has now been pulled out of the interrupt 1067 * handler so that we may call it from aic_scsi_cmd and aic_done. This may 1068 * save us an unecessary interrupt just to get things going. Should only be 1069 * called when state == AIC_IDLE and at bio pl. 1070 */ 1071 void 1072 aic_sched(sc) 1073 register struct aic_softc *sc; 1074 { 1075 struct aic_acb *acb; 1076 struct scsi_link *sc_link; 1077 struct aic_tinfo *ti; 1078 1079 /* 1080 * Find first acb in ready queue that is for a target/lunit pair that 1081 * is not busy. 1082 */ 1083 outb(CLRSINT1, CLRSELTIMO|CLRBUSFREE|CLRSCSIPERR); 1084 for (acb = sc->ready_list.tqh_first; acb != NULL; 1085 acb = acb->chain.tqe_next) { 1086 sc_link = acb->xs->sc_link; 1087 ti = &sc->sc_tinfo[sc_link->target]; 1088 if ((ti->lubusy & (1<<sc_link->lun)) == 0) { 1089 AIC_MISC(("selecting %d:%d ", 1090 sc_link->target, sc_link->lun)); 1091 TAILQ_REMOVE(&sc->ready_list, acb, chain); 1092 sc->sc_nexus = acb; 1093 aic_select(sc, acb); 1094 return; 1095 } else 1096 AIC_MISC(("%d:%d busy\n", 1097 sc_link->target, sc_link->lun)); 1098 } 1099 AIC_MISC(("idle ")); 1100 /* Nothing to start; just enable reselections and wait. */ 1101 outb(SIMODE0, ENSELDI); 1102 outb(SIMODE1, ENSCSIRST); 1103 outb(SCSISEQ, ENRESELI); 1104 } 1105 1106 /* 1108 * POST PROCESSING OF SCSI_CMD (usually current) 1109 */ 1110 void 1111 aic_done(sc, acb) 1112 struct aic_softc *sc; 1113 struct aic_acb *acb; 1114 { 1115 struct scsi_xfer *xs = acb->xs; 1116 struct scsi_link *sc_link = xs->sc_link; 1117 struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 1118 1119 AIC_TRACE(("aic_done ")); 1120 1121 /* 1122 * Now, if we've come here with no error code, i.e. we've kept the 1123 * initial XS_NOERROR, and the status code signals that we should 1124 * check sense, we'll need to set up a request sense cmd block and 1125 * push the command back into the ready queue *before* any other 1126 * commands for this target/lunit, else we lose the sense info. 1127 * We don't support chk sense conditions for the request sense cmd. 1128 */ 1129 if (xs->error == XS_NOERROR) { 1130 if (acb->flags == ACB_ABORTED) { 1131 xs->error = XS_DRIVER_STUFFUP; 1132 } else if (acb->flags == ACB_CHKSENSE) { 1133 xs->error = XS_SENSE; 1134 } else if (acb->target_stat == SCSI_CHECK) { 1135 struct scsi_sense *ss = (void *)&acb->scsi_cmd; 1136 1137 AIC_MISC(("requesting sense ")); 1138 /* First, save the return values */ 1139 xs->resid = acb->data_length; 1140 xs->status = acb->target_stat; 1141 /* Next, setup a request sense command block */ 1142 bzero(ss, sizeof(*ss)); 1143 ss->opcode = REQUEST_SENSE; 1144 ss->byte2 = sc_link->lun << 5; 1145 ss->length = sizeof(struct scsi_sense_data); 1146 acb->scsi_cmd_length = sizeof(*ss); 1147 acb->data_addr = (char *)&xs->sense; 1148 acb->data_length = sizeof(struct scsi_sense_data); 1149 acb->flags = ACB_CHKSENSE; 1150 ti->senses++; 1151 ti->lubusy &= ~(1<<sc_link->lun); 1152 if (acb == sc->sc_nexus) { 1153 aic_select(sc, acb); 1154 } else { 1155 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1156 } 1157 return; 1158 } else { 1159 xs->resid = acb->data_length; 1160 } 1161 } 1162 1163 xs->flags |= ITSDONE; 1164 1165 #if AIC_DEBUG 1166 if ((aic_debug & AIC_SHOWMISC) != 0) { 1167 if (xs->resid != 0) 1168 printf("resid=%d ", xs->resid); 1169 if (xs->error == XS_SENSE) 1170 printf("sense=0x%02x\n", xs->sense.error_code); 1171 else 1172 printf("error=%d\n", xs->error); 1173 } 1174 #endif 1175 1176 /* 1177 * Remove the ACB from whatever queue it's on. We have to do a bit of 1178 * a hack to figure out which queue it's on. Note that it is *not* 1179 * necessary to cdr down the ready queue, but we must cdr down the 1180 * nexus queue and see if it's there, so we can mark the unit as no 1181 * longer busy. This code is sickening, but it works. 1182 */ 1183 if (acb == sc->sc_nexus) { 1184 ti->lubusy &= ~(1<<sc_link->lun); 1185 sc->sc_state = AIC_IDLE; 1186 sc->sc_nexus = NULL; 1187 aic_sched(sc); 1188 } else 1189 aic_dequeue(sc, acb); 1190 1191 aic_free_acb(sc, acb, xs->flags); 1192 ti->cmds++; 1193 scsi_done(xs); 1194 } 1195 1196 void 1197 aic_dequeue(sc, acb) 1198 struct aic_softc *sc; 1199 struct aic_acb *acb; 1200 { 1201 struct scsi_link *sc_link = acb->xs->sc_link; 1202 struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 1203 1204 if (sc->ready_list.tqh_last == &acb->chain.tqe_next) { 1205 TAILQ_REMOVE(&sc->ready_list, acb, chain); 1206 } else { 1207 register struct aic_acb *acb2; 1208 for (acb2 = sc->nexus_list.tqh_first; acb2 != NULL; 1209 acb2 = acb2->chain.tqe_next) { 1210 if (acb2 == acb) 1211 break; 1212 } 1213 if (acb2 != NULL) { 1214 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 1215 ti->lubusy &= ~(1<<sc_link->lun); 1216 } else if (acb->chain.tqe_next) { 1217 TAILQ_REMOVE(&sc->ready_list, acb, chain); 1218 } else { 1219 printf("%s: can't find matching acb\n", 1220 sc->sc_dev.dv_xname); 1221 Debugger(); 1222 } 1223 } 1224 } 1225 1226 /* 1228 * INTERRUPT/PROTOCOL ENGINE 1229 */ 1230 1231 /* The message system: 1232 * This is a revamped message system that now should easier accomodate new 1233 * messages, if necessary. 1234 * Currently we accept these messages: 1235 * IDENTIFY (when reselecting) 1236 * COMMAND COMPLETE # (expect bus free after messages marked #) 1237 * NOOP 1238 * MESSAGE REJECT 1239 * SYNCHRONOUS DATA TRANSFER REQUEST 1240 * SAVE DATA POINTER 1241 * RESTORE POINTERS 1242 * DISCONNECT # 1243 * 1244 * We may send these messages in prioritized order: 1245 * BUS DEVICE RESET # if SCSI_RESET & xs->flags (or in weird sits.) 1246 * MESSAGE PARITY ERROR par. err. during MSGI 1247 * MESSAGE REJECT If we get a message we don't know how to handle 1248 * ABORT # send on errors 1249 * INITIATOR DETECTED ERROR also on errors (SCSI2) (during info xfer) 1250 * IDENTIFY At the start of each transfer 1251 * SYNCHRONOUS DATA TRANSFER REQUEST if appropriate 1252 * NOOP if nothing else fits the bill ... 1253 */ 1254 1255 #define aic_sched_msgout(m) \ 1256 do { \ 1257 if (sc->sc_msgpriq == 0) \ 1258 outb(SCSISIG, sc->sc_phase|ATNO); \ 1259 sc->sc_msgpriq |= (m); \ 1260 } while (0) 1261 1262 #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80) 1263 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20) 1264 #define ISEXTMSG(m) ((m) == 0x01) 1265 /* 1266 * Precondition: 1267 * The SCSI bus is already in the MSGI phase and there is a message byte 1268 * on the bus, along with an asserted REQ signal. 1269 */ 1270 void 1271 aic_msgin(sc) 1272 register struct aic_softc *sc; 1273 { 1274 int n; 1275 1276 AIC_TRACE(("aic_msgin ")); 1277 sc->sc_progress = 0; 1278 1279 if (sc->sc_prevphase == PH_MSGIN) { 1280 /* This is a continuation of the previous message. */ 1281 n = sc->sc_imp - sc->sc_imess; 1282 goto nextbyte; 1283 } 1284 1285 /* This is a new MESSAGE IN phase. Clean up our state. */ 1286 sc->sc_flags &= ~AIC_DROP_MSGIN; 1287 1288 nextmsg: 1289 n = 0; 1290 sc->sc_imp = &sc->sc_imess[n]; 1291 1292 nextbyte: 1293 /* 1294 * Read a whole message, but don't ack the last byte. If we reject the 1295 * message, we have to assert ATN during the message transfer phase 1296 * itself. 1297 */ 1298 for (;;) { 1299 for (;;) { 1300 u_char sstat1 = inb(SSTAT1); 1301 if ((sstat1 & (REQINIT|BUSFREE)) == 0) { 1302 /* Wait for REQINIT. XXX Need timeout. */ 1303 continue; 1304 } 1305 if ((sstat1 & (PHASECHG|BUSFREE)) != 0) { 1306 /* 1307 * Target left MESSAGE IN, probably because it 1308 * a) noticed our ATN signal, or 1309 * b) ran out of messages. 1310 */ 1311 goto out; 1312 } 1313 /* Still in MESSAGE IN phase, and REQ is asserted. */ 1314 if ((sstat1 & SCSIPERR) != 0) { 1315 aic_sched_msgout(SEND_PARITY_ERROR); 1316 sc->sc_flags |= AIC_DROP_MSGIN; 1317 } 1318 break; 1319 } 1320 1321 /* Gather incoming message bytes if needed. */ 1322 if ((sc->sc_flags & AIC_DROP_MSGIN) == 0) { 1323 if (n >= AIC_MAX_MSG_LEN) { 1324 aic_sched_msgout(SEND_REJECT); 1325 sc->sc_flags |= AIC_DROP_MSGIN; 1326 } else { 1327 *sc->sc_imp++ = inb(SCSIDAT); 1328 n++; 1329 /* 1330 * This testing is suboptimal, but most 1331 * messages will be of the one byte variety, so 1332 * it should not affect performance 1333 * significantly. 1334 */ 1335 if (n == 1 && IS1BYTEMSG(sc->sc_imess[0])) 1336 break; 1337 if (n == 2 && IS2BYTEMSG(sc->sc_imess[0])) 1338 break; 1339 if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) && 1340 n == sc->sc_imess[1] + 2) 1341 break; 1342 } 1343 } 1344 1345 /* 1346 * If we reach this spot we're either: 1347 * a) in the middle of a multi-byte message, or 1348 * b) dropping bytes. 1349 */ 1350 outb(SXFRCTL0, CHEN|SPIOEN); 1351 /* Ack the last byte read. */ 1352 (void) inb(SCSIDAT); 1353 outb(SXFRCTL0, CHEN); 1354 while ((inb(SCSISIG) & ACKI) != 0) 1355 ; 1356 } 1357 1358 sc->sc_progress = 1; 1359 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1360 1361 /* We now have a complete message. Parse it. */ 1362 switch (sc->sc_state) { 1363 struct aic_acb *acb; 1364 struct scsi_link *sc_link; 1365 struct aic_tinfo *ti; 1366 int period, offset, width; 1367 u_char selid, target, lun; 1368 1369 case AIC_CONNECTED: 1370 AIC_ASSERT(sc->sc_nexus != NULL); 1371 acb = sc->sc_nexus; 1372 ti = &sc->sc_tinfo[acb->xs->sc_link->target]; 1373 1374 switch (sc->sc_imess[0]) { 1375 case MSG_CMDCOMPLETE: 1376 if (sc->sc_dleft < 0) { 1377 sc_link = acb->xs->sc_link; 1378 printf("%s: %d extra bytes from %d:%d\n", 1379 sc->sc_dev.dv_xname, -sc->sc_dleft, 1380 sc_link->target, sc_link->lun); 1381 acb->data_length = 0; 1382 } 1383 acb->xs->resid = acb->data_length = sc->sc_dleft; 1384 sc->sc_state = AIC_CMDCOMPLETE; 1385 break; 1386 1387 case MSG_PARITY_ERROR: 1388 /* Resend the last message. */ 1389 aic_sched_msgout(sc->sc_msgout); 1390 break; 1391 1392 case MSG_MESSAGE_REJECT: 1393 AIC_MISC(("message rejected ")); 1394 switch (sc->sc_msgout) { 1395 case SEND_IDENTIFY: 1396 ti->flags &= ~(DO_SYNC|DO_WIDE); 1397 ti->syncdata = 0; 1398 outb(SCSIRATE, ti->syncdata); 1399 /* ... */ 1400 break; 1401 case SEND_SDTR: 1402 ti->flags &= ~DO_SYNC; 1403 ti->syncdata = 0; 1404 outb(SCSIRATE, ti->syncdata); 1405 break; 1406 case SEND_WDTR: 1407 ti->flags &= ~DO_WIDE; 1408 /* ... */ 1409 break; 1410 case SEND_INIT_DET_ERR: 1411 sc->sc_flags |= AIC_ABORTING; 1412 aic_sched_msgout(SEND_ABORT); 1413 break; 1414 } 1415 break; 1416 1417 case MSG_NOOP: 1418 break; 1419 1420 case MSG_DISCONNECT: 1421 ti->dconns++; 1422 sc->sc_state = AIC_DISCONNECT; 1423 break; 1424 1425 case MSG_SAVEDATAPOINTER: 1426 acb->data_addr = sc->sc_dp; 1427 acb->data_length = sc->sc_dleft; 1428 break; 1429 1430 case MSG_RESTOREPOINTERS: 1431 sc->sc_dp = acb->data_addr; 1432 sc->sc_dleft = acb->data_length; 1433 sc->sc_cp = (u_char *)&acb->scsi_cmd; 1434 sc->sc_cleft = acb->scsi_cmd_length; 1435 break; 1436 1437 case MSG_EXTENDED: 1438 switch (sc->sc_imess[2]) { 1439 case MSG_EXT_SDTR: 1440 if (sc->sc_imess[1] != 3) 1441 goto reject; 1442 period = (sc->sc_imess[3] * 4 + 49)/50 - 2; 1443 offset = sc->sc_imess[4]; 1444 if (offset == 0) { 1445 ti->flags &= ~DO_SYNC; 1446 ti->syncdata = 0; 1447 outb(SCSIRATE, ti->syncdata); 1448 } else if (period > 7) { 1449 /* Too slow for aic6360. Do asynch 1450 * instead. Renegotiate the deal. 1451 */ 1452 ti->period = 0; 1453 ti->offset = 0; 1454 aic_sched_msgout(SEND_SDTR); 1455 } else { 1456 ti->flags &= ~DO_SYNC; 1457 ti->syncdata = period<<4 | offset; 1458 outb(SCSIRATE, ti->syncdata); 1459 } 1460 break; 1461 1462 case MSG_EXT_WDTR: 1463 if (sc->sc_imess[1] != 2) 1464 goto reject; 1465 width = sc->sc_imess[3]; 1466 if (width == 0) { 1467 ti->flags &= ~DO_WIDE; 1468 /* ... */ 1469 } else if (width > AIC_MAX_WIDTH) { 1470 ti->width = 0; 1471 aic_sched_msgout(SEND_WDTR); 1472 } else { 1473 ti->flags &= ~DO_WIDE; 1474 /* ... */ 1475 } 1476 break; 1477 1478 default: 1479 printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n", 1480 sc->sc_dev.dv_xname); 1481 AIC_BREAK(); 1482 goto reject; 1483 } 1484 break; 1485 1486 default: 1487 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1488 sc->sc_dev.dv_xname); 1489 AIC_BREAK(); 1490 reject: 1491 aic_sched_msgout(SEND_REJECT); 1492 break; 1493 } 1494 break; 1495 1496 case AIC_RESELECTED: 1497 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1498 printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n", 1499 sc->sc_dev.dv_xname); 1500 AIC_BREAK(); 1501 goto reset; 1502 } 1503 1504 /* 1505 * The SCSI chip made a snapshot of the data bus while the 1506 * reselection was being negotiated. This enables us to 1507 * determine which target did the reselect. 1508 */ 1509 selid = inb(SELID) & ~(1<<AIC_SCSI_HOSTID); 1510 if (selid & (selid - 1)) { 1511 printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n", 1512 sc->sc_dev.dv_xname, selid); 1513 AIC_BREAK(); 1514 goto reset; 1515 } 1516 1517 /* Search wait queue for disconnected cmd 1518 * The list should be short, so I haven't bothered with 1519 * any more sophisticated structures than a simple 1520 * singly linked list. 1521 */ 1522 target = ffs(selid) - 1; 1523 lun = sc->sc_imess[0] & 0x07; 1524 for (acb = sc->nexus_list.tqh_first; acb != NULL; 1525 acb = acb->chain.tqe_next) { 1526 sc_link = acb->xs->sc_link; 1527 if (sc_link->target == target && sc_link->lun == lun) 1528 break; 1529 } 1530 if (acb == NULL) { 1531 printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n", 1532 sc->sc_dev.dv_xname, target, lun); 1533 AIC_BREAK(); 1534 goto abort; 1535 } 1536 1537 /* Make this nexus active again. */ 1538 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 1539 sc->sc_state = AIC_CONNECTED; 1540 sc->sc_nexus = acb; 1541 ti = &sc->sc_tinfo[sc_link->target]; 1542 ti->lubusy |= (1<<sc_link->lun); 1543 outb(SCSIRATE, ti->syncdata); 1544 1545 /* Do an implicit RESTORE POINTERS. */ 1546 sc->sc_dp = acb->data_addr; 1547 sc->sc_dleft = acb->data_length; 1548 sc->sc_cp = (u_char *)&acb->scsi_cmd; 1549 sc->sc_cleft = acb->scsi_cmd_length; 1550 break; 1551 1552 default: 1553 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1554 sc->sc_dev.dv_xname); 1555 AIC_BREAK(); 1556 reset: 1557 sc->sc_flags |= AIC_ABORTING; 1558 aic_sched_msgout(SEND_DEV_RESET); 1559 break; 1560 1561 abort: 1562 sc->sc_flags |= AIC_ABORTING; 1563 aic_sched_msgout(SEND_ABORT); 1564 break; 1565 } 1566 1567 outb(SXFRCTL0, CHEN|SPIOEN); 1568 /* Ack the last message byte. */ 1569 (void) inb(SCSIDAT); 1570 outb(SXFRCTL0, CHEN); 1571 while ((inb(SCSISIG) & ACKI) != 0) 1572 ; 1573 1574 /* Go get the next message, if any. */ 1575 goto nextmsg; 1576 1577 out: 1578 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1579 } 1580 1581 1582 /* The message out (and in) stuff is a bit complicated: 1583 * If the target requests another message (sequence) without 1584 * having changed phase in between it really asks for a 1585 * retransmit, probably due to parity error(s). 1586 * The following messages can be sent: 1587 * IDENTIFY @ These 4 stem from SCSI command activity 1588 * SDTR @ 1589 * WDTR @ 1590 * DEV_RESET @ 1591 * REJECT if MSGI doesn't make sense 1592 * PARITY_ERROR if parity error while in MSGI 1593 * INIT_DET_ERR if parity error while not in MSGI 1594 * ABORT if INIT_DET_ERR rejected 1595 * NOOP if asked for a message and there's nothing to send 1596 */ 1597 void 1598 aic_msgout(sc) 1599 register struct aic_softc *sc; 1600 { 1601 struct aic_acb *acb; 1602 struct aic_tinfo *ti; 1603 int n; 1604 1605 AIC_TRACE(("aic_msgout ")); 1606 sc->sc_progress = 0; 1607 1608 /* 1609 * Set ATN. If we're just sending a trivial 1-byte message, we'll 1610 * clear ATN later on anyway. 1611 */ 1612 outb(SCSISIG, PH_MSGOUT|ATNO); 1613 /* Reset the FIFO. */ 1614 outb(DMACNTRL0, RSTFIFO); 1615 /* Enable REQ/ACK protocol. */ 1616 outb(SXFRCTL0, CHEN|SPIOEN); 1617 1618 if (sc->sc_prevphase == PH_MSGOUT) { 1619 if (sc->sc_omp == sc->sc_omess) { 1620 /* 1621 * This is a retransmission. 1622 * 1623 * We get here if the target stayed in MESSAGE OUT 1624 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1625 * that all of the previously transmitted messages must 1626 * be sent again, in the same order. Therefore, we 1627 * requeue all the previously transmitted messages, and 1628 * start again from the top. Our simple priority 1629 * scheme keeps the messages in the right order. 1630 */ 1631 AIC_MISC(("retransmitting ")); 1632 sc->sc_msgpriq |= sc->sc_msgoutq; 1633 } else { 1634 /* This is a continuation of the previous message. */ 1635 n = sc->sc_omp - sc->sc_omess; 1636 goto nextbyte; 1637 } 1638 } 1639 1640 /* No messages transmitted so far. */ 1641 sc->sc_msgoutq = 0; 1642 1643 nextmsg: 1644 /* Pick up highest priority message. */ 1645 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1646 sc->sc_msgpriq &= ~sc->sc_msgout; 1647 sc->sc_msgoutq |= sc->sc_msgout; 1648 1649 /* Build the outgoing message data. */ 1650 switch (sc->sc_msgout) { 1651 case SEND_IDENTIFY: 1652 if (sc->sc_state != AIC_CONNECTED) { 1653 printf("%s: SEND_IDENTIFY while not connected; sending NOOP\n", 1654 sc->sc_dev.dv_xname); 1655 AIC_BREAK(); 1656 goto noop; 1657 } 1658 AIC_ASSERT(sc->sc_nexus != NULL); 1659 acb = sc->sc_nexus; 1660 sc->sc_omess[0] = 1661 MSG_IDENTIFY(acb->xs->sc_link->lun, AIC_ALLOW_DISCONNECT); 1662 n = 1; 1663 break; 1664 1665 case SEND_SDTR: 1666 if (sc->sc_state != AIC_CONNECTED) { 1667 printf("%s: SEND_SDTR while not connected; sending NOOP\n", 1668 sc->sc_dev.dv_xname); 1669 AIC_BREAK(); 1670 goto noop; 1671 } 1672 AIC_ASSERT(sc->sc_nexus != NULL); 1673 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target]; 1674 sc->sc_omess[4] = MSG_EXTENDED; 1675 sc->sc_omess[3] = 3; 1676 sc->sc_omess[2] = MSG_EXT_SDTR; 1677 sc->sc_omess[1] = ti->period >> 2; 1678 sc->sc_omess[0] = ti->offset; 1679 n = 5; 1680 break; 1681 1682 case SEND_WDTR: 1683 if (sc->sc_state != AIC_CONNECTED) { 1684 printf("%s: SEND_WDTR while not connected; sending NOOP\n", 1685 sc->sc_dev.dv_xname); 1686 AIC_BREAK(); 1687 goto noop; 1688 } 1689 AIC_ASSERT(sc->sc_nexus != NULL); 1690 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target]; 1691 sc->sc_omess[3] = MSG_EXTENDED; 1692 sc->sc_omess[2] = 2; 1693 sc->sc_omess[1] = MSG_EXT_WDTR; 1694 sc->sc_omess[0] = ti->width; 1695 n = 4; 1696 break; 1697 1698 case SEND_DEV_RESET: 1699 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1700 n = 1; 1701 break; 1702 1703 case SEND_REJECT: 1704 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1705 n = 1; 1706 break; 1707 1708 case SEND_PARITY_ERROR: 1709 sc->sc_omess[0] = MSG_PARITY_ERROR; 1710 n = 1; 1711 break; 1712 1713 case SEND_INIT_DET_ERR: 1714 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1715 n = 1; 1716 break; 1717 1718 case SEND_ABORT: 1719 sc->sc_omess[0] = MSG_ABORT; 1720 n = 1; 1721 break; 1722 1723 case 0: 1724 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1725 sc->sc_dev.dv_xname); 1726 AIC_BREAK(); 1727 noop: 1728 sc->sc_omess[0] = MSG_NOOP; 1729 n = 1; 1730 break; 1731 1732 default: 1733 printf("%s: weird MESSAGE OUT; sending NOOP\n", 1734 sc->sc_dev.dv_xname); 1735 AIC_BREAK(); 1736 goto noop; 1737 } 1738 sc->sc_omp = &sc->sc_omess[n]; 1739 1740 nextbyte: 1741 /* Send message bytes. */ 1742 for (;;) { 1743 for (;;) { 1744 u_char sstat1 = inb(SSTAT1); 1745 if ((sstat1 & (REQINIT|BUSFREE)) == 0) { 1746 /* Wait for REQINIT. XXX Need timeout. */ 1747 continue; 1748 } 1749 if ((sstat1 & (PHASECHG|BUSFREE)) != 0) { 1750 /* 1751 * Target left MESSAGE OUT, possibly to reject 1752 * our message. 1753 */ 1754 goto out; 1755 } 1756 /* Still in MESSAGE OUT phase, and REQ is asserted. */ 1757 break; 1758 } 1759 1760 --n; 1761 1762 /* Clear ATN before last byte if this is the last message. */ 1763 if (n == 0 && sc->sc_msgpriq == 0) 1764 outb(CLRSINT1, CLRATNO); 1765 /* Send message byte. */ 1766 outb(SCSIDAT, *--sc->sc_omp); 1767 /* Wait for ACK to be negated. XXX Need timeout. */ 1768 while ((inb(SCSISIG) & ACKI) != 0) 1769 ; 1770 1771 if (n == 0) 1772 break; 1773 } 1774 1775 sc->sc_progress = 1; 1776 1777 /* We get here only if the entire message has been transmitted. */ 1778 if (sc->sc_msgpriq != 0) { 1779 /* There are more outgoing messages. */ 1780 goto nextmsg; 1781 } 1782 1783 /* 1784 * The last message has been transmitted. We need to remember the last 1785 * message transmitted (in case the target switches to MESSAGE IN phase 1786 * and sends a MESSAGE REJECT), and the list of messages transmitted 1787 * this time around (in case the target stays in MESSAGE OUT phase to 1788 * request a retransmit). 1789 */ 1790 1791 out: 1792 /* Disable REQ/ACK protocol. */ 1793 outb(SXFRCTL0, CHEN); 1794 } 1795 1796 /* aic_dataout_pio: perform a data transfer using the FIFO datapath in the aic6360 1798 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1799 * and ACK deasserted (i.e. waiting for a data byte) 1800 * This new revision has been optimized (I tried) to make the common case fast, 1801 * and the rarer cases (as a result) somewhat more comlex 1802 */ 1803 int 1804 aic_dataout_pio(sc, p, n) 1805 register struct aic_softc *sc; 1806 u_char *p; 1807 int n; 1808 { 1809 register u_char dmastat; 1810 int out = 0; 1811 #define DOUTAMOUNT 128 /* Full FIFO */ 1812 1813 /* Clear FIFOs and counters. */ 1814 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH); 1815 outb(DMACNTRL0, RSTFIFO|WRITE); 1816 /* Enable FIFOs. */ 1817 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN); 1818 outb(DMACNTRL0, ENDMA|DWORDPIO|WRITE); 1819 1820 /* Turn off ENREQINIT for now. */ 1821 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENPHASECHG); 1822 1823 /* I have tried to make the main loop as tight as possible. This 1824 * means that some of the code following the loop is a bit more 1825 * complex than otherwise. 1826 */ 1827 while (n > 0) { 1828 int xfer; 1829 1830 for (;;) { 1831 dmastat = inb(DMASTAT); 1832 if ((dmastat & DFIFOEMP) != 0) 1833 break; 1834 if ((dmastat & INTSTAT) != 0) 1835 goto phasechange; 1836 } 1837 1838 xfer = min(DOUTAMOUNT, n); 1839 1840 n -= xfer; 1841 out += xfer; 1842 1843 #if AIC_USE_DWORDS 1844 if (xfer >= 12) { 1845 outsl(DMADATALONG, p, xfer>>2); 1846 p += xfer & ~3; 1847 xfer &= 3; 1848 } 1849 #else 1850 if (xfer >= 8) { 1851 outsw(DMADATA, p, xfer>>1); 1852 p += xfer & ~1; 1853 xfer &= 1; 1854 } 1855 #endif 1856 1857 if (xfer > 0) { 1858 outb(DMACNTRL0, ENDMA|B8MODE|WRITE); 1859 outsb(DMADATA, p, xfer); 1860 p += xfer; 1861 outb(DMACNTRL0, ENDMA|DWORDPIO|WRITE); 1862 } 1863 } 1864 1865 /* See the bytes off chip */ 1866 for (;;) { 1867 dmastat = inb(DMASTAT); 1868 if ((dmastat & DFIFOEMP) != 0 && 1869 (inb(SSTAT2) & SEMPTY) != 0) 1870 break; 1871 if ((dmastat & INTSTAT) != 0) 1872 goto phasechange; 1873 } 1874 1875 phasechange: 1876 /* We now have the data off chip. */ 1877 outb(SXFRCTL0, CHEN); 1878 1879 if ((dmastat & INTSTAT) != 0) { 1880 /* Some sort of phase change. */ 1881 register u_char sstat2; 1882 int amount; 1883 1884 /* Stop transfers, do some accounting */ 1885 amount = inb(FIFOSTAT); 1886 sstat2 = inb(SSTAT2); 1887 if ((sstat2 & 7) == 0) 1888 amount += sstat2 & SFULL ? 8 : 0; 1889 else 1890 amount += sstat2 & 7; 1891 out -= amount; 1892 AIC_MISC(("+%d ", amount)); 1893 } 1894 1895 outb(DMACNTRL0, RSTFIFO); 1896 while ((inb(SXFRCTL0) & SCSIEN) != 0) 1897 ; 1898 1899 sc->sc_progress = out != 0; 1900 1901 /* Turn on ENREQINIT again. */ 1902 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENREQINIT|ENPHASECHG); 1903 1904 return out; 1905 } 1906 1907 /* aic_datain_pio: perform data transfers using the FIFO datapath in the aic6360 1909 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1910 * and ACK deasserted (i.e. at least one byte is ready). 1911 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1912 * transferred. This, is OK for fast targets, but not so smart for slow 1913 * targets which don't disconnect or for huge transfers. 1914 */ 1915 int 1916 aic_datain_pio(sc, p, n) 1917 register struct aic_softc *sc; 1918 u_char *p; 1919 int n; 1920 { 1921 register u_char dmastat; 1922 int in = 0; 1923 #define DINAMOUNT 128 /* Full FIFO */ 1924 1925 /* Clear FIFOs and counters */ 1926 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH); 1927 outb(DMACNTRL0, RSTFIFO); 1928 /* Enable FIFOs */ 1929 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN); 1930 outb(DMACNTRL0, ENDMA|DWORDPIO); 1931 1932 /* Turn off ENREQINIT for now. */ 1933 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENPHASECHG); 1934 1935 /* We leave this loop if one or more of the following is true: 1936 * a) phase != PH_DATAIN && FIFOs are empty 1937 * b) SCSIRSTI is set (a reset has occurred) or busfree is detected. 1938 */ 1939 while (n > 0) { 1940 int xfer; 1941 1942 /* Wait for fifo half full or phase mismatch */ 1943 for (;;) { 1944 dmastat = inb(DMASTAT); 1945 if ((dmastat & (DFIFOFULL|INTSTAT)) != 0) 1946 break; 1947 } 1948 1949 if ((dmastat & DFIFOFULL) != 0) 1950 xfer = DINAMOUNT; 1951 else { 1952 while ((inb(SSTAT2) & SEMPTY) == 0) 1953 ; 1954 xfer = inb(FIFOSTAT); 1955 } 1956 1957 xfer = min(xfer, n); 1958 1959 n -= xfer; 1960 in += xfer; 1961 1962 #if AIC_USE_DWORDS 1963 if (xfer >= 12) { 1964 insl(DMADATALONG, p, xfer>>2); 1965 p += xfer & ~3; 1966 xfer &= 3; 1967 } 1968 #else 1969 if (xfer >= 8) { 1970 insw(DMADATA, p, xfer>>1); 1971 p += xfer & ~1; 1972 xfer &= 1; 1973 } 1974 #endif 1975 1976 if (xfer > 0) { 1977 outb(DMACNTRL0, ENDMA|B8MODE); 1978 insb(DMADATA, p, xfer); 1979 p += xfer; 1980 outb(DMACNTRL0, ENDMA|DWORDPIO); 1981 } 1982 1983 if ((dmastat & INTSTAT) != 0) 1984 break; 1985 } 1986 1987 #if 0 1988 if (n > 0) 1989 printf("residual %d\n", n); 1990 #endif 1991 1992 /* Some SCSI-devices are rude enough to transfer more data than what 1993 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1994 * requested 512. Test for progress, i.e. real transfers. If no real 1995 * transfers have been performed (n is probably already zero) and the 1996 * FIFO is not empty, waste some bytes.... 1997 */ 1998 if (in == 0) { 1999 int extra = 0; 2000 2001 for (;;) { 2002 dmastat = inb(DMASTAT); 2003 if ((dmastat & DFIFOEMP) != 0) 2004 break; 2005 (void) inb(DMADATA); /* Throw it away */ 2006 extra++; 2007 } 2008 2009 AIC_MISC(("aic: %d extra bytes\n", extra)); 2010 sc->sc_progress = extra != 0; 2011 } else 2012 sc->sc_progress = 1; 2013 2014 /* Stop the FIFO data path */ 2015 outb(SXFRCTL0, CHEN); 2016 2017 outb(DMACNTRL0, RSTFIFO); 2018 while ((inb(SXFRCTL0) & SCSIEN) != 0) 2019 ; 2020 2021 /* Turn on ENREQINIT again. */ 2022 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENREQINIT|ENPHASECHG); 2023 2024 return in; 2025 } 2026 2027 /* 2029 * This is the workhorse routine of the driver. 2030 * Deficiencies (for now): 2031 * 1) always uses programmed I/O 2032 * 2) doesn't support synchronous transfers properly (yet) 2033 */ 2034 int 2035 aicintr(sc) 2036 register struct aic_softc *sc; 2037 { 2038 u_char sstat0, sstat1; 2039 u_char phase; 2040 register struct aic_acb *acb; 2041 register struct scsi_link *sc_link; 2042 struct aic_tinfo *ti; 2043 int n; 2044 2045 /* 2046 * Clear INTEN. We enable it again before returning. This ensures 2047 * that we get another edge on the next `interesting' event. 2048 */ 2049 outb(DMACNTRL0, 0); 2050 AIC_TRACE(("aicintr ")); 2051 2052 /* 2053 * First check for abnormal conditions, such as reset. 2054 */ 2055 sstat1 = inb(SSTAT1); 2056 AIC_MISC(("sstat1:0x%02x ", sstat1)); 2057 2058 if ((sstat1 & SCSIRSTI) != 0) { 2059 printf("aic: reset in -- reinitializing....\n"); 2060 goto reset; 2061 } 2062 if ((sstat1 & SCSIPERR) != 0) { 2063 printf("aic: SCSI bus parity error\n"); 2064 outb(CLRSINT1, CLRSCSIPERR); 2065 if (sc->sc_prevphase == PH_MSGIN) { 2066 aic_sched_msgout(SEND_PARITY_ERROR); 2067 sc->sc_flags |= AIC_DROP_MSGIN; 2068 } else 2069 aic_sched_msgout(SEND_INIT_DET_ERR); 2070 } 2071 2072 /* 2073 * If we're not already busy doing something test for the following 2074 * conditions: 2075 * 1) We have been reselected by something 2076 * 2) We have selected something successfully 2077 * 3) Our selection process has timed out 2078 * 4) This is really a bus free interrupt just to get a new command 2079 * going? 2080 * 5) Spurious interrupt? 2081 */ 2082 switch (sc->sc_state) { 2083 case AIC_IDLE: 2084 case AIC_SELECTING: 2085 sstat0 = inb(SSTAT0); 2086 AIC_MISC(("sstat0:0x%02x ", sstat0)); 2087 2088 if ((sstat0 & TARGET) != 0) { 2089 /* 2090 * We don't currently support target mode. 2091 */ 2092 printf("%s: target mode selected; going to bus free\n", 2093 sc->sc_dev.dv_xname); 2094 outb(SCSISIG, 0); 2095 2096 sc->sc_state = AIC_IDLE; 2097 aic_sched(sc); 2098 goto out; 2099 } else if ((sstat0 & SELDI) != 0) { 2100 AIC_MISC(("reselected ")); 2101 2102 /* 2103 * If we're trying to select a target ourselves, 2104 * push our command back into the ready list. 2105 */ 2106 if (sc->sc_state == AIC_SELECTING) { 2107 AIC_MISC(("backoff selector ")); 2108 AIC_ASSERT(sc->sc_nexus != NULL); 2109 acb = sc->sc_nexus; 2110 sc->sc_nexus = NULL; 2111 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2112 } 2113 2114 sc->sc_state = AIC_RESELECTED; 2115 } else if ((sstat0 & SELDO) != 0) { 2116 AIC_MISC(("selected ")); 2117 2118 /* We have selected a target. Things to do: 2119 * a) Determine what message(s) to send. 2120 * b) Verify that we're still selecting the target. 2121 * c) Mark device as busy. 2122 */ 2123 if (sc->sc_state != AIC_SELECTING) { 2124 printf("%s: selection out while not selecting; resetting\n", 2125 sc->sc_dev.dv_xname); 2126 AIC_BREAK(); 2127 goto reset; 2128 } 2129 AIC_ASSERT(sc->sc_nexus != NULL); 2130 acb = sc->sc_nexus; 2131 2132 sc_link = acb->xs->sc_link; 2133 ti = &sc->sc_tinfo[sc_link->target]; 2134 if ((acb->xs->flags & SCSI_RESET) == 0) { 2135 sc->sc_msgpriq = SEND_IDENTIFY; 2136 if (acb->flags != ACB_ABORTED) { 2137 if ((ti->flags & DO_SYNC) != 0) 2138 sc->sc_msgpriq |= SEND_SDTR; 2139 if ((ti->flags & DO_WIDE) != 0) 2140 sc->sc_msgpriq |= SEND_WDTR; 2141 } else { 2142 sc->sc_flags |= AIC_ABORTING; 2143 sc->sc_msgpriq |= SEND_ABORT; 2144 } 2145 } else 2146 sc->sc_msgpriq = SEND_DEV_RESET; 2147 2148 ti->lubusy |= (1<<sc_link->lun); 2149 2150 /* Do an implicit RESTORE POINTERS. */ 2151 sc->sc_dp = acb->data_addr; 2152 sc->sc_dleft = acb->data_length; 2153 sc->sc_cp = (u_char *)&acb->scsi_cmd; 2154 sc->sc_cleft = acb->scsi_cmd_length; 2155 2156 sc->sc_state = AIC_CONNECTED; 2157 } else if ((sstat1 & SELTO) != 0) { 2158 AIC_MISC(("selection timeout ")); 2159 2160 if (sc->sc_state != AIC_SELECTING) { 2161 printf("%s: selection timeout while not selecting; resetting\n", 2162 sc->sc_dev.dv_xname); 2163 AIC_BREAK(); 2164 goto reset; 2165 } 2166 AIC_ASSERT(sc->sc_nexus != NULL); 2167 acb = sc->sc_nexus; 2168 2169 outb(SXFRCTL1, 0); 2170 outb(SCSISEQ, ENRESELI); 2171 outb(CLRSINT1, CLRSELTIMO); 2172 2173 acb->xs->error = XS_SELTIMEOUT; 2174 untimeout(aic_timeout, acb); 2175 delay(250); 2176 aic_done(sc, acb); 2177 goto out; 2178 } else { 2179 if (sc->sc_state != AIC_IDLE) { 2180 printf("%s: BUS FREE while not idle; state=%d\n", 2181 sc->sc_dev.dv_xname, sc->sc_state); 2182 AIC_BREAK(); 2183 goto out; 2184 } 2185 2186 aic_sched(sc); 2187 goto out; 2188 } 2189 2190 /* 2191 * Turn off selection stuff, and prepare to catch bus free 2192 * interrupts, parity errors, and phase changes. 2193 */ 2194 outb(SXFRCTL1, 0); 2195 outb(SCSISEQ, ENAUTOATNP); 2196 outb(CLRSINT0, CLRSELDI|CLRSELDO); 2197 outb(CLRSINT1, CLRBUSFREE|CLRPHASECHG); 2198 outb(SIMODE0, 0); 2199 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|ENBUSFREE|ENREQINIT|ENPHASECHG); 2200 2201 sc->sc_flags = 0; 2202 sc->sc_prevphase = PH_INVALID; 2203 goto dophase; 2204 } 2205 2206 outb(CLRSINT1, CLRPHASECHG); 2207 2208 if ((sstat1 & BUSFREE) != 0) { 2209 /* We've gone to BUS FREE phase. */ 2210 outb(CLRSINT1, CLRBUSFREE); 2211 2212 switch (sc->sc_state) { 2213 case AIC_RESELECTED: 2214 sc->sc_state = AIC_IDLE; 2215 aic_sched(sc); 2216 break; 2217 2218 case AIC_CONNECTED: 2219 if ((sc->sc_flags & AIC_ABORTING) == 0) { 2220 printf("%s: unexpected BUS FREE; aborting\n", 2221 sc->sc_dev.dv_xname); 2222 AIC_BREAK(); 2223 } 2224 AIC_ASSERT(sc->sc_nexus != NULL); 2225 acb = sc->sc_nexus; 2226 acb->xs->error = XS_DRIVER_STUFFUP; 2227 goto finish; 2228 2229 case AIC_DISCONNECT: 2230 AIC_ASSERT(sc->sc_nexus != NULL); 2231 acb = sc->sc_nexus; 2232 sc->sc_state = AIC_IDLE; 2233 sc->sc_nexus = NULL; 2234 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 2235 aic_sched(sc); 2236 break; 2237 2238 case AIC_CMDCOMPLETE: 2239 AIC_ASSERT(sc->sc_nexus != NULL); 2240 acb = sc->sc_nexus; 2241 finish: 2242 untimeout(aic_timeout, acb); 2243 aic_done(sc, acb); 2244 break; 2245 } 2246 goto out; 2247 } 2248 2249 dophase: 2250 if ((sstat1 & REQINIT) == 0) { 2251 /* Wait for REQINIT. */ 2252 goto out; 2253 } 2254 2255 phase = inb(SCSISIG) & PH_MASK; 2256 sc->sc_phase = phase; 2257 outb(SCSISIG, phase); 2258 2259 switch (phase) { 2260 case PH_MSGOUT: 2261 /* If aborting, always handle MESSAGE OUT. */ 2262 if ((sc->sc_flags & AIC_ABORTING) == 0 && 2263 (sc->sc_state & AIC_CONNECTED) == 0) 2264 break; 2265 aic_msgout(sc); 2266 goto nextphase; 2267 2268 case PH_MSGIN: 2269 if ((sc->sc_state & (AIC_CONNECTED|AIC_RESELECTED)) == 0) 2270 break; 2271 aic_msgin(sc); 2272 goto nextphase; 2273 2274 case PH_CMD: /* CMD phase & REQ asserted */ 2275 if ((sc->sc_state & AIC_CONNECTED) == 0) 2276 break; 2277 #if AIC_DEBUG 2278 if ((aic_debug & AIC_SHOWMISC) != 0) { 2279 AIC_ASSERT(sc->sc_nexus != NULL); 2280 acb = sc->sc_nexus; 2281 printf("cmd=0x%02x+%d ", 2282 acb->scsi_cmd.opcode, acb->scsi_cmd_length-1); 2283 } 2284 #endif 2285 n = aic_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 2286 sc->sc_cp += n; 2287 sc->sc_cleft -= n; 2288 goto nextphase; 2289 2290 case PH_DATAOUT: 2291 if ((sc->sc_state & AIC_CONNECTED) == 0) 2292 break; 2293 AIC_MISC(("dataout dleft=%d ", sc->sc_dleft)); 2294 n = aic_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 2295 sc->sc_dp += n; 2296 sc->sc_dleft -= n; 2297 goto nextphase; 2298 2299 case PH_DATAIN: 2300 if ((sc->sc_state & AIC_CONNECTED) == 0) 2301 break; 2302 AIC_MISC(("datain ")); 2303 n = aic_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 2304 sc->sc_dp += n; 2305 sc->sc_dleft -= n; 2306 goto nextphase; 2307 2308 case PH_STAT: 2309 if ((sc->sc_state & AIC_CONNECTED) == 0) 2310 break; 2311 AIC_ASSERT(sc->sc_nexus != NULL); 2312 acb = sc->sc_nexus; 2313 outb(SXFRCTL0, CHEN|SPIOEN); 2314 outb(DMACNTRL0, RSTFIFO); 2315 acb->target_stat = inb(SCSIDAT); 2316 outb(SXFRCTL0, CHEN); 2317 outb(DMACNTRL0, RSTFIFO); 2318 while ((inb(SXFRCTL0) & SCSIEN) != 0) 2319 ; 2320 AIC_MISC(("target_stat=0x%02x ", acb->target_stat)); 2321 goto nextphase; 2322 } 2323 2324 printf("%s: unexpected bus phase; resetting\n", 2325 sc->sc_dev.dv_xname); 2326 AIC_BREAK(); 2327 reset: 2328 aic_init(sc); 2329 return 1; 2330 2331 nextphase: 2332 sc->sc_prevphase = phase; 2333 2334 out: 2335 outb(DMACNTRL0, INTEN); 2336 return 1; 2337 } 2338 2339 void 2340 aic_abort(sc, acb) 2341 struct aic_softc *sc; 2342 struct aic_acb *acb; 2343 { 2344 2345 if (sc->sc_nexus == acb) { 2346 if (sc->sc_state == AIC_CONNECTED) { 2347 sc->sc_flags |= AIC_ABORTING; 2348 aic_sched_msgout(SEND_ABORT); 2349 } 2350 } else { 2351 aic_dequeue(sc, acb); 2352 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2353 if (sc->sc_state == AIC_IDLE) 2354 aic_sched(sc); 2355 } 2356 } 2357 2358 void 2359 aic_timeout(arg) 2360 void *arg; 2361 { 2362 struct aic_acb *acb = arg; 2363 struct scsi_xfer *xs = acb->xs; 2364 struct scsi_link *sc_link = xs->sc_link; 2365 struct aic_softc *sc = sc_link->adapter_softc; 2366 int s; 2367 2368 sc_print_addr(sc_link); 2369 printf("timed out"); 2370 2371 s = splbio(); 2372 2373 if (acb->flags == ACB_ABORTED) { 2374 /* abort timed out */ 2375 printf(" AGAIN\n"); 2376 acb->xs->retries = 0; 2377 aic_done(sc, acb); 2378 } else { 2379 /* abort the operation that has timed out */ 2380 printf("\n"); 2381 acb->xs->error = XS_TIMEOUT; 2382 acb->flags = ACB_ABORTED; 2383 aic_abort(sc, acb); 2384 /* 2 secs for the abort */ 2385 if ((xs->flags & SCSI_POLL) == 0) 2386 timeout(aic_timeout, acb, 2 * hz); 2387 } 2388 2389 splx(s); 2390 } 2391 2392 #ifdef AIC_DEBUG 2394 /* 2395 * The following functions are mostly used for debugging purposes, either 2396 * directly called from the driver or from the kernel debugger. 2397 */ 2398 2399 void 2400 aic_show_scsi_cmd(acb) 2401 struct aic_acb *acb; 2402 { 2403 u_char *b = (u_char *)&acb->scsi_cmd; 2404 struct scsi_link *sc_link = acb->xs->sc_link; 2405 int i; 2406 2407 sc_print_addr(sc_link); 2408 if ((acb->xs->flags & SCSI_RESET) == 0) { 2409 for (i = 0; i < acb->scsi_cmd_length; i++) { 2410 if (i) 2411 printf(","); 2412 printf("%x", b[i]); 2413 } 2414 printf("\n"); 2415 } else 2416 printf("RESET\n"); 2417 } 2418 2419 void 2420 aic_print_acb(acb) 2421 struct aic_acb *acb; 2422 { 2423 2424 printf("acb@%x xs=%x flags=%x", acb, acb->xs, acb->flags); 2425 printf(" dp=%x dleft=%d target_stat=%x\n", 2426 (long)acb->data_addr, acb->data_length, acb->target_stat); 2427 aic_show_scsi_cmd(acb); 2428 } 2429 2430 void 2431 aic_print_active_acb() 2432 { 2433 struct aic_acb *acb; 2434 struct aic_softc *sc = aiccd.cd_devs[0]; 2435 2436 printf("ready list:\n"); 2437 for (acb = sc->ready_list.tqh_first; acb != NULL; 2438 acb = acb->chain.tqe_next) 2439 aic_print_acb(acb); 2440 printf("nexus:\n"); 2441 if (sc->sc_nexus != NULL) 2442 aic_print_acb(sc->sc_nexus); 2443 printf("nexus list:\n"); 2444 for (acb = sc->nexus_list.tqh_first; acb != NULL; 2445 acb = acb->chain.tqe_next) 2446 aic_print_acb(acb); 2447 } 2448 2449 void 2450 aic_dump6360(sc) 2451 struct aic_softc *sc; 2452 { 2453 2454 printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIG=%x\n", 2455 inb(SCSISEQ), inb(SXFRCTL0), inb(SXFRCTL1), inb(SCSISIG)); 2456 printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n", 2457 inb(SSTAT0), inb(SSTAT1), inb(SSTAT2), inb(SSTAT3), inb(SSTAT4)); 2458 printf(" SIMODE0=%x SIMODE1=%x DMACNTRL0=%x DMACNTRL1=%x DMASTAT=%x\n", 2459 inb(SIMODE0), inb(SIMODE1), inb(DMACNTRL0), inb(DMACNTRL1), 2460 inb(DMASTAT)); 2461 printf(" FIFOSTAT=%d SCSIBUS=0x%x\n", 2462 inb(FIFOSTAT), inb(SCSIBUS)); 2463 } 2464 2465 void 2466 aic_dump_driver(sc) 2467 struct aic_softc *sc; 2468 { 2469 struct aic_tinfo *ti; 2470 int i; 2471 2472 printf("nexus=%x prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2473 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x msgout=%x\n", 2474 sc->sc_state, sc->sc_imess[0], 2475 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_msgout); 2476 for (i = 0; i < 7; i++) { 2477 ti = &sc->sc_tinfo[i]; 2478 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2479 i, ti->cmds, ti->dconns, ti->touts); 2480 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2481 } 2482 } 2483 #endif 2484
Indexes created Sun Oct 26 17:10:13 GMT 2025