aic6360.c revision 1.5.2.3
1 /* 2 * Copyright (c) 1994 Charles Hannum. 3 * Copyright (c) 1994 Jarle Greipsland 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * $Id: aic6360.c,v 1.5.2.3 1994/10/17 00:09:10 cgd Exp $ 32 * 33 * Acknowledgements: Many of the algorithms used in this driver are 34 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 35 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 36 */ 37 38 /* TODO list: 39 * 1) Get the DMA stuff working. 40 * 2) Get the iov/uio stuff working. Is this a good thing ??? 41 * 3) Get the synch stuff working. 42 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 43 */ 44 45 /* 46 * A few customizable items: 47 */ 48 49 /* The SCSI ID of the host adapter/computer */ 50 #define AIC_SCSI_HOSTID 7 51 52 /* Use doubleword transfers to/from SCSI chip. Note: This requires 53 * motherboard support. Basicly, some motherboard chipsets are able to 54 * split a 32 bit I/O operation into two 16 bit I/O operations, 55 * transparently to the processor. This speeds up some things, notably long 56 * data transfers. 57 */ 58 #define AIC_USE_DWORDS 0 59 60 /* Allow disconnects? Was mainly used in an early phase of the driver when 61 * the message system was very flaky. Should go away soon. 62 */ 63 #define AIC_ALLOW_DISCONNECT 1 64 65 /* Synchronous data transfers? (does not work yet!) XXX */ 66 #define AIC_USE_SYNCHRONOUS 0 /* Enable/disable (1/0) */ 67 #define AIC_SYNC_PERIOD 200 68 #define AIC_SYNC_REQ_ACK_OFS 8 69 70 /* Max attempts made to transmit a message */ 71 #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 72 73 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/ 74 #define AIC_USE_EISA_DMA 0 75 #define AIC_USE_ISA_DMA 0 76 77 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */ 78 #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */ 79 80 /* Some spin loop parameters (essentially how long to wait some places) 81 * The problem(?) is that sometimes we expect either to be able to transmit a 82 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 83 * returning from the interrupt just to get yanked back for the next byte we 84 * may spin in the interrupt routine waiting for this byte to come. How long? 85 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 86 */ 87 #define AIC_MSGI_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 88 #define AIC_MSGO_SPIN 1 89 90 /* Include debug functions? At the end of this file there are a bunch of 91 * functions that will print out various information regarding queued SCSI 92 * commands, driver state and chip contents. You can call them from the 93 * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the 94 * kernel uses less memory) but you lose the debugging facilities. 95 */ 96 #define AIC_DEBUG 1 97 98 /* End of customizable parameters */ 99 100 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA 101 #error "I said not yet! Start paying attention... grumble" 102 #endif 103 104 #include <sys/types.h> 105 #include <sys/param.h> 106 #include <sys/systm.h> 107 #include <sys/kernel.h> 108 #include <sys/errno.h> 109 #include <sys/ioctl.h> 110 #include <sys/device.h> 111 #include <sys/buf.h> 112 #include <sys/proc.h> 113 #include <sys/user.h> 114 #include <sys/queue.h> 115 116 #include <machine/pio.h> 117 118 #include <scsi/scsi_all.h> 119 #include <scsi/scsiconf.h> 120 121 #include <i386/isa/isavar.h> 122 #include <i386/isa/icu.h> 123 124 /* Definitions, most of them has turned out to be unneccesary, but here they 125 * are anyway. 126 */ 127 128 /* 129 * Generic SCSI messages. For now we reject most of them. 130 */ 131 /* Messages (1 byte) */ /* I/T M(andatory) or (O)ptional */ 132 #define MSG_CMDCOMPLETE 0x00 /* M/M */ 133 #define MSG_EXTENDED 0x01 /* O/O */ 134 #define MSG_SAVEDATAPOINTER 0x02 /* O/O */ 135 #define MSG_RESTOREPOINTERS 0x03 /* O/O */ 136 #define MSG_DISCONNECT 0x04 /* O/O */ 137 #define MSG_INITIATOR_DET_ERR 0x05 /* M/M */ 138 #define MSG_ABORT 0x06 /* O/M */ 139 #define MSG_MESSAGE_REJECT 0x07 /* M/M */ 140 #define MSG_NOOP 0x08 /* M/M */ 141 #define MSG_PARITY_ERR 0x09 /* M/M */ 142 #define MSG_LINK_CMD_COMPLETE 0x0a /* O/O */ 143 #define MSG_LINK_CMD_COMPLETEF 0x0b /* O/O */ 144 #define MSG_BUS_DEV_RESET 0x0c /* O/M */ 145 #define MSG_ABORT_TAG 0x0d /* O/O */ 146 #define MSG_CLEAR_QUEUE 0x0e /* O/O */ 147 #define MSG_INIT_RECOVERY 0x0f /* O/O */ 148 #define MSG_REL_RECOVERY 0x10 /* O/O */ 149 #define MSG_TERM_IO_PROC 0x11 /* O/O */ 150 151 /* Messages (2 byte) */ 152 #define MSG_SIMPLE_Q_TAG 0x20 /* O/O */ 153 #define MSG_HEAD_OF_Q_TAG 0x21 /* O/O */ 154 #define MSG_ORDERED_Q_TAG 0x22 /* O/O */ 155 #define MSG_IGN_WIDE_RESIDUE 0x23 /* O/O */ 156 157 /* Identify message */ 158 #define MSG_IDENTIFY(lun) ((AIC_ALLOW_DISCONNECT ? 0xc0 : 0x80)|((lun) & 0x7)) 159 #define MSG_ISIDENT(m) ((m) & 0x80) 160 161 /* Extended messages (opcode) */ 162 #define MSG_EXT_SDTR 0x01 163 164 /* SCSI Status codes */ 165 #define ST_GOOD 0x00 166 #define ST_CHKCOND 0x02 167 #define ST_CONDMET 0x04 168 #define ST_BUSY 0x08 169 #define ST_INTERMED 0x10 170 #define ST_INTERMED_CONDMET 0x14 171 #define ST_RESERVATION_CONFLICT 0x18 172 #define ST_CMD_TERM 0x22 173 #define ST_QUEUE_FULL 0x28 174 175 #define ST_MASK 0x3e /* bit 0,6,7 is reserved */ 176 177 /* AIC6360 definitions */ 178 #define SCSISEQ (iobase + 0x00) /* SCSI sequence control */ 179 #define SXFRCTL0 (iobase + 0x01) /* SCSI transfer control 0 */ 180 #define SXFRCTL1 (iobase + 0x02) /* SCSI transfer control 1 */ 181 #define SCSISIGI (iobase + 0x03) /* SCSI signal in */ 182 #define SCSISIGO (iobase + 0x03) /* SCSI signal out */ 183 #define SCSIRATE (iobase + 0x04) /* SCSI rate control */ 184 #define SCSIID (iobase + 0x05) /* SCSI ID */ 185 #define SELID (iobase + 0x05) /* Selection/Reselection ID */ 186 #define SCSIDAT (iobase + 0x06) /* SCSI Latched Data */ 187 #define SCSIBUS (iobase + 0x07) /* SCSI Data Bus*/ 188 #define STCNT0 (iobase + 0x08) /* SCSI transfer count */ 189 #define STCNT1 (iobase + 0x09) 190 #define STCNT2 (iobase + 0x0a) 191 #define CLRSINT0 (iobase + 0x0b) /* Clear SCSI interrupts 0 */ 192 #define SSTAT0 (iobase + 0x0b) /* SCSI interrupt status 0 */ 193 #define CLRSINT1 (iobase + 0x0c) /* Clear SCSI interrupts 1 */ 194 #define SSTAT1 (iobase + 0x0c) /* SCSI status 1 */ 195 #define SSTAT2 (iobase + 0x0d) /* SCSI status 2 */ 196 #define SCSITEST (iobase + 0x0e) /* SCSI test control */ 197 #define SSTAT3 (iobase + 0x0e) /* SCSI status 3 */ 198 #define CLRSERR (iobase + 0x0f) /* Clear SCSI errors */ 199 #define SSTAT4 (iobase + 0x0f) /* SCSI status 4 */ 200 #define SIMODE0 (iobase + 0x10) /* SCSI interrupt mode 0 */ 201 #define SIMODE1 (iobase + 0x11) /* SCSI interrupt mode 1 */ 202 #define DMACNTRL0 (iobase + 0x12) /* DMA control 0 */ 203 #define DMACNTRL1 (iobase + 0x13) /* DMA control 1 */ 204 #define DMASTAT (iobase + 0x14) /* DMA status */ 205 #define FIFOSTAT (iobase + 0x15) /* FIFO status */ 206 #define DMADATA (iobase + 0x16) /* DMA data */ 207 #define DMADATAL (iobase + 0x16) /* DMA data low byte */ 208 #define DMADATAH (iobase + 0x17) /* DMA data high byte */ 209 #define BRSTCNTRL (iobase + 0x18) /* Burst Control */ 210 #define DMADATALONG (iobase + 0x18) 211 #define PORTA (iobase + 0x1a) /* Port A */ 212 #define PORTB (iobase + 0x1b) /* Port B */ 213 #define REV (iobase + 0x1c) /* Revision (001 for 6360) */ 214 #define STACK (iobase + 0x1d) /* Stack */ 215 #define TEST (iobase + 0x1e) /* Test register */ 216 #define ID (iobase + 0x1f) /* ID register */ 217 218 #define IDSTRING "(C)1991ADAPTECAIC6360 " 219 220 /* What all the bits do */ 221 222 /* SCSISEQ */ 223 #define TEMODEO 0x80 224 #define ENSELO 0x40 225 #define ENSELI 0x20 226 #define ENRESELI 0x10 227 #define ENAUTOATNO 0x08 228 #define ENAUTOATNI 0x04 229 #define ENAUTOATNP 0x02 230 #define SCSIRSTO 0x01 231 232 /* SXFRCTL0 */ 233 #define SCSIEN 0x80 234 #define DMAEN 0x40 235 #define CHEN 0x20 236 #define CLRSTCNT 0x10 237 #define SPIOEN 0x08 238 #define CLRCH 0x02 239 240 /* SXFRCTL1 */ 241 #define BITBUCKET 0x80 242 #define SWRAPEN 0x40 243 #define ENSPCHK 0x20 244 #define STIMESEL1 0x10 245 #define STIMESEL0 0x08 246 #define STIMO_256ms 0x00 247 #define STIMO_128ms 0x08 248 #define STIMO_64ms 0x10 249 #define STIMO_32ms 0x18 250 #define ENSTIMER 0x04 251 #define BYTEALIGN 0x02 252 253 /* SCSISIGI */ 254 #define CDI 0x80 255 #define IOI 0x40 256 #define MSGI 0x20 257 #define ATNI 0x10 258 #define SELI 0x08 259 #define BSYI 0x04 260 #define REQI 0x02 261 #define ACKI 0x01 262 263 /* Important! The 3 most significant bits of this register, in initiator mode, 264 * represents the "expected" SCSI bus phase and can be used to trigger phase 265 * mismatch and phase change interrupts. But more important: If there is a 266 * phase mismatch the chip will not transfer any data! This is actually a nice 267 * feature as it gives us a bit more control over what is happening when we are 268 * bursting data (in) through the FIFOs and the phase suddenly changes from 269 * DATA IN to STATUS or MESSAGE IN. The transfer will stop and wait for the 270 * proper phase to be set in this register instead of dumping the bits into the 271 * FIFOs. 272 */ 273 /* SCSISIGO */ 274 #define CDO 0x80 275 #define CDEXP (CDO) 276 #define IOO 0x40 277 #define IOEXP (IOO) 278 #define MSGO 0x20 279 #define MSGEXP (MSGO) 280 #define ATNO 0x10 281 #define SELO 0x08 282 #define BSYO 0x04 283 #define REQO 0x02 284 #define ACKO 0x01 285 286 /* Information transfer phases */ 287 #define PH_DOUT (0) 288 #define PH_DIN (IOI) 289 #define PH_CMD (CDI) 290 #define PH_STAT (CDI|IOI) 291 #define PH_MSGO (MSGI|CDI) 292 #define PH_MSGI (MSGI|CDI|IOI) 293 294 #define PH_MASK 0xe0 295 296 /* Some pseudo phases for getphase()*/ 297 #define PH_BUSFREE 0x100 /* (Re)Selection no longer valid */ 298 #define PH_INVALID 0x101 /* (Re)Selection valid, but no REQ yet */ 299 #define PH_PSBIT 0x100 /* "pseudo" bit */ 300 301 /* SCSIRATE */ 302 #define SXFR2 0x40 303 #define SXFR1 0x20 304 #define SXFR0 0x10 305 #define SOFS3 0x08 306 #define SOFS2 0x04 307 #define SOFS1 0x02 308 #define SOFS0 0x01 309 310 /* SCSI ID */ 311 #define OID2 0x40 312 #define OID1 0x20 313 #define OID0 0x10 314 #define OID_S 4 /* shift value */ 315 #define TID2 0x04 316 #define TID1 0x02 317 #define TID0 0x01 318 #define SCSI_ID_MASK 0x7 319 320 /* SCSI selection/reselection ID (both target *and* initiator) */ 321 #define SELID7 0x80 322 #define SELID6 0x40 323 #define SELID5 0x20 324 #define SELID4 0x10 325 #define SELID3 0x08 326 #define SELID2 0x04 327 #define SELID1 0x02 328 #define SELID0 0x01 329 330 /* CLRSINT0 Clears what? (interrupt and/or status bit) */ 331 #define SETSDONE 0x80 332 #define CLRSELDO 0x40 /* I */ 333 #define CLRSELDI 0x20 /* I+ */ 334 #define CLRSELINGO 0x10 /* I */ 335 #define CLRSWRAP 0x08 /* I+S */ 336 #define CLRSDONE 0x04 /* I+S */ 337 #define CLRSPIORDY 0x02 /* I */ 338 #define CLRDMADONE 0x01 /* I */ 339 340 /* SSTAT0 Howto clear */ 341 #define TARGET 0x80 342 #define SELDO 0x40 /* Selfclearing */ 343 #define SELDI 0x20 /* Selfclearing when CLRSELDI is set */ 344 #define SELINGO 0x10 /* Selfclearing */ 345 #define SWRAP 0x08 /* CLRSWAP */ 346 #define SDONE 0x04 /* Not used in initiator mode */ 347 #define SPIORDY 0x02 /* Selfclearing (op on SCSIDAT) */ 348 #define DMADONE 0x01 /* Selfclearing (all FIFOs empty & T/C */ 349 350 /* CLRSINT1 Clears what? */ 351 #define CLRSELTIMO 0x80 /* I+S */ 352 #define CLRATNO 0x40 353 #define CLRSCSIRSTI 0x20 /* I+S */ 354 #define CLRBUSFREE 0x08 /* I+S */ 355 #define CLRSCSIPERR 0x04 /* I+S */ 356 #define CLRPHASECHG 0x02 /* I+S */ 357 #define CLRREQINIT 0x01 /* I+S */ 358 359 /* SSTAT1 How to clear? When set?*/ 360 #define SELTO 0x80 /* C select out timeout */ 361 #define ATNTARG 0x40 /* Not used in initiator mode */ 362 #define SCSIRSTI 0x20 /* C RST asserted */ 363 #define PHASEMIS 0x10 /* Selfclearing */ 364 #define BUSFREE 0x08 /* C bus free condition */ 365 #define SCSIPERR 0x04 /* C parity error on inbound data */ 366 #define PHASECHG 0x02 /* C phase in SCSISIGI doesn't match */ 367 #define REQINIT 0x01 /* C or ACK asserting edge of REQ */ 368 369 /* SSTAT2 */ 370 #define SOFFSET 0x20 371 #define SEMPTY 0x10 372 #define SFULL 0x08 373 #define SFCNT2 0x04 374 #define SFCNT1 0x02 375 #define SFCNT0 0x01 376 377 /* SCSITEST */ 378 #define SCTESTU 0x08 379 #define SCTESTD 0x04 380 #define STCTEST 0x01 381 382 /* SSTAT3 */ 383 #define SCSICNT3 0x80 384 #define SCSICNT2 0x40 385 #define SCSICNT1 0x20 386 #define SCSICNT0 0x10 387 #define OFFCNT3 0x08 388 #define OFFCNT2 0x04 389 #define OFFCNT1 0x02 390 #define OFFCNT0 0x01 391 392 /* CLRSERR */ 393 #define CLRSYNCERR 0x04 394 #define CLRFWERR 0x02 395 #define CLRFRERR 0x01 396 397 /* SSTAT4 */ 398 #define SYNCERR 0x04 399 #define FWERR 0x02 400 #define FRERR 0x01 401 402 /* SIMODE0 */ 403 #define ENSELDO 0x40 404 #define ENSELDI 0x20 405 #define ENSELINGO 0x10 406 #define ENSWRAP 0x08 407 #define ENSDONE 0x04 408 #define ENSPIORDY 0x02 409 #define ENDMADONE 0x01 410 411 /* SIMODE1 */ 412 #define ENSELTIMO 0x80 413 #define ENATNTARG 0x40 414 #define ENSCSIRST 0x20 415 #define ENPHASEMIS 0x10 416 #define ENBUSFREE 0x08 417 #define ENSCSIPERR 0x04 418 #define ENPHASECHG 0x02 419 #define ENREQINIT 0x01 420 421 /* DMACNTRL0 */ 422 #define ENDMA 0x80 423 #define B8MODE 0x40 424 #define DMA 0x20 425 #define DWORDPIO 0x10 426 #define WRITE 0x08 427 #define INTEN 0x04 428 #define RSTFIFO 0x02 429 #define SWINT 0x01 430 431 /* DMACNTRL1 */ 432 #define PWRDWN 0x80 433 #define ENSTK32 0x40 434 #define STK4 0x10 435 #define STK3 0x08 436 #define STK2 0x04 437 #define STK1 0x02 438 #define STK0 0x01 439 440 /* DMASTAT */ 441 #define ATDONE 0x80 442 #define WORDRDY 0x40 443 #define INTSTAT 0x20 444 #define DFIFOFULL 0x10 445 #define DFIFOEMP 0x08 446 #define DFIFOHF 0x04 447 #define DWORDRDY 0x02 448 449 /* BRSTCNTRL */ 450 #define BON3 0x80 451 #define BON2 0x40 452 #define BON1 0x20 453 #define BON0 0x10 454 #define BOFF3 0x08 455 #define BOFF2 0x04 456 #define BOFF1 0x02 457 #define BOFF0 0x01 458 459 /* TEST */ 460 #define BOFFTMR 0x40 461 #define BONTMR 0x20 462 #define STCNTH 0x10 463 #define STCNTM 0x08 464 #define STCNTL 0x04 465 #define SCSIBLK 0x02 466 #define DMABLK 0x01 467 468 469 #define orreg(reg, val) outb((reg), inb(reg)| (val)) 470 #define andreg(reg, val) outb((reg), inb(reg)& (val)) 471 #define nandreg(reg, val) outb((reg), inb(reg)&~(val)) 472 473 474 476 /* Grabbed from Julians SCSI aha-drivers */ 477 #ifdef DDB 478 int Debugger(); 479 #else DDB 480 #define Debugger() panic("should call debugger here (aic6360.c)") 481 #endif DDB 482 483 typedef u_long physaddr; 484 485 struct aic_dma_seg { 486 physaddr addr; 487 long len; 488 }; 489 490 extern int delaycount; 491 #define FUDGE(X) ((X)>>1) /* get 1 ms spincount */ 492 #define MINIFUDGE(X) ((X)>>4) /* get (approx) 125us spincount */ 493 #define AIC_NSEG 16 494 #define NUM_CONCURRENT 7 /* Only one per target for now */ 495 496 /* 497 * ACB. Holds additional information for each SCSI command Comments: We 498 * need a separate scsi command block because we may need to overwrite it 499 * with a request sense command. Basicly, we refrain from fiddling with 500 * the scsi_xfer struct (except do the expected updating of return values). 501 * We'll generally update: xs->{flags,resid,error,sense,status} and 502 * occasionally xs->retries. 503 */ 504 struct acb { 505 TAILQ_ENTRY(acb) chain; 506 struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ 507 int flags; /* Status */ 508 #define ACB_FREE 0x00 509 #define ACB_ACTIVE 0x01 510 #define ACB_DONE 0x04 511 #define ACB_CHKSENSE 0x08 512 /* struct aic_dma_seg dma[AIC_NSEG]; /* Physical addresses+len */ 513 struct scsi_generic cmd; /* SCSI command block */ 514 int clen; 515 char *daddr; /* Saved data pointer */ 516 int dleft; /* Residue */ 517 int stat; /* SCSI status byte */ 518 }; 519 520 /* 521 * Some info about each (possible) target on the SCSI bus. This should 522 * probably have been a "per target+lunit" structure, but we'll leave it at 523 * this for now. Is there a way to reliably hook it up to sc->fordriver?? 524 */ 525 struct aic_tinfo { 526 int cmds; /* #commands processed */ 527 int dconns; /* #disconnects */ 528 int touts; /* #timeouts */ 529 int perrs; /* #parity errors */ 530 int senses; /* #request sense commands sent */ 531 ushort lubusy; /* What local units/subr. are busy? */ 532 u_char flags; 533 #define NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ 534 #define DO_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ 535 #define TARGET_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ 536 u_char persgst; /* Period suggestion */ 537 u_char offsgst; /* Offset suggestion */ 538 u_char syncdata; /* True negotiated synch parameters */ 539 } tinfo_t; 540 541 /* Register a linenumber (for debugging) */ 542 #if AIC_DEBUG 543 #define LOGLINE(p) \ 544 do { \ 545 p->history[p->hp] = __LINE__; \ 546 p->hp = ++p->hp % AIC_HSIZE; \ 547 } while (0) 548 #else 549 #define LOGLINE(p) 550 #endif 551 552 struct aic_softc { /* One of these per adapter */ 553 /* Auto config stuff */ 554 struct device sc_dev; /* This one has to go first! */ 555 struct isadev sc_id; 556 struct intrhand sc_ih; 557 struct scsi_link sc_link; /* prototype for subdevs */ 558 int id_irq; /* IRQ on the EISA bus */ 559 int id_drq; /* DRQ on the EISA bus */ 560 u_short iobase; /* Base I/O port */ 561 /* Lists of command blocks */ 562 TAILQ_HEAD(acb_list, acb) free_list, ready_list, nexus_list; 563 struct acb *nexus; /* current command */ 564 /* Command blocks and target info */ 565 struct acb acb[NUM_CONCURRENT]; 566 struct aic_tinfo tinfo[8]; 567 /* Data about the current nexus (updated for every cmd switch) */ 568 u_char *dp; /* Current data pointer */ 569 int dleft; /* Data left to transfer */ 570 /* Adapter state */ 571 short phase; /* Copy of what bus phase we are in */ 572 short prevphase; /* Copy of what bus phase we were in */ 573 short state; /* State applicable to the adapter */ 574 #define AIC_IDLE 0x01 575 #define AIC_TMP_UNAVAIL 0x02 /* Don't accept SCSI commands */ 576 #define AIC_SELECTING 0x03 /* SCSI command is arbiting */ 577 #define AIC_RESELECTED 0x04 /* Has been reselected */ 578 #define AIC_HASNEXUS 0x05 /* Actively using the SCSI bus */ 579 #define AIC_CLEANING 0x06 580 short flags; 581 #define AIC_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ 582 #define AIC_DOINGDMA 0x02 /* The FIFO data path is active! */ 583 #define AIC_BUSFREE_OK 0x04 /* Bus free phase is OK. */ 584 #define AIC_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ 585 #define AIC_BLOCKED 0x10 /* Don't schedule new scsi bus operations */ 586 /* Debugging stuff */ 587 #define AIC_HSIZE 8 588 short history[AIC_HSIZE]; /* Store line numbers here. */ 589 short hp; 590 u_char progress; /* Set if interrupt has achieved progress */ 591 /* Message stuff */ 592 u_char msgpriq; /* One or more messages to send (encoded) */ 593 u_char msgout; /* What message is on its way out? */ 594 #define SEND_DEV_RESET 0x01 595 #define SEND_PARITY_ERROR 0x02 596 #define SEND_ABORT 0x04 597 #define SEND_REJECT 0x08 598 #define SEND_INIT_DET_ERR 0x10 599 #define SEND_IDENTIFY 0x20 600 #define SEND_SDTR 0x40 601 #define AIC_MAX_MSG_LEN 8 602 u_char omess[AIC_MAX_MSG_LEN]; /* Scratch area for messages */ 603 u_char *omp; /* Message pointer (for multibyte messages) */ 604 u_char omlen; 605 u_char imess[AIC_MAX_MSG_LEN + 1]; 606 u_char *imp; /* Message pointer (for multibyte messages) */ 607 u_char imlen; 608 }; 609 610 #define AIC_SHOWACBS 0x01 611 #define AIC_SHOWINTS 0x02 612 #define AIC_SHOWCMDS 0x04 613 #define AIC_SHOWMISC 0x08 614 #define AIC_SHOWTRAC 0x10 615 #define AIC_SHOWSTART 0x20 616 int aic_debug = 0; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRAC; /**/ 617 618 #if AIC_DEBUG 619 #define AIC_ACBS(str) do {if (aic_debug & AIC_SHOWACBS) printf str;} while (0) 620 #define AIC_MISC(str) do {if (aic_debug & AIC_SHOWMISC) printf str;} while (0) 621 #define AIC_INTS(str) do {if (aic_debug & AIC_SHOWINTS) printf str;} while (0) 622 #define AIC_TRACE(str) do {if (aic_debug & AIC_SHOWTRAC) printf str;} while (0) 623 #define AIC_CMDS(str) do {if (aic_debug & AIC_SHOWCMDS) printf str;} while (0) 624 #define AIC_START(str) do {if (aic_debug & AIC_SHOWSTART) printf str;}while (0) 625 #else 626 #define AIC_ACBS(str) 627 #define AIC_MISC(str) 628 #define AIC_INTS(str) 629 #define AIC_TRACE(str) 630 #define AIC_CMDS(str) 631 #define AIC_START(str) 632 #endif 633 634 int aicprobe __P((struct device *, struct device *, void *)); 635 void aicattach __P((struct device *, struct device *, void *)); 636 void aic_minphys __P((struct buf *)); 637 u_int aic_adapter_info __P((struct aic_softc *)); 638 int aicintr __P((struct aic_softc *)); 639 void aic_init __P((struct aic_softc *)); 640 void aic_done __P((struct acb *)); 641 int aic_scsi_cmd __P((struct scsi_xfer *)); 642 int aic_poll __P((struct aic_softc *, struct acb *)); 643 void aic_add_timeout __P((struct acb *, int)); 644 void aic_remove_timeout __P((struct acb *)); 645 void aic_timeout __P((void *arg)); 646 int aic_find __P((struct aic_softc *)); 647 void aic_sched __P((struct aic_softc *)); 648 void aic_scsi_reset __P((struct aic_softc *)); 649 #if AIC_DEBUG 650 void aic_print_active_acb(); 651 void aic_dump_driver(); 652 void aic_dump6360(); 653 #endif 654 655 /* Linkup to the rest of the kernel */ 656 struct cfdriver aiccd = { 657 NULL, "aic", aicprobe, aicattach, DV_DULL, sizeof(struct aic_softc) 658 }; 659 660 struct scsi_adapter aic_switch = { 661 aic_scsi_cmd, 662 aic_minphys, 663 0, 664 0, 665 aic_adapter_info, 666 "aic" 667 }; 668 669 struct scsi_device aic_dev = { 670 NULL, /* Use default error handler */ 671 NULL, /* have a queue, served by this */ 672 NULL, /* have no async handler */ 673 NULL, /* Use default 'done' routine */ 674 "aic", 675 0 676 }; 677 678 /* 680 * INITIALIZATION ROUTINES (probe, attach ++) 681 */ 682 683 /* 684 * aicprobe: probe for AIC6360 SCSI-controller 685 * returns non-zero value if a controller is found. 686 */ 687 int 688 aicprobe(parent, self, aux) 689 struct device *parent, *self; 690 void *aux; 691 { 692 struct aic_softc *aic = (void *)self; 693 struct isa_attach_args *ia = aux; 694 int i, len, ic; 695 696 #ifdef NEWCONFIG 697 if (ia->ia_iobase == IOBASEUNK) 698 return 0; 699 #endif 700 aic->iobase = ia->ia_iobase; 701 if (aic_find(aic) != 0) 702 return 0; 703 #ifdef NEWCONFIG 704 if (ia->ia_irq == IRQUNK) 705 ia->ia_irq = (1 << aic->aic_int); 706 else if (ia->ia_irq != (1 << aic->aic_int)) { 707 printf("aic%d: irq mismatch, %x != %x\n", 708 aic->sc_dev.dv_unit, ia->ia_irq, 1 << aic->aic_int); 709 return 0; 710 } 711 712 if (ia->ia_drq == DRQUNK) 713 ia->ia_drq = aic->aic_dma; 714 else if (ia->ia_drq != aic->aic_dma) { 715 printf("aic%d: drq mismatch, %x != %x\n", 716 aic->sc_dev.dv_unit, ia->ia_drq, aic->aic_dma); 717 return 0; 718 } 719 #endif 720 ia->ia_msize = 0; 721 ia->ia_iosize = 0x20; 722 return 1; 723 } 724 725 /* Do the real search-for-device. 726 * Prerequisite: aic->iobase should be set to the proper value 727 */ 728 int 729 aic_find(aic) 730 struct aic_softc *aic; 731 { 732 u_short iobase = aic->iobase; 733 char chip_id[sizeof(IDSTRING)]; /* For chips that support it */ 734 char *start; 735 int i; 736 737 /* Remove aic6360 from possible powerdown mode */ 738 outb(DMACNTRL0, 0); 739 740 /* Thanks to mark (at) aggregate.com for the new method for detecting 741 * whether the chip is present or not. Bonus: may also work for 742 * the AIC-6260! 743 */ 744 AIC_TRACE(("aic: probing for aic-chip at port 0x%x\n",(int)iobase)); 745 /* 746 * Linux also init's the stack to 1-16 and then clears it, 747 * 6260's don't appear to have an ID reg - mpg 748 */ 749 /* Push the sequence 0,1,..,15 on the stack */ 750 #define STSIZE 16 751 outb(DMACNTRL1, 0); /* Reset stack pointer */ 752 for (i = 0; i < STSIZE; i++) 753 outb(STACK, i); 754 755 /* See if we can pull out the same sequence */ 756 outb(DMACNTRL1, 0); 757 for (i = 0; i < STSIZE && inb(STACK) == i; i++) 758 ; 759 if (i != STSIZE) { 760 AIC_START(("STACK futzed at %d.\n", i)); 761 return ENXIO; 762 } 763 764 /* See if we can pull the id string out of the ID register, 765 * now only used for informational purposes. 766 */ 767 bzero(chip_id, sizeof(chip_id)); 768 insb(ID, chip_id, sizeof(IDSTRING)-1); 769 AIC_START(("AIC found at 0x%x ", (int)aic->iobase)); 770 AIC_START(("ID: %s ",chip_id)); 771 AIC_START(("chip revision %d\n",(int)inb(REV))); 772 return 0; 773 } 774 775 int 776 aicprint() 777 { 778 } 779 780 /* 781 * Attach the AIC6360, fill out some high and low level data structures 782 */ 783 void 784 aicattach(parent, self, aux) 785 struct device *parent, *self; 786 void *aux; 787 { 788 struct isa_attach_args *ia = aux; 789 struct aic_softc *aic = (void *)self; 790 791 AIC_TRACE(("aicattach\n")); 792 aic->state = 0; 793 aic_init(aic); /* Init chip and driver */ 794 795 /* 796 * Fill in the prototype scsi_link 797 */ 798 aic->sc_link.adapter_softc = aic; 799 aic->sc_link.adapter_targ = AIC_SCSI_HOSTID; 800 aic->sc_link.adapter = &aic_switch; 801 aic->sc_link.device = &aic_dev; 802 printf("\n"); 803 804 #ifdef NEWCONFIG 805 isa_establish(&aic->sc_id, &aic->sc_dev); 806 #endif 807 aic->sc_ih.ih_fun = aicintr; 808 aic->sc_ih.ih_arg = aic; 809 aic->sc_ih.ih_level = IPL_BIO; 810 intr_establish(ia->ia_irq, &aic->sc_ih); 811 812 config_found(self, &aic->sc_link, aicprint); 813 } 814 815 816 /* Initialize AIC6360 chip itself 817 * The following conditions should hold: 818 * aicprobe should have succeeded, i.e. the iobase address in aic_softc must 819 * be valid. 820 */ 821 static void 822 aic6360_reset(aic) 823 struct aic_softc *aic; 824 { 825 u_short iobase = aic->iobase; 826 827 outb(SCSITEST, 0); /* Doc. recommends to clear these two */ 828 outb(TEST, 0); /* registers before operations commence */ 829 830 /* Reset SCSI-FIFO and abort any transfers */ 831 outb(SXFRCTL0, CHEN|CLRCH|CLRSTCNT); 832 833 /* Reset DMA-FIFO */ 834 outb(DMACNTRL0, RSTFIFO); 835 outb(DMACNTRL1, 0); 836 837 outb(SCSISEQ, 0); /* Disable all selection features */ 838 outb(SXFRCTL1, 0); 839 840 outb(SIMODE0, 0x00); /* Disable some interrupts */ 841 outb(CLRSINT0, 0x7f); /* Clear a slew of interrupts */ 842 843 outb(SIMODE1, 0x00); /* Disable some more interrupts */ 844 outb(CLRSINT1, 0xef); /* Clear another slew of interrupts */ 845 846 outb(SCSIRATE, 0); /* Disable synchronous transfers */ 847 848 outb(CLRSERR, 0x07); /* Haven't seen ant errors (yet) */ 849 850 outb(SCSIID, AIC_SCSI_HOSTID << OID_S); /* Set our SCSI-ID */ 851 outb(BRSTCNTRL, EISA_BRST_TIM); 852 } 853 854 /* Pull the SCSI RST line for 500 us */ 855 void 856 aic_scsi_reset(aic) 857 struct aic_softc *aic; 858 { 859 u_short iobase = aic->iobase; 860 861 outb(SCSISEQ, SCSIRSTO); 862 delay(500); 863 outb(SCSISEQ, 0); 864 delay(50); 865 } 866 867 /* 868 * Initialize aic SCSI driver, also (conditonally) reset the SCSI bus. 869 * The reinitialization is still buggy (e.g. on SCSI resets). 870 */ 871 void 872 aic_init(aic) 873 struct aic_softc *aic; 874 { 875 u_short iobase = aic->iobase; 876 struct acb *acb; 877 int r; 878 879 aic_scsi_reset(aic); 880 881 aic6360_reset(aic); /* Clean up our own hardware */ 882 883 /*XXX*/ /* If not the first time (probably a reset condition), 884 * we should clean queues with active commands 885 */ 886 if (aic->state == 0) { /* First time through */ 887 TAILQ_INIT(&aic->ready_list); 888 TAILQ_INIT(&aic->nexus_list); 889 TAILQ_INIT(&aic->free_list); 890 aic->nexus = 0; 891 acb = aic->acb; 892 bzero(acb, sizeof(aic->acb)); 893 for (r = 0; r < sizeof(aic->acb) / sizeof(*acb); r++) { 894 TAILQ_INSERT_TAIL(&aic->free_list, acb, chain); 895 acb++; 896 } 897 bzero(&aic->tinfo, sizeof(aic->tinfo)); 898 } else { 899 aic->state = AIC_CLEANING; 900 if (aic->nexus != NULL) { 901 aic->nexus->xs->error = XS_DRIVER_STUFFUP; 902 untimeout(aic_timeout, aic->nexus); 903 aic_done(aic->nexus); 904 } 905 aic->nexus = NULL; 906 while (acb = aic->nexus_list.tqh_first) { 907 acb->xs->error = XS_DRIVER_STUFFUP; 908 untimeout(aic_timeout, acb); 909 aic_done(acb); 910 } 911 } 912 913 aic->phase = aic->prevphase = PH_INVALID; 914 aic->hp = 0; 915 for (r = 0; r < 7; r++) { 916 struct aic_tinfo *tp = &aic->tinfo[r]; 917 tp->flags = AIC_USE_SYNCHRONOUS ? DO_NEGOTIATE : 0; 918 tp->flags |= NEED_TO_RESET; 919 tp->persgst = AIC_SYNC_PERIOD; 920 tp->offsgst = AIC_SYNC_REQ_ACK_OFS; 921 tp->syncdata = 0; 922 } 923 aic->state = AIC_IDLE; 924 outb(DMACNTRL0, INTEN); 925 return; 926 } 927 928 /* 930 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 931 */ 932 933 /* 934 * Expected sequence: 935 * 1) Command inserted into ready list 936 * 2) Command selected for execution 937 * 3) Command won arbitration and has selected target device 938 * 4) Send message out (identify message, eventually also sync.negotiations) 939 * 5) Send command 940 * 5a) Receive disconnect message, disconnect. 941 * 5b) Reselected by target 942 * 5c) Receive identify message from target. 943 * 6) Send or receive data 944 * 7) Receive status 945 * 8) Receive message (command complete etc.) 946 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd. 947 * Repeat 2-8 (no disconnects please...) 948 */ 949 950 /* 951 * Start a SCSI-command 952 * This function is called by the higher level SCSI-driver to queue/run 953 * SCSI-commands. 954 */ 955 int 956 aic_scsi_cmd(xs) 957 struct scsi_xfer *xs; 958 { 959 struct scsi_link *sc = xs->sc_link; 960 struct aic_softc *aic = sc->adapter_softc; 961 struct acb *acb; 962 int s, flags; 963 u_short iobase = aic->iobase; 964 965 SC_DEBUG(sc, SDEV_DB2, ("aic_scsi_cmd\n")); 966 AIC_TRACE(("aic_scsi_cmd\n")); 967 AIC_MISC(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 968 sc->target)); 969 970 flags = xs->flags; 971 972 /* Get a aic command block */ 973 if (!(flags & SCSI_NOMASK)) { 974 /* Critical region */ 975 s = splbio(); 976 acb = aic->free_list.tqh_first; 977 if (acb) { 978 TAILQ_REMOVE(&aic->free_list, acb, chain); 979 } 980 splx(s); 981 } else { 982 acb = aic->free_list.tqh_first; 983 if (acb) { 984 TAILQ_REMOVE(&aic->free_list, acb, chain); 985 } 986 } 987 988 if (acb == NULL) { 989 xs->error = XS_DRIVER_STUFFUP; 990 AIC_MISC(("TRY_AGAIN_LATER")); 991 return TRY_AGAIN_LATER; 992 } 993 994 /* Initialize acb */ 995 acb->flags = ACB_ACTIVE; 996 acb->xs = xs; 997 bcopy(xs->cmd, &acb->cmd, xs->cmdlen); 998 acb->clen = xs->cmdlen; 999 acb->daddr = xs->data; 1000 acb->dleft = xs->datalen; 1001 acb->stat = 0; 1002 1003 if (!(flags & SCSI_NOMASK)) 1004 s = splbio(); 1005 1006 TAILQ_INSERT_TAIL(&aic->ready_list, acb, chain); 1007 timeout(aic_timeout, acb, (xs->timeout*hz)/1000); 1008 1009 if (aic->state == AIC_IDLE) 1010 aic_sched(aic); 1011 1012 if (!(flags & SCSI_NOMASK)) { /* Almost done. Wait outside */ 1013 splx(s); 1014 AIC_MISC(("SUCCESSFULLY_QUEUED")); 1015 return SUCCESSFULLY_QUEUED; 1016 } 1017 1018 /* Not allowed to use interrupts, use polling instead */ 1019 return aic_poll(aic, acb); 1020 } 1021 1022 /* 1023 * Adjust transfer size in buffer structure 1024 */ 1025 void 1026 aic_minphys(bp) 1027 struct buf *bp; 1028 { 1029 1030 AIC_TRACE(("aic_minphys\n")); 1031 if (bp->b_bcount > (AIC_NSEG << PGSHIFT)) 1032 bp->b_bcount = (AIC_NSEG << PGSHIFT); 1033 } 1034 1035 1036 u_int 1037 aic_adapter_info(aic) 1038 struct aic_softc *aic; 1039 { 1040 1041 AIC_TRACE(("aic_adapter_info\n")); 1042 return 2; /* One outstanding command per target */ 1043 } 1044 1045 /* 1046 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 1047 */ 1048 int 1049 aic_poll(aic, acb) 1050 struct aic_softc *aic; 1051 struct acb *acb; 1052 { 1053 register u_short iobase = aic->iobase; 1054 struct scsi_xfer *xs = acb->xs; 1055 int count = xs->timeout * 10; 1056 1057 AIC_TRACE(("aic_poll\n")); 1058 while (count) { 1059 if (inb(DMASTAT) & INTSTAT) 1060 aicintr(aic); 1061 if (xs->flags & ITSDONE) 1062 break; 1063 delay(100); 1064 count--; 1065 } 1066 if (count == 0) { 1067 AIC_MISC(("aic_poll: timeout")); 1068 aic_timeout((caddr_t)acb); 1069 } 1070 if (xs->error) 1071 return HAD_ERROR; 1072 return COMPLETE; 1073 } 1074 1075 /* LOW LEVEL SCSI UTILITIES */ 1077 1078 /* Determine the SCSI bus phase, return either a real SCSI bus phase or some 1079 * pseudo phase we use to detect certain exceptions. This one is a bit tricky. 1080 * The bits we peek at: 1081 * CDI, MSGI and DI is the 3 SCSI signals determining the bus phase. 1082 * These should be qualified by REQI high and ACKI low. 1083 * Also peek at SSTAT0[SELDO|SELDI] to detect a passing BUSFREE condition. 1084 * No longer detect SCSI RESET or PERR here. They are tested for separately 1085 * in the interrupt handler. 1086 * Note: If an exception occur at some critical time during the phase 1087 * determination we'll most likely return something wildly erronous.... 1088 */ 1089 static inline u_short 1090 aicphase(aic) 1091 struct aic_softc *aic; 1092 { 1093 register u_short iobase = aic->iobase; 1094 register u_char sstat0, sstat1, scsisig; 1095 1096 sstat1 = inb(SSTAT1); /* Look for REQINIT (REQ asserted) */ 1097 scsisig = inb(SCSISIGI); /* Get the SCSI bus signals */ 1098 sstat0 = inb(SSTAT0); /* Get the selection valid status bits */ 1099 1100 if (!(inb(SSTAT0) & (SELDO|SELDI))) /* Selection became invalid? */ 1101 return PH_BUSFREE; 1102 1103 /* Selection is still valid */ 1104 if (!(sstat1 & REQINIT)) /* REQ not asserted ? */ 1105 return PH_INVALID; 1106 1107 /* REQ is asserted, (and ACK is not) */ 1108 return scsisig & PH_MASK; 1109 } 1110 1111 1112 /* Schedule a scsi operation. This has now been pulled out of the interrupt 1114 * handler so that we may call it from aic_scsi_cmd and aic_done. This may 1115 * save us an unecessary interrupt just to get things going. Should only be 1116 * called when state == AIC_IDLE and at bio pl. 1117 */ 1118 void 1119 aic_sched(aic) 1120 register struct aic_softc *aic; 1121 { 1122 struct scsi_xfer *xs; 1123 struct scsi_link *sc; 1124 struct acb *acb; 1125 u_short iobase = aic->iobase; 1126 int t, l; 1127 u_char simode0, simode1, scsiseq; 1128 1129 AIC_TRACE(("aic_sched\n")); 1130 simode0 = ENSELDI; 1131 simode1 = ENSCSIRST|ENSCSIPERR|ENREQINIT; 1132 scsiseq = ENRESELI; 1133 /* 1134 * Find first acb in rdy queue that is for a target/lunit 1135 * combinations that is not busy. 1136 */ 1137 outb(CLRSINT1, CLRSELTIMO|CLRBUSFREE|CLRSCSIPERR); 1138 for (acb = aic->ready_list.tqh_first; acb; acb = acb->chain.tqe_next) { 1139 sc = acb->xs->sc_link; 1140 t = sc->target; 1141 if (!(aic->tinfo[t].lubusy & (1 << sc->lun))) { 1142 TAILQ_REMOVE(&aic->ready_list, acb, chain); 1143 aic->nexus = acb; 1144 aic->state = AIC_SELECTING; 1145 /* 1146 * Start selection process. Always enable 1147 * reselections. Note: we don't have a nexus yet, so 1148 * cannot set aic->state = AIC_HASNEXUS. 1149 */ 1150 simode0 = ENSELDI|ENSELDO; 1151 simode1 = ENSCSIRST|ENSCSIPERR| 1152 ENREQINIT|ENSELTIMO; 1153 scsiseq = ENRESELI|ENSELO|ENAUTOATNO; 1154 outb(SCSIID, AIC_SCSI_HOSTID << OID_S | t); 1155 outb(SXFRCTL1, STIMO_256ms|ENSTIMER); 1156 outb(CLRSINT0, CLRSELDO); 1157 break; 1158 } else 1159 AIC_MISC(("%d:%d busy\n", t, sc->lun)); 1160 } 1161 AIC_MISC(("%sselecting\n",scsiseq&ENSELO?"":"re")); 1162 outb(SIMODE0, simode0); 1163 outb(SIMODE1, simode1); 1164 outb(SCSISEQ, scsiseq); 1165 } 1166 1167 1168 /* 1170 * POST PROCESSING OF SCSI_CMD (usually current) 1171 */ 1172 void 1173 aic_done(acb) 1174 struct acb *acb; 1175 { 1176 struct scsi_xfer *xs = acb->xs; 1177 struct scsi_link *sc = xs->sc_link; 1178 struct aic_softc *aic = sc->adapter_softc; 1179 u_short iobase = aic->iobase; 1180 struct acb *acb2; 1181 1182 AIC_TRACE(("aic_done ")); 1183 1184 /* 1185 * Now, if we've come here with no error code, i.e. we've kept the 1186 * initial XS_NOERROR, and the status code signals that we should 1187 * check sense, we'll need to set up a request sense cmd block and 1188 * push the command back into the ready queue *before* any other 1189 * commands for this target/lunit, else we lose the sense info. 1190 * We don't support chk sense conditions for the request sense cmd. 1191 */ 1192 if (xs->error == XS_NOERROR && !(acb->flags & ACB_CHKSENSE)) { 1193 if ((acb->stat & ST_MASK)==SCSI_CHECK) { 1194 struct scsi_sense *ss = (void *)&acb->cmd; 1195 AIC_MISC(("requesting sense ")); 1196 /* First, save the return values */ 1197 xs->resid = acb->dleft; 1198 xs->status = acb->stat; 1199 /* Next, setup a request sense command block */ 1200 bzero(ss, sizeof(*ss)); 1201 ss->op_code = REQUEST_SENSE; 1202 ss->byte2 = sc->lun << 5; 1203 ss->length = sizeof(struct scsi_sense_data); 1204 acb->clen = sizeof(*ss); 1205 acb->daddr = (char *)&xs->sense; 1206 acb->dleft = sizeof(struct scsi_sense_data); 1207 acb->flags = ACB_ACTIVE|ACB_CHKSENSE; 1208 TAILQ_INSERT_HEAD(&aic->ready_list, acb, chain); 1209 aic->tinfo[sc->target].lubusy &= ~(1<<sc->lun); 1210 aic->tinfo[sc->target].senses++; 1211 if (aic->nexus == acb) { 1212 aic->nexus = NULL; 1213 aic->state = AIC_IDLE; 1214 aic_sched(aic); 1215 } 1216 return; 1217 } 1218 } 1219 1220 if (xs->flags & SCSI_ERR_OK) { 1221 xs->resid = 0; 1222 xs->error = XS_NOERROR; 1223 } else if (xs->error == XS_NOERROR && (acb->flags & ACB_CHKSENSE)) { 1224 xs->error = XS_SENSE; 1225 } else { 1226 xs->resid = acb->dleft; 1227 } 1228 xs->flags |= ITSDONE; 1229 1230 #if AIC_DEBUG 1231 if (aic_debug & AIC_SHOWMISC) { 1232 printf("err=0x%02x ",xs->error); 1233 if (xs->error == XS_SENSE) 1234 printf("sense=%2x\n", xs->sense.error_code); 1235 } 1236 if ((xs->resid || xs->error > XS_SENSE) && aic_debug & AIC_SHOWMISC) { 1237 if (xs->resid) 1238 printf("aic_done: resid=%d\n", xs->resid); 1239 if (xs->error) 1240 printf("aic_done: error=%d\n", xs->error); 1241 } 1242 #endif 1243 1244 /* 1245 * Remove the ACB from whatever queue it's on. We have to do a bit of 1246 * a hack to figure out which queue it's on. Note that it is *not* 1247 * necessary to cdr down the ready queue, but we must cdr down the 1248 * nexus queue and see if it's there, so we can mark the unit as no 1249 * longer busy. This code is sickening, but it works. 1250 */ 1251 if (acb == aic->nexus) { 1252 aic->state = AIC_IDLE; 1253 aic->tinfo[sc->target].lubusy &= ~(1<<sc->lun); 1254 aic_sched(aic); 1255 } else if (aic->ready_list.tqh_last == &acb->chain.tqe_next) { 1256 TAILQ_REMOVE(&aic->ready_list, acb, chain); 1257 } else { 1258 register struct acb *acb2; 1259 for (acb2 = aic->nexus_list.tqh_first; acb2; 1260 acb2 = acb2->chain.tqe_next) 1261 if (acb2 == acb) { 1262 TAILQ_REMOVE(&aic->nexus_list, acb, chain); 1263 aic->tinfo[sc->target].lubusy &= ~(1<<sc->lun); 1264 /* XXXX Should we call aic_sched() here? */ 1265 break; 1266 } 1267 if (acb2) 1268 ; 1269 else if (acb->chain.tqe_next) { 1270 TAILQ_REMOVE(&aic->ready_list, acb, chain); 1271 } else { 1272 printf("%s: can't find matching acb\n", 1273 aic->sc_dev.dv_xname); 1274 Debugger(); 1275 } 1276 } 1277 /* Put it on the free list. */ 1278 acb->flags = ACB_FREE; 1279 TAILQ_INSERT_HEAD(&aic->free_list, acb, chain); 1280 1281 aic->tinfo[sc->target].cmds++; 1282 scsi_done(xs); 1283 return; 1284 } 1285 1286 /* 1288 * INTERRUPT/PROTOCOL ENGINE 1289 */ 1290 1291 /* The message system: 1292 * This is a revamped message system that now should easier accomodate new 1293 * messages, if necessary. 1294 * Currently we accept these messages: 1295 * IDENTIFY (when reselecting) 1296 * COMMAND COMPLETE # (expect bus free after messages marked #) 1297 * NOOP 1298 * MESSAGE REJECT 1299 * SYNCHRONOUS DATA TRANSFER REQUEST 1300 * SAVE DATA POINTER 1301 * RESTORE POINTERS 1302 * DISCONNECT # 1303 * 1304 * We may send these messages in prioritized order: 1305 * BUS DEVICE RESET # if SCSI_RESET & xs->flags (or in weird sits.) 1306 * MESSAGE PARITY ERROR par. err. during MSGI 1307 * MESSAGE REJECT If we get a message we don't know how to handle 1308 * ABORT # send on errors 1309 * INITIATOR DETECTED ERROR also on errors (SCSI2) (during info xfer) 1310 * IDENTIFY At the start of each transfer 1311 * SYNCHRONOUS DATA TRANSFER REQUEST if appropriate 1312 * NOOP if nothing else fits the bill ... 1313 */ 1314 1315 #define aic_sched_msgout(m) \ 1316 do { \ 1317 orreg(SCSISIGO, ATNO); \ 1318 aic->msgpriq |= (m); \ 1319 } while (0) 1320 1321 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) >= 0x80) 1322 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20) 1323 #define ISEXTMSG(m) ((m) == 1) 1324 /* Precondition: 1325 * The SCSI bus is already in the MSGI phase and there is a message byte 1326 * on the bus, along with an asserted REQ signal. 1327 */ 1328 static void 1329 aic_msgin(aic) 1330 register struct aic_softc *aic; 1331 { 1332 register u_short iobase = aic->iobase; 1333 int spincount, extlen; 1334 u_char sstat1; 1335 1336 AIC_TRACE(("aic_msgin ")); 1337 outb(SCSISIGO, PH_MSGI); 1338 /* Prepare for a new message. A message should (according to the SCSI 1339 * standard) be transmitted in one single message_in phase. 1340 * If we have been in some other phase, then this is a new message. 1341 */ 1342 if (aic->prevphase != PH_MSGI) { 1343 aic->flags &= ~AIC_DROP_MSGI; 1344 aic->imlen = 0; 1345 } 1346 /* 1347 * Read a whole message but the last byte. If we shall reject the 1348 * message, we shall have to do it, by asserting ATNO, during the 1349 * message transfer phase itself. 1350 */ 1351 for (;;) { 1352 sstat1 = inb(SSTAT1); 1353 /* If parity errors just dump everything on the floor, also 1354 * a parity error automatically sets ATNO 1355 */ 1356 if (sstat1 & SCSIPERR) { 1357 aic_sched_msgout(SEND_PARITY_ERROR); 1358 aic->flags |= AIC_DROP_MSGI; 1359 } 1360 /* 1361 * If we're going to reject the message, don't bother storing 1362 * the incoming bytes. But still, we need to ACK them. 1363 */ 1364 if (!(aic->flags & AIC_DROP_MSGI)) { 1365 /* Get next message byte */ 1366 aic->imess[aic->imlen] = inb(SCSIDAT); 1367 /* 1368 * This testing is suboptimal, but most messages will 1369 * be of the one byte variety, so it should not effect 1370 * performance significantly. 1371 */ 1372 if (IS1BYTEMSG(aic->imess[0])) 1373 break; 1374 if (IS2BYTEMSG(aic->imess[0]) && aic->imlen == 1) 1375 break; 1376 if (ISEXTMSG(aic->imess[0]) && aic->imlen > 0) { 1377 if (aic->imlen == AIC_MAX_MSG_LEN) { 1378 aic->flags |= AIC_DROP_MSGI; 1379 aic_sched_msgout(SEND_REJECT); 1380 } 1381 extlen = aic->imess[1] ? aic->imess[1] : 256; 1382 if (aic->imlen == extlen + 2) 1383 break; /* Got it all */ 1384 } 1385 } 1386 /* If we reach this spot we're either: 1387 * a) in the middle of a multi-byte message or 1388 * b) we're dropping bytes 1389 */ 1390 outb(SXFRCTL0, CHEN|SPIOEN); 1391 inb(SCSIDAT); /* Really read it (ACK it, that is) */ 1392 outb(SXFRCTL0, CHEN); 1393 aic->imlen++; 1394 1395 /* 1396 * We expect the bytes in a multibyte message to arrive 1397 * relatively close in time, a few microseconds apart. 1398 * Therefore we will spinwait for some small amount of time 1399 * waiting for the next byte. 1400 */ 1401 spincount = MINIFUDGE(delaycount) * AIC_MSGI_SPIN; 1402 LOGLINE(aic); 1403 while (spincount-- && !((sstat1 = inb(SSTAT1)) & REQINIT)) 1404 ; 1405 if (spincount == -1 || sstat1 & (PHASEMIS|BUSFREE)) 1406 return; 1407 } 1408 /* Now we should have a complete message (1 byte, 2 byte and moderately 1409 * long extended messages). We only handle extended messages which 1410 * total length is shorter than AIC_MAX_MSG_LEN. Longer messages will 1411 * be amputated. (Return XS_BOBBITT ?) 1412 */ 1413 if (aic->state == AIC_HASNEXUS) { 1414 struct acb *acb = aic->nexus; 1415 struct aic_tinfo *ti = &aic->tinfo[acb->xs->sc_link->target]; 1416 int offs, per, rate; 1417 1418 outb(SIMODE1, ENSCSIRST|ENPHASEMIS|ENBUSFREE|ENSCSIPERR); 1419 switch (aic->imess[0]) { 1420 case MSG_CMDCOMPLETE: 1421 if (!acb) { 1422 aic_sched_msgout(SEND_ABORT); 1423 printf("aic: CMDCOMPLETE but no command?\n"); 1424 break; 1425 } 1426 if (aic->dleft < 0) { 1427 struct scsi_link *sc = acb->xs->sc_link; 1428 printf("aic: %d extra bytes from %d:%d\n", 1429 -aic->dleft, sc->target, sc->lun); 1430 acb->dleft = 0; 1431 } 1432 acb->xs->resid = acb->dleft = aic->dleft; 1433 aic->flags |= AIC_BUSFREE_OK; 1434 untimeout(aic_timeout, acb); 1435 aic_done(acb); 1436 break; 1437 case MSG_MESSAGE_REJECT: 1438 if (aic_debug & AIC_SHOWMISC) 1439 printf("aic: our msg rejected by target\n"); 1440 if (aic->flags & AIC_SYNCHNEGO) { 1441 ti->syncdata = 0; 1442 ti->persgst = ti->offsgst = 0; 1443 aic->flags &= ~AIC_SYNCHNEGO; 1444 ti->flags &= ~DO_NEGOTIATE; 1445 } 1446 /* Not all targets understand INITIATOR_DETECTED_ERR */ 1447 if (aic->msgout == SEND_INIT_DET_ERR) 1448 aic_sched_msgout(SEND_ABORT); 1449 break; 1450 case MSG_NOOP: /* Will do! Immediately, sir!*/ 1451 break; /* Hah, that was easy! */ 1452 case MSG_DISCONNECT: 1453 if (!acb) { 1454 aic_sched_msgout(SEND_ABORT); 1455 printf("aic: nothing to DISCONNECT\n"); 1456 break; 1457 } 1458 ti->dconns++; 1459 TAILQ_INSERT_HEAD(&aic->nexus_list, acb, chain); 1460 acb = aic->nexus = NULL; 1461 aic->state = AIC_IDLE; 1462 aic->flags |= AIC_BUSFREE_OK; 1463 break; 1464 case MSG_SAVEDATAPOINTER: 1465 if (!acb) { 1466 aic_sched_msgout(SEND_ABORT); 1467 printf("aic: no DATAPOINTERs to save\n"); 1468 break; 1469 } 1470 acb->dleft = aic->dleft; 1471 acb->daddr = aic->dp; 1472 break; 1473 case MSG_RESTOREPOINTERS: 1474 if (!acb) { 1475 aic_sched_msgout(SEND_ABORT); 1476 printf("aic: no DATAPOINTERs to restore\n"); 1477 break; 1478 } 1479 aic->dp = acb->daddr; 1480 aic->dleft = acb->dleft; 1481 break; 1482 case MSG_EXTENDED: 1483 switch (aic->imess[2]) { 1484 case MSG_EXT_SDTR: 1485 per = aic->imess[3] * 4; 1486 rate = (per + 49 - 100)/50; 1487 offs = aic->imess[4]; 1488 if (offs == 0) 1489 ti->syncdata = 0; 1490 else if (rate > 7) { 1491 /* Too slow for aic6360. Do asynch 1492 * instead. Renegotiate the deal. 1493 */ 1494 ti->persgst = 0; 1495 ti->offsgst = 0; 1496 aic_sched_msgout(SEND_SDTR); 1497 } else { 1498 rate = rate<<4 | offs; 1499 ti->syncdata = rate; 1500 } 1501 break; 1502 default: /* Extended messages we don't handle */ 1503 aic_sched_msgout(SEND_REJECT); 1504 break; 1505 } 1506 break; 1507 default: 1508 aic_sched_msgout(SEND_REJECT); 1509 break; 1510 } 1511 } else if (aic->state == AIC_RESELECTED) { 1512 struct scsi_link *sc; 1513 struct acb *acb; 1514 u_char selid, lunit; 1515 /* 1516 * Which target is reselecting us? (The ID bit really) 1517 */ 1518 selid = inb(SELID) & ~(1<<AIC_SCSI_HOSTID); 1519 if (MSG_ISIDENT(aic->imess[0])) { /* Identify? */ 1520 AIC_MISC(("searching ")); 1521 /* Search wait queue for disconnected cmd 1522 * The list should be short, so I haven't bothered with 1523 * any more sophisticated structures than a simple 1524 * singly linked list. 1525 */ 1526 lunit = aic->imess[0] & 0x07; 1527 for (acb = aic->nexus_list.tqh_first; acb; 1528 acb = acb->chain.tqe_next) { 1529 sc = acb->xs->sc_link; 1530 if (sc->lun == lunit && 1531 selid == (1<<sc->target)) { 1532 TAILQ_REMOVE(&aic->nexus_list, acb, 1533 chain); 1534 break; 1535 } 1536 } 1537 if (!acb) { /* Invalid reselection! */ 1538 aic_sched_msgout(SEND_ABORT); 1539 printf("aic: invalid reselect (idbit=0x%2x)\n", 1540 selid); 1541 } else { /* Reestablish nexus */ 1542 /* Setup driver data structures and 1543 * do an implicit RESTORE POINTERS 1544 */ 1545 aic->nexus = acb; 1546 aic->dp = acb->daddr; 1547 aic->dleft = acb->dleft; 1548 aic->tinfo[sc->target].lubusy |= (1<<sc->lun); 1549 outb(SCSIRATE,aic->tinfo[sc->target].syncdata); 1550 AIC_MISC(("... found acb")); 1551 aic->state = AIC_HASNEXUS; 1552 } 1553 } else { 1554 printf("aic: bogus reselect (no IDENTIFY) %0x2x\n", 1555 selid); 1556 aic_sched_msgout(SEND_DEV_RESET); 1557 } 1558 } else { /* Neither AIC_HASNEXUS nor AIC_RESELECTED! */ 1559 printf("aic: unexpected message in; will send DEV_RESET\n"); 1560 aic_sched_msgout(SEND_DEV_RESET); 1561 } 1562 /* Must not forget to ACK the last message byte ... */ 1563 outb(SXFRCTL0, CHEN|SPIOEN); 1564 inb(SCSIDAT); 1565 outb(SXFRCTL0, CHEN); 1566 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 1567 } 1568 1569 1570 /* The message out (and in) stuff is a bit complicated: 1571 * If the target requests another message (sequence) without 1572 * having changed phase in between it really asks for a 1573 * retransmit, probably due to parity error(s). 1574 * The following messages can be sent: 1575 * IDENTIFY @ These 3 stems from scsi command activity 1576 * BUS_DEV_RESET @ 1577 * IDENTIFY + SDTR @ 1578 * MESSAGE_REJECT if MSGI doesn't make sense 1579 * MESSAGE_PARITY_ERROR if MSGI spots a parity error 1580 * NOOP if asked for a message and there's nothing to send 1581 */ 1582 static void 1583 aic_msgout(aic) 1584 register struct aic_softc *aic; 1585 { 1586 register u_short iobase = aic->iobase; 1587 struct aic_tinfo *ti; 1588 struct acb *acb; 1589 u_char dmastat, scsisig; 1590 1591 /* First determine what to send. If we haven't seen a 1592 * phasechange this is a retransmission request. 1593 */ 1594 outb(SCSISIGO, PH_MSGO); 1595 if (aic->prevphase != PH_MSGO) { /* NOT a retransmit */ 1596 /* Pick up highest priority message */ 1597 aic->msgout = aic->msgpriq & -aic->msgpriq; /* What message? */ 1598 aic->omlen = 1; /* "Default" message len */ 1599 switch (aic->msgout) { 1600 case SEND_SDTR: /* Also implies an IDENTIFY message */ 1601 acb = aic->nexus; 1602 ti = &aic->tinfo[acb->xs->sc_link->target]; 1603 aic->omess[1] = MSG_EXTENDED; 1604 aic->omess[2] = 3; 1605 aic->omess[3] = MSG_EXT_SDTR; 1606 aic->omess[4] = ti->persgst >> 2; 1607 aic->omess[5] = ti->offsgst; 1608 aic->omlen = 6; 1609 /* Fallthrough! */ 1610 case SEND_IDENTIFY: 1611 if (aic->state != AIC_HASNEXUS) { 1612 printf("aic at line %d: no nexus", __LINE__); 1613 Debugger(); 1614 } 1615 acb = aic->nexus; 1616 aic->omess[0] = MSG_IDENTIFY(acb->xs->sc_link->lun); 1617 break; 1618 case SEND_DEV_RESET: 1619 aic->omess[0] = MSG_BUS_DEV_RESET; 1620 aic->flags |= AIC_BUSFREE_OK; 1621 break; 1622 case SEND_PARITY_ERROR: 1623 aic->omess[0] = MSG_PARITY_ERR; 1624 break; 1625 case SEND_ABORT: 1626 aic->omess[0] = MSG_ABORT; 1627 aic->flags |= AIC_BUSFREE_OK; 1628 break; 1629 case SEND_INIT_DET_ERR: 1630 aic->omess[0] = MSG_INITIATOR_DET_ERR; 1631 break; 1632 case SEND_REJECT: 1633 aic->omess[0] = MSG_MESSAGE_REJECT; 1634 break; 1635 default: 1636 aic->omess[0] = MSG_NOOP; 1637 break; 1638 } 1639 aic->omp = aic->omess; 1640 } else if (aic->omp == &aic->omess[aic->omlen]) { 1641 /* Have sent the message at least once, this is a retransmit. 1642 */ 1643 AIC_MISC(("retransmitting ")); 1644 if (aic->omlen > 1) 1645 outb(SCSISIGO, PH_MSGO|ATNO); 1646 } 1647 /* else, we're in the middle of a multi-byte message */ 1648 outb(SXFRCTL0, CHEN|SPIOEN); 1649 outb(DMACNTRL0, INTEN|RSTFIFO); 1650 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 1651 do { 1652 LOGLINE(aic); 1653 do { 1654 aic->phase = aicphase(aic); 1655 } while (aic->phase == PH_INVALID); 1656 if (aic->phase != PH_MSGO) 1657 /* Target left MSGO, possibly to reject our 1658 * message 1659 */ 1660 break; 1661 /* Clear ATN before last byte */ 1662 if (aic->omp == &aic->omess[aic->omlen-1]) 1663 outb(CLRSINT1, CLRATNO); 1664 outb(SCSIDAT, *aic->omp++); /* Send MSG */ 1665 LOGLINE(aic); 1666 while (inb(SCSISIGI) & ACKO) 1667 ; 1668 } while (aic->omp != &aic->omess[aic->omlen]); 1669 aic->progress = aic->omp != aic->omess; 1670 /* We get here in two ways: 1671 * a) phase != MSGO. Target is probably going to reject our message 1672 * b) aic->omp == &aic->omess[aic->omlen], i.e. the message has been 1673 * transmitted correctly and accepted by the target. 1674 */ 1675 if (aic->phase == PH_MSGO) { /* Message accepted by target! */ 1676 aic->msgpriq &= ~aic->msgout; 1677 aic->msgout = 0; 1678 } 1679 outb(SXFRCTL0, CHEN); /* Disable SPIO */ 1680 outb(SIMODE0, 0); /* Setup interrupts before leaving */ 1681 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 1682 /* Enabled ints: SCSIPERR, SCSIRSTI (unexpected) 1683 * REQINIT (expected) BUSFREE (possibly expected) 1684 */ 1685 } 1686 1687 /* aic_dataout: perform a data transfer using the FIFO datapath in the aic6360 1688 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1689 * and ACK deasserted (i.e. waiting for a data byte) 1690 * This new revision has been optimized (I tried) to make the common case fast, 1691 * and the rarer cases (as a result) somewhat more comlex 1692 */ 1693 void 1694 aic_dataout(aic) 1695 register struct aic_softc *aic; 1696 { 1697 register u_short iobase = aic->iobase; 1698 register u_char dmastat; 1699 struct acb *acb = aic->nexus; 1700 int amount, olddleft = aic->dleft; 1701 #define DOUTAMOUNT 128 /* Full FIFO */ 1702 1703 /* Enable DATA OUT transfers */ 1704 outb(SCSISIGO, PH_DOUT); 1705 outb(CLRSINT1, CLRPHASECHG); 1706 /* Clear FIFOs and counters */ 1707 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH); 1708 outb(DMACNTRL0, WRITE|INTEN|RSTFIFO); 1709 /* Enable FIFOs */ 1710 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN); 1711 outb(DMACNTRL0, ENDMA|DWORDPIO|WRITE|INTEN); 1712 1713 /* Setup to detect: 1714 * PHASEMIS & PHASECHG: target has left the DOUT phase 1715 * SCSIRST: something just pulled the RST line. 1716 * BUSFREE: target has unexpectedly left the DOUT phase 1717 */ 1718 outb(SIMODE1, ENPHASEMIS|ENSCSIRST|ENBUSFREE|ENPHASECHG); 1719 1720 /* I have tried to make the main loop as tight as possible. This 1721 * means that some of the code following the loop is a bit more 1722 * complex than otherwise. 1723 */ 1724 while (aic->dleft) { 1725 int xfer; 1726 1727 LOGLINE(aic); 1728 1729 for (;;) { 1730 dmastat = inb(DMASTAT); 1731 if (dmastat & DFIFOEMP) 1732 break; 1733 if (dmastat & INTSTAT) 1734 goto phasechange; 1735 } 1736 1737 xfer = min(DOUTAMOUNT, aic->dleft); 1738 1739 #if AIC_USE_DWORDS 1740 if (xfer >= 12) { 1741 outsl(DMADATALONG, aic->dp, xfer/4); 1742 aic->dleft -= xfer & ~3; 1743 aic->dp += xfer & ~3; 1744 xfer &= 3; 1745 } 1746 #else 1747 if (xfer >= 8) { 1748 outsw(DMADATA, aic->dp, xfer/2); 1749 aic->dleft -= xfer & ~1; 1750 aic->dp += xfer & ~1; 1751 xfer &= 1; 1752 } 1753 #endif 1754 1755 if (xfer) { 1756 outb(DMACNTRL0, ENDMA|B8MODE|INTEN); 1757 outsb(DMADATA, aic->dp, xfer); 1758 aic->dleft -= xfer; 1759 aic->dp += xfer; 1760 outb(DMACNTRL0, ENDMA|DWORDPIO|INTEN); 1761 } 1762 } 1763 1764 /* See the bytes off chip */ 1765 for (;;) { 1766 dmastat = inb(DMASTAT); 1767 if ((dmastat & DFIFOEMP) && (inb(SSTAT2) & SEMPTY)) 1768 break; 1769 if (dmastat & INTSTAT) 1770 goto phasechange; 1771 } 1772 1773 phasechange: 1774 /* We now have the data off chip. */ 1775 outb(SXFRCTL0, CHEN); 1776 1777 if (dmastat & INTSTAT) { /* Some sort of phasechange */ 1778 register u_char sstat2; 1779 /* Stop transfers, do some accounting */ 1780 amount = inb(FIFOSTAT); 1781 sstat2 = inb(SSTAT2); 1782 if ((sstat2 & 7) == 0) 1783 amount += sstat2 & SFULL ? 8 : 0; 1784 else 1785 amount += sstat2 & 7; 1786 aic->dleft += amount; 1787 aic->dp -= amount; 1788 AIC_MISC(("+%d ", amount)); 1789 } 1790 1791 outb(DMACNTRL0, RSTFIFO|INTEN); 1792 LOGLINE(aic); 1793 while (inb(SXFRCTL0) & SCSIEN) 1794 ; 1795 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 1796 /* Enabled ints: BUSFREE, SCSIPERR, SCSIRSTI (unexpected) 1797 * REQINIT (expected) 1798 */ 1799 aic->progress = olddleft != aic->dleft; 1800 return; 1801 } 1802 1803 /* aic_datain: perform data transfers using the FIFO datapath in the aic6360 1804 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1805 * and ACK deasserted (i.e. at least one byte is ready). 1806 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1807 * transferred. This, is OK for fast targets, but not so smart for slow 1808 * targets which don't disconnect or for huge transfers. 1809 */ 1810 void 1811 aic_datain(aic) 1812 register struct aic_softc *aic; 1813 { 1814 register u_short iobase = aic->iobase; 1815 register u_char dmastat; 1816 struct acb *acb = aic->nexus; 1817 int amount, olddleft = aic->dleft; 1818 #define DINAMOUNT 128 /* Default amount of data to transfer */ 1819 1820 /* Enable DATA IN transfers */ 1821 outb(SCSISIGO, PH_DIN); 1822 outb(CLRSINT1, CLRPHASECHG); 1823 /* Clear FIFOs and counters */ 1824 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH); 1825 outb(DMACNTRL0, INTEN|RSTFIFO); 1826 /* Enable FIFOs */ 1827 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN); 1828 outb(DMACNTRL0, ENDMA|DWORDPIO|INTEN); 1829 1830 outb(SIMODE1, ENSCSIRST|ENPHASEMIS|ENBUSFREE|ENPHASECHG); 1831 1832 /* We leave this loop if one or more of the following is true: 1833 * a) phase != PH_DIN && FIFOs are empty 1834 * b) SCSIRSTI is set (a reset has occurred) or busfree is detected. 1835 */ 1836 while (aic->dleft) { 1837 int done = 0; 1838 int xfer; 1839 1840 LOGLINE(aic); 1841 1842 /* Wait for fifo half full or phase mismatch */ 1843 for (;;) { 1844 dmastat = inb(DMASTAT); 1845 if (dmastat & (DFIFOFULL|INTSTAT)) 1846 break; 1847 } 1848 1849 if (dmastat & DFIFOFULL) 1850 xfer = DINAMOUNT; 1851 else { 1852 while ((inb(SSTAT2) & SEMPTY) == 0) 1853 ; 1854 xfer = inb(FIFOSTAT); 1855 done = 1; 1856 } 1857 1858 xfer = min(xfer, aic->dleft); 1859 1860 #if AIC_USE_DWORDS 1861 if (xfer >= 12) { 1862 insl(DMADATALONG, aic->dp, xfer/4); 1863 aic->dleft -= xfer & ~3; 1864 aic->dp += xfer & ~3; 1865 xfer &= 3; 1866 } 1867 #else 1868 if (xfer >= 8) { 1869 insw(DMADATA, aic->dp, xfer/2); 1870 aic->dleft -= xfer & ~1; 1871 aic->dp += xfer & ~1; 1872 xfer &= 1; 1873 } 1874 #endif 1875 1876 if (xfer) { 1877 outb(DMACNTRL0, ENDMA|B8MODE|INTEN); 1878 insb(DMADATA, aic->dp, xfer); 1879 aic->dleft -= xfer; 1880 aic->dp += xfer; 1881 outb(DMACNTRL0, ENDMA|DWORDPIO|INTEN); 1882 } 1883 1884 if (done) 1885 break; 1886 } 1887 1888 #if 0 1889 if (aic->dleft) 1890 printf("residual %d\n", aic->dleft); 1891 #endif 1892 1893 aic->progress = olddleft != aic->dleft; 1894 /* Some SCSI-devices are rude enough to transfer more data than what 1895 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1896 * requested 512. Test for progress, i.e. real transfers. If no real 1897 * transfers have been performed (acb->dleft is probably already zero) 1898 * and the FIFO is not empty, waste some bytes.... 1899 */ 1900 if (!aic->progress) { 1901 int extra = 0; 1902 LOGLINE(aic); 1903 1904 for (;;) { 1905 dmastat = inb(DMASTAT); 1906 if (dmastat & DFIFOEMP) 1907 break; 1908 (void) inb(DMADATA); /* Throw it away */ 1909 extra++; 1910 } 1911 1912 AIC_MISC(("aic: %d extra bytes from %d:%d\n", extra, 1913 acb->xs->sc_link->target, acb->xs->sc_link->lun)); 1914 aic->progress = extra; 1915 } 1916 1917 /* Stop the FIFO data path */ 1918 outb(SXFRCTL0, CHEN); 1919 1920 outb(DMACNTRL0, RSTFIFO|INTEN); 1921 /* Come back when REQ is set again */ 1922 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 1923 LOGLINE(aic); 1924 } 1925 1926 1927 /* 1928 * This is the workhorse routine of the driver. 1929 * Deficiencies (for now): 1930 * 1) always uses programmed I/O 1931 * 2) doesn't support synchronous transfers properly (yet) 1932 */ 1933 1934 int 1935 aicintr(aic) 1936 register struct aic_softc *aic; 1937 { 1938 register struct acb *acb; 1939 register struct scsi_link *sc; 1940 register u_short iobase = aic->iobase; 1941 struct scsi_xfer *xs; 1942 struct aic_tinfo *ti; 1943 int done, amount; 1944 u_char sstat0, sstat1, scsisig, dmastat, sstat2; 1945 u_char scsiseq, simode0, simode1, sxfrctl0; 1946 1947 LOGLINE(aic); 1948 /* Clear INTEN. This is important if we're running with edge 1949 * triggered interrupts as we don't guarantee that all interrupts will 1950 * be served during one single invocation of this routine, i.e. we may 1951 * need another edge. 1952 */ 1953 outb(DMACNTRL0, 0); 1954 AIC_TRACE(("aicintr\n")); 1955 1956 /* 1957 * 1st check for abnormal conditions, such as reset or parity errors 1958 */ 1959 sstat1 = inb(SSTAT1); 1960 AIC_MISC(("s1:0x%02x ", sstat1)); 1961 if (sstat1 & (SCSIRSTI|SCSIPERR)) { 1962 if (sstat1 & SCSIRSTI) { 1963 printf("aic: reset in -- reinitializing....\n"); 1964 aic_init(aic); /* Restart everything */ 1965 LOGLINE(aic); 1966 outb(DMACNTRL0, INTEN); 1967 return 1; 1968 } else { 1969 printf("aic: SCSI bus parity error\n"); 1970 outb(CLRSINT1, CLRSCSIPERR); 1971 if (aic->prevphase == PH_MSGI) 1972 aic_sched_msgout(SEND_PARITY_ERROR); 1973 else 1974 aic_sched_msgout(SEND_INIT_DET_ERR); 1975 } 1976 } 1977 1978 /* 1979 * If we're not already busy doing something test for the following 1980 * conditions: 1981 * 1) We have been reselected by something 1982 * 2) We have selected something successfully 1983 * 3) Our selection process has timed out 1984 * 4) This is really a bus free interrupt just to get a new command 1985 * going? 1986 * 5) Spurious interrupt? 1987 */ 1988 sstat0 = inb(SSTAT0); 1989 AIC_MISC(("s0:0x%02x ", sstat0)); 1990 if (aic->state != AIC_HASNEXUS) { /* No nexus yet */ 1991 if (sstat0 & SELDI) { 1992 LOGLINE(aic); 1993 /* We have been reselected. Things to do: 1994 * a) If we're trying to select something ourselves 1995 * back off the current command. 1996 * b) "Wait" for a message in phase (IDENTIFY) 1997 * c) Call aic_msgin() to get the identify message and 1998 * retrieve the disconnected command from the wait 1999 * queue. 2000 */ 2001 AIC_MISC(("reselect ")); 2002 /* If we're trying to select a target ourselves, 2003 * push our command back into the rdy list. 2004 */ 2005 if (aic->state == AIC_SELECTING) { 2006 AIC_MISC(("backoff selector ")); 2007 TAILQ_INSERT_HEAD(&aic->ready_list, aic->nexus, 2008 chain); 2009 aic->nexus = NULL; 2010 } 2011 aic->state = AIC_RESELECTED; 2012 /* Clear interrupts, disable future selection stuff 2013 * including select interrupts and timeouts 2014 */ 2015 outb(CLRSINT0, CLRSELDI); 2016 outb(SCSISEQ, 0); 2017 outb(SIMODE0, 0); 2018 /* Setup chip so we may detect spurious busfree 2019 * conditions later. 2020 */ 2021 outb(CLRSINT1, CLRBUSFREE); 2022 outb(SIMODE1, ENSCSIRST|ENBUSFREE| 2023 ENSCSIPERR|ENREQINIT); 2024 /* Now, we're expecting an IDENTIFY message. */ 2025 aic->phase = aicphase(aic); 2026 if (aic->phase & PH_PSBIT) { 2027 LOGLINE(aic); 2028 outb(DMACNTRL0, INTEN); 2029 return 1; /* Come back when REQ is set */ 2030 } 2031 if (aic->phase == PH_MSGI) 2032 aic_msgin(aic); /* Handle identify message */ 2033 else { 2034 /* Things are seriously fucked up. 2035 * Pull the brakes, i.e. RST 2036 */ 2037 printf("aic at line %d: target didn't identify\n", __LINE__); 2038 Debugger(); 2039 aic_init(aic); 2040 return 1; 2041 } 2042 if (aic->state != AIC_HASNEXUS) {/* IDENTIFY fail?! */ 2043 printf("aic at line %d: identify failed\n", 2044 __LINE__); 2045 aic_init(aic); 2046 return 1; 2047 } else { 2048 outb(SIMODE1, 2049 ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2050 /* Fallthrough to HASNEXUS part of aicintr */ 2051 } 2052 } else if (sstat0 & SELDO) { 2053 LOGLINE(aic); 2054 /* We have selected a target. Things to do: 2055 * a) Determine what message(s) to send. 2056 * b) Verify that we're still selecting the target. 2057 * c) Mark device as busy. 2058 */ 2059 acb = aic->nexus; 2060 if (!acb) { 2061 printf("aic at line %d: missing acb", __LINE__); 2062 Debugger(); 2063 } 2064 sc = acb->xs->sc_link; 2065 ti = &aic->tinfo[sc->target]; 2066 if (acb->xs->flags & SCSI_RESET) 2067 aic->msgpriq = SEND_DEV_RESET; 2068 else if (ti->flags & DO_NEGOTIATE) 2069 aic->msgpriq = SEND_IDENTIFY|SEND_SDTR; 2070 else 2071 aic->msgpriq = SEND_IDENTIFY; 2072 /* Setup chip to enable later testing for busfree 2073 * conditions 2074 */ 2075 outb(CLRSINT1, CLRBUSFREE); 2076 outb(SCSISEQ, 0); /* Stop selection stuff */ 2077 nandreg(SIMODE0, ENSELDO); /* No more selectout ints */ 2078 sstat0 = inb(SSTAT0); 2079 if (sstat0 & SELDO) { /* Still selected!? */ 2080 outb(SIMODE0, 0); 2081 outb(SIMODE1, ENSCSIRST|ENSCSIPERR| 2082 ENBUSFREE|ENREQINIT); 2083 aic->state = AIC_HASNEXUS; 2084 aic->flags = 0; 2085 aic->prevphase = PH_INVALID; 2086 aic->dp = acb->daddr; 2087 aic->dleft = acb->dleft; 2088 ti->lubusy |= (1<<sc->lun); 2089 AIC_MISC(("select ok ")); 2090 } else { 2091 /* Has seen busfree since selection, i.e. 2092 * a "spurious" selection. Shouldn't happen. 2093 */ 2094 printf("aic: unexpected busfree\n"); 2095 xs->error = XS_DRIVER_STUFFUP; 2096 untimeout(aic_timeout, acb); 2097 aic_done(acb); 2098 } 2099 LOGLINE(aic); 2100 outb(DMACNTRL0, INTEN); 2101 return 1; 2102 } else if (sstat1 & SELTO) { 2103 /* Selection timed out. What to do: 2104 * Disable selections out and fail the command with 2105 * code XS_TIMEOUT. 2106 */ 2107 acb = aic->nexus; 2108 if (!acb) { 2109 printf("aic at line %d: missing acb", __LINE__); 2110 Debugger(); 2111 } 2112 outb(SCSISEQ, ENRESELI|ENAUTOATNP); 2113 outb(SXFRCTL1, 0); 2114 outb(CLRSINT1, CLRSELTIMO); 2115 aic->state = AIC_IDLE; 2116 acb->xs->error = XS_TIMEOUT; 2117 untimeout(aic_timeout, acb); 2118 aic_done(acb); 2119 LOGLINE(aic); 2120 outb(DMACNTRL0, INTEN); 2121 return 1; 2122 } else { 2123 /* Assume a bus free interrupt. What to do: 2124 * Start selecting. 2125 */ 2126 if (aic->state == AIC_IDLE) 2127 aic_sched(aic); 2128 else 2129 AIC_MISC(("Extra aic6360 interrupt.")); 2130 LOGLINE(aic); 2131 outb(DMACNTRL0, INTEN); 2132 return 1; 2133 } 2134 } 2135 /* Driver is now in state AIC_HASNEXUS, i.e. we have a current command 2136 * working the SCSI bus. 2137 */ 2138 acb = aic->nexus; 2139 if (aic->state != AIC_HASNEXUS || acb == NULL) { 2140 printf("aic: no nexus!!\n"); 2141 Debugger(); 2142 } 2143 2144 /* What sort of transfer does the bus signal? */ 2145 aic->phase = aicphase(aic); 2146 if (!(aic->phase & PH_PSBIT)) /* not a pseudo phase */ 2147 outb(SCSISIGO, aic->phase); 2148 outb(CLRSINT1, CLRPHASECHG); 2149 /* These interrupts are enabled by default: 2150 * SCSIRSTI, SCSIPERR, BUSFREE, REQINIT 2151 */ 2152 switch (aic->phase) { 2153 case PH_MSGO: 2154 LOGLINE(aic); 2155 if (aic_debug & AIC_SHOWMISC) 2156 printf("PH_MSGO "); 2157 aic_msgout(aic); 2158 aic->prevphase = PH_MSGO; 2159 /* Setup interrupts before leaving */ 2160 outb(SIMODE0, 0); 2161 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2162 /* Enabled ints: SCSIPERR, SCSIRSTI (unexpected) 2163 * REQINIT (expected) BUSFREE (possibly expected) 2164 */ 2165 break; 2166 case PH_CMD: /* CMD phase & REQ asserted */ 2167 LOGLINE(aic); 2168 if (aic_debug & AIC_SHOWMISC) 2169 printf("PH_CMD 0x%02x (%d) ", 2170 acb->cmd.opcode, acb->clen); 2171 outb(SCSISIGO, PH_CMD); 2172 /* Use FIFO for CMDs. Assumes that no cmd > 128 bytes. OK? */ 2173 /* Clear hostFIFO and enable EISA-hostFIFO transfers */ 2174 outb(DMACNTRL0, WRITE|RSTFIFO|INTEN); /* 3(4) */ 2175 /* Clear scsiFIFO and enable SCSI-interface 2176 & hostFIFO-scsiFIFO transfers */ 2177 outb(SXFRCTL0, CHEN|CLRCH|CLRSTCNT); /* 4 */ 2178 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN); /* 5 */ 2179 outb(DMACNTRL0, ENDMA|WRITE|INTEN); /* 3+6 */ 2180 /* What (polled) interrupts to enable */ 2181 outb(SIMODE1, ENPHASEMIS|ENSCSIRST|ENBUSFREE|ENSCSIPERR); 2182 /* DFIFOEMP is set, FIFO (128 byte) is always big enough */ 2183 outsw(DMADATA, (short *)&acb->cmd, acb->clen>>1); 2184 2185 /* Wait for SCSI FIFO to drain */ 2186 LOGLINE(aic); 2187 do { 2188 sstat2 = inb(SSTAT2); 2189 } while (!(sstat2 & SEMPTY) && !(inb(DMASTAT) & INTSTAT)); 2190 if (!(inb(SSTAT2) & SEMPTY)) { 2191 printf("aic at line %d: SCSI-FIFO didn't drain\n", 2192 __LINE__); 2193 Debugger(); 2194 acb->xs->error = XS_DRIVER_STUFFUP; 2195 untimeout(aic_timeout, acb); 2196 aic_done(acb); 2197 aic_init(aic); 2198 return 1; 2199 } 2200 outb(SXFRCTL0, CHEN); /* Clear SCSIEN & DMAEN */ 2201 outb(SIMODE0, 0); 2202 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR); 2203 LOGLINE(aic); 2204 do { 2205 sxfrctl0 = inb(SXFRCTL0); 2206 } while (sxfrctl0 & SCSIEN && !(inb(DMASTAT) & INTSTAT)); 2207 if (sxfrctl0 & SCSIEN) { 2208 printf("aic at line %d: scsi xfer never finished\n", 2209 __LINE__); 2210 Debugger(); 2211 acb->xs->error = XS_DRIVER_STUFFUP; 2212 untimeout(aic_timeout, acb); 2213 aic_done(acb); 2214 aic_init(aic); 2215 return 1; 2216 } 2217 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2218 /* Enabled ints: BUSFREE, SCSIPERR, SCSIRSTI (unexpected) 2219 * REQINIT (expected) 2220 */ 2221 aic->prevphase = PH_CMD; 2222 break; 2223 case PH_DOUT: 2224 LOGLINE(aic); 2225 AIC_MISC(("PH_DOUT [%d] ",aic->dleft)); 2226 aic_dataout(aic); 2227 aic->prevphase = PH_DOUT; 2228 break; 2229 case PH_MSGI: 2230 LOGLINE(aic); 2231 if (aic_debug & AIC_SHOWMISC) 2232 printf("PH_MSGI "); 2233 aic_msgin(aic); 2234 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2235 aic->prevphase = PH_MSGI; 2236 break; 2237 case PH_DIN: 2238 LOGLINE(aic); 2239 if (aic_debug & AIC_SHOWMISC) 2240 printf("PH_DIN "); 2241 aic_datain(aic); 2242 aic->prevphase = PH_DIN; 2243 break; 2244 case PH_STAT: 2245 LOGLINE(aic); 2246 if (aic_debug & AIC_SHOWMISC) 2247 printf("PH_STAT "); 2248 outb(SCSISIGO, PH_STAT); 2249 outb(SXFRCTL0, CHEN|SPIOEN); 2250 outb(DMACNTRL0, RSTFIFO|INTEN); 2251 outb(SIMODE1, ENSCSIRST|ENPHASEMIS|ENBUSFREE|ENSCSIPERR); 2252 acb->stat = inb(SCSIDAT); 2253 outb(SXFRCTL0, CHEN); 2254 if (aic_debug & AIC_SHOWMISC) 2255 printf("0x%02x ", acb->stat); 2256 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2257 aic->prevphase = PH_STAT; 2258 break; 2259 case PH_INVALID: 2260 LOGLINE(aic); 2261 break; 2262 case PH_BUSFREE: 2263 LOGLINE(aic); 2264 if (aic->flags & AIC_BUSFREE_OK) { /*It's fun the 1st time.. */ 2265 aic->flags &= ~AIC_BUSFREE_OK; 2266 } else { 2267 printf("aic at line %d: unexpected busfree phase\n", 2268 __LINE__); 2269 Debugger(); 2270 } 2271 break; 2272 default: 2273 printf("aic at line %d: bogus bus phase\n", __LINE__); 2274 Debugger(); 2275 break; 2276 } 2277 LOGLINE(aic); 2278 outb(DMACNTRL0, INTEN); 2279 return 1; 2280 } 2281 2282 void 2283 aic_timeout(arg) 2284 void *arg; 2285 { 2286 int s = splbio(); 2287 struct acb *acb = (struct acb *)arg; 2288 struct aic_softc *aic; 2289 2290 aic = acb->xs->sc_link->adapter_softc; 2291 sc_print_addr(acb->xs->sc_link); 2292 acb->xs->error = XS_TIMEOUT; 2293 printf("timed out\n"); 2294 2295 aic_done(acb); 2296 splx(s); 2297 } 2298 2299 #ifdef AIC_DEBUG 2301 /* 2302 * The following functions are mostly used for debugging purposes, either 2303 * directly called from the driver or from the kernel debugger. 2304 */ 2305 2306 void 2307 aic_show_scsi_cmd(acb) 2308 struct acb *acb; 2309 { 2310 u_char *b = (u_char *)&acb->cmd; 2311 struct scsi_link *sc = acb->xs->sc_link; 2312 int i; 2313 2314 sc_print_addr(sc); 2315 if (!(acb->xs->flags & SCSI_RESET)) { 2316 for (i = 0; i < acb->clen; i++) { 2317 if (i) 2318 printf(","); 2319 printf("%x", b[i]); 2320 } 2321 printf("\n"); 2322 } else 2323 printf("RESET\n"); 2324 } 2325 2326 void 2327 aic_print_acb(acb) 2328 struct acb *acb; 2329 { 2330 2331 printf("acb@%x xs=%x flags=%x", acb, acb->xs, acb->flags); 2332 printf(" daddr=%x dleft=%d stat=%x\n", 2333 (long)acb->daddr, acb->dleft, acb->stat); 2334 aic_show_scsi_cmd(acb); 2335 } 2336 2337 void 2338 aic_print_active_acb() 2339 { 2340 struct acb *acb; 2341 struct aic_softc *aic = aiccd.cd_devs[0]; 2342 2343 printf("ready list:\n"); 2344 for (acb = aic->ready_list.tqh_first; acb; acb = acb->chain.tqe_next) 2345 aic_print_acb(acb); 2346 printf("nexus:\n"); 2347 if (aic->nexus) 2348 aic_print_acb(aic->nexus); 2349 printf("nexus list:\n"); 2350 for (acb = aic->nexus_list.tqh_first; acb; acb = acb->chain.tqe_next) 2351 aic_print_acb(acb); 2352 } 2353 2354 void 2355 aic_dump6360() 2356 { 2357 u_short iobase = 0x340; 2358 2359 printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIGI=%x\n", 2360 inb(SCSISEQ), inb(SXFRCTL0), inb(SXFRCTL1), inb(SCSISIGI)); 2361 printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n", 2362 inb(SSTAT0), inb(SSTAT1), inb(SSTAT2), inb(SSTAT3), inb(SSTAT4)); 2363 printf(" SIMODE0=%x SIMODE1=%x DMACNTRL0=%x DMACNTRL1=%x DMASTAT=%x\n", 2364 inb(SIMODE0), inb(SIMODE1), inb(DMACNTRL0), inb(DMACNTRL1), 2365 inb(DMASTAT)); 2366 printf(" FIFOSTAT=%d SCSIBUS=0x%x\n", 2367 inb(FIFOSTAT), inb(SCSIBUS)); 2368 } 2369 2370 void 2371 aic_dump_driver() 2372 { 2373 struct aic_softc *aic = aiccd.cd_devs[0]; 2374 struct aic_tinfo *ti; 2375 int i; 2376 2377 printf("nexus=%x phase=%x prevphase=%x\n", aic->nexus, aic->phase, 2378 aic->prevphase); 2379 printf("state=%x msgin=%x msgpriq=%x msgout=%x imlen=%d omlen=%d\n", 2380 aic->state, aic->imess[0], aic->msgpriq, aic->msgout, aic->imlen, 2381 aic->omlen); 2382 printf("history:"); 2383 i = aic->hp; 2384 do { 2385 printf(" %d", aic->history[i]); 2386 i = (i + 1) % AIC_HSIZE; 2387 } while (i != aic->hp); 2388 printf("*\n"); 2389 for (i = 0; i < 7; i++) { 2390 ti = &aic->tinfo[i]; 2391 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2392 i, ti->cmds, ti->dconns, ti->touts); 2393 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2394 } 2395 } 2396 #endif 2397
Indexes created Sat Oct 25 10:09:55 GMT 2025