aic6360.c revision 1.55
1 /* $NetBSD: aic6360.c,v 1.55 1998/01/12 09:23:11 thorpej Exp $ */ 2 3 #ifdef DDB 4 #define integrate 5 #else 6 #define integrate static inline 7 #endif 8 9 /* 10 * Copyright (c) 1994, 1995, 1996 Charles M. Hannum. All rights reserved. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by Charles M. Hannum. 23 * 4. The name of the author may not be used to endorse or promote products 24 * derived from this software without specific prior written permission. 25 * 26 * Copyright (c) 1994 Jarle Greipsland 27 * All rights reserved. 28 * 29 * Redistribution and use in source and binary forms, with or without 30 * modification, are permitted provided that the following conditions 31 * are met: 32 * 1. Redistributions of source code must retain the above copyright 33 * notice, this list of conditions and the following disclaimer. 34 * 2. Redistributions in binary form must reproduce the above copyright 35 * notice, this list of conditions and the following disclaimer in the 36 * documentation and/or other materials provided with the distribution. 37 * 3. The name of the author may not be used to endorse or promote products 38 * derived from this software without specific prior written permission. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 41 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 42 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 43 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 44 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 45 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 46 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 48 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 49 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 50 * POSSIBILITY OF SUCH DAMAGE. 51 */ 52 53 /* 54 * Acknowledgements: Many of the algorithms used in this driver are 55 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 56 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 57 */ 58 59 /* TODO list: 60 * 1) Get the DMA stuff working. 61 * 2) Get the iov/uio stuff working. Is this a good thing ??? 62 * 3) Get the synch stuff working. 63 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 64 */ 65 66 /* 67 * A few customizable items: 68 */ 69 70 /* Use doubleword transfers to/from SCSI chip. Note: This requires 71 * motherboard support. Basicly, some motherboard chipsets are able to 72 * split a 32 bit I/O operation into two 16 bit I/O operations, 73 * transparently to the processor. This speeds up some things, notably long 74 * data transfers. 75 */ 76 #define AIC_USE_DWORDS 0 77 78 /* Synchronous data transfers? */ 79 #define AIC_USE_SYNCHRONOUS 0 80 #define AIC_SYNC_REQ_ACK_OFS 8 81 82 /* Wide data transfers? */ 83 #define AIC_USE_WIDE 0 84 #define AIC_MAX_WIDTH 0 85 86 /* Max attempts made to transmit a message */ 87 #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 88 89 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/ 90 #define AIC_USE_EISA_DMA 0 91 #define AIC_USE_ISA_DMA 0 92 93 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */ 94 #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */ 95 96 /* Some spin loop parameters (essentially how long to wait some places) 97 * The problem(?) is that sometimes we expect either to be able to transmit a 98 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 99 * returning from the interrupt just to get yanked back for the next byte we 100 * may spin in the interrupt routine waiting for this byte to come. How long? 101 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 102 */ 103 #define AIC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 104 #define AIC_MSGOUT_SPIN 1 105 106 /* Include debug functions? At the end of this file there are a bunch of 107 * functions that will print out various information regarding queued SCSI 108 * commands, driver state and chip contents. You can call them from the 109 * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the 110 * kernel uses less memory) but you lose the debugging facilities. 111 */ 112 #define AIC_DEBUG 1 113 114 #define AIC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 115 116 /* End of customizable parameters */ 117 118 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA 119 #error "I said not yet! Start paying attention... grumble" 120 #endif 121 122 #include <sys/types.h> 123 #include <sys/param.h> 124 #include <sys/systm.h> 125 #include <sys/kernel.h> 126 #include <sys/errno.h> 127 #include <sys/ioctl.h> 128 #include <sys/device.h> 129 #include <sys/buf.h> 130 #include <sys/proc.h> 131 #include <sys/user.h> 132 #include <sys/queue.h> 133 134 #include <machine/intr.h> 135 #include <machine/pio.h> 136 137 #include <dev/scsipi/scsi_all.h> 138 #include <dev/scsipi/scsipi_all.h> 139 #include <dev/scsipi/scsi_message.h> 140 #include <dev/scsipi/scsiconf.h> 141 142 #include <dev/isa/isavar.h> 143 #include <dev/ic/aic6360reg.h> 144 #include <dev/ic/aic6360var.h> 145 146 147 #ifndef DDB 149 #define Debugger() panic("should call debugger here (aic6360.c)") 150 #endif /* ! DDB */ 151 152 #if AIC_DEBUG 153 int aic_debug = 0x00; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRACE; */ 154 #endif 155 156 void aicattach __P((struct aic_softc *)); 157 void aic_minphys __P((struct buf *)); 158 void aic_init __P((struct aic_softc *)); 159 void aic_done __P((struct aic_softc *, struct aic_acb *)); 160 void aic_dequeue __P((struct aic_softc *, struct aic_acb *)); 161 int aic_scsi_cmd __P((struct scsipi_xfer *)); 162 int aic_poll __P((struct aic_softc *, struct scsipi_xfer *, int)); 163 integrate void aic_sched_msgout __P((struct aic_softc *, u_char)); 164 integrate void aic_setsync __P((struct aic_softc *, struct aic_tinfo *)); 165 void aic_select __P((struct aic_softc *, struct aic_acb *)); 166 void aic_timeout __P((void *)); 167 void aic_sched __P((struct aic_softc *)); 168 void aic_scsi_reset __P((struct aic_softc *)); 169 void aic_reset __P((struct aic_softc *)); 170 void aic_free_acb __P((struct aic_softc *, struct aic_acb *, int)); 171 struct aic_acb* aic_get_acb __P((struct aic_softc *, int)); 172 int aic_reselect __P((struct aic_softc *, int)); 173 void aic_sense __P((struct aic_softc *, struct aic_acb *)); 174 void aic_msgin __P((struct aic_softc *)); 175 void aic_abort __P((struct aic_softc *, struct aic_acb *)); 176 void aic_msgout __P((struct aic_softc *)); 177 int aic_dataout_pio __P((struct aic_softc *, u_char *, int)); 178 int aic_datain_pio __P((struct aic_softc *, u_char *, int)); 179 #if AIC_DEBUG 180 void aic_print_acb __P((struct aic_acb *)); 181 void aic_dump_driver __P((struct aic_softc *)); 182 void aic_dump6360 __P((struct aic_softc *)); 183 void aic_show_scsi_cmd __P((struct aic_acb *)); 184 void aic_print_active_acb __P((void)); 185 #endif 186 187 struct scsipi_adapter aic_switch = { 188 aic_scsi_cmd, 189 aic_minphys, 190 0, 191 0, 192 }; 193 194 struct scsipi_device aic_dev = { 195 NULL, /* Use default error handler */ 196 NULL, /* have a queue, served by this */ 197 NULL, /* have no async handler */ 198 NULL, /* Use default 'done' routine */ 199 }; 200 201 /* 203 * INITIALIZATION ROUTINES (probe, attach ++) 204 */ 205 206 /* Do the real search-for-device. 207 * Prerequisite: sc->sc_iobase should be set to the proper value 208 */ 209 int 210 aic_find(iot, ioh) 211 bus_space_tag_t iot; 212 bus_space_handle_t ioh; 213 { 214 char chip_id[sizeof(IDSTRING)]; /* For chips that support it */ 215 int i; 216 217 /* Remove aic6360 from possible powerdown mode */ 218 bus_space_write_1(iot, ioh, DMACNTRL0, 0); 219 220 /* Thanks to mark (at) aggregate.com for the new method for detecting 221 * whether the chip is present or not. Bonus: may also work for 222 * the AIC-6260! 223 */ 224 AIC_TRACE(("aic: probing for aic-chip\n")); 225 /* 226 * Linux also init's the stack to 1-16 and then clears it, 227 * 6260's don't appear to have an ID reg - mpg 228 */ 229 /* Push the sequence 0,1,..,15 on the stack */ 230 #define STSIZE 16 231 bus_space_write_1(iot, ioh, DMACNTRL1, 0); /* Reset stack pointer */ 232 for (i = 0; i < STSIZE; i++) 233 bus_space_write_1(iot, ioh, STACK, i); 234 235 /* See if we can pull out the same sequence */ 236 bus_space_write_1(iot, ioh, DMACNTRL1, 0); 237 for (i = 0; i < STSIZE && bus_space_read_1(iot, ioh, STACK) == i; i++) 238 ; 239 if (i != STSIZE) { 240 AIC_START(("STACK futzed at %d.\n", i)); 241 return 0; 242 } 243 244 /* See if we can pull the id string out of the ID register, 245 * now only used for informational purposes. 246 */ 247 bzero(chip_id, sizeof(chip_id)); 248 bus_space_read_multi_1(iot, ioh, ID, chip_id, sizeof(IDSTRING) - 1); 249 AIC_START(("AIC found ID: %s ",chip_id)); 250 AIC_START(("chip revision %d\n", 251 (int)bus_space_read_1(iot, ioh, REV))); 252 253 return 1; 254 } 255 256 /* 257 * Attach the AIC6360, fill out some high and low level data structures 258 */ 259 void 260 aicattach(sc) 261 struct aic_softc *sc; 262 { 263 264 AIC_TRACE(("aicattach ")); 265 sc->sc_state = AIC_INIT; 266 267 sc->sc_initiator = 7; 268 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 269 270 /* 271 * These are the bounds of the sync period, based on the frequency of 272 * the chip's clock input and the size and offset of the sync period 273 * register. 274 * 275 * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a 276 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a 277 * minimum transfer rate. 278 */ 279 sc->sc_minsync = (2 * 250) / sc->sc_freq; 280 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 281 282 aic_init(sc); /* Init chip and driver */ 283 284 /* 285 * Fill in the prototype scsipi_link 286 */ 287 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 288 sc->sc_link.adapter_softc = sc; 289 sc->sc_link.scsipi_scsi.adapter_target = sc->sc_initiator; 290 sc->sc_link.adapter = &aic_switch; 291 sc->sc_link.device = &aic_dev; 292 sc->sc_link.openings = 2; 293 sc->sc_link.scsipi_scsi.max_target = 7; 294 sc->sc_link.type = BUS_SCSI; 295 296 /* 297 * ask the adapter what subunits are present 298 */ 299 config_found(&sc->sc_dev, &sc->sc_link, scsiprint); 300 } 301 302 303 /* Initialize AIC6360 chip itself 304 * The following conditions should hold: 305 * aic_isa_probe should have succeeded, i.e. the iobase address in aic_softc 306 * must be valid. 307 */ 308 void 309 aic_reset(sc) 310 struct aic_softc *sc; 311 { 312 bus_space_tag_t iot = sc->sc_iot; 313 bus_space_handle_t ioh = sc->sc_ioh; 314 315 /* 316 * Doc. recommends to clear these two registers before 317 * operations commence 318 */ 319 bus_space_write_1(iot, ioh, SCSITEST, 0); 320 bus_space_write_1(iot, ioh, TEST, 0); 321 322 /* Reset SCSI-FIFO and abort any transfers */ 323 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH | CLRSTCNT); 324 325 /* Reset DMA-FIFO */ 326 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO); 327 bus_space_write_1(iot, ioh, DMACNTRL1, 0); 328 329 /* Disable all selection features */ 330 bus_space_write_1(iot, ioh, SCSISEQ, 0); 331 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 332 333 /* Disable some interrupts */ 334 bus_space_write_1(iot, ioh, SIMODE0, 0x00); 335 /* Clear a slew of interrupts */ 336 bus_space_write_1(iot, ioh, CLRSINT0, 0x7f); 337 338 /* Disable some more interrupts */ 339 bus_space_write_1(iot, ioh, SIMODE1, 0x00); 340 /* Clear another slew of interrupts */ 341 bus_space_write_1(iot, ioh, CLRSINT1, 0xef); 342 343 /* Disable synchronous transfers */ 344 bus_space_write_1(iot, ioh, SCSIRATE, 0); 345 346 /* Haven't seen ant errors (yet) */ 347 bus_space_write_1(iot, ioh, CLRSERR, 0x07); 348 349 /* Set our SCSI-ID */ 350 bus_space_write_1(iot, ioh, SCSIID, sc->sc_initiator << OID_S); 351 bus_space_write_1(iot, ioh, BRSTCNTRL, EISA_BRST_TIM); 352 } 353 354 /* Pull the SCSI RST line for 500 us */ 355 void 356 aic_scsi_reset(sc) 357 struct aic_softc *sc; 358 { 359 bus_space_tag_t iot = sc->sc_iot; 360 bus_space_handle_t ioh = sc->sc_ioh; 361 362 bus_space_write_1(iot, ioh, SCSISEQ, SCSIRSTO); 363 delay(500); 364 bus_space_write_1(iot, ioh, SCSISEQ, 0); 365 delay(50); 366 } 367 368 /* 369 * Initialize aic SCSI driver. 370 */ 371 void 372 aic_init(sc) 373 struct aic_softc *sc; 374 { 375 struct aic_acb *acb; 376 int r; 377 378 aic_reset(sc); 379 aic_scsi_reset(sc); 380 aic_reset(sc); 381 382 if (sc->sc_state == AIC_INIT) { 383 /* First time through; initialize. */ 384 TAILQ_INIT(&sc->ready_list); 385 TAILQ_INIT(&sc->nexus_list); 386 TAILQ_INIT(&sc->free_list); 387 sc->sc_nexus = NULL; 388 acb = sc->sc_acb; 389 bzero(acb, sizeof(sc->sc_acb)); 390 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 391 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 392 acb++; 393 } 394 bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo)); 395 } else { 396 /* Cancel any active commands. */ 397 sc->sc_state = AIC_CLEANING; 398 if ((acb = sc->sc_nexus) != NULL) { 399 acb->xs->error = XS_DRIVER_STUFFUP; 400 untimeout(aic_timeout, acb); 401 aic_done(sc, acb); 402 } 403 while ((acb = sc->nexus_list.tqh_first) != NULL) { 404 acb->xs->error = XS_DRIVER_STUFFUP; 405 untimeout(aic_timeout, acb); 406 aic_done(sc, acb); 407 } 408 } 409 410 sc->sc_prevphase = PH_INVALID; 411 for (r = 0; r < 8; r++) { 412 struct aic_tinfo *ti = &sc->sc_tinfo[r]; 413 414 ti->flags = 0; 415 #if AIC_USE_SYNCHRONOUS 416 ti->flags |= DO_SYNC; 417 ti->period = sc->sc_minsync; 418 ti->offset = AIC_SYNC_REQ_ACK_OFS; 419 #else 420 ti->period = ti->offset = 0; 421 #endif 422 #if AIC_USE_WIDE 423 ti->flags |= DO_WIDE; 424 ti->width = AIC_MAX_WIDTH; 425 #else 426 ti->width = 0; 427 #endif 428 } 429 430 sc->sc_state = AIC_IDLE; 431 bus_space_write_1(sc->sc_iot, sc->sc_ioh, DMACNTRL0, INTEN); 432 } 433 434 void 435 aic_free_acb(sc, acb, flags) 436 struct aic_softc *sc; 437 struct aic_acb *acb; 438 int flags; 439 { 440 int s; 441 442 s = splbio(); 443 444 acb->flags = 0; 445 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 446 447 /* 448 * If there were none, wake anybody waiting for one to come free, 449 * starting with queued entries. 450 */ 451 if (acb->chain.tqe_next == 0) 452 wakeup(&sc->free_list); 453 454 splx(s); 455 } 456 457 struct aic_acb * 458 aic_get_acb(sc, flags) 459 struct aic_softc *sc; 460 int flags; 461 { 462 struct aic_acb *acb; 463 int s; 464 465 s = splbio(); 466 467 while ((acb = sc->free_list.tqh_first) == NULL && 468 (flags & SCSI_NOSLEEP) == 0) 469 tsleep(&sc->free_list, PRIBIO, "aicacb", 0); 470 if (acb) { 471 TAILQ_REMOVE(&sc->free_list, acb, chain); 472 acb->flags |= ACB_ALLOC; 473 } 474 475 splx(s); 476 return acb; 477 } 478 479 /* 481 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 482 */ 483 484 /* 485 * Expected sequence: 486 * 1) Command inserted into ready list 487 * 2) Command selected for execution 488 * 3) Command won arbitration and has selected target device 489 * 4) Send message out (identify message, eventually also sync.negotiations) 490 * 5) Send command 491 * 5a) Receive disconnect message, disconnect. 492 * 5b) Reselected by target 493 * 5c) Receive identify message from target. 494 * 6) Send or receive data 495 * 7) Receive status 496 * 8) Receive message (command complete etc.) 497 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd. 498 * Repeat 2-8 (no disconnects please...) 499 */ 500 501 /* 502 * Start a SCSI-command 503 * This function is called by the higher level SCSI-driver to queue/run 504 * SCSI-commands. 505 */ 506 int 507 aic_scsi_cmd(xs) 508 struct scsipi_xfer *xs; 509 { 510 struct scsipi_link *sc_link = xs->sc_link; 511 struct aic_softc *sc = sc_link->adapter_softc; 512 struct aic_acb *acb; 513 int s, flags; 514 515 AIC_TRACE(("aic_scsi_cmd ")); 516 AIC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 517 sc_link->scsipi_scsi.target)); 518 519 flags = xs->flags; 520 if ((acb = aic_get_acb(sc, flags)) == NULL) { 521 xs->error = XS_DRIVER_STUFFUP; 522 return TRY_AGAIN_LATER; 523 } 524 525 /* Initialize acb */ 526 acb->xs = xs; 527 acb->timeout = xs->timeout; 528 529 if (xs->flags & SCSI_RESET) { 530 acb->flags |= ACB_RESET; 531 acb->scsipi_cmd_length = 0; 532 acb->data_length = 0; 533 } else { 534 bcopy(xs->cmd, &acb->scsipi_cmd, xs->cmdlen); 535 acb->scsipi_cmd_length = xs->cmdlen; 536 acb->data_addr = xs->data; 537 acb->data_length = xs->datalen; 538 } 539 acb->target_stat = 0; 540 541 s = splbio(); 542 543 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 544 if (sc->sc_state == AIC_IDLE) 545 aic_sched(sc); 546 547 splx(s); 548 549 if ((flags & SCSI_POLL) == 0) 550 return SUCCESSFULLY_QUEUED; 551 552 /* Not allowed to use interrupts, use polling instead */ 553 if (aic_poll(sc, xs, acb->timeout)) { 554 aic_timeout(acb); 555 if (aic_poll(sc, xs, acb->timeout)) 556 aic_timeout(acb); 557 } 558 return COMPLETE; 559 } 560 561 /* 562 * Adjust transfer size in buffer structure 563 */ 564 void 565 aic_minphys(bp) 566 struct buf *bp; 567 { 568 569 AIC_TRACE(("aic_minphys ")); 570 if (bp->b_bcount > (AIC_NSEG << PGSHIFT)) 571 bp->b_bcount = (AIC_NSEG << PGSHIFT); 572 minphys(bp); 573 } 574 575 /* 576 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 577 */ 578 int 579 aic_poll(sc, xs, count) 580 struct aic_softc *sc; 581 struct scsipi_xfer *xs; 582 int count; 583 { 584 bus_space_tag_t iot = sc->sc_iot; 585 bus_space_handle_t ioh = sc->sc_ioh; 586 587 AIC_TRACE(("aic_poll ")); 588 while (count) { 589 /* 590 * If we had interrupts enabled, would we 591 * have got an interrupt? 592 */ 593 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) != 0) 594 aicintr(sc); 595 if ((xs->flags & ITSDONE) != 0) 596 return 0; 597 delay(1000); 598 count--; 599 } 600 return 1; 601 } 602 603 /* 605 * LOW LEVEL SCSI UTILITIES 606 */ 607 608 integrate void 609 aic_sched_msgout(sc, m) 610 struct aic_softc *sc; 611 u_char m; 612 { 613 bus_space_tag_t iot = sc->sc_iot; 614 bus_space_handle_t ioh = sc->sc_ioh; 615 616 if (sc->sc_msgpriq == 0) 617 bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase | ATNO); 618 sc->sc_msgpriq |= m; 619 } 620 621 /* 622 * Set synchronous transfer offset and period. 623 */ 624 integrate void 625 aic_setsync(sc, ti) 626 struct aic_softc *sc; 627 struct aic_tinfo *ti; 628 { 629 #if AIC_USE_SYNCHRONOUS 630 bus_space_tag_t iot = sc->sc_iot; 631 bus_space_handle_t ioh = sc->sc_ioh; 632 633 if (ti->offset != 0) 634 bus_space_write_1(iot, ioh, SCSIRATE, 635 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 636 else 637 bus_space_write_1(iot, ioh, SCSIRATE, 0); 638 #endif 639 } 640 641 /* 642 * Start a selection. This is used by aic_sched() to select an idle target, 643 * and by aic_done() to immediately reselect a target to get sense information. 644 */ 645 void 646 aic_select(sc, acb) 647 struct aic_softc *sc; 648 struct aic_acb *acb; 649 { 650 struct scsipi_link *sc_link = acb->xs->sc_link; 651 int target = sc_link->scsipi_scsi.target; 652 struct aic_tinfo *ti = &sc->sc_tinfo[target]; 653 bus_space_tag_t iot = sc->sc_iot; 654 bus_space_handle_t ioh = sc->sc_ioh; 655 656 bus_space_write_1(iot, ioh, SCSIID, 657 sc->sc_initiator << OID_S | target); 658 aic_setsync(sc, ti); 659 bus_space_write_1(iot, ioh, SXFRCTL1, STIMO_256ms | ENSTIMER); 660 661 /* Always enable reselections. */ 662 bus_space_write_1(iot, ioh, SIMODE0, ENSELDI | ENSELDO); 663 bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST | ENSELTIMO); 664 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI | ENSELO | ENAUTOATNO); 665 666 sc->sc_state = AIC_SELECTING; 667 } 668 669 int 670 aic_reselect(sc, message) 671 struct aic_softc *sc; 672 int message; 673 { 674 u_char selid, target, lun; 675 struct aic_acb *acb; 676 struct scsipi_link *sc_link; 677 struct aic_tinfo *ti; 678 679 /* 680 * The SCSI chip made a snapshot of the data bus while the reselection 681 * was being negotiated. This enables us to determine which target did 682 * the reselect. 683 */ 684 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 685 if (selid & (selid - 1)) { 686 printf("%s: reselect with invalid selid %02x; " 687 "sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid); 688 AIC_BREAK(); 689 goto reset; 690 } 691 692 /* Search wait queue for disconnected cmd 693 * The list should be short, so I haven't bothered with 694 * any more sophisticated structures than a simple 695 * singly linked list. 696 */ 697 target = ffs(selid) - 1; 698 lun = message & 0x07; 699 for (acb = sc->nexus_list.tqh_first; acb != NULL; 700 acb = acb->chain.tqe_next) { 701 sc_link = acb->xs->sc_link; 702 if (sc_link->scsipi_scsi.target == target && sc_link->scsipi_scsi.lun == lun) 703 break; 704 } 705 if (acb == NULL) { 706 printf("%s: reselect from target %d lun %d with no nexus; " 707 "sending ABORT\n", sc->sc_dev.dv_xname, target, lun); 708 AIC_BREAK(); 709 goto abort; 710 } 711 712 /* Make this nexus active again. */ 713 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 714 sc->sc_state = AIC_CONNECTED; 715 sc->sc_nexus = acb; 716 ti = &sc->sc_tinfo[target]; 717 ti->lubusy |= (1 << lun); 718 aic_setsync(sc, ti); 719 720 if (acb->flags & ACB_RESET) 721 aic_sched_msgout(sc, SEND_DEV_RESET); 722 else if (acb->flags & ACB_ABORT) 723 aic_sched_msgout(sc, SEND_ABORT); 724 725 /* Do an implicit RESTORE POINTERS. */ 726 sc->sc_dp = acb->data_addr; 727 sc->sc_dleft = acb->data_length; 728 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 729 sc->sc_cleft = acb->scsipi_cmd_length; 730 731 return (0); 732 733 reset: 734 aic_sched_msgout(sc, SEND_DEV_RESET); 735 return (1); 736 737 abort: 738 aic_sched_msgout(sc, SEND_ABORT); 739 return (1); 740 } 741 742 /* 744 * Schedule a SCSI operation. This has now been pulled out of the interrupt 745 * handler so that we may call it from aic_scsi_cmd and aic_done. This may 746 * save us an unecessary interrupt just to get things going. Should only be 747 * called when state == AIC_IDLE and at bio pl. 748 */ 749 void 750 aic_sched(sc) 751 register struct aic_softc *sc; 752 { 753 struct aic_acb *acb; 754 struct scsipi_link *sc_link; 755 struct aic_tinfo *ti; 756 bus_space_tag_t iot = sc->sc_iot; 757 bus_space_handle_t ioh = sc->sc_ioh; 758 759 /* 760 * Find first acb in ready queue that is for a target/lunit pair that 761 * is not busy. 762 */ 763 bus_space_write_1(iot, ioh, CLRSINT1, 764 CLRSELTIMO | CLRBUSFREE | CLRSCSIPERR); 765 for (acb = sc->ready_list.tqh_first; acb != NULL; 766 acb = acb->chain.tqe_next) { 767 sc_link = acb->xs->sc_link; 768 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target]; 769 if ((ti->lubusy & (1 << sc_link->scsipi_scsi.lun)) == 0) { 770 AIC_MISC(("selecting %d:%d ", 771 sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun)); 772 TAILQ_REMOVE(&sc->ready_list, acb, chain); 773 sc->sc_nexus = acb; 774 aic_select(sc, acb); 775 return; 776 } else 777 AIC_MISC(("%d:%d busy\n", 778 sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun)); 779 } 780 AIC_MISC(("idle ")); 781 /* Nothing to start; just enable reselections and wait. */ 782 bus_space_write_1(iot, ioh, SIMODE0, ENSELDI); 783 bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST); 784 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI); 785 } 786 787 void 789 aic_sense(sc, acb) 790 struct aic_softc *sc; 791 struct aic_acb *acb; 792 { 793 struct scsipi_xfer *xs = acb->xs; 794 struct scsipi_link *sc_link = xs->sc_link; 795 struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target]; 796 struct scsipi_sense *ss = (void *)&acb->scsipi_cmd; 797 798 AIC_MISC(("requesting sense ")); 799 /* Next, setup a request sense command block */ 800 bzero(ss, sizeof(*ss)); 801 ss->opcode = REQUEST_SENSE; 802 ss->byte2 = sc_link->scsipi_scsi.lun << 5; 803 ss->length = sizeof(struct scsipi_sense_data); 804 acb->scsipi_cmd_length = sizeof(*ss); 805 acb->data_addr = (char *)&xs->sense.scsi_sense; 806 acb->data_length = sizeof(struct scsipi_sense_data); 807 acb->flags |= ACB_SENSE; 808 ti->senses++; 809 if (acb->flags & ACB_NEXUS) 810 ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun); 811 if (acb == sc->sc_nexus) { 812 aic_select(sc, acb); 813 } else { 814 aic_dequeue(sc, acb); 815 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 816 if (sc->sc_state == AIC_IDLE) 817 aic_sched(sc); 818 } 819 } 820 821 /* 822 * POST PROCESSING OF SCSI_CMD (usually current) 823 */ 824 void 825 aic_done(sc, acb) 826 struct aic_softc *sc; 827 struct aic_acb *acb; 828 { 829 struct scsipi_xfer *xs = acb->xs; 830 struct scsipi_link *sc_link = xs->sc_link; 831 struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target]; 832 833 AIC_TRACE(("aic_done ")); 834 835 /* 836 * Now, if we've come here with no error code, i.e. we've kept the 837 * initial XS_NOERROR, and the status code signals that we should 838 * check sense, we'll need to set up a request sense cmd block and 839 * push the command back into the ready queue *before* any other 840 * commands for this target/lunit, else we lose the sense info. 841 * We don't support chk sense conditions for the request sense cmd. 842 */ 843 if (xs->error == XS_NOERROR) { 844 if (acb->flags & ACB_ABORT) { 845 xs->error = XS_DRIVER_STUFFUP; 846 } else if (acb->flags & ACB_SENSE) { 847 xs->error = XS_SENSE; 848 } else if (acb->target_stat == SCSI_CHECK) { 849 /* First, save the return values */ 850 xs->resid = acb->data_length; 851 xs->status = acb->target_stat; 852 aic_sense(sc, acb); 853 return; 854 } else { 855 xs->resid = acb->data_length; 856 } 857 } 858 859 xs->flags |= ITSDONE; 860 861 #if AIC_DEBUG 862 if ((aic_debug & AIC_SHOWMISC) != 0) { 863 if (xs->resid != 0) 864 printf("resid=%d ", xs->resid); 865 if (xs->error == XS_SENSE) 866 printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code); 867 else 868 printf("error=%d\n", xs->error); 869 } 870 #endif 871 872 /* 873 * Remove the ACB from whatever queue it happens to be on. 874 */ 875 if (acb->flags & ACB_NEXUS) 876 ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun); 877 if (acb == sc->sc_nexus) { 878 sc->sc_nexus = NULL; 879 sc->sc_state = AIC_IDLE; 880 aic_sched(sc); 881 } else 882 aic_dequeue(sc, acb); 883 884 aic_free_acb(sc, acb, xs->flags); 885 ti->cmds++; 886 scsipi_done(xs); 887 } 888 889 void 890 aic_dequeue(sc, acb) 891 struct aic_softc *sc; 892 struct aic_acb *acb; 893 { 894 895 if (acb->flags & ACB_NEXUS) { 896 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 897 } else { 898 TAILQ_REMOVE(&sc->ready_list, acb, chain); 899 } 900 } 901 902 /* 904 * INTERRUPT/PROTOCOL ENGINE 905 */ 906 907 #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80) 908 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20) 909 #define ISEXTMSG(m) ((m) == 0x01) 910 911 /* 912 * Precondition: 913 * The SCSI bus is already in the MSGI phase and there is a message byte 914 * on the bus, along with an asserted REQ signal. 915 */ 916 void 917 aic_msgin(sc) 918 register struct aic_softc *sc; 919 { 920 bus_space_tag_t iot = sc->sc_iot; 921 bus_space_handle_t ioh = sc->sc_ioh; 922 u_char sstat1; 923 int n; 924 925 AIC_TRACE(("aic_msgin ")); 926 927 if (sc->sc_prevphase == PH_MSGIN) { 928 /* This is a continuation of the previous message. */ 929 n = sc->sc_imp - sc->sc_imess; 930 goto nextbyte; 931 } 932 933 /* This is a new MESSAGE IN phase. Clean up our state. */ 934 sc->sc_flags &= ~AIC_DROP_MSGIN; 935 936 nextmsg: 937 n = 0; 938 sc->sc_imp = &sc->sc_imess[n]; 939 940 nextbyte: 941 /* 942 * Read a whole message, but don't ack the last byte. If we reject the 943 * message, we have to assert ATN during the message transfer phase 944 * itself. 945 */ 946 for (;;) { 947 for (;;) { 948 sstat1 = bus_space_read_1(iot, ioh, SSTAT1); 949 if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0) 950 break; 951 /* Wait for REQINIT. XXX Need timeout. */ 952 } 953 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) { 954 /* 955 * Target left MESSAGE IN, probably because it 956 * a) noticed our ATN signal, or 957 * b) ran out of messages. 958 */ 959 goto out; 960 } 961 962 /* If parity error, just dump everything on the floor. */ 963 if ((sstat1 & SCSIPERR) != 0) { 964 sc->sc_flags |= AIC_DROP_MSGIN; 965 aic_sched_msgout(sc, SEND_PARITY_ERROR); 966 } 967 968 /* Gather incoming message bytes if needed. */ 969 if ((sc->sc_flags & AIC_DROP_MSGIN) == 0) { 970 if (n >= AIC_MAX_MSG_LEN) { 971 (void) bus_space_read_1(iot, ioh, SCSIDAT); 972 sc->sc_flags |= AIC_DROP_MSGIN; 973 aic_sched_msgout(sc, SEND_REJECT); 974 } else { 975 *sc->sc_imp++ = bus_space_read_1(iot, ioh, 976 SCSIDAT); 977 n++; 978 /* 979 * This testing is suboptimal, but most 980 * messages will be of the one byte variety, so 981 * it should not affect performance 982 * significantly. 983 */ 984 if (n == 1 && IS1BYTEMSG(sc->sc_imess[0])) 985 break; 986 if (n == 2 && IS2BYTEMSG(sc->sc_imess[0])) 987 break; 988 if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) && 989 n == sc->sc_imess[1] + 2) 990 break; 991 } 992 } else 993 (void) bus_space_read_1(iot, ioh, SCSIDAT); 994 995 /* 996 * If we reach this spot we're either: 997 * a) in the middle of a multi-byte message, or 998 * b) dropping bytes. 999 */ 1000 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); 1001 /* Ack the last byte read. */ 1002 (void) bus_space_read_1(iot, ioh, SCSIDAT); 1003 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1004 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0) 1005 ; 1006 } 1007 1008 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1009 1010 /* We now have a complete message. Parse it. */ 1011 switch (sc->sc_state) { 1012 struct aic_acb *acb; 1013 struct scsipi_link *sc_link; 1014 struct aic_tinfo *ti; 1015 1016 case AIC_CONNECTED: 1017 AIC_ASSERT(sc->sc_nexus != NULL); 1018 acb = sc->sc_nexus; 1019 ti = &sc->sc_tinfo[acb->xs->sc_link->scsipi_scsi.target]; 1020 1021 switch (sc->sc_imess[0]) { 1022 case MSG_CMDCOMPLETE: 1023 if (sc->sc_dleft < 0) { 1024 sc_link = acb->xs->sc_link; 1025 printf("%s: %d extra bytes from %d:%d\n", 1026 sc->sc_dev.dv_xname, -sc->sc_dleft, 1027 sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun); 1028 acb->data_length = 0; 1029 } 1030 acb->xs->resid = acb->data_length = sc->sc_dleft; 1031 sc->sc_state = AIC_CMDCOMPLETE; 1032 break; 1033 1034 case MSG_PARITY_ERROR: 1035 /* Resend the last message. */ 1036 aic_sched_msgout(sc, sc->sc_lastmsg); 1037 break; 1038 1039 case MSG_MESSAGE_REJECT: 1040 AIC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 1041 switch (sc->sc_lastmsg) { 1042 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE 1043 case SEND_IDENTIFY: 1044 ti->flags &= ~(DO_SYNC | DO_WIDE); 1045 ti->period = ti->offset = 0; 1046 aic_setsync(sc, ti); 1047 ti->width = 0; 1048 break; 1049 #endif 1050 #if AIC_USE_SYNCHRONOUS 1051 case SEND_SDTR: 1052 ti->flags &= ~DO_SYNC; 1053 ti->period = ti->offset = 0; 1054 aic_setsync(sc, ti); 1055 break; 1056 #endif 1057 #if AIC_USE_WIDE 1058 case SEND_WDTR: 1059 ti->flags &= ~DO_WIDE; 1060 ti->width = 0; 1061 break; 1062 #endif 1063 case SEND_INIT_DET_ERR: 1064 aic_sched_msgout(sc, SEND_ABORT); 1065 break; 1066 } 1067 break; 1068 1069 case MSG_NOOP: 1070 break; 1071 1072 case MSG_DISCONNECT: 1073 ti->dconns++; 1074 sc->sc_state = AIC_DISCONNECT; 1075 break; 1076 1077 case MSG_SAVEDATAPOINTER: 1078 acb->data_addr = sc->sc_dp; 1079 acb->data_length = sc->sc_dleft; 1080 break; 1081 1082 case MSG_RESTOREPOINTERS: 1083 sc->sc_dp = acb->data_addr; 1084 sc->sc_dleft = acb->data_length; 1085 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1086 sc->sc_cleft = acb->scsipi_cmd_length; 1087 break; 1088 1089 case MSG_EXTENDED: 1090 switch (sc->sc_imess[2]) { 1091 #if AIC_USE_SYNCHRONOUS 1092 case MSG_EXT_SDTR: 1093 if (sc->sc_imess[1] != 3) 1094 goto reject; 1095 ti->period = sc->sc_imess[3]; 1096 ti->offset = sc->sc_imess[4]; 1097 ti->flags &= ~DO_SYNC; 1098 if (ti->offset == 0) { 1099 } else if (ti->period < sc->sc_minsync || 1100 ti->period > sc->sc_maxsync || 1101 ti->offset > 8) { 1102 ti->period = ti->offset = 0; 1103 aic_sched_msgout(sc, SEND_SDTR); 1104 } else { 1105 scsi_print_addr(acb->xs->sc_link); 1106 printf("sync, offset %d, " 1107 "period %dnsec\n", 1108 ti->offset, ti->period * 4); 1109 } 1110 aic_setsync(sc, ti); 1111 break; 1112 #endif 1113 1114 #if AIC_USE_WIDE 1115 case MSG_EXT_WDTR: 1116 if (sc->sc_imess[1] != 2) 1117 goto reject; 1118 ti->width = sc->sc_imess[3]; 1119 ti->flags &= ~DO_WIDE; 1120 if (ti->width == 0) { 1121 } else if (ti->width > AIC_MAX_WIDTH) { 1122 ti->width = 0; 1123 aic_sched_msgout(sc, SEND_WDTR); 1124 } else { 1125 scsi_print_addr(acb->xs->sc_link); 1126 printf("wide, width %d\n", 1127 1 << (3 + ti->width)); 1128 } 1129 break; 1130 #endif 1131 1132 default: 1133 printf("%s: unrecognized MESSAGE EXTENDED; " 1134 "sending REJECT\n", sc->sc_dev.dv_xname); 1135 AIC_BREAK(); 1136 goto reject; 1137 } 1138 break; 1139 1140 default: 1141 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1142 sc->sc_dev.dv_xname); 1143 AIC_BREAK(); 1144 reject: 1145 aic_sched_msgout(sc, SEND_REJECT); 1146 break; 1147 } 1148 break; 1149 1150 case AIC_RESELECTED: 1151 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1152 printf("%s: reselect without IDENTIFY; " 1153 "sending DEVICE RESET\n", sc->sc_dev.dv_xname); 1154 AIC_BREAK(); 1155 goto reset; 1156 } 1157 1158 (void) aic_reselect(sc, sc->sc_imess[0]); 1159 break; 1160 1161 default: 1162 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1163 sc->sc_dev.dv_xname); 1164 AIC_BREAK(); 1165 reset: 1166 aic_sched_msgout(sc, SEND_DEV_RESET); 1167 break; 1168 1169 #ifdef notdef 1170 abort: 1171 aic_sched_msgout(sc, SEND_ABORT); 1172 break; 1173 #endif 1174 } 1175 1176 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); 1177 /* Ack the last message byte. */ 1178 (void) bus_space_read_1(iot, ioh, SCSIDAT); 1179 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1180 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0) 1181 ; 1182 1183 /* Go get the next message, if any. */ 1184 goto nextmsg; 1185 1186 out: 1187 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1188 } 1189 1190 /* 1191 * Send the highest priority, scheduled message. 1192 */ 1193 void 1194 aic_msgout(sc) 1195 register struct aic_softc *sc; 1196 { 1197 bus_space_tag_t iot = sc->sc_iot; 1198 bus_space_handle_t ioh = sc->sc_ioh; 1199 #if AIC_USE_SYNCHRONOUS 1200 struct aic_tinfo *ti; 1201 #endif 1202 u_char sstat1; 1203 int n; 1204 1205 AIC_TRACE(("aic_msgout ")); 1206 1207 /* Reset the FIFO. */ 1208 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO); 1209 /* Enable REQ/ACK protocol. */ 1210 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); 1211 1212 if (sc->sc_prevphase == PH_MSGOUT) { 1213 if (sc->sc_omp == sc->sc_omess) { 1214 /* 1215 * This is a retransmission. 1216 * 1217 * We get here if the target stayed in MESSAGE OUT 1218 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1219 * that all of the previously transmitted messages must 1220 * be sent again, in the same order. Therefore, we 1221 * requeue all the previously transmitted messages, and 1222 * start again from the top. Our simple priority 1223 * scheme keeps the messages in the right order. 1224 */ 1225 AIC_MISC(("retransmitting ")); 1226 sc->sc_msgpriq |= sc->sc_msgoutq; 1227 /* 1228 * Set ATN. If we're just sending a trivial 1-byte 1229 * message, we'll clear ATN later on anyway. 1230 */ 1231 bus_space_write_1(iot, ioh, SCSISIG, PH_MSGOUT | ATNO); 1232 } else { 1233 /* This is a continuation of the previous message. */ 1234 n = sc->sc_omp - sc->sc_omess; 1235 goto nextbyte; 1236 } 1237 } 1238 1239 /* No messages transmitted so far. */ 1240 sc->sc_msgoutq = 0; 1241 sc->sc_lastmsg = 0; 1242 1243 nextmsg: 1244 /* Pick up highest priority message. */ 1245 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1246 sc->sc_msgpriq &= ~sc->sc_currmsg; 1247 sc->sc_msgoutq |= sc->sc_currmsg; 1248 1249 /* Build the outgoing message data. */ 1250 switch (sc->sc_currmsg) { 1251 case SEND_IDENTIFY: 1252 AIC_ASSERT(sc->sc_nexus != NULL); 1253 sc->sc_omess[0] = 1254 MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->scsipi_scsi.lun, 1); 1255 n = 1; 1256 break; 1257 1258 #if AIC_USE_SYNCHRONOUS 1259 case SEND_SDTR: 1260 AIC_ASSERT(sc->sc_nexus != NULL); 1261 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target]; 1262 sc->sc_omess[4] = MSG_EXTENDED; 1263 sc->sc_omess[3] = 3; 1264 sc->sc_omess[2] = MSG_EXT_SDTR; 1265 sc->sc_omess[1] = ti->period >> 2; 1266 sc->sc_omess[0] = ti->offset; 1267 n = 5; 1268 break; 1269 #endif 1270 1271 #if AIC_USE_WIDE 1272 case SEND_WDTR: 1273 AIC_ASSERT(sc->sc_nexus != NULL); 1274 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target]; 1275 sc->sc_omess[3] = MSG_EXTENDED; 1276 sc->sc_omess[2] = 2; 1277 sc->sc_omess[1] = MSG_EXT_WDTR; 1278 sc->sc_omess[0] = ti->width; 1279 n = 4; 1280 break; 1281 #endif 1282 1283 case SEND_DEV_RESET: 1284 sc->sc_flags |= AIC_ABORTING; 1285 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1286 n = 1; 1287 break; 1288 1289 case SEND_REJECT: 1290 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1291 n = 1; 1292 break; 1293 1294 case SEND_PARITY_ERROR: 1295 sc->sc_omess[0] = MSG_PARITY_ERROR; 1296 n = 1; 1297 break; 1298 1299 case SEND_INIT_DET_ERR: 1300 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1301 n = 1; 1302 break; 1303 1304 case SEND_ABORT: 1305 sc->sc_flags |= AIC_ABORTING; 1306 sc->sc_omess[0] = MSG_ABORT; 1307 n = 1; 1308 break; 1309 1310 default: 1311 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1312 sc->sc_dev.dv_xname); 1313 AIC_BREAK(); 1314 sc->sc_omess[0] = MSG_NOOP; 1315 n = 1; 1316 break; 1317 } 1318 sc->sc_omp = &sc->sc_omess[n]; 1319 1320 nextbyte: 1321 /* Send message bytes. */ 1322 for (;;) { 1323 for (;;) { 1324 sstat1 = bus_space_read_1(iot, ioh, SSTAT1); 1325 if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0) 1326 break; 1327 /* Wait for REQINIT. XXX Need timeout. */ 1328 } 1329 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) { 1330 /* 1331 * Target left MESSAGE OUT, possibly to reject 1332 * our message. 1333 * 1334 * If this is the last message being sent, then we 1335 * deassert ATN, since either the target is going to 1336 * ignore this message, or it's going to ask for a 1337 * retransmission via MESSAGE PARITY ERROR (in which 1338 * case we reassert ATN anyway). 1339 */ 1340 if (sc->sc_msgpriq == 0) 1341 bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO); 1342 goto out; 1343 } 1344 1345 /* Clear ATN before last byte if this is the last message. */ 1346 if (n == 1 && sc->sc_msgpriq == 0) 1347 bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO); 1348 /* Send message byte. */ 1349 bus_space_write_1(iot, ioh, SCSIDAT, *--sc->sc_omp); 1350 --n; 1351 /* Keep track of the last message we've sent any bytes of. */ 1352 sc->sc_lastmsg = sc->sc_currmsg; 1353 /* Wait for ACK to be negated. XXX Need timeout. */ 1354 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0) 1355 ; 1356 1357 if (n == 0) 1358 break; 1359 } 1360 1361 /* We get here only if the entire message has been transmitted. */ 1362 if (sc->sc_msgpriq != 0) { 1363 /* There are more outgoing messages. */ 1364 goto nextmsg; 1365 } 1366 1367 /* 1368 * The last message has been transmitted. We need to remember the last 1369 * message transmitted (in case the target switches to MESSAGE IN phase 1370 * and sends a MESSAGE REJECT), and the list of messages transmitted 1371 * this time around (in case the target stays in MESSAGE OUT phase to 1372 * request a retransmit). 1373 */ 1374 1375 out: 1376 /* Disable REQ/ACK protocol. */ 1377 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1378 } 1379 1380 /* aic_dataout_pio: perform a data transfer using the FIFO datapath in the 1382 * aic6360 1383 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1384 * and ACK deasserted (i.e. waiting for a data byte) 1385 * This new revision has been optimized (I tried) to make the common case fast, 1386 * and the rarer cases (as a result) somewhat more comlex 1387 */ 1388 int 1389 aic_dataout_pio(sc, p, n) 1390 register struct aic_softc *sc; 1391 u_char *p; 1392 int n; 1393 { 1394 bus_space_tag_t iot = sc->sc_iot; 1395 bus_space_handle_t ioh = sc->sc_ioh; 1396 register u_char dmastat = 0; 1397 int out = 0; 1398 #define DOUTAMOUNT 128 /* Full FIFO */ 1399 1400 AIC_MISC(("%02x%02x ", bus_space_read_1(iot, ioh, FIFOSTAT), 1401 bus_space_read_1(iot, ioh, SSTAT2))); 1402 1403 /* Clear host FIFO and counter. */ 1404 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO | WRITE); 1405 /* Enable FIFOs. */ 1406 bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO | WRITE); 1407 bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN); 1408 1409 /* Turn off ENREQINIT for now. */ 1410 bus_space_write_1(iot, ioh, SIMODE1, 1411 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG); 1412 1413 /* I have tried to make the main loop as tight as possible. This 1414 * means that some of the code following the loop is a bit more 1415 * complex than otherwise. 1416 */ 1417 while (n > 0) { 1418 for (;;) { 1419 dmastat = bus_space_read_1(iot, ioh, DMASTAT); 1420 if ((dmastat & (DFIFOEMP | INTSTAT)) != 0) 1421 break; 1422 } 1423 1424 if ((dmastat & INTSTAT) != 0) 1425 goto phasechange; 1426 1427 if (n >= DOUTAMOUNT) { 1428 n -= DOUTAMOUNT; 1429 out += DOUTAMOUNT; 1430 1431 #if AIC_USE_DWORDS 1432 bus_space_write_multi_4(iot, ioh, DMADATALONG, p, 1433 DOUTAMOUNT >> 2); 1434 #else 1435 bus_space_write_multi_2(iot, ioh, DMADATA, p, 1436 DOUTAMOUNT >> 1); 1437 #endif 1438 1439 p += DOUTAMOUNT; 1440 } else { 1441 register int xfer; 1442 1443 xfer = n; 1444 AIC_MISC(("%d> ", xfer)); 1445 1446 n -= xfer; 1447 out += xfer; 1448 1449 #if AIC_USE_DWORDS 1450 if (xfer >= 12) { 1451 bus_space_write_multi_4(iot, ioh, DMADATALONG, 1452 p, xfer >> 2); 1453 p += xfer & ~3; 1454 xfer &= 3; 1455 } 1456 #else 1457 if (xfer >= 8) { 1458 bus_space_write_multi_2(iot, ioh, DMADATA, 1459 p, xfer >> 1); 1460 p += xfer & ~1; 1461 xfer &= 1; 1462 } 1463 #endif 1464 1465 if (xfer > 0) { 1466 bus_space_write_1(iot, ioh, DMACNTRL0, 1467 ENDMA | B8MODE | WRITE); 1468 bus_space_write_multi_1(iot, ioh, DMADATA, 1469 p, xfer); 1470 p += xfer; 1471 bus_space_write_1(iot, ioh, DMACNTRL0, 1472 ENDMA | DWORDPIO | WRITE); 1473 } 1474 } 1475 } 1476 1477 if (out == 0) { 1478 bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET); 1479 for (;;) { 1480 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) 1481 != 0) 1482 break; 1483 } 1484 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 1485 AIC_MISC(("extra data ")); 1486 } else { 1487 /* See the bytes off chip */ 1488 for (;;) { 1489 dmastat = bus_space_read_1(iot, ioh, DMASTAT); 1490 if ((dmastat & INTSTAT) != 0) 1491 goto phasechange; 1492 if ((dmastat & DFIFOEMP) != 0 && 1493 (bus_space_read_1(iot, ioh, SSTAT2) & SEMPTY) != 0) 1494 break; 1495 } 1496 } 1497 1498 phasechange: 1499 if ((dmastat & INTSTAT) != 0) { 1500 /* Some sort of phase change. */ 1501 int amount; 1502 1503 /* Stop transfers, do some accounting */ 1504 amount = bus_space_read_1(iot, ioh, FIFOSTAT) 1505 + (bus_space_read_1(iot, ioh, SSTAT2) & 15); 1506 if (amount > 0) { 1507 out -= amount; 1508 bus_space_write_1(iot, ioh, DMACNTRL0, 1509 RSTFIFO | WRITE); 1510 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH); 1511 AIC_MISC(("+%d ", amount)); 1512 } 1513 } 1514 1515 /* Turn on ENREQINIT again. */ 1516 bus_space_write_1(iot, ioh, SIMODE1, 1517 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG); 1518 1519 /* Stop the FIFO data path. */ 1520 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1521 bus_space_write_1(iot, ioh, DMACNTRL0, 0); 1522 1523 return out; 1524 } 1525 1526 /* aic_datain_pio: perform data transfers using the FIFO datapath in the 1528 * aic6360 1529 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1530 * and ACK deasserted (i.e. at least one byte is ready). 1531 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1532 * transferred. This, is OK for fast targets, but not so smart for slow 1533 * targets which don't disconnect or for huge transfers. 1534 */ 1535 int 1536 aic_datain_pio(sc, p, n) 1537 register struct aic_softc *sc; 1538 u_char *p; 1539 int n; 1540 { 1541 bus_space_tag_t iot = sc->sc_iot; 1542 bus_space_handle_t ioh = sc->sc_ioh; 1543 register u_char dmastat; 1544 int in = 0; 1545 #define DINAMOUNT 128 /* Full FIFO */ 1546 1547 AIC_MISC(("%02x%02x ", bus_space_read_1(iot, ioh, FIFOSTAT), 1548 bus_space_read_1(iot, ioh, SSTAT2))); 1549 1550 /* Clear host FIFO and counter. */ 1551 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO); 1552 /* Enable FIFOs. */ 1553 bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO); 1554 bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN); 1555 1556 /* Turn off ENREQINIT for now. */ 1557 bus_space_write_1(iot, ioh, SIMODE1, 1558 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG); 1559 1560 /* We leave this loop if one or more of the following is true: 1561 * a) phase != PH_DATAIN && FIFOs are empty 1562 * b) SCSIRSTI is set (a reset has occurred) or busfree is detected. 1563 */ 1564 while (n > 0) { 1565 /* Wait for fifo half full or phase mismatch */ 1566 for (;;) { 1567 dmastat = bus_space_read_1(iot, ioh, DMASTAT); 1568 if ((dmastat & (DFIFOFULL | INTSTAT)) != 0) 1569 break; 1570 } 1571 1572 if ((dmastat & DFIFOFULL) != 0) { 1573 n -= DINAMOUNT; 1574 in += DINAMOUNT; 1575 1576 #if AIC_USE_DWORDS 1577 bus_space_read_multi_4(iot, ioh, DMADATALONG, p, 1578 DINAMOUNT >> 2); 1579 #else 1580 bus_space_read_multi_2(iot, ioh, DMADATA, p, 1581 DINAMOUNT >> 1); 1582 #endif 1583 1584 p += DINAMOUNT; 1585 } else { 1586 register int xfer; 1587 1588 xfer = min(bus_space_read_1(iot, ioh, FIFOSTAT), n); 1589 AIC_MISC((">%d ", xfer)); 1590 1591 n -= xfer; 1592 in += xfer; 1593 1594 #if AIC_USE_DWORDS 1595 if (xfer >= 12) { 1596 bus_space_read_multi_4(iot, ioh, DMADATALONG, 1597 p, xfer >> 2); 1598 p += xfer & ~3; 1599 xfer &= 3; 1600 } 1601 #else 1602 if (xfer >= 8) { 1603 bus_space_read_multi_2(iot, ioh, DMADATA, p, 1604 xfer >> 1); 1605 p += xfer & ~1; 1606 xfer &= 1; 1607 } 1608 #endif 1609 1610 if (xfer > 0) { 1611 bus_space_write_1(iot, ioh, DMACNTRL0, 1612 ENDMA | B8MODE); 1613 bus_space_read_multi_1(iot, ioh, DMADATA, 1614 p, xfer); 1615 p += xfer; 1616 bus_space_write_1(iot, ioh, DMACNTRL0, 1617 ENDMA | DWORDPIO); 1618 } 1619 } 1620 1621 if ((dmastat & INTSTAT) != 0) 1622 goto phasechange; 1623 } 1624 1625 /* Some SCSI-devices are rude enough to transfer more data than what 1626 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1627 * requested 512. Test for progress, i.e. real transfers. If no real 1628 * transfers have been performed (n is probably already zero) and the 1629 * FIFO is not empty, waste some bytes.... 1630 */ 1631 if (in == 0) { 1632 bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET); 1633 for (;;) { 1634 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) 1635 != 0) 1636 break; 1637 } 1638 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 1639 AIC_MISC(("extra data ")); 1640 } 1641 1642 phasechange: 1643 /* Turn on ENREQINIT again. */ 1644 bus_space_write_1(iot, ioh, SIMODE1, 1645 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG); 1646 1647 /* Stop the FIFO data path. */ 1648 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1649 bus_space_write_1(iot, ioh, DMACNTRL0, 0); 1650 1651 return in; 1652 } 1653 1654 /* 1656 * This is the workhorse routine of the driver. 1657 * Deficiencies (for now): 1658 * 1) always uses programmed I/O 1659 */ 1660 int 1661 aicintr(arg) 1662 void *arg; 1663 { 1664 register struct aic_softc *sc = arg; 1665 bus_space_tag_t iot = sc->sc_iot; 1666 bus_space_handle_t ioh = sc->sc_ioh; 1667 u_char sstat0, sstat1; 1668 register struct aic_acb *acb; 1669 register struct scsipi_link *sc_link; 1670 struct aic_tinfo *ti; 1671 int n; 1672 1673 /* 1674 * Clear INTEN. We enable it again before returning. This makes the 1675 * interrupt esssentially level-triggered. 1676 */ 1677 bus_space_write_1(iot, ioh, DMACNTRL0, 0); 1678 1679 AIC_TRACE(("aicintr ")); 1680 1681 loop: 1682 /* 1683 * First check for abnormal conditions, such as reset. 1684 */ 1685 sstat1 = bus_space_read_1(iot, ioh, SSTAT1); 1686 AIC_MISC(("sstat1:0x%02x ", sstat1)); 1687 1688 if ((sstat1 & SCSIRSTI) != 0) { 1689 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 1690 goto reset; 1691 } 1692 1693 /* 1694 * Check for less serious errors. 1695 */ 1696 if ((sstat1 & SCSIPERR) != 0) { 1697 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 1698 bus_space_write_1(iot, ioh, CLRSINT1, CLRSCSIPERR); 1699 if (sc->sc_prevphase == PH_MSGIN) { 1700 sc->sc_flags |= AIC_DROP_MSGIN; 1701 aic_sched_msgout(sc, SEND_PARITY_ERROR); 1702 } else 1703 aic_sched_msgout(sc, SEND_INIT_DET_ERR); 1704 } 1705 1706 /* 1707 * If we're not already busy doing something test for the following 1708 * conditions: 1709 * 1) We have been reselected by something 1710 * 2) We have selected something successfully 1711 * 3) Our selection process has timed out 1712 * 4) This is really a bus free interrupt just to get a new command 1713 * going? 1714 * 5) Spurious interrupt? 1715 */ 1716 switch (sc->sc_state) { 1717 case AIC_IDLE: 1718 case AIC_SELECTING: 1719 sstat0 = bus_space_read_1(iot, ioh, SSTAT0); 1720 AIC_MISC(("sstat0:0x%02x ", sstat0)); 1721 1722 if ((sstat0 & TARGET) != 0) { 1723 /* 1724 * We don't currently support target mode. 1725 */ 1726 printf("%s: target mode selected; going to BUS FREE\n", 1727 sc->sc_dev.dv_xname); 1728 bus_space_write_1(iot, ioh, SCSISIG, 0); 1729 1730 goto sched; 1731 } else if ((sstat0 & SELDI) != 0) { 1732 AIC_MISC(("reselected ")); 1733 1734 /* 1735 * If we're trying to select a target ourselves, 1736 * push our command back into the ready list. 1737 */ 1738 if (sc->sc_state == AIC_SELECTING) { 1739 AIC_MISC(("backoff selector ")); 1740 AIC_ASSERT(sc->sc_nexus != NULL); 1741 acb = sc->sc_nexus; 1742 sc->sc_nexus = NULL; 1743 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1744 } 1745 1746 /* Save reselection ID. */ 1747 sc->sc_selid = bus_space_read_1(iot, ioh, SELID); 1748 1749 sc->sc_state = AIC_RESELECTED; 1750 } else if ((sstat0 & SELDO) != 0) { 1751 AIC_MISC(("selected ")); 1752 1753 /* We have selected a target. Things to do: 1754 * a) Determine what message(s) to send. 1755 * b) Verify that we're still selecting the target. 1756 * c) Mark device as busy. 1757 */ 1758 if (sc->sc_state != AIC_SELECTING) { 1759 printf("%s: selection out while idle; " 1760 "resetting\n", sc->sc_dev.dv_xname); 1761 AIC_BREAK(); 1762 goto reset; 1763 } 1764 AIC_ASSERT(sc->sc_nexus != NULL); 1765 acb = sc->sc_nexus; 1766 sc_link = acb->xs->sc_link; 1767 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target]; 1768 1769 sc->sc_msgpriq = SEND_IDENTIFY; 1770 if (acb->flags & ACB_RESET) 1771 sc->sc_msgpriq |= SEND_DEV_RESET; 1772 else if (acb->flags & ACB_ABORT) 1773 sc->sc_msgpriq |= SEND_ABORT; 1774 else { 1775 #if AIC_USE_SYNCHRONOUS 1776 if ((ti->flags & DO_SYNC) != 0) 1777 sc->sc_msgpriq |= SEND_SDTR; 1778 #endif 1779 #if AIC_USE_WIDE 1780 if ((ti->flags & DO_WIDE) != 0) 1781 sc->sc_msgpriq |= SEND_WDTR; 1782 #endif 1783 } 1784 1785 acb->flags |= ACB_NEXUS; 1786 ti->lubusy |= (1 << sc_link->scsipi_scsi.lun); 1787 1788 /* Do an implicit RESTORE POINTERS. */ 1789 sc->sc_dp = acb->data_addr; 1790 sc->sc_dleft = acb->data_length; 1791 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1792 sc->sc_cleft = acb->scsipi_cmd_length; 1793 1794 /* On our first connection, schedule a timeout. */ 1795 if ((acb->xs->flags & SCSI_POLL) == 0) 1796 timeout(aic_timeout, acb, 1797 (acb->timeout * hz) / 1000); 1798 1799 sc->sc_state = AIC_CONNECTED; 1800 } else if ((sstat1 & SELTO) != 0) { 1801 AIC_MISC(("selection timeout ")); 1802 1803 if (sc->sc_state != AIC_SELECTING) { 1804 printf("%s: selection timeout while idle; " 1805 "resetting\n", sc->sc_dev.dv_xname); 1806 AIC_BREAK(); 1807 goto reset; 1808 } 1809 AIC_ASSERT(sc->sc_nexus != NULL); 1810 acb = sc->sc_nexus; 1811 1812 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 1813 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI); 1814 bus_space_write_1(iot, ioh, CLRSINT1, CLRSELTIMO); 1815 delay(250); 1816 1817 acb->xs->error = XS_SELTIMEOUT; 1818 goto finish; 1819 } else { 1820 if (sc->sc_state != AIC_IDLE) { 1821 printf("%s: BUS FREE while not idle; " 1822 "state=%d\n", 1823 sc->sc_dev.dv_xname, sc->sc_state); 1824 AIC_BREAK(); 1825 goto out; 1826 } 1827 1828 goto sched; 1829 } 1830 1831 /* 1832 * Turn off selection stuff, and prepare to catch bus free 1833 * interrupts, parity errors, and phase changes. 1834 */ 1835 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRSTCNT | CLRCH); 1836 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 1837 bus_space_write_1(iot, ioh, SCSISEQ, ENAUTOATNP); 1838 bus_space_write_1(iot, ioh, CLRSINT0, CLRSELDI | CLRSELDO); 1839 bus_space_write_1(iot, ioh, CLRSINT1, 1840 CLRBUSFREE | CLRPHASECHG); 1841 bus_space_write_1(iot, ioh, SIMODE0, 0); 1842 bus_space_write_1(iot, ioh, SIMODE1, 1843 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | 1844 ENPHASECHG); 1845 1846 sc->sc_flags = 0; 1847 sc->sc_prevphase = PH_INVALID; 1848 goto dophase; 1849 } 1850 1851 if ((sstat1 & BUSFREE) != 0) { 1852 /* We've gone to BUS FREE phase. */ 1853 bus_space_write_1(iot, ioh, CLRSINT1, 1854 CLRBUSFREE | CLRPHASECHG); 1855 1856 switch (sc->sc_state) { 1857 case AIC_RESELECTED: 1858 goto sched; 1859 1860 case AIC_CONNECTED: 1861 AIC_ASSERT(sc->sc_nexus != NULL); 1862 acb = sc->sc_nexus; 1863 1864 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE 1865 if (sc->sc_prevphase == PH_MSGOUT) { 1866 /* 1867 * If the target went to BUS FREE phase during 1868 * or immediately after sending a SDTR or WDTR 1869 * message, disable negotiation. 1870 */ 1871 sc_link = acb->xs->sc_link; 1872 ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target]; 1873 switch (sc->sc_lastmsg) { 1874 #if AIC_USE_SYNCHRONOUS 1875 case SEND_SDTR: 1876 ti->flags &= ~DO_SYNC; 1877 ti->period = ti->offset = 0; 1878 break; 1879 #endif 1880 #if AIC_USE_WIDE 1881 case SEND_WDTR: 1882 ti->flags &= ~DO_WIDE; 1883 ti->width = 0; 1884 break; 1885 #endif 1886 } 1887 } 1888 #endif 1889 1890 if ((sc->sc_flags & AIC_ABORTING) == 0) { 1891 /* 1892 * Section 5.1.1 of the SCSI 2 spec suggests 1893 * issuing a REQUEST SENSE following an 1894 * unexpected disconnect. Some devices go into 1895 * a contingent allegiance condition when 1896 * disconnecting, and this is necessary to 1897 * clean up their state. 1898 */ 1899 printf("%s: unexpected disconnect; " 1900 "sending REQUEST SENSE\n", 1901 sc->sc_dev.dv_xname); 1902 AIC_BREAK(); 1903 aic_sense(sc, acb); 1904 goto out; 1905 } 1906 1907 acb->xs->error = XS_DRIVER_STUFFUP; 1908 goto finish; 1909 1910 case AIC_DISCONNECT: 1911 AIC_ASSERT(sc->sc_nexus != NULL); 1912 acb = sc->sc_nexus; 1913 #if 1 /* XXXX */ 1914 acb->data_addr = sc->sc_dp; 1915 acb->data_length = sc->sc_dleft; 1916 #endif 1917 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1918 sc->sc_nexus = NULL; 1919 goto sched; 1920 1921 case AIC_CMDCOMPLETE: 1922 AIC_ASSERT(sc->sc_nexus != NULL); 1923 acb = sc->sc_nexus; 1924 goto finish; 1925 } 1926 } 1927 1928 bus_space_write_1(iot, ioh, CLRSINT1, CLRPHASECHG); 1929 1930 dophase: 1931 if ((sstat1 & REQINIT) == 0) { 1932 /* Wait for REQINIT. */ 1933 goto out; 1934 } 1935 1936 sc->sc_phase = bus_space_read_1(iot, ioh, SCSISIG) & PH_MASK; 1937 bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase); 1938 1939 switch (sc->sc_phase) { 1940 case PH_MSGOUT: 1941 if (sc->sc_state != AIC_CONNECTED && 1942 sc->sc_state != AIC_RESELECTED) 1943 break; 1944 aic_msgout(sc); 1945 sc->sc_prevphase = PH_MSGOUT; 1946 goto loop; 1947 1948 case PH_MSGIN: 1949 if (sc->sc_state != AIC_CONNECTED && 1950 sc->sc_state != AIC_RESELECTED) 1951 break; 1952 aic_msgin(sc); 1953 sc->sc_prevphase = PH_MSGIN; 1954 goto loop; 1955 1956 case PH_CMD: 1957 if (sc->sc_state != AIC_CONNECTED) 1958 break; 1959 #if AIC_DEBUG 1960 if ((aic_debug & AIC_SHOWMISC) != 0) { 1961 AIC_ASSERT(sc->sc_nexus != NULL); 1962 acb = sc->sc_nexus; 1963 printf("cmd=0x%02x+%d ", 1964 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1); 1965 } 1966 #endif 1967 n = aic_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 1968 sc->sc_cp += n; 1969 sc->sc_cleft -= n; 1970 sc->sc_prevphase = PH_CMD; 1971 goto loop; 1972 1973 case PH_DATAOUT: 1974 if (sc->sc_state != AIC_CONNECTED) 1975 break; 1976 AIC_MISC(("dataout %d ", sc->sc_dleft)); 1977 n = aic_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 1978 sc->sc_dp += n; 1979 sc->sc_dleft -= n; 1980 sc->sc_prevphase = PH_DATAOUT; 1981 goto loop; 1982 1983 case PH_DATAIN: 1984 if (sc->sc_state != AIC_CONNECTED) 1985 break; 1986 AIC_MISC(("datain %d ", sc->sc_dleft)); 1987 n = aic_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 1988 sc->sc_dp += n; 1989 sc->sc_dleft -= n; 1990 sc->sc_prevphase = PH_DATAIN; 1991 goto loop; 1992 1993 case PH_STAT: 1994 if (sc->sc_state != AIC_CONNECTED) 1995 break; 1996 AIC_ASSERT(sc->sc_nexus != NULL); 1997 acb = sc->sc_nexus; 1998 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); 1999 acb->target_stat = bus_space_read_1(iot, ioh, SCSIDAT); 2000 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 2001 AIC_MISC(("target_stat=0x%02x ", acb->target_stat)); 2002 sc->sc_prevphase = PH_STAT; 2003 goto loop; 2004 } 2005 2006 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname); 2007 AIC_BREAK(); 2008 reset: 2009 aic_init(sc); 2010 return 1; 2011 2012 finish: 2013 untimeout(aic_timeout, acb); 2014 aic_done(sc, acb); 2015 goto out; 2016 2017 sched: 2018 sc->sc_state = AIC_IDLE; 2019 aic_sched(sc); 2020 goto out; 2021 2022 out: 2023 bus_space_write_1(iot, ioh, DMACNTRL0, INTEN); 2024 return 1; 2025 } 2026 2027 void 2028 aic_abort(sc, acb) 2029 struct aic_softc *sc; 2030 struct aic_acb *acb; 2031 { 2032 2033 /* 2 secs for the abort */ 2034 acb->timeout = AIC_ABORT_TIMEOUT; 2035 acb->flags |= ACB_ABORT; 2036 2037 if (acb == sc->sc_nexus) { 2038 /* 2039 * If we're still selecting, the message will be scheduled 2040 * after selection is complete. 2041 */ 2042 if (sc->sc_state == AIC_CONNECTED) 2043 aic_sched_msgout(sc, SEND_ABORT); 2044 } else { 2045 aic_dequeue(sc, acb); 2046 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2047 if (sc->sc_state == AIC_IDLE) 2048 aic_sched(sc); 2049 } 2050 } 2051 2052 void 2053 aic_timeout(arg) 2054 void *arg; 2055 { 2056 struct aic_acb *acb = arg; 2057 struct scsipi_xfer *xs = acb->xs; 2058 struct scsipi_link *sc_link = xs->sc_link; 2059 struct aic_softc *sc = sc_link->adapter_softc; 2060 int s; 2061 2062 scsi_print_addr(sc_link); 2063 printf("timed out"); 2064 2065 s = splbio(); 2066 2067 if (acb->flags & ACB_ABORT) { 2068 /* abort timed out */ 2069 printf(" AGAIN\n"); 2070 /* XXX Must reset! */ 2071 } else { 2072 /* abort the operation that has timed out */ 2073 printf("\n"); 2074 acb->xs->error = XS_TIMEOUT; 2075 aic_abort(sc, acb); 2076 } 2077 2078 splx(s); 2079 } 2080 2081 #ifdef AIC_DEBUG 2083 /* 2084 * The following functions are mostly used for debugging purposes, either 2085 * directly called from the driver or from the kernel debugger. 2086 */ 2087 2088 void 2089 aic_show_scsi_cmd(acb) 2090 struct aic_acb *acb; 2091 { 2092 u_char *b = (u_char *)&acb->scsipi_cmd; 2093 struct scsipi_link *sc_link = acb->xs->sc_link; 2094 int i; 2095 2096 scsi_print_addr(sc_link); 2097 if ((acb->xs->flags & SCSI_RESET) == 0) { 2098 for (i = 0; i < acb->scsipi_cmd_length; i++) { 2099 if (i) 2100 printf(","); 2101 printf("%x", b[i]); 2102 } 2103 printf("\n"); 2104 } else 2105 printf("RESET\n"); 2106 } 2107 2108 void 2109 aic_print_acb(acb) 2110 struct aic_acb *acb; 2111 { 2112 2113 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 2114 printf(" dp=%p dleft=%d target_stat=%x\n", 2115 acb->data_addr, acb->data_length, acb->target_stat); 2116 aic_show_scsi_cmd(acb); 2117 } 2118 2119 void 2120 aic_print_active_acb() 2121 { 2122 extern struct cfdriver aic_cd; 2123 struct aic_acb *acb; 2124 struct aic_softc *sc = aic_cd.cd_devs[0]; 2125 2126 printf("ready list:\n"); 2127 for (acb = sc->ready_list.tqh_first; acb != NULL; 2128 acb = acb->chain.tqe_next) 2129 aic_print_acb(acb); 2130 printf("nexus:\n"); 2131 if (sc->sc_nexus != NULL) 2132 aic_print_acb(sc->sc_nexus); 2133 printf("nexus list:\n"); 2134 for (acb = sc->nexus_list.tqh_first; acb != NULL; 2135 acb = acb->chain.tqe_next) 2136 aic_print_acb(acb); 2137 } 2138 2139 void 2140 aic_dump6360(sc) 2141 struct aic_softc *sc; 2142 { 2143 bus_space_tag_t iot = sc->sc_iot; 2144 bus_space_handle_t ioh = sc->sc_ioh; 2145 2146 printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIG=%x\n", 2147 bus_space_read_1(iot, ioh, SCSISEQ), 2148 bus_space_read_1(iot, ioh, SXFRCTL0), 2149 bus_space_read_1(iot, ioh, SXFRCTL1), 2150 bus_space_read_1(iot, ioh, SCSISIG)); 2151 printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n", 2152 bus_space_read_1(iot, ioh, SSTAT0), 2153 bus_space_read_1(iot, ioh, SSTAT1), 2154 bus_space_read_1(iot, ioh, SSTAT2), 2155 bus_space_read_1(iot, ioh, SSTAT3), 2156 bus_space_read_1(iot, ioh, SSTAT4)); 2157 printf(" SIMODE0=%x SIMODE1=%x DMACNTRL0=%x DMACNTRL1=%x " 2158 "DMASTAT=%x\n", 2159 bus_space_read_1(iot, ioh, SIMODE0), 2160 bus_space_read_1(iot, ioh, SIMODE1), 2161 bus_space_read_1(iot, ioh, DMACNTRL0), 2162 bus_space_read_1(iot, ioh, DMACNTRL1), 2163 bus_space_read_1(iot, ioh, DMASTAT)); 2164 printf(" FIFOSTAT=%d SCSIBUS=0x%x\n", 2165 bus_space_read_1(iot, ioh, FIFOSTAT), 2166 bus_space_read_1(iot, ioh, SCSIBUS)); 2167 } 2168 2169 void 2170 aic_dump_driver(sc) 2171 struct aic_softc *sc; 2172 { 2173 struct aic_tinfo *ti; 2174 int i; 2175 2176 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2177 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x " 2178 "currmsg=%x\n", 2179 sc->sc_state, sc->sc_imess[0], 2180 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2181 for (i = 0; i < 7; i++) { 2182 ti = &sc->sc_tinfo[i]; 2183 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2184 i, ti->cmds, ti->dconns, ti->touts); 2185 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2186 } 2187 } 2188 #endif 2189
Indexes created Sat Oct 25 10:09:55 GMT 2025