aic7xxx_osm.c revision 1.29 1 1.29 rjs /* $NetBSD: aic7xxx_osm.c,v 1.29 2009/05/07 13:06:11 rjs Exp $ */
2 1.2 fvdl
3 1.1 fvdl /*
4 1.1 fvdl * Bus independent FreeBSD shim for the aic7xxx based adaptec SCSI controllers
5 1.1 fvdl *
6 1.1 fvdl * Copyright (c) 1994-2001 Justin T. Gibbs.
7 1.1 fvdl * All rights reserved.
8 1.1 fvdl *
9 1.1 fvdl * Redistribution and use in source and binary forms, with or without
10 1.1 fvdl * modification, are permitted provided that the following conditions
11 1.1 fvdl * are met:
12 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
13 1.1 fvdl * notice, this list of conditions, and the following disclaimer,
14 1.1 fvdl * without modification.
15 1.1 fvdl * 2. The name of the author may not be used to endorse or promote products
16 1.1 fvdl * derived from this software without specific prior written permission.
17 1.1 fvdl *
18 1.1 fvdl * Alternatively, this software may be distributed under the terms of the
19 1.1 fvdl * GNU Public License ("GPL").
20 1.1 fvdl *
21 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 1.1 fvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 1.1 fvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 1.1 fvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 1.1 fvdl * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 1.1 fvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 1.1 fvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 1.1 fvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 1.1 fvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 1.1 fvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 1.1 fvdl * SUCH DAMAGE.
32 1.1 fvdl *
33 1.1 fvdl * //depot/aic7xxx/freebsd/dev/aic7xxx/aic7xxx_osm.c#12 $
34 1.1 fvdl *
35 1.1 fvdl * $FreeBSD: src/sys/dev/aic7xxx/aic7xxx_osm.c,v 1.31 2002/11/30 19:08:58 scottl Exp $
36 1.1 fvdl */
37 1.1 fvdl /*
38 1.1 fvdl * Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. - April 2003
39 1.1 fvdl */
40 1.10 lukem
41 1.10 lukem #include <sys/cdefs.h>
42 1.29 rjs __KERNEL_RCSID(0, "$NetBSD: aic7xxx_osm.c,v 1.29 2009/05/07 13:06:11 rjs Exp $");
43 1.10 lukem
44 1.1 fvdl #include <dev/ic/aic7xxx_osm.h>
45 1.1 fvdl #include <dev/ic/aic7xxx_inline.h>
46 1.1 fvdl
47 1.1 fvdl #ifndef AHC_TMODE_ENABLE
48 1.1 fvdl #define AHC_TMODE_ENABLE 0
49 1.1 fvdl #endif
50 1.1 fvdl
51 1.1 fvdl
52 1.1 fvdl static void ahc_action(struct scsipi_channel *chan, scsipi_adapter_req_t req, void *arg);
53 1.1 fvdl static void ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments);
54 1.1 fvdl static int ahc_poll(struct ahc_softc *ahc, int wait);
55 1.1 fvdl static void ahc_setup_data(struct ahc_softc *ahc,
56 1.1 fvdl struct scsipi_xfer *xs, struct scb *scb);
57 1.1 fvdl static void ahc_set_recoveryscb(struct ahc_softc *ahc, struct scb *scb);
58 1.21 tsutsui static int ahc_ioctl(struct scsipi_channel *channel, u_long cmd,
59 1.25 christos void *addr, int flag, struct proc *p);
60 1.1 fvdl
61 1.1 fvdl
62 1.1 fvdl
63 1.1 fvdl /*
64 1.1 fvdl * Attach all the sub-devices we can find
65 1.1 fvdl */
66 1.1 fvdl int
67 1.1 fvdl ahc_attach(struct ahc_softc *ahc)
68 1.1 fvdl {
69 1.1 fvdl u_long s;
70 1.1 fvdl int i;
71 1.1 fvdl char ahc_info[256];
72 1.1 fvdl
73 1.1 fvdl LIST_INIT(&ahc->pending_scbs);
74 1.1 fvdl for (i = 0; i < AHC_NUM_TARGETS; i++)
75 1.1 fvdl TAILQ_INIT(&ahc->untagged_queues[i]);
76 1.1 fvdl
77 1.21 tsutsui ahc_lock(ahc, &s);
78 1.1 fvdl
79 1.28 cegger ahc->sc_adapter.adapt_dev = ahc->sc_dev;
80 1.1 fvdl ahc->sc_adapter.adapt_nchannels = (ahc->features & AHC_TWIN) ? 2 : 1;
81 1.16 perry
82 1.19 bouyer ahc->sc_adapter.adapt_openings = ahc->scb_data->numscbs - 1;
83 1.1 fvdl ahc->sc_adapter.adapt_max_periph = 16;
84 1.1 fvdl
85 1.1 fvdl ahc->sc_adapter.adapt_ioctl = ahc_ioctl;
86 1.1 fvdl ahc->sc_adapter.adapt_minphys = ahc_minphys;
87 1.1 fvdl ahc->sc_adapter.adapt_request = ahc_action;
88 1.1 fvdl
89 1.1 fvdl ahc->sc_channel.chan_adapter = &ahc->sc_adapter;
90 1.21 tsutsui ahc->sc_channel.chan_bustype = &scsi_bustype;
91 1.21 tsutsui ahc->sc_channel.chan_channel = 0;
92 1.21 tsutsui ahc->sc_channel.chan_ntargets = (ahc->features & AHC_WIDE) ? 16 : 8;
93 1.21 tsutsui ahc->sc_channel.chan_nluns = 8 /*AHC_NUM_LUNS*/;
94 1.21 tsutsui ahc->sc_channel.chan_id = ahc->our_id;
95 1.19 bouyer ahc->sc_channel.chan_flags |= SCSIPI_CHAN_CANGROW;
96 1.1 fvdl
97 1.1 fvdl if (ahc->features & AHC_TWIN) {
98 1.1 fvdl ahc->sc_channel_b = ahc->sc_channel;
99 1.1 fvdl ahc->sc_channel_b.chan_id = ahc->our_id_b;
100 1.1 fvdl ahc->sc_channel_b.chan_channel = 1;
101 1.1 fvdl }
102 1.1 fvdl
103 1.15 itojun ahc_controller_info(ahc, ahc_info, sizeof(ahc_info));
104 1.28 cegger printf("%s: %s\n", device_xname(ahc->sc_dev), ahc_info);
105 1.1 fvdl
106 1.1 fvdl if ((ahc->flags & AHC_PRIMARY_CHANNEL) == 0) {
107 1.28 cegger ahc->sc_child = config_found(ahc->sc_dev,
108 1.1 fvdl &ahc->sc_channel, scsiprint);
109 1.1 fvdl if (ahc->features & AHC_TWIN)
110 1.28 cegger ahc->sc_child_b = config_found(ahc->sc_dev,
111 1.1 fvdl &ahc->sc_channel_b, scsiprint);
112 1.1 fvdl } else {
113 1.8 fvdl if (ahc->features & AHC_TWIN)
114 1.28 cegger ahc->sc_child = config_found(ahc->sc_dev,
115 1.8 fvdl &ahc->sc_channel_b, scsiprint);
116 1.28 cegger ahc->sc_child_b = config_found(ahc->sc_dev,
117 1.1 fvdl &ahc->sc_channel, scsiprint);
118 1.1 fvdl }
119 1.1 fvdl
120 1.1 fvdl ahc_intr_enable(ahc, TRUE);
121 1.1 fvdl
122 1.7 fvdl if (ahc->flags & AHC_RESET_BUS_A)
123 1.7 fvdl ahc_reset_channel(ahc, 'A', TRUE);
124 1.7 fvdl if ((ahc->features & AHC_TWIN) && ahc->flags & AHC_RESET_BUS_B)
125 1.7 fvdl ahc_reset_channel(ahc, 'B', TRUE);
126 1.7 fvdl
127 1.1 fvdl ahc_unlock(ahc, &s);
128 1.1 fvdl return (1);
129 1.1 fvdl }
130 1.1 fvdl
131 1.1 fvdl /*
132 1.1 fvdl * Catch an interrupt from the adapter
133 1.1 fvdl */
134 1.1 fvdl void
135 1.1 fvdl ahc_platform_intr(void *arg)
136 1.1 fvdl {
137 1.1 fvdl struct ahc_softc *ahc;
138 1.1 fvdl
139 1.16 perry ahc = (struct ahc_softc *)arg;
140 1.1 fvdl ahc_intr(ahc);
141 1.1 fvdl }
142 1.1 fvdl
143 1.1 fvdl /*
144 1.1 fvdl * We have an scb which has been processed by the
145 1.1 fvdl * adaptor, now we look to see how the operation
146 1.1 fvdl * went.
147 1.1 fvdl */
148 1.1 fvdl void
149 1.1 fvdl ahc_done(struct ahc_softc *ahc, struct scb *scb)
150 1.1 fvdl {
151 1.1 fvdl struct scsipi_xfer *xs;
152 1.21 tsutsui struct scsipi_periph *periph;
153 1.1 fvdl u_long s;
154 1.1 fvdl
155 1.1 fvdl xs = scb->xs;
156 1.1 fvdl periph = xs->xs_periph;
157 1.1 fvdl LIST_REMOVE(scb, pending_links);
158 1.1 fvdl if ((scb->flags & SCB_UNTAGGEDQ) != 0) {
159 1.1 fvdl struct scb_tailq *untagged_q;
160 1.1 fvdl int target_offset;
161 1.1 fvdl
162 1.1 fvdl target_offset = SCB_GET_TARGET_OFFSET(ahc, scb);
163 1.1 fvdl untagged_q = &ahc->untagged_queues[target_offset];
164 1.1 fvdl TAILQ_REMOVE(untagged_q, scb, links.tqe);
165 1.1 fvdl scb->flags &= ~SCB_UNTAGGEDQ;
166 1.1 fvdl ahc_run_untagged_queue(ahc, untagged_q);
167 1.1 fvdl }
168 1.1 fvdl
169 1.1 fvdl callout_stop(&scb->xs->xs_callout);
170 1.1 fvdl
171 1.1 fvdl if (xs->datalen) {
172 1.1 fvdl int op;
173 1.1 fvdl
174 1.1 fvdl if (xs->xs_control & XS_CTL_DATA_IN)
175 1.1 fvdl op = BUS_DMASYNC_POSTREAD;
176 1.1 fvdl else
177 1.1 fvdl op = BUS_DMASYNC_POSTWRITE;
178 1.1 fvdl bus_dmamap_sync(ahc->parent_dmat, scb->dmamap, 0,
179 1.1 fvdl scb->dmamap->dm_mapsize, op);
180 1.1 fvdl bus_dmamap_unload(ahc->parent_dmat, scb->dmamap);
181 1.1 fvdl }
182 1.1 fvdl
183 1.1 fvdl /*
184 1.1 fvdl * If the recovery SCB completes, we have to be
185 1.1 fvdl * out of our timeout.
186 1.1 fvdl */
187 1.1 fvdl if ((scb->flags & SCB_RECOVERY_SCB) != 0) {
188 1.1 fvdl struct scb *list_scb;
189 1.1 fvdl
190 1.1 fvdl /*
191 1.1 fvdl * We were able to complete the command successfully,
192 1.1 fvdl * so reinstate the timeouts for all other pending
193 1.1 fvdl * commands.
194 1.1 fvdl */
195 1.1 fvdl LIST_FOREACH(list_scb, &ahc->pending_scbs, pending_links) {
196 1.17 christos if (!(list_scb->xs->xs_control & XS_CTL_POLL)) {
197 1.1 fvdl callout_reset(&list_scb->xs->xs_callout,
198 1.1 fvdl (list_scb->xs->timeout > 1000000) ?
199 1.16 perry (list_scb->xs->timeout / 1000) * hz :
200 1.1 fvdl (list_scb->xs->timeout * hz) / 1000,
201 1.1 fvdl ahc_timeout, list_scb);
202 1.1 fvdl }
203 1.1 fvdl }
204 1.1 fvdl
205 1.1 fvdl if (ahc_get_transaction_status(scb) == CAM_BDR_SENT
206 1.1 fvdl || ahc_get_transaction_status(scb) == CAM_REQ_ABORTED)
207 1.1 fvdl ahc_set_transaction_status(scb, CAM_CMD_TIMEOUT);
208 1.1 fvdl scsipi_printaddr(xs->xs_periph);
209 1.16 perry printf("%s: no longer in timeout, status = %x\n",
210 1.1 fvdl ahc_name(ahc), xs->status);
211 1.1 fvdl }
212 1.1 fvdl
213 1.1 fvdl /* Don't clobber any existing error state */
214 1.1 fvdl if (xs->error != XS_NOERROR) {
215 1.1 fvdl /* Don't clobber any existing error state */
216 1.1 fvdl } else if ((scb->flags & SCB_SENSE) != 0) {
217 1.1 fvdl /*
218 1.1 fvdl * We performed autosense retrieval.
219 1.1 fvdl *
220 1.1 fvdl * Zero any sense not transferred by the
221 1.1 fvdl * device. The SCSI spec mandates that any
222 1.14 wiz * untransferred data should be assumed to be
223 1.1 fvdl * zero. Complete the 'bounce' of sense information
224 1.1 fvdl * through buffers accessible via bus-space by
225 1.1 fvdl * copying it into the clients csio.
226 1.1 fvdl */
227 1.1 fvdl memset(&xs->sense.scsi_sense, 0, sizeof(xs->sense.scsi_sense));
228 1.1 fvdl memcpy(&xs->sense.scsi_sense,
229 1.1 fvdl ahc_get_sense_buf(ahc, scb),
230 1.1 fvdl sizeof(xs->sense.scsi_sense));
231 1.1 fvdl xs->error = XS_SENSE;
232 1.1 fvdl }
233 1.1 fvdl if (scb->flags & SCB_FREEZE_QUEUE) {
234 1.1 fvdl scsipi_periph_thaw(periph, 1);
235 1.1 fvdl scb->flags &= ~SCB_FREEZE_QUEUE;
236 1.1 fvdl }
237 1.1 fvdl
238 1.21 tsutsui ahc_lock(ahc, &s);
239 1.1 fvdl ahc_free_scb(ahc, scb);
240 1.21 tsutsui ahc_unlock(ahc, &s);
241 1.1 fvdl
242 1.1 fvdl scsipi_done(xs);
243 1.1 fvdl }
244 1.1 fvdl
245 1.1 fvdl static int
246 1.25 christos ahc_ioctl(struct scsipi_channel *channel, u_long cmd, void *addr,
247 1.24 christos int flag, struct proc *p)
248 1.1 fvdl {
249 1.29 rjs struct ahc_softc *ahc = device_private(channel->chan_adapter->adapt_dev);
250 1.1 fvdl int s, ret = ENOTTY;
251 1.1 fvdl
252 1.1 fvdl switch (cmd) {
253 1.1 fvdl case SCBUSIORESET:
254 1.1 fvdl s = splbio();
255 1.5 fvdl ahc_reset_channel(ahc, channel->chan_channel == 1 ? 'B' : 'A',
256 1.5 fvdl TRUE);
257 1.1 fvdl splx(s);
258 1.1 fvdl ret = 0;
259 1.1 fvdl break;
260 1.1 fvdl default:
261 1.1 fvdl break;
262 1.1 fvdl }
263 1.1 fvdl
264 1.1 fvdl return ret;
265 1.1 fvdl }
266 1.1 fvdl
267 1.1 fvdl static void
268 1.1 fvdl ahc_action(struct scsipi_channel *chan, scsipi_adapter_req_t req, void *arg)
269 1.1 fvdl {
270 1.1 fvdl struct ahc_softc *ahc;
271 1.1 fvdl int s;
272 1.1 fvdl struct ahc_initiator_tinfo *tinfo;
273 1.1 fvdl struct ahc_tmode_tstate *tstate;
274 1.1 fvdl
275 1.29 rjs ahc = device_private(chan->chan_adapter->adapt_dev);
276 1.4 fvdl
277 1.1 fvdl switch (req) {
278 1.1 fvdl
279 1.1 fvdl case ADAPTER_REQ_RUN_XFER:
280 1.1 fvdl {
281 1.1 fvdl struct scsipi_xfer *xs;
282 1.1 fvdl struct scsipi_periph *periph;
283 1.21 tsutsui struct scb *scb;
284 1.21 tsutsui struct hardware_scb *hscb;
285 1.1 fvdl u_int target_id;
286 1.1 fvdl u_int our_id;
287 1.17 christos u_long ss;
288 1.1 fvdl
289 1.1 fvdl xs = arg;
290 1.1 fvdl periph = xs->xs_periph;
291 1.1 fvdl
292 1.1 fvdl target_id = periph->periph_target;
293 1.21 tsutsui our_id = ahc->our_id;
294 1.1 fvdl
295 1.1 fvdl SC_DEBUG(xs->xs_periph, SCSIPI_DB3, ("ahc_action\n"));
296 1.1 fvdl
297 1.1 fvdl /*
298 1.1 fvdl * get an scb to use.
299 1.1 fvdl */
300 1.17 christos ahc_lock(ahc, &ss);
301 1.16 perry if ((scb = ahc_get_scb(ahc)) == NULL) {
302 1.1 fvdl xs->error = XS_RESOURCE_SHORTAGE;
303 1.17 christos ahc_unlock(ahc, &ss);
304 1.1 fvdl scsipi_done(xs);
305 1.1 fvdl return;
306 1.1 fvdl }
307 1.17 christos ahc_unlock(ahc, &ss);
308 1.16 perry
309 1.1 fvdl hscb = scb->hscb;
310 1.16 perry
311 1.1 fvdl SC_DEBUG(periph, SCSIPI_DB3, ("start scb(%p)\n", scb));
312 1.1 fvdl scb->xs = xs;
313 1.1 fvdl
314 1.1 fvdl /*
315 1.1 fvdl * Put all the arguments for the xfer in the scb
316 1.1 fvdl */
317 1.1 fvdl hscb->control = 0;
318 1.1 fvdl hscb->scsiid = BUILD_SCSIID(ahc, 0, target_id, our_id);
319 1.1 fvdl hscb->lun = periph->periph_lun;
320 1.1 fvdl if (xs->xs_control & XS_CTL_RESET) {
321 1.1 fvdl hscb->cdb_len = 0;
322 1.1 fvdl scb->flags |= SCB_DEVICE_RESET;
323 1.1 fvdl hscb->control |= MK_MESSAGE;
324 1.1 fvdl ahc_execute_scb(scb, NULL, 0);
325 1.1 fvdl }
326 1.16 perry
327 1.1 fvdl ahc_setup_data(ahc, xs, scb);
328 1.1 fvdl
329 1.1 fvdl break;
330 1.1 fvdl }
331 1.1 fvdl case ADAPTER_REQ_GROW_RESOURCES:
332 1.20 bouyer #ifdef AHC_DEBUG
333 1.19 bouyer printf("%s: ADAPTER_REQ_GROW_RESOURCES\n", ahc_name(ahc));
334 1.20 bouyer #endif
335 1.21 tsutsui chan->chan_adapter->adapt_openings += ahc_alloc_scbs(ahc);
336 1.19 bouyer if (ahc->scb_data->numscbs >= AHC_SCB_MAX_ALLOC)
337 1.19 bouyer chan->chan_flags &= ~SCSIPI_CHAN_CANGROW;
338 1.1 fvdl return;
339 1.1 fvdl
340 1.1 fvdl case ADAPTER_REQ_SET_XFER_MODE:
341 1.1 fvdl {
342 1.1 fvdl struct scsipi_xfer_mode *xm = arg;
343 1.1 fvdl struct ahc_devinfo devinfo;
344 1.1 fvdl int target_id, our_id, first;
345 1.1 fvdl u_int width;
346 1.1 fvdl char channel;
347 1.22 bouyer u_int ppr_options = 0, period, offset;
348 1.11 fvdl struct ahc_syncrate *syncrate;
349 1.11 fvdl uint16_t old_autoneg;
350 1.1 fvdl
351 1.16 perry target_id = xm->xm_target;
352 1.1 fvdl our_id = chan->chan_id;
353 1.1 fvdl channel = (chan->chan_channel == 1) ? 'B' : 'A';
354 1.1 fvdl s = splbio();
355 1.1 fvdl tinfo = ahc_fetch_transinfo(ahc, channel, our_id, target_id,
356 1.1 fvdl &tstate);
357 1.1 fvdl ahc_compile_devinfo(&devinfo, our_id, target_id,
358 1.1 fvdl 0, channel, ROLE_INITIATOR);
359 1.1 fvdl
360 1.11 fvdl old_autoneg = tstate->auto_negotiate;
361 1.11 fvdl
362 1.1 fvdl /*
363 1.1 fvdl * XXX since the period and offset are not provided here,
364 1.1 fvdl * fake things by forcing a renegotiation using the user
365 1.1 fvdl * settings if this is called for the first time (i.e.
366 1.1 fvdl * during probe). Also, cap various values at the user
367 1.1 fvdl * values, assuming that the user set it up that way.
368 1.1 fvdl */
369 1.1 fvdl if (ahc->inited_target[target_id] == 0) {
370 1.11 fvdl period = tinfo->user.period;
371 1.11 fvdl offset = tinfo->user.offset;
372 1.11 fvdl ppr_options = tinfo->user.ppr_options;
373 1.11 fvdl width = tinfo->user.width;
374 1.1 fvdl tstate->tagenable |=
375 1.1 fvdl (ahc->user_tagenable & devinfo.target_mask);
376 1.1 fvdl tstate->discenable |=
377 1.1 fvdl (ahc->user_discenable & devinfo.target_mask);
378 1.1 fvdl ahc->inited_target[target_id] = 1;
379 1.1 fvdl first = 1;
380 1.1 fvdl } else
381 1.1 fvdl first = 0;
382 1.1 fvdl
383 1.6 fvdl if (xm->xm_mode & (PERIPH_CAP_WIDE16 | PERIPH_CAP_DT))
384 1.1 fvdl width = MSG_EXT_WDTR_BUS_16_BIT;
385 1.1 fvdl else
386 1.1 fvdl width = MSG_EXT_WDTR_BUS_8_BIT;
387 1.1 fvdl
388 1.1 fvdl ahc_validate_width(ahc, NULL, &width, ROLE_UNKNOWN);
389 1.1 fvdl if (width > tinfo->user.width)
390 1.1 fvdl width = tinfo->user.width;
391 1.11 fvdl ahc_set_width(ahc, &devinfo, width, AHC_TRANS_GOAL, FALSE);
392 1.1 fvdl
393 1.6 fvdl if (!(xm->xm_mode & (PERIPH_CAP_SYNC | PERIPH_CAP_DT))) {
394 1.11 fvdl period = 0;
395 1.11 fvdl offset = 0;
396 1.11 fvdl ppr_options = 0;
397 1.1 fvdl }
398 1.1 fvdl
399 1.1 fvdl if ((xm->xm_mode & PERIPH_CAP_DT) &&
400 1.11 fvdl (ppr_options & MSG_EXT_PPR_DT_REQ))
401 1.11 fvdl ppr_options |= MSG_EXT_PPR_DT_REQ;
402 1.1 fvdl else
403 1.11 fvdl ppr_options &= ~MSG_EXT_PPR_DT_REQ;
404 1.11 fvdl if ((tstate->discenable & devinfo.target_mask) == 0 ||
405 1.11 fvdl (tstate->tagenable & devinfo.target_mask) == 0)
406 1.11 fvdl ppr_options &= ~MSG_EXT_PPR_IU_REQ;
407 1.1 fvdl
408 1.1 fvdl if ((xm->xm_mode & PERIPH_CAP_TQING) &&
409 1.1 fvdl (ahc->user_tagenable & devinfo.target_mask))
410 1.1 fvdl tstate->tagenable |= devinfo.target_mask;
411 1.1 fvdl else
412 1.1 fvdl tstate->tagenable &= ~devinfo.target_mask;
413 1.1 fvdl
414 1.11 fvdl syncrate = ahc_find_syncrate(ahc, &period, &ppr_options,
415 1.11 fvdl AHC_SYNCRATE_MAX);
416 1.11 fvdl ahc_validate_offset(ahc, NULL, syncrate, &offset,
417 1.11 fvdl width, ROLE_UNKNOWN);
418 1.11 fvdl
419 1.11 fvdl if (offset == 0) {
420 1.11 fvdl period = 0;
421 1.11 fvdl ppr_options = 0;
422 1.11 fvdl }
423 1.11 fvdl
424 1.11 fvdl if (ppr_options != 0
425 1.11 fvdl && tinfo->user.transport_version >= 3) {
426 1.11 fvdl tinfo->goal.transport_version =
427 1.11 fvdl tinfo->user.transport_version;
428 1.11 fvdl tinfo->curr.transport_version =
429 1.11 fvdl tinfo->user.transport_version;
430 1.11 fvdl }
431 1.11 fvdl
432 1.11 fvdl ahc_set_syncrate(ahc, &devinfo, syncrate, period, offset,
433 1.11 fvdl ppr_options, AHC_TRANS_GOAL, FALSE);
434 1.11 fvdl
435 1.1 fvdl /*
436 1.1 fvdl * If this is the first request, and no negotiation is
437 1.1 fvdl * needed, just confirm the state to the scsipi layer,
438 1.1 fvdl * so that it can print a message.
439 1.1 fvdl */
440 1.11 fvdl if (old_autoneg == tstate->auto_negotiate && first) {
441 1.9 bouyer xm->xm_mode = 0;
442 1.9 bouyer xm->xm_period = tinfo->curr.period;
443 1.9 bouyer xm->xm_offset = tinfo->curr.offset;
444 1.9 bouyer if (tinfo->curr.width == MSG_EXT_WDTR_BUS_16_BIT)
445 1.9 bouyer xm->xm_mode |= PERIPH_CAP_WIDE16;
446 1.9 bouyer if (tinfo->curr.period)
447 1.9 bouyer xm->xm_mode |= PERIPH_CAP_SYNC;
448 1.9 bouyer if (tstate->tagenable & devinfo.target_mask)
449 1.9 bouyer xm->xm_mode |= PERIPH_CAP_TQING;
450 1.9 bouyer if (tinfo->curr.ppr_options & MSG_EXT_PPR_DT_REQ)
451 1.9 bouyer xm->xm_mode |= PERIPH_CAP_DT;
452 1.1 fvdl scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm);
453 1.9 bouyer }
454 1.1 fvdl splx(s);
455 1.1 fvdl }
456 1.1 fvdl }
457 1.1 fvdl
458 1.1 fvdl return;
459 1.1 fvdl }
460 1.1 fvdl
461 1.1 fvdl static void
462 1.1 fvdl ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments)
463 1.1 fvdl {
464 1.1 fvdl struct scb *scb;
465 1.1 fvdl struct scsipi_xfer *xs;
466 1.1 fvdl struct ahc_softc *ahc;
467 1.1 fvdl struct ahc_initiator_tinfo *tinfo;
468 1.1 fvdl struct ahc_tmode_tstate *tstate;
469 1.1 fvdl
470 1.1 fvdl u_int mask;
471 1.1 fvdl long s;
472 1.1 fvdl
473 1.1 fvdl scb = (struct scb *)arg;
474 1.1 fvdl xs = scb->xs;
475 1.1 fvdl xs->error = 0;
476 1.1 fvdl xs->status = 0;
477 1.1 fvdl xs->xs_status = 0;
478 1.29 rjs ahc = device_private(xs->xs_periph->periph_channel->chan_adapter->adapt_dev);
479 1.1 fvdl
480 1.1 fvdl if (nsegments != 0) {
481 1.21 tsutsui struct ahc_dma_seg *sg;
482 1.1 fvdl bus_dma_segment_t *end_seg;
483 1.1 fvdl int op;
484 1.16 perry
485 1.1 fvdl end_seg = dm_segs + nsegments;
486 1.1 fvdl
487 1.1 fvdl /* Copy the segments into our SG list */
488 1.1 fvdl sg = scb->sg_list;
489 1.1 fvdl while (dm_segs < end_seg) {
490 1.1 fvdl uint32_t len;
491 1.1 fvdl
492 1.1 fvdl sg->addr = ahc_htole32(dm_segs->ds_addr);
493 1.1 fvdl len = dm_segs->ds_len
494 1.18 tsutsui | ((dm_segs->ds_addr >> 8) & AHC_SG_HIGH_ADDR_MASK);
495 1.1 fvdl sg->len = ahc_htole32(len);
496 1.1 fvdl sg++;
497 1.1 fvdl dm_segs++;
498 1.1 fvdl }
499 1.1 fvdl
500 1.1 fvdl /*
501 1.1 fvdl * Note where to find the SG entries in bus space.
502 1.16 perry * We also set the full residual flag which the
503 1.1 fvdl * sequencer will clear as soon as a data transfer
504 1.1 fvdl * occurs.
505 1.1 fvdl */
506 1.1 fvdl scb->hscb->sgptr = ahc_htole32(scb->sg_list_phys|SG_FULL_RESID);
507 1.1 fvdl
508 1.1 fvdl if (xs->xs_control & XS_CTL_DATA_IN)
509 1.1 fvdl op = BUS_DMASYNC_PREREAD;
510 1.1 fvdl else
511 1.1 fvdl op = BUS_DMASYNC_PREWRITE;
512 1.1 fvdl
513 1.1 fvdl bus_dmamap_sync(ahc->parent_dmat, scb->dmamap, 0,
514 1.1 fvdl scb->dmamap->dm_mapsize, op);
515 1.1 fvdl
516 1.1 fvdl sg--;
517 1.1 fvdl sg->len |= ahc_htole32(AHC_DMA_LAST_SEG);
518 1.16 perry
519 1.1 fvdl /* Copy the first SG into the "current" data pointer area */
520 1.1 fvdl scb->hscb->dataptr = scb->sg_list->addr;
521 1.1 fvdl scb->hscb->datacnt = scb->sg_list->len;
522 1.1 fvdl } else {
523 1.1 fvdl scb->hscb->sgptr = ahc_htole32(SG_LIST_NULL);
524 1.1 fvdl scb->hscb->dataptr = 0;
525 1.1 fvdl scb->hscb->datacnt = 0;
526 1.1 fvdl }
527 1.1 fvdl
528 1.1 fvdl scb->sg_count = nsegments;
529 1.1 fvdl
530 1.1 fvdl ahc_lock(ahc, &s);
531 1.1 fvdl
532 1.1 fvdl /*
533 1.1 fvdl * Last time we need to check if this SCB needs to
534 1.1 fvdl * be aborted.
535 1.1 fvdl */
536 1.1 fvdl if (xs->xs_status & XS_STS_DONE) {
537 1.1 fvdl if (nsegments != 0)
538 1.1 fvdl bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
539 1.1 fvdl ahc_free_scb(ahc, scb);
540 1.1 fvdl ahc_unlock(ahc, &s);
541 1.1 fvdl scsipi_done(xs);
542 1.1 fvdl return;
543 1.1 fvdl }
544 1.1 fvdl
545 1.1 fvdl tinfo = ahc_fetch_transinfo(ahc, ahc->channel,
546 1.1 fvdl SCSIID_OUR_ID(scb->hscb->scsiid),
547 1.1 fvdl SCSIID_TARGET(ahc, scb->hscb->scsiid),
548 1.1 fvdl &tstate);
549 1.1 fvdl
550 1.1 fvdl mask = SCB_GET_TARGET_MASK(ahc, scb);
551 1.1 fvdl scb->hscb->scsirate = tinfo->scsirate;
552 1.1 fvdl scb->hscb->scsioffset = tinfo->curr.offset;
553 1.1 fvdl
554 1.1 fvdl if ((tstate->ultraenb & mask) != 0)
555 1.1 fvdl scb->hscb->control |= ULTRAENB;
556 1.1 fvdl
557 1.1 fvdl if ((tstate->discenable & mask) != 0)
558 1.21 tsutsui scb->hscb->control |= DISCENB;
559 1.1 fvdl
560 1.1 fvdl if (xs->xs_tag_type)
561 1.1 fvdl scb->hscb->control |= xs->xs_tag_type;
562 1.1 fvdl
563 1.12 fvdl #if 1 /* This looks like it makes sense at first, but it can loop */
564 1.1 fvdl if ((xs->xs_control & XS_CTL_DISCOVERY) && (tinfo->goal.width == 0
565 1.1 fvdl && tinfo->goal.offset == 0
566 1.1 fvdl && tinfo->goal.ppr_options == 0)) {
567 1.1 fvdl scb->flags |= SCB_NEGOTIATE;
568 1.16 perry scb->hscb->control |= MK_MESSAGE;
569 1.11 fvdl } else
570 1.11 fvdl #endif
571 1.11 fvdl if ((tstate->auto_negotiate & mask) != 0) {
572 1.1 fvdl scb->flags |= SCB_AUTO_NEGOTIATE;
573 1.1 fvdl scb->hscb->control |= MK_MESSAGE;
574 1.1 fvdl }
575 1.1 fvdl
576 1.1 fvdl LIST_INSERT_HEAD(&ahc->pending_scbs, scb, pending_links);
577 1.1 fvdl
578 1.1 fvdl if (!(xs->xs_control & XS_CTL_POLL)) {
579 1.1 fvdl callout_reset(&scb->xs->xs_callout, xs->timeout > 1000000 ?
580 1.1 fvdl (xs->timeout / 1000) * hz : (xs->timeout * hz) / 1000,
581 1.1 fvdl ahc_timeout, scb);
582 1.1 fvdl }
583 1.1 fvdl
584 1.1 fvdl /*
585 1.1 fvdl * We only allow one untagged transaction
586 1.1 fvdl * per target in the initiator role unless
587 1.1 fvdl * we are storing a full busy target *lun*
588 1.1 fvdl * table in SCB space.
589 1.1 fvdl */
590 1.1 fvdl if ((scb->hscb->control & (TARGET_SCB|TAG_ENB)) == 0
591 1.1 fvdl && (ahc->flags & AHC_SCB_BTT) == 0) {
592 1.1 fvdl struct scb_tailq *untagged_q;
593 1.1 fvdl int target_offset;
594 1.1 fvdl
595 1.1 fvdl target_offset = SCB_GET_TARGET_OFFSET(ahc, scb);
596 1.1 fvdl untagged_q = &(ahc->untagged_queues[target_offset]);
597 1.1 fvdl TAILQ_INSERT_TAIL(untagged_q, scb, links.tqe);
598 1.1 fvdl scb->flags |= SCB_UNTAGGEDQ;
599 1.1 fvdl if (TAILQ_FIRST(untagged_q) != scb) {
600 1.1 fvdl ahc_unlock(ahc, &s);
601 1.1 fvdl return;
602 1.1 fvdl }
603 1.1 fvdl }
604 1.1 fvdl scb->flags |= SCB_ACTIVE;
605 1.1 fvdl
606 1.1 fvdl if ((scb->flags & SCB_TARGET_IMMEDIATE) != 0) {
607 1.1 fvdl /* Define a mapping from our tag to the SCB. */
608 1.1 fvdl ahc->scb_data->scbindex[scb->hscb->tag] = scb;
609 1.1 fvdl ahc_pause(ahc);
610 1.1 fvdl if ((ahc->flags & AHC_PAGESCBS) == 0)
611 1.1 fvdl ahc_outb(ahc, SCBPTR, scb->hscb->tag);
612 1.1 fvdl ahc_outb(ahc, TARG_IMMEDIATE_SCB, scb->hscb->tag);
613 1.1 fvdl ahc_unpause(ahc);
614 1.1 fvdl } else {
615 1.1 fvdl ahc_queue_scb(ahc, scb);
616 1.1 fvdl }
617 1.1 fvdl
618 1.1 fvdl if (!(xs->xs_control & XS_CTL_POLL)) {
619 1.1 fvdl ahc_unlock(ahc, &s);
620 1.1 fvdl return;
621 1.1 fvdl }
622 1.1 fvdl
623 1.1 fvdl /*
624 1.1 fvdl * If we can't use interrupts, poll for completion
625 1.1 fvdl */
626 1.26 macallan
627 1.1 fvdl SC_DEBUG(xs->xs_periph, SCSIPI_DB3, ("cmd_poll\n"));
628 1.1 fvdl do {
629 1.1 fvdl if (ahc_poll(ahc, xs->timeout)) {
630 1.1 fvdl if (!(xs->xs_control & XS_CTL_SILENT))
631 1.1 fvdl printf("cmd fail\n");
632 1.1 fvdl ahc_timeout(scb);
633 1.1 fvdl break;
634 1.1 fvdl }
635 1.1 fvdl } while (!(xs->xs_status & XS_STS_DONE));
636 1.1 fvdl ahc_unlock(ahc, &s);
637 1.1 fvdl
638 1.1 fvdl return;
639 1.1 fvdl }
640 1.1 fvdl
641 1.1 fvdl static int
642 1.1 fvdl ahc_poll(struct ahc_softc *ahc, int wait)
643 1.1 fvdl {
644 1.1 fvdl while (--wait) {
645 1.1 fvdl DELAY(1000);
646 1.1 fvdl if (ahc_inb(ahc, INTSTAT) & INT_PEND)
647 1.1 fvdl break;
648 1.1 fvdl }
649 1.1 fvdl
650 1.1 fvdl if (wait == 0) {
651 1.1 fvdl printf("%s: board is not responding\n", ahc_name(ahc));
652 1.1 fvdl return (EIO);
653 1.1 fvdl }
654 1.1 fvdl
655 1.1 fvdl ahc_intr((void *)ahc);
656 1.1 fvdl return (0);
657 1.1 fvdl }
658 1.1 fvdl
659 1.1 fvdl static void
660 1.1 fvdl ahc_setup_data(struct ahc_softc *ahc, struct scsipi_xfer *xs,
661 1.1 fvdl struct scb *scb)
662 1.1 fvdl {
663 1.1 fvdl struct hardware_scb *hscb;
664 1.16 perry
665 1.1 fvdl hscb = scb->hscb;
666 1.1 fvdl xs->resid = xs->status = 0;
667 1.16 perry
668 1.1 fvdl hscb->cdb_len = xs->cmdlen;
669 1.1 fvdl if (hscb->cdb_len > sizeof(hscb->cdb32)) {
670 1.1 fvdl u_long s;
671 1.1 fvdl
672 1.1 fvdl ahc_set_transaction_status(scb, CAM_REQ_INVALID);
673 1.1 fvdl ahc_lock(ahc, &s);
674 1.1 fvdl ahc_free_scb(ahc, scb);
675 1.1 fvdl ahc_unlock(ahc, &s);
676 1.1 fvdl scsipi_done(xs);
677 1.1 fvdl return;
678 1.1 fvdl }
679 1.1 fvdl
680 1.1 fvdl if (hscb->cdb_len > 12) {
681 1.1 fvdl memcpy(hscb->cdb32, xs->cmd, hscb->cdb_len);
682 1.1 fvdl scb->flags |= SCB_CDB32_PTR;
683 1.1 fvdl } else {
684 1.1 fvdl memcpy(hscb->shared_data.cdb, xs->cmd, hscb->cdb_len);
685 1.1 fvdl }
686 1.16 perry
687 1.1 fvdl /* Only use S/G if there is a transfer */
688 1.1 fvdl if (xs->datalen) {
689 1.1 fvdl int error;
690 1.1 fvdl
691 1.21 tsutsui error = bus_dmamap_load(ahc->parent_dmat,
692 1.1 fvdl scb->dmamap, xs->data,
693 1.1 fvdl xs->datalen, NULL,
694 1.1 fvdl ((xs->xs_control & XS_CTL_NOSLEEP) ?
695 1.1 fvdl BUS_DMA_NOWAIT : BUS_DMA_WAITOK) |
696 1.1 fvdl BUS_DMA_STREAMING |
697 1.1 fvdl ((xs->xs_control & XS_CTL_DATA_IN) ?
698 1.1 fvdl BUS_DMA_READ : BUS_DMA_WRITE));
699 1.21 tsutsui if (error) {
700 1.1 fvdl #ifdef AHC_DEBUG
701 1.21 tsutsui printf("%s: in ahc_setup_data(): bus_dmamap_load() "
702 1.1 fvdl "= %d\n",
703 1.1 fvdl ahc_name(ahc), error);
704 1.1 fvdl #endif
705 1.21 tsutsui xs->error = XS_RESOURCE_SHORTAGE;
706 1.21 tsutsui scsipi_done(xs);
707 1.21 tsutsui return;
708 1.21 tsutsui }
709 1.21 tsutsui ahc_execute_scb(scb,
710 1.1 fvdl scb->dmamap->dm_segs,
711 1.1 fvdl scb->dmamap->dm_nsegs);
712 1.1 fvdl } else {
713 1.1 fvdl ahc_execute_scb(scb, NULL, 0);
714 1.1 fvdl }
715 1.1 fvdl }
716 1.1 fvdl
717 1.1 fvdl static void
718 1.1 fvdl ahc_set_recoveryscb(struct ahc_softc *ahc, struct scb *scb) {
719 1.1 fvdl
720 1.1 fvdl if ((scb->flags & SCB_RECOVERY_SCB) == 0) {
721 1.1 fvdl struct scb *list_scb;
722 1.1 fvdl
723 1.1 fvdl scb->flags |= SCB_RECOVERY_SCB;
724 1.1 fvdl
725 1.1 fvdl /*
726 1.1 fvdl * Take all queued, but not sent SCBs out of the equation.
727 1.1 fvdl * Also ensure that no new CCBs are queued to us while we
728 1.1 fvdl * try to fix this problem.
729 1.1 fvdl */
730 1.1 fvdl scsipi_channel_freeze(&ahc->sc_channel, 1);
731 1.1 fvdl if (ahc->features & AHC_TWIN)
732 1.1 fvdl scsipi_channel_freeze(&ahc->sc_channel_b, 1);
733 1.1 fvdl
734 1.1 fvdl /*
735 1.1 fvdl * Go through all of our pending SCBs and remove
736 1.1 fvdl * any scheduled timeouts for them. We will reschedule
737 1.1 fvdl * them after we've successfully fixed this problem.
738 1.1 fvdl */
739 1.1 fvdl LIST_FOREACH(list_scb, &ahc->pending_scbs, pending_links) {
740 1.1 fvdl callout_stop(&list_scb->xs->xs_callout);
741 1.1 fvdl }
742 1.1 fvdl }
743 1.1 fvdl }
744 1.1 fvdl
745 1.1 fvdl void
746 1.1 fvdl ahc_timeout(void *arg)
747 1.1 fvdl {
748 1.1 fvdl struct scb *scb;
749 1.1 fvdl struct ahc_softc *ahc;
750 1.1 fvdl long s;
751 1.1 fvdl int found;
752 1.1 fvdl u_int last_phase;
753 1.1 fvdl int target;
754 1.1 fvdl int lun;
755 1.1 fvdl int i;
756 1.1 fvdl char channel;
757 1.1 fvdl
758 1.16 perry scb = (struct scb *)arg;
759 1.1 fvdl ahc = (struct ahc_softc *)scb->ahc_softc;
760 1.1 fvdl
761 1.1 fvdl ahc_lock(ahc, &s);
762 1.1 fvdl
763 1.1 fvdl ahc_pause_and_flushwork(ahc);
764 1.1 fvdl
765 1.1 fvdl if ((scb->flags & SCB_ACTIVE) == 0) {
766 1.1 fvdl /* Previous timeout took care of me already */
767 1.1 fvdl printf("%s: Timedout SCB already complete. "
768 1.1 fvdl "Interrupts may not be functioning.\n", ahc_name(ahc));
769 1.1 fvdl ahc_unpause(ahc);
770 1.1 fvdl ahc_unlock(ahc, &s);
771 1.1 fvdl return;
772 1.1 fvdl }
773 1.1 fvdl
774 1.1 fvdl target = SCB_GET_TARGET(ahc, scb);
775 1.1 fvdl channel = SCB_GET_CHANNEL(ahc, scb);
776 1.1 fvdl lun = SCB_GET_LUN(scb);
777 1.1 fvdl
778 1.1 fvdl ahc_print_path(ahc, scb);
779 1.1 fvdl printf("SCB 0x%x - timed out\n", scb->hscb->tag);
780 1.1 fvdl ahc_dump_card_state(ahc);
781 1.1 fvdl last_phase = ahc_inb(ahc, LASTPHASE);
782 1.1 fvdl if (scb->sg_count > 0) {
783 1.1 fvdl for (i = 0; i < scb->sg_count; i++) {
784 1.1 fvdl printf("sg[%d] - Addr 0x%x : Length %d\n",
785 1.1 fvdl i,
786 1.1 fvdl scb->sg_list[i].addr,
787 1.1 fvdl scb->sg_list[i].len & AHC_SG_LEN_MASK);
788 1.1 fvdl }
789 1.1 fvdl }
790 1.1 fvdl if (scb->flags & (SCB_DEVICE_RESET|SCB_ABORT)) {
791 1.1 fvdl /*
792 1.1 fvdl * Been down this road before.
793 1.1 fvdl * Do a full bus reset.
794 1.1 fvdl */
795 1.1 fvdl bus_reset:
796 1.1 fvdl ahc_set_transaction_status(scb, CAM_CMD_TIMEOUT);
797 1.1 fvdl found = ahc_reset_channel(ahc, channel, /*Initiate Reset*/TRUE);
798 1.1 fvdl printf("%s: Issued Channel %c Bus Reset. "
799 1.1 fvdl "%d SCBs aborted\n", ahc_name(ahc), channel, found);
800 1.1 fvdl } else {
801 1.1 fvdl /*
802 1.1 fvdl * If we are a target, transition to bus free and report
803 1.1 fvdl * the timeout.
804 1.16 perry *
805 1.1 fvdl * The target/initiator that is holding up the bus may not
806 1.1 fvdl * be the same as the one that triggered this timeout
807 1.1 fvdl * (different commands have different timeout lengths).
808 1.14 wiz * If the bus is idle and we are acting as the initiator
809 1.1 fvdl * for this request, queue a BDR message to the timed out
810 1.1 fvdl * target. Otherwise, if the timed out transaction is
811 1.1 fvdl * active:
812 1.1 fvdl * Initiator transaction:
813 1.1 fvdl * Stuff the message buffer with a BDR message and assert
814 1.1 fvdl * ATN in the hopes that the target will let go of the bus
815 1.1 fvdl * and go to the mesgout phase. If this fails, we'll
816 1.1 fvdl * get another timeout 2 seconds later which will attempt
817 1.1 fvdl * a bus reset.
818 1.1 fvdl *
819 1.1 fvdl * Target transaction:
820 1.1 fvdl * Transition to BUS FREE and report the error.
821 1.1 fvdl * It's good to be the target!
822 1.1 fvdl */
823 1.1 fvdl u_int active_scb_index;
824 1.1 fvdl u_int saved_scbptr;
825 1.1 fvdl
826 1.1 fvdl saved_scbptr = ahc_inb(ahc, SCBPTR);
827 1.1 fvdl active_scb_index = ahc_inb(ahc, SCB_TAG);
828 1.1 fvdl
829 1.1 fvdl if ((ahc_inb(ahc, SEQ_FLAGS) & NOT_IDENTIFIED) == 0
830 1.1 fvdl && (active_scb_index < ahc->scb_data->numscbs)) {
831 1.1 fvdl struct scb *active_scb;
832 1.1 fvdl
833 1.1 fvdl /*
834 1.1 fvdl * If the active SCB is not us, assume that
835 1.1 fvdl * the active SCB has a longer timeout than
836 1.1 fvdl * the timedout SCB, and wait for the active
837 1.1 fvdl * SCB to timeout.
838 1.16 perry */
839 1.1 fvdl active_scb = ahc_lookup_scb(ahc, active_scb_index);
840 1.1 fvdl if (active_scb != scb) {
841 1.1 fvdl uint64_t newtimeout;
842 1.1 fvdl
843 1.1 fvdl ahc_print_path(ahc, scb);
844 1.1 fvdl printf("Other SCB Timeout%s",
845 1.21 tsutsui (scb->flags & SCB_OTHERTCL_TIMEOUT) != 0
846 1.1 fvdl ? " again\n" : "\n");
847 1.1 fvdl scb->flags |= SCB_OTHERTCL_TIMEOUT;
848 1.1 fvdl newtimeout = MAX(active_scb->xs->timeout,
849 1.1 fvdl scb->xs->timeout);
850 1.1 fvdl callout_reset(&scb->xs->xs_callout,
851 1.1 fvdl newtimeout > 1000000 ?
852 1.1 fvdl (newtimeout / 1000) * hz :
853 1.1 fvdl (newtimeout * hz) / 1000,
854 1.1 fvdl ahc_timeout, scb);
855 1.1 fvdl ahc_unpause(ahc);
856 1.1 fvdl ahc_unlock(ahc, &s);
857 1.1 fvdl return;
858 1.16 perry }
859 1.1 fvdl
860 1.1 fvdl /* It's us */
861 1.1 fvdl if ((scb->flags & SCB_TARGET_SCB) != 0) {
862 1.1 fvdl
863 1.1 fvdl /*
864 1.1 fvdl * Send back any queued up transactions
865 1.1 fvdl * and properly record the error condition.
866 1.1 fvdl */
867 1.1 fvdl ahc_abort_scbs(ahc, SCB_GET_TARGET(ahc, scb),
868 1.1 fvdl SCB_GET_CHANNEL(ahc, scb),
869 1.1 fvdl SCB_GET_LUN(scb),
870 1.1 fvdl scb->hscb->tag,
871 1.1 fvdl ROLE_TARGET,
872 1.1 fvdl CAM_CMD_TIMEOUT);
873 1.1 fvdl
874 1.1 fvdl /* Will clear us from the bus */
875 1.1 fvdl ahc_restart(ahc);
876 1.1 fvdl ahc_unlock(ahc, &s);
877 1.1 fvdl return;
878 1.1 fvdl }
879 1.1 fvdl
880 1.1 fvdl ahc_set_recoveryscb(ahc, active_scb);
881 1.1 fvdl ahc_outb(ahc, MSG_OUT, HOST_MSG);
882 1.1 fvdl ahc_outb(ahc, SCSISIGO, last_phase|ATNO);
883 1.1 fvdl ahc_print_path(ahc, active_scb);
884 1.1 fvdl printf("BDR message in message buffer\n");
885 1.1 fvdl active_scb->flags |= SCB_DEVICE_RESET;
886 1.1 fvdl callout_reset(&active_scb->xs->xs_callout,
887 1.1 fvdl 2 * hz, ahc_timeout, active_scb);
888 1.1 fvdl ahc_unpause(ahc);
889 1.1 fvdl } else {
890 1.21 tsutsui int disconnected;
891 1.1 fvdl
892 1.1 fvdl /* XXX Shouldn't panic. Just punt instead? */
893 1.1 fvdl if ((scb->flags & SCB_TARGET_SCB) != 0)
894 1.1 fvdl panic("Timed-out target SCB but bus idle");
895 1.1 fvdl
896 1.1 fvdl if (last_phase != P_BUSFREE
897 1.1 fvdl && (ahc_inb(ahc, SSTAT0) & TARGET) != 0) {
898 1.1 fvdl /* XXX What happened to the SCB? */
899 1.1 fvdl /* Hung target selection. Goto busfree */
900 1.1 fvdl printf("%s: Hung target selection\n",
901 1.1 fvdl ahc_name(ahc));
902 1.1 fvdl ahc_restart(ahc);
903 1.1 fvdl ahc_unlock(ahc, &s);
904 1.1 fvdl return;
905 1.1 fvdl }
906 1.1 fvdl
907 1.1 fvdl if (ahc_search_qinfifo(ahc, target, channel, lun,
908 1.1 fvdl scb->hscb->tag, ROLE_INITIATOR,
909 1.1 fvdl /*status*/0, SEARCH_COUNT) > 0) {
910 1.1 fvdl disconnected = FALSE;
911 1.1 fvdl } else {
912 1.1 fvdl disconnected = TRUE;
913 1.1 fvdl }
914 1.1 fvdl
915 1.1 fvdl if (disconnected) {
916 1.1 fvdl
917 1.1 fvdl ahc_set_recoveryscb(ahc, scb);
918 1.1 fvdl /*
919 1.1 fvdl * Actually re-queue this SCB in an attempt
920 1.1 fvdl * to select the device before it reconnects.
921 1.1 fvdl * In either case (selection or reselection),
922 1.1 fvdl * we will now issue a target reset to the
923 1.1 fvdl * timed-out device.
924 1.1 fvdl *
925 1.1 fvdl * Set the MK_MESSAGE control bit indicating
926 1.1 fvdl * that we desire to send a message. We
927 1.1 fvdl * also set the disconnected flag since
928 1.1 fvdl * in the paging case there is no guarantee
929 1.1 fvdl * that our SCB control byte matches the
930 1.1 fvdl * version on the card. We don't want the
931 1.1 fvdl * sequencer to abort the command thinking
932 1.1 fvdl * an unsolicited reselection occurred.
933 1.1 fvdl */
934 1.1 fvdl scb->hscb->control |= MK_MESSAGE|DISCONNECTED;
935 1.1 fvdl scb->flags |= SCB_DEVICE_RESET;
936 1.1 fvdl
937 1.1 fvdl /*
938 1.1 fvdl * Remove any cached copy of this SCB in the
939 1.1 fvdl * disconnected list in preparation for the
940 1.1 fvdl * queuing of our abort SCB. We use the
941 1.1 fvdl * same element in the SCB, SCB_NEXT, for
942 1.1 fvdl * both the qinfifo and the disconnected list.
943 1.1 fvdl */
944 1.1 fvdl ahc_search_disc_list(ahc, target, channel,
945 1.1 fvdl lun, scb->hscb->tag,
946 1.1 fvdl /*stop_on_first*/TRUE,
947 1.1 fvdl /*remove*/TRUE,
948 1.1 fvdl /*save_state*/FALSE);
949 1.1 fvdl
950 1.1 fvdl /*
951 1.1 fvdl * In the non-paging case, the sequencer will
952 1.1 fvdl * never re-reference the in-core SCB.
953 1.1 fvdl * To make sure we are notified during
954 1.1 fvdl * reslection, set the MK_MESSAGE flag in
955 1.1 fvdl * the card's copy of the SCB.
956 1.1 fvdl */
957 1.1 fvdl if ((ahc->flags & AHC_PAGESCBS) == 0) {
958 1.1 fvdl ahc_outb(ahc, SCBPTR, scb->hscb->tag);
959 1.1 fvdl ahc_outb(ahc, SCB_CONTROL,
960 1.1 fvdl ahc_inb(ahc, SCB_CONTROL)
961 1.1 fvdl | MK_MESSAGE);
962 1.1 fvdl }
963 1.1 fvdl
964 1.1 fvdl /*
965 1.1 fvdl * Clear out any entries in the QINFIFO first
966 1.1 fvdl * so we are the next SCB for this target
967 1.1 fvdl * to run.
968 1.1 fvdl */
969 1.1 fvdl ahc_search_qinfifo(ahc,
970 1.1 fvdl SCB_GET_TARGET(ahc, scb),
971 1.1 fvdl channel, SCB_GET_LUN(scb),
972 1.1 fvdl SCB_LIST_NULL,
973 1.1 fvdl ROLE_INITIATOR,
974 1.1 fvdl CAM_REQUEUE_REQ,
975 1.1 fvdl SEARCH_COMPLETE);
976 1.1 fvdl ahc_print_path(ahc, scb);
977 1.1 fvdl printf("Queuing a BDR SCB\n");
978 1.1 fvdl ahc_qinfifo_requeue_tail(ahc, scb);
979 1.1 fvdl ahc_outb(ahc, SCBPTR, saved_scbptr);
980 1.1 fvdl callout_reset(&scb->xs->xs_callout, 2 * hz,
981 1.1 fvdl ahc_timeout, scb);
982 1.1 fvdl ahc_unpause(ahc);
983 1.1 fvdl } else {
984 1.1 fvdl /* Go "immediatly" to the bus reset */
985 1.1 fvdl /* This shouldn't happen */
986 1.1 fvdl ahc_set_recoveryscb(ahc, scb);
987 1.1 fvdl ahc_print_path(ahc, scb);
988 1.1 fvdl printf("SCB %d: Immediate reset. "
989 1.1 fvdl "Flags = 0x%x\n", scb->hscb->tag,
990 1.1 fvdl scb->flags);
991 1.1 fvdl goto bus_reset;
992 1.1 fvdl }
993 1.1 fvdl }
994 1.1 fvdl }
995 1.1 fvdl ahc_unlock(ahc, &s);
996 1.1 fvdl }
997 1.1 fvdl
998 1.1 fvdl void
999 1.1 fvdl ahc_platform_set_tags(struct ahc_softc *ahc,
1000 1.1 fvdl struct ahc_devinfo *devinfo, int enable)
1001 1.1 fvdl {
1002 1.21 tsutsui struct ahc_tmode_tstate *tstate;
1003 1.1 fvdl
1004 1.21 tsutsui ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
1005 1.21 tsutsui devinfo->target, &tstate);
1006 1.1 fvdl
1007 1.21 tsutsui if (enable)
1008 1.21 tsutsui tstate->tagenable |= devinfo->target_mask;
1009 1.1 fvdl else
1010 1.21 tsutsui tstate->tagenable &= ~devinfo->target_mask;
1011 1.1 fvdl }
1012 1.1 fvdl
1013 1.1 fvdl int
1014 1.24 christos ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg)
1015 1.1 fvdl {
1016 1.1 fvdl if (sizeof(struct ahc_platform_data) == 0)
1017 1.1 fvdl return 0;
1018 1.1 fvdl ahc->platform_data = malloc(sizeof(struct ahc_platform_data), M_DEVBUF,
1019 1.1 fvdl M_NOWAIT);
1020 1.1 fvdl if (ahc->platform_data == NULL)
1021 1.1 fvdl return (ENOMEM);
1022 1.1 fvdl return (0);
1023 1.1 fvdl }
1024 1.1 fvdl
1025 1.1 fvdl void
1026 1.1 fvdl ahc_platform_free(struct ahc_softc *ahc)
1027 1.1 fvdl {
1028 1.1 fvdl if (sizeof(struct ahc_platform_data) == 0)
1029 1.1 fvdl return;
1030 1.1 fvdl free(ahc->platform_data, M_DEVBUF);
1031 1.1 fvdl }
1032 1.1 fvdl
1033 1.1 fvdl int
1034 1.24 christos ahc_softc_comp(struct ahc_softc *lahc, struct ahc_softc *rahc)
1035 1.1 fvdl {
1036 1.1 fvdl return (0);
1037 1.1 fvdl }
1038 1.1 fvdl
1039 1.1 fvdl int
1040 1.1 fvdl ahc_detach(struct device *self, int flags)
1041 1.1 fvdl {
1042 1.1 fvdl int rv = 0;
1043 1.1 fvdl
1044 1.1 fvdl struct ahc_softc *ahc = (struct ahc_softc*)self;
1045 1.1 fvdl
1046 1.1 fvdl ahc_intr_enable(ahc, FALSE);
1047 1.1 fvdl if (ahc->sc_child != NULL)
1048 1.1 fvdl rv = config_detach(ahc->sc_child, flags);
1049 1.1 fvdl if (rv == 0 && ahc->sc_child_b != NULL)
1050 1.1 fvdl rv = config_detach(ahc->sc_child_b, flags);
1051 1.1 fvdl
1052 1.26 macallan pmf_device_deregister(self);
1053 1.1 fvdl ahc_free(ahc);
1054 1.1 fvdl
1055 1.1 fvdl return (rv);
1056 1.1 fvdl }
1057 1.1 fvdl
1058 1.1 fvdl
1059 1.1 fvdl void
1060 1.1 fvdl ahc_send_async(struct ahc_softc *ahc, char channel, u_int target, u_int lun,
1061 1.24 christos ac_code code, void *opt_arg)
1062 1.1 fvdl {
1063 1.1 fvdl struct ahc_tmode_tstate *tstate;
1064 1.1 fvdl struct ahc_initiator_tinfo *tinfo;
1065 1.1 fvdl struct ahc_devinfo devinfo;
1066 1.1 fvdl struct scsipi_channel *chan;
1067 1.1 fvdl struct scsipi_xfer_mode xm;
1068 1.1 fvdl
1069 1.1 fvdl chan = channel == 'B' ? &ahc->sc_channel_b : &ahc->sc_channel;
1070 1.1 fvdl switch (code) {
1071 1.1 fvdl case AC_TRANSFER_NEG:
1072 1.1 fvdl tinfo = ahc_fetch_transinfo(ahc, channel, ahc->our_id, target,
1073 1.1 fvdl &tstate);
1074 1.1 fvdl ahc_compile_devinfo(&devinfo, ahc->our_id, target, lun,
1075 1.1 fvdl channel, ROLE_UNKNOWN);
1076 1.1 fvdl /*
1077 1.1 fvdl * Don't bother if negotiating. XXX?
1078 1.1 fvdl */
1079 1.1 fvdl if (tinfo->curr.period != tinfo->goal.period
1080 1.1 fvdl || tinfo->curr.width != tinfo->goal.width
1081 1.1 fvdl || tinfo->curr.offset != tinfo->goal.offset
1082 1.1 fvdl || tinfo->curr.ppr_options != tinfo->goal.ppr_options)
1083 1.1 fvdl break;
1084 1.1 fvdl xm.xm_target = target;
1085 1.1 fvdl xm.xm_mode = 0;
1086 1.1 fvdl xm.xm_period = tinfo->curr.period;
1087 1.1 fvdl xm.xm_offset = tinfo->curr.offset;
1088 1.16 perry if (tinfo->curr.width == MSG_EXT_WDTR_BUS_16_BIT)
1089 1.1 fvdl xm.xm_mode |= PERIPH_CAP_WIDE16;
1090 1.1 fvdl if (tinfo->curr.period)
1091 1.1 fvdl xm.xm_mode |= PERIPH_CAP_SYNC;
1092 1.1 fvdl if (tstate->tagenable & devinfo.target_mask)
1093 1.1 fvdl xm.xm_mode |= PERIPH_CAP_TQING;
1094 1.6 fvdl if (tinfo->curr.ppr_options & MSG_EXT_PPR_DT_REQ)
1095 1.6 fvdl xm.xm_mode |= PERIPH_CAP_DT;
1096 1.1 fvdl scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, &xm);
1097 1.1 fvdl break;
1098 1.1 fvdl case AC_BUS_RESET:
1099 1.1 fvdl scsipi_async_event(chan, ASYNC_EVENT_RESET, NULL);
1100 1.1 fvdl case AC_SENT_BDR:
1101 1.1 fvdl default:
1102 1.1 fvdl break;
1103 1.1 fvdl }
1104 1.1 fvdl }
1105