aic7xxx_osm.c revision 1.6 1 1.6 fvdl /* $NetBSD: aic7xxx_osm.c,v 1.6 2003/04/21 16:52:07 fvdl Exp $ */
2 1.2 fvdl
3 1.1 fvdl /*
4 1.1 fvdl * Bus independent FreeBSD shim for the aic7xxx based adaptec SCSI controllers
5 1.1 fvdl *
6 1.1 fvdl * Copyright (c) 1994-2001 Justin T. Gibbs.
7 1.1 fvdl * All rights reserved.
8 1.1 fvdl *
9 1.1 fvdl * Redistribution and use in source and binary forms, with or without
10 1.1 fvdl * modification, are permitted provided that the following conditions
11 1.1 fvdl * are met:
12 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
13 1.1 fvdl * notice, this list of conditions, and the following disclaimer,
14 1.1 fvdl * without modification.
15 1.1 fvdl * 2. The name of the author may not be used to endorse or promote products
16 1.1 fvdl * derived from this software without specific prior written permission.
17 1.1 fvdl *
18 1.1 fvdl * Alternatively, this software may be distributed under the terms of the
19 1.1 fvdl * GNU Public License ("GPL").
20 1.1 fvdl *
21 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 1.1 fvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 1.1 fvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 1.1 fvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 1.1 fvdl * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 1.1 fvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 1.1 fvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 1.1 fvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 1.1 fvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 1.1 fvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 1.1 fvdl * SUCH DAMAGE.
32 1.1 fvdl *
33 1.1 fvdl * //depot/aic7xxx/freebsd/dev/aic7xxx/aic7xxx_osm.c#12 $
34 1.1 fvdl *
35 1.1 fvdl * $FreeBSD: src/sys/dev/aic7xxx/aic7xxx_osm.c,v 1.31 2002/11/30 19:08:58 scottl Exp $
36 1.1 fvdl */
37 1.1 fvdl /*
38 1.1 fvdl * Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. - April 2003
39 1.1 fvdl */
40 1.1 fvdl #include <dev/ic/aic7xxx_osm.h>
41 1.1 fvdl #include <dev/ic/aic7xxx_inline.h>
42 1.1 fvdl
43 1.1 fvdl #ifndef AHC_TMODE_ENABLE
44 1.1 fvdl #define AHC_TMODE_ENABLE 0
45 1.1 fvdl #endif
46 1.1 fvdl
47 1.1 fvdl
48 1.1 fvdl static void ahc_action(struct scsipi_channel *chan, scsipi_adapter_req_t req, void *arg);
49 1.1 fvdl static void ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments);
50 1.1 fvdl static int ahc_poll(struct ahc_softc *ahc, int wait);
51 1.1 fvdl static void ahc_setup_data(struct ahc_softc *ahc,
52 1.1 fvdl struct scsipi_xfer *xs, struct scb *scb);
53 1.1 fvdl static void ahc_set_recoveryscb(struct ahc_softc *ahc, struct scb *scb);
54 1.1 fvdl static int ahc_ioctl(struct scsipi_channel *channel, u_long cmd, caddr_t addr, int flag,
55 1.1 fvdl struct proc *p);
56 1.1 fvdl
57 1.1 fvdl
58 1.1 fvdl
59 1.1 fvdl /*
60 1.1 fvdl * Attach all the sub-devices we can find
61 1.1 fvdl */
62 1.1 fvdl int
63 1.1 fvdl ahc_attach(struct ahc_softc *ahc)
64 1.1 fvdl {
65 1.1 fvdl u_long s;
66 1.1 fvdl int i;
67 1.1 fvdl char ahc_info[256];
68 1.1 fvdl
69 1.1 fvdl LIST_INIT(&ahc->pending_scbs);
70 1.1 fvdl for (i = 0; i < AHC_NUM_TARGETS; i++)
71 1.1 fvdl TAILQ_INIT(&ahc->untagged_queues[i]);
72 1.1 fvdl
73 1.1 fvdl ahc_lock(ahc, &s);
74 1.1 fvdl
75 1.1 fvdl ahc->sc_adapter.adapt_dev = &ahc->sc_dev;
76 1.1 fvdl ahc->sc_adapter.adapt_nchannels = (ahc->features & AHC_TWIN) ? 2 : 1;
77 1.1 fvdl
78 1.1 fvdl ahc->sc_adapter.adapt_openings = AHC_MAX_QUEUE;
79 1.1 fvdl ahc->sc_adapter.adapt_max_periph = 16;
80 1.1 fvdl
81 1.1 fvdl ahc->sc_adapter.adapt_ioctl = ahc_ioctl;
82 1.1 fvdl ahc->sc_adapter.adapt_minphys = ahc_minphys;
83 1.1 fvdl ahc->sc_adapter.adapt_request = ahc_action;
84 1.1 fvdl
85 1.1 fvdl ahc->sc_channel.chan_adapter = &ahc->sc_adapter;
86 1.1 fvdl ahc->sc_channel.chan_bustype = &scsi_bustype;
87 1.1 fvdl ahc->sc_channel.chan_channel = 0;
88 1.1 fvdl ahc->sc_channel.chan_ntargets = (ahc->features & AHC_WIDE) ? 16 : 8;
89 1.1 fvdl ahc->sc_channel.chan_nluns = 8 /*AHC_NUM_LUNS*/;
90 1.1 fvdl ahc->sc_channel.chan_id = ahc->our_id;
91 1.1 fvdl
92 1.1 fvdl if (ahc->features & AHC_TWIN) {
93 1.1 fvdl ahc->sc_channel_b = ahc->sc_channel;
94 1.1 fvdl ahc->sc_channel_b.chan_id = ahc->our_id_b;
95 1.1 fvdl ahc->sc_channel_b.chan_channel = 1;
96 1.1 fvdl }
97 1.1 fvdl
98 1.1 fvdl ahc_controller_info(ahc, ahc_info);
99 1.1 fvdl printf("%s: %s\n", ahc->sc_dev.dv_xname, ahc_info);
100 1.1 fvdl
101 1.1 fvdl if ((ahc->flags & AHC_PRIMARY_CHANNEL) == 0) {
102 1.1 fvdl ahc->sc_child = config_found((void *)&ahc->sc_dev,
103 1.1 fvdl &ahc->sc_channel, scsiprint);
104 1.1 fvdl if (ahc->features & AHC_TWIN)
105 1.1 fvdl ahc->sc_child_b = config_found((void *)&ahc->sc_dev,
106 1.1 fvdl &ahc->sc_channel_b, scsiprint);
107 1.1 fvdl } else {
108 1.1 fvdl ahc->sc_child = config_found((void *)&ahc->sc_dev,
109 1.1 fvdl &ahc->sc_channel_b, scsiprint);
110 1.1 fvdl ahc->sc_child_b = config_found((void *)&ahc->sc_dev,
111 1.1 fvdl &ahc->sc_channel, scsiprint);
112 1.1 fvdl }
113 1.1 fvdl
114 1.1 fvdl ahc_intr_enable(ahc, TRUE);
115 1.1 fvdl
116 1.1 fvdl ahc_unlock(ahc, &s);
117 1.1 fvdl return (1);
118 1.1 fvdl }
119 1.1 fvdl
120 1.1 fvdl /*
121 1.1 fvdl * Catch an interrupt from the adapter
122 1.1 fvdl */
123 1.1 fvdl void
124 1.1 fvdl ahc_platform_intr(void *arg)
125 1.1 fvdl {
126 1.1 fvdl struct ahc_softc *ahc;
127 1.1 fvdl
128 1.1 fvdl ahc = (struct ahc_softc *)arg;
129 1.1 fvdl ahc_intr(ahc);
130 1.1 fvdl }
131 1.1 fvdl
132 1.1 fvdl /*
133 1.1 fvdl * We have an scb which has been processed by the
134 1.1 fvdl * adaptor, now we look to see how the operation
135 1.1 fvdl * went.
136 1.1 fvdl */
137 1.1 fvdl void
138 1.1 fvdl ahc_done(struct ahc_softc *ahc, struct scb *scb)
139 1.1 fvdl {
140 1.1 fvdl struct scsipi_xfer *xs;
141 1.1 fvdl struct scsipi_periph *periph;
142 1.1 fvdl u_long s;
143 1.1 fvdl
144 1.1 fvdl xs = scb->xs;
145 1.1 fvdl periph = xs->xs_periph;
146 1.1 fvdl LIST_REMOVE(scb, pending_links);
147 1.1 fvdl if ((scb->flags & SCB_UNTAGGEDQ) != 0) {
148 1.1 fvdl struct scb_tailq *untagged_q;
149 1.1 fvdl int target_offset;
150 1.1 fvdl
151 1.1 fvdl target_offset = SCB_GET_TARGET_OFFSET(ahc, scb);
152 1.1 fvdl untagged_q = &ahc->untagged_queues[target_offset];
153 1.1 fvdl TAILQ_REMOVE(untagged_q, scb, links.tqe);
154 1.1 fvdl scb->flags &= ~SCB_UNTAGGEDQ;
155 1.1 fvdl ahc_run_untagged_queue(ahc, untagged_q);
156 1.1 fvdl }
157 1.1 fvdl
158 1.1 fvdl callout_stop(&scb->xs->xs_callout);
159 1.1 fvdl
160 1.1 fvdl if (xs->datalen) {
161 1.1 fvdl int op;
162 1.1 fvdl
163 1.1 fvdl if (xs->xs_control & XS_CTL_DATA_IN)
164 1.1 fvdl op = BUS_DMASYNC_POSTREAD;
165 1.1 fvdl else
166 1.1 fvdl op = BUS_DMASYNC_POSTWRITE;
167 1.1 fvdl bus_dmamap_sync(ahc->parent_dmat, scb->dmamap, 0,
168 1.1 fvdl scb->dmamap->dm_mapsize, op);
169 1.1 fvdl bus_dmamap_unload(ahc->parent_dmat, scb->dmamap);
170 1.1 fvdl }
171 1.1 fvdl
172 1.1 fvdl /*
173 1.1 fvdl * If the recovery SCB completes, we have to be
174 1.1 fvdl * out of our timeout.
175 1.1 fvdl */
176 1.1 fvdl if ((scb->flags & SCB_RECOVERY_SCB) != 0) {
177 1.1 fvdl struct scb *list_scb;
178 1.1 fvdl
179 1.1 fvdl /*
180 1.1 fvdl * We were able to complete the command successfully,
181 1.1 fvdl * so reinstate the timeouts for all other pending
182 1.1 fvdl * commands.
183 1.1 fvdl */
184 1.1 fvdl LIST_FOREACH(list_scb, &ahc->pending_scbs, pending_links) {
185 1.1 fvdl struct scsipi_xfer *xs = list_scb->xs;
186 1.1 fvdl
187 1.1 fvdl if (!(xs->xs_control & XS_CTL_POLL)) {
188 1.1 fvdl callout_reset(&list_scb->xs->xs_callout,
189 1.1 fvdl (list_scb->xs->timeout > 1000000) ?
190 1.1 fvdl (list_scb->xs->timeout / 1000) * hz :
191 1.1 fvdl (list_scb->xs->timeout * hz) / 1000,
192 1.1 fvdl ahc_timeout, list_scb);
193 1.1 fvdl }
194 1.1 fvdl }
195 1.1 fvdl
196 1.1 fvdl if (ahc_get_transaction_status(scb) == CAM_BDR_SENT
197 1.1 fvdl || ahc_get_transaction_status(scb) == CAM_REQ_ABORTED)
198 1.1 fvdl ahc_set_transaction_status(scb, CAM_CMD_TIMEOUT);
199 1.1 fvdl scsipi_printaddr(xs->xs_periph);
200 1.1 fvdl printf("%s: no longer in timeout, status = %x\n",
201 1.1 fvdl ahc_name(ahc), xs->status);
202 1.1 fvdl }
203 1.1 fvdl
204 1.1 fvdl /* Don't clobber any existing error state */
205 1.1 fvdl if (xs->error != XS_NOERROR) {
206 1.1 fvdl /* Don't clobber any existing error state */
207 1.1 fvdl } else if ((scb->flags & SCB_SENSE) != 0) {
208 1.1 fvdl /*
209 1.1 fvdl * We performed autosense retrieval.
210 1.1 fvdl *
211 1.1 fvdl * Zero any sense not transferred by the
212 1.1 fvdl * device. The SCSI spec mandates that any
213 1.1 fvdl * untransfered data should be assumed to be
214 1.1 fvdl * zero. Complete the 'bounce' of sense information
215 1.1 fvdl * through buffers accessible via bus-space by
216 1.1 fvdl * copying it into the clients csio.
217 1.1 fvdl */
218 1.1 fvdl memset(&xs->sense.scsi_sense, 0, sizeof(xs->sense.scsi_sense));
219 1.1 fvdl memcpy(&xs->sense.scsi_sense,
220 1.1 fvdl ahc_get_sense_buf(ahc, scb),
221 1.1 fvdl sizeof(xs->sense.scsi_sense));
222 1.1 fvdl xs->error = XS_SENSE;
223 1.1 fvdl }
224 1.1 fvdl if (scb->flags & SCB_FREEZE_QUEUE) {
225 1.1 fvdl scsipi_periph_thaw(periph, 1);
226 1.1 fvdl scb->flags &= ~SCB_FREEZE_QUEUE;
227 1.1 fvdl }
228 1.1 fvdl
229 1.1 fvdl ahc_lock(ahc, &s);
230 1.1 fvdl ahc_free_scb(ahc, scb);
231 1.1 fvdl ahc_unlock(ahc, &s);
232 1.1 fvdl
233 1.1 fvdl scsipi_done(xs);
234 1.1 fvdl }
235 1.1 fvdl
236 1.1 fvdl static int
237 1.1 fvdl ahc_ioctl(struct scsipi_channel *channel, u_long cmd, caddr_t addr, int flag,
238 1.1 fvdl struct proc *p)
239 1.1 fvdl {
240 1.1 fvdl struct ahc_softc *ahc = (void *)channel->chan_adapter->adapt_dev;
241 1.1 fvdl int s, ret = ENOTTY;
242 1.1 fvdl
243 1.1 fvdl switch (cmd) {
244 1.1 fvdl case SCBUSIORESET:
245 1.1 fvdl s = splbio();
246 1.5 fvdl ahc_reset_channel(ahc, channel->chan_channel == 1 ? 'B' : 'A',
247 1.5 fvdl TRUE);
248 1.1 fvdl splx(s);
249 1.1 fvdl ret = 0;
250 1.1 fvdl break;
251 1.1 fvdl default:
252 1.1 fvdl break;
253 1.1 fvdl }
254 1.1 fvdl
255 1.1 fvdl return ret;
256 1.1 fvdl }
257 1.1 fvdl
258 1.1 fvdl static void
259 1.1 fvdl ahc_action(struct scsipi_channel *chan, scsipi_adapter_req_t req, void *arg)
260 1.1 fvdl {
261 1.1 fvdl struct ahc_softc *ahc;
262 1.1 fvdl int s;
263 1.1 fvdl struct ahc_initiator_tinfo *tinfo;
264 1.1 fvdl struct ahc_tmode_tstate *tstate;
265 1.4 fvdl char channel;
266 1.1 fvdl
267 1.1 fvdl ahc = (void *)chan->chan_adapter->adapt_dev;
268 1.4 fvdl
269 1.4 fvdl channel = chan->chan_channel == 0 ? 'A' : 'B';
270 1.4 fvdl
271 1.4 fvdl if (ahc->inited_channels[channel - 'A'] == 0) {
272 1.4 fvdl if ((channel == 'A' && (ahc->flags & AHC_RESET_BUS_A)) ||
273 1.4 fvdl (channel == 'B' && (ahc->flags & AHC_RESET_BUS_B))) {
274 1.4 fvdl s = splbio();
275 1.4 fvdl ahc_reset_channel(ahc, channel, TRUE);
276 1.4 fvdl splx(s);
277 1.4 fvdl }
278 1.4 fvdl ahc->inited_channels[channel - 'A'] = 1;
279 1.4 fvdl }
280 1.1 fvdl
281 1.1 fvdl switch (req) {
282 1.1 fvdl
283 1.1 fvdl case ADAPTER_REQ_RUN_XFER:
284 1.1 fvdl {
285 1.1 fvdl struct scsipi_xfer *xs;
286 1.1 fvdl struct scsipi_periph *periph;
287 1.1 fvdl struct scb *scb;
288 1.1 fvdl struct hardware_scb *hscb;
289 1.1 fvdl u_int target_id;
290 1.1 fvdl u_int our_id;
291 1.1 fvdl u_long s;
292 1.1 fvdl
293 1.1 fvdl xs = arg;
294 1.1 fvdl periph = xs->xs_periph;
295 1.1 fvdl
296 1.1 fvdl target_id = periph->periph_target;
297 1.1 fvdl our_id = ahc->our_id;
298 1.1 fvdl
299 1.1 fvdl SC_DEBUG(xs->xs_periph, SCSIPI_DB3, ("ahc_action\n"));
300 1.1 fvdl
301 1.1 fvdl /*
302 1.1 fvdl * get an scb to use.
303 1.1 fvdl */
304 1.1 fvdl ahc_lock(ahc, &s);
305 1.1 fvdl if ((scb = ahc_get_scb(ahc)) == NULL) {
306 1.1 fvdl xs->error = XS_RESOURCE_SHORTAGE;
307 1.1 fvdl ahc_unlock(ahc, &s);
308 1.1 fvdl scsipi_done(xs);
309 1.1 fvdl return;
310 1.1 fvdl }
311 1.1 fvdl ahc_unlock(ahc, &s);
312 1.1 fvdl
313 1.1 fvdl hscb = scb->hscb;
314 1.1 fvdl
315 1.1 fvdl SC_DEBUG(periph, SCSIPI_DB3, ("start scb(%p)\n", scb));
316 1.1 fvdl scb->xs = xs;
317 1.1 fvdl
318 1.1 fvdl /*
319 1.1 fvdl * Put all the arguments for the xfer in the scb
320 1.1 fvdl */
321 1.1 fvdl hscb->control = 0;
322 1.1 fvdl hscb->scsiid = BUILD_SCSIID(ahc, 0, target_id, our_id);
323 1.1 fvdl hscb->lun = periph->periph_lun;
324 1.1 fvdl if (xs->xs_control & XS_CTL_RESET) {
325 1.1 fvdl hscb->cdb_len = 0;
326 1.1 fvdl scb->flags |= SCB_DEVICE_RESET;
327 1.1 fvdl hscb->control |= MK_MESSAGE;
328 1.1 fvdl ahc_execute_scb(scb, NULL, 0);
329 1.1 fvdl }
330 1.1 fvdl
331 1.1 fvdl ahc_setup_data(ahc, xs, scb);
332 1.1 fvdl
333 1.1 fvdl break;
334 1.1 fvdl }
335 1.1 fvdl case ADAPTER_REQ_GROW_RESOURCES:
336 1.1 fvdl printf("%s: ADAPTER_REQ_GROW_RESOURCES\n", ahc_name(ahc));
337 1.1 fvdl return;
338 1.1 fvdl
339 1.1 fvdl case ADAPTER_REQ_SET_XFER_MODE:
340 1.1 fvdl {
341 1.1 fvdl struct scsipi_xfer_mode *xm = arg;
342 1.1 fvdl struct ahc_devinfo devinfo;
343 1.1 fvdl int target_id, our_id, first;
344 1.1 fvdl u_int width;
345 1.1 fvdl char channel;
346 1.1 fvdl
347 1.1 fvdl target_id = xm->xm_target;
348 1.1 fvdl our_id = chan->chan_id;
349 1.1 fvdl channel = (chan->chan_channel == 1) ? 'B' : 'A';
350 1.1 fvdl s = splbio();
351 1.1 fvdl tinfo = ahc_fetch_transinfo(ahc, channel, our_id, target_id,
352 1.1 fvdl &tstate);
353 1.1 fvdl ahc_compile_devinfo(&devinfo, our_id, target_id,
354 1.1 fvdl 0, channel, ROLE_INITIATOR);
355 1.1 fvdl
356 1.1 fvdl /*
357 1.1 fvdl * XXX since the period and offset are not provided here,
358 1.1 fvdl * fake things by forcing a renegotiation using the user
359 1.1 fvdl * settings if this is called for the first time (i.e.
360 1.1 fvdl * during probe). Also, cap various values at the user
361 1.1 fvdl * values, assuming that the user set it up that way.
362 1.1 fvdl */
363 1.1 fvdl if (ahc->inited_target[target_id] == 0) {
364 1.1 fvdl tinfo->goal = tinfo->user;
365 1.1 fvdl tstate->tagenable |=
366 1.1 fvdl (ahc->user_tagenable & devinfo.target_mask);
367 1.1 fvdl tstate->discenable |=
368 1.1 fvdl (ahc->user_discenable & devinfo.target_mask);
369 1.1 fvdl ahc->inited_target[target_id] = 1;
370 1.1 fvdl first = 1;
371 1.1 fvdl } else
372 1.1 fvdl first = 0;
373 1.1 fvdl
374 1.6 fvdl if (xm->xm_mode & (PERIPH_CAP_WIDE16 | PERIPH_CAP_DT))
375 1.1 fvdl width = MSG_EXT_WDTR_BUS_16_BIT;
376 1.1 fvdl else
377 1.1 fvdl width = MSG_EXT_WDTR_BUS_8_BIT;
378 1.1 fvdl
379 1.1 fvdl ahc_validate_width(ahc, NULL, &width, ROLE_UNKNOWN);
380 1.1 fvdl if (width > tinfo->user.width)
381 1.1 fvdl width = tinfo->user.width;
382 1.1 fvdl tinfo->goal.width = width;
383 1.1 fvdl
384 1.6 fvdl if (!(xm->xm_mode & (PERIPH_CAP_SYNC | PERIPH_CAP_DT))) {
385 1.1 fvdl tinfo->goal.period = 0;
386 1.1 fvdl tinfo->goal.offset = 0;
387 1.1 fvdl tinfo->goal.ppr_options = 0;
388 1.1 fvdl }
389 1.1 fvdl
390 1.1 fvdl if ((xm->xm_mode & PERIPH_CAP_DT) &&
391 1.1 fvdl (tinfo->user.ppr_options & MSG_EXT_PPR_DT_REQ))
392 1.1 fvdl tinfo->goal.ppr_options |= MSG_EXT_PPR_DT_REQ;
393 1.1 fvdl else
394 1.1 fvdl tinfo->goal.ppr_options &= ~MSG_EXT_PPR_DT_REQ;
395 1.1 fvdl
396 1.1 fvdl if ((xm->xm_mode & PERIPH_CAP_TQING) &&
397 1.1 fvdl (ahc->user_tagenable & devinfo.target_mask))
398 1.1 fvdl tstate->tagenable |= devinfo.target_mask;
399 1.1 fvdl else
400 1.1 fvdl tstate->tagenable &= ~devinfo.target_mask;
401 1.1 fvdl
402 1.1 fvdl /*
403 1.1 fvdl * If this is the first request, and no negotiation is
404 1.1 fvdl * needed, just confirm the state to the scsipi layer,
405 1.1 fvdl * so that it can print a message.
406 1.1 fvdl */
407 1.1 fvdl if (!ahc_update_neg_request(ahc, &devinfo, tstate,
408 1.1 fvdl tinfo, AHC_NEG_IF_NON_ASYNC) && first)
409 1.1 fvdl scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm);
410 1.1 fvdl splx(s);
411 1.1 fvdl }
412 1.1 fvdl }
413 1.1 fvdl
414 1.1 fvdl return;
415 1.1 fvdl }
416 1.1 fvdl
417 1.1 fvdl static void
418 1.1 fvdl ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments)
419 1.1 fvdl {
420 1.1 fvdl struct scb *scb;
421 1.1 fvdl struct scsipi_xfer *xs;
422 1.1 fvdl struct ahc_softc *ahc;
423 1.1 fvdl struct ahc_initiator_tinfo *tinfo;
424 1.1 fvdl struct ahc_tmode_tstate *tstate;
425 1.1 fvdl
426 1.1 fvdl u_int mask;
427 1.1 fvdl long s;
428 1.1 fvdl
429 1.1 fvdl scb = (struct scb *)arg;
430 1.1 fvdl xs = scb->xs;
431 1.1 fvdl xs->error = 0;
432 1.1 fvdl xs->status = 0;
433 1.1 fvdl xs->xs_status = 0;
434 1.1 fvdl ahc = (void *)xs->xs_periph->periph_channel->chan_adapter->adapt_dev;
435 1.1 fvdl
436 1.1 fvdl if (nsegments != 0) {
437 1.1 fvdl struct ahc_dma_seg *sg;
438 1.1 fvdl bus_dma_segment_t *end_seg;
439 1.1 fvdl int op;
440 1.1 fvdl
441 1.1 fvdl end_seg = dm_segs + nsegments;
442 1.1 fvdl
443 1.1 fvdl /* Copy the segments into our SG list */
444 1.1 fvdl sg = scb->sg_list;
445 1.1 fvdl while (dm_segs < end_seg) {
446 1.1 fvdl uint32_t len;
447 1.1 fvdl
448 1.1 fvdl sg->addr = ahc_htole32(dm_segs->ds_addr);
449 1.1 fvdl len = dm_segs->ds_len
450 1.1 fvdl | ((dm_segs->ds_addr >> 8) & 0x7F000000);
451 1.1 fvdl sg->len = ahc_htole32(len);
452 1.1 fvdl sg++;
453 1.1 fvdl dm_segs++;
454 1.1 fvdl }
455 1.1 fvdl
456 1.1 fvdl /*
457 1.1 fvdl * Note where to find the SG entries in bus space.
458 1.1 fvdl * We also set the full residual flag which the
459 1.1 fvdl * sequencer will clear as soon as a data transfer
460 1.1 fvdl * occurs.
461 1.1 fvdl */
462 1.1 fvdl scb->hscb->sgptr = ahc_htole32(scb->sg_list_phys|SG_FULL_RESID);
463 1.1 fvdl
464 1.1 fvdl if (xs->xs_control & XS_CTL_DATA_IN)
465 1.1 fvdl op = BUS_DMASYNC_PREREAD;
466 1.1 fvdl else
467 1.1 fvdl op = BUS_DMASYNC_PREWRITE;
468 1.1 fvdl
469 1.1 fvdl bus_dmamap_sync(ahc->parent_dmat, scb->dmamap, 0,
470 1.1 fvdl scb->dmamap->dm_mapsize, op);
471 1.1 fvdl
472 1.1 fvdl sg--;
473 1.1 fvdl sg->len |= ahc_htole32(AHC_DMA_LAST_SEG);
474 1.1 fvdl
475 1.1 fvdl /* Copy the first SG into the "current" data pointer area */
476 1.1 fvdl scb->hscb->dataptr = scb->sg_list->addr;
477 1.1 fvdl scb->hscb->datacnt = scb->sg_list->len;
478 1.1 fvdl } else {
479 1.1 fvdl scb->hscb->sgptr = ahc_htole32(SG_LIST_NULL);
480 1.1 fvdl scb->hscb->dataptr = 0;
481 1.1 fvdl scb->hscb->datacnt = 0;
482 1.1 fvdl }
483 1.1 fvdl
484 1.1 fvdl scb->sg_count = nsegments;
485 1.1 fvdl
486 1.1 fvdl ahc_lock(ahc, &s);
487 1.1 fvdl
488 1.1 fvdl /*
489 1.1 fvdl * Last time we need to check if this SCB needs to
490 1.1 fvdl * be aborted.
491 1.1 fvdl */
492 1.1 fvdl if (xs->xs_status & XS_STS_DONE) {
493 1.1 fvdl if (nsegments != 0)
494 1.1 fvdl bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
495 1.1 fvdl ahc_free_scb(ahc, scb);
496 1.1 fvdl ahc_unlock(ahc, &s);
497 1.1 fvdl scsipi_done(xs);
498 1.1 fvdl return;
499 1.1 fvdl }
500 1.1 fvdl
501 1.1 fvdl tinfo = ahc_fetch_transinfo(ahc, ahc->channel,
502 1.1 fvdl SCSIID_OUR_ID(scb->hscb->scsiid),
503 1.1 fvdl SCSIID_TARGET(ahc, scb->hscb->scsiid),
504 1.1 fvdl &tstate);
505 1.1 fvdl
506 1.1 fvdl mask = SCB_GET_TARGET_MASK(ahc, scb);
507 1.1 fvdl scb->hscb->scsirate = tinfo->scsirate;
508 1.1 fvdl scb->hscb->scsioffset = tinfo->curr.offset;
509 1.1 fvdl
510 1.1 fvdl if ((tstate->ultraenb & mask) != 0)
511 1.1 fvdl scb->hscb->control |= ULTRAENB;
512 1.1 fvdl
513 1.1 fvdl if ((tstate->discenable & mask) != 0)
514 1.1 fvdl scb->hscb->control |= DISCENB;
515 1.1 fvdl
516 1.1 fvdl if (xs->xs_tag_type)
517 1.1 fvdl scb->hscb->control |= xs->xs_tag_type;
518 1.1 fvdl
519 1.1 fvdl if ((xs->xs_control & XS_CTL_DISCOVERY) && (tinfo->goal.width == 0
520 1.1 fvdl && tinfo->goal.offset == 0
521 1.1 fvdl && tinfo->goal.ppr_options == 0)) {
522 1.1 fvdl scb->flags |= SCB_NEGOTIATE;
523 1.1 fvdl scb->hscb->control |= MK_MESSAGE;
524 1.1 fvdl } else if ((tstate->auto_negotiate & mask) != 0) {
525 1.1 fvdl scb->flags |= SCB_AUTO_NEGOTIATE;
526 1.1 fvdl scb->hscb->control |= MK_MESSAGE;
527 1.1 fvdl }
528 1.1 fvdl
529 1.1 fvdl LIST_INSERT_HEAD(&ahc->pending_scbs, scb, pending_links);
530 1.1 fvdl
531 1.1 fvdl if (!(xs->xs_control & XS_CTL_POLL)) {
532 1.1 fvdl callout_reset(&scb->xs->xs_callout, xs->timeout > 1000000 ?
533 1.1 fvdl (xs->timeout / 1000) * hz : (xs->timeout * hz) / 1000,
534 1.1 fvdl ahc_timeout, scb);
535 1.1 fvdl }
536 1.1 fvdl
537 1.1 fvdl /*
538 1.1 fvdl * We only allow one untagged transaction
539 1.1 fvdl * per target in the initiator role unless
540 1.1 fvdl * we are storing a full busy target *lun*
541 1.1 fvdl * table in SCB space.
542 1.1 fvdl */
543 1.1 fvdl if ((scb->hscb->control & (TARGET_SCB|TAG_ENB)) == 0
544 1.1 fvdl && (ahc->flags & AHC_SCB_BTT) == 0) {
545 1.1 fvdl struct scb_tailq *untagged_q;
546 1.1 fvdl int target_offset;
547 1.1 fvdl
548 1.1 fvdl target_offset = SCB_GET_TARGET_OFFSET(ahc, scb);
549 1.1 fvdl untagged_q = &(ahc->untagged_queues[target_offset]);
550 1.1 fvdl TAILQ_INSERT_TAIL(untagged_q, scb, links.tqe);
551 1.1 fvdl scb->flags |= SCB_UNTAGGEDQ;
552 1.1 fvdl if (TAILQ_FIRST(untagged_q) != scb) {
553 1.1 fvdl ahc_unlock(ahc, &s);
554 1.1 fvdl return;
555 1.1 fvdl }
556 1.1 fvdl }
557 1.1 fvdl scb->flags |= SCB_ACTIVE;
558 1.1 fvdl
559 1.1 fvdl if ((scb->flags & SCB_TARGET_IMMEDIATE) != 0) {
560 1.1 fvdl /* Define a mapping from our tag to the SCB. */
561 1.1 fvdl ahc->scb_data->scbindex[scb->hscb->tag] = scb;
562 1.1 fvdl ahc_pause(ahc);
563 1.1 fvdl if ((ahc->flags & AHC_PAGESCBS) == 0)
564 1.1 fvdl ahc_outb(ahc, SCBPTR, scb->hscb->tag);
565 1.1 fvdl ahc_outb(ahc, TARG_IMMEDIATE_SCB, scb->hscb->tag);
566 1.1 fvdl ahc_unpause(ahc);
567 1.1 fvdl } else {
568 1.1 fvdl ahc_queue_scb(ahc, scb);
569 1.1 fvdl }
570 1.1 fvdl
571 1.1 fvdl if (!(xs->xs_control & XS_CTL_POLL)) {
572 1.1 fvdl ahc_unlock(ahc, &s);
573 1.1 fvdl return;
574 1.1 fvdl }
575 1.1 fvdl
576 1.1 fvdl /*
577 1.1 fvdl * If we can't use interrupts, poll for completion
578 1.1 fvdl */
579 1.1 fvdl SC_DEBUG(xs->xs_periph, SCSIPI_DB3, ("cmd_poll\n"));
580 1.1 fvdl do {
581 1.1 fvdl if (ahc_poll(ahc, xs->timeout)) {
582 1.1 fvdl if (!(xs->xs_control & XS_CTL_SILENT))
583 1.1 fvdl printf("cmd fail\n");
584 1.1 fvdl ahc_timeout(scb);
585 1.1 fvdl break;
586 1.1 fvdl }
587 1.1 fvdl } while (!(xs->xs_status & XS_STS_DONE));
588 1.1 fvdl ahc_unlock(ahc, &s);
589 1.1 fvdl
590 1.1 fvdl return;
591 1.1 fvdl }
592 1.1 fvdl
593 1.1 fvdl static int
594 1.1 fvdl ahc_poll(struct ahc_softc *ahc, int wait)
595 1.1 fvdl {
596 1.1 fvdl while (--wait) {
597 1.1 fvdl DELAY(1000);
598 1.1 fvdl if (ahc_inb(ahc, INTSTAT) & INT_PEND)
599 1.1 fvdl break;
600 1.1 fvdl }
601 1.1 fvdl
602 1.1 fvdl if (wait == 0) {
603 1.1 fvdl printf("%s: board is not responding\n", ahc_name(ahc));
604 1.1 fvdl return (EIO);
605 1.1 fvdl }
606 1.1 fvdl
607 1.1 fvdl ahc_intr((void *)ahc);
608 1.1 fvdl return (0);
609 1.1 fvdl }
610 1.1 fvdl
611 1.1 fvdl static void
612 1.1 fvdl ahc_setup_data(struct ahc_softc *ahc, struct scsipi_xfer *xs,
613 1.1 fvdl struct scb *scb)
614 1.1 fvdl {
615 1.1 fvdl struct hardware_scb *hscb;
616 1.1 fvdl
617 1.1 fvdl hscb = scb->hscb;
618 1.1 fvdl xs->resid = xs->status = 0;
619 1.1 fvdl
620 1.1 fvdl hscb->cdb_len = xs->cmdlen;
621 1.1 fvdl if (hscb->cdb_len > sizeof(hscb->cdb32)) {
622 1.1 fvdl u_long s;
623 1.1 fvdl
624 1.1 fvdl ahc_set_transaction_status(scb, CAM_REQ_INVALID);
625 1.1 fvdl ahc_lock(ahc, &s);
626 1.1 fvdl ahc_free_scb(ahc, scb);
627 1.1 fvdl ahc_unlock(ahc, &s);
628 1.1 fvdl scsipi_done(xs);
629 1.1 fvdl return;
630 1.1 fvdl }
631 1.1 fvdl
632 1.1 fvdl if (hscb->cdb_len > 12) {
633 1.1 fvdl memcpy(hscb->cdb32, xs->cmd, hscb->cdb_len);
634 1.1 fvdl scb->flags |= SCB_CDB32_PTR;
635 1.1 fvdl } else {
636 1.1 fvdl memcpy(hscb->shared_data.cdb, xs->cmd, hscb->cdb_len);
637 1.1 fvdl }
638 1.1 fvdl
639 1.1 fvdl /* Only use S/G if there is a transfer */
640 1.1 fvdl if (xs->datalen) {
641 1.1 fvdl int error;
642 1.1 fvdl
643 1.1 fvdl error = bus_dmamap_load(ahc->parent_dmat,
644 1.1 fvdl scb->dmamap, xs->data,
645 1.1 fvdl xs->datalen, NULL,
646 1.1 fvdl ((xs->xs_control & XS_CTL_NOSLEEP) ?
647 1.1 fvdl BUS_DMA_NOWAIT : BUS_DMA_WAITOK) |
648 1.1 fvdl BUS_DMA_STREAMING |
649 1.1 fvdl ((xs->xs_control & XS_CTL_DATA_IN) ?
650 1.1 fvdl BUS_DMA_READ : BUS_DMA_WRITE));
651 1.1 fvdl if (error) {
652 1.1 fvdl #ifdef AHC_DEBUG
653 1.1 fvdl printf("%s: in ahc_setup_data(): bus_dmamap_load() "
654 1.1 fvdl "= %d\n",
655 1.1 fvdl ahc_name(ahc), error);
656 1.1 fvdl #endif
657 1.1 fvdl xs->error = XS_RESOURCE_SHORTAGE;
658 1.1 fvdl scsipi_done(xs);
659 1.1 fvdl return;
660 1.1 fvdl }
661 1.1 fvdl ahc_execute_scb(scb,
662 1.1 fvdl scb->dmamap->dm_segs,
663 1.1 fvdl scb->dmamap->dm_nsegs);
664 1.1 fvdl } else {
665 1.1 fvdl ahc_execute_scb(scb, NULL, 0);
666 1.1 fvdl }
667 1.1 fvdl }
668 1.1 fvdl
669 1.1 fvdl static void
670 1.1 fvdl ahc_set_recoveryscb(struct ahc_softc *ahc, struct scb *scb) {
671 1.1 fvdl
672 1.1 fvdl if ((scb->flags & SCB_RECOVERY_SCB) == 0) {
673 1.1 fvdl struct scb *list_scb;
674 1.1 fvdl
675 1.1 fvdl scb->flags |= SCB_RECOVERY_SCB;
676 1.1 fvdl
677 1.1 fvdl /*
678 1.1 fvdl * Take all queued, but not sent SCBs out of the equation.
679 1.1 fvdl * Also ensure that no new CCBs are queued to us while we
680 1.1 fvdl * try to fix this problem.
681 1.1 fvdl */
682 1.1 fvdl scsipi_channel_freeze(&ahc->sc_channel, 1);
683 1.1 fvdl if (ahc->features & AHC_TWIN)
684 1.1 fvdl scsipi_channel_freeze(&ahc->sc_channel_b, 1);
685 1.1 fvdl
686 1.1 fvdl /*
687 1.1 fvdl * Go through all of our pending SCBs and remove
688 1.1 fvdl * any scheduled timeouts for them. We will reschedule
689 1.1 fvdl * them after we've successfully fixed this problem.
690 1.1 fvdl */
691 1.1 fvdl LIST_FOREACH(list_scb, &ahc->pending_scbs, pending_links) {
692 1.1 fvdl callout_stop(&list_scb->xs->xs_callout);
693 1.1 fvdl }
694 1.1 fvdl }
695 1.1 fvdl }
696 1.1 fvdl
697 1.1 fvdl void
698 1.1 fvdl ahc_timeout(void *arg)
699 1.1 fvdl {
700 1.1 fvdl struct scb *scb;
701 1.1 fvdl struct ahc_softc *ahc;
702 1.1 fvdl long s;
703 1.1 fvdl int found;
704 1.1 fvdl u_int last_phase;
705 1.1 fvdl int target;
706 1.1 fvdl int lun;
707 1.1 fvdl int i;
708 1.1 fvdl char channel;
709 1.1 fvdl
710 1.1 fvdl scb = (struct scb *)arg;
711 1.1 fvdl ahc = (struct ahc_softc *)scb->ahc_softc;
712 1.1 fvdl
713 1.1 fvdl ahc_lock(ahc, &s);
714 1.1 fvdl
715 1.1 fvdl ahc_pause_and_flushwork(ahc);
716 1.1 fvdl
717 1.1 fvdl if ((scb->flags & SCB_ACTIVE) == 0) {
718 1.1 fvdl /* Previous timeout took care of me already */
719 1.1 fvdl printf("%s: Timedout SCB already complete. "
720 1.1 fvdl "Interrupts may not be functioning.\n", ahc_name(ahc));
721 1.1 fvdl ahc_unpause(ahc);
722 1.1 fvdl ahc_unlock(ahc, &s);
723 1.1 fvdl return;
724 1.1 fvdl }
725 1.1 fvdl
726 1.1 fvdl target = SCB_GET_TARGET(ahc, scb);
727 1.1 fvdl channel = SCB_GET_CHANNEL(ahc, scb);
728 1.1 fvdl lun = SCB_GET_LUN(scb);
729 1.1 fvdl
730 1.1 fvdl ahc_print_path(ahc, scb);
731 1.1 fvdl printf("SCB 0x%x - timed out\n", scb->hscb->tag);
732 1.1 fvdl ahc_dump_card_state(ahc);
733 1.1 fvdl last_phase = ahc_inb(ahc, LASTPHASE);
734 1.1 fvdl if (scb->sg_count > 0) {
735 1.1 fvdl for (i = 0; i < scb->sg_count; i++) {
736 1.1 fvdl printf("sg[%d] - Addr 0x%x : Length %d\n",
737 1.1 fvdl i,
738 1.1 fvdl scb->sg_list[i].addr,
739 1.1 fvdl scb->sg_list[i].len & AHC_SG_LEN_MASK);
740 1.1 fvdl }
741 1.1 fvdl }
742 1.1 fvdl if (scb->flags & (SCB_DEVICE_RESET|SCB_ABORT)) {
743 1.1 fvdl /*
744 1.1 fvdl * Been down this road before.
745 1.1 fvdl * Do a full bus reset.
746 1.1 fvdl */
747 1.1 fvdl bus_reset:
748 1.1 fvdl ahc_set_transaction_status(scb, CAM_CMD_TIMEOUT);
749 1.1 fvdl found = ahc_reset_channel(ahc, channel, /*Initiate Reset*/TRUE);
750 1.1 fvdl printf("%s: Issued Channel %c Bus Reset. "
751 1.1 fvdl "%d SCBs aborted\n", ahc_name(ahc), channel, found);
752 1.1 fvdl } else {
753 1.1 fvdl /*
754 1.1 fvdl * If we are a target, transition to bus free and report
755 1.1 fvdl * the timeout.
756 1.1 fvdl *
757 1.1 fvdl * The target/initiator that is holding up the bus may not
758 1.1 fvdl * be the same as the one that triggered this timeout
759 1.1 fvdl * (different commands have different timeout lengths).
760 1.1 fvdl * If the bus is idle and we are actiing as the initiator
761 1.1 fvdl * for this request, queue a BDR message to the timed out
762 1.1 fvdl * target. Otherwise, if the timed out transaction is
763 1.1 fvdl * active:
764 1.1 fvdl * Initiator transaction:
765 1.1 fvdl * Stuff the message buffer with a BDR message and assert
766 1.1 fvdl * ATN in the hopes that the target will let go of the bus
767 1.1 fvdl * and go to the mesgout phase. If this fails, we'll
768 1.1 fvdl * get another timeout 2 seconds later which will attempt
769 1.1 fvdl * a bus reset.
770 1.1 fvdl *
771 1.1 fvdl * Target transaction:
772 1.1 fvdl * Transition to BUS FREE and report the error.
773 1.1 fvdl * It's good to be the target!
774 1.1 fvdl */
775 1.1 fvdl u_int active_scb_index;
776 1.1 fvdl u_int saved_scbptr;
777 1.1 fvdl
778 1.1 fvdl saved_scbptr = ahc_inb(ahc, SCBPTR);
779 1.1 fvdl active_scb_index = ahc_inb(ahc, SCB_TAG);
780 1.1 fvdl
781 1.1 fvdl if ((ahc_inb(ahc, SEQ_FLAGS) & NOT_IDENTIFIED) == 0
782 1.1 fvdl && (active_scb_index < ahc->scb_data->numscbs)) {
783 1.1 fvdl struct scb *active_scb;
784 1.1 fvdl
785 1.1 fvdl /*
786 1.1 fvdl * If the active SCB is not us, assume that
787 1.1 fvdl * the active SCB has a longer timeout than
788 1.1 fvdl * the timedout SCB, and wait for the active
789 1.1 fvdl * SCB to timeout.
790 1.1 fvdl */
791 1.1 fvdl active_scb = ahc_lookup_scb(ahc, active_scb_index);
792 1.1 fvdl if (active_scb != scb) {
793 1.1 fvdl uint64_t newtimeout;
794 1.1 fvdl
795 1.1 fvdl ahc_print_path(ahc, scb);
796 1.1 fvdl printf("Other SCB Timeout%s",
797 1.1 fvdl (scb->flags & SCB_OTHERTCL_TIMEOUT) != 0
798 1.1 fvdl ? " again\n" : "\n");
799 1.1 fvdl scb->flags |= SCB_OTHERTCL_TIMEOUT;
800 1.1 fvdl newtimeout = MAX(active_scb->xs->timeout,
801 1.1 fvdl scb->xs->timeout);
802 1.1 fvdl callout_reset(&scb->xs->xs_callout,
803 1.1 fvdl newtimeout > 1000000 ?
804 1.1 fvdl (newtimeout / 1000) * hz :
805 1.1 fvdl (newtimeout * hz) / 1000,
806 1.1 fvdl ahc_timeout, scb);
807 1.1 fvdl ahc_unpause(ahc);
808 1.1 fvdl ahc_unlock(ahc, &s);
809 1.1 fvdl return;
810 1.1 fvdl }
811 1.1 fvdl
812 1.1 fvdl /* It's us */
813 1.1 fvdl if ((scb->flags & SCB_TARGET_SCB) != 0) {
814 1.1 fvdl
815 1.1 fvdl /*
816 1.1 fvdl * Send back any queued up transactions
817 1.1 fvdl * and properly record the error condition.
818 1.1 fvdl */
819 1.1 fvdl ahc_abort_scbs(ahc, SCB_GET_TARGET(ahc, scb),
820 1.1 fvdl SCB_GET_CHANNEL(ahc, scb),
821 1.1 fvdl SCB_GET_LUN(scb),
822 1.1 fvdl scb->hscb->tag,
823 1.1 fvdl ROLE_TARGET,
824 1.1 fvdl CAM_CMD_TIMEOUT);
825 1.1 fvdl
826 1.1 fvdl /* Will clear us from the bus */
827 1.1 fvdl ahc_restart(ahc);
828 1.1 fvdl ahc_unlock(ahc, &s);
829 1.1 fvdl return;
830 1.1 fvdl }
831 1.1 fvdl
832 1.1 fvdl ahc_set_recoveryscb(ahc, active_scb);
833 1.1 fvdl ahc_outb(ahc, MSG_OUT, HOST_MSG);
834 1.1 fvdl ahc_outb(ahc, SCSISIGO, last_phase|ATNO);
835 1.1 fvdl ahc_print_path(ahc, active_scb);
836 1.1 fvdl printf("BDR message in message buffer\n");
837 1.1 fvdl active_scb->flags |= SCB_DEVICE_RESET;
838 1.1 fvdl callout_reset(&active_scb->xs->xs_callout,
839 1.1 fvdl 2 * hz, ahc_timeout, active_scb);
840 1.1 fvdl ahc_unpause(ahc);
841 1.1 fvdl } else {
842 1.1 fvdl int disconnected;
843 1.1 fvdl
844 1.1 fvdl /* XXX Shouldn't panic. Just punt instead? */
845 1.1 fvdl if ((scb->flags & SCB_TARGET_SCB) != 0)
846 1.1 fvdl panic("Timed-out target SCB but bus idle");
847 1.1 fvdl
848 1.1 fvdl if (last_phase != P_BUSFREE
849 1.1 fvdl && (ahc_inb(ahc, SSTAT0) & TARGET) != 0) {
850 1.1 fvdl /* XXX What happened to the SCB? */
851 1.1 fvdl /* Hung target selection. Goto busfree */
852 1.1 fvdl printf("%s: Hung target selection\n",
853 1.1 fvdl ahc_name(ahc));
854 1.1 fvdl ahc_restart(ahc);
855 1.1 fvdl ahc_unlock(ahc, &s);
856 1.1 fvdl return;
857 1.1 fvdl }
858 1.1 fvdl
859 1.1 fvdl if (ahc_search_qinfifo(ahc, target, channel, lun,
860 1.1 fvdl scb->hscb->tag, ROLE_INITIATOR,
861 1.1 fvdl /*status*/0, SEARCH_COUNT) > 0) {
862 1.1 fvdl disconnected = FALSE;
863 1.1 fvdl } else {
864 1.1 fvdl disconnected = TRUE;
865 1.1 fvdl }
866 1.1 fvdl
867 1.1 fvdl if (disconnected) {
868 1.1 fvdl
869 1.1 fvdl ahc_set_recoveryscb(ahc, scb);
870 1.1 fvdl /*
871 1.1 fvdl * Actually re-queue this SCB in an attempt
872 1.1 fvdl * to select the device before it reconnects.
873 1.1 fvdl * In either case (selection or reselection),
874 1.1 fvdl * we will now issue a target reset to the
875 1.1 fvdl * timed-out device.
876 1.1 fvdl *
877 1.1 fvdl * Set the MK_MESSAGE control bit indicating
878 1.1 fvdl * that we desire to send a message. We
879 1.1 fvdl * also set the disconnected flag since
880 1.1 fvdl * in the paging case there is no guarantee
881 1.1 fvdl * that our SCB control byte matches the
882 1.1 fvdl * version on the card. We don't want the
883 1.1 fvdl * sequencer to abort the command thinking
884 1.1 fvdl * an unsolicited reselection occurred.
885 1.1 fvdl */
886 1.1 fvdl scb->hscb->control |= MK_MESSAGE|DISCONNECTED;
887 1.1 fvdl scb->flags |= SCB_DEVICE_RESET;
888 1.1 fvdl
889 1.1 fvdl /*
890 1.1 fvdl * Remove any cached copy of this SCB in the
891 1.1 fvdl * disconnected list in preparation for the
892 1.1 fvdl * queuing of our abort SCB. We use the
893 1.1 fvdl * same element in the SCB, SCB_NEXT, for
894 1.1 fvdl * both the qinfifo and the disconnected list.
895 1.1 fvdl */
896 1.1 fvdl ahc_search_disc_list(ahc, target, channel,
897 1.1 fvdl lun, scb->hscb->tag,
898 1.1 fvdl /*stop_on_first*/TRUE,
899 1.1 fvdl /*remove*/TRUE,
900 1.1 fvdl /*save_state*/FALSE);
901 1.1 fvdl
902 1.1 fvdl /*
903 1.1 fvdl * In the non-paging case, the sequencer will
904 1.1 fvdl * never re-reference the in-core SCB.
905 1.1 fvdl * To make sure we are notified during
906 1.1 fvdl * reslection, set the MK_MESSAGE flag in
907 1.1 fvdl * the card's copy of the SCB.
908 1.1 fvdl */
909 1.1 fvdl if ((ahc->flags & AHC_PAGESCBS) == 0) {
910 1.1 fvdl ahc_outb(ahc, SCBPTR, scb->hscb->tag);
911 1.1 fvdl ahc_outb(ahc, SCB_CONTROL,
912 1.1 fvdl ahc_inb(ahc, SCB_CONTROL)
913 1.1 fvdl | MK_MESSAGE);
914 1.1 fvdl }
915 1.1 fvdl
916 1.1 fvdl /*
917 1.1 fvdl * Clear out any entries in the QINFIFO first
918 1.1 fvdl * so we are the next SCB for this target
919 1.1 fvdl * to run.
920 1.1 fvdl */
921 1.1 fvdl ahc_search_qinfifo(ahc,
922 1.1 fvdl SCB_GET_TARGET(ahc, scb),
923 1.1 fvdl channel, SCB_GET_LUN(scb),
924 1.1 fvdl SCB_LIST_NULL,
925 1.1 fvdl ROLE_INITIATOR,
926 1.1 fvdl CAM_REQUEUE_REQ,
927 1.1 fvdl SEARCH_COMPLETE);
928 1.1 fvdl ahc_print_path(ahc, scb);
929 1.1 fvdl printf("Queuing a BDR SCB\n");
930 1.1 fvdl ahc_qinfifo_requeue_tail(ahc, scb);
931 1.1 fvdl ahc_outb(ahc, SCBPTR, saved_scbptr);
932 1.1 fvdl callout_reset(&scb->xs->xs_callout, 2 * hz,
933 1.1 fvdl ahc_timeout, scb);
934 1.1 fvdl ahc_unpause(ahc);
935 1.1 fvdl } else {
936 1.1 fvdl /* Go "immediatly" to the bus reset */
937 1.1 fvdl /* This shouldn't happen */
938 1.1 fvdl ahc_set_recoveryscb(ahc, scb);
939 1.1 fvdl ahc_print_path(ahc, scb);
940 1.1 fvdl printf("SCB %d: Immediate reset. "
941 1.1 fvdl "Flags = 0x%x\n", scb->hscb->tag,
942 1.1 fvdl scb->flags);
943 1.1 fvdl goto bus_reset;
944 1.1 fvdl }
945 1.1 fvdl }
946 1.1 fvdl }
947 1.1 fvdl ahc_unlock(ahc, &s);
948 1.1 fvdl }
949 1.1 fvdl
950 1.1 fvdl void
951 1.1 fvdl ahc_platform_set_tags(struct ahc_softc *ahc,
952 1.1 fvdl struct ahc_devinfo *devinfo, int enable)
953 1.1 fvdl {
954 1.1 fvdl struct ahc_initiator_tinfo *tinfo;
955 1.1 fvdl struct ahc_tmode_tstate *tstate;
956 1.1 fvdl
957 1.1 fvdl tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
958 1.1 fvdl devinfo->target, &tstate);
959 1.1 fvdl
960 1.1 fvdl if (enable)
961 1.1 fvdl tstate->tagenable |= devinfo->target_mask;
962 1.1 fvdl else
963 1.1 fvdl tstate->tagenable &= ~devinfo->target_mask;
964 1.1 fvdl }
965 1.1 fvdl
966 1.1 fvdl int
967 1.1 fvdl ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg)
968 1.1 fvdl {
969 1.1 fvdl if (sizeof(struct ahc_platform_data) == 0)
970 1.1 fvdl return 0;
971 1.1 fvdl ahc->platform_data = malloc(sizeof(struct ahc_platform_data), M_DEVBUF,
972 1.1 fvdl M_NOWAIT);
973 1.1 fvdl if (ahc->platform_data == NULL)
974 1.1 fvdl return (ENOMEM);
975 1.1 fvdl return (0);
976 1.1 fvdl }
977 1.1 fvdl
978 1.1 fvdl void
979 1.1 fvdl ahc_platform_free(struct ahc_softc *ahc)
980 1.1 fvdl {
981 1.1 fvdl if (sizeof(struct ahc_platform_data) == 0)
982 1.1 fvdl return;
983 1.1 fvdl free(ahc->platform_data, M_DEVBUF);
984 1.1 fvdl }
985 1.1 fvdl
986 1.1 fvdl int
987 1.1 fvdl ahc_softc_comp(struct ahc_softc *lahc, struct ahc_softc *rahc)
988 1.1 fvdl {
989 1.1 fvdl return (0);
990 1.1 fvdl }
991 1.1 fvdl
992 1.1 fvdl int
993 1.1 fvdl ahc_detach(struct device *self, int flags)
994 1.1 fvdl {
995 1.1 fvdl int rv = 0;
996 1.1 fvdl
997 1.1 fvdl struct ahc_softc *ahc = (struct ahc_softc*)self;
998 1.1 fvdl
999 1.1 fvdl ahc_intr_enable(ahc, FALSE);
1000 1.1 fvdl if (ahc->sc_child != NULL)
1001 1.1 fvdl rv = config_detach(ahc->sc_child, flags);
1002 1.1 fvdl if (rv == 0 && ahc->sc_child_b != NULL)
1003 1.1 fvdl rv = config_detach(ahc->sc_child_b, flags);
1004 1.1 fvdl
1005 1.3 fvdl shutdownhook_disestablish(ahc->shutdown_hook);
1006 1.3 fvdl
1007 1.1 fvdl ahc_free(ahc);
1008 1.1 fvdl
1009 1.1 fvdl return (rv);
1010 1.1 fvdl }
1011 1.1 fvdl
1012 1.1 fvdl
1013 1.1 fvdl void
1014 1.1 fvdl ahc_send_async(struct ahc_softc *ahc, char channel, u_int target, u_int lun,
1015 1.1 fvdl ac_code code, void *opt_arg)
1016 1.1 fvdl {
1017 1.1 fvdl struct ahc_tmode_tstate *tstate;
1018 1.1 fvdl struct ahc_initiator_tinfo *tinfo;
1019 1.1 fvdl struct ahc_devinfo devinfo;
1020 1.1 fvdl struct scsipi_channel *chan;
1021 1.1 fvdl struct scsipi_xfer_mode xm;
1022 1.1 fvdl
1023 1.1 fvdl chan = channel == 'B' ? &ahc->sc_channel_b : &ahc->sc_channel;
1024 1.1 fvdl switch (code) {
1025 1.1 fvdl case AC_TRANSFER_NEG:
1026 1.1 fvdl tinfo = ahc_fetch_transinfo(ahc, channel, ahc->our_id, target,
1027 1.1 fvdl &tstate);
1028 1.1 fvdl ahc_compile_devinfo(&devinfo, ahc->our_id, target, lun,
1029 1.1 fvdl channel, ROLE_UNKNOWN);
1030 1.1 fvdl /*
1031 1.1 fvdl * Don't bother if negotiating. XXX?
1032 1.1 fvdl */
1033 1.1 fvdl if (tinfo->curr.period != tinfo->goal.period
1034 1.1 fvdl || tinfo->curr.width != tinfo->goal.width
1035 1.1 fvdl || tinfo->curr.offset != tinfo->goal.offset
1036 1.1 fvdl || tinfo->curr.ppr_options != tinfo->goal.ppr_options)
1037 1.1 fvdl break;
1038 1.1 fvdl xm.xm_target = target;
1039 1.1 fvdl xm.xm_mode = 0;
1040 1.1 fvdl xm.xm_period = tinfo->curr.period;
1041 1.1 fvdl xm.xm_offset = tinfo->curr.offset;
1042 1.1 fvdl if (tinfo->curr.width == MSG_EXT_WDTR_BUS_16_BIT)
1043 1.1 fvdl xm.xm_mode |= PERIPH_CAP_WIDE16;
1044 1.1 fvdl if (tinfo->curr.period)
1045 1.1 fvdl xm.xm_mode |= PERIPH_CAP_SYNC;
1046 1.1 fvdl if (tstate->tagenable & devinfo.target_mask)
1047 1.1 fvdl xm.xm_mode |= PERIPH_CAP_TQING;
1048 1.6 fvdl if (tinfo->curr.ppr_options & MSG_EXT_PPR_DT_REQ)
1049 1.6 fvdl xm.xm_mode |= PERIPH_CAP_DT;
1050 1.1 fvdl scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, &xm);
1051 1.1 fvdl break;
1052 1.1 fvdl case AC_BUS_RESET:
1053 1.1 fvdl scsipi_async_event(chan, ASYNC_EVENT_RESET, NULL);
1054 1.1 fvdl case AC_SENT_BDR:
1055 1.1 fvdl default:
1056 1.1 fvdl break;
1057 1.1 fvdl }
1058 1.1 fvdl }
1059