aic7xxx_osm.h revision 1.6 1 1.6 itojun /* $NetBSD: aic7xxx_osm.h,v 1.6 2003/07/08 10:06:30 itojun Exp $ */
2 1.2 fvdl
3 1.1 fvdl /*
4 1.3 fvdl * NetBSD platform specific driver option settings, data structures,
5 1.1 fvdl * function declarations and includes.
6 1.1 fvdl *
7 1.1 fvdl * Copyright (c) 1994-2001 Justin T. Gibbs.
8 1.1 fvdl * All rights reserved.
9 1.1 fvdl *
10 1.1 fvdl * Redistribution and use in source and binary forms, with or without
11 1.1 fvdl * modification, are permitted provided that the following conditions
12 1.1 fvdl * are met:
13 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
14 1.1 fvdl * notice, this list of conditions, and the following disclaimer,
15 1.1 fvdl * without modification.
16 1.1 fvdl * 2. The name of the author may not be used to endorse or promote products
17 1.1 fvdl * derived from this software without specific prior written permission.
18 1.1 fvdl *
19 1.1 fvdl * Alternatively, this software may be distributed under the terms of the
20 1.1 fvdl * GNU Public License ("GPL").
21 1.1 fvdl *
22 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 1.1 fvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.1 fvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 fvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
26 1.1 fvdl * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 fvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.1 fvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.1 fvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.1 fvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.1 fvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 fvdl * SUCH DAMAGE.
33 1.1 fvdl *
34 1.1 fvdl * //depot/aic7xxx/freebsd/dev/aic7xxx/aic7xxx_osm.h#14 $
35 1.1 fvdl *
36 1.1 fvdl * $FreeBSD: /repoman/r/ncvs/src/sys/dev/aic7xxx/aic7xxx_osm.h,v 1.20 2002/12/04 22:51:29 scottl Exp $
37 1.1 fvdl */
38 1.1 fvdl /*
39 1.1 fvdl * Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. - April 2003
40 1.1 fvdl */
41 1.1 fvdl
42 1.1 fvdl #ifndef _AIC7XXX_NETBSD_H_
43 1.1 fvdl #define _AIC7XXX_NETBSD_H_
44 1.1 fvdl
45 1.1 fvdl #include "opt_ahc.h" /* for config options */
46 1.1 fvdl
47 1.1 fvdl #include <sys/param.h>
48 1.1 fvdl #include <sys/kernel.h>
49 1.1 fvdl #include <sys/systm.h>
50 1.1 fvdl #include <sys/device.h>
51 1.1 fvdl #include <sys/malloc.h>
52 1.1 fvdl #include <sys/buf.h>
53 1.1 fvdl #include <sys/proc.h>
54 1.1 fvdl #include <sys/scsiio.h>
55 1.1 fvdl #include <sys/reboot.h>
56 1.1 fvdl #include <sys/kthread.h>
57 1.1 fvdl
58 1.1 fvdl #include <dev/pci/pcireg.h>
59 1.1 fvdl #include <dev/pci/pcivar.h>
60 1.1 fvdl
61 1.1 fvdl #include <machine/bus.h>
62 1.1 fvdl #include <machine/intr.h>
63 1.1 fvdl
64 1.1 fvdl #include <dev/scsipi/scsi_all.h>
65 1.1 fvdl #include <dev/scsipi/scsipi_all.h>
66 1.1 fvdl #include <dev/scsipi/scsi_message.h>
67 1.1 fvdl #include <dev/scsipi/scsipi_debug.h>
68 1.1 fvdl #include <dev/scsipi/scsiconf.h>
69 1.1 fvdl #include <dev/scsipi/scsi_iu.h>
70 1.1 fvdl
71 1.1 fvdl #include <uvm/uvm_extern.h>
72 1.1 fvdl
73 1.1 fvdl #ifdef CAM_NEW_TRAN_CODE
74 1.1 fvdl #define AHC_NEW_TRAN_SETTINGS
75 1.1 fvdl #endif /* CAM_NEW_TRAN_CODE */
76 1.1 fvdl
77 1.1 fvdl
78 1.1 fvdl /****************************** Platform Macros *******************************/
79 1.1 fvdl #define SIM_IS_SCSIBUS_B(ahc, sim) \
80 1.1 fvdl ((sim) == ahc->platform_data->sim_b)
81 1.1 fvdl #define SIM_CHANNEL(ahc, sim) \
82 1.1 fvdl (((sim) == ahc->platform_data->sim_b) ? 'B' : 'A')
83 1.1 fvdl #define SIM_SCSI_ID(ahc, sim) \
84 1.1 fvdl (((sim) == ahc->platform_data->sim_b) ? ahc->our_id_b : ahc->our_id)
85 1.1 fvdl #define SIM_PATH(ahc, sim) \
86 1.1 fvdl (((sim) == ahc->platform_data->sim_b) ? ahc->platform_data->path_b \
87 1.1 fvdl : ahc->platform_data->path)
88 1.1 fvdl #define BUILD_SCSIID(ahc, sim, target_id, our_id) \
89 1.1 fvdl ((((target_id) << TID_SHIFT) & TID) | (our_id))
90 1.1 fvdl
91 1.1 fvdl #define SCB_GET_SIM(ahc, scb) \
92 1.1 fvdl (SCB_GET_CHANNEL(ahc, scb) == 'A' ? (ahc)->platform_data->sim \
93 1.1 fvdl : (ahc)->platform_data->sim_b)
94 1.1 fvdl
95 1.1 fvdl #ifndef offsetof
96 1.1 fvdl #define offsetof(type, member) ((size_t)(&((type *)0)->member))
97 1.1 fvdl #endif
98 1.1 fvdl /************************* Forward Declarations *******************************/
99 1.1 fvdl typedef pcireg_t ahc_dev_softc_t;
100 1.1 fvdl
101 1.1 fvdl /***************************** Bus Space/DMA **********************************/
102 1.1 fvdl #define ahc_dma_tag_create(ahc, parent_tag, alignment, boundary, \
103 1.1 fvdl lowaddr, highaddr, filter, filterarg, \
104 1.1 fvdl maxsize, nsegments, maxsegsz, flags, \
105 1.1 fvdl dma_tagp) \
106 1.1 fvdl bus_dma_tag_create(parent_tag, alignment, boundary, \
107 1.1 fvdl lowaddr, highaddr, filter, filterarg, \
108 1.1 fvdl maxsize, nsegments, maxsegsz, flags, \
109 1.1 fvdl dma_tagp)
110 1.1 fvdl
111 1.1 fvdl #define ahc_dma_tag_destroy(ahc, tag) \
112 1.1 fvdl bus_dma_tag_destroy(tag)
113 1.1 fvdl
114 1.1 fvdl #define ahc_dmamem_alloc(ahc, dmat, vaddr, flags, mapp) \
115 1.1 fvdl bus_dmamem_alloc(dmat, vaddr, flags, mapp)
116 1.1 fvdl
117 1.1 fvdl #define ahc_dmamem_free(ahc, dmat, vaddr, map) \
118 1.1 fvdl bus_dmamem_free(dmat, vaddr, map)
119 1.1 fvdl
120 1.1 fvdl #define ahc_dmamap_create(ahc, tag, flags, mapp) \
121 1.1 fvdl bus_dmamap_create(tag, flags, mapp)
122 1.1 fvdl
123 1.1 fvdl #define ahc_dmamap_destroy(ahc, tag, map) \
124 1.1 fvdl bus_dmamap_destroy(tag, map)
125 1.1 fvdl
126 1.1 fvdl #define ahc_dmamap_load(ahc, dmat, map, addr, buflen, callback, \
127 1.1 fvdl callback_arg, flags) \
128 1.1 fvdl bus_dmamap_load(dmat, map, addr, buflen, callback, callback_arg, flags)
129 1.1 fvdl
130 1.1 fvdl #define ahc_dmamap_unload(ahc, tag, map) \
131 1.1 fvdl bus_dmamap_unload(tag, map)
132 1.1 fvdl
133 1.1 fvdl /* XXX Need to update Bus DMA for partial map syncs */
134 1.1 fvdl #define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op) \
135 1.1 fvdl bus_dmamap_sync(dma_tag, dmamap, offset, len, op)
136 1.1 fvdl
137 1.1 fvdl /************************ Tunable Driver Parameters **************************/
138 1.1 fvdl /*
139 1.4 wiz * The number of DMA segments supported. The sequencer can handle any number
140 1.1 fvdl * of physically contiguous S/G entrys. To reduce the driver's memory
141 1.1 fvdl * consumption, we limit the number supported to be sufficient to handle
142 1.1 fvdl * the largest mapping supported by the kernel, MAXPHYS. Assuming the
143 1.1 fvdl * transfer is as fragmented as possible and unaligned, this turns out to
144 1.1 fvdl * be the number of paged sized transfers in MAXPHYS plus an extra element
145 1.1 fvdl * to handle any unaligned residual. The sequencer fetches SG elements
146 1.1 fvdl * in cacheline sized chucks, so make the number per-transaction an even
147 1.1 fvdl * multiple of 16 which should align us on even the largest of cacheline
148 1.1 fvdl * boundaries.
149 1.1 fvdl */
150 1.1 fvdl #define AHC_NSEG (roundup(btoc(MAXPHYS) + 1, 16))
151 1.1 fvdl
152 1.1 fvdl /* This driver supports target mode */
153 1.1 fvdl //#define AHC_TARGET_MODE 1
154 1.1 fvdl
155 1.1 fvdl /************************** Softc/SCB Platform Data ***************************/
156 1.1 fvdl struct ahc_platform_data {
157 1.1 fvdl /*
158 1.1 fvdl * Hooks into the XPT.
159 1.1 fvdl */
160 1.1 fvdl #if 0
161 1.1 fvdl struct cam_sim *sim;
162 1.1 fvdl struct cam_sim *sim_b;
163 1.1 fvdl struct cam_path *path;
164 1.1 fvdl struct cam_path *path_b;
165 1.1 fvdl
166 1.1 fvdl int regs_res_type;
167 1.1 fvdl int regs_res_id;
168 1.1 fvdl int irq_res_type;
169 1.1 fvdl struct resource *regs;
170 1.1 fvdl struct resource *irq;
171 1.1 fvdl void *ih;
172 1.1 fvdl eventhandler_tag eh;
173 1.1 fvdl #endif
174 1.1 fvdl };
175 1.1 fvdl
176 1.1 fvdl struct scb_platform_data {
177 1.1 fvdl };
178 1.1 fvdl
179 1.1 fvdl /********************************* Byte Order *********************************/
180 1.1 fvdl #define ahc_htobe16(x) htobe16(x)
181 1.1 fvdl #define ahc_htobe32(x) htobe32(x)
182 1.1 fvdl #define ahc_htobe64(x) htobe64(x)
183 1.1 fvdl #define ahc_htole16(x) htole16(x)
184 1.1 fvdl #define ahc_htole32(x) htole32(x)
185 1.1 fvdl #define ahc_htole64(x) htole64(x)
186 1.1 fvdl
187 1.1 fvdl #define ahc_be16toh(x) be16toh(x)
188 1.1 fvdl #define ahc_be32toh(x) be32toh(x)
189 1.1 fvdl #define ahc_be64toh(x) be64toh(x)
190 1.1 fvdl #define ahc_le16toh(x) le16toh(x)
191 1.1 fvdl #define ahc_le32toh(x) le32toh(x)
192 1.1 fvdl #define ahc_le64toh(x) le64toh(x)
193 1.1 fvdl
194 1.1 fvdl /************************** Timer DataStructures ******************************/
195 1.1 fvdl typedef struct callout ahc_timer_t;
196 1.1 fvdl
197 1.1 fvdl /***************************** Core Includes **********************************/
198 1.1 fvdl #if AHC_REG_PRETTY_PRINT
199 1.1 fvdl #define AIC_DEBUG_REGISTERS 1
200 1.1 fvdl #else
201 1.1 fvdl #define AIC_DEBUG_REGISTERS 0
202 1.1 fvdl #endif
203 1.1 fvdl
204 1.1 fvdl #include <dev/ic/aic7xxxvar.h>
205 1.1 fvdl
206 1.1 fvdl /***************************** Timer Facilities *******************************/
207 1.1 fvdl void ahc_timeout(void*);
208 1.1 fvdl
209 1.1 fvdl #define ahc_timer_init callout_init
210 1.1 fvdl #define ahc_timer_stop callout_stop
211 1.1 fvdl
212 1.1 fvdl static __inline void
213 1.1 fvdl ahc_timer_reset(ahc_timer_t *timer, u_int usec, ahc_callback_t *func, void *arg)
214 1.1 fvdl {
215 1.1 fvdl callout_reset(timer, (usec * hz)/1000000, func, arg);
216 1.1 fvdl }
217 1.1 fvdl
218 1.1 fvdl static __inline void
219 1.1 fvdl ahc_scb_timer_reset(struct scb *scb, u_int usec)
220 1.1 fvdl {
221 1.1 fvdl if (!(scb->xs->xs_control & XS_CTL_POLL)) {
222 1.1 fvdl callout_reset(&scb->xs->xs_callout,
223 1.1 fvdl (usec * hz)/1000000, ahc_timeout, scb);
224 1.1 fvdl }
225 1.1 fvdl }
226 1.1 fvdl
227 1.1 fvdl /*************************** Device Access ************************************/
228 1.1 fvdl #define ahc_inb(ahc, port) \
229 1.1 fvdl bus_space_read_1((ahc)->tag, (ahc)->bsh, port)
230 1.1 fvdl
231 1.1 fvdl #define ahc_outb(ahc, port, value) \
232 1.1 fvdl bus_space_write_1((ahc)->tag, (ahc)->bsh, port, value)
233 1.1 fvdl
234 1.1 fvdl #define ahc_outsb(ahc, port, valp, count) \
235 1.1 fvdl bus_space_write_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count)
236 1.1 fvdl
237 1.1 fvdl #define ahc_insb(ahc, port, valp, count) \
238 1.1 fvdl bus_space_read_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count)
239 1.1 fvdl
240 1.1 fvdl static __inline void ahc_flush_device_writes(struct ahc_softc *);
241 1.1 fvdl
242 1.1 fvdl static __inline void
243 1.1 fvdl ahc_flush_device_writes(struct ahc_softc *ahc)
244 1.1 fvdl {
245 1.1 fvdl /* XXX Is this sufficient for all architectures??? */
246 1.1 fvdl ahc_inb(ahc, INTSTAT);
247 1.1 fvdl }
248 1.1 fvdl
249 1.1 fvdl /**************************** Locking Primitives ******************************/
250 1.1 fvdl /* Lock protecting internal data structures */
251 1.1 fvdl static __inline void ahc_lockinit(struct ahc_softc *);
252 1.6 itojun static __inline void ahc_lock(struct ahc_softc *, unsigned long *);
253 1.6 itojun static __inline void ahc_unlock(struct ahc_softc *, unsigned long *);
254 1.1 fvdl
255 1.1 fvdl /* Lock held during command compeletion to the upper layer */
256 1.1 fvdl static __inline void ahc_done_lockinit(struct ahc_softc *);
257 1.6 itojun static __inline void ahc_done_lock(struct ahc_softc *, unsigned long *);
258 1.6 itojun static __inline void ahc_done_unlock(struct ahc_softc *, unsigned long *);
259 1.1 fvdl
260 1.1 fvdl /* Lock held during ahc_list manipulation and ahc softc frees */
261 1.1 fvdl static __inline void ahc_list_lockinit(void);
262 1.6 itojun static __inline void ahc_list_lock(unsigned long *);
263 1.6 itojun static __inline void ahc_list_unlock(unsigned long *);
264 1.1 fvdl
265 1.1 fvdl static __inline void
266 1.1 fvdl ahc_lockinit(struct ahc_softc *ahc)
267 1.1 fvdl {
268 1.1 fvdl }
269 1.1 fvdl
270 1.1 fvdl static __inline void
271 1.1 fvdl ahc_lock(struct ahc_softc *ahc, unsigned long *flags)
272 1.1 fvdl {
273 1.1 fvdl *flags = splbio();
274 1.1 fvdl }
275 1.1 fvdl
276 1.1 fvdl static __inline void
277 1.1 fvdl ahc_unlock(struct ahc_softc *ahc, unsigned long *flags)
278 1.1 fvdl {
279 1.1 fvdl splx(*flags);
280 1.1 fvdl }
281 1.1 fvdl
282 1.1 fvdl /* Lock held during command compeletion to the upper layer */
283 1.1 fvdl static __inline void
284 1.1 fvdl ahc_done_lockinit(struct ahc_softc *ahc)
285 1.1 fvdl {
286 1.1 fvdl }
287 1.1 fvdl
288 1.1 fvdl static __inline void
289 1.1 fvdl ahc_done_lock(struct ahc_softc *ahc, unsigned long *flags)
290 1.1 fvdl {
291 1.1 fvdl }
292 1.1 fvdl
293 1.1 fvdl static __inline void
294 1.1 fvdl ahc_done_unlock(struct ahc_softc *ahc, unsigned long *flags)
295 1.1 fvdl {
296 1.1 fvdl }
297 1.1 fvdl
298 1.1 fvdl /* Lock held during ahc_list manipulation and ahc softc frees */
299 1.1 fvdl static __inline void
300 1.1 fvdl ahc_list_lockinit()
301 1.1 fvdl {
302 1.1 fvdl }
303 1.1 fvdl
304 1.1 fvdl static __inline void
305 1.1 fvdl ahc_list_lock(unsigned long *flags)
306 1.1 fvdl {
307 1.1 fvdl }
308 1.1 fvdl
309 1.1 fvdl static __inline void
310 1.1 fvdl ahc_list_unlock(unsigned long *flags)
311 1.1 fvdl {
312 1.1 fvdl }
313 1.1 fvdl /****************************** OS Primitives *********************************/
314 1.1 fvdl #define ahc_delay DELAY
315 1.1 fvdl
316 1.1 fvdl /************************** Transaction Operations ****************************/
317 1.1 fvdl static __inline void ahc_set_transaction_status(struct scb *, uint32_t);
318 1.1 fvdl static __inline void ahc_set_scsi_status(struct scb *, uint32_t);
319 1.1 fvdl static __inline uint32_t ahc_get_transaction_status(struct scb *);
320 1.1 fvdl static __inline uint32_t ahc_get_scsi_status(struct scb *);
321 1.1 fvdl static __inline void ahc_set_transaction_tag(struct scb *, int, u_int);
322 1.1 fvdl static __inline u_long ahc_get_transfer_length(struct scb *);
323 1.1 fvdl static __inline int ahc_get_transfer_dir(struct scb *);
324 1.1 fvdl static __inline void ahc_set_residual(struct scb *, u_long);
325 1.1 fvdl static __inline void ahc_set_sense_residual(struct scb *, u_long);
326 1.1 fvdl static __inline u_long ahc_get_residual(struct scb *);
327 1.1 fvdl static __inline int ahc_perform_autosense(struct scb *);
328 1.6 itojun static __inline uint32_t ahc_get_sense_bufsize(struct ahc_softc *,
329 1.6 itojun struct scb *);
330 1.6 itojun static __inline void ahc_freeze_scb(struct scb *);
331 1.1 fvdl static __inline void ahc_platform_freeze_devq(struct ahc_softc *, struct scb *);
332 1.6 itojun static __inline int ahc_platform_abort_scbs(struct ahc_softc *, int, char,
333 1.6 itojun int, u_int, role_t, uint32_t);
334 1.1 fvdl
335 1.1 fvdl static __inline
336 1.1 fvdl void ahc_set_transaction_status(struct scb *scb, uint32_t status)
337 1.1 fvdl {
338 1.1 fvdl scb->xs->error = status;
339 1.1 fvdl }
340 1.1 fvdl
341 1.1 fvdl static __inline
342 1.1 fvdl void ahc_set_scsi_status(struct scb *scb, uint32_t status)
343 1.1 fvdl {
344 1.1 fvdl scb->xs->xs_status = status;
345 1.1 fvdl }
346 1.1 fvdl
347 1.1 fvdl static __inline
348 1.1 fvdl uint32_t ahc_get_transaction_status(struct scb *scb)
349 1.1 fvdl {
350 1.1 fvdl return (scb->xs->error);
351 1.1 fvdl }
352 1.1 fvdl
353 1.1 fvdl static __inline
354 1.1 fvdl uint32_t ahc_get_scsi_status(struct scb *scb)
355 1.1 fvdl {
356 1.1 fvdl return (scb->xs->xs_status);
357 1.1 fvdl }
358 1.1 fvdl
359 1.1 fvdl static __inline
360 1.1 fvdl void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type)
361 1.1 fvdl {
362 1.1 fvdl scb->xs->xs_tag_type = type;
363 1.1 fvdl }
364 1.1 fvdl
365 1.1 fvdl static __inline
366 1.1 fvdl u_long ahc_get_transfer_length(struct scb *scb)
367 1.1 fvdl {
368 1.1 fvdl return (scb->xs->datalen);
369 1.1 fvdl }
370 1.1 fvdl
371 1.1 fvdl static __inline
372 1.1 fvdl int ahc_get_transfer_dir(struct scb *scb)
373 1.1 fvdl {
374 1.1 fvdl return (scb->xs->xs_control & (XS_CTL_DATA_IN|XS_CTL_DATA_OUT));
375 1.1 fvdl }
376 1.1 fvdl
377 1.1 fvdl static __inline
378 1.1 fvdl void ahc_set_residual(struct scb *scb, u_long resid)
379 1.1 fvdl {
380 1.1 fvdl scb->xs->resid = resid;
381 1.1 fvdl }
382 1.1 fvdl
383 1.1 fvdl static __inline
384 1.1 fvdl void ahc_set_sense_residual(struct scb *scb, u_long resid)
385 1.1 fvdl {
386 1.1 fvdl //scb->io_ctx->csio.sense_resid = resid;
387 1.1 fvdl }
388 1.1 fvdl
389 1.1 fvdl static __inline
390 1.1 fvdl u_long ahc_get_residual(struct scb *scb)
391 1.1 fvdl {
392 1.1 fvdl return (scb->xs->resid);
393 1.1 fvdl }
394 1.1 fvdl
395 1.1 fvdl static __inline
396 1.1 fvdl int ahc_perform_autosense(struct scb *scb)
397 1.1 fvdl {
398 1.1 fvdl return (!(scb->flags & SCB_SENSE));
399 1.1 fvdl }
400 1.1 fvdl
401 1.1 fvdl static __inline uint32_t
402 1.1 fvdl ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb)
403 1.1 fvdl {
404 1.1 fvdl return (sizeof(struct scsipi_sense_data));
405 1.1 fvdl }
406 1.1 fvdl
407 1.1 fvdl static __inline void
408 1.1 fvdl ahc_freeze_scb(struct scb *scb)
409 1.1 fvdl {
410 1.1 fvdl struct scsipi_xfer *xs = scb->xs;
411 1.1 fvdl
412 1.1 fvdl if (!(scb->flags & SCB_FREEZE_QUEUE)) {
413 1.1 fvdl scsipi_periph_freeze(xs->xs_periph, 1);
414 1.1 fvdl scb->flags |= SCB_FREEZE_QUEUE;
415 1.1 fvdl }
416 1.1 fvdl }
417 1.1 fvdl
418 1.1 fvdl static __inline void
419 1.1 fvdl ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb)
420 1.1 fvdl {
421 1.1 fvdl }
422 1.1 fvdl
423 1.1 fvdl static __inline int
424 1.1 fvdl ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
425 1.1 fvdl char channel, int lun, u_int tag,
426 1.1 fvdl role_t role, uint32_t status)
427 1.1 fvdl {
428 1.1 fvdl return (0);
429 1.1 fvdl }
430 1.1 fvdl
431 1.1 fvdl static __inline void
432 1.1 fvdl ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb)
433 1.1 fvdl {
434 1.1 fvdl #ifdef _FreeBSD_
435 1.1 fvdl /* What do we do to generically handle driver resource shortages??? */
436 1.1 fvdl if ((ahc->flags & AHC_RESOURCE_SHORTAGE) != 0
437 1.1 fvdl && scb->io_ctx != NULL
438 1.1 fvdl && (scb->io_ctx->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
439 1.1 fvdl scb->io_ctx->ccb_h.status |= CAM_RELEASE_SIMQ;
440 1.1 fvdl ahc->flags &= ~AHC_RESOURCE_SHORTAGE;
441 1.1 fvdl }
442 1.1 fvdl scb->io_ctx = NULL;
443 1.1 fvdl #endif
444 1.1 fvdl }
445 1.1 fvdl
446 1.1 fvdl /********************************** PCI ***************************************/
447 1.1 fvdl #ifdef AHC_PCI_CONFIG
448 1.6 itojun static __inline uint32_t ahc_pci_read_config(ahc_dev_softc_t, int, int);
449 1.6 itojun static __inline void ahc_pci_write_config(ahc_dev_softc_t, int, uint32_t,
450 1.6 itojun int);
451 1.1 fvdl static __inline int ahc_get_pci_function(ahc_dev_softc_t);
452 1.1 fvdl static __inline int ahc_get_pci_slot(ahc_dev_softc_t);
453 1.1 fvdl static __inline int ahc_get_pci_bus(ahc_dev_softc_t);
454 1.1 fvdl
455 1.6 itojun int ahc_pci_map_registers(struct ahc_softc *);
456 1.6 itojun int ahc_pci_map_int(struct ahc_softc *);
457 1.1 fvdl
458 1.1 fvdl static __inline uint32_t
459 1.1 fvdl ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
460 1.1 fvdl {
461 1.1 fvdl return (pci_read_config(pci, reg, width));
462 1.1 fvdl }
463 1.1 fvdl
464 1.1 fvdl static __inline void
465 1.1 fvdl ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
466 1.1 fvdl {
467 1.1 fvdl pci_write_config(pci, reg, value, width);
468 1.1 fvdl }
469 1.1 fvdl
470 1.1 fvdl static __inline int
471 1.1 fvdl ahc_get_pci_function(ahc_dev_softc_t pci)
472 1.1 fvdl {
473 1.1 fvdl return (pci_get_function(pci));
474 1.1 fvdl }
475 1.1 fvdl
476 1.1 fvdl static __inline int
477 1.1 fvdl ahc_get_pci_slot(ahc_dev_softc_t pci)
478 1.1 fvdl {
479 1.1 fvdl return (pci_get_slot(pci));
480 1.1 fvdl }
481 1.1 fvdl
482 1.1 fvdl static __inline int
483 1.1 fvdl ahc_get_pci_bus(ahc_dev_softc_t pci)
484 1.1 fvdl {
485 1.1 fvdl return (pci_get_bus(pci));
486 1.1 fvdl }
487 1.1 fvdl
488 1.1 fvdl typedef enum
489 1.1 fvdl {
490 1.1 fvdl AHC_POWER_STATE_D0,
491 1.1 fvdl AHC_POWER_STATE_D1,
492 1.1 fvdl AHC_POWER_STATE_D2,
493 1.1 fvdl AHC_POWER_STATE_D3
494 1.1 fvdl } ahc_power_state;
495 1.1 fvdl
496 1.6 itojun void ahc_power_state_change(struct ahc_softc *, ahc_power_state);
497 1.1 fvdl #endif
498 1.1 fvdl /******************************** VL/EISA *************************************/
499 1.6 itojun int aic7770_map_registers(struct ahc_softc *, u_int);
500 1.6 itojun int aic7770_map_int(struct ahc_softc *, int);
501 1.1 fvdl
502 1.1 fvdl /********************************* Debug **************************************/
503 1.1 fvdl static __inline void ahc_print_path(struct ahc_softc *, struct scb *);
504 1.6 itojun static __inline void ahc_platform_dump_card_state(struct ahc_softc *);
505 1.1 fvdl
506 1.1 fvdl static __inline void
507 1.1 fvdl ahc_print_path(struct ahc_softc *ahc, struct scb *scb)
508 1.1 fvdl {
509 1.1 fvdl printf("%s:", ahc->sc_dev.dv_xname);
510 1.1 fvdl }
511 1.1 fvdl
512 1.1 fvdl static __inline void
513 1.1 fvdl ahc_platform_dump_card_state(struct ahc_softc *ahc)
514 1.1 fvdl {
515 1.1 fvdl }
516 1.1 fvdl /**************************** Transfer Settings *******************************/
517 1.1 fvdl void ahc_notify_xfer_settings_change(struct ahc_softc *,
518 1.1 fvdl struct ahc_devinfo *);
519 1.6 itojun void ahc_platform_set_tags(struct ahc_softc *, struct ahc_devinfo *, int);
520 1.1 fvdl
521 1.1 fvdl /************************* Initialization/Teardown ****************************/
522 1.6 itojun int ahc_platform_alloc(struct ahc_softc *, void *);
523 1.6 itojun void ahc_platform_free(struct ahc_softc *);
524 1.6 itojun int ahc_map_int(struct ahc_softc *);
525 1.1 fvdl int ahc_attach(struct ahc_softc *);
526 1.6 itojun int ahc_softc_comp(struct ahc_softc *, struct ahc_softc *);
527 1.6 itojun int ahc_detach(struct device *, int);
528 1.1 fvdl
529 1.1 fvdl /****************************** Interrupts ************************************/
530 1.1 fvdl void ahc_platform_intr(void *);
531 1.6 itojun static __inline void ahc_platform_flushwork(struct ahc_softc *);
532 1.1 fvdl static __inline void
533 1.1 fvdl ahc_platform_flushwork(struct ahc_softc *ahc)
534 1.1 fvdl {
535 1.1 fvdl }
536 1.1 fvdl
537 1.1 fvdl /************************ Misc Function Declarations **************************/
538 1.6 itojun void ahc_done(struct ahc_softc *, struct scb *);
539 1.6 itojun void ahc_send_async(struct ahc_softc *, char, u_int, u_int, ac_code,
540 1.6 itojun void *);
541 1.1 fvdl #endif /* _AIC7XXX_NETBSD_H_ */
542