aic7xxxvar.h revision 1.16
1 /* $NetBSD: aic7xxxvar.h,v 1.16 1998/04/16 07:13:57 leo Exp $ */ 2 3 /* 4 * Interface to the generic driver for the aic7xxx based adaptec 5 * SCSI controllers. This is used to implement product specific 6 * probe and attach routines. 7 * 8 * Copyright (c) 1994, 1995, 1996 Justin T. Gibbs. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from Id: aic7xxx.h,v 1.28 1996/05/30 07:19:59 gibbs Exp 36 */ 37 38 #ifndef _AIC7XXX_H_ 39 #define _AIC7XXX_H_ 40 41 #if defined(__FreeBSD__) 42 #include "ahc.h" /* for NAHC from config */ 43 #endif 44 45 #if defined(__NetBSD__) 46 /* 47 * convert FreeBSD's <sys/queue.h> symbols to NetBSD's 48 */ 49 #define STAILQ_ENTRY SIMPLEQ_ENTRY 50 #define STAILQ_HEAD SIMPLEQ_HEAD 51 #define STAILQ_INIT SIMPLEQ_INIT 52 #define STAILQ_INSERT_HEAD SIMPLEQ_INSERT_HEAD 53 #define STAILQ_INSERT_TAIL SIMPLEQ_INSERT_TAIL 54 #define STAILQ_REMOVE_HEAD(head, field) \ 55 SIMPLEQ_REMOVE_HEAD(head, (head)->sqh_first, field) 56 #define stqh_first sqh_first 57 #define stqe_next sqe_next 58 #endif 59 60 #if defined(__FreeBSD__) 61 #define AHC_INB(ahc, port) \ 62 inb((ahc)->baseport+(port)) 63 #define AHC_INSB(ahc, port, valp, size) \ 64 insb((ahc)->baseport+(port), valp, size) 65 #define AHC_OUTB(ahc, port, val) \ 66 outb((ahc)->baseport+(port), val) 67 #define AHC_OUTSB(ahc, port, valp, size) \ 68 outsb((ahc)->baseport+(port), valp, size) 69 #define AHC_OUTSL(ahc, port, valp, size) \ 70 outsl((ahc)->baseport+(port), valp, size) 71 #elif defined(__NetBSD__) 72 73 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 74 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 75 #endif 76 77 #define AHC_INB(ahc, port) \ 78 bus_space_read_1((ahc)->sc_st, (ahc)->sc_sh, port) 79 #define AHC_INSB(ahc, port, valp, size) \ 80 bus_space_read_multi_1((ahc)->sc_st, (ahc)->sc_sh, port, (u_int8_t *) valp, size) 81 #define AHC_OUTB(ahc, port, val) \ 82 bus_space_write_1((ahc)->sc_st, (ahc)->sc_sh, port, val) 83 #define AHC_OUTSB(ahc, port, valp, size) \ 84 bus_space_write_multi_1((ahc)->sc_st, (ahc)->sc_sh, port, (u_int8_t *) valp, size) 85 #define AHC_OUTSL(ahc, port, valp, size) \ 86 bus_space_write_multi_stream_4((ahc)->sc_st, (ahc)->sc_sh, port, (u_int32_t *) valp, size) 87 #endif 88 89 #define AHC_NSEG 256 /* number of dma segments supported */ 90 91 #define AHC_SCB_MAX 255 /* 92 * Up to 255 SCBs on some types of aic7xxx 93 * based boards. The aic7870 have 16 internal 94 * SCBs, but external SRAM bumps this to 255. 95 * The aic7770 family have only 4, and the 96 * aic7850 has only 3. 97 */ 98 99 100 typedef u_int32_t physaddr; 101 #if defined(__FreeBSD__) 102 extern u_long ahc_unit; 103 #endif 104 105 struct ahc_dma_seg { 106 physaddr addr; 107 u_int32_t len; 108 }; 109 110 typedef enum { 111 AHC_NONE = 0x000, 112 AHC_ULTRA = 0x001, /* Supports 20MHz Transfers */ 113 AHC_WIDE = 0x002, /* Wide Channel */ 114 AHC_TWIN = 0x008, /* Twin Channel */ 115 AHC_AIC7770 = 0x010, 116 AHC_AIC7850 = 0x020, 117 AHC_AIC7860 = 0x021, /* ULTRA version of the aic7850 */ 118 AHC_AIC7870 = 0x040, 119 AHC_AIC7880 = 0x041, 120 AHC_AIC78X0 = 0x060, /* PCI Based Controller */ 121 AHC_274 = 0x110, /* EISA Based Controller */ 122 AHC_284 = 0x210, /* VL/ISA Based Controller */ 123 AHC_294AU = 0x421, /* aic7860 based '2940' */ 124 AHC_294 = 0x440, /* PCI Based Controller */ 125 AHC_294U = 0x441, /* ULTRA PCI Based Controller */ 126 AHC_394 = 0x840, /* Twin Channel PCI Controller */ 127 AHC_394U = 0x841, /* Twin, ULTRA Channel PCI Controller */ 128 }ahc_type; 129 130 typedef enum { 131 AHC_FNONE = 0x00, 132 AHC_INIT = 0x01, 133 AHC_RUNNING = 0x02, 134 AHC_PAGESCBS = 0x04, /* Enable SCB paging */ 135 AHC_CHANNEL_B_PRIMARY = 0x08, /* 136 * On twin channel adapters, probe 137 * channel B first since it is the 138 * primary bus. 139 */ 140 AHC_USEDEFAULTS = 0x10, /* 141 * For cards without an seeprom 142 * or a BIOS to initialize the chip's 143 * SRAM, we use the default target 144 * settings. 145 */ 146 AHC_CHNLB = 0x20, /* 147 * Second controller on 3940 148 * Also encodes the offset in the 149 * SEEPROM for CHNLB info (32) 150 */ 151 }ahc_flag; 152 153 typedef enum { 154 SCB_FREE = 0x0000, 155 SCB_ACTIVE = 0x0001, 156 SCB_ABORTED = 0x0002, 157 SCB_DEVICE_RESET = 0x0004, 158 SCB_IMMED = 0x0008, 159 SCB_SENSE = 0x0010, 160 SCB_TIMEDOUT = 0x0020, 161 SCB_QUEUED_FOR_DONE = 0x0040, 162 SCB_PAGED_OUT = 0x0080, 163 SCB_WAITINGQ = 0x0100, 164 SCB_ASSIGNEDQ = 0x0200, 165 SCB_SENTORDEREDTAG = 0x0400, 166 SCB_MSGOUT_SDTR = 0x0800, 167 SCB_MSGOUT_WDTR = 0x1000 168 }scb_flag; 169 170 /* 171 * The driver keeps up to MAX_SCB scb structures per card in memory. Only the 172 * first 28 bytes of the structure need to be transfered to the card during 173 * normal operation. The fields starting at byte 28 are used for kernel level 174 * bookkeeping. 175 */ 176 struct scb { 177 /* ------------ Begin hardware supported fields ---------------- */ 178 /*0*/ u_char control; 179 /*1*/ u_char tcl; /* 4/1/3 bits */ 180 /*2*/ u_char status; 181 /*3*/ u_char SG_segment_count; 182 /*4*/ physaddr SG_list_pointer; 183 /*8*/ u_char residual_SG_segment_count; 184 /*9*/ u_char residual_data_count[3]; 185 /*12*/ physaddr data; 186 /*16*/ u_int32_t datalen; /* Really only three bits, but its 187 * faster to treat it as a long on 188 * a quad boundary. 189 */ 190 /*20*/ physaddr cmdpointer; 191 /*24*/ u_char cmdlen; 192 /*25*/ u_char tag; /* Index into our kernel SCB array. 193 * Also used as the tag for tagged I/O 194 */ 195 #define SCB_PIO_TRANSFER_SIZE 26 /* amount we need to upload/download 196 * via PIO to initialize a transaction. 197 */ 198 /*26*/ u_char next; /* Used for threading SCBs in the 199 * "Waiting for Selection" and 200 * "Disconnected SCB" lists down 201 * in the sequencer. 202 */ 203 /*27*/ u_char prev; 204 /*-----------------end of hardware supported fields----------------*/ 205 STAILQ_ENTRY(scb) links; /* for chaining */ 206 struct scsipi_xfer *xs; /* the scsipi_xfer for this cmd */ 207 scb_flag flags; 208 u_char position; /* Position in card's scbarray */ 209 struct ahc_dma_seg ahc_dma[AHC_NSEG]; 210 struct scsipi_sense sense_cmd; /* SCSI command block */ 211 212 #if defined(__NetBSD__) 213 /* 214 * This DMA map maps the buffer involved in the transfer. 215 * Its contents are loaded into "ahc_dma" above. 216 */ 217 bus_dmamap_t dmamap_xfer; 218 219 struct scsi_generic scsi_cmd; /* dma-able copy of xs->cmd */ 220 struct scsipi_sense_data scsi_sense; 221 #endif 222 }; 223 224 struct ahc_data { 225 #if defined(__FreeBSD__) 226 int unit; 227 #elif defined(__NetBSD__) 228 struct device sc_dev; 229 void *sc_ih; 230 bus_space_tag_t sc_st; 231 bus_space_handle_t sc_sh; 232 bus_dma_tag_t sc_dt; 233 int sc_dmaflags; 234 235 bus_dmamap_t sc_dmamap_control; /* Maps the control blocks */ 236 LIST_HEAD(, scsipi_xfer) sc_xxxq; /* XXX software request queue */ 237 struct scsipi_xfer *sc_xxxqlast; /* last entry in queue */ 238 #endif 239 ahc_type type; 240 ahc_flag flags; 241 #if defined(__FreeBSD__) 242 u_long baseport; 243 #endif 244 struct scb *scbarray[AHC_SCB_MAX]; /* Mirror boards scbarray */ 245 struct scb *pagedout_ntscbs[16];/* 246 * Paged out, non-tagged scbs 247 * indexed by target. 248 */ 249 STAILQ_HEAD(, scb) free_scbs; /* 250 * SCBs assigned to free slots 251 * on the card. (no paging required) 252 */ 253 STAILQ_HEAD(, scb) page_scbs; /* 254 * SCBs that will require paging 255 * before use (no assigned slot) 256 */ 257 STAILQ_HEAD(, scb) waiting_scbs;/* 258 * SCBs waiting to be paged in 259 * and started. 260 */ 261 STAILQ_HEAD(, scb)assigned_scbs;/* 262 * SCBs that were waiting but have 263 * now been assigned a slot by 264 * ahc_free_scb. 265 */ 266 #ifdef __NetBSD__ 267 struct scsipi_link sc_link; 268 struct scsipi_link sc_link_b; /* Second bus for Twin channel cards */ 269 #else 270 struct scsi_link sc_link; 271 struct scsi_link sc_link_b; /* Second bus for Twin channel cards */ 272 #endif 273 u_short needsdtr_orig; /* Targets we initiate sync neg with */ 274 u_short needwdtr_orig; /* Targets we initiate wide neg with */ 275 u_short needsdtr; /* Current list of negotiated targets */ 276 u_short needwdtr; /* Current list of negotiated targets */ 277 u_short sdtrpending; /* Pending SDTR to these targets */ 278 u_short wdtrpending; /* Pending WDTR to these targets */ 279 u_short tagenable; /* Targets that can handle tagqueing */ 280 u_short orderedtag; /* Targets to use ordered tag on */ 281 u_short discenable; /* Targets allowed to disconnect */ 282 u_char our_id; /* our scsi id */ 283 u_char our_id_b; /* B channel scsi id */ 284 u_char numscbs; 285 u_char activescbs; 286 u_char maxhscbs; /* Number of SCBs on the card */ 287 u_char maxscbs; /* 288 * Max SCBs we allocate total including 289 * any that will force us to page SCBs 290 */ 291 u_char qcntmask; 292 u_char unpause; 293 u_char pause; 294 u_char in_timeout; 295 }; 296 297 /* #define AHC_DEBUG */ 298 #ifdef AHC_DEBUG 299 /* Different debugging levels used when AHC_DEBUG is defined */ 300 #define AHC_SHOWMISC 0x0001 301 #define AHC_SHOWCMDS 0x0002 302 #define AHC_SHOWSCBS 0x0004 303 #define AHC_SHOWABORTS 0x0008 304 #define AHC_SHOWSENSE 0x0010 305 #define AHC_SHOWSCBCNT 0x0020 306 307 extern int ahc_debug; /* Initialized in i386/scsi/aic7xxx.c */ 308 #endif 309 310 #if defined(__FreeBSD__) 311 312 char *ahc_name __P((struct ahc_data *ahc)); 313 314 void ahc_reset __P((u_long iobase)); 315 struct ahc_data *ahc_alloc __P((int unit, u_long io_base, ahc_type type, ahc_flag flags)); 316 #elif defined(__NetBSD__) 317 318 #define ahc_name(ahc) (ahc)->sc_dev.dv_xname 319 320 void ahc_reset __P((char *devname, bus_space_tag_t st, 321 bus_space_handle_t sh)); 322 void ahc_construct __P((struct ahc_data *ahc, bus_space_tag_t st, 323 bus_space_handle_t sh, bus_dma_tag_t dt, ahc_type type, 324 ahc_flag flags)); 325 #endif 326 void ahc_free __P((struct ahc_data *)); 327 int ahc_init __P((struct ahc_data *)); 328 int ahc_attach __P((struct ahc_data *)); 329 #if defined(__FreeBSD__) 330 void ahc_intr __P((void *arg)); 331 #elif defined(__NetBSD__) 332 int ahc_intr __P((void *arg)); 333 #endif 334 335 #endif /* _AIC7XXX_H_ */ 336
Indexes created Wed Oct 01 15:09:59 GMT 2025