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aic7xxxvar.h revision 1.17
      1 /*	$NetBSD: aic7xxxvar.h,v 1.17 1998/06/22 20:02:54 sommerfe Exp $	*/
      2 
      3 /*
      4  * Interface to the generic driver for the aic7xxx based adaptec
      5  * SCSI controllers.  This is used to implement product specific
      6  * probe and attach routines.
      7  *
      8  * Copyright (c) 1994, 1995, 1996 Justin T. Gibbs.
      9  * All rights reserved.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice immediately at the beginning of the file, without modification,
     16  *    this list of conditions, and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  * 3. The name of the author may not be used to endorse or promote products
     21  *    derived from this software without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     27  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  *
     35  * from	Id: aic7xxx.h,v 1.28 1996/05/30 07:19:59 gibbs Exp
     36  */
     37 
     38 #ifndef _AIC7XXX_H_
     39 #define _AIC7XXX_H_
     40 
     41 #if defined(__FreeBSD__)
     42 #include "ahc.h"                /* for NAHC from config */
     43 #endif
     44 
     45 #if defined(__NetBSD__)
     46 
     47 #include "opt_ahc.h"		/* For AHC_DEBUG, AHC_TAGENABLE, AHC_BROKEN_CACHE */
     48 
     49 /*
     50  * convert FreeBSD's <sys/queue.h> symbols to NetBSD's
     51  */
     52 #define	STAILQ_ENTRY		SIMPLEQ_ENTRY
     53 #define	STAILQ_HEAD		SIMPLEQ_HEAD
     54 #define	STAILQ_INIT		SIMPLEQ_INIT
     55 #define	STAILQ_INSERT_HEAD	SIMPLEQ_INSERT_HEAD
     56 #define	STAILQ_INSERT_TAIL	SIMPLEQ_INSERT_TAIL
     57 #define	STAILQ_REMOVE_HEAD(head, field)	\
     58 	SIMPLEQ_REMOVE_HEAD(head, (head)->sqh_first, field)
     59 #define	stqh_first		sqh_first
     60 #define	stqe_next		sqe_next
     61 #endif
     62 
     63 #if defined(__FreeBSD__)
     64 #define	AHC_INB(ahc, port)	\
     65 	inb((ahc)->baseport+(port))
     66 #define	AHC_INSB(ahc, port, valp, size)	\
     67 	insb((ahc)->baseport+(port), valp, size)
     68 #define	AHC_OUTB(ahc, port, val)	\
     69 	outb((ahc)->baseport+(port), val)
     70 #define	AHC_OUTSB(ahc, port, valp, size)	\
     71 	outsb((ahc)->baseport+(port), valp, size)
     72 #define	AHC_OUTSL(ahc, port, valp, size)	\
     73 	outsl((ahc)->baseport+(port), valp, size)
     74 #elif defined(__NetBSD__)
     75 
     76 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
     77 #define	bus_space_write_multi_stream_4	bus_space_write_multi_4
     78 #endif
     79 
     80 #define	AHC_INB(ahc, port)	\
     81 	bus_space_read_1((ahc)->sc_st, (ahc)->sc_sh, port)
     82 #define	AHC_INSB(ahc, port, valp, size)	\
     83 	bus_space_read_multi_1((ahc)->sc_st, (ahc)->sc_sh, port, (u_int8_t *) valp, size)
     84 #define	AHC_OUTB(ahc, port, val)	\
     85 	bus_space_write_1((ahc)->sc_st, (ahc)->sc_sh, port, val)
     86 #define	AHC_OUTSB(ahc, port, valp, size)	\
     87 	bus_space_write_multi_1((ahc)->sc_st, (ahc)->sc_sh, port, (u_int8_t *) valp, size)
     88 #define	AHC_OUTSL(ahc, port, valp, size)	\
     89 	bus_space_write_multi_stream_4((ahc)->sc_st, (ahc)->sc_sh, port, (u_int32_t *) valp, size)
     90 #endif
     91 
     92 #define	AHC_NSEG	256	/* number of dma segments supported */
     93 
     94 #define AHC_SCB_MAX	255	/*
     95 				 * Up to 255 SCBs on some types of aic7xxx
     96 				 * based boards.  The aic7870 have 16 internal
     97 				 * SCBs, but external SRAM bumps this to 255.
     98 				 * The aic7770 family have only 4, and the
     99 				 * aic7850 has only 3.
    100 				 */
    101 
    102 
    103 typedef u_int32_t physaddr;
    104 #if defined(__FreeBSD__)
    105 extern u_long ahc_unit;
    106 #endif
    107 
    108 struct ahc_dma_seg {
    109 	physaddr	addr;
    110 	u_int32_t	len;
    111 };
    112 
    113 typedef enum {
    114 	AHC_NONE	= 0x000,
    115 	AHC_ULTRA	= 0x001,	/* Supports 20MHz Transfers */
    116 	AHC_WIDE  	= 0x002,	/* Wide Channel */
    117 	AHC_TWIN	= 0x008,	/* Twin Channel */
    118 	AHC_AIC7770	= 0x010,
    119 	AHC_AIC7850	= 0x020,
    120 	AHC_AIC7860	= 0x021,	/* ULTRA version of the aic7850 */
    121 	AHC_AIC7870	= 0x040,
    122 	AHC_AIC7880	= 0x041,
    123 	AHC_AIC78X0	= 0x060,	/* PCI Based Controller */
    124 	AHC_274		= 0x110,	/* EISA Based Controller */
    125 	AHC_284		= 0x210,	/* VL/ISA Based Controller */
    126 	AHC_294AU	= 0x421,	/* aic7860 based '2940' */
    127 	AHC_294		= 0x440,	/* PCI Based Controller */
    128 	AHC_294U	= 0x441,	/* ULTRA PCI Based Controller */
    129 	AHC_394		= 0x840,	/* Twin Channel PCI Controller */
    130 	AHC_394U	= 0x841,	/* Twin, ULTRA Channel PCI Controller */
    131 }ahc_type;
    132 
    133 typedef enum {
    134 	AHC_FNONE		= 0x00,
    135 	AHC_INIT		= 0x01,
    136 	AHC_RUNNING		= 0x02,
    137 	AHC_PAGESCBS		= 0x04,	/* Enable SCB paging */
    138 	AHC_CHANNEL_B_PRIMARY	= 0x08,	/*
    139 					 * On twin channel adapters, probe
    140 					 * channel B first since it is the
    141 					 * primary bus.
    142 					 */
    143 	AHC_USEDEFAULTS		= 0x10,	/*
    144 					 * For cards without an seeprom
    145 					 * or a BIOS to initialize the chip's
    146 					 * SRAM, we use the default target
    147 					 * settings.
    148 					 */
    149 	AHC_CHNLB		= 0x20,	/*
    150 					 * Second controller on 3940
    151 					 * Also encodes the offset in the
    152 					 * SEEPROM for CHNLB info (32)
    153 					 */
    154 }ahc_flag;
    155 
    156 typedef enum {
    157 	SCB_FREE		= 0x0000,
    158 	SCB_ACTIVE		= 0x0001,
    159 	SCB_ABORTED		= 0x0002,
    160 	SCB_DEVICE_RESET	= 0x0004,
    161 	SCB_IMMED		= 0x0008,
    162 	SCB_SENSE		= 0x0010,
    163 	SCB_TIMEDOUT		= 0x0020,
    164 	SCB_QUEUED_FOR_DONE	= 0x0040,
    165 	SCB_PAGED_OUT		= 0x0080,
    166 	SCB_WAITINGQ		= 0x0100,
    167 	SCB_ASSIGNEDQ		= 0x0200,
    168 	SCB_SENTORDEREDTAG	= 0x0400,
    169 	SCB_MSGOUT_SDTR		= 0x0800,
    170 	SCB_MSGOUT_WDTR		= 0x1000
    171 }scb_flag;
    172 
    173 /*
    174  * The driver keeps up to MAX_SCB scb structures per card in memory.  Only the
    175  * first 28 bytes of the structure need to be transfered to the card during
    176  * normal operation.  The fields starting at byte 28 are used for kernel level
    177  * bookkeeping.
    178  */
    179 struct scb {
    180 /* ------------    Begin hardware supported fields    ---------------- */
    181 /*0*/   u_char control;
    182 /*1*/	u_char tcl;		/* 4/1/3 bits */
    183 /*2*/	u_char status;
    184 /*3*/	u_char SG_segment_count;
    185 /*4*/	physaddr SG_list_pointer;
    186 /*8*/	u_char residual_SG_segment_count;
    187 /*9*/	u_char residual_data_count[3];
    188 /*12*/	physaddr data;
    189 /*16*/  u_int32_t datalen;		/* Really only three bits, but its
    190 					 * faster to treat it as a long on
    191 					 * a quad boundary.
    192 					 */
    193 /*20*/	physaddr cmdpointer;
    194 /*24*/	u_char cmdlen;
    195 /*25*/	u_char tag;			/* Index into our kernel SCB array.
    196 					 * Also used as the tag for tagged I/O
    197 					 */
    198 #define SCB_PIO_TRANSFER_SIZE	26 	/* amount we need to upload/download
    199 					 * via PIO to initialize a transaction.
    200 					 */
    201 /*26*/	u_char next;			/* Used for threading SCBs in the
    202 					 * "Waiting for Selection" and
    203 					 * "Disconnected SCB" lists down
    204 					 * in the sequencer.
    205 					 */
    206 /*27*/	u_char prev;
    207 /*-----------------end of hardware supported fields----------------*/
    208 	STAILQ_ENTRY(scb)	links;	/* for chaining */
    209 	struct scsipi_xfer *xs;	/* the scsipi_xfer for this cmd */
    210 	scb_flag flags;
    211 	u_char	position;	/* Position in card's scbarray */
    212 	struct ahc_dma_seg ahc_dma[AHC_NSEG];
    213 	struct scsipi_sense sense_cmd;	/* SCSI command block */
    214 
    215 #if defined(__NetBSD__)
    216 	/*
    217 	 * This DMA map maps the buffer involved in the transfer.
    218 	 * Its contents are loaded into "ahc_dma" above.
    219 	 */
    220 	bus_dmamap_t dmamap_xfer;
    221 
    222 	struct scsi_generic scsi_cmd;	/* dma-able copy of xs->cmd */
    223 	struct scsipi_sense_data scsi_sense;
    224 #endif
    225 };
    226 
    227 struct ahc_data {
    228 #if defined(__FreeBSD__)
    229 	int	unit;
    230 #elif defined(__NetBSD__)
    231 	struct device sc_dev;
    232 	void	*sc_ih;
    233 	bus_space_tag_t sc_st;
    234 	bus_space_handle_t sc_sh;
    235 	bus_dma_tag_t sc_dt;
    236 	int	sc_dmaflags;
    237 
    238 	bus_dmamap_t sc_dmamap_control;		/* Maps the control blocks */
    239 	LIST_HEAD(, scsipi_xfer) sc_xxxq;	/* XXX software request queue */
    240 	struct scsipi_xfer *sc_xxxqlast;	/* last entry in queue */
    241 #endif
    242 	ahc_type type;
    243 	ahc_flag flags;
    244 #if defined(__FreeBSD__)
    245 	u_long	baseport;
    246 #endif
    247 	struct	scb *scbarray[AHC_SCB_MAX]; /* Mirror boards scbarray */
    248 	struct	scb *pagedout_ntscbs[16];/*
    249 					  * Paged out, non-tagged scbs
    250 					  * indexed by target.
    251 					  */
    252 	STAILQ_HEAD(, scb) free_scbs;	/*
    253 					 * SCBs assigned to free slots
    254 					 * on the card. (no paging required)
    255 					 */
    256 	STAILQ_HEAD(, scb) page_scbs;	/*
    257 					 * SCBs that will require paging
    258 					 * before use (no assigned slot)
    259 					 */
    260 	STAILQ_HEAD(, scb) waiting_scbs;/*
    261 					 * SCBs waiting to be paged in
    262 					 * and started.
    263 					 */
    264 	STAILQ_HEAD(, scb)assigned_scbs;/*
    265 					 * SCBs that were waiting but have
    266 					 * now been assigned a slot by
    267 					 * ahc_free_scb.
    268 					 */
    269 #ifdef __NetBSD__
    270 	struct	scsipi_link sc_link;
    271 	struct	scsipi_link sc_link_b;	/* Second bus for Twin channel cards */
    272 #else
    273 	struct	scsi_link sc_link;
    274 	struct	scsi_link sc_link_b;	/* Second bus for Twin channel cards */
    275 #endif
    276 	u_short	needsdtr_orig;		/* Targets we initiate sync neg with */
    277 	u_short	needwdtr_orig;		/* Targets we initiate wide neg with */
    278 	u_short	needsdtr;		/* Current list of negotiated targets */
    279 	u_short needwdtr;		/* Current list of negotiated targets */
    280 	u_short sdtrpending;		/* Pending SDTR to these targets */
    281 	u_short wdtrpending;		/* Pending WDTR to these targets */
    282 	u_short	tagenable;		/* Targets that can handle tagqueing */
    283 	u_short	orderedtag;		/* Targets to use ordered tag on */
    284 	u_short	discenable;		/* Targets allowed to disconnect */
    285 	u_char	our_id;			/* our scsi id */
    286 	u_char	our_id_b;		/* B channel scsi id */
    287 	u_char	numscbs;
    288 	u_char	activescbs;
    289 	u_char  maxhscbs;		/* Number of SCBs on the card */
    290 	u_char	maxscbs;		/*
    291 					 * Max SCBs we allocate total including
    292 					 * any that will force us to page SCBs
    293 					 */
    294 	u_char	qcntmask;
    295 	u_char	unpause;
    296 	u_char	pause;
    297 	u_char	in_timeout;
    298 };
    299 
    300 /* #define AHC_DEBUG */
    301 #ifdef AHC_DEBUG
    302 /* Different debugging levels used when AHC_DEBUG is defined */
    303 #define AHC_SHOWMISC	0x0001
    304 #define AHC_SHOWCMDS	0x0002
    305 #define AHC_SHOWSCBS	0x0004
    306 #define AHC_SHOWABORTS	0x0008
    307 #define AHC_SHOWSENSE	0x0010
    308 #define AHC_SHOWSCBCNT	0x0020
    309 
    310 extern int ahc_debug; /* Initialized in i386/scsi/aic7xxx.c */
    311 #endif
    312 
    313 #if defined(__FreeBSD__)
    314 
    315 char *ahc_name __P((struct ahc_data *ahc));
    316 
    317 void ahc_reset __P((u_long iobase));
    318 struct ahc_data *ahc_alloc __P((int unit, u_long io_base, ahc_type type, ahc_flag flags));
    319 #elif defined(__NetBSD__)
    320 
    321 #define	ahc_name(ahc)	(ahc)->sc_dev.dv_xname
    322 
    323 void	ahc_reset __P((char *devname, bus_space_tag_t st,
    324 	    bus_space_handle_t sh));
    325 void	ahc_construct __P((struct ahc_data *ahc, bus_space_tag_t st,
    326 	    bus_space_handle_t sh, bus_dma_tag_t dt, ahc_type type,
    327 	    ahc_flag flags));
    328 #endif
    329 void	ahc_free __P((struct ahc_data *));
    330 int	ahc_init __P((struct ahc_data *));
    331 int	ahc_attach __P((struct ahc_data *));
    332 #if defined(__FreeBSD__)
    333 void	ahc_intr __P((void *arg));
    334 #elif defined(__NetBSD__)
    335 int	ahc_intr __P((void *arg));
    336 #endif
    337 
    338 #endif  /* _AIC7XXX_H_ */
    339