aic7xxxvar.h revision 1.3
1 /* $NetBSD: aic7xxxvar.h,v 1.3 1996/03/29 00:25:02 mycroft Exp $ */ 2 3 /* 4 * Interface to the generic driver for the aic7xxx based adaptec 5 * SCSI controllers. This is used to implement product specific 6 * probe and attach routines. 7 * 8 * Copyright (c) 1994, 1995 Justin T. Gibbs. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. Absolutely no warranty of function or purpose is made by the author 21 * Justin T. Gibbs. 22 * 4. Modifications may be freely made to this file if the above conditions 23 * are met. 24 */ 25 26 #ifndef _AIC7XXX_H_ 27 #define _AIC7XXX_H_ 28 29 #define AHC_NSEG 256 /* number of dma segments supported */ 30 31 #define AHC_SCB_MAX 16 /* 32 * Up to 16 SCBs on some types of aic7xxx based 33 * boards. The aic7770 family only have 4 34 */ 35 36 /* #define AHCDEBUG */ 37 38 typedef u_long physaddr; 39 typedef u_long physlen; 40 41 struct ahc_dma_seg { 42 physaddr seg_addr; 43 physlen seg_len; 44 }; 45 46 typedef u_char ahc_type; 47 #define AHC_NONE 0x00 48 #define AHC_WIDE 0x02 /* Wide Channel */ 49 #define AHC_TWIN 0x08 /* Twin Channel */ 50 #define AHC_274 0x10 /* EISA Based Controller */ 51 #define AHC_284 0x20 /* VL/ISA Based Controller */ 52 #define AHC_AIC7870 0x40 /* PCI Based Controller */ 53 #define AHC_294 0xc0 /* PCI Based Controller */ 54 55 /* 56 * The driver keeps up to MAX_SCB scb structures per card in memory. Only the 57 * first 26 bytes of the structure are valid for the hardware, the rest used 58 * for driver level bookeeping. The "__attribute ((packed))" tags ensure that 59 * gcc does not attempt to pad the long ints in the structure to word 60 * boundaries since the first 26 bytes of this structure must have the correct 61 * offsets for the hardware to find them. The driver is further optimized 62 * so that we only have to download the first 19 bytes since as long 63 * as we always use S/G, the last fields should be zero anyway. 64 */ 65 #if __GNUC__ >= 2 66 #if __GNUC_MINOR__ <5 67 #pragma pack(1) 68 #endif 69 #endif 70 71 struct ahc_scb { 72 /* ------------ Begin hardware supported fields ---------------- */ 73 /*1*/ u_char control; 74 #define SCB_NEEDWDTR 0x80 /* Initiate Wide Negotiation */ 75 #define SCB_NEEDSDTR 0x40 /* Initiate Sync Negotiation */ 76 #define SCB_TE 0x20 /* Tag enable */ 77 #define SCB_NEEDDMA 0x08 /* Refresh SCB from host ram */ 78 #define SCB_DIS 0x04 79 #define SCB_TAG_TYPE 0x3 80 #define SIMPLE_QUEUE 0x0 81 #define HEAD_QUEUE 0x1 82 #define OR_QUEUE 0x2 83 /*2*/ u_char target_channel_lun; /* 4/1/3 bits */ 84 /*3*/ u_char SG_segment_count; 85 /*7*/ physaddr SG_list_pointer __attribute__ ((packed)); 86 /*11*/ physaddr cmdpointer __attribute__ ((packed)); 87 /*12*/ u_char cmdlen; 88 /*14*/ u_char RESERVED[2]; /* must be zero */ 89 /*15*/ u_char target_status; 90 /*18*/ u_char residual_data_count[3]; 91 /*19*/ u_char residual_SG_segment_count; 92 #define SCB_DOWN_SIZE 19 /* amount to actually download */ 93 #define SCB_BZERO_SIZE 19 /* 94 * amount we need to clear between 95 * commands 96 */ 97 /*23*/ physaddr data __attribute__ ((packed)); 98 /*26*/ u_char datalen[3]; 99 #define SCB_UP_SIZE 26 /* 100 * amount we need to upload to perform 101 * a request sense. 102 */ 103 /*30*/ physaddr host_scb __attribute__ ((packed)); 104 /*31*/ u_char next_waiting; /* Used to thread SCBs awaiting 105 * selection 106 */ 107 #define SCB_LIST_NULL 0x10 /* SCB list equivelent to NULL */ 108 #if 0 109 /* 110 * No real point in transferring this to the 111 * SCB registers. 112 */ 113 unsigned char RESERVED[1]; 114 #endif 115 /*-----------------end of hardware supported fields----------------*/ 116 TAILQ_ENTRY(ahc_scb) chain; 117 struct scsi_xfer *xs; /* the scsi_xfer for this cmd */ 118 int flags; 119 #define SCB_FREE 0 120 #define SCB_ACTIVE 1 121 #define SCB_ABORTED 2 122 #define SCB_CHKSENSE 3 123 #define SCB_IMMED 4 124 #define SCB_IMMED_FAIL 8 125 int position; /* Position in scbarray */ 126 struct ahc_dma_seg ahc_dma[AHC_NSEG] __attribute__ ((packed)); 127 struct scsi_sense sense_cmd; /* SCSI command block */ 128 }; 129 130 #if __GNUC__ >= 2 131 #if __GNUC_MINOR__ <5 132 #pragma pack(4) 133 #endif 134 #endif 135 136 struct ahc_softc { 137 struct device sc_dev; 138 void *sc_ih; 139 140 int sc_iobase; 141 int sc_irq; 142 143 ahc_type type; 144 145 struct ahc_scb *scbarray[AHC_SCB_MAX]; /* Mirror boards scbarray */ 146 TAILQ_HEAD(, ahc_scb) free_scb; 147 int ahc_scsi_dev; /* our scsi id */ 148 int ahc_scsi_dev_b; /* B channel scsi id */ 149 struct ahc_scb *immed_ecb; /* an outstanding immediete command */ 150 struct scsi_link sc_link; 151 struct scsi_link sc_link_b; /* Second bus for Twin channel cards */ 152 u_short needsdtr_orig; /* Targets we initiate sync neg with */ 153 u_short needwdtr_orig; /* Targets we initiate wide neg with */ 154 u_short needsdtr; /* Current list of negotiated targets */ 155 u_short needwdtr; /* Current list of negotiated targets */ 156 u_short sdtrpending; /* Pending SDTR to these targets */ 157 u_short wdtrpending; /* Pending WDTR to these targets */ 158 u_short tagenable; /* Targets that can handle tagqueing */ 159 int numscbs; 160 int activescbs; 161 u_char maxscbs; 162 u_char unpause; 163 u_char pause; 164 }; 165 166 #endif /* _AIC7XXX_H_ */ 167
Indexes created Thu Oct 30 16:09:53 GMT 2025