Home | History | Annotate | Line # | Download | only in ic
am79c930reg.h revision 1.1 
      1 /*-
      2  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      3  * All rights reserved.
      4  *
      5  * This code is derived from software contributed to The NetBSD Foundation
      6  * by Bill Sommerfeld
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *        This product includes software developed by the NetBSD
     19  *        Foundation, Inc. and its contributors.
     20  * 4. Neither the name of The NetBSD Foundation nor the names of its
     21  *    contributors may be used to endorse or promote products derived
     22  *    from this software without specific prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     26  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     27  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     34  * POSSIBILITY OF SUCH DAMAGE.
     35  */
     36 
     37 /*
     38  * Device register definitions gleaned from from the AMD "Am79C930
     39  * PCnet(tm)-Mobile Single Chip Wireless LAN Media Access Controller"
     40  * data sheet, AMD Pub #20183, Rev B, amendment/0, issue date August 1997.
     41  *
     42  * As of 1999/10/23, this was available from AMD's web site in PDF
     43  * form.
     44  */
     45 
     46 
     47 /*
     48  * The 79c930 contains a bus interface unit, a media access
     49  * controller, and a tranceiver attachment interface.
     50  * The MAC contains an 80188 CPU core.
     51  * typical devices built around this chip typically add 32k or 64k of
     52  * memory for buffers.
     53  *
     54  * The 80188 runs firmware which handles most of the 802.11 gorp, and
     55  * communicates with the host using shared data structures in this
     56  * memory; the specifics of the shared memory layout are not covered
     57  * in this source file; see <dev/ic/am80211fw.h> for details of that layer.
     58  */
     59 
     60 /*
     61  * Device Registers
     62  */
     63 
     64 #define AM79C930_IO_BASE	0
     65 #define AM79C930_IO_SIZE	16
     66 #define AM79C930_IO_SIZE_BIG	40
     67 
     68 
     69 #define AM79C930_GCR	0	/* General Config Register */
     70 
     71 #define AM79C930_GCR_SWRESET	0x80	/* software reset */
     72 #define AM79C930_GCR_CORESET	0x40	/* core reset */
     73 #define AM79C930_GCR_DISPWDN	0x20	/* disable powerdown */
     74 #define AM79C930_GCR_ECWAIT	0x10	/* embedded controller wait */
     75 #define AM79C930_GCR_ECINT	0x08 	/* interrupt from embedded ctrlr */
     76 #define AM79C930_GCR_INT2EC	0x04 	/* interrupt to embedded ctrlr */
     77 #define AM79C930_GCR_ENECINT	0x02 	/* enable interrupts from e.c. */
     78 #define AM79C930_GCR_DAM	0x01 	/* direct access mode (read only) */
     79 
     80 #define AM79C930_GCR_BITS "\020\1DAM\2ENECINT\3INT2EC\4ECINT\5ECWAIT\6DISPWDN\7CORESET\010SWRESET"
     81 
     82 #define AM79C930_BSS	1	/* Bank Switching Select register */
     83 
     84 #define AM79C930_BSS_ECATR	0x80 	/* E.C. ALE test read */
     85 #define AM79C930_BSS_FS		0x20 	/* Flash Select */
     86 #define AM79C930_BSS_MBS	0x18	/* Memory Bank Select */
     87 #define AM79C930_BSS_EIOW	0x04 	/* Expand I/O Window */
     88 #define AM79C930_BSS_TBS	0x03 	/* TAI Bank Select */
     89 
     90 #define AM79C930_LMA_LO	2	/* Local Memory Address register (low byte) */
     91 
     92 #define AM79C930_LMA_HI 3	/* Local Memory Address register (high byte) */
     93 
     94 				/* set this bit to turn off ISAPnP version */
     95 #define AM79C930_LMA_HI_ISAPWRDWN	0x80
     96 
     97 /*
     98  * mmm, inconsistancy in chip documentation:
     99  * According to page 79--80, all four of the following are equivalent
    100  * and address the single byte pointed at by BSS_{FS,MBS} | LMA_{HI,LO}
    101  * According to tables on p63 and p67, they're the LSB through MSB
    102  * of a 32-bit word.
    103  */
    104 
    105 #define AM79C930_IODPA		4 /* I/O Data port A */
    106 #define AM79C930_IODPB		5 /* I/O Data port B */
    107 #define AM79C930_IODPC	        6 /* I/O Data port C */
    108 #define AM79C930_IODPD		7 /* I/O Data port D */
    109 
    110 
    111 /*
    112  * Tranceiver Attachment Interface Registers (TIR space)
    113  * (omitted for now, since host access to them is for diagnostic
    114  * purposes only).
    115  */
    116 
    117 /*
    118  * memory space goo.
    119  */
    120 
    121 #define AM79C930_MEM_SIZE	0x8000		 /* 32k */
    122 #define AM79C930_MEM_BASE	0x0		 /* starting at 0 */
    123