anreg.h revision 1.3.2.3
1 /* $NetBSD: anreg.h,v 1.3.2.3 2001/03/11 22:18:50 he Exp $ */ 2 /* 3 * Copyright (c) 1997, 1998, 1999 4 * Bill Paul <wpaul (at) ctr.columbia.edu>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Bill Paul. 17 * 4. Neither the name of the author nor the names of any co-contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/dev/an/if_anreg.h,v 1.3 2000/11/13 23:04:12 wpaul Exp $ 34 */ 35 36 #define AN_TIMEOUT 65536 37 38 /* Default network name: ANY */ 39 #define AN_DEFAULT_NETNAME "" 40 41 /* The nodename must be less than 16 bytes */ 42 #define AN_DEFAULT_NODENAME "NetBSD" 43 44 #define AN_DEFAULT_IBSS "NetBSD IBSS" 45 46 /* 47 * register space access macros 48 */ 49 #define CSR_WRITE_2(sc, reg, val) \ 50 bus_space_write_2(sc->an_btag, sc->an_bhandle, reg, val) 51 52 #define CSR_READ_2(sc, reg) \ 53 bus_space_read_2(sc->an_btag, sc->an_bhandle, reg) 54 55 #define CSR_WRITE_1(sc, reg, val) \ 56 bus_space_write_1(sc->an_btag, sc->an_bhandle, reg, val) 57 58 #define CSR_READ_1(sc, reg) \ 59 bus_space_read_1(sc->an_btag, sc->an_bhandle, reg) 60 61 /* 62 * Size of Aironet I/O space. 63 */ 64 #define AN_IOSIZ 0x40 65 66 /* 67 * Hermes register definitions and what little I know about them. 68 */ 69 70 /* Hermes command/status registers. */ 71 #define AN_COMMAND 0x00 72 #define AN_PARAM0 0x02 73 #define AN_PARAM1 0x04 74 #define AN_PARAM2 0x06 75 #define AN_STATUS 0x08 76 #define AN_RESP0 0x0A 77 #define AN_RESP1 0x0C 78 #define AN_RESP2 0x0E 79 #define AN_LINKSTAT 0x10 80 81 /* Command register */ 82 #define AN_CMD_BUSY 0x8000 /* busy bit */ 83 #define AN_CMD_NO_ACK 0x0080 /* don't acknowledge command */ 84 #define AN_CMD_CODE_MASK 0x003F 85 #define AN_CMD_QUAL_MASK 0x7F00 86 87 /* Command codes */ 88 #define AN_CMD_NOOP 0x0000 /* no-op */ 89 #define AN_CMD_ENABLE 0x0001 /* enable */ 90 #define AN_CMD_DISABLE 0x0002 /* disable */ 91 #define AN_CMD_FORCE_SYNCLOSS 0x0003 /* force loss of sync */ 92 #define AN_CMD_FW_RESTART 0x0004 /* firmware resrart */ 93 #define AN_CMD_HOST_SLEEP 0x0005 94 #define AN_CMD_MAGIC_PKT 0x0006 95 #define AN_CMD_READCFG 0x0008 96 #define AN_CMD_ALLOC_MEM 0x000A /* allocate NIC memory */ 97 #define AN_CMD_TX 0x000B /* transmit */ 98 #define AN_CMD_DEALLOC_MEM 0x000C 99 #define AN_CMD_NOOP2 0x0010 100 #define AN_CMD_ACCESS 0x0021 101 #define AN_CMD_ALLOC_BUF 0x0028 102 #define AN_CMD_PSP_NODES 0x0030 103 #define AN_CMD_SET_PHYREG 0x003E 104 #define AN_CMD_TX_TEST 0x003F 105 #define AN_CMD_SLEEP 0x0085 106 #define AN_CMD_SAVECFG 0x0108 107 108 /* 109 * Reclaim qualifier bit, applicable to the 110 * TX command. 111 */ 112 #define AN_RECLAIM 0x0100 /* reclaim NIC memory */ 113 114 /* 115 * ACCESS command qualifier bits. 116 */ 117 #define AN_ACCESS_READ 0x0000 118 #define AN_ACCESS_WRITE 0x0100 119 120 /* 121 * PROGRAM command qualifier bits. 122 */ 123 #define AN_PROGRAM_DISABLE 0x0000 124 #define AN_PROGRAM_ENABLE_RAM 0x0100 125 #define AN_PROGRAM_ENABLE_NVRAM 0x0200 126 #define AN_PROGRAM_NVRAM 0x0300 127 128 /* Status register values */ 129 #define AN_STAT_CMD_CODE 0x003F 130 #define AN_STAT_CMD_RESULT 0x7F00 131 132 /* Linkstat register */ 133 #define AN_LINKSTAT_ASSOCIATED 0x0400 134 #define AN_LINKSTAT_AUTHFAIL 0x0300 135 #define AN_LINKSTAT_ASSOC_FAIL 0x8400 136 #define AN_LINKSTAT_DISASSOC 0x8200 137 #define AN_LINKSTAT_DEAUTH 0x8100 138 #define AN_LINKSTAT_SYNCLOST_TSF 0x8004 139 #define AN_LINKSTAT_SYNCLOST_HOSTREQ 0x8003 140 #define AN_LINKSTAT_SYNCLOST_AVGRETRY 0x8002 141 #define AN_LINKSTAT_SYNCLOST_MAXRETRY 0x8001 142 #define AN_LINKSTAT_SYNCLOST_MISSBEACON 0x8000 143 144 /* memory handle management registers */ 145 #define AN_RX_FID 0x20 146 #define AN_ALLOC_FID 0x22 147 #define AN_TX_CMP_FID 0x24 148 149 /* 150 * Buffer Access Path (BAP) registers. 151 * These are I/O channels. I believe you can use each one for 152 * any desired purpose independently of the other. In general 153 * though, we use BAP1 for reading and writing LTV records and 154 * reading received data frames, and BAP0 for writing transmit 155 * frames. This is a convention though, not a rule. 156 */ 157 #define AN_SEL0 0x18 158 #define AN_SEL1 0x1A 159 #define AN_OFF0 0x1C 160 #define AN_OFF1 0x1E 161 #define AN_DATA0 0x36 162 #define AN_DATA1 0x38 163 #define AN_BAP0 AN_DATA0 164 #define AN_BAP1 AN_DATA1 165 166 #define AN_OFF_BUSY 0x8000 167 #define AN_OFF_ERR 0x4000 168 #define AN_OFF_DONE 0x2000 169 #define AN_OFF_DATAOFF 0x0FFF 170 171 /* Event registers */ 172 #define AN_EVENT_STAT 0x30 /* Event status */ 173 #define AN_INT_EN 0x32 /* Interrupt enable/disable */ 174 #define AN_EVENT_ACK 0x34 /* Ack event */ 175 176 /* Events */ 177 #define AN_EV_CLR_STUCK_BUSY 0x4000 /* clear stuck busy bit */ 178 #define AN_EV_WAKEREQUEST 0x2000 /* awaken from PSP mode */ 179 #define AN_EV_AWAKE 0x0100 /* station woke up from PSP mode*/ 180 #define AN_EV_LINKSTAT 0x0080 /* link status available */ 181 #define AN_EV_CMD 0x0010 /* command completed */ 182 #define AN_EV_ALLOC 0x0008 /* async alloc/reclaim completed */ 183 #define AN_EV_TX_EXC 0x0004 /* async xmit completed with failure */ 184 #define AN_EV_TX 0x0002 /* async xmit completed succesfully */ 185 #define AN_EV_RX 0x0001 /* async rx completed */ 186 187 #define AN_INTRS \ 188 (AN_EV_RX|AN_EV_TX|AN_EV_TX_EXC|AN_EV_ALLOC|AN_EV_LINKSTAT) 189 190 /* Host software registers */ 191 #define AN_SW0 0x28 192 #define AN_SW1 0x2A 193 #define AN_SW2 0x2C 194 #define AN_SW3 0x2E 195 196 #define AN_CNTL 0x14 197 198 #define AN_CNTL_AUX_ENA 0xC000 199 #define AN_CNTL_AUX_ENA_STAT 0xC000 200 #define AN_CNTL_AUX_DIS_STAT 0x0000 201 #define AN_CNTL_AUX_ENA_CNTL 0x8000 202 #define AN_CNTL_AUX_DIS_CNTL 0x4000 203 204 #define AN_AUX_PAGE 0x3A 205 #define AN_AUX_OFFSET 0x3C 206 #define AN_AUX_DATA 0x3E 207 208 /* 209 * Length, Type, Value (LTV) record definitions and RID values. 210 */ 211 struct an_ltv_gen { 212 u_int16_t an_len; 213 u_int16_t an_type; 214 u_int16_t an_val; 215 }; 216 217 /* 218 * General configuration information. 219 */ 220 #define AN_RID_GENCONFIG 0xFF10 221 struct an_ltv_genconfig { 222 /* General configuration. */ 223 u_int16_t an_len; /* 0x00 */ 224 u_int16_t an_type; /* XXXX */ 225 u_int16_t an_opmode; /* 0x02 */ 226 u_int16_t an_rxmode; /* 0x04 */ 227 u_int16_t an_fragthresh; /* 0x06 */ 228 u_int16_t an_rtsthresh; /* 0x08 */ 229 u_int8_t an_macaddr[6]; /* 0x0A */ 230 u_int8_t an_rates[8]; /* 0x10 */ 231 u_int16_t an_shortretry_limit; /* 0x18 */ 232 u_int16_t an_longretry_limit; /* 0x1A */ 233 u_int16_t an_tx_msdu_lifetime; /* 0x1C */ 234 u_int16_t an_rx_msdu_lifetime; /* 0x1E */ 235 u_int16_t an_stationary; /* 0x20 */ 236 u_int16_t an_ordering; /* 0x22 */ 237 u_int16_t an_devtype; /* 0x24 */ 238 u_int16_t an_rsvd0[5]; /* 0x26 */ 239 /* Scanning associating. */ 240 u_int16_t an_scanmode; /* 0x30 */ 241 u_int16_t an_probedelay; /* 0x32 */ 242 u_int16_t an_probe_energy_timeout;/* 0x34 */ 243 u_int16_t an_probe_response_timeout;/*0x36 */ 244 u_int16_t an_beacon_listen_timeout;/*0x38 */ 245 u_int16_t an_ibss_join_net_timeout;/*0x3A */ 246 u_int16_t an_auth_timeout; /* 0x3C */ 247 u_int16_t an_authtype; /* 0x3E */ 248 u_int16_t an_assoc_timeout; /* 0x40 */ 249 u_int16_t an_specified_ap_timeout;/* 0x42 */ 250 u_int16_t an_offline_scan_interval;/*0x44 */ 251 u_int16_t an_offline_scan_duration;/*0x46 */ 252 u_int16_t an_link_loss_delay; /* 0x48 */ 253 u_int16_t an_max_beacon_lost_time;/* 0x4A */ 254 u_int16_t an_refresh_interval; /* 0x4C */ 255 u_int16_t an_rsvd1; /* 0x4E */ 256 /* Power save operation */ 257 u_int16_t an_psave_mode; /* 0x50 */ 258 u_int16_t an_sleep_for_dtims; /* 0x52 */ 259 u_int16_t an_listen_interval; /* 0x54 */ 260 u_int16_t an_fast_listen_interval;/* 0x56 */ 261 u_int16_t an_listen_decay; /* 0x58 */ 262 u_int16_t an_fast_listen_decay; /* 0x5A */ 263 u_int16_t an_rsvd2[2]; /* 0x5C */ 264 /* Ad-hoc (or AP) operation. */ 265 u_int16_t an_beacon_period; /* 0x60 */ 266 u_int16_t an_atim_duration; /* 0x62 */ 267 u_int16_t an_rsvd3; /* 0x64 */ 268 u_int16_t an_ds_channel; /* 0x66 */ 269 u_int16_t an_rsvd4; /* 0x68 */ 270 u_int16_t an_dtim_period; /* 0x6A */ 271 u_int16_t an_rsvd5[2]; /* 0x6C */ 272 /* Radio operation. */ 273 u_int16_t an_radiotype; /* 0x70 */ 274 u_int16_t an_diversity; /* 0x72 */ 275 u_int16_t an_tx_power; /* 0x74 */ 276 u_int16_t an_rss_thresh; /* 0x76 */ 277 u_int16_t an_modulation_type; /* 0x78 */ 278 u_int16_t an_short_preamble; /* 0x7A */ 279 u_int16_t an_home_product; /* 0x7C */ 280 u_int16_t an_rsvd6; /* 0x7E */ 281 /* Aironet extensions. */ 282 u_int8_t an_nodename[16]; /* 0x80 */ 283 u_int16_t an_arl_thresh; /* 0x90 */ 284 u_int16_t an_arl_decay; /* 0x92 */ 285 u_int16_t an_arl_delay; /* 0x94 */ 286 u_int8_t an_rsvd7; /* 0x96 */ 287 u_int8_t an_rsvd8; /* 0x97 */ 288 u_int8_t an_magic_packet_action; /* 0x98 */ 289 u_int8_t an_magic_packet_ctl; /* 0x99 */ 290 u_int16_t an_rsvd9; 291 }; 292 293 #define AN_OPMODE_IBSS_ADHOC 0x0000 294 #define AN_OPMODE_INFRASTRUCTURE_STATION 0x0001 295 #define AN_OPMODE_AP 0x0002 296 #define AN_OPMODE_AP_REPEATER 0x0003 297 #define AN_OPMODE_UNMODIFIED_PAYLOAD 0x0100 298 #define AN_OPMODE_AIRONET_EXTENSIONS 0x0200 299 #define AN_OPMODE_AP_EXTENSIONS 0x0400 300 301 #define AN_RXMODE_BC_MC_ADDR 0x0000 302 #define AN_RXMODE_BC_ADDR 0x0001 303 #define AN_RXMODE_ADDR 0x0002 304 #define AN_RXMODE_80211_MONITOR_CURBSS 0x0003 305 #define AN_RXMODE_80211_MONITOR_ANYBSS 0x0004 306 #define AN_RXMODE_LAN_MONITOR_CURBSS 0x0005 307 #define AN_RXMODE_NO_8023_HEADER 0x0100 308 309 #define AN_RATE_1MBPS 0x0002 310 #define AN_RATE_2MBPS 0x0004 311 #define AN_RATE_5_5MBPS 0x000B 312 #define AN_RATE_11MBPS 0x0016 313 314 #define AN_DEVTYPE_PC4500 0x0065 315 #define AN_DEVTYPE_PC4800 0x006D 316 317 #define AN_SCANMODE_ACTIVE 0x0000 318 #define AN_SCANMODE_PASSIVE 0x0001 319 #define AN_SCANMODE_AIRONET_ACTIVE 0x0002 320 321 #define AN_AUTHTYPE_NONE 0x0000 322 #define AN_AUTHTYPE_OPEN 0x0001 323 #define AN_AUTHTYPE_SHAREDKEY 0x0002 324 #define AN_AUTHTYPE_EXCLUDE_UNENCRYPTED 0x0004 325 326 #define AN_PSAVE_NONE 0x0000 327 #define AN_PSAVE_CAM 0x0001 328 #define AN_PSAVE_PSP 0x0002 329 #define AN_PSAVE_PSP_CAM 0x0003 330 331 #define AN_RADIOTYPE_80211_FH 0x0001 332 #define AN_RADIOTYPE_80211_DS 0x0002 333 #define AN_RADIOTYPE_LM2000_DS 0x0004 334 335 #define AN_DIVERSITY_FACTORY_DEFAULT 0x0000 336 #define AN_DIVERSITY_ANTENNA_1_ONLY 0x0001 337 #define AN_DIVERSITY_ANTENNA_2_ONLY 0x0002 338 #define AN_DIVERSITY_ANTENNA_1_AND_2 0x0003 339 340 #define AN_TXPOWER_FACTORY_DEFAULT 0x0000 341 #define AN_TXPOWER_50MW 50 342 #define AN_TXPOWER_100MW 100 343 #define AN_TXPOWER_250MW 250 344 345 /* 346 * Valid SSID list. You can specify up to three SSIDs denoting 347 * the service sets that you want to join. The first SSID always 348 * defaults to "tsunami" which is a handy way to detect the 349 * card. 350 */ 351 #define AN_RID_SSIDLIST 0xFF11 352 struct an_ltv_ssidlist { 353 u_int16_t an_len; 354 u_int16_t an_type; 355 u_int16_t an_ssid1_len; 356 char an_ssid1[32]; 357 u_int16_t an_ssid2_len; 358 char an_ssid2[32]; 359 u_int16_t an_ssid3_len; 360 char an_ssid3[32]; 361 }; 362 363 #define AN_DEF_SSID_LEN 7 364 #define AN_DEF_SSID "tsunami" 365 366 /* 367 * Valid AP list. 368 */ 369 #define AN_RID_APLIST 0xFF12 370 struct an_ltv_aplist { 371 u_int16_t an_len; 372 u_int16_t an_type; 373 u_int8_t an_ap1[8]; 374 u_int8_t an_ap2[8]; 375 u_int8_t an_ap3[8]; 376 u_int8_t an_ap4[8]; 377 }; 378 379 /* 380 * Driver name. 381 */ 382 #define AN_RID_DRVNAME 0xFF13 383 struct an_ltv_drvname { 384 u_int16_t an_len; 385 u_int16_t an_type; 386 u_int8_t an_drvname[16]; 387 }; 388 389 /* 390 * Frame encapsulation. 391 */ 392 #define AN_RID_ENCAP 0xFF14 393 struct an_rid_encap { 394 u_int16_t an_len; 395 u_int16_t an_type; 396 u_int16_t an_ethertype_default; 397 u_int16_t an_action_default; 398 u_int16_t an_ethertype0; 399 u_int16_t an_action0; 400 u_int16_t an_ethertype1; 401 u_int16_t an_action1; 402 u_int16_t an_ethertype2; 403 u_int16_t an_action2; 404 u_int16_t an_ethertype3; 405 u_int16_t an_action3; 406 u_int16_t an_ethertype4; 407 u_int16_t an_action4; 408 u_int16_t an_ethertype5; 409 u_int16_t an_action5; 410 u_int16_t an_ethertype6; 411 u_int16_t an_action6; 412 }; 413 414 #define AN_ENCAP_ACTION_RX 0x0001 415 #define AN_ENCAP_ACTION_TX 0x0002 416 417 #define AN_RXENCAP_NONE 0x0000 418 #define AN_RXENCAP_RFC1024 0x0001 419 420 #define AN_TXENCAP_RFC1024 0x0000 421 #define AN_TXENCAP_80211 0x0002 422 423 #define AN_RID_WEP_TEMP 0xFF15 424 #define AN_RID_WEP_PERM 0xFF16 425 426 /* 427 * Actual config, same structure as general config (read only). 428 */ 429 #define AN_RID_ACTUALCFG 0xFF20 430 431 /* 432 * Card capabilities (read only). 433 */ 434 #define AN_RID_CAPABILITIES 0xFF00 435 struct an_ltv_caps { 436 u_int16_t an_len; /* 0x00 */ 437 u_int16_t an_type; /* XXXX */ 438 u_int8_t an_oui[3]; /* 0x02 */ 439 u_int8_t an_rsvd0; /* 0x05 */ 440 u_int16_t an_prodnum; /* 0x06 */ 441 u_int8_t an_manufname[32]; /* 0x08 */ 442 u_int8_t an_prodname[16]; /* 0x28 */ 443 u_int8_t an_prodvers[8]; /* 0x38 */ 444 u_int8_t an_oemaddr[6]; /* 0x40 */ 445 u_int8_t an_aironetaddr[6]; /* 0x46 */ 446 u_int16_t an_radiotype; /* 0x4C */ 447 u_int16_t an_regdomain; /* 0x4E */ 448 u_int8_t an_callid[6]; /* 0x50 */ 449 u_int8_t an_rates[8]; /* 0x56 */ 450 u_int8_t an_rx_diversity; /* 0x5E */ 451 u_int8_t an_tx_diversity; /* 0x5F */ 452 u_int16_t an_tx_powerlevels[8]; /* 0x60 */ 453 u_int16_t an_hwrev; /* 0x70 */ 454 u_int16_t an_hwcaps; /* 0x72 */ 455 u_int16_t an_temprange; /* 0x74 */ 456 u_int16_t an_fwrev; /* 0x76 */ 457 u_int16_t an_fwsubrev; /* 0x78 */ 458 u_int16_t an_ifacerev; /* 0x7A */ 459 u_int16_t an_softcaps; /* 0x7C */ 460 u_int16_t an_bootblockrev; /* 0x7E */ 461 u_int16_t an_req_hw_support; /* 0x80 */ 462 }; 463 464 /* 465 * Access point (read only) 466 */ 467 #define AN_RID_APINFO 0xFF01 468 struct an_ltv_apinfo { 469 u_int16_t an_len; 470 u_int16_t an_type; 471 u_int16_t an_tim_addr; 472 u_int16_t an_airo_addr; 473 }; 474 475 /* 476 * Radio info (read only). 477 */ 478 #define AN_RID_RADIOINFO 0xFF02 479 struct an_ltv_radioinfo { 480 u_int16_t an_len; 481 u_int16_t an_type; 482 /* ??? */ 483 }; 484 485 /* 486 * Status (read only). Note: the manual claims this RID is 108 bytes 487 * long (0x6A is the last datum, which is 2 bytes long) however when 488 * this RID is read from the NIC, it returns a length of 110 or 112. 489 * To be on the safe side, this structure is padded with 4 extra 16-bit 490 * words. (There is a misprint in the manual which says the macaddr 491 * field is 8 bytes long.) 492 * 493 * Also, the channel_set and current_channel fields appear to be 494 * reversed. Either that, or the hop_period field is unused. 495 */ 496 #define AN_RID_STATUS 0xFF50 497 struct an_ltv_status { 498 u_int16_t an_len; /* 0x00 */ 499 u_int16_t an_type; /* 0xXX */ 500 u_int8_t an_macaddr[6]; /* 0x02 */ 501 u_int16_t an_opmode; /* 0x08 */ 502 u_int16_t an_errcode; /* 0x0A */ 503 u_int16_t an_cur_signal_strength; /* 0x0C */ 504 u_int16_t an_ssidlen; /* 0x0E */ 505 u_int8_t an_ssid[32]; /* 0x10 */ 506 u_int8_t an_ap_name[16]; /* 0x30 */ 507 u_int8_t an_cur_bssid[6]; /* 0x40 */ 508 u_int8_t an_prev_bssid1[6]; /* 0x46 */ 509 u_int8_t an_prev_bssid2[6]; /* 0x4C */ 510 u_int8_t an_prev_bssid3[6]; /* 0x52 */ 511 u_int16_t an_beacon_period; /* 0x58 */ 512 u_int16_t an_dtim_period; /* 0x5A */ 513 u_int16_t an_atim_duration; /* 0x5C */ 514 u_int16_t an_hop_period; /* 0x5E */ 515 u_int16_t an_cur_channel; /* 0x62 */ 516 u_int16_t an_channel_set; /* 0x60 */ 517 u_int16_t an_hops_to_backbone; /* 0x64 */ 518 u_int16_t an_ap_total_load; /* 0x66 */ 519 u_int16_t an_our_generated_load; /* 0x68 */ 520 u_int16_t an_accumulated_arl; /* 0x6A */ 521 u_int16_t an_cur_signal_quality; /* 0x6C */ 522 u_int16_t an_current_tx_rate; /* 0x6E */ 523 u_int16_t an_ap_device; /* 0x70 */ 524 u_int16_t an_normalized_rssi; /* 0x72 */ 525 u_int16_t an_short_pre_in_use; /* 0x74 */ 526 u_int8_t an_ap_ip_addr[4]; /* 0x76 */ 527 u_int16_t an_max_noise_prev_sec; /* 0x7A */ 528 u_int16_t an_avg_noise_prev_min; /* 0x7C */ 529 u_int16_t an_max_noise_prev_min; /* 0x7E */ 530 u_int16_t an_spare[4]; 531 }; 532 533 #define AN_STATUS_OPMODE_CONFIGURED 0x0001 534 #define AN_STATUS_OPMODE_MAC_ENABLED 0x0002 535 #define AN_STATUS_OPMODE_RX_ENABLED 0x0004 536 #define AN_STATUS_OPMODE_IN_SYNC 0x0010 537 #define AN_STATUS_OPMODE_ASSOCIATED 0x0020 538 #define AN_STATUS_OPMODE_ERROR 0x8000 539 540 541 /* 542 * Statistics 543 */ 544 #define AN_RID_16BITS_CUM 0xFF60 /* Cumulative 16-bit stats counters */ 545 #define AN_RID_16BITS_DELTA 0xFF61 /* 16-bit stats (since last clear) */ 546 #define AN_RID_16BITS_DELTACLR 0xFF62 /* 16-bit stats, clear on read */ 547 #define AN_RID_32BITS_CUM 0xFF68 /* Cumulative 32-bit stats counters */ 548 #define AN_RID_32BITS_DELTA 0xFF69 /* 32-bit stats (since last clear) */ 549 #define AN_RID_32BITS_DELTACLR 0xFF6A /* 32-bit stats, clear on read */ 550 551 /* 552 * Grrr. The manual says the statistics record is 384 bytes in length, 553 * but the card says the record is 404 bytes. There's some padding left 554 * at the end of this structure to account for any discrepancies. 555 */ 556 struct an_ltv_stats { 557 u_int16_t an_fudge; 558 u_int16_t an_len; /* 0x00 */ 559 u_int16_t an_type; /* 0xXX */ 560 u_int16_t an_spacer; /* 0x02 */ 561 u_int32_t an_rx_overruns; /* 0x04 */ 562 u_int32_t an_rx_plcp_csum_errs; /* 0x08 */ 563 u_int32_t an_rx_plcp_format_errs; /* 0x0C */ 564 u_int32_t an_rx_plcp_len_errs; /* 0x10 */ 565 u_int32_t an_rx_mac_crc_errs; /* 0x14 */ 566 u_int32_t an_rx_mac_crc_ok; /* 0x18 */ 567 u_int32_t an_rx_wep_errs; /* 0x1C */ 568 u_int32_t an_rx_wep_ok; /* 0x20 */ 569 u_int32_t an_retry_long; /* 0x24 */ 570 u_int32_t an_retry_short; /* 0x28 */ 571 u_int32_t an_retry_max; /* 0x2C */ 572 u_int32_t an_no_ack; /* 0x30 */ 573 u_int32_t an_no_cts; /* 0x34 */ 574 u_int32_t an_rx_ack_ok; /* 0x38 */ 575 u_int32_t an_rx_cts_ok; /* 0x3C */ 576 u_int32_t an_tx_ack_ok; /* 0x40 */ 577 u_int32_t an_tx_rts_ok; /* 0x44 */ 578 u_int32_t an_tx_cts_ok; /* 0x48 */ 579 u_int32_t an_tx_lmac_mcasts; /* 0x4C */ 580 u_int32_t an_tx_lmac_bcasts; /* 0x50 */ 581 u_int32_t an_tx_lmac_ucast_frags; /* 0x54 */ 582 u_int32_t an_tx_lmac_ucasts; /* 0x58 */ 583 u_int32_t an_tx_beacons; /* 0x5C */ 584 u_int32_t an_rx_beacons; /* 0x60 */ 585 u_int32_t an_tx_single_cols; /* 0x64 */ 586 u_int32_t an_tx_multi_cols; /* 0x68 */ 587 u_int32_t an_tx_defers_no; /* 0x6C */ 588 u_int32_t an_tx_defers_prot; /* 0x70 */ 589 u_int32_t an_tx_defers_energy; /* 0x74 */ 590 u_int32_t an_rx_dups; /* 0x78 */ 591 u_int32_t an_rx_partial; /* 0x7C */ 592 u_int32_t an_tx_too_old; /* 0x80 */ 593 u_int32_t an_rx_too_old; /* 0x84 */ 594 u_int32_t an_lostsync_max_retries;/* 0x88 */ 595 u_int32_t an_lostsync_missed_beacons;/* 0x8C */ 596 u_int32_t an_lostsync_arl_exceeded;/*0x90 */ 597 u_int32_t an_lostsync_deauthed; /* 0x94 */ 598 u_int32_t an_lostsync_disassociated;/*0x98 */ 599 u_int32_t an_lostsync_tsf_timing; /* 0x9C */ 600 u_int32_t an_tx_host_mcasts; /* 0xA0 */ 601 u_int32_t an_tx_host_bcasts; /* 0xA4 */ 602 u_int32_t an_tx_host_ucasts; /* 0xA8 */ 603 u_int32_t an_tx_host_failed; /* 0xAC */ 604 u_int32_t an_rx_host_mcasts; /* 0xB0 */ 605 u_int32_t an_rx_host_bcasts; /* 0xB4 */ 606 u_int32_t an_rx_host_ucasts; /* 0xB8 */ 607 u_int32_t an_rx_host_discarded; /* 0xBC */ 608 u_int32_t an_tx_hmac_mcasts; /* 0xC0 */ 609 u_int32_t an_tx_hmac_bcasts; /* 0xC4 */ 610 u_int32_t an_tx_hmac_ucasts; /* 0xC8 */ 611 u_int32_t an_tx_hmac_failed; /* 0xCC */ 612 u_int32_t an_rx_hmac_mcasts; /* 0xD0 */ 613 u_int32_t an_rx_hmac_bcasts; /* 0xD4 */ 614 u_int32_t an_rx_hmac_ucasts; /* 0xD8 */ 615 u_int32_t an_rx_hmac_discarded; /* 0xDC */ 616 u_int32_t an_tx_hmac_accepted; /* 0xE0 */ 617 u_int32_t an_ssid_mismatches; /* 0xE4 */ 618 u_int32_t an_ap_mismatches; /* 0xE8 */ 619 u_int32_t an_rates_mismatches; /* 0xEC */ 620 u_int32_t an_auth_rejects; /* 0xF0 */ 621 u_int32_t an_auth_timeouts; /* 0xF4 */ 622 u_int32_t an_assoc_rejects; /* 0xF8 */ 623 u_int32_t an_assoc_timeouts; /* 0xFC */ 624 u_int32_t an_reason_outside_table;/* 0x100 */ 625 u_int32_t an_reason1; /* 0x104 */ 626 u_int32_t an_reason2; /* 0x108 */ 627 u_int32_t an_reason3; /* 0x10C */ 628 u_int32_t an_reason4; /* 0x110 */ 629 u_int32_t an_reason5; /* 0x114 */ 630 u_int32_t an_reason6; /* 0x118 */ 631 u_int32_t an_reason7; /* 0x11C */ 632 u_int32_t an_reason8; /* 0x120 */ 633 u_int32_t an_reason9; /* 0x124 */ 634 u_int32_t an_reason10; /* 0x128 */ 635 u_int32_t an_reason11; /* 0x12C */ 636 u_int32_t an_reason12; /* 0x130 */ 637 u_int32_t an_reason13; /* 0x134 */ 638 u_int32_t an_reason14; /* 0x138 */ 639 u_int32_t an_reason15; /* 0x13C */ 640 u_int32_t an_reason16; /* 0x140 */ 641 u_int32_t an_reason17; /* 0x144 */ 642 u_int32_t an_reason18; /* 0x148 */ 643 u_int32_t an_reason19; /* 0x14C */ 644 u_int32_t an_rx_mgmt_pkts; /* 0x150 */ 645 u_int32_t an_tx_mgmt_pkts; /* 0x154 */ 646 u_int32_t an_rx_refresh_pkts; /* 0x158 */ 647 u_int32_t an_tx_refresh_pkts; /* 0x15C */ 648 u_int32_t an_rx_poll_pkts; /* 0x160 */ 649 u_int32_t an_tx_poll_pkts; /* 0x164 */ 650 u_int32_t an_host_retries; /* 0x168 */ 651 u_int32_t an_lostsync_hostreq; /* 0x16C */ 652 u_int32_t an_host_tx_bytes; /* 0x170 */ 653 u_int32_t an_host_rx_bytes; /* 0x174 */ 654 u_int32_t an_uptime_usecs; /* 0x178 */ 655 u_int32_t an_uptime_secs; /* 0x17C */ 656 u_int32_t an_lostsync_better_ap; /* 0x180 */ 657 u_int32_t an_rsvd[10]; 658 }; 659 660 /* 661 * Volatile WEP Key 662 */ 663 #define AN_RID_WEP_VOLATILE 0xFF15 /* Volatile WEP Key */ 664 struct an_ltv_wepkey { 665 u_int16_t an_len; /* 0x00 */ 666 u_int16_t an_type; /* 0xXX */ 667 u_int16_t an_key_index; /* 0x02 */ 668 u_int8_t an_mac_addr[6]; /* 0x04 */ 669 u_int16_t an_key_len; /* 0x0A */ 670 u_int8_t an_key[13]; /* 0x0C */ 671 }; 672 673 /* 674 * Persistent WEP Key 675 */ 676 #define AN_RID_WEP_PERSISTENT 0xFF16 /* Persistent WEP Key */ 677 678 679 /* 680 * Receive frame structure. 681 */ 682 struct an_rxframe { 683 u_int32_t an_rx_time; /* 0x00 */ 684 u_int16_t an_rx_status; /* 0x04 */ 685 u_int16_t an_rx_payload_len; /* 0x06 */ 686 u_int8_t an_rsvd0; /* 0x08 */ 687 u_int8_t an_rx_signal_strength; /* 0x09 */ 688 u_int8_t an_rx_rate; /* 0x0A */ 689 u_int8_t an_rx_chan; /* 0x0B */ 690 u_int8_t an_rx_assoc_cnt; /* 0x0C */ 691 u_int8_t an_rsvd1[3]; /* 0x0D */ 692 u_int8_t an_plcp_hdr[4]; /* 0x10 */ 693 u_int16_t an_frame_ctl; /* 0x14 */ 694 u_int16_t an_duration; /* 0x16 */ 695 u_int8_t an_addr1[6]; /* 0x18 */ 696 u_int8_t an_addr2[6]; /* 0x1E */ 697 u_int8_t an_addr3[6]; /* 0x24 */ 698 u_int16_t an_seq_ctl; /* 0x2A */ 699 u_int8_t an_addr4[6]; /* 0x2C */ 700 u_int16_t an_gaplen; /* 0x32 */ 701 }; 702 703 #define AN_RXGAP_MAX 8 704 705 /* 706 * Transmit frame structure. 707 */ 708 struct an_txframe { 709 u_int32_t an_tx_sw; /* 0x00 */ 710 u_int16_t an_tx_status; /* 0x04 */ 711 u_int16_t an_tx_payload_len; /* 0x06 */ 712 u_int16_t an_tx_ctl; /* 0x08 */ 713 u_int16_t an_tx_assoc_id; /* 0x0A */ 714 u_int16_t an_tx_retry; /* 0x0C */ 715 u_int8_t an_tx_assoc_cnt; /* 0x0E */ 716 u_int8_t an_tx_rate; /* 0x0F */ 717 u_int8_t an_tx_max_long_retries; /* 0x10 */ 718 u_int8_t an_tx_max_short_retries; /*0x11 */ 719 u_int8_t an_rsvd0[2]; /* 0x12 */ 720 u_int16_t an_frame_ctl; /* 0x14 */ 721 u_int16_t an_duration; /* 0x16 */ 722 u_int8_t an_addr1[6]; /* 0x18 */ 723 u_int8_t an_addr2[6]; /* 0x1E */ 724 u_int8_t an_addr3[6]; /* 0x24 */ 725 u_int16_t an_seq_ctl; /* 0x2A */ 726 u_int8_t an_addr4[6]; /* 0x2C */ 727 u_int16_t an_gaplen; /* 0x32 */ 728 }; 729 730 struct an_rxframe_802_3 { 731 u_int16_t an_rx_802_3_status; /* 0x34 */ 732 u_int16_t an_rx_802_3_payload_len;/* 0x36 */ 733 u_int8_t an_rx_dst_addr[6]; /* 0x38 */ 734 u_int8_t an_rx_src_addr[6]; /* 0x3E */ 735 }; 736 #define AN_RXGAP_MAX 8 737 738 739 struct an_txframe_802_3 { 740 /* 741 * Transmit 802.3 header structure. 742 */ 743 u_int16_t an_tx_802_3_status; /* 0x34 */ 744 u_int16_t an_tx_802_3_payload_len;/* 0x36 */ 745 u_int8_t an_tx_dst_addr[6]; /* 0x38 */ 746 u_int8_t an_tx_src_addr[6]; /* 0x3E */ 747 }; 748 749 #define AN_TXSTAT_EXCESS_RETRY 0x0002 750 #define AN_TXSTAT_LIFE_EXCEEDED 0x0004 751 #define AN_TXSTAT_AID_FAIL 0x0008 752 #define AN_TXSTAT_MAC_DISABLED 0x0010 753 #define AN_TXSTAT_ASSOC_LOST 0x0020 754 755 #define AN_TXCTL_RSVD 0x0001 756 #define AN_TXCTL_TXOK_INTR 0x0002 757 #define AN_TXCTL_TXERR_INTR 0x0004 758 #define AN_TXCTL_HEADER_TYPE 0x0008 759 #define AN_TXCTL_PAYLOAD_TYPE 0x0010 760 #define AN_TXCTL_NORELEASE 0x0020 761 #define AN_TXCTL_NORETRIES 0x0040 762 #define AN_TXCTL_CLEAR_AID 0x0080 763 #define AN_TXCTL_STRICT_ORDER 0x0100 764 #define AN_TXCTL_USE_RTS 0x0200 765 766 #define AN_HEADERTYPE_8023 0x0000 767 #define AN_HEADERTYPE_80211 0x0008 768 769 #define AN_PAYLOADTYPE_ETHER 0x0000 770 #define AN_PAYLOADTYPE_LLC 0x0010 771 772 #define AN_TXCTL_80211 \ 773 (AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_HEADERTYPE_80211| \ 774 AN_PAYLOADTYPE_LLC|AN_TXCTL_NORELEASE) 775 776 #define AN_TXCTL_8023 \ 777 (AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_HEADERTYPE_8023| \ 778 AN_PAYLOADTYPE_ETHER|AN_TXCTL_NORELEASE) 779 780 #define AN_TXGAP_80211 0 781 #define AN_TXGAP_8023 0 782 783 struct an_802_3_hdr { 784 u_int16_t an_8023_status; 785 u_int16_t an_8023_payload_len; 786 u_int8_t an_8023_dst_addr[6]; 787 u_int8_t an_8023_src_addr[6]; 788 u_int16_t an_8023_dat[3]; /* SNAP header */ 789 u_int16_t an_8023_type; 790 }; 791 792 struct an_snap_hdr { 793 u_int16_t an_snap_dat[3]; /* SNAP header */ 794 u_int16_t an_snap_type; 795 }; 796 797 #define AN_TX_RING_CNT 4 798 #define AN_INC(x, y) (x) = (x + 1) % y 799 800 struct an_tx_ring_data { 801 u_int16_t an_tx_fids[AN_TX_RING_CNT]; 802 u_int16_t an_tx_ring[AN_TX_RING_CNT]; 803 int an_tx_prod; 804 int an_tx_cons; 805 }; 806 807 struct an_softc { 808 struct device an_dev; 809 struct ethercom arpcom; 810 int (*sc_enable) __P((struct an_softc *)); 811 void (*sc_disable) __P((struct an_softc *)); 812 int sc_enabled; 813 struct ifmedia sc_media; 814 815 void* irq_handle; /* handle for irq handler */ 816 817 bus_space_handle_t an_bhandle; 818 bus_space_tag_t an_btag; 819 struct an_ltv_genconfig an_config; 820 struct an_ltv_caps an_caps; 821 struct an_ltv_ssidlist an_ssidlist; 822 struct an_ltv_aplist an_aplist; 823 struct an_ltv_key an_temp_keys; 824 struct an_ltv_key an_perm_keys; 825 int an_tx_rate; 826 int an_rxmode; 827 int an_if_flags; 828 u_int8_t an_txbuf[1536]; 829 struct an_tx_ring_data an_rdata; 830 struct an_ltv_stats an_stats; 831 struct an_ltv_status an_status; 832 u_int8_t an_associated; 833 #ifdef ANCACHE 834 int an_sigitems; 835 struct an_sigcache an_sigcache[MAXANCACHE]; 836 int an_nextitem; 837 #endif 838 struct callout an_stat_ch; 839 }; 840 841 void an_release_resources __P((struct device *)); 842 int an_alloc_port __P((struct device *, int, int)); 843 int an_alloc_memory __P((struct device *, int, int)); 844 int an_alloc_irq __P((struct device *, int, int)); 845 int an_probe __P((struct an_softc *)); 846 void an_shutdown __P((struct device *)); 847 int an_attach __P((struct an_softc *)); 848 int an_detach __P((struct an_softc *)); 849 int an_intr __P((void *)); 850 int an_activate __P((struct device *, enum devact)); 851 852 853 #define AN_802_3_OFFSET 0x2E 854 #define AN_802_11_OFFSET 0x44 855 #define AN_802_11_OFFSET_RAW 0x3C 856 857 #define AN_STAT_BADCRC 0x0001 858 #define AN_STAT_UNDECRYPTABLE 0x0002 859 #define AN_STAT_ERRSTAT 0x0003 860 #define AN_STAT_MAC_PORT 0x0700 861 #define AN_STAT_1042 0x2000 /* RFC1042 encoded */ 862 #define AN_STAT_TUNNEL 0x4000 /* Bridge-tunnel encoded */ 863 #define AN_STAT_WMP_MSG 0x6000 /* WaveLAN-II management protocol */ 864 #define AN_RXSTAT_MSG_TYPE 0xE000 865 866 #define AN_ENC_TX_802_3 0x00 867 #define AN_ENC_TX_802_11 0x11 868 #define AN_ENC_TX_E_II 0x0E 869 870 #define AN_ENC_TX_1042 0x00 871 #define AN_ENC_TX_TUNNEL 0xF8 872 873 #define AN_TXCNTL_MACPORT 0x00FF 874 #define AN_TXCNTL_STRUCTTYPE 0xFF00 875 876 /* 877 * SNAP (sub-network access protocol) constants for transmission 878 * of IP datagrams over IEEE 802 networks, taken from RFC1042. 879 * We need these for the LLC/SNAP header fields in the TX/RX frame 880 * structure. 881 */ 882 #define AN_SNAP_K1 0xaa /* assigned global SAP for SNAP */ 883 #define AN_SNAP_K2 0x00 884 #define AN_SNAP_CONTROL 0x03 /* unnumbered information format */ 885 #define AN_SNAP_WORD0 (AN_SNAP_K1 | (AN_SNAP_K1 << 8)) 886 #define AN_SNAP_WORD1 (AN_SNAP_K2 | (AN_SNAP_CONTROL << 8)) 887 #define AN_SNAPHDR_LEN 0x6 888 889 890
Indexes created Mon Oct 20 20:10:13 GMT 2025