anvar.h revision 1.1
1 /* $NetBSD: anvar.h,v 1.1 2000/12/11 23:16:50 onoe Exp $ */ 2 /* 3 * Copyright (c) 1997, 1998, 1999 4 * Bill Paul <wpaul (at) ctr.columbia.edu>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Bill Paul. 17 * 4. Neither the name of the author nor the names of any co-contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/dev/an/if_aironet_ieee.h,v 1.2 2000/11/13 23:04:12 wpaul Exp $ 34 */ 35 36 #ifndef _IF_AIRONET_IEEE_H 37 #define _IF_AIRONET_IEEE_H 38 39 /* 40 * This header defines a simple command interface to the FreeBSD 41 * Aironet driver (an) driver, which is used to set certain 42 * device-specific parameters which can't be easily managed through 43 * ifconfig(8). No, sysctl(2) is not the answer. I said a _simple_ 44 * interface, didn't I. 45 */ 46 47 #ifndef SIOCSAIRONET 48 #define SIOCSAIRONET SIOCSIFGENERIC 49 #endif 50 51 #ifndef SIOCGAIRONET 52 #define SIOCGAIRONET SIOCGIFGENERIC 53 #endif 54 55 /* 56 * This is a make-predend RID value used only by the driver 57 * to allow the user to set the speed. 58 */ 59 #define AN_RID_TX_SPEED 0x1234 60 61 /* 62 * Technically I don't think there's a limit to a record 63 * length. The largest record is the one that contains the CIS 64 * data, which is 240 words long, so 256 should be a safe 65 * value. 66 */ 67 #define AN_MAX_DATALEN 512 68 69 struct an_req { 70 u_int16_t an_len; 71 u_int16_t an_type; 72 u_int16_t an_val[AN_MAX_DATALEN]; 73 }; 74 75 /* 76 * Private LTV records (interpreted only by the driver). This is 77 * a minor kludge to allow reading the interface statistics from 78 * the driver. 79 */ 80 #define AN_RID_IFACE_STATS 0x0100 81 #define AN_RID_MGMT_XMIT 0x0200 82 #ifdef ANCACHE 83 #define AN_RID_ZERO_CACHE 0x0300 84 #define AN_RID_READ_CACHE 0x0400 85 #endif 86 87 struct an_80211_hdr { 88 u_int16_t frame_ctl; 89 u_int16_t dur_id; 90 u_int8_t addr1[6]; 91 u_int8_t addr2[6]; 92 u_int8_t addr3[6]; 93 u_int16_t seq_ctl; 94 u_int8_t addr4[6]; 95 }; 96 97 #define AN_FCTL_VERS 0x0002 98 #define AN_FCTL_FTYPE 0x000C 99 #define AN_FCTL_STYPE 0x00F0 100 #define AN_FCTL_TODS 0x0100 101 #define AN_FCTL_FROMDS 0x0200 102 #define AN_FCTL_MOREFRAGS 0x0400 103 #define AN_FCTL_RETRY 0x0800 104 #define AN_FCTL_PM 0x1000 105 #define AN_FCTL_MOREDATA 0x2000 106 #define AN_FCTL_WEP 0x4000 107 #define AN_FCTL_ORDER 0x8000 108 109 #define AN_FTYPE_MGMT 0x0000 110 #define AN_FTYPE_CTL 0x0004 111 #define AN_FTYPE_DATA 0x0008 112 113 #define AN_STYPE_MGMT_ASREQ 0x0000 /* association request */ 114 #define AN_STYPE_MGMT_ASRESP 0x0010 /* association response */ 115 #define AN_STYPE_MGMT_REASREQ 0x0020 /* reassociation request */ 116 #define AN_STYPE_MGMT_REASRESP 0x0030 /* reassociation response */ 117 #define AN_STYPE_MGMT_PROBEREQ 0x0040 /* probe request */ 118 #define AN_STYPE_MGMT_PROBERESP 0x0050 /* probe response */ 119 #define AN_STYPE_MGMT_BEACON 0x0080 /* beacon */ 120 #define AN_STYPE_MGMT_ATIM 0x0090 /* announcement traffic ind msg */ 121 #define AN_STYPE_MGMT_DISAS 0x00A0 /* disassociation */ 122 #define AN_STYPE_MGMT_AUTH 0x00B0 /* authentication */ 123 #define AN_STYPE_MGMT_DEAUTH 0x00C0 /* deauthentication */ 124 125 struct an_mgmt_hdr { 126 u_int16_t frame_ctl; 127 u_int16_t duration; 128 u_int8_t dst_addr[6]; 129 u_int8_t src_addr[6]; 130 u_int8_t bssid[6]; 131 u_int16_t seq_ctl; 132 }; 133 134 /* 135 * Aironet IEEE signal strength cache 136 * 137 * driver keeps cache of last 138 * MAXANCACHE packets to arrive including signal strength info. 139 * daemons may read this via ioctl 140 * 141 * Each entry in the wi_sigcache has a unique macsrc. 142 */ 143 #ifdef ANCACHE 144 #define MAXANCACHE 10 145 146 struct an_sigcache { 147 char macsrc[6]; /* unique MAC address for entry */ 148 int ipsrc; /* ip address associated with packet */ 149 int signal; /* signal strength of the packet */ 150 int noise; /* noise value */ 151 int quality; /* quality of the packet */ 152 }; 153 #endif 154 155 struct an_ltv_key { 156 u_int16_t an_len; 157 u_int16_t an_type; 158 u_int16_t kindex; 159 u_int8_t mac[6]; 160 u_int16_t klen; 161 u_int8_t key[16]; /* 40-bit keys */ 162 }; 163 164 #ifndef _KERNEL 165 struct an_ltv_stats { 166 u_int16_t an_fudge; 167 u_int16_t an_len; /* 0x00 */ 168 u_int16_t an_type; /* 0xXX */ 169 u_int16_t an_spacer; /* 0x02 */ 170 u_int32_t an_rx_overruns; /* 0x04 */ 171 u_int32_t an_rx_plcp_csum_errs; /* 0x08 */ 172 u_int32_t an_rx_plcp_format_errs; /* 0x0C */ 173 u_int32_t an_rx_plcp_len_errs; /* 0x10 */ 174 u_int32_t an_rx_mac_crc_errs; /* 0x14 */ 175 u_int32_t an_rx_mac_crc_ok; /* 0x18 */ 176 u_int32_t an_rx_wep_errs; /* 0x1C */ 177 u_int32_t an_rx_wep_ok; /* 0x20 */ 178 u_int32_t an_retry_long; /* 0x24 */ 179 u_int32_t an_retry_short; /* 0x28 */ 180 u_int32_t an_retry_max; /* 0x2C */ 181 u_int32_t an_no_ack; /* 0x30 */ 182 u_int32_t an_no_cts; /* 0x34 */ 183 u_int32_t an_rx_ack_ok; /* 0x38 */ 184 u_int32_t an_rx_cts_ok; /* 0x3C */ 185 u_int32_t an_tx_ack_ok; /* 0x40 */ 186 u_int32_t an_tx_rts_ok; /* 0x44 */ 187 u_int32_t an_tx_cts_ok; /* 0x48 */ 188 u_int32_t an_tx_lmac_mcasts; /* 0x4C */ 189 u_int32_t an_tx_lmac_bcasts; /* 0x50 */ 190 u_int32_t an_tx_lmac_ucast_frags; /* 0x54 */ 191 u_int32_t an_tx_lmac_ucasts; /* 0x58 */ 192 u_int32_t an_tx_beacons; /* 0x5C */ 193 u_int32_t an_rx_beacons; /* 0x60 */ 194 u_int32_t an_tx_single_cols; /* 0x64 */ 195 u_int32_t an_tx_multi_cols; /* 0x68 */ 196 u_int32_t an_tx_defers_no; /* 0x6C */ 197 u_int32_t an_tx_defers_prot; /* 0x70 */ 198 u_int32_t an_tx_defers_energy; /* 0x74 */ 199 u_int32_t an_rx_dups; /* 0x78 */ 200 u_int32_t an_rx_partial; /* 0x7C */ 201 u_int32_t an_tx_too_old; /* 0x80 */ 202 u_int32_t an_rx_too_old; /* 0x84 */ 203 u_int32_t an_lostsync_max_retries;/* 0x88 */ 204 u_int32_t an_lostsync_missed_beacons;/* 0x8C */ 205 u_int32_t an_lostsync_arl_exceeded;/*0x90 */ 206 u_int32_t an_lostsync_deauthed; /* 0x94 */ 207 u_int32_t an_lostsync_disassociated;/*0x98 */ 208 u_int32_t an_lostsync_tsf_timing; /* 0x9C */ 209 u_int32_t an_tx_host_mcasts; /* 0xA0 */ 210 u_int32_t an_tx_host_bcasts; /* 0xA4 */ 211 u_int32_t an_tx_host_ucasts; /* 0xA8 */ 212 u_int32_t an_tx_host_failed; /* 0xAC */ 213 u_int32_t an_rx_host_mcasts; /* 0xB0 */ 214 u_int32_t an_rx_host_bcasts; /* 0xB4 */ 215 u_int32_t an_rx_host_ucasts; /* 0xB8 */ 216 u_int32_t an_rx_host_discarded; /* 0xBC */ 217 u_int32_t an_tx_hmac_mcasts; /* 0xC0 */ 218 u_int32_t an_tx_hmac_bcasts; /* 0xC4 */ 219 u_int32_t an_tx_hmac_ucasts; /* 0xC8 */ 220 u_int32_t an_tx_hmac_failed; /* 0xCC */ 221 u_int32_t an_rx_hmac_mcasts; /* 0xD0 */ 222 u_int32_t an_rx_hmac_bcasts; /* 0xD4 */ 223 u_int32_t an_rx_hmac_ucasts; /* 0xD8 */ 224 u_int32_t an_rx_hmac_discarded; /* 0xDC */ 225 u_int32_t an_tx_hmac_accepted; /* 0xE0 */ 226 u_int32_t an_ssid_mismatches; /* 0xE4 */ 227 u_int32_t an_ap_mismatches; /* 0xE8 */ 228 u_int32_t an_rates_mismatches; /* 0xEC */ 229 u_int32_t an_auth_rejects; /* 0xF0 */ 230 u_int32_t an_auth_timeouts; /* 0xF4 */ 231 u_int32_t an_assoc_rejects; /* 0xF8 */ 232 u_int32_t an_assoc_timeouts; /* 0xFC */ 233 u_int32_t an_reason_outside_table;/* 0x100 */ 234 u_int32_t an_reason1; /* 0x104 */ 235 u_int32_t an_reason2; /* 0x108 */ 236 u_int32_t an_reason3; /* 0x10C */ 237 u_int32_t an_reason4; /* 0x110 */ 238 u_int32_t an_reason5; /* 0x114 */ 239 u_int32_t an_reason6; /* 0x118 */ 240 u_int32_t an_reason7; /* 0x11C */ 241 u_int32_t an_reason8; /* 0x120 */ 242 u_int32_t an_reason9; /* 0x124 */ 243 u_int32_t an_reason10; /* 0x128 */ 244 u_int32_t an_reason11; /* 0x12C */ 245 u_int32_t an_reason12; /* 0x130 */ 246 u_int32_t an_reason13; /* 0x134 */ 247 u_int32_t an_reason14; /* 0x138 */ 248 u_int32_t an_reason15; /* 0x13C */ 249 u_int32_t an_reason16; /* 0x140 */ 250 u_int32_t an_reason17; /* 0x144 */ 251 u_int32_t an_reason18; /* 0x148 */ 252 u_int32_t an_reason19; /* 0x14C */ 253 u_int32_t an_rx_mgmt_pkts; /* 0x150 */ 254 u_int32_t an_tx_mgmt_pkts; /* 0x154 */ 255 u_int32_t an_rx_refresh_pkts; /* 0x158 */ 256 u_int32_t an_tx_refresh_pkts; /* 0x15C */ 257 u_int32_t an_rx_poll_pkts; /* 0x160 */ 258 u_int32_t an_tx_poll_pkts; /* 0x164 */ 259 u_int32_t an_host_retries; /* 0x168 */ 260 u_int32_t an_lostsync_hostreq; /* 0x16C */ 261 u_int32_t an_host_tx_bytes; /* 0x170 */ 262 u_int32_t an_host_rx_bytes; /* 0x174 */ 263 u_int32_t an_uptime_usecs; /* 0x178 */ 264 u_int32_t an_uptime_secs; /* 0x17C */ 265 u_int32_t an_lostsync_better_ap; /* 0x180 */ 266 u_int32_t an_rsvd[10]; 267 }; 268 269 struct an_ltv_genconfig { 270 /* General configuration. */ 271 u_int16_t an_len; /* 0x00 */ 272 u_int16_t an_type; /* XXXX */ 273 u_int16_t an_opmode; /* 0x02 */ 274 u_int16_t an_rxmode; /* 0x04 */ 275 u_int16_t an_fragthresh; /* 0x06 */ 276 u_int16_t an_rtsthresh; /* 0x08 */ 277 u_int8_t an_macaddr[6]; /* 0x0A */ 278 u_int8_t an_rates[8]; /* 0x10 */ 279 u_int16_t an_shortretry_limit; /* 0x18 */ 280 u_int16_t an_longretry_limit; /* 0x1A */ 281 u_int16_t an_tx_msdu_lifetime; /* 0x1C */ 282 u_int16_t an_rx_msdu_lifetime; /* 0x1E */ 283 u_int16_t an_stationary; /* 0x20 */ 284 u_int16_t an_ordering; /* 0x22 */ 285 u_int16_t an_devtype; /* 0x24 */ 286 u_int16_t an_rsvd0[5]; /* 0x26 */ 287 /* Scanning associating. */ 288 u_int16_t an_scanmode; /* 0x30 */ 289 u_int16_t an_probedelay; /* 0x32 */ 290 u_int16_t an_probe_energy_timeout;/* 0x34 */ 291 u_int16_t an_probe_response_timeout;/*0x36 */ 292 u_int16_t an_beacon_listen_timeout;/*0x38 */ 293 u_int16_t an_ibss_join_net_timeout;/*0x3A */ 294 u_int16_t an_auth_timeout; /* 0x3C */ 295 u_int16_t an_authtype; /* 0x3E */ 296 u_int16_t an_assoc_timeout; /* 0x40 */ 297 u_int16_t an_specified_ap_timeout;/* 0x42 */ 298 u_int16_t an_offline_scan_interval;/*0x44 */ 299 u_int16_t an_offline_scan_duration;/*0x46 */ 300 u_int16_t an_link_loss_delay; /* 0x48 */ 301 u_int16_t an_max_beacon_lost_time;/* 0x4A */ 302 u_int16_t an_refresh_interval; /* 0x4C */ 303 u_int16_t an_rsvd1; /* 0x4E */ 304 /* Power save operation */ 305 u_int16_t an_psave_mode; /* 0x50 */ 306 u_int16_t an_sleep_for_dtims; /* 0x52 */ 307 u_int16_t an_listen_interval; /* 0x54 */ 308 u_int16_t an_fast_listen_interval;/* 0x56 */ 309 u_int16_t an_listen_decay; /* 0x58 */ 310 u_int16_t an_fast_listen_decay; /* 0x5A */ 311 u_int16_t an_rsvd2[2]; /* 0x5C */ 312 /* Ad-hoc (or AP) operation. */ 313 u_int16_t an_beacon_period; /* 0x60 */ 314 u_int16_t an_atim_duration; /* 0x62 */ 315 u_int16_t an_rsvd3; /* 0x64 */ 316 u_int16_t an_ds_channel; /* 0x66 */ 317 u_int16_t an_rsvd4; /* 0x68 */ 318 u_int16_t an_dtim_period; /* 0x6A */ 319 u_int16_t an_rsvd5[2]; /* 0x6C */ 320 /* Radio operation. */ 321 u_int16_t an_radiotype; /* 0x70 */ 322 u_int16_t an_diversity; /* 0x72 */ 323 u_int16_t an_tx_power; /* 0x74 */ 324 u_int16_t an_rss_thresh; /* 0x76 */ 325 u_int16_t an_modulation_type; /* 0x78 */ 326 u_int16_t an_short_preamble; /* 0x7A */ 327 u_int16_t an_home_product; /* 0x7C */ 328 u_int16_t an_rsvd6; /* 0x7E */ 329 /* Aironet extensions. */ 330 u_int8_t an_nodename[16]; /* 0x80 */ 331 u_int16_t an_arl_thresh; /* 0x90 */ 332 u_int16_t an_arl_decay; /* 0x92 */ 333 u_int16_t an_arl_delay; /* 0x94 */ 334 u_int8_t an_rsvd7; /* 0x96 */ 335 u_int8_t an_rsvd8; /* 0x97 */ 336 u_int8_t an_magic_packet_action; /* 0x98 */ 337 u_int8_t an_magic_packet_ctl; /* 0x99 */ 338 u_int16_t an_rsvd9; 339 }; 340 341 #define AN_OPMODE_IBSS_ADHOC 0x0000 342 #define AN_OPMODE_INFRASTRUCTURE_STATION 0x0001 343 #define AN_OPMODE_AP 0x0002 344 #define AN_OPMODE_AP_REPEATER 0x0003 345 #define AN_OPMODE_UNMODIFIED_PAYLOAD 0x0100 346 #define AN_OPMODE_AIRONET_EXTENSIONS 0x0200 347 #define AN_OPMODE_AP_EXTENSIONS 0x0400 348 349 #define AN_RXMODE_BC_MC_ADDR 0x0000 350 #define AN_RXMODE_BC_ADDR 0x0001 351 #define AN_RXMODE_ADDR 0x0002 352 #define AN_RXMODE_80211_MONITOR_CURBSS 0x0003 353 #define AN_RXMODE_80211_MONITOR_ANYBSS 0x0004 354 #define AN_RXMODE_LAN_MONITOR_CURBSS 0x0005 355 #define AN_RXMODE_NO_8023_HEADER 0x0100 356 357 #define AN_RATE_1MBPS 0x0002 358 #define AN_RATE_2MBPS 0x0004 359 #define AN_RATE_5_5MBPS 0x000B 360 #define AN_RATE_11MBPS 0x0016 361 362 #define AN_DEVTYPE_PC4500 0x0065 363 #define AN_DEVTYPE_PC4800 0x006D 364 365 #define AN_SCANMODE_ACTIVE 0x0000 366 #define AN_SCANMODE_PASSIVE 0x0001 367 #define AN_SCANMODE_AIRONET_ACTIVE 0x0002 368 369 #define AN_AUTHTYPE_NONE 0x0000 370 #define AN_AUTHTYPE_OPEN 0x0001 371 #define AN_AUTHTYPE_SHAREDKEY 0x0002 372 #define AN_AUTHTYPE_EXCLUDE_UNENCRYPTED 0x0004 373 #define AN_AUTHTYPE_MASK 0x00ff 374 #define AN_AUTHTYPE_ENABLE 0x0100 375 376 #define AN_PSAVE_NONE 0x0000 377 #define AN_PSAVE_CAM 0x0001 378 #define AN_PSAVE_PSP 0x0002 379 #define AN_PSAVE_PSP_CAM 0x0003 380 381 #define AN_RADIOTYPE_80211_FH 0x0001 382 #define AN_RADIOTYPE_80211_DS 0x0002 383 #define AN_RADIOTYPE_LM2000_DS 0x0004 384 385 #define AN_DIVERSITY_FACTORY_DEFAULT 0x0000 386 #define AN_DIVERSITY_ANTENNA_1_ONLY 0x0001 387 #define AN_DIVERSITY_ANTENNA_2_ONLY 0x0002 388 #define AN_DIVERSITY_ANTENNA_1_AND_2 0x0003 389 390 #define AN_TXPOWER_FACTORY_DEFAULT 0x0000 391 #define AN_TXPOWER_50MW 50 392 #define AN_TXPOWER_100MW 100 393 #define AN_TXPOWER_250MW 250 394 395 struct an_ltv_ssidlist { 396 u_int16_t an_len; 397 u_int16_t an_type; 398 u_int16_t an_ssid1_len; 399 char an_ssid1[32]; 400 u_int16_t an_ssid2_len; 401 char an_ssid2[32]; 402 u_int16_t an_ssid3_len; 403 char an_ssid3[32]; 404 }; 405 406 struct an_ltv_aplist { 407 u_int16_t an_len; 408 u_int16_t an_type; 409 u_int8_t an_ap1[8]; 410 u_int8_t an_ap2[8]; 411 u_int8_t an_ap3[8]; 412 u_int8_t an_ap4[8]; 413 }; 414 415 struct an_ltv_drvname { 416 u_int16_t an_len; 417 u_int16_t an_type; 418 u_int8_t an_drvname[16]; 419 }; 420 421 struct an_rid_encap { 422 u_int16_t an_len; 423 u_int16_t an_type; 424 u_int16_t an_ethertype_default; 425 u_int16_t an_action_default; 426 u_int16_t an_ethertype0; 427 u_int16_t an_action0; 428 u_int16_t an_ethertype1; 429 u_int16_t an_action1; 430 u_int16_t an_ethertype2; 431 u_int16_t an_action2; 432 u_int16_t an_ethertype3; 433 u_int16_t an_action3; 434 u_int16_t an_ethertype4; 435 u_int16_t an_action4; 436 u_int16_t an_ethertype5; 437 u_int16_t an_action5; 438 u_int16_t an_ethertype6; 439 u_int16_t an_action6; 440 }; 441 442 #define AN_ENCAP_ACTION_RX 0x0001 443 #define AN_ENCAP_ACTION_TX 0x0002 444 445 #define AN_RXENCAP_NONE 0x0000 446 #define AN_RXENCAP_RFC1024 0x0001 447 448 #define AN_TXENCAP_RFC1024 0x0000 449 #define AN_TXENCAP_80211 0x0002 450 451 struct an_ltv_caps { 452 u_int16_t an_len; /* 0x00 */ 453 u_int16_t an_type; /* XXXX */ 454 u_int8_t an_oui[3]; /* 0x02 */ 455 u_int8_t an_rsvd0; /* 0x05 */ 456 u_int16_t an_prodnum; /* 0x06 */ 457 u_int8_t an_manufname[32]; /* 0x08 */ 458 u_int8_t an_prodname[16]; /* 0x28 */ 459 u_int8_t an_prodvers[8]; /* 0x38 */ 460 u_int8_t an_oemaddr[6]; /* 0x40 */ 461 u_int8_t an_aironetaddr[6]; /* 0x46 */ 462 u_int16_t an_radiotype; /* 0x4C */ 463 u_int16_t an_regdomain; /* 0x4E */ 464 u_int8_t an_callid[6]; /* 0x50 */ 465 u_int8_t an_rates[8]; /* 0x56 */ 466 u_int8_t an_rx_diversity; /* 0x5E */ 467 u_int8_t an_tx_diversity; /* 0x5F */ 468 u_int16_t an_tx_powerlevels[8]; /* 0x60 */ 469 u_int16_t an_hwrev; /* 0x70 */ 470 u_int16_t an_hwcaps; /* 0x72 */ 471 u_int16_t an_temprange; /* 0x74 */ 472 u_int16_t an_fwrev; /* 0x76 */ 473 u_int16_t an_fwsubrev; /* 0x78 */ 474 u_int16_t an_ifacerev; /* 0x7A */ 475 u_int16_t an_softcaps; /* 0x7C */ 476 u_int16_t an_bootblockrev; /* 0x7E */ 477 u_int16_t an_req_hw_support; /* 0x80 */ 478 }; 479 480 struct an_ltv_apinfo { 481 u_int16_t an_len; 482 u_int16_t an_type; 483 u_int16_t an_tim_addr; 484 u_int16_t an_airo_addr; 485 }; 486 487 struct an_ltv_radioinfo { 488 u_int16_t an_len; 489 u_int16_t an_type; 490 /* ??? */ 491 }; 492 493 struct an_ltv_status { 494 u_int16_t an_len; /* 0x00 */ 495 u_int16_t an_type; /* 0xXX */ 496 u_int8_t an_macaddr[6]; /* 0x02 */ 497 u_int16_t an_opmode; /* 0x08 */ 498 u_int16_t an_errcode; /* 0x0A */ 499 u_int16_t an_cur_signal_strength; /* 0x0C */ 500 u_int16_t an_ssidlen; /* 0x0E */ 501 u_int8_t an_ssid[32]; /* 0x10 */ 502 u_int8_t an_ap_name[16]; /* 0x30 */ 503 u_int8_t an_cur_bssid[6]; /* 0x40 */ 504 u_int8_t an_prev_bssid1[6]; /* 0x46 */ 505 u_int8_t an_prev_bssid2[6]; /* 0x4C */ 506 u_int8_t an_prev_bssid3[6]; /* 0x52 */ 507 u_int16_t an_beacon_period; /* 0x58 */ 508 u_int16_t an_dtim_period; /* 0x5A */ 509 u_int16_t an_atim_duration; /* 0x5C */ 510 u_int16_t an_hop_period; /* 0x5E */ 511 u_int16_t an_cur_channel; /* 0x62 */ 512 u_int16_t an_channel_set; /* 0x60 */ 513 u_int16_t an_hops_to_backbone; /* 0x64 */ 514 u_int16_t an_ap_total_load; /* 0x66 */ 515 u_int16_t an_our_generated_load; /* 0x68 */ 516 u_int16_t an_accumulated_arl; /* 0x6A */ 517 u_int16_t an_cur_signal_quality; /* 0x6C */ 518 u_int16_t an_current_tx_rate; /* 0x6E */ 519 u_int16_t an_ap_device; /* 0x70 */ 520 u_int16_t an_normalized_rssi; /* 0x72 */ 521 u_int16_t an_short_pre_in_use; /* 0x74 */ 522 u_int8_t an_ap_ip_addr[4]; /* 0x76 */ 523 u_int16_t an_max_noise_prev_sec; /* 0x7A */ 524 u_int16_t an_avg_noise_prev_min; /* 0x7C */ 525 u_int16_t an_max_noise_prev_min; /* 0x7E */ 526 u_int16_t an_spare[2]; 527 }; 528 529 #define AN_STATUS_OPMODE_CONFIGURED 0x0001 530 #define AN_STATUS_OPMODE_MAC_ENABLED 0x0002 531 #define AN_STATUS_OPMODE_RX_ENABLED 0x0004 532 #define AN_STATUS_OPMODE_IN_SYNC 0x0010 533 #define AN_STATUS_OPMODE_ASSOCIATED 0x0020 534 #define AN_STATUS_OPMODE_ERROR 0x8000 535 536 struct an_ltv_wepkey { 537 u_int16_t an_len; /* 0x00 */ 538 u_int16_t an_type; /* 0xXX */ 539 u_int16_t an_key_index; /* 0x02 */ 540 u_int8_t an_mac_addr[6]; /* 0x04 */ 541 u_int16_t an_key_len; /* 0x0A */ 542 u_int8_t an_key[13]; /* 0x0C */ 543 }; 544 545 /* 546 * These are all the LTV record types that we can read or write 547 * from the Aironet. Not all of them are temendously useful, but I 548 * list as many as I know about here for completeness. 549 */ 550 551 /* 552 * Configuration (read/write) 553 */ 554 #define AN_RID_GENCONFIG 0xFF10 /* General configuration info */ 555 #define AN_RID_SSIDLIST 0xFF11 /* Valid SSID list */ 556 #define AN_RID_APLIST 0xFF12 /* Valid AP list */ 557 #define AN_RID_DRVNAME 0xFF13 /* ID name of this node for diag */ 558 #define AN_RID_ENCAPPROTO 0xFF14 /* Payload encapsulation type */ 559 #define AN_RID_WEP_TEMP 0xFF15 /* Temporary Key */ 560 #define AN_RID_WEP_PERM 0xFF16 /* Perminant Key */ 561 #define AN_RID_ACTUALCFG 0xFF20 /* Current configuration settings */ 562 #define AN_RID_WEP_VOLATILE 0xFF15 /* Volatile WEP Key */ 563 #define AN_RID_WEP_PERSISTENT 0xFF16 /* Persistent WEP Key */ 564 565 /* 566 * Reporting (read only) 567 */ 568 #define AN_RID_CAPABILITIES 0xFF00 /* PC 4500/4800 capabilities */ 569 #define AN_RID_AP_INFO 0xFF01 /* Access point info */ 570 #define AN_RID_RADIO_INFO 0xFF02 /* Radio info */ 571 #define AN_RID_STATUS 0xFF50 /* Current status info */ 572 573 /* 574 * Statistics 575 */ 576 #define AN_RID_16BITS_CUM 0xFF60 /* Cumulative 16-bit stats counters */ 577 #define AN_RID_16BITS_DELTA 0xFF61 /* 16-bit stats (since last clear) */ 578 #define AN_RID_16BITS_DELTACLR 0xFF62 /* 16-bit stats, clear on read */ 579 #define AN_RID_32BITS_CUM 0xFF68 /* Cumulative 32-bit stats counters */ 580 #define AN_RID_32BITS_DELTA 0xFF69 /* 32-bit stats (since last clear) */ 581 #define AN_RID_32BITS_DELTACLR 0xFF6A /* 32-bit stats, clear on read */ 582 #endif 583 584 585 #endif 586
Indexes created Sun Sep 28 07:09:56 GMT 2025