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apcdmareg.h revision 1.3.12.2
      1  1.3.12.1  skrll /*	$NetBSD: apcdmareg.h,v 1.3.12.2 2004/09/18 14:45:56 skrll Exp $	*/
      2       1.1    mrg 
      3       1.1    mrg /*-
      4       1.1    mrg  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
      5       1.1    mrg  * All rights reserved.
      6       1.1    mrg  *
      7       1.1    mrg  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1    mrg  * by Paul Kranenburg.
      9       1.1    mrg  *
     10       1.1    mrg  * Redistribution and use in source and binary forms, with or without
     11       1.1    mrg  * modification, are permitted provided that the following conditions
     12       1.1    mrg  * are met:
     13       1.1    mrg  * 1. Redistributions of source code must retain the above copyright
     14       1.1    mrg  *    notice, this list of conditions and the following disclaimer.
     15       1.1    mrg  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1    mrg  *    notice, this list of conditions and the following disclaimer in the
     17       1.1    mrg  *    documentation and/or other materials provided with the distribution.
     18       1.1    mrg  * 3. All advertising materials mentioning features or use of this software
     19       1.1    mrg  *    must display the following acknowledgement:
     20       1.1    mrg  *        This product includes software developed by the NetBSD
     21       1.1    mrg  *        Foundation, Inc. and its contributors.
     22       1.1    mrg  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1    mrg  *    contributors may be used to endorse or promote products derived
     24       1.1    mrg  *    from this software without specific prior written permission.
     25       1.1    mrg  *
     26       1.1    mrg  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1    mrg  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1    mrg  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1    mrg  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1    mrg  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1    mrg  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1    mrg  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1    mrg  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1    mrg  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1    mrg  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1    mrg  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1    mrg  */
     38       1.1    mrg 
     39       1.1    mrg /*
     40       1.1    mrg  * APC DMA hardware; from SunOS header
     41       1.1    mrg  * Thanks to Derrick J. Brashear for additional info on the
     42       1.1    mrg  * meaning of some of these bits.
     43       1.1    mrg  */
     44       1.3    uwe #ifndef _DEV_IC_APCDMAREG_H_
     45       1.3    uwe #define _DEV_IC_APCDMAREG_H_
     46       1.3    uwe 
     47       1.1    mrg struct apc_dma {
     48       1.1    mrg 	volatile u_int32_t dmacsr;	/* APC CSR */
     49       1.1    mrg 	volatile u_int32_t lpad[3];	/* */
     50       1.1    mrg 	volatile u_int32_t dmacva;	/* Capture Virtual Address */
     51       1.1    mrg 	volatile u_int32_t dmacc;	/* Capture Count */
     52       1.1    mrg 	volatile u_int32_t dmacnva;	/* Capture Next Virtual Address */
     53       1.1    mrg 	volatile u_int32_t dmacnc;	/* Capture next count */
     54       1.1    mrg 	volatile u_int32_t dmapva;	/* Playback Virtual Address */
     55       1.1    mrg 	volatile u_int32_t dmapc;	/* Playback Count */
     56       1.1    mrg 	volatile u_int32_t dmapnva;	/* Playback Next VAddress */
     57       1.1    mrg 	volatile u_int32_t dmapnc;	/* Playback Next Count */
     58       1.1    mrg };
     59       1.1    mrg 
     60  1.3.12.1  skrll /* same as above but as offsets for bus_space ops */
     61  1.3.12.1  skrll #define APC_DMA_CSR	0
     62  1.3.12.1  skrll #define APC_DMA_CVA	16
     63  1.3.12.1  skrll #define APC_DMA_CC	20
     64  1.3.12.1  skrll #define APC_DMA_CNVA	24
     65  1.3.12.1  skrll #define APC_DMA_CNC	28
     66  1.3.12.1  skrll #define APC_DMA_PVA	32
     67  1.3.12.1  skrll #define APC_DMA_PC	36
     68  1.3.12.1  skrll #define APC_DMA_PNVA	40
     69  1.3.12.1  skrll #define APC_DMA_PNC	44
     70  1.3.12.1  skrll 
     71  1.3.12.1  skrll #define APC_DMA_SIZE	48
     72  1.3.12.1  skrll 
     73       1.1    mrg /*
     74       1.1    mrg  * APC CSR Register bit definitions
     75       1.1    mrg  */
     76       1.1    mrg #define	APC_IP		0x00800000	/* Interrupt Pending */
     77       1.1    mrg #define	APC_PI		0x00400000	/* Playback interrupt */
     78       1.1    mrg #define	APC_CI		0x00200000	/* Capture interrupt */
     79       1.1    mrg #define	APC_EI		0x00100000	/* General interrupt */
     80       1.1    mrg #define	APC_IE		0x00080000	/* General ext int. enable */
     81       1.1    mrg #define	APC_PIE		0x00040000	/* Playback ext intr */
     82       1.1    mrg #define	APC_CIE		0x00020000	/* Capture ext intr */
     83       1.1    mrg #define	APC_EIE		0x00010000	/* Error ext intr */
     84       1.1    mrg #define	APC_PMI		0x00008000	/* Pipe empty interrupt */
     85       1.1    mrg #define	APC_PM		0x00004000	/* Play pipe empty */
     86       1.1    mrg #define	APC_PD		0x00002000	/* Playback NVA dirty */
     87       1.1    mrg #define	APC_PMIE	0x00001000	/* play pipe empty Int enable */
     88       1.1    mrg #define	APC_CM		0x00000800	/* Cap data dropped on floor */
     89       1.1    mrg #define	APC_CD		0x00000400	/* Capture NVA dirty */
     90       1.1    mrg #define	APC_CMI		0x00000200	/* Capture pipe empty interrupt */
     91       1.1    mrg #define	APC_CMIE	0x00000100	/* Cap. pipe empty int enable */
     92       1.1    mrg #define	APC_PPAUSE	0x00000080	/* Pause the play DMA */
     93       1.1    mrg #define	APC_CPAUSE	0x00000040	/* Pause the capture DMA */
     94       1.1    mrg #define	APC_CODEC_PDN   0x00000020	/* CODEC RESET */
     95       1.1    mrg #define	PDMA_GO		0x00000008
     96       1.1    mrg #define	CDMA_GO		0x00000004	/* bit 2 of the csr */
     97       1.1    mrg #define	APC_RESET	0x00000001	/* Reset the chip */
     98       1.1    mrg 
     99       1.1    mrg #define APC_BITS					\
    100       1.1    mrg 	"\20\30IP\27PI\26CI\25EI\24IE"			\
    101       1.1    mrg 	"\23PIE\22CIE\21EIE\20PMI\17PM\16PD\15PMIE"	\
    102       1.1    mrg 	"\14CM\13CD\12CMI\11CMIE\10PPAUSE\7CPAUSE\6PDN\4PGO\3CGO"
    103       1.1    mrg 
    104       1.1    mrg /*
    105       1.3    uwe  * Note that when we program CSR, we should be careful to not
    106       1.3    uwe  * accidentally clear any pending interrupt bits (a pending interrupt
    107       1.3    uwe  * reads as 1 and writing back 1 will clear), so instead of
    108       1.3    uwe  *
    109       1.3    uwe  *     dma->dmacsr |= bits;
    110       1.3    uwe  *
    111       1.3    uwe  * we should do
    112       1.3    uwe  *
    113       1.3    uwe  *     temp = dma->dmacsr & ~APC_INTR_MASK;
    114       1.3    uwe  *     temp |= bits;
    115       1.3    uwe  *     dma->dmacsr = temp;
    116       1.3    uwe  *
    117       1.3    uwe  * When clearing bits, always add APC_INTR_MASK, i.e.
    118       1.3    uwe  *
    119       1.3    uwe  *     dma->dmacsr &= ~(bits | APC_INTR_MASK);
    120       1.1    mrg  */
    121       1.3    uwe #define APC_INTR_MASK	(APC_IP|APC_PI|APC_CI|APC_EI|APC_PMI|APC_CMI)
    122       1.1    mrg 
    123       1.3    uwe #endif /* _DEV_IC_APCDMAREG_H_ */
    124