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ath.c revision 1.1.1.2
      1      1.1  dyoung /*-
      2      1.1  dyoung  * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting
      3      1.1  dyoung  * All rights reserved.
      4      1.1  dyoung  *
      5      1.1  dyoung  * Redistribution and use in source and binary forms, with or without
      6      1.1  dyoung  * modification, are permitted provided that the following conditions
      7      1.1  dyoung  * are met:
      8      1.1  dyoung  * 1. Redistributions of source code must retain the above copyright
      9      1.1  dyoung  *    notice, this list of conditions and the following disclaimer,
     10      1.1  dyoung  *    without modification.
     11      1.1  dyoung  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
     12      1.1  dyoung  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
     13      1.1  dyoung  *    redistribution must be conditioned upon including a substantially
     14      1.1  dyoung  *    similar Disclaimer requirement for further binary redistribution.
     15      1.1  dyoung  * 3. Neither the names of the above-listed copyright holders nor the names
     16      1.1  dyoung  *    of any contributors may be used to endorse or promote products derived
     17      1.1  dyoung  *    from this software without specific prior written permission.
     18      1.1  dyoung  *
     19      1.1  dyoung  * Alternatively, this software may be distributed under the terms of the
     20      1.1  dyoung  * GNU General Public License ("GPL") version 2 as published by the Free
     21      1.1  dyoung  * Software Foundation.
     22      1.1  dyoung  *
     23      1.1  dyoung  * NO WARRANTY
     24      1.1  dyoung  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     25      1.1  dyoung  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     26      1.1  dyoung  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
     27      1.1  dyoung  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
     28      1.1  dyoung  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
     29      1.1  dyoung  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     30      1.1  dyoung  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     31      1.1  dyoung  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
     32      1.1  dyoung  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     33      1.1  dyoung  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     34      1.1  dyoung  * THE POSSIBILITY OF SUCH DAMAGES.
     35      1.1  dyoung  */
     36      1.1  dyoung 
     37      1.1  dyoung #include <sys/cdefs.h>
     38  1.1.1.2  dyoung __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.36 2003/11/29 01:23:59 sam Exp $");
     39      1.1  dyoung 
     40      1.1  dyoung /*
     41      1.1  dyoung  * Driver for the Atheros Wireless LAN controller.
     42      1.1  dyoung  *
     43      1.1  dyoung  * This software is derived from work of Atsushi Onoe; his contribution
     44      1.1  dyoung  * is greatly appreciated.
     45      1.1  dyoung  */
     46      1.1  dyoung 
     47      1.1  dyoung #include "opt_inet.h"
     48      1.1  dyoung 
     49      1.1  dyoung #include <sys/param.h>
     50      1.1  dyoung #include <sys/systm.h>
     51      1.1  dyoung #include <sys/sysctl.h>
     52      1.1  dyoung #include <sys/mbuf.h>
     53      1.1  dyoung #include <sys/malloc.h>
     54      1.1  dyoung #include <sys/lock.h>
     55      1.1  dyoung #include <sys/mutex.h>
     56      1.1  dyoung #include <sys/kernel.h>
     57      1.1  dyoung #include <sys/socket.h>
     58      1.1  dyoung #include <sys/sockio.h>
     59      1.1  dyoung #include <sys/errno.h>
     60      1.1  dyoung #include <sys/callout.h>
     61      1.1  dyoung #include <sys/bus.h>
     62      1.1  dyoung #include <sys/endian.h>
     63      1.1  dyoung 
     64      1.1  dyoung #include <machine/bus.h>
     65      1.1  dyoung 
     66      1.1  dyoung #include <net/if.h>
     67      1.1  dyoung #include <net/if_dl.h>
     68      1.1  dyoung #include <net/if_media.h>
     69      1.1  dyoung #include <net/if_arp.h>
     70      1.1  dyoung #include <net/ethernet.h>
     71      1.1  dyoung #include <net/if_llc.h>
     72      1.1  dyoung 
     73      1.1  dyoung #include <net80211/ieee80211_var.h>
     74      1.1  dyoung 
     75      1.1  dyoung #include <net/bpf.h>
     76      1.1  dyoung 
     77      1.1  dyoung #ifdef INET
     78      1.1  dyoung #include <netinet/in.h>
     79      1.1  dyoung #include <netinet/if_ether.h>
     80      1.1  dyoung #endif
     81      1.1  dyoung 
     82      1.1  dyoung #define	AR_DEBUG
     83      1.1  dyoung #include <dev/ath/if_athvar.h>
     84      1.1  dyoung #include <contrib/dev/ath/ah_desc.h>
     85      1.1  dyoung 
     86      1.1  dyoung /* unalligned little endian access */
     87      1.1  dyoung #define LE_READ_2(p)							\
     88      1.1  dyoung 	((u_int16_t)							\
     89      1.1  dyoung 	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8)))
     90      1.1  dyoung #define LE_READ_4(p)							\
     91      1.1  dyoung 	((u_int32_t)							\
     92      1.1  dyoung 	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8) |	\
     93      1.1  dyoung 	  (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
     94      1.1  dyoung 
     95      1.1  dyoung static void	ath_init(void *);
     96      1.1  dyoung static void	ath_stop(struct ifnet *);
     97      1.1  dyoung static void	ath_start(struct ifnet *);
     98      1.1  dyoung static void	ath_reset(struct ath_softc *);
     99      1.1  dyoung static int	ath_media_change(struct ifnet *);
    100      1.1  dyoung static void	ath_watchdog(struct ifnet *);
    101      1.1  dyoung static int	ath_ioctl(struct ifnet *, u_long, caddr_t);
    102      1.1  dyoung static void	ath_fatal_proc(void *, int);
    103      1.1  dyoung static void	ath_rxorn_proc(void *, int);
    104      1.1  dyoung static void	ath_bmiss_proc(void *, int);
    105      1.1  dyoung static void	ath_initkeytable(struct ath_softc *);
    106      1.1  dyoung static void	ath_mode_init(struct ath_softc *);
    107      1.1  dyoung static int	ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
    108      1.1  dyoung static void	ath_beacon_proc(void *, int);
    109      1.1  dyoung static void	ath_beacon_free(struct ath_softc *);
    110      1.1  dyoung static void	ath_beacon_config(struct ath_softc *);
    111      1.1  dyoung static int	ath_desc_alloc(struct ath_softc *);
    112      1.1  dyoung static void	ath_desc_free(struct ath_softc *);
    113      1.1  dyoung static struct ieee80211_node *ath_node_alloc(struct ieee80211com *);
    114      1.1  dyoung static void	ath_node_free(struct ieee80211com *, struct ieee80211_node *);
    115      1.1  dyoung static void	ath_node_copy(struct ieee80211com *,
    116      1.1  dyoung 			struct ieee80211_node *, const struct ieee80211_node *);
    117  1.1.1.2  dyoung static u_int8_t	ath_node_getrssi(struct ieee80211com *,
    118  1.1.1.2  dyoung 			struct ieee80211_node *);
    119      1.1  dyoung static int	ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
    120      1.1  dyoung static void	ath_rx_proc(void *, int);
    121      1.1  dyoung static int	ath_tx_start(struct ath_softc *, struct ieee80211_node *,
    122      1.1  dyoung 			     struct ath_buf *, struct mbuf *);
    123      1.1  dyoung static void	ath_tx_proc(void *, int);
    124      1.1  dyoung static int	ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
    125      1.1  dyoung static void	ath_draintxq(struct ath_softc *);
    126      1.1  dyoung static void	ath_stoprecv(struct ath_softc *);
    127      1.1  dyoung static int	ath_startrecv(struct ath_softc *);
    128      1.1  dyoung static void	ath_next_scan(void *);
    129      1.1  dyoung static void	ath_calibrate(void *);
    130      1.1  dyoung static int	ath_newstate(struct ieee80211com *, enum ieee80211_state, int);
    131      1.1  dyoung static void	ath_newassoc(struct ieee80211com *,
    132      1.1  dyoung 			struct ieee80211_node *, int);
    133      1.1  dyoung static int	ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor);
    134      1.1  dyoung 
    135      1.1  dyoung static int	ath_rate_setup(struct ath_softc *sc, u_int mode);
    136      1.1  dyoung static void	ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
    137      1.1  dyoung static void	ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state);
    138      1.1  dyoung static void	ath_rate_ctl(void *, struct ieee80211_node *);
    139      1.1  dyoung 
    140      1.1  dyoung SYSCTL_DECL(_hw_ath);
    141      1.1  dyoung 
    142      1.1  dyoung /* XXX validate sysctl values */
    143      1.1  dyoung static	int ath_dwelltime = 200;		/* 5 channels/second */
    144      1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime,
    145      1.1  dyoung 	    0, "channel dwell time (ms) for AP/station scanning");
    146      1.1  dyoung static	int ath_calinterval = 30;		/* calibrate every 30 secs */
    147      1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval,
    148      1.1  dyoung 	    0, "chip calibration interval (secs)");
    149      1.1  dyoung static	int ath_outdoor = AH_TRUE;		/* outdoor operation */
    150      1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor,
    151      1.1  dyoung 	    0, "enable/disable outdoor operation");
    152      1.1  dyoung static	int ath_countrycode = CTRY_DEFAULT;	/* country code */
    153      1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode,
    154      1.1  dyoung 	    0, "country code");
    155      1.1  dyoung static	int ath_regdomain = 0;			/* regulatory domain */
    156      1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain,
    157      1.1  dyoung 	    0, "regulatory domain");
    158      1.1  dyoung 
    159      1.1  dyoung #ifdef AR_DEBUG
    160      1.1  dyoung int	ath_debug = 0;
    161      1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
    162      1.1  dyoung 	    0, "control debugging printfs");
    163      1.1  dyoung #define	IFF_DUMPPKTS(_ifp) \
    164      1.1  dyoung 	(ath_debug || \
    165      1.1  dyoung 	    ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
    166      1.1  dyoung static	void ath_printrxbuf(struct ath_buf *bf, int);
    167      1.1  dyoung static	void ath_printtxbuf(struct ath_buf *bf, int);
    168      1.1  dyoung #define	DPRINTF(X)	if (ath_debug) printf X
    169      1.1  dyoung #define	DPRINTF2(X)	if (ath_debug > 1) printf X
    170      1.1  dyoung #else
    171      1.1  dyoung #define	IFF_DUMPPKTS(_ifp) \
    172      1.1  dyoung 	(((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
    173      1.1  dyoung #define	DPRINTF(X)
    174      1.1  dyoung #define	DPRINTF2(X)
    175      1.1  dyoung #endif
    176      1.1  dyoung 
    177      1.1  dyoung int
    178      1.1  dyoung ath_attach(u_int16_t devid, struct ath_softc *sc)
    179      1.1  dyoung {
    180      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    181      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
    182      1.1  dyoung 	struct ath_hal *ah;
    183      1.1  dyoung 	HAL_STATUS status;
    184      1.1  dyoung 	int error = 0;
    185      1.1  dyoung 
    186      1.1  dyoung 	DPRINTF(("ath_attach: devid 0x%x\n", devid));
    187      1.1  dyoung 
    188      1.1  dyoung 	/* set these up early for if_printf use */
    189  1.1.1.2  dyoung 	if_initname(ifp, device_get_name(sc->sc_dev),
    190  1.1.1.2  dyoung 	    device_get_unit(sc->sc_dev));
    191      1.1  dyoung 
    192      1.1  dyoung 	ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
    193      1.1  dyoung 	if (ah == NULL) {
    194      1.1  dyoung 		if_printf(ifp, "unable to attach hardware; HAL status %u\n",
    195      1.1  dyoung 			status);
    196      1.1  dyoung 		error = ENXIO;
    197      1.1  dyoung 		goto bad;
    198      1.1  dyoung 	}
    199  1.1.1.2  dyoung 	if (ah->ah_abi != HAL_ABI_VERSION) {
    200  1.1.1.2  dyoung 		if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n",
    201  1.1.1.2  dyoung 			ah->ah_abi, HAL_ABI_VERSION);
    202  1.1.1.2  dyoung 		error = ENXIO;
    203  1.1.1.2  dyoung 		goto bad;
    204  1.1.1.2  dyoung 	}
    205  1.1.1.2  dyoung 	if_printf(ifp, "mac %d.%d phy %d.%d",
    206  1.1.1.2  dyoung 		ah->ah_macVersion, ah->ah_macRev,
    207  1.1.1.2  dyoung 		ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf);
    208  1.1.1.2  dyoung 	if (ah->ah_analog5GhzRev)
    209  1.1.1.2  dyoung 		printf(" 5ghz radio %d.%d",
    210  1.1.1.2  dyoung 			ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf);
    211  1.1.1.2  dyoung 	if (ah->ah_analog2GhzRev)
    212  1.1.1.2  dyoung 		printf(" 2ghz radio %d.%d",
    213  1.1.1.2  dyoung 			ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf);
    214  1.1.1.2  dyoung 	printf("\n");
    215      1.1  dyoung 	sc->sc_ah = ah;
    216      1.1  dyoung 	sc->sc_invalid = 0;	/* ready to go, enable interrupt handling */
    217      1.1  dyoung 
    218      1.1  dyoung 	/*
    219      1.1  dyoung 	 * Collect the channel list using the default country
    220      1.1  dyoung 	 * code and including outdoor channels.  The 802.11 layer
    221      1.1  dyoung 	 * is resposible for filtering this list based on settings
    222      1.1  dyoung 	 * like the phy mode.
    223      1.1  dyoung 	 */
    224      1.1  dyoung 	error = ath_getchannels(sc, ath_countrycode, ath_outdoor);
    225      1.1  dyoung 	if (error != 0)
    226      1.1  dyoung 		goto bad;
    227      1.1  dyoung 	/*
    228      1.1  dyoung 	 * Copy these back; they are set as a side effect
    229      1.1  dyoung 	 * of constructing the channel list.
    230      1.1  dyoung 	 */
    231      1.1  dyoung 	ath_regdomain = ath_hal_getregdomain(ah);
    232      1.1  dyoung 	ath_countrycode = ath_hal_getcountrycode(ah);
    233      1.1  dyoung 
    234      1.1  dyoung 	/*
    235      1.1  dyoung 	 * Setup rate tables for all potential media types.
    236      1.1  dyoung 	 */
    237      1.1  dyoung 	ath_rate_setup(sc, IEEE80211_MODE_11A);
    238      1.1  dyoung 	ath_rate_setup(sc, IEEE80211_MODE_11B);
    239      1.1  dyoung 	ath_rate_setup(sc, IEEE80211_MODE_11G);
    240      1.1  dyoung 	ath_rate_setup(sc, IEEE80211_MODE_TURBO);
    241      1.1  dyoung 
    242      1.1  dyoung 	error = ath_desc_alloc(sc);
    243      1.1  dyoung 	if (error != 0) {
    244      1.1  dyoung 		if_printf(ifp, "failed to allocate descriptors: %d\n", error);
    245      1.1  dyoung 		goto bad;
    246      1.1  dyoung 	}
    247      1.1  dyoung 	callout_init(&sc->sc_scan_ch, CALLOUT_MPSAFE);
    248      1.1  dyoung 	callout_init(&sc->sc_cal_ch, CALLOUT_MPSAFE);
    249      1.1  dyoung 
    250  1.1.1.2  dyoung 	ATH_TXBUF_LOCK_INIT(sc);
    251  1.1.1.2  dyoung 	ATH_TXQ_LOCK_INIT(sc);
    252      1.1  dyoung 
    253      1.1  dyoung 	TASK_INIT(&sc->sc_txtask, 0, ath_tx_proc, sc);
    254      1.1  dyoung 	TASK_INIT(&sc->sc_rxtask, 0, ath_rx_proc, sc);
    255      1.1  dyoung 	TASK_INIT(&sc->sc_swbatask, 0, ath_beacon_proc, sc);
    256      1.1  dyoung 	TASK_INIT(&sc->sc_rxorntask, 0, ath_rxorn_proc, sc);
    257      1.1  dyoung 	TASK_INIT(&sc->sc_fataltask, 0, ath_fatal_proc, sc);
    258      1.1  dyoung 	TASK_INIT(&sc->sc_bmisstask, 0, ath_bmiss_proc, sc);
    259      1.1  dyoung 
    260      1.1  dyoung 	/*
    261      1.1  dyoung 	 * For now just pre-allocate one data queue and one
    262      1.1  dyoung 	 * beacon queue.  Note that the HAL handles resetting
    263      1.1  dyoung 	 * them at the needed time.  Eventually we'll want to
    264      1.1  dyoung 	 * allocate more tx queues for splitting management
    265      1.1  dyoung 	 * frames and for QOS support.
    266      1.1  dyoung 	 */
    267      1.1  dyoung 	sc->sc_txhalq = ath_hal_setuptxqueue(ah,
    268      1.1  dyoung 		HAL_TX_QUEUE_DATA,
    269      1.1  dyoung 		AH_TRUE			/* enable interrupts */
    270      1.1  dyoung 	);
    271      1.1  dyoung 	if (sc->sc_txhalq == (u_int) -1) {
    272      1.1  dyoung 		if_printf(ifp, "unable to setup a data xmit queue!\n");
    273      1.1  dyoung 		goto bad;
    274      1.1  dyoung 	}
    275      1.1  dyoung 	sc->sc_bhalq = ath_hal_setuptxqueue(ah,
    276      1.1  dyoung 		HAL_TX_QUEUE_BEACON,
    277      1.1  dyoung 		AH_TRUE			/* enable interrupts */
    278      1.1  dyoung 	);
    279      1.1  dyoung 	if (sc->sc_bhalq == (u_int) -1) {
    280      1.1  dyoung 		if_printf(ifp, "unable to setup a beacon xmit queue!\n");
    281      1.1  dyoung 		goto bad;
    282      1.1  dyoung 	}
    283      1.1  dyoung 
    284      1.1  dyoung 	ifp->if_softc = sc;
    285      1.1  dyoung 	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
    286      1.1  dyoung 	ifp->if_start = ath_start;
    287      1.1  dyoung 	ifp->if_watchdog = ath_watchdog;
    288      1.1  dyoung 	ifp->if_ioctl = ath_ioctl;
    289      1.1  dyoung 	ifp->if_init = ath_init;
    290      1.1  dyoung 	ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
    291      1.1  dyoung 
    292      1.1  dyoung 	ic->ic_softc = sc;
    293      1.1  dyoung 	ic->ic_newassoc = ath_newassoc;
    294      1.1  dyoung 	/* XXX not right but it's not used anywhere important */
    295      1.1  dyoung 	ic->ic_phytype = IEEE80211_T_OFDM;
    296      1.1  dyoung 	ic->ic_opmode = IEEE80211_M_STA;
    297  1.1.1.2  dyoung 	ic->ic_caps = IEEE80211_C_WEP		/* wep supported */
    298  1.1.1.2  dyoung 		| IEEE80211_C_IBSS		/* ibss, nee adhoc, mode */
    299  1.1.1.2  dyoung 		| IEEE80211_C_HOSTAP		/* hostap mode */
    300  1.1.1.2  dyoung 		| IEEE80211_C_MONITOR		/* monitor mode */
    301  1.1.1.2  dyoung 		| IEEE80211_C_SHPREAMBLE	/* short preamble supported */
    302  1.1.1.2  dyoung 		| IEEE80211_C_RCVMGT;		/* recv management frames */
    303      1.1  dyoung 
    304      1.1  dyoung 	/* get mac address from hardware */
    305      1.1  dyoung 	ath_hal_getmac(ah, ic->ic_myaddr);
    306      1.1  dyoung 
    307      1.1  dyoung 	/* call MI attach routine. */
    308      1.1  dyoung 	ieee80211_ifattach(ifp);
    309      1.1  dyoung 	/* override default methods */
    310      1.1  dyoung 	ic->ic_node_alloc = ath_node_alloc;
    311      1.1  dyoung 	ic->ic_node_free = ath_node_free;
    312      1.1  dyoung 	ic->ic_node_copy = ath_node_copy;
    313  1.1.1.2  dyoung 	ic->ic_node_getrssi = ath_node_getrssi;
    314      1.1  dyoung 	sc->sc_newstate = ic->ic_newstate;
    315      1.1  dyoung 	ic->ic_newstate = ath_newstate;
    316      1.1  dyoung 	/* complete initialization */
    317      1.1  dyoung 	ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status);
    318      1.1  dyoung 
    319      1.1  dyoung 	bpfattach2(ifp, DLT_IEEE802_11_RADIO,
    320      1.1  dyoung 		sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
    321      1.1  dyoung 		&sc->sc_drvbpf);
    322      1.1  dyoung 	/*
    323      1.1  dyoung 	 * Initialize constant fields.
    324      1.1  dyoung 	 *
    325      1.1  dyoung 	 * NB: the channel is setup each time we transition to the
    326      1.1  dyoung 	 *     RUN state to avoid filling it in for each frame.
    327      1.1  dyoung 	 */
    328      1.1  dyoung 	sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th);
    329      1.1  dyoung 	sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT;
    330      1.1  dyoung 
    331      1.1  dyoung 	sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th);
    332      1.1  dyoung 	sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT;
    333      1.1  dyoung 
    334      1.1  dyoung 	if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr));
    335      1.1  dyoung 
    336      1.1  dyoung 	return 0;
    337      1.1  dyoung bad:
    338      1.1  dyoung 	if (ah)
    339      1.1  dyoung 		ath_hal_detach(ah);
    340      1.1  dyoung 	sc->sc_invalid = 1;
    341      1.1  dyoung 	return error;
    342      1.1  dyoung }
    343      1.1  dyoung 
    344      1.1  dyoung int
    345      1.1  dyoung ath_detach(struct ath_softc *sc)
    346      1.1  dyoung {
    347      1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    348      1.1  dyoung 
    349      1.1  dyoung 	DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags));
    350      1.1  dyoung 
    351      1.1  dyoung 	ath_stop(ifp);
    352      1.1  dyoung 	bpfdetach(ifp);
    353      1.1  dyoung 	ath_desc_free(sc);
    354      1.1  dyoung 	ath_hal_detach(sc->sc_ah);
    355      1.1  dyoung 	ieee80211_ifdetach(ifp);
    356  1.1.1.2  dyoung 
    357  1.1.1.2  dyoung 	ATH_TXBUF_LOCK_DESTROY(sc);
    358  1.1.1.2  dyoung 	ATH_TXQ_LOCK_DESTROY(sc);
    359  1.1.1.2  dyoung 
    360      1.1  dyoung 	return 0;
    361      1.1  dyoung }
    362      1.1  dyoung 
    363      1.1  dyoung void
    364      1.1  dyoung ath_suspend(struct ath_softc *sc)
    365      1.1  dyoung {
    366      1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    367      1.1  dyoung 
    368      1.1  dyoung 	DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags));
    369      1.1  dyoung 
    370      1.1  dyoung 	ath_stop(ifp);
    371      1.1  dyoung }
    372      1.1  dyoung 
    373      1.1  dyoung void
    374      1.1  dyoung ath_resume(struct ath_softc *sc)
    375      1.1  dyoung {
    376      1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    377      1.1  dyoung 
    378      1.1  dyoung 	DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags));
    379      1.1  dyoung 
    380      1.1  dyoung 	if (ifp->if_flags & IFF_UP) {
    381      1.1  dyoung 		ath_init(ifp);
    382      1.1  dyoung 		if (ifp->if_flags & IFF_RUNNING)
    383      1.1  dyoung 			ath_start(ifp);
    384      1.1  dyoung 	}
    385      1.1  dyoung }
    386      1.1  dyoung 
    387      1.1  dyoung void
    388      1.1  dyoung ath_shutdown(struct ath_softc *sc)
    389      1.1  dyoung {
    390      1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    391      1.1  dyoung 
    392      1.1  dyoung 	DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags));
    393      1.1  dyoung 
    394      1.1  dyoung 	ath_stop(ifp);
    395      1.1  dyoung }
    396      1.1  dyoung 
    397      1.1  dyoung void
    398      1.1  dyoung ath_intr(void *arg)
    399      1.1  dyoung {
    400      1.1  dyoung 	struct ath_softc *sc = arg;
    401      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    402      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
    403      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    404      1.1  dyoung 	HAL_INT status;
    405      1.1  dyoung 
    406      1.1  dyoung 	if (sc->sc_invalid) {
    407      1.1  dyoung 		/*
    408      1.1  dyoung 		 * The hardware is not ready/present, don't touch anything.
    409      1.1  dyoung 		 * Note this can happen early on if the IRQ is shared.
    410      1.1  dyoung 		 */
    411      1.1  dyoung 		DPRINTF(("ath_intr: invalid; ignored\n"));
    412      1.1  dyoung 		return;
    413      1.1  dyoung 	}
    414      1.1  dyoung 	if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
    415      1.1  dyoung 		DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags));
    416      1.1  dyoung 		ath_hal_getisr(ah, &status);	/* clear ISR */
    417      1.1  dyoung 		ath_hal_intrset(ah, 0);		/* disable further intr's */
    418      1.1  dyoung 		return;
    419      1.1  dyoung 	}
    420      1.1  dyoung 	ath_hal_getisr(ah, &status);		/* NB: clears ISR too */
    421      1.1  dyoung 	DPRINTF2(("ath_intr: status 0x%x\n", status));
    422      1.1  dyoung #ifdef AR_DEBUG
    423      1.1  dyoung 	if (ath_debug &&
    424      1.1  dyoung 	    (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) {
    425      1.1  dyoung 		if_printf(ifp, "ath_intr: status 0x%x\n", status);
    426      1.1  dyoung 		ath_hal_dumpstate(ah);
    427      1.1  dyoung 	}
    428      1.1  dyoung #endif /* AR_DEBUG */
    429  1.1.1.2  dyoung 	status &= sc->sc_imask;			/* discard unasked for bits */
    430      1.1  dyoung 	if (status & HAL_INT_FATAL) {
    431      1.1  dyoung 		sc->sc_stats.ast_hardware++;
    432      1.1  dyoung 		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
    433      1.1  dyoung 		taskqueue_enqueue(taskqueue_swi, &sc->sc_fataltask);
    434      1.1  dyoung 	} else if (status & HAL_INT_RXORN) {
    435      1.1  dyoung 		sc->sc_stats.ast_rxorn++;
    436      1.1  dyoung 		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
    437      1.1  dyoung 		taskqueue_enqueue(taskqueue_swi, &sc->sc_rxorntask);
    438      1.1  dyoung 	} else {
    439      1.1  dyoung 		if (status & HAL_INT_RXEOL) {
    440      1.1  dyoung 			/*
    441      1.1  dyoung 			 * NB: the hardware should re-read the link when
    442      1.1  dyoung 			 *     RXE bit is written, but it doesn't work at
    443      1.1  dyoung 			 *     least on older hardware revs.
    444      1.1  dyoung 			 */
    445      1.1  dyoung 			sc->sc_stats.ast_rxeol++;
    446      1.1  dyoung 			sc->sc_rxlink = NULL;
    447      1.1  dyoung 		}
    448      1.1  dyoung 		if (status & HAL_INT_TXURN) {
    449      1.1  dyoung 			sc->sc_stats.ast_txurn++;
    450      1.1  dyoung 			/* bump tx trigger level */
    451      1.1  dyoung 			ath_hal_updatetxtriglevel(ah, AH_TRUE);
    452      1.1  dyoung 		}
    453      1.1  dyoung 		if (status & HAL_INT_RX)
    454      1.1  dyoung 			taskqueue_enqueue(taskqueue_swi, &sc->sc_rxtask);
    455      1.1  dyoung 		if (status & HAL_INT_TX)
    456      1.1  dyoung 			taskqueue_enqueue(taskqueue_swi, &sc->sc_txtask);
    457      1.1  dyoung 		if (status & HAL_INT_SWBA)
    458      1.1  dyoung 			taskqueue_enqueue(taskqueue_swi, &sc->sc_swbatask);
    459      1.1  dyoung 		if (status & HAL_INT_BMISS) {
    460      1.1  dyoung 			sc->sc_stats.ast_bmiss++;
    461      1.1  dyoung 			taskqueue_enqueue(taskqueue_swi, &sc->sc_bmisstask);
    462      1.1  dyoung 		}
    463      1.1  dyoung 	}
    464      1.1  dyoung }
    465      1.1  dyoung 
    466      1.1  dyoung static void
    467      1.1  dyoung ath_fatal_proc(void *arg, int pending)
    468      1.1  dyoung {
    469      1.1  dyoung 	struct ath_softc *sc = arg;
    470      1.1  dyoung 
    471      1.1  dyoung 	device_printf(sc->sc_dev, "hardware error; resetting\n");
    472      1.1  dyoung 	ath_reset(sc);
    473      1.1  dyoung }
    474      1.1  dyoung 
    475      1.1  dyoung static void
    476      1.1  dyoung ath_rxorn_proc(void *arg, int pending)
    477      1.1  dyoung {
    478      1.1  dyoung 	struct ath_softc *sc = arg;
    479      1.1  dyoung 
    480      1.1  dyoung 	device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n");
    481      1.1  dyoung 	ath_reset(sc);
    482      1.1  dyoung }
    483      1.1  dyoung 
    484      1.1  dyoung static void
    485      1.1  dyoung ath_bmiss_proc(void *arg, int pending)
    486      1.1  dyoung {
    487      1.1  dyoung 	struct ath_softc *sc = arg;
    488      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    489      1.1  dyoung 
    490      1.1  dyoung 	DPRINTF(("ath_bmiss_proc: pending %u\n", pending));
    491      1.1  dyoung 	KASSERT(ic->ic_opmode == IEEE80211_M_STA,
    492      1.1  dyoung 		("unexpect operating mode %u", ic->ic_opmode));
    493  1.1.1.2  dyoung 	if (ic->ic_state == IEEE80211_S_RUN) {
    494  1.1.1.2  dyoung 		/*
    495  1.1.1.2  dyoung 		 * Rather than go directly to scan state, try to
    496  1.1.1.2  dyoung 		 * reassociate first.  If that fails then the state
    497  1.1.1.2  dyoung 		 * machine will drop us into scanning after timing
    498  1.1.1.2  dyoung 		 * out waiting for a probe response.
    499  1.1.1.2  dyoung 		 */
    500  1.1.1.2  dyoung 		ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1);
    501  1.1.1.2  dyoung 	}
    502      1.1  dyoung }
    503      1.1  dyoung 
    504      1.1  dyoung static u_int
    505      1.1  dyoung ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan)
    506      1.1  dyoung {
    507      1.1  dyoung 	static const u_int modeflags[] = {
    508      1.1  dyoung 		0,			/* IEEE80211_MODE_AUTO */
    509      1.1  dyoung 		CHANNEL_A,		/* IEEE80211_MODE_11A */
    510      1.1  dyoung 		CHANNEL_B,		/* IEEE80211_MODE_11B */
    511      1.1  dyoung 		CHANNEL_PUREG,		/* IEEE80211_MODE_11G */
    512      1.1  dyoung 		CHANNEL_T		/* IEEE80211_MODE_TURBO */
    513      1.1  dyoung 	};
    514      1.1  dyoung 	return modeflags[ieee80211_chan2mode(ic, chan)];
    515      1.1  dyoung }
    516      1.1  dyoung 
    517      1.1  dyoung static void
    518      1.1  dyoung ath_init(void *arg)
    519      1.1  dyoung {
    520      1.1  dyoung 	struct ath_softc *sc = (struct ath_softc *) arg;
    521      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    522      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
    523      1.1  dyoung 	struct ieee80211_node *ni;
    524      1.1  dyoung 	enum ieee80211_phymode mode;
    525      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    526      1.1  dyoung 	HAL_STATUS status;
    527      1.1  dyoung 	HAL_CHANNEL hchan;
    528      1.1  dyoung 
    529      1.1  dyoung 	DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags));
    530      1.1  dyoung 
    531  1.1.1.2  dyoung 	ATH_LOCK(sc);
    532      1.1  dyoung 	/*
    533      1.1  dyoung 	 * Stop anything previously setup.  This is safe
    534      1.1  dyoung 	 * whether this is the first time through or not.
    535      1.1  dyoung 	 */
    536      1.1  dyoung 	ath_stop(ifp);
    537      1.1  dyoung 
    538      1.1  dyoung 	/*
    539      1.1  dyoung 	 * The basic interface to setting the hardware in a good
    540      1.1  dyoung 	 * state is ``reset''.  On return the hardware is known to
    541      1.1  dyoung 	 * be powered up and with interrupts disabled.  This must
    542      1.1  dyoung 	 * be followed by initialization of the appropriate bits
    543      1.1  dyoung 	 * and then setup of the interrupt mask.
    544      1.1  dyoung 	 */
    545      1.1  dyoung 	hchan.channel = ic->ic_ibss_chan->ic_freq;
    546      1.1  dyoung 	hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan);
    547      1.1  dyoung 	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) {
    548      1.1  dyoung 		if_printf(ifp, "unable to reset hardware; hal status %u\n",
    549      1.1  dyoung 			status);
    550      1.1  dyoung 		goto done;
    551      1.1  dyoung 	}
    552      1.1  dyoung 
    553      1.1  dyoung 	/*
    554      1.1  dyoung 	 * Setup the hardware after reset: the key cache
    555      1.1  dyoung 	 * is filled as needed and the receive engine is
    556      1.1  dyoung 	 * set going.  Frame transmit is handled entirely
    557      1.1  dyoung 	 * in the frame output path; there's nothing to do
    558      1.1  dyoung 	 * here except setup the interrupt mask.
    559      1.1  dyoung 	 */
    560      1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_WEPON)
    561      1.1  dyoung 		ath_initkeytable(sc);
    562      1.1  dyoung 	if (ath_startrecv(sc) != 0) {
    563      1.1  dyoung 		if_printf(ifp, "unable to start recv logic\n");
    564      1.1  dyoung 		goto done;
    565      1.1  dyoung 	}
    566      1.1  dyoung 
    567      1.1  dyoung 	/*
    568      1.1  dyoung 	 * Enable interrupts.
    569      1.1  dyoung 	 */
    570      1.1  dyoung 	sc->sc_imask = HAL_INT_RX | HAL_INT_TX
    571      1.1  dyoung 		  | HAL_INT_RXEOL | HAL_INT_RXORN
    572      1.1  dyoung 		  | HAL_INT_FATAL | HAL_INT_GLOBAL;
    573      1.1  dyoung 	ath_hal_intrset(ah, sc->sc_imask);
    574      1.1  dyoung 
    575      1.1  dyoung 	ifp->if_flags |= IFF_RUNNING;
    576      1.1  dyoung 	ic->ic_state = IEEE80211_S_INIT;
    577      1.1  dyoung 
    578      1.1  dyoung 	/*
    579      1.1  dyoung 	 * The hardware should be ready to go now so it's safe
    580      1.1  dyoung 	 * to kick the 802.11 state machine as it's likely to
    581      1.1  dyoung 	 * immediately call back to us to send mgmt frames.
    582      1.1  dyoung 	 */
    583      1.1  dyoung 	ni = ic->ic_bss;
    584      1.1  dyoung 	ni->ni_chan = ic->ic_ibss_chan;
    585      1.1  dyoung 	mode = ieee80211_chan2mode(ic, ni->ni_chan);
    586      1.1  dyoung 	if (mode != sc->sc_curmode)
    587      1.1  dyoung 		ath_setcurmode(sc, mode);
    588      1.1  dyoung 	if (ic->ic_opmode != IEEE80211_M_MONITOR)
    589      1.1  dyoung 		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
    590      1.1  dyoung 	else
    591      1.1  dyoung 		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
    592      1.1  dyoung done:
    593  1.1.1.2  dyoung 	ATH_UNLOCK(sc);
    594      1.1  dyoung }
    595      1.1  dyoung 
    596      1.1  dyoung static void
    597      1.1  dyoung ath_stop(struct ifnet *ifp)
    598      1.1  dyoung {
    599      1.1  dyoung 	struct ieee80211com *ic = (struct ieee80211com *) ifp;
    600      1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
    601      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    602      1.1  dyoung 
    603      1.1  dyoung 	DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n",
    604      1.1  dyoung 		sc->sc_invalid, ifp->if_flags));
    605      1.1  dyoung 
    606  1.1.1.2  dyoung 	ATH_LOCK(sc);
    607      1.1  dyoung 	if (ifp->if_flags & IFF_RUNNING) {
    608      1.1  dyoung 		/*
    609      1.1  dyoung 		 * Shutdown the hardware and driver:
    610      1.1  dyoung 		 *    disable interrupts
    611      1.1  dyoung 		 *    turn off timers
    612      1.1  dyoung 		 *    clear transmit machinery
    613      1.1  dyoung 		 *    clear receive machinery
    614      1.1  dyoung 		 *    drain and release tx queues
    615      1.1  dyoung 		 *    reclaim beacon resources
    616      1.1  dyoung 		 *    reset 802.11 state machine
    617      1.1  dyoung 		 *    power down hardware
    618      1.1  dyoung 		 *
    619      1.1  dyoung 		 * Note that some of this work is not possible if the
    620      1.1  dyoung 		 * hardware is gone (invalid).
    621      1.1  dyoung 		 */
    622      1.1  dyoung 		ifp->if_flags &= ~IFF_RUNNING;
    623      1.1  dyoung 		ifp->if_timer = 0;
    624      1.1  dyoung 		if (!sc->sc_invalid)
    625      1.1  dyoung 			ath_hal_intrset(ah, 0);
    626      1.1  dyoung 		ath_draintxq(sc);
    627      1.1  dyoung 		if (!sc->sc_invalid)
    628      1.1  dyoung 			ath_stoprecv(sc);
    629      1.1  dyoung 		else
    630      1.1  dyoung 			sc->sc_rxlink = NULL;
    631      1.1  dyoung 		IF_DRAIN(&ifp->if_snd);
    632      1.1  dyoung 		ath_beacon_free(sc);
    633      1.1  dyoung 		ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
    634      1.1  dyoung 		if (!sc->sc_invalid)
    635      1.1  dyoung 			ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0);
    636      1.1  dyoung 	}
    637  1.1.1.2  dyoung 	ATH_UNLOCK(sc);
    638      1.1  dyoung }
    639      1.1  dyoung 
    640      1.1  dyoung /*
    641      1.1  dyoung  * Reset the hardware w/o losing operational state.  This is
    642      1.1  dyoung  * basically a more efficient way of doing ath_stop, ath_init,
    643      1.1  dyoung  * followed by state transitions to the current 802.11
    644      1.1  dyoung  * operational state.  Used to recover from errors rx overrun
    645      1.1  dyoung  * and to reset the hardware when rf gain settings must be reset.
    646      1.1  dyoung  */
    647      1.1  dyoung static void
    648      1.1  dyoung ath_reset(struct ath_softc *sc)
    649      1.1  dyoung {
    650      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    651      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
    652      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    653      1.1  dyoung 	struct ieee80211_channel *c;
    654      1.1  dyoung 	HAL_STATUS status;
    655      1.1  dyoung 	HAL_CHANNEL hchan;
    656      1.1  dyoung 
    657      1.1  dyoung 	/*
    658      1.1  dyoung 	 * Convert to a HAL channel description with the flags
    659      1.1  dyoung 	 * constrained to reflect the current operating mode.
    660      1.1  dyoung 	 */
    661      1.1  dyoung 	c = ic->ic_ibss_chan;
    662      1.1  dyoung 	hchan.channel = c->ic_freq;
    663      1.1  dyoung 	hchan.channelFlags = ath_chan2flags(ic, c);
    664      1.1  dyoung 
    665      1.1  dyoung 	ath_hal_intrset(ah, 0);		/* disable interrupts */
    666      1.1  dyoung 	ath_draintxq(sc);		/* stop xmit side */
    667      1.1  dyoung 	ath_stoprecv(sc);		/* stop recv side */
    668      1.1  dyoung 	/* NB: indicate channel change so we do a full reset */
    669      1.1  dyoung 	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status))
    670      1.1  dyoung 		if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
    671      1.1  dyoung 			__func__, status);
    672      1.1  dyoung 	ath_hal_intrset(ah, sc->sc_imask);
    673      1.1  dyoung 	if (ath_startrecv(sc) != 0)	/* restart recv */
    674      1.1  dyoung 		if_printf(ifp, "%s: unable to start recv logic\n", __func__);
    675      1.1  dyoung 	ath_start(ifp);			/* restart xmit */
    676      1.1  dyoung 	if (ic->ic_state == IEEE80211_S_RUN)
    677      1.1  dyoung 		ath_beacon_config(sc);	/* restart beacons */
    678      1.1  dyoung }
    679      1.1  dyoung 
    680      1.1  dyoung static void
    681      1.1  dyoung ath_start(struct ifnet *ifp)
    682      1.1  dyoung {
    683      1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
    684      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    685      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    686      1.1  dyoung 	struct ieee80211_node *ni;
    687      1.1  dyoung 	struct ath_buf *bf;
    688      1.1  dyoung 	struct mbuf *m;
    689      1.1  dyoung 	struct ieee80211_frame *wh;
    690      1.1  dyoung 
    691      1.1  dyoung 	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
    692      1.1  dyoung 		return;
    693      1.1  dyoung 	for (;;) {
    694      1.1  dyoung 		/*
    695      1.1  dyoung 		 * Grab a TX buffer and associated resources.
    696      1.1  dyoung 		 */
    697  1.1.1.2  dyoung 		ATH_TXBUF_LOCK(sc);
    698      1.1  dyoung 		bf = TAILQ_FIRST(&sc->sc_txbuf);
    699      1.1  dyoung 		if (bf != NULL)
    700      1.1  dyoung 			TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
    701  1.1.1.2  dyoung 		ATH_TXBUF_UNLOCK(sc);
    702      1.1  dyoung 		if (bf == NULL) {
    703      1.1  dyoung 			DPRINTF(("ath_start: out of xmit buffers\n"));
    704      1.1  dyoung 			sc->sc_stats.ast_tx_qstop++;
    705      1.1  dyoung 			ifp->if_flags |= IFF_OACTIVE;
    706      1.1  dyoung 			break;
    707      1.1  dyoung 		}
    708      1.1  dyoung 		/*
    709      1.1  dyoung 		 * Poll the management queue for frames; they
    710      1.1  dyoung 		 * have priority over normal data frames.
    711      1.1  dyoung 		 */
    712      1.1  dyoung 		IF_DEQUEUE(&ic->ic_mgtq, m);
    713      1.1  dyoung 		if (m == NULL) {
    714      1.1  dyoung 			/*
    715      1.1  dyoung 			 * No data frames go out unless we're associated.
    716      1.1  dyoung 			 */
    717      1.1  dyoung 			if (ic->ic_state != IEEE80211_S_RUN) {
    718      1.1  dyoung 				DPRINTF(("ath_start: ignore data packet, "
    719      1.1  dyoung 					"state %u\n", ic->ic_state));
    720      1.1  dyoung 				sc->sc_stats.ast_tx_discard++;
    721  1.1.1.2  dyoung 				ATH_TXBUF_LOCK(sc);
    722      1.1  dyoung 				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
    723  1.1.1.2  dyoung 				ATH_TXBUF_UNLOCK(sc);
    724      1.1  dyoung 				break;
    725      1.1  dyoung 			}
    726      1.1  dyoung 			IF_DEQUEUE(&ifp->if_snd, m);
    727      1.1  dyoung 			if (m == NULL) {
    728  1.1.1.2  dyoung 				ATH_TXBUF_LOCK(sc);
    729      1.1  dyoung 				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
    730  1.1.1.2  dyoung 				ATH_TXBUF_UNLOCK(sc);
    731      1.1  dyoung 				break;
    732      1.1  dyoung 			}
    733      1.1  dyoung 			ifp->if_opackets++;
    734      1.1  dyoung 			BPF_MTAP(ifp, m);
    735      1.1  dyoung 			/*
    736      1.1  dyoung 			 * Encapsulate the packet in prep for transmission.
    737      1.1  dyoung 			 */
    738      1.1  dyoung 			m = ieee80211_encap(ifp, m, &ni);
    739      1.1  dyoung 			if (m == NULL) {
    740      1.1  dyoung 				DPRINTF(("ath_start: encapsulation failure\n"));
    741      1.1  dyoung 				sc->sc_stats.ast_tx_encap++;
    742      1.1  dyoung 				goto bad;
    743      1.1  dyoung 			}
    744      1.1  dyoung 			wh = mtod(m, struct ieee80211_frame *);
    745      1.1  dyoung 			if (ic->ic_flags & IEEE80211_F_WEPON)
    746      1.1  dyoung 				wh->i_fc[1] |= IEEE80211_FC1_WEP;
    747      1.1  dyoung 		} else {
    748      1.1  dyoung 			/*
    749      1.1  dyoung 			 * Hack!  The referenced node pointer is in the
    750      1.1  dyoung 			 * rcvif field of the packet header.  This is
    751      1.1  dyoung 			 * placed there by ieee80211_mgmt_output because
    752      1.1  dyoung 			 * we need to hold the reference with the frame
    753      1.1  dyoung 			 * and there's no other way (other than packet
    754      1.1  dyoung 			 * tags which we consider too expensive to use)
    755      1.1  dyoung 			 * to pass it along.
    756      1.1  dyoung 			 */
    757      1.1  dyoung 			ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
    758      1.1  dyoung 			m->m_pkthdr.rcvif = NULL;
    759      1.1  dyoung 
    760      1.1  dyoung 			wh = mtod(m, struct ieee80211_frame *);
    761      1.1  dyoung 			if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
    762      1.1  dyoung 			    IEEE80211_FC0_SUBTYPE_PROBE_RESP) {
    763      1.1  dyoung 				/* fill time stamp */
    764      1.1  dyoung 				u_int64_t tsf;
    765      1.1  dyoung 				u_int32_t *tstamp;
    766      1.1  dyoung 
    767      1.1  dyoung 				tsf = ath_hal_gettsf64(ah);
    768      1.1  dyoung 				/* XXX: adjust 100us delay to xmit */
    769      1.1  dyoung 				tsf += 100;
    770      1.1  dyoung 				tstamp = (u_int32_t *)&wh[1];
    771      1.1  dyoung 				tstamp[0] = htole32(tsf & 0xffffffff);
    772      1.1  dyoung 				tstamp[1] = htole32(tsf >> 32);
    773      1.1  dyoung 			}
    774      1.1  dyoung 			sc->sc_stats.ast_tx_mgmt++;
    775      1.1  dyoung 		}
    776      1.1  dyoung 		if (ic->ic_rawbpf)
    777      1.1  dyoung 			bpf_mtap(ic->ic_rawbpf, m);
    778      1.1  dyoung 
    779      1.1  dyoung 		if (sc->sc_drvbpf) {
    780      1.1  dyoung 			struct mbuf *mb;
    781      1.1  dyoung 
    782      1.1  dyoung 			MGETHDR(mb, M_DONTWAIT, m->m_type);
    783      1.1  dyoung 			if (mb != NULL) {
    784      1.1  dyoung 				sc->sc_tx_th.wt_rate =
    785      1.1  dyoung 					ni->ni_rates.rs_rates[ni->ni_txrate];
    786      1.1  dyoung 
    787      1.1  dyoung 				mb->m_next = m;
    788      1.1  dyoung 				mb->m_data = (caddr_t)&sc->sc_tx_th;
    789      1.1  dyoung 				mb->m_len = sizeof(sc->sc_tx_th);
    790      1.1  dyoung 				mb->m_pkthdr.len += mb->m_len;
    791      1.1  dyoung 				bpf_mtap(sc->sc_drvbpf, mb);
    792      1.1  dyoung 				m_free(mb);
    793      1.1  dyoung 			}
    794      1.1  dyoung 		}
    795      1.1  dyoung 
    796      1.1  dyoung 		if (ath_tx_start(sc, ni, bf, m)) {
    797      1.1  dyoung 	bad:
    798  1.1.1.2  dyoung 			ATH_TXBUF_LOCK(sc);
    799      1.1  dyoung 			TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
    800  1.1.1.2  dyoung 			ATH_TXBUF_UNLOCK(sc);
    801      1.1  dyoung 			ifp->if_oerrors++;
    802      1.1  dyoung 			if (ni && ni != ic->ic_bss)
    803      1.1  dyoung 				ieee80211_free_node(ic, ni);
    804      1.1  dyoung 			continue;
    805      1.1  dyoung 		}
    806      1.1  dyoung 
    807      1.1  dyoung 		sc->sc_tx_timer = 5;
    808      1.1  dyoung 		ifp->if_timer = 1;
    809      1.1  dyoung 	}
    810      1.1  dyoung }
    811      1.1  dyoung 
    812      1.1  dyoung static int
    813      1.1  dyoung ath_media_change(struct ifnet *ifp)
    814      1.1  dyoung {
    815      1.1  dyoung 	int error;
    816      1.1  dyoung 
    817      1.1  dyoung 	error = ieee80211_media_change(ifp);
    818      1.1  dyoung 	if (error == ENETRESET) {
    819      1.1  dyoung 		if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
    820      1.1  dyoung 		    (IFF_RUNNING|IFF_UP))
    821      1.1  dyoung 			ath_init(ifp);		/* XXX lose error */
    822      1.1  dyoung 		error = 0;
    823      1.1  dyoung 	}
    824      1.1  dyoung 	return error;
    825      1.1  dyoung }
    826      1.1  dyoung 
    827      1.1  dyoung static void
    828      1.1  dyoung ath_watchdog(struct ifnet *ifp)
    829      1.1  dyoung {
    830      1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
    831      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    832      1.1  dyoung 
    833      1.1  dyoung 	ifp->if_timer = 0;
    834      1.1  dyoung 	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
    835      1.1  dyoung 		return;
    836      1.1  dyoung 	if (sc->sc_tx_timer) {
    837      1.1  dyoung 		if (--sc->sc_tx_timer == 0) {
    838      1.1  dyoung 			if_printf(ifp, "device timeout\n");
    839      1.1  dyoung #ifdef AR_DEBUG
    840      1.1  dyoung 			if (ath_debug)
    841      1.1  dyoung 				ath_hal_dumpstate(sc->sc_ah);
    842      1.1  dyoung #endif /* AR_DEBUG */
    843      1.1  dyoung 			ath_init(ifp);		/* XXX ath_reset??? */
    844      1.1  dyoung 			ifp->if_oerrors++;
    845      1.1  dyoung 			sc->sc_stats.ast_watchdog++;
    846      1.1  dyoung 			return;
    847      1.1  dyoung 		}
    848      1.1  dyoung 		ifp->if_timer = 1;
    849      1.1  dyoung 	}
    850      1.1  dyoung 	if (ic->ic_fixed_rate == -1) {
    851      1.1  dyoung 		/*
    852      1.1  dyoung 		 * Run the rate control algorithm if we're not
    853      1.1  dyoung 		 * locked at a fixed rate.
    854      1.1  dyoung 		 */
    855      1.1  dyoung 		if (ic->ic_opmode == IEEE80211_M_STA)
    856      1.1  dyoung 			ath_rate_ctl(sc, ic->ic_bss);
    857      1.1  dyoung 		else
    858      1.1  dyoung 			ieee80211_iterate_nodes(ic, ath_rate_ctl, sc);
    859      1.1  dyoung 	}
    860      1.1  dyoung 	ieee80211_watchdog(ifp);
    861      1.1  dyoung }
    862      1.1  dyoung 
    863      1.1  dyoung static int
    864      1.1  dyoung ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
    865      1.1  dyoung {
    866      1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
    867      1.1  dyoung 	struct ifreq *ifr = (struct ifreq *)data;
    868      1.1  dyoung 	int error = 0;
    869      1.1  dyoung 
    870  1.1.1.2  dyoung 	ATH_LOCK(sc);
    871      1.1  dyoung 	switch (cmd) {
    872      1.1  dyoung 	case SIOCSIFFLAGS:
    873      1.1  dyoung 		if (ifp->if_flags & IFF_UP) {
    874      1.1  dyoung 			if (ifp->if_flags & IFF_RUNNING) {
    875      1.1  dyoung 				/*
    876      1.1  dyoung 				 * To avoid rescanning another access point,
    877      1.1  dyoung 				 * do not call ath_init() here.  Instead,
    878      1.1  dyoung 				 * only reflect promisc mode settings.
    879      1.1  dyoung 				 */
    880      1.1  dyoung 				ath_mode_init(sc);
    881  1.1.1.2  dyoung 			} else {
    882  1.1.1.2  dyoung 				/*
    883  1.1.1.2  dyoung 				 * Beware of being called during detach to
    884  1.1.1.2  dyoung 				 * reset promiscuous mode.  In that case we
    885  1.1.1.2  dyoung 				 * will still be marked UP but not RUNNING.
    886  1.1.1.2  dyoung 				 * However trying to re-init the interface
    887  1.1.1.2  dyoung 				 * is the wrong thing to do as we've already
    888  1.1.1.2  dyoung 				 * torn down much of our state.  There's
    889  1.1.1.2  dyoung 				 * probably a better way to deal with this.
    890  1.1.1.2  dyoung 				 */
    891  1.1.1.2  dyoung 				if (!sc->sc_invalid)
    892  1.1.1.2  dyoung 					ath_init(ifp);	/* XXX lose error */
    893  1.1.1.2  dyoung 			}
    894      1.1  dyoung 		} else
    895      1.1  dyoung 			ath_stop(ifp);
    896      1.1  dyoung 		break;
    897      1.1  dyoung 	case SIOCADDMULTI:
    898      1.1  dyoung 	case SIOCDELMULTI:
    899      1.1  dyoung 		/*
    900      1.1  dyoung 		 * The upper layer has already installed/removed
    901      1.1  dyoung 		 * the multicast address(es), just recalculate the
    902      1.1  dyoung 		 * multicast filter for the card.
    903      1.1  dyoung 		 */
    904      1.1  dyoung 		if (ifp->if_flags & IFF_RUNNING)
    905      1.1  dyoung 			ath_mode_init(sc);
    906      1.1  dyoung 		break;
    907      1.1  dyoung 	case SIOCGATHSTATS:
    908  1.1.1.2  dyoung 		error = copyout(&sc->sc_stats,
    909  1.1.1.2  dyoung 				ifr->ifr_data, sizeof (sc->sc_stats));
    910  1.1.1.2  dyoung 		break;
    911  1.1.1.2  dyoung 	case SIOCGATHDIAG: {
    912  1.1.1.2  dyoung 		struct ath_diag *ad = (struct ath_diag *)data;
    913  1.1.1.2  dyoung 		struct ath_hal *ah = sc->sc_ah;
    914  1.1.1.2  dyoung 		void *data;
    915  1.1.1.2  dyoung 		u_int size;
    916  1.1.1.2  dyoung 
    917  1.1.1.2  dyoung 		if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) {
    918  1.1.1.2  dyoung 			if (size < ad->ad_size)
    919  1.1.1.2  dyoung 				ad->ad_size = size;
    920  1.1.1.2  dyoung 			if (data)
    921  1.1.1.2  dyoung 				error = copyout(data, ad->ad_data, ad->ad_size);
    922  1.1.1.2  dyoung 		} else
    923  1.1.1.2  dyoung 			error = EINVAL;
    924      1.1  dyoung 		break;
    925  1.1.1.2  dyoung 	}
    926      1.1  dyoung 	default:
    927      1.1  dyoung 		error = ieee80211_ioctl(ifp, cmd, data);
    928      1.1  dyoung 		if (error == ENETRESET) {
    929      1.1  dyoung 			if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
    930      1.1  dyoung 			    (IFF_RUNNING|IFF_UP))
    931      1.1  dyoung 				ath_init(ifp);		/* XXX lose error */
    932      1.1  dyoung 			error = 0;
    933      1.1  dyoung 		}
    934      1.1  dyoung 		break;
    935      1.1  dyoung 	}
    936  1.1.1.2  dyoung 	ATH_UNLOCK(sc);
    937      1.1  dyoung 	return error;
    938      1.1  dyoung }
    939      1.1  dyoung 
    940      1.1  dyoung /*
    941      1.1  dyoung  * Fill the hardware key cache with key entries.
    942      1.1  dyoung  */
    943      1.1  dyoung static void
    944      1.1  dyoung ath_initkeytable(struct ath_softc *sc)
    945      1.1  dyoung {
    946      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    947      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    948      1.1  dyoung 	int i;
    949      1.1  dyoung 
    950      1.1  dyoung 	for (i = 0; i < IEEE80211_WEP_NKID; i++) {
    951      1.1  dyoung 		struct ieee80211_wepkey *k = &ic->ic_nw_keys[i];
    952      1.1  dyoung 		if (k->wk_len == 0)
    953      1.1  dyoung 			ath_hal_keyreset(ah, i);
    954      1.1  dyoung 		else
    955      1.1  dyoung 			/* XXX return value */
    956      1.1  dyoung 			/* NB: this uses HAL_KEYVAL == ieee80211_wepkey */
    957      1.1  dyoung 			ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k);
    958      1.1  dyoung 	}
    959      1.1  dyoung }
    960      1.1  dyoung 
    961  1.1.1.2  dyoung /*
    962  1.1.1.2  dyoung  * Calculate the receive filter according to the
    963  1.1.1.2  dyoung  * operating mode and state:
    964  1.1.1.2  dyoung  *
    965  1.1.1.2  dyoung  * o always accept unicast, broadcast, and multicast traffic
    966  1.1.1.2  dyoung  * o maintain current state of phy error reception
    967  1.1.1.2  dyoung  * o probe request frames are accepted only when operating in
    968  1.1.1.2  dyoung  *   hostap, adhoc, or monitor modes
    969  1.1.1.2  dyoung  * o enable promiscuous mode according to the interface state
    970  1.1.1.2  dyoung  * o accept beacons:
    971  1.1.1.2  dyoung  *   - when operating in adhoc mode so the 802.11 layer creates
    972  1.1.1.2  dyoung  *     node table entries for peers,
    973  1.1.1.2  dyoung  *   - when operating in station mode for collecting rssi data when
    974  1.1.1.2  dyoung  *     the station is otherwise quiet, or
    975  1.1.1.2  dyoung  *   - when scanning
    976  1.1.1.2  dyoung  */
    977  1.1.1.2  dyoung static u_int32_t
    978  1.1.1.2  dyoung ath_calcrxfilter(struct ath_softc *sc)
    979      1.1  dyoung {
    980      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    981      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    982      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
    983  1.1.1.2  dyoung 	u_int32_t rfilt;
    984      1.1  dyoung 
    985      1.1  dyoung 	rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
    986      1.1  dyoung 	      | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
    987      1.1  dyoung 	if (ic->ic_opmode != IEEE80211_M_STA)
    988      1.1  dyoung 		rfilt |= HAL_RX_FILTER_PROBEREQ;
    989      1.1  dyoung 	if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
    990      1.1  dyoung 	    (ifp->if_flags & IFF_PROMISC))
    991      1.1  dyoung 		rfilt |= HAL_RX_FILTER_PROM;
    992  1.1.1.2  dyoung 	if (ic->ic_opmode == IEEE80211_M_STA ||
    993  1.1.1.2  dyoung 	    ic->ic_opmode == IEEE80211_M_IBSS ||
    994  1.1.1.2  dyoung 	    ic->ic_state == IEEE80211_S_SCAN)
    995      1.1  dyoung 		rfilt |= HAL_RX_FILTER_BEACON;
    996  1.1.1.2  dyoung 	return rfilt;
    997  1.1.1.2  dyoung }
    998  1.1.1.2  dyoung 
    999  1.1.1.2  dyoung static void
   1000  1.1.1.2  dyoung ath_mode_init(struct ath_softc *sc)
   1001  1.1.1.2  dyoung {
   1002  1.1.1.2  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1003  1.1.1.2  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1004  1.1.1.2  dyoung 	struct ifnet *ifp = &ic->ic_if;
   1005  1.1.1.2  dyoung 	u_int32_t rfilt, mfilt[2], val;
   1006  1.1.1.2  dyoung 	u_int8_t pos;
   1007  1.1.1.2  dyoung 	struct ifmultiaddr *ifma;
   1008  1.1.1.2  dyoung 
   1009  1.1.1.2  dyoung 	/* configure rx filter */
   1010  1.1.1.2  dyoung 	rfilt = ath_calcrxfilter(sc);
   1011      1.1  dyoung 	ath_hal_setrxfilter(ah, rfilt);
   1012      1.1  dyoung 
   1013  1.1.1.2  dyoung 	/* configure operational mode */
   1014  1.1.1.2  dyoung 	ath_hal_setopmode(ah, ic->ic_opmode);
   1015  1.1.1.2  dyoung 
   1016      1.1  dyoung 	/* calculate and install multicast filter */
   1017      1.1  dyoung 	if ((ifp->if_flags & IFF_ALLMULTI) == 0) {
   1018      1.1  dyoung 		mfilt[0] = mfilt[1] = 0;
   1019      1.1  dyoung 		TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
   1020      1.1  dyoung 			caddr_t dl;
   1021      1.1  dyoung 
   1022      1.1  dyoung 			/* calculate XOR of eight 6bit values */
   1023      1.1  dyoung 			dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
   1024      1.1  dyoung 			val = LE_READ_4(dl + 0);
   1025      1.1  dyoung 			pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
   1026      1.1  dyoung 			val = LE_READ_4(dl + 3);
   1027      1.1  dyoung 			pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
   1028      1.1  dyoung 			pos &= 0x3f;
   1029      1.1  dyoung 			mfilt[pos / 32] |= (1 << (pos % 32));
   1030      1.1  dyoung 		}
   1031      1.1  dyoung 	} else {
   1032      1.1  dyoung 		mfilt[0] = mfilt[1] = ~0;
   1033      1.1  dyoung 	}
   1034      1.1  dyoung 	ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
   1035      1.1  dyoung 	DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n",
   1036      1.1  dyoung 		rfilt, mfilt[0], mfilt[1]));
   1037      1.1  dyoung }
   1038      1.1  dyoung 
   1039      1.1  dyoung static void
   1040      1.1  dyoung ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error)
   1041      1.1  dyoung {
   1042      1.1  dyoung 	struct ath_buf *bf = arg;
   1043      1.1  dyoung 
   1044      1.1  dyoung 	KASSERT(nseg <= ATH_MAX_SCATTER,
   1045      1.1  dyoung 		("ath_mbuf_load_cb: too many DMA segments %u", nseg));
   1046      1.1  dyoung 	bf->bf_mapsize = mapsize;
   1047      1.1  dyoung 	bf->bf_nseg = nseg;
   1048      1.1  dyoung 	bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0]));
   1049      1.1  dyoung }
   1050      1.1  dyoung 
   1051      1.1  dyoung static int
   1052      1.1  dyoung ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
   1053      1.1  dyoung {
   1054      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1055      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   1056      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1057      1.1  dyoung 	struct ieee80211_frame *wh;
   1058      1.1  dyoung 	struct ath_buf *bf;
   1059      1.1  dyoung 	struct ath_desc *ds;
   1060      1.1  dyoung 	struct mbuf *m;
   1061      1.1  dyoung 	int error, pktlen;
   1062      1.1  dyoung 	u_int8_t *frm, rate;
   1063      1.1  dyoung 	u_int16_t capinfo;
   1064      1.1  dyoung 	struct ieee80211_rateset *rs;
   1065      1.1  dyoung 	const HAL_RATE_TABLE *rt;
   1066      1.1  dyoung 
   1067      1.1  dyoung 	bf = sc->sc_bcbuf;
   1068      1.1  dyoung 	if (bf->bf_m != NULL) {
   1069      1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1070      1.1  dyoung 		m_freem(bf->bf_m);
   1071      1.1  dyoung 		bf->bf_m = NULL;
   1072      1.1  dyoung 		bf->bf_node = NULL;
   1073      1.1  dyoung 	}
   1074      1.1  dyoung 	/*
   1075      1.1  dyoung 	 * NB: the beacon data buffer must be 32-bit aligned;
   1076      1.1  dyoung 	 * we assume the mbuf routines will return us something
   1077      1.1  dyoung 	 * with this alignment (perhaps should assert).
   1078      1.1  dyoung 	 */
   1079      1.1  dyoung 	rs = &ni->ni_rates;
   1080      1.1  dyoung 	pktlen = sizeof (struct ieee80211_frame)
   1081  1.1.1.2  dyoung 	       + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6;
   1082      1.1  dyoung 	if (rs->rs_nrates > IEEE80211_RATE_SIZE)
   1083      1.1  dyoung 		pktlen += 2;
   1084      1.1  dyoung 	if (pktlen <= MHLEN)
   1085      1.1  dyoung 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   1086      1.1  dyoung 	else
   1087      1.1  dyoung 		m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
   1088      1.1  dyoung 	if (m == NULL) {
   1089      1.1  dyoung 		DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n",
   1090      1.1  dyoung 			pktlen));
   1091      1.1  dyoung 		sc->sc_stats.ast_be_nombuf++;
   1092      1.1  dyoung 		return ENOMEM;
   1093      1.1  dyoung 	}
   1094      1.1  dyoung 
   1095      1.1  dyoung 	wh = mtod(m, struct ieee80211_frame *);
   1096      1.1  dyoung 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
   1097      1.1  dyoung 	    IEEE80211_FC0_SUBTYPE_BEACON;
   1098      1.1  dyoung 	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
   1099      1.1  dyoung 	*(u_int16_t *)wh->i_dur = 0;
   1100      1.1  dyoung 	memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
   1101      1.1  dyoung 	memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
   1102      1.1  dyoung 	memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
   1103      1.1  dyoung 	*(u_int16_t *)wh->i_seq = 0;
   1104      1.1  dyoung 
   1105      1.1  dyoung 	/*
   1106      1.1  dyoung 	 * beacon frame format
   1107      1.1  dyoung 	 *	[8] time stamp
   1108      1.1  dyoung 	 *	[2] beacon interval
   1109      1.1  dyoung 	 *	[2] cabability information
   1110      1.1  dyoung 	 *	[tlv] ssid
   1111      1.1  dyoung 	 *	[tlv] supported rates
   1112      1.1  dyoung 	 *	[tlv] parameter set (IBSS)
   1113      1.1  dyoung 	 *	[tlv] extended supported rates
   1114      1.1  dyoung 	 */
   1115      1.1  dyoung 	frm = (u_int8_t *)&wh[1];
   1116      1.1  dyoung 	memset(frm, 0, 8);	/* timestamp is set by hardware */
   1117      1.1  dyoung 	frm += 8;
   1118      1.1  dyoung 	*(u_int16_t *)frm = htole16(ni->ni_intval);
   1119      1.1  dyoung 	frm += 2;
   1120      1.1  dyoung 	if (ic->ic_opmode == IEEE80211_M_IBSS)
   1121      1.1  dyoung 		capinfo = IEEE80211_CAPINFO_IBSS;
   1122      1.1  dyoung 	else
   1123      1.1  dyoung 		capinfo = IEEE80211_CAPINFO_ESS;
   1124      1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_WEPON)
   1125      1.1  dyoung 		capinfo |= IEEE80211_CAPINFO_PRIVACY;
   1126  1.1.1.2  dyoung 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
   1127  1.1.1.2  dyoung 	    IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
   1128      1.1  dyoung 		capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
   1129      1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_SHSLOT)
   1130      1.1  dyoung 		capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
   1131      1.1  dyoung 	*(u_int16_t *)frm = htole16(capinfo);
   1132      1.1  dyoung 	frm += 2;
   1133      1.1  dyoung 	*frm++ = IEEE80211_ELEMID_SSID;
   1134      1.1  dyoung 	*frm++ = ni->ni_esslen;
   1135      1.1  dyoung 	memcpy(frm, ni->ni_essid, ni->ni_esslen);
   1136      1.1  dyoung 	frm += ni->ni_esslen;
   1137      1.1  dyoung 	frm = ieee80211_add_rates(frm, rs);
   1138  1.1.1.2  dyoung 	*frm++ = IEEE80211_ELEMID_DSPARMS;
   1139  1.1.1.2  dyoung 	*frm++ = 1;
   1140  1.1.1.2  dyoung 	*frm++ = ieee80211_chan2ieee(ic, ni->ni_chan);
   1141      1.1  dyoung 	if (ic->ic_opmode == IEEE80211_M_IBSS) {
   1142      1.1  dyoung 		*frm++ = IEEE80211_ELEMID_IBSSPARMS;
   1143      1.1  dyoung 		*frm++ = 2;
   1144      1.1  dyoung 		*frm++ = 0; *frm++ = 0;		/* TODO: ATIM window */
   1145      1.1  dyoung 	} else {
   1146      1.1  dyoung 		/* TODO: TIM */
   1147      1.1  dyoung 		*frm++ = IEEE80211_ELEMID_TIM;
   1148      1.1  dyoung 		*frm++ = 4;	/* length */
   1149      1.1  dyoung 		*frm++ = 0;	/* DTIM count */
   1150      1.1  dyoung 		*frm++ = 1;	/* DTIM period */
   1151      1.1  dyoung 		*frm++ = 0;	/* bitmap control */
   1152      1.1  dyoung 		*frm++ = 0;	/* Partial Virtual Bitmap (variable length) */
   1153      1.1  dyoung 	}
   1154      1.1  dyoung 	frm = ieee80211_add_xrates(frm, rs);
   1155      1.1  dyoung 	m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
   1156      1.1  dyoung 	KASSERT(m->m_pkthdr.len <= pktlen,
   1157      1.1  dyoung 		("beacon bigger than expected, len %u calculated %u",
   1158      1.1  dyoung 		m->m_pkthdr.len, pktlen));
   1159      1.1  dyoung 
   1160      1.1  dyoung 	DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len));
   1161      1.1  dyoung 	error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m,
   1162      1.1  dyoung 				     ath_mbuf_load_cb, bf,
   1163      1.1  dyoung 				     BUS_DMA_NOWAIT);
   1164      1.1  dyoung 	if (error != 0) {
   1165      1.1  dyoung 		m_freem(m);
   1166      1.1  dyoung 		return error;
   1167      1.1  dyoung 	}
   1168      1.1  dyoung 	KASSERT(bf->bf_nseg == 1,
   1169      1.1  dyoung 		("ath_beacon_alloc: multi-segment packet; nseg %u",
   1170      1.1  dyoung 		bf->bf_nseg));
   1171      1.1  dyoung 	bf->bf_m = m;
   1172      1.1  dyoung 
   1173      1.1  dyoung 	/* setup descriptors */
   1174      1.1  dyoung 	ds = bf->bf_desc;
   1175      1.1  dyoung 
   1176      1.1  dyoung 	ds->ds_link = 0;
   1177      1.1  dyoung 	ds->ds_data = bf->bf_segs[0].ds_addr;
   1178      1.1  dyoung 	/*
   1179      1.1  dyoung 	 * Calculate rate code.
   1180      1.1  dyoung 	 * XXX everything at min xmit rate
   1181      1.1  dyoung 	 */
   1182      1.1  dyoung 	rt = sc->sc_currates;
   1183      1.1  dyoung 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
   1184      1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
   1185      1.1  dyoung 		rate = rt->info[0].rateCode | rt->info[0].shortPreamble;
   1186      1.1  dyoung 	else
   1187      1.1  dyoung 		rate = rt->info[0].rateCode;
   1188      1.1  dyoung 	ath_hal_setuptxdesc(ah, ds
   1189      1.1  dyoung 		, m->m_pkthdr.len + IEEE80211_CRC_LEN	/* packet length */
   1190      1.1  dyoung 		, sizeof(struct ieee80211_frame)	/* header length */
   1191      1.1  dyoung 		, HAL_PKT_TYPE_BEACON		/* Atheros packet type */
   1192      1.1  dyoung 		, 0x20				/* txpower XXX */
   1193      1.1  dyoung 		, rate, 1			/* series 0 rate/tries */
   1194      1.1  dyoung 		, HAL_TXKEYIX_INVALID		/* no encryption */
   1195      1.1  dyoung 		, 0				/* antenna mode */
   1196      1.1  dyoung 		, HAL_TXDESC_NOACK		/* no ack for beacons */
   1197      1.1  dyoung 		, 0				/* rts/cts rate */
   1198      1.1  dyoung 		, 0				/* rts/cts duration */
   1199      1.1  dyoung 	);
   1200      1.1  dyoung 	/* NB: beacon's BufLen must be a multiple of 4 bytes */
   1201      1.1  dyoung 	/* XXX verify mbuf data area covers this roundup */
   1202      1.1  dyoung 	ath_hal_filltxdesc(ah, ds
   1203      1.1  dyoung 		, roundup(bf->bf_segs[0].ds_len, 4)	/* buffer length */
   1204      1.1  dyoung 		, AH_TRUE				/* first segment */
   1205      1.1  dyoung 		, AH_TRUE				/* last segment */
   1206      1.1  dyoung 	);
   1207      1.1  dyoung 
   1208      1.1  dyoung 	return 0;
   1209      1.1  dyoung }
   1210      1.1  dyoung 
   1211      1.1  dyoung static void
   1212      1.1  dyoung ath_beacon_proc(void *arg, int pending)
   1213      1.1  dyoung {
   1214      1.1  dyoung 	struct ath_softc *sc = arg;
   1215      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1216      1.1  dyoung 	struct ath_buf *bf = sc->sc_bcbuf;
   1217      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1218      1.1  dyoung 
   1219      1.1  dyoung 	DPRINTF2(("%s: pending %u\n", __func__, pending));
   1220      1.1  dyoung 	if (ic->ic_opmode == IEEE80211_M_STA ||
   1221      1.1  dyoung 	    bf == NULL || bf->bf_m == NULL) {
   1222      1.1  dyoung 		DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n",
   1223      1.1  dyoung 			__func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL));
   1224      1.1  dyoung 		return;
   1225      1.1  dyoung 	}
   1226      1.1  dyoung 	/* TODO: update beacon to reflect PS poll state */
   1227      1.1  dyoung 	if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
   1228      1.1  dyoung 		DPRINTF(("%s: beacon queue %u did not stop?",
   1229      1.1  dyoung 			__func__, sc->sc_bhalq));
   1230      1.1  dyoung 		return;			/* busy, XXX is this right? */
   1231      1.1  dyoung 	}
   1232      1.1  dyoung 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
   1233      1.1  dyoung 
   1234      1.1  dyoung 	ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
   1235      1.1  dyoung 	ath_hal_txstart(ah, sc->sc_bhalq);
   1236      1.1  dyoung 	DPRINTF2(("%s: TXDP%u = %p (%p)\n", __func__,
   1237      1.1  dyoung 		sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
   1238      1.1  dyoung }
   1239      1.1  dyoung 
   1240      1.1  dyoung static void
   1241      1.1  dyoung ath_beacon_free(struct ath_softc *sc)
   1242      1.1  dyoung {
   1243      1.1  dyoung 	struct ath_buf *bf = sc->sc_bcbuf;
   1244      1.1  dyoung 
   1245      1.1  dyoung 	if (bf->bf_m != NULL) {
   1246      1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1247      1.1  dyoung 		m_freem(bf->bf_m);
   1248      1.1  dyoung 		bf->bf_m = NULL;
   1249      1.1  dyoung 		bf->bf_node = NULL;
   1250      1.1  dyoung 	}
   1251      1.1  dyoung }
   1252      1.1  dyoung 
   1253      1.1  dyoung /*
   1254      1.1  dyoung  * Configure the beacon and sleep timers.
   1255      1.1  dyoung  *
   1256      1.1  dyoung  * When operating as an AP this resets the TSF and sets
   1257      1.1  dyoung  * up the hardware to notify us when we need to issue beacons.
   1258      1.1  dyoung  *
   1259      1.1  dyoung  * When operating in station mode this sets up the beacon
   1260      1.1  dyoung  * timers according to the timestamp of the last received
   1261      1.1  dyoung  * beacon and the current TSF, configures PCF and DTIM
   1262      1.1  dyoung  * handling, programs the sleep registers so the hardware
   1263      1.1  dyoung  * will wakeup in time to receive beacons, and configures
   1264      1.1  dyoung  * the beacon miss handling so we'll receive a BMISS
   1265      1.1  dyoung  * interrupt when we stop seeing beacons from the AP
   1266      1.1  dyoung  * we've associated with.
   1267      1.1  dyoung  */
   1268      1.1  dyoung static void
   1269      1.1  dyoung ath_beacon_config(struct ath_softc *sc)
   1270      1.1  dyoung {
   1271      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1272      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1273      1.1  dyoung 	struct ieee80211_node *ni = ic->ic_bss;
   1274      1.1  dyoung 	u_int32_t nexttbtt;
   1275      1.1  dyoung 
   1276      1.1  dyoung 	nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) |
   1277      1.1  dyoung 	    (LE_READ_4(ni->ni_tstamp) >> 10);
   1278      1.1  dyoung 	DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt));
   1279      1.1  dyoung 	nexttbtt += ni->ni_intval;
   1280      1.1  dyoung 	if (ic->ic_opmode == IEEE80211_M_STA) {
   1281      1.1  dyoung 		HAL_BEACON_STATE bs;
   1282      1.1  dyoung 		u_int32_t bmisstime;
   1283      1.1  dyoung 
   1284      1.1  dyoung 		/* NB: no PCF support right now */
   1285      1.1  dyoung 		memset(&bs, 0, sizeof(bs));
   1286      1.1  dyoung 		bs.bs_intval = ni->ni_intval;
   1287      1.1  dyoung 		bs.bs_nexttbtt = nexttbtt;
   1288      1.1  dyoung 		bs.bs_dtimperiod = bs.bs_intval;
   1289      1.1  dyoung 		bs.bs_nextdtim = nexttbtt;
   1290      1.1  dyoung 		/*
   1291      1.1  dyoung 		 * Calculate the number of consecutive beacons to miss
   1292      1.1  dyoung 		 * before taking a BMISS interrupt.  The configuration
   1293      1.1  dyoung 		 * is specified in ms, so we need to convert that to
   1294      1.1  dyoung 		 * TU's and then calculate based on the beacon interval.
   1295      1.1  dyoung 		 * Note that we clamp the result to at most 10 beacons.
   1296      1.1  dyoung 		 */
   1297      1.1  dyoung 		bmisstime = (ic->ic_bmisstimeout * 1000) / 1024;
   1298      1.1  dyoung 		bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval);
   1299      1.1  dyoung 		if (bs.bs_bmissthreshold > 10)
   1300      1.1  dyoung 			bs.bs_bmissthreshold = 10;
   1301      1.1  dyoung 		else if (bs.bs_bmissthreshold <= 0)
   1302      1.1  dyoung 			bs.bs_bmissthreshold = 1;
   1303      1.1  dyoung 
   1304      1.1  dyoung 		/*
   1305      1.1  dyoung 		 * Calculate sleep duration.  The configuration is
   1306      1.1  dyoung 		 * given in ms.  We insure a multiple of the beacon
   1307      1.1  dyoung 		 * period is used.  Also, if the sleep duration is
   1308      1.1  dyoung 		 * greater than the DTIM period then it makes senses
   1309      1.1  dyoung 		 * to make it a multiple of that.
   1310      1.1  dyoung 		 *
   1311      1.1  dyoung 		 * XXX fixed at 100ms
   1312      1.1  dyoung 		 */
   1313      1.1  dyoung 		bs.bs_sleepduration =
   1314      1.1  dyoung 			roundup((100 * 1000) / 1024, bs.bs_intval);
   1315      1.1  dyoung 		if (bs.bs_sleepduration > bs.bs_dtimperiod)
   1316      1.1  dyoung 			bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
   1317      1.1  dyoung 
   1318      1.1  dyoung 		DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n"
   1319      1.1  dyoung 			, __func__
   1320      1.1  dyoung 			, bs.bs_intval
   1321      1.1  dyoung 			, bs.bs_nexttbtt
   1322      1.1  dyoung 			, bs.bs_dtimperiod
   1323      1.1  dyoung 			, bs.bs_nextdtim
   1324      1.1  dyoung 			, bs.bs_bmissthreshold
   1325      1.1  dyoung 			, bs.bs_sleepduration
   1326      1.1  dyoung 		));
   1327      1.1  dyoung 		ath_hal_intrset(ah, 0);
   1328      1.1  dyoung 		/*
   1329      1.1  dyoung 		 * Reset our tsf so the hardware will update the
   1330      1.1  dyoung 		 * tsf register to reflect timestamps found in
   1331      1.1  dyoung 		 * received beacons.
   1332      1.1  dyoung 		 */
   1333      1.1  dyoung 		ath_hal_resettsf(ah);
   1334      1.1  dyoung 		ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0);
   1335      1.1  dyoung 		sc->sc_imask |= HAL_INT_BMISS;
   1336      1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   1337      1.1  dyoung 	} else {
   1338      1.1  dyoung 		DPRINTF(("%s: intval %u nexttbtt %u\n",
   1339      1.1  dyoung 			__func__, ni->ni_intval, nexttbtt));
   1340      1.1  dyoung 		ath_hal_intrset(ah, 0);
   1341      1.1  dyoung 		ath_hal_beaconinit(ah, ic->ic_opmode,
   1342      1.1  dyoung 			nexttbtt, ni->ni_intval);
   1343      1.1  dyoung 		if (ic->ic_opmode != IEEE80211_M_MONITOR)
   1344      1.1  dyoung 			sc->sc_imask |= HAL_INT_SWBA;	/* beacon prepare */
   1345      1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   1346      1.1  dyoung 	}
   1347      1.1  dyoung }
   1348      1.1  dyoung 
   1349      1.1  dyoung static void
   1350      1.1  dyoung ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
   1351      1.1  dyoung {
   1352      1.1  dyoung 	bus_addr_t *paddr = (bus_addr_t*) arg;
   1353      1.1  dyoung 	*paddr = segs->ds_addr;
   1354      1.1  dyoung }
   1355      1.1  dyoung 
   1356      1.1  dyoung static int
   1357      1.1  dyoung ath_desc_alloc(struct ath_softc *sc)
   1358      1.1  dyoung {
   1359      1.1  dyoung 	int i, bsize, error;
   1360      1.1  dyoung 	struct ath_desc *ds;
   1361      1.1  dyoung 	struct ath_buf *bf;
   1362      1.1  dyoung 
   1363      1.1  dyoung 	/* allocate descriptors */
   1364      1.1  dyoung 	sc->sc_desc_len = sizeof(struct ath_desc) *
   1365      1.1  dyoung 				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
   1366      1.1  dyoung 	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap);
   1367      1.1  dyoung 	if (error != 0)
   1368      1.1  dyoung 		return error;
   1369      1.1  dyoung 
   1370      1.1  dyoung 	error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc,
   1371      1.1  dyoung 				 BUS_DMA_NOWAIT, &sc->sc_ddmamap);
   1372      1.1  dyoung 	if (error != 0)
   1373      1.1  dyoung 		goto fail0;
   1374      1.1  dyoung 
   1375      1.1  dyoung 	error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap,
   1376      1.1  dyoung 				sc->sc_desc, sc->sc_desc_len,
   1377      1.1  dyoung 				ath_load_cb, &sc->sc_desc_paddr,
   1378      1.1  dyoung 				BUS_DMA_NOWAIT);
   1379      1.1  dyoung 	if (error != 0)
   1380      1.1  dyoung 		goto fail1;
   1381      1.1  dyoung 
   1382      1.1  dyoung 	ds = sc->sc_desc;
   1383      1.1  dyoung 	DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n",
   1384      1.1  dyoung 	    ds, sc->sc_desc_len,
   1385      1.1  dyoung 	    (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
   1386      1.1  dyoung 
   1387      1.1  dyoung 	/* allocate buffers */
   1388      1.1  dyoung 	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
   1389      1.1  dyoung 	bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
   1390      1.1  dyoung 	if (bf == NULL)
   1391      1.1  dyoung 		goto fail2;
   1392      1.1  dyoung 	sc->sc_bufptr = bf;
   1393      1.1  dyoung 
   1394      1.1  dyoung 	TAILQ_INIT(&sc->sc_rxbuf);
   1395      1.1  dyoung 	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
   1396      1.1  dyoung 		bf->bf_desc = ds;
   1397      1.1  dyoung 		bf->bf_daddr = sc->sc_desc_paddr +
   1398      1.1  dyoung 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1399      1.1  dyoung 		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
   1400      1.1  dyoung 					  &bf->bf_dmamap);
   1401      1.1  dyoung 		if (error != 0)
   1402      1.1  dyoung 			break;
   1403      1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   1404      1.1  dyoung 	}
   1405      1.1  dyoung 
   1406      1.1  dyoung 	TAILQ_INIT(&sc->sc_txbuf);
   1407      1.1  dyoung 	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
   1408      1.1  dyoung 		bf->bf_desc = ds;
   1409      1.1  dyoung 		bf->bf_daddr = sc->sc_desc_paddr +
   1410      1.1  dyoung 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1411      1.1  dyoung 		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
   1412      1.1  dyoung 					  &bf->bf_dmamap);
   1413      1.1  dyoung 		if (error != 0)
   1414      1.1  dyoung 			break;
   1415      1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1416      1.1  dyoung 	}
   1417      1.1  dyoung 	TAILQ_INIT(&sc->sc_txq);
   1418      1.1  dyoung 
   1419      1.1  dyoung 	/* beacon buffer */
   1420      1.1  dyoung 	bf->bf_desc = ds;
   1421      1.1  dyoung 	bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1422      1.1  dyoung 	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap);
   1423      1.1  dyoung 	if (error != 0)
   1424      1.1  dyoung 		return error;
   1425      1.1  dyoung 	sc->sc_bcbuf = bf;
   1426      1.1  dyoung 	return 0;
   1427      1.1  dyoung 
   1428      1.1  dyoung fail2:
   1429      1.1  dyoung 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   1430      1.1  dyoung fail1:
   1431      1.1  dyoung 	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
   1432      1.1  dyoung fail0:
   1433      1.1  dyoung 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   1434      1.1  dyoung 	sc->sc_ddmamap = NULL;
   1435      1.1  dyoung 	return error;
   1436      1.1  dyoung }
   1437      1.1  dyoung 
   1438      1.1  dyoung static void
   1439      1.1  dyoung ath_desc_free(struct ath_softc *sc)
   1440      1.1  dyoung {
   1441      1.1  dyoung 	struct ath_buf *bf;
   1442      1.1  dyoung 
   1443      1.1  dyoung 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   1444      1.1  dyoung 	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
   1445      1.1  dyoung 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   1446      1.1  dyoung 
   1447      1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
   1448      1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1449      1.1  dyoung 		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   1450      1.1  dyoung 		m_freem(bf->bf_m);
   1451      1.1  dyoung 	}
   1452      1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list)
   1453      1.1  dyoung 		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   1454      1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   1455      1.1  dyoung 		if (bf->bf_m) {
   1456      1.1  dyoung 			bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1457      1.1  dyoung 			bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   1458      1.1  dyoung 			m_freem(bf->bf_m);
   1459      1.1  dyoung 			bf->bf_m = NULL;
   1460      1.1  dyoung 		}
   1461      1.1  dyoung 	}
   1462      1.1  dyoung 	if (sc->sc_bcbuf != NULL) {
   1463      1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
   1464      1.1  dyoung 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
   1465      1.1  dyoung 		sc->sc_bcbuf = NULL;
   1466      1.1  dyoung 	}
   1467      1.1  dyoung 
   1468      1.1  dyoung 	TAILQ_INIT(&sc->sc_rxbuf);
   1469      1.1  dyoung 	TAILQ_INIT(&sc->sc_txbuf);
   1470      1.1  dyoung 	TAILQ_INIT(&sc->sc_txq);
   1471      1.1  dyoung 	free(sc->sc_bufptr, M_DEVBUF);
   1472      1.1  dyoung 	sc->sc_bufptr = NULL;
   1473      1.1  dyoung }
   1474      1.1  dyoung 
   1475      1.1  dyoung static struct ieee80211_node *
   1476      1.1  dyoung ath_node_alloc(struct ieee80211com *ic)
   1477      1.1  dyoung {
   1478      1.1  dyoung 	struct ath_node *an =
   1479      1.1  dyoung 		malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO);
   1480  1.1.1.2  dyoung 	if (an) {
   1481  1.1.1.2  dyoung 		int i;
   1482  1.1.1.2  dyoung 		for (i = 0; i < ATH_RHIST_SIZE; i++)
   1483  1.1.1.2  dyoung 			an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME;
   1484  1.1.1.2  dyoung 		an->an_rx_hist_next = ATH_RHIST_SIZE-1;
   1485  1.1.1.2  dyoung 		return &an->an_node;
   1486  1.1.1.2  dyoung 	} else
   1487  1.1.1.2  dyoung 		return NULL;
   1488      1.1  dyoung }
   1489      1.1  dyoung 
   1490      1.1  dyoung static void
   1491      1.1  dyoung ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
   1492      1.1  dyoung {
   1493      1.1  dyoung         struct ath_softc *sc = ic->ic_if.if_softc;
   1494      1.1  dyoung 	struct ath_buf *bf;
   1495      1.1  dyoung 
   1496      1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
   1497      1.1  dyoung 		if (bf->bf_node == ni)
   1498      1.1  dyoung 			bf->bf_node = NULL;
   1499      1.1  dyoung 	}
   1500      1.1  dyoung 	free(ni, M_DEVBUF);
   1501      1.1  dyoung }
   1502      1.1  dyoung 
   1503      1.1  dyoung static void
   1504      1.1  dyoung ath_node_copy(struct ieee80211com *ic,
   1505      1.1  dyoung 	struct ieee80211_node *dst, const struct ieee80211_node *src)
   1506      1.1  dyoung {
   1507      1.1  dyoung 	*(struct ath_node *)dst = *(const struct ath_node *)src;
   1508      1.1  dyoung }
   1509      1.1  dyoung 
   1510  1.1.1.2  dyoung 
   1511  1.1.1.2  dyoung static u_int8_t
   1512  1.1.1.2  dyoung ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni)
   1513  1.1.1.2  dyoung {
   1514  1.1.1.2  dyoung 	struct ath_node *an = ATH_NODE(ni);
   1515  1.1.1.2  dyoung 	int i, now, nsamples, rssi;
   1516  1.1.1.2  dyoung 
   1517  1.1.1.2  dyoung 	/*
   1518  1.1.1.2  dyoung 	 * Calculate the average over the last second of sampled data.
   1519  1.1.1.2  dyoung 	 */
   1520  1.1.1.2  dyoung 	now = ticks;
   1521  1.1.1.2  dyoung 	nsamples = 0;
   1522  1.1.1.2  dyoung 	rssi = 0;
   1523  1.1.1.2  dyoung 	i = an->an_rx_hist_next;
   1524  1.1.1.2  dyoung 	do {
   1525  1.1.1.2  dyoung 		struct ath_recv_hist *rh = &an->an_rx_hist[i];
   1526  1.1.1.2  dyoung 		if (rh->arh_ticks == ATH_RHIST_NOTIME)
   1527  1.1.1.2  dyoung 			goto done;
   1528  1.1.1.2  dyoung 		if (now - rh->arh_ticks > hz)
   1529  1.1.1.2  dyoung 			goto done;
   1530  1.1.1.2  dyoung 		rssi += rh->arh_rssi;
   1531  1.1.1.2  dyoung 		nsamples++;
   1532  1.1.1.2  dyoung 		if (i == 0)
   1533  1.1.1.2  dyoung 			i = ATH_RHIST_SIZE-1;
   1534  1.1.1.2  dyoung 		else
   1535  1.1.1.2  dyoung 			i--;
   1536  1.1.1.2  dyoung 	} while (i != an->an_rx_hist_next);
   1537  1.1.1.2  dyoung done:
   1538  1.1.1.2  dyoung 	/*
   1539  1.1.1.2  dyoung 	 * Return either the average or the last known
   1540  1.1.1.2  dyoung 	 * value if there is no recent data.
   1541  1.1.1.2  dyoung 	 */
   1542  1.1.1.2  dyoung 	return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi);
   1543  1.1.1.2  dyoung }
   1544  1.1.1.2  dyoung 
   1545      1.1  dyoung static int
   1546      1.1  dyoung ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
   1547      1.1  dyoung {
   1548      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1549      1.1  dyoung 	int error;
   1550      1.1  dyoung 	struct mbuf *m;
   1551      1.1  dyoung 	struct ath_desc *ds;
   1552      1.1  dyoung 
   1553      1.1  dyoung 	m = bf->bf_m;
   1554      1.1  dyoung 	if (m == NULL) {
   1555      1.1  dyoung 		/*
   1556      1.1  dyoung 		 * NB: by assigning a page to the rx dma buffer we
   1557      1.1  dyoung 		 * implicitly satisfy the Atheros requirement that
   1558      1.1  dyoung 		 * this buffer be cache-line-aligned and sized to be
   1559      1.1  dyoung 		 * multiple of the cache line size.  Not doing this
   1560      1.1  dyoung 		 * causes weird stuff to happen (for the 5210 at least).
   1561      1.1  dyoung 		 */
   1562      1.1  dyoung 		m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
   1563      1.1  dyoung 		if (m == NULL) {
   1564      1.1  dyoung 			DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n"));
   1565      1.1  dyoung 			sc->sc_stats.ast_rx_nombuf++;
   1566      1.1  dyoung 			return ENOMEM;
   1567      1.1  dyoung 		}
   1568      1.1  dyoung 		bf->bf_m = m;
   1569      1.1  dyoung 		m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
   1570      1.1  dyoung 
   1571      1.1  dyoung 		error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m,
   1572      1.1  dyoung 					     ath_mbuf_load_cb, bf,
   1573      1.1  dyoung 					     BUS_DMA_NOWAIT);
   1574      1.1  dyoung 		if (error != 0) {
   1575      1.1  dyoung 			DPRINTF(("ath_rxbuf_init: bus_dmamap_load_mbuf failed;"
   1576      1.1  dyoung 				" error %d\n", error));
   1577      1.1  dyoung 			sc->sc_stats.ast_rx_busdma++;
   1578      1.1  dyoung 			return error;
   1579      1.1  dyoung 		}
   1580      1.1  dyoung 		KASSERT(bf->bf_nseg == 1,
   1581      1.1  dyoung 			("ath_rxbuf_init: multi-segment packet; nseg %u",
   1582      1.1  dyoung 			bf->bf_nseg));
   1583      1.1  dyoung 	}
   1584      1.1  dyoung 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREREAD);
   1585      1.1  dyoung 
   1586  1.1.1.2  dyoung 	/*
   1587  1.1.1.2  dyoung 	 * Setup descriptors.  For receive we always terminate
   1588  1.1.1.2  dyoung 	 * the descriptor list with a self-linked entry so we'll
   1589  1.1.1.2  dyoung 	 * not get overrun under high load (as can happen with a
   1590  1.1.1.2  dyoung 	 * 5212 when ANI processing enables PHY errors).
   1591  1.1.1.2  dyoung 	 *
   1592  1.1.1.2  dyoung 	 * To insure the last descriptor is self-linked we create
   1593  1.1.1.2  dyoung 	 * each descriptor as self-linked and add it to the end.  As
   1594  1.1.1.2  dyoung 	 * each additional descriptor is added the previous self-linked
   1595  1.1.1.2  dyoung 	 * entry is ``fixed'' naturally.  This should be safe even
   1596  1.1.1.2  dyoung 	 * if DMA is happening.  When processing RX interrupts we
   1597  1.1.1.2  dyoung 	 * never remove/process the last, self-linked, entry on the
   1598  1.1.1.2  dyoung 	 * descriptor list.  This insures the hardware always has
   1599  1.1.1.2  dyoung 	 * someplace to write a new frame.
   1600  1.1.1.2  dyoung 	 */
   1601      1.1  dyoung 	ds = bf->bf_desc;
   1602  1.1.1.2  dyoung 	ds->ds_link = bf->bf_daddr;	/* link to self */
   1603      1.1  dyoung 	ds->ds_data = bf->bf_segs[0].ds_addr;
   1604      1.1  dyoung 	ath_hal_setuprxdesc(ah, ds
   1605      1.1  dyoung 		, m->m_len		/* buffer size */
   1606      1.1  dyoung 		, 0
   1607      1.1  dyoung 	);
   1608      1.1  dyoung 
   1609      1.1  dyoung 	if (sc->sc_rxlink != NULL)
   1610      1.1  dyoung 		*sc->sc_rxlink = bf->bf_daddr;
   1611      1.1  dyoung 	sc->sc_rxlink = &ds->ds_link;
   1612      1.1  dyoung 	return 0;
   1613      1.1  dyoung }
   1614      1.1  dyoung 
   1615      1.1  dyoung static void
   1616      1.1  dyoung ath_rx_proc(void *arg, int npending)
   1617      1.1  dyoung {
   1618  1.1.1.2  dyoung #define	PA2DESC(_sc, _pa) \
   1619  1.1.1.2  dyoung 	((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
   1620  1.1.1.2  dyoung 		((_pa) - (_sc)->sc_desc_paddr)))
   1621      1.1  dyoung 	struct ath_softc *sc = arg;
   1622      1.1  dyoung 	struct ath_buf *bf;
   1623      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1624      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   1625      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1626      1.1  dyoung 	struct ath_desc *ds;
   1627      1.1  dyoung 	struct mbuf *m;
   1628      1.1  dyoung 	struct ieee80211_frame *wh, whbuf;
   1629      1.1  dyoung 	struct ieee80211_node *ni;
   1630  1.1.1.2  dyoung 	struct ath_node *an;
   1631  1.1.1.2  dyoung 	struct ath_recv_hist *rh;
   1632      1.1  dyoung 	int len;
   1633      1.1  dyoung 	u_int phyerr;
   1634      1.1  dyoung 	HAL_STATUS status;
   1635      1.1  dyoung 
   1636      1.1  dyoung 	DPRINTF2(("ath_rx_proc: pending %u\n", npending));
   1637      1.1  dyoung 	do {
   1638      1.1  dyoung 		bf = TAILQ_FIRST(&sc->sc_rxbuf);
   1639      1.1  dyoung 		if (bf == NULL) {		/* NB: shouldn't happen */
   1640      1.1  dyoung 			if_printf(ifp, "ath_rx_proc: no buffer!\n");
   1641      1.1  dyoung 			break;
   1642      1.1  dyoung 		}
   1643  1.1.1.2  dyoung 		ds = bf->bf_desc;
   1644  1.1.1.2  dyoung 		if (ds->ds_link == bf->bf_daddr) {
   1645  1.1.1.2  dyoung 			/* NB: never process the self-linked entry at the end */
   1646  1.1.1.2  dyoung 			break;
   1647  1.1.1.2  dyoung 		}
   1648      1.1  dyoung 		m = bf->bf_m;
   1649      1.1  dyoung 		if (m == NULL) {		/* NB: shouldn't happen */
   1650      1.1  dyoung 			if_printf(ifp, "ath_rx_proc: no mbuf!\n");
   1651      1.1  dyoung 			continue;
   1652      1.1  dyoung 		}
   1653  1.1.1.2  dyoung 		/* XXX sync descriptor memory */
   1654  1.1.1.2  dyoung 		/*
   1655  1.1.1.2  dyoung 		 * Must provide the virtual address of the current
   1656  1.1.1.2  dyoung 		 * descriptor, the physical address, and the virtual
   1657  1.1.1.2  dyoung 		 * address of the next descriptor in the h/w chain.
   1658  1.1.1.2  dyoung 		 * This allows the HAL to look ahead to see if the
   1659  1.1.1.2  dyoung 		 * hardware is done with a descriptor by checking the
   1660  1.1.1.2  dyoung 		 * done bit in the following descriptor and the address
   1661  1.1.1.2  dyoung 		 * of the current descriptor the DMA engine is working
   1662  1.1.1.2  dyoung 		 * on.  All this is necessary because of our use of
   1663  1.1.1.2  dyoung 		 * a self-linked list to avoid rx overruns.
   1664  1.1.1.2  dyoung 		 */
   1665  1.1.1.2  dyoung 		status = ath_hal_rxprocdesc(ah, ds,
   1666  1.1.1.2  dyoung 				bf->bf_daddr, PA2DESC(sc, ds->ds_link));
   1667      1.1  dyoung #ifdef AR_DEBUG
   1668      1.1  dyoung 		if (ath_debug > 1)
   1669      1.1  dyoung 			ath_printrxbuf(bf, status == HAL_OK);
   1670      1.1  dyoung #endif
   1671      1.1  dyoung 		if (status == HAL_EINPROGRESS)
   1672      1.1  dyoung 			break;
   1673      1.1  dyoung 		TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
   1674      1.1  dyoung 		if (ds->ds_rxstat.rs_status != 0) {
   1675      1.1  dyoung 			if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC)
   1676      1.1  dyoung 				sc->sc_stats.ast_rx_crcerr++;
   1677      1.1  dyoung 			if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO)
   1678      1.1  dyoung 				sc->sc_stats.ast_rx_fifoerr++;
   1679      1.1  dyoung 			if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT)
   1680      1.1  dyoung 				sc->sc_stats.ast_rx_badcrypt++;
   1681      1.1  dyoung 			if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) {
   1682      1.1  dyoung 				sc->sc_stats.ast_rx_phyerr++;
   1683      1.1  dyoung 				phyerr = ds->ds_rxstat.rs_phyerr & 0x1f;
   1684      1.1  dyoung 				sc->sc_stats.ast_rx_phy[phyerr]++;
   1685  1.1.1.2  dyoung 			} else {
   1686  1.1.1.2  dyoung 				/*
   1687  1.1.1.2  dyoung 				 * NB: don't count PHY errors as input errors;
   1688  1.1.1.2  dyoung 				 * we enable them on the 5212 to collect info
   1689  1.1.1.2  dyoung 				 * about environmental noise and, in that
   1690  1.1.1.2  dyoung 				 * setting, they don't really reflect tx/rx
   1691  1.1.1.2  dyoung 				 * errors.
   1692  1.1.1.2  dyoung 				 */
   1693  1.1.1.2  dyoung 				ifp->if_ierrors++;
   1694      1.1  dyoung 			}
   1695      1.1  dyoung 			goto rx_next;
   1696      1.1  dyoung 		}
   1697      1.1  dyoung 
   1698      1.1  dyoung 		len = ds->ds_rxstat.rs_datalen;
   1699  1.1.1.2  dyoung 		if (len < IEEE80211_MIN_LEN) {
   1700      1.1  dyoung 			DPRINTF(("ath_rx_proc: short packet %d\n", len));
   1701      1.1  dyoung 			sc->sc_stats.ast_rx_tooshort++;
   1702      1.1  dyoung 			goto rx_next;
   1703      1.1  dyoung 		}
   1704      1.1  dyoung 
   1705      1.1  dyoung 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
   1706      1.1  dyoung 		    BUS_DMASYNC_POSTREAD);
   1707      1.1  dyoung 
   1708      1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1709      1.1  dyoung 		bf->bf_m = NULL;
   1710      1.1  dyoung 		m->m_pkthdr.rcvif = ifp;
   1711      1.1  dyoung 		m->m_pkthdr.len = m->m_len = len;
   1712      1.1  dyoung 
   1713      1.1  dyoung 		if (sc->sc_drvbpf) {
   1714      1.1  dyoung 			struct mbuf *mb;
   1715      1.1  dyoung 
   1716      1.1  dyoung 			/* XXX pre-allocate space when setting up recv's */
   1717      1.1  dyoung 			MGETHDR(mb, M_DONTWAIT, m->m_type);
   1718      1.1  dyoung 			if (mb != NULL) {
   1719      1.1  dyoung 				sc->sc_rx_th.wr_rate =
   1720      1.1  dyoung 					sc->sc_hwmap[ds->ds_rxstat.rs_rate];
   1721      1.1  dyoung 				sc->sc_rx_th.wr_antsignal =
   1722      1.1  dyoung 					ds->ds_rxstat.rs_rssi;
   1723      1.1  dyoung 				sc->sc_rx_th.wr_antenna =
   1724      1.1  dyoung 					ds->ds_rxstat.rs_antenna;
   1725      1.1  dyoung 				/* XXX TSF */
   1726      1.1  dyoung 
   1727      1.1  dyoung 				(void) m_dup_pkthdr(mb, m, M_DONTWAIT);
   1728      1.1  dyoung 				mb->m_next = m;
   1729      1.1  dyoung 				mb->m_data = (caddr_t)&sc->sc_rx_th;
   1730      1.1  dyoung 				mb->m_len = sizeof(sc->sc_rx_th);
   1731      1.1  dyoung 				mb->m_pkthdr.len += mb->m_len;
   1732      1.1  dyoung 				bpf_mtap(sc->sc_drvbpf, mb);
   1733      1.1  dyoung 				m_free(mb);
   1734      1.1  dyoung 			}
   1735      1.1  dyoung 		}
   1736      1.1  dyoung 
   1737      1.1  dyoung 		m_adj(m, -IEEE80211_CRC_LEN);
   1738  1.1.1.2  dyoung 		wh = mtod(m, struct ieee80211_frame *);
   1739      1.1  dyoung 		if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
   1740      1.1  dyoung 			/*
   1741      1.1  dyoung 			 * WEP is decrypted by hardware. Clear WEP bit
   1742      1.1  dyoung 			 * and trim WEP header for ieee80211_input().
   1743      1.1  dyoung 			 */
   1744      1.1  dyoung 			wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
   1745      1.1  dyoung 			memcpy(&whbuf, wh, sizeof(whbuf));
   1746      1.1  dyoung 			m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN);
   1747  1.1.1.2  dyoung 			wh = mtod(m, struct ieee80211_frame *);
   1748  1.1.1.2  dyoung 			memcpy(wh, &whbuf, sizeof(whbuf));
   1749      1.1  dyoung 			/*
   1750      1.1  dyoung 			 * Also trim WEP ICV from the tail.
   1751      1.1  dyoung 			 */
   1752      1.1  dyoung 			m_adj(m, -IEEE80211_WEP_CRCLEN);
   1753      1.1  dyoung 		}
   1754      1.1  dyoung 
   1755      1.1  dyoung 		/*
   1756      1.1  dyoung 		 * Locate the node for sender, track state, and
   1757      1.1  dyoung 		 * then pass this node (referenced) up to the 802.11
   1758      1.1  dyoung 		 * layer for its use.  We are required to pass
   1759      1.1  dyoung 		 * something so we fall back to ic_bss when this frame
   1760      1.1  dyoung 		 * is from an unknown sender.
   1761      1.1  dyoung 		 */
   1762      1.1  dyoung 		if (ic->ic_opmode != IEEE80211_M_STA) {
   1763      1.1  dyoung 			ni = ieee80211_find_node(ic, wh->i_addr2);
   1764      1.1  dyoung 			if (ni == NULL)
   1765      1.1  dyoung 				ni = ieee80211_ref_node(ic->ic_bss);
   1766      1.1  dyoung 		} else
   1767      1.1  dyoung 			ni = ieee80211_ref_node(ic->ic_bss);
   1768  1.1.1.2  dyoung 
   1769  1.1.1.2  dyoung 		/*
   1770  1.1.1.2  dyoung 		 * Record driver-specific state.
   1771  1.1.1.2  dyoung 		 */
   1772  1.1.1.2  dyoung 		an = ATH_NODE(ni);
   1773  1.1.1.2  dyoung 		if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE)
   1774  1.1.1.2  dyoung 			an->an_rx_hist_next = 0;
   1775  1.1.1.2  dyoung 		rh = &an->an_rx_hist[an->an_rx_hist_next];
   1776  1.1.1.2  dyoung 		rh->arh_ticks = ticks;
   1777  1.1.1.2  dyoung 		rh->arh_rssi = ds->ds_rxstat.rs_rssi;
   1778  1.1.1.2  dyoung 		rh->arh_antenna = ds->ds_rxstat.rs_antenna;
   1779  1.1.1.2  dyoung 
   1780      1.1  dyoung 		/*
   1781      1.1  dyoung 		 * Send frame up for processing.
   1782      1.1  dyoung 		 */
   1783      1.1  dyoung 		ieee80211_input(ifp, m, ni,
   1784      1.1  dyoung 			ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp);
   1785  1.1.1.2  dyoung 
   1786      1.1  dyoung 		/*
   1787      1.1  dyoung 		 * The frame may have caused the node to be marked for
   1788      1.1  dyoung 		 * reclamation (e.g. in response to a DEAUTH message)
   1789      1.1  dyoung 		 * so use free_node here instead of unref_node.
   1790      1.1  dyoung 		 */
   1791      1.1  dyoung 		if (ni == ic->ic_bss)
   1792      1.1  dyoung 			ieee80211_unref_node(&ni);
   1793      1.1  dyoung 		else
   1794      1.1  dyoung 			ieee80211_free_node(ic, ni);
   1795      1.1  dyoung   rx_next:
   1796      1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   1797      1.1  dyoung 	} while (ath_rxbuf_init(sc, bf) == 0);
   1798      1.1  dyoung 
   1799      1.1  dyoung 	ath_hal_rxmonitor(ah);			/* rx signal state monitoring */
   1800      1.1  dyoung 	ath_hal_rxena(ah);			/* in case of RXEOL */
   1801  1.1.1.2  dyoung #undef PA2DESC
   1802      1.1  dyoung }
   1803      1.1  dyoung 
   1804      1.1  dyoung /*
   1805      1.1  dyoung  * XXX Size of an ACK control frame in bytes.
   1806      1.1  dyoung  */
   1807      1.1  dyoung #define	IEEE80211_ACK_SIZE	(2+2+IEEE80211_ADDR_LEN+4)
   1808      1.1  dyoung 
   1809      1.1  dyoung static int
   1810      1.1  dyoung ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
   1811      1.1  dyoung     struct mbuf *m0)
   1812      1.1  dyoung {
   1813      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1814      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1815      1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1816      1.1  dyoung 	int i, error, iswep, hdrlen, pktlen;
   1817      1.1  dyoung 	u_int8_t rix, cix, txrate, ctsrate;
   1818      1.1  dyoung 	struct ath_desc *ds;
   1819      1.1  dyoung 	struct mbuf *m;
   1820      1.1  dyoung 	struct ieee80211_frame *wh;
   1821      1.1  dyoung 	u_int32_t iv;
   1822      1.1  dyoung 	u_int8_t *ivp;
   1823      1.1  dyoung 	u_int8_t hdrbuf[sizeof(struct ieee80211_frame) +
   1824      1.1  dyoung 	    IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN];
   1825      1.1  dyoung 	u_int subtype, flags, ctsduration, antenna;
   1826      1.1  dyoung 	HAL_PKT_TYPE atype;
   1827      1.1  dyoung 	const HAL_RATE_TABLE *rt;
   1828      1.1  dyoung 	HAL_BOOL shortPreamble;
   1829      1.1  dyoung 	struct ath_node *an;
   1830      1.1  dyoung 
   1831      1.1  dyoung 	wh = mtod(m0, struct ieee80211_frame *);
   1832      1.1  dyoung 	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
   1833      1.1  dyoung 	hdrlen = sizeof(struct ieee80211_frame);
   1834      1.1  dyoung 	pktlen = m0->m_pkthdr.len;
   1835      1.1  dyoung 
   1836      1.1  dyoung 	if (iswep) {
   1837      1.1  dyoung 		memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen);
   1838      1.1  dyoung 		m_adj(m0, hdrlen);
   1839      1.1  dyoung 		M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT);
   1840      1.1  dyoung 		if (m0 == NULL) {
   1841      1.1  dyoung 			sc->sc_stats.ast_tx_nombuf++;
   1842      1.1  dyoung 			return ENOMEM;
   1843      1.1  dyoung 		}
   1844      1.1  dyoung 		ivp = hdrbuf + hdrlen;
   1845  1.1.1.2  dyoung 		wh = mtod(m0, struct ieee80211_frame *);
   1846      1.1  dyoung 		/*
   1847      1.1  dyoung 		 * XXX
   1848      1.1  dyoung 		 * IV must not duplicate during the lifetime of the key.
   1849      1.1  dyoung 		 * But no mechanism to renew keys is defined in IEEE 802.11
   1850      1.1  dyoung 		 * WEP.  And IV may be duplicated between other stations
   1851      1.1  dyoung 		 * because of the session key itself is shared.
   1852      1.1  dyoung 		 * So we use pseudo random IV for now, though it is not the
   1853      1.1  dyoung 		 * right way.
   1854      1.1  dyoung 		 */
   1855  1.1.1.2  dyoung                 iv = ic->ic_iv;
   1856  1.1.1.2  dyoung 		/*
   1857  1.1.1.2  dyoung 		 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir:
   1858  1.1.1.2  dyoung 		 * (B, 255, N) with 3 <= B < 8
   1859  1.1.1.2  dyoung 		 */
   1860  1.1.1.2  dyoung 		if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00)
   1861  1.1.1.2  dyoung 			iv += 0x000100;
   1862  1.1.1.2  dyoung 		ic->ic_iv = iv + 1;
   1863      1.1  dyoung 		for (i = 0; i < IEEE80211_WEP_IVLEN; i++) {
   1864      1.1  dyoung 			ivp[i] = iv;
   1865      1.1  dyoung 			iv >>= 8;
   1866      1.1  dyoung 		}
   1867      1.1  dyoung 		ivp[i] = sc->sc_ic.ic_wep_txkey << 6;	/* Key ID and pad */
   1868      1.1  dyoung 		memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf));
   1869      1.1  dyoung 		/*
   1870      1.1  dyoung 		 * The ICV length must be included into hdrlen and pktlen.
   1871      1.1  dyoung 		 */
   1872      1.1  dyoung 		hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN;
   1873      1.1  dyoung 		pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN;
   1874      1.1  dyoung 	}
   1875      1.1  dyoung 	pktlen += IEEE80211_CRC_LEN;
   1876      1.1  dyoung 
   1877      1.1  dyoung 	/*
   1878      1.1  dyoung 	 * Load the DMA map so any coalescing is done.  This
   1879      1.1  dyoung 	 * also calculates the number of descriptors we need.
   1880      1.1  dyoung 	 */
   1881      1.1  dyoung 	error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m0,
   1882      1.1  dyoung 				     ath_mbuf_load_cb, bf,
   1883      1.1  dyoung 				     BUS_DMA_NOWAIT);
   1884  1.1.1.2  dyoung 	if (error == EFBIG) {
   1885  1.1.1.2  dyoung 		/* XXX packet requires too many descriptors */
   1886  1.1.1.2  dyoung 		bf->bf_nseg = ATH_TXDESC+1;
   1887  1.1.1.2  dyoung 	} else if (error != 0) {
   1888      1.1  dyoung 		sc->sc_stats.ast_tx_busdma++;
   1889      1.1  dyoung 		m_freem(m0);
   1890      1.1  dyoung 		return error;
   1891      1.1  dyoung 	}
   1892      1.1  dyoung 	/*
   1893      1.1  dyoung 	 * Discard null packets and check for packets that
   1894      1.1  dyoung 	 * require too many TX descriptors.  We try to convert
   1895      1.1  dyoung 	 * the latter to a cluster.
   1896      1.1  dyoung 	 */
   1897      1.1  dyoung 	if (bf->bf_nseg > ATH_TXDESC) {		/* too many desc's, linearize */
   1898      1.1  dyoung 		sc->sc_stats.ast_tx_linear++;
   1899      1.1  dyoung 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   1900      1.1  dyoung 		if (m == NULL) {
   1901      1.1  dyoung 			sc->sc_stats.ast_tx_nombuf++;
   1902      1.1  dyoung 			m_freem(m0);
   1903      1.1  dyoung 			return ENOMEM;
   1904      1.1  dyoung 		}
   1905      1.1  dyoung 		M_MOVE_PKTHDR(m, m0);
   1906      1.1  dyoung 		MCLGET(m, M_DONTWAIT);
   1907      1.1  dyoung 		if ((m->m_flags & M_EXT) == 0) {
   1908      1.1  dyoung 			sc->sc_stats.ast_tx_nomcl++;
   1909      1.1  dyoung 			m_freem(m0);
   1910      1.1  dyoung 			m_free(m);
   1911      1.1  dyoung 			return ENOMEM;
   1912      1.1  dyoung 		}
   1913      1.1  dyoung 		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
   1914      1.1  dyoung 		m_freem(m0);
   1915      1.1  dyoung 		m->m_len = m->m_pkthdr.len;
   1916      1.1  dyoung 		m0 = m;
   1917      1.1  dyoung 		error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m0,
   1918      1.1  dyoung 					     ath_mbuf_load_cb, bf,
   1919      1.1  dyoung 					     BUS_DMA_NOWAIT);
   1920      1.1  dyoung 		if (error != 0) {
   1921      1.1  dyoung 			sc->sc_stats.ast_tx_busdma++;
   1922      1.1  dyoung 			m_freem(m0);
   1923      1.1  dyoung 			return error;
   1924      1.1  dyoung 		}
   1925      1.1  dyoung 		KASSERT(bf->bf_nseg == 1,
   1926      1.1  dyoung 			("ath_tx_start: packet not one segment; nseg %u",
   1927      1.1  dyoung 			bf->bf_nseg));
   1928      1.1  dyoung 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
   1929      1.1  dyoung 		sc->sc_stats.ast_tx_nodata++;
   1930      1.1  dyoung 		m_freem(m0);
   1931      1.1  dyoung 		return EIO;
   1932      1.1  dyoung 	}
   1933      1.1  dyoung 	DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen));
   1934      1.1  dyoung 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
   1935      1.1  dyoung 	bf->bf_m = m0;
   1936      1.1  dyoung 	bf->bf_node = ni;			/* NB: held reference */
   1937      1.1  dyoung 
   1938      1.1  dyoung 	/* setup descriptors */
   1939      1.1  dyoung 	ds = bf->bf_desc;
   1940      1.1  dyoung 	rt = sc->sc_currates;
   1941      1.1  dyoung 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
   1942      1.1  dyoung 
   1943      1.1  dyoung 	/*
   1944      1.1  dyoung 	 * Calculate Atheros packet type from IEEE80211 packet header
   1945      1.1  dyoung 	 * and setup for rate calculations.
   1946      1.1  dyoung 	 */
   1947      1.1  dyoung 	atype = HAL_PKT_TYPE_NORMAL;			/* default */
   1948      1.1  dyoung 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
   1949      1.1  dyoung 	case IEEE80211_FC0_TYPE_MGT:
   1950      1.1  dyoung 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
   1951      1.1  dyoung 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
   1952      1.1  dyoung 			atype = HAL_PKT_TYPE_BEACON;
   1953      1.1  dyoung 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
   1954      1.1  dyoung 			atype = HAL_PKT_TYPE_PROBE_RESP;
   1955      1.1  dyoung 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
   1956      1.1  dyoung 			atype = HAL_PKT_TYPE_ATIM;
   1957      1.1  dyoung 		rix = 0;			/* XXX lowest rate */
   1958      1.1  dyoung 		break;
   1959      1.1  dyoung 	case IEEE80211_FC0_TYPE_CTL:
   1960      1.1  dyoung 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
   1961      1.1  dyoung 		if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL)
   1962      1.1  dyoung 			atype = HAL_PKT_TYPE_PSPOLL;
   1963      1.1  dyoung 		rix = 0;			/* XXX lowest rate */
   1964      1.1  dyoung 		break;
   1965      1.1  dyoung 	default:
   1966      1.1  dyoung 		rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] &
   1967      1.1  dyoung 				IEEE80211_RATE_VAL];
   1968      1.1  dyoung 		if (rix == 0xff) {
   1969      1.1  dyoung 			if_printf(ifp, "bogus xmit rate 0x%x\n",
   1970      1.1  dyoung 				ni->ni_rates.rs_rates[ni->ni_txrate]);
   1971      1.1  dyoung 			sc->sc_stats.ast_tx_badrate++;
   1972      1.1  dyoung 			m_freem(m0);
   1973      1.1  dyoung 			return EIO;
   1974      1.1  dyoung 		}
   1975      1.1  dyoung 		break;
   1976      1.1  dyoung 	}
   1977      1.1  dyoung 	/*
   1978      1.1  dyoung 	 * NB: the 802.11 layer marks whether or not we should
   1979      1.1  dyoung 	 * use short preamble based on the current mode and
   1980      1.1  dyoung 	 * negotiated parameters.
   1981      1.1  dyoung 	 */
   1982  1.1.1.2  dyoung 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
   1983  1.1.1.2  dyoung 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
   1984      1.1  dyoung 		txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble;
   1985      1.1  dyoung 		shortPreamble = AH_TRUE;
   1986      1.1  dyoung 		sc->sc_stats.ast_tx_shortpre++;
   1987      1.1  dyoung 	} else {
   1988      1.1  dyoung 		txrate = rt->info[rix].rateCode;
   1989      1.1  dyoung 		shortPreamble = AH_FALSE;
   1990      1.1  dyoung 	}
   1991      1.1  dyoung 
   1992      1.1  dyoung 	/*
   1993      1.1  dyoung 	 * Calculate miscellaneous flags.
   1994      1.1  dyoung 	 */
   1995      1.1  dyoung 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for wep errors */
   1996      1.1  dyoung 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
   1997      1.1  dyoung 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
   1998      1.1  dyoung 		sc->sc_stats.ast_tx_noack++;
   1999      1.1  dyoung 	} else if (pktlen > ic->ic_rtsthreshold) {
   2000      1.1  dyoung 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
   2001      1.1  dyoung 		sc->sc_stats.ast_tx_rts++;
   2002      1.1  dyoung 	}
   2003      1.1  dyoung 
   2004      1.1  dyoung 	/*
   2005  1.1.1.2  dyoung 	 * Calculate duration.  This logically belongs in the 802.11
   2006  1.1.1.2  dyoung 	 * layer but it lacks sufficient information to calculate it.
   2007  1.1.1.2  dyoung 	 */
   2008  1.1.1.2  dyoung 	if ((flags & HAL_TXDESC_NOACK) == 0 &&
   2009  1.1.1.2  dyoung 	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
   2010  1.1.1.2  dyoung 		u_int16_t dur;
   2011  1.1.1.2  dyoung 		/*
   2012  1.1.1.2  dyoung 		 * XXX not right with fragmentation.
   2013  1.1.1.2  dyoung 		 */
   2014  1.1.1.2  dyoung 		dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE,
   2015  1.1.1.2  dyoung 				rix, shortPreamble);
   2016  1.1.1.2  dyoung 		*((u_int16_t*) wh->i_dur) = htole16(dur);
   2017  1.1.1.2  dyoung 	}
   2018  1.1.1.2  dyoung 
   2019  1.1.1.2  dyoung 	/*
   2020      1.1  dyoung 	 * Calculate RTS/CTS rate and duration if needed.
   2021      1.1  dyoung 	 */
   2022      1.1  dyoung 	ctsduration = 0;
   2023      1.1  dyoung 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
   2024      1.1  dyoung 		/*
   2025      1.1  dyoung 		 * CTS transmit rate is derived from the transmit rate
   2026      1.1  dyoung 		 * by looking in the h/w rate table.  We must also factor
   2027      1.1  dyoung 		 * in whether or not a short preamble is to be used.
   2028      1.1  dyoung 		 */
   2029      1.1  dyoung 		cix = rt->info[rix].controlRate;
   2030      1.1  dyoung 		ctsrate = rt->info[cix].rateCode;
   2031      1.1  dyoung 		if (shortPreamble)
   2032      1.1  dyoung 			ctsrate |= rt->info[cix].shortPreamble;
   2033      1.1  dyoung 		/*
   2034      1.1  dyoung 		 * Compute the transmit duration based on the size
   2035      1.1  dyoung 		 * of an ACK frame.  We call into the HAL to do the
   2036      1.1  dyoung 		 * computation since it depends on the characteristics
   2037      1.1  dyoung 		 * of the actual PHY being used.
   2038      1.1  dyoung 		 */
   2039      1.1  dyoung 		if (flags & HAL_TXDESC_RTSENA) {	/* SIFS + CTS */
   2040      1.1  dyoung 			ctsduration += ath_hal_computetxtime(ah,
   2041      1.1  dyoung 				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
   2042      1.1  dyoung 		}
   2043      1.1  dyoung 		/* SIFS + data */
   2044      1.1  dyoung 		ctsduration += ath_hal_computetxtime(ah,
   2045      1.1  dyoung 			rt, pktlen, rix, shortPreamble);
   2046      1.1  dyoung 		if ((flags & HAL_TXDESC_NOACK) == 0) {	/* SIFS + ACK */
   2047      1.1  dyoung 			ctsduration += ath_hal_computetxtime(ah,
   2048      1.1  dyoung 				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
   2049      1.1  dyoung 		}
   2050      1.1  dyoung 	} else
   2051      1.1  dyoung 		ctsrate = 0;
   2052      1.1  dyoung 
   2053      1.1  dyoung 	/*
   2054      1.1  dyoung 	 * For now use the antenna on which the last good
   2055      1.1  dyoung 	 * frame was received on.  We assume this field is
   2056      1.1  dyoung 	 * initialized to 0 which gives us ``auto'' or the
   2057      1.1  dyoung 	 * ``default'' antenna.
   2058      1.1  dyoung 	 */
   2059      1.1  dyoung 	an = (struct ath_node *) ni;
   2060      1.1  dyoung 	if (an->an_tx_antenna)
   2061      1.1  dyoung 		antenna = an->an_tx_antenna;
   2062      1.1  dyoung 	else
   2063  1.1.1.2  dyoung 		antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna;
   2064      1.1  dyoung 
   2065      1.1  dyoung 	/*
   2066      1.1  dyoung 	 * Formulate first tx descriptor with tx controls.
   2067      1.1  dyoung 	 */
   2068      1.1  dyoung 	/* XXX check return value? */
   2069      1.1  dyoung 	ath_hal_setuptxdesc(ah, ds
   2070      1.1  dyoung 		, pktlen		/* packet length */
   2071      1.1  dyoung 		, hdrlen		/* header length */
   2072      1.1  dyoung 		, atype			/* Atheros packet type */
   2073      1.1  dyoung 		, 60			/* txpower XXX */
   2074      1.1  dyoung 		, txrate, 1+10		/* series 0 rate/tries */
   2075      1.1  dyoung 		, iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID
   2076      1.1  dyoung 		, antenna		/* antenna mode */
   2077      1.1  dyoung 		, flags			/* flags */
   2078      1.1  dyoung 		, ctsrate		/* rts/cts rate */
   2079      1.1  dyoung 		, ctsduration		/* rts/cts duration */
   2080      1.1  dyoung 	);
   2081      1.1  dyoung #ifdef notyet
   2082      1.1  dyoung 	ath_hal_setupxtxdesc(ah, ds
   2083      1.1  dyoung 		, AH_FALSE		/* short preamble */
   2084      1.1  dyoung 		, 0, 0			/* series 1 rate/tries */
   2085      1.1  dyoung 		, 0, 0			/* series 2 rate/tries */
   2086      1.1  dyoung 		, 0, 0			/* series 3 rate/tries */
   2087      1.1  dyoung 	);
   2088      1.1  dyoung #endif
   2089      1.1  dyoung 	/*
   2090      1.1  dyoung 	 * Fillin the remainder of the descriptor info.
   2091      1.1  dyoung 	 */
   2092      1.1  dyoung 	for (i = 0; i < bf->bf_nseg; i++, ds++) {
   2093      1.1  dyoung 		ds->ds_data = bf->bf_segs[i].ds_addr;
   2094      1.1  dyoung 		if (i == bf->bf_nseg - 1)
   2095      1.1  dyoung 			ds->ds_link = 0;
   2096      1.1  dyoung 		else
   2097      1.1  dyoung 			ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
   2098      1.1  dyoung 		ath_hal_filltxdesc(ah, ds
   2099      1.1  dyoung 			, bf->bf_segs[i].ds_len	/* segment length */
   2100      1.1  dyoung 			, i == 0		/* first segment */
   2101      1.1  dyoung 			, i == bf->bf_nseg - 1	/* last segment */
   2102      1.1  dyoung 		);
   2103      1.1  dyoung 		DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n",
   2104      1.1  dyoung 		    i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1,
   2105      1.1  dyoung 		    ds->ds_hw[0], ds->ds_hw[1]));
   2106      1.1  dyoung 	}
   2107      1.1  dyoung 
   2108      1.1  dyoung 	/*
   2109      1.1  dyoung 	 * Insert the frame on the outbound list and
   2110      1.1  dyoung 	 * pass it on to the hardware.
   2111      1.1  dyoung 	 */
   2112  1.1.1.2  dyoung 	ATH_TXQ_LOCK(sc);
   2113      1.1  dyoung 	TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
   2114      1.1  dyoung 	if (sc->sc_txlink == NULL) {
   2115      1.1  dyoung 		ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr);
   2116      1.1  dyoung 		DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n",
   2117      1.1  dyoung 		    (caddr_t)bf->bf_daddr, bf->bf_desc));
   2118      1.1  dyoung 	} else {
   2119      1.1  dyoung 		*sc->sc_txlink = bf->bf_daddr;
   2120      1.1  dyoung 		DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n",
   2121      1.1  dyoung 		    sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc));
   2122      1.1  dyoung 	}
   2123      1.1  dyoung 	sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
   2124  1.1.1.2  dyoung 	ATH_TXQ_UNLOCK(sc);
   2125      1.1  dyoung 
   2126      1.1  dyoung 	ath_hal_txstart(ah, sc->sc_txhalq);
   2127      1.1  dyoung 	return 0;
   2128      1.1  dyoung }
   2129      1.1  dyoung 
   2130      1.1  dyoung static void
   2131      1.1  dyoung ath_tx_proc(void *arg, int npending)
   2132      1.1  dyoung {
   2133      1.1  dyoung 	struct ath_softc *sc = arg;
   2134      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2135      1.1  dyoung 	struct ath_buf *bf;
   2136      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2137      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   2138      1.1  dyoung 	struct ath_desc *ds;
   2139      1.1  dyoung 	struct ieee80211_node *ni;
   2140      1.1  dyoung 	struct ath_node *an;
   2141      1.1  dyoung 	int sr, lr;
   2142      1.1  dyoung 	HAL_STATUS status;
   2143      1.1  dyoung 
   2144      1.1  dyoung 	DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n",
   2145      1.1  dyoung 		npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq),
   2146      1.1  dyoung 		sc->sc_txlink));
   2147      1.1  dyoung 	for (;;) {
   2148  1.1.1.2  dyoung 		ATH_TXQ_LOCK(sc);
   2149      1.1  dyoung 		bf = TAILQ_FIRST(&sc->sc_txq);
   2150      1.1  dyoung 		if (bf == NULL) {
   2151      1.1  dyoung 			sc->sc_txlink = NULL;
   2152  1.1.1.2  dyoung 			ATH_TXQ_UNLOCK(sc);
   2153      1.1  dyoung 			break;
   2154      1.1  dyoung 		}
   2155      1.1  dyoung 		/* only the last descriptor is needed */
   2156      1.1  dyoung 		ds = &bf->bf_desc[bf->bf_nseg - 1];
   2157      1.1  dyoung 		status = ath_hal_txprocdesc(ah, ds);
   2158      1.1  dyoung #ifdef AR_DEBUG
   2159      1.1  dyoung 		if (ath_debug > 1)
   2160      1.1  dyoung 			ath_printtxbuf(bf, status == HAL_OK);
   2161      1.1  dyoung #endif
   2162      1.1  dyoung 		if (status == HAL_EINPROGRESS) {
   2163  1.1.1.2  dyoung 			ATH_TXQ_UNLOCK(sc);
   2164      1.1  dyoung 			break;
   2165      1.1  dyoung 		}
   2166      1.1  dyoung 		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
   2167  1.1.1.2  dyoung 		ATH_TXQ_UNLOCK(sc);
   2168      1.1  dyoung 
   2169      1.1  dyoung 		ni = bf->bf_node;
   2170      1.1  dyoung 		if (ni != NULL) {
   2171      1.1  dyoung 			an = (struct ath_node *) ni;
   2172      1.1  dyoung 			if (ds->ds_txstat.ts_status == 0) {
   2173      1.1  dyoung 				an->an_tx_ok++;
   2174      1.1  dyoung 				an->an_tx_antenna = ds->ds_txstat.ts_antenna;
   2175      1.1  dyoung 			} else {
   2176      1.1  dyoung 				an->an_tx_err++;
   2177      1.1  dyoung 				ifp->if_oerrors++;
   2178      1.1  dyoung 				if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY)
   2179      1.1  dyoung 					sc->sc_stats.ast_tx_xretries++;
   2180      1.1  dyoung 				if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO)
   2181      1.1  dyoung 					sc->sc_stats.ast_tx_fifoerr++;
   2182      1.1  dyoung 				if (ds->ds_txstat.ts_status & HAL_TXERR_FILT)
   2183      1.1  dyoung 					sc->sc_stats.ast_tx_filtered++;
   2184      1.1  dyoung 				an->an_tx_antenna = 0;	/* invalidate */
   2185      1.1  dyoung 			}
   2186      1.1  dyoung 			sr = ds->ds_txstat.ts_shortretry;
   2187      1.1  dyoung 			lr = ds->ds_txstat.ts_longretry;
   2188      1.1  dyoung 			sc->sc_stats.ast_tx_shortretry += sr;
   2189      1.1  dyoung 			sc->sc_stats.ast_tx_longretry += lr;
   2190      1.1  dyoung 			if (sr + lr)
   2191      1.1  dyoung 				an->an_tx_retr++;
   2192      1.1  dyoung 			/*
   2193      1.1  dyoung 			 * Reclaim reference to node.
   2194      1.1  dyoung 			 *
   2195      1.1  dyoung 			 * NB: the node may be reclaimed here if, for example
   2196      1.1  dyoung 			 *     this is a DEAUTH message that was sent and the
   2197      1.1  dyoung 			 *     node was timed out due to inactivity.
   2198      1.1  dyoung 			 */
   2199      1.1  dyoung 			if (ni != ic->ic_bss)
   2200      1.1  dyoung 				ieee80211_free_node(ic, ni);
   2201      1.1  dyoung 		}
   2202      1.1  dyoung 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
   2203      1.1  dyoung 		    BUS_DMASYNC_POSTWRITE);
   2204      1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2205      1.1  dyoung 		m_freem(bf->bf_m);
   2206      1.1  dyoung 		bf->bf_m = NULL;
   2207      1.1  dyoung 		bf->bf_node = NULL;
   2208      1.1  dyoung 
   2209  1.1.1.2  dyoung 		ATH_TXBUF_LOCK(sc);
   2210      1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2211  1.1.1.2  dyoung 		ATH_TXBUF_UNLOCK(sc);
   2212      1.1  dyoung 	}
   2213      1.1  dyoung 	ifp->if_flags &= ~IFF_OACTIVE;
   2214      1.1  dyoung 	sc->sc_tx_timer = 0;
   2215      1.1  dyoung 
   2216      1.1  dyoung 	ath_start(ifp);
   2217      1.1  dyoung }
   2218      1.1  dyoung 
   2219      1.1  dyoung /*
   2220      1.1  dyoung  * Drain the transmit queue and reclaim resources.
   2221      1.1  dyoung  */
   2222      1.1  dyoung static void
   2223      1.1  dyoung ath_draintxq(struct ath_softc *sc)
   2224      1.1  dyoung {
   2225      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2226      1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   2227      1.1  dyoung 	struct ath_buf *bf;
   2228      1.1  dyoung 
   2229      1.1  dyoung 	/* XXX return value */
   2230      1.1  dyoung 	if (!sc->sc_invalid) {
   2231      1.1  dyoung 		/* don't touch the hardware if marked invalid */
   2232      1.1  dyoung 		(void) ath_hal_stoptxdma(ah, sc->sc_txhalq);
   2233      1.1  dyoung 		DPRINTF(("ath_draintxq: tx queue %p, link %p\n",
   2234      1.1  dyoung 		    (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq),
   2235      1.1  dyoung 		    sc->sc_txlink));
   2236      1.1  dyoung 		(void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
   2237      1.1  dyoung 		DPRINTF(("ath_draintxq: beacon queue %p\n",
   2238      1.1  dyoung 		    (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq)));
   2239      1.1  dyoung 	}
   2240      1.1  dyoung 	for (;;) {
   2241  1.1.1.2  dyoung 		ATH_TXQ_LOCK(sc);
   2242      1.1  dyoung 		bf = TAILQ_FIRST(&sc->sc_txq);
   2243      1.1  dyoung 		if (bf == NULL) {
   2244      1.1  dyoung 			sc->sc_txlink = NULL;
   2245  1.1.1.2  dyoung 			ATH_TXQ_UNLOCK(sc);
   2246      1.1  dyoung 			break;
   2247      1.1  dyoung 		}
   2248      1.1  dyoung 		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
   2249  1.1.1.2  dyoung 		ATH_TXQ_UNLOCK(sc);
   2250      1.1  dyoung #ifdef AR_DEBUG
   2251      1.1  dyoung 		if (ath_debug)
   2252      1.1  dyoung 			ath_printtxbuf(bf,
   2253      1.1  dyoung 				ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK);
   2254      1.1  dyoung #endif /* AR_DEBUG */
   2255      1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2256      1.1  dyoung 		m_freem(bf->bf_m);
   2257      1.1  dyoung 		bf->bf_m = NULL;
   2258      1.1  dyoung 		bf->bf_node = NULL;
   2259  1.1.1.2  dyoung 		ATH_TXBUF_LOCK(sc);
   2260      1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2261  1.1.1.2  dyoung 		ATH_TXBUF_UNLOCK(sc);
   2262      1.1  dyoung 	}
   2263      1.1  dyoung 	ifp->if_flags &= ~IFF_OACTIVE;
   2264      1.1  dyoung 	sc->sc_tx_timer = 0;
   2265      1.1  dyoung }
   2266      1.1  dyoung 
   2267      1.1  dyoung /*
   2268      1.1  dyoung  * Disable the receive h/w in preparation for a reset.
   2269      1.1  dyoung  */
   2270      1.1  dyoung static void
   2271      1.1  dyoung ath_stoprecv(struct ath_softc *sc)
   2272      1.1  dyoung {
   2273  1.1.1.2  dyoung #define	PA2DESC(_sc, _pa) \
   2274  1.1.1.2  dyoung 	((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
   2275  1.1.1.2  dyoung 		((_pa) - (_sc)->sc_desc_paddr)))
   2276      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2277      1.1  dyoung 
   2278      1.1  dyoung 	ath_hal_stoppcurecv(ah);	/* disable PCU */
   2279      1.1  dyoung 	ath_hal_setrxfilter(ah, 0);	/* clear recv filter */
   2280      1.1  dyoung 	ath_hal_stopdmarecv(ah);	/* disable DMA engine */
   2281      1.1  dyoung 	DELAY(3000);			/* long enough for 1 frame */
   2282      1.1  dyoung #ifdef AR_DEBUG
   2283      1.1  dyoung 	if (ath_debug) {
   2284      1.1  dyoung 		struct ath_buf *bf;
   2285      1.1  dyoung 
   2286      1.1  dyoung 		DPRINTF(("ath_stoprecv: rx queue %p, link %p\n",
   2287      1.1  dyoung 		    (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink));
   2288      1.1  dyoung 		TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   2289  1.1.1.2  dyoung 			struct ath_desc *ds = bf->bf_desc;
   2290  1.1.1.2  dyoung 			if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr,
   2291  1.1.1.2  dyoung 			    PA2DESC(sc, ds->ds_link)) == HAL_OK)
   2292      1.1  dyoung 				ath_printrxbuf(bf, 1);
   2293      1.1  dyoung 		}
   2294      1.1  dyoung 	}
   2295      1.1  dyoung #endif
   2296      1.1  dyoung 	sc->sc_rxlink = NULL;		/* just in case */
   2297  1.1.1.2  dyoung #undef PA2DESC
   2298      1.1  dyoung }
   2299      1.1  dyoung 
   2300      1.1  dyoung /*
   2301      1.1  dyoung  * Enable the receive h/w following a reset.
   2302      1.1  dyoung  */
   2303      1.1  dyoung static int
   2304      1.1  dyoung ath_startrecv(struct ath_softc *sc)
   2305      1.1  dyoung {
   2306      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2307      1.1  dyoung 	struct ath_buf *bf;
   2308      1.1  dyoung 
   2309      1.1  dyoung 	sc->sc_rxlink = NULL;
   2310      1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   2311      1.1  dyoung 		int error = ath_rxbuf_init(sc, bf);
   2312      1.1  dyoung 		if (error != 0) {
   2313      1.1  dyoung 			DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n",
   2314      1.1  dyoung 				error));
   2315      1.1  dyoung 			return error;
   2316      1.1  dyoung 		}
   2317      1.1  dyoung 	}
   2318      1.1  dyoung 
   2319      1.1  dyoung 	bf = TAILQ_FIRST(&sc->sc_rxbuf);
   2320      1.1  dyoung 	ath_hal_putrxbuf(ah, bf->bf_daddr);
   2321      1.1  dyoung 	ath_hal_rxena(ah);		/* enable recv descriptors */
   2322      1.1  dyoung 	ath_mode_init(sc);		/* set filters, etc. */
   2323      1.1  dyoung 	ath_hal_startpcurecv(ah);	/* re-enable PCU/DMA engine */
   2324      1.1  dyoung 	return 0;
   2325      1.1  dyoung }
   2326      1.1  dyoung 
   2327      1.1  dyoung /*
   2328      1.1  dyoung  * Set/change channels.  If the channel is really being changed,
   2329      1.1  dyoung  * it's done by resetting the chip.  To accomplish this we must
   2330      1.1  dyoung  * first cleanup any pending DMA, then restart stuff after a la
   2331      1.1  dyoung  * ath_init.
   2332      1.1  dyoung  */
   2333      1.1  dyoung static int
   2334      1.1  dyoung ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
   2335      1.1  dyoung {
   2336      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2337      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2338      1.1  dyoung 
   2339      1.1  dyoung 	DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n",
   2340      1.1  dyoung 	    ieee80211_chan2ieee(ic, ic->ic_ibss_chan),
   2341      1.1  dyoung 		ic->ic_ibss_chan->ic_freq,
   2342      1.1  dyoung 	    ieee80211_chan2ieee(ic, chan), chan->ic_freq));
   2343      1.1  dyoung 	if (chan != ic->ic_ibss_chan) {
   2344      1.1  dyoung 		HAL_STATUS status;
   2345      1.1  dyoung 		HAL_CHANNEL hchan;
   2346      1.1  dyoung 		enum ieee80211_phymode mode;
   2347      1.1  dyoung 
   2348      1.1  dyoung 		/*
   2349      1.1  dyoung 		 * To switch channels clear any pending DMA operations;
   2350      1.1  dyoung 		 * wait long enough for the RX fifo to drain, reset the
   2351      1.1  dyoung 		 * hardware at the new frequency, and then re-enable
   2352      1.1  dyoung 		 * the relevant bits of the h/w.
   2353      1.1  dyoung 		 */
   2354      1.1  dyoung 		ath_hal_intrset(ah, 0);		/* disable interrupts */
   2355      1.1  dyoung 		ath_draintxq(sc);		/* clear pending tx frames */
   2356      1.1  dyoung 		ath_stoprecv(sc);		/* turn off frame recv */
   2357      1.1  dyoung 		/*
   2358      1.1  dyoung 		 * Convert to a HAL channel description with
   2359      1.1  dyoung 		 * the flags constrained to reflect the current
   2360      1.1  dyoung 		 * operating mode.
   2361      1.1  dyoung 		 */
   2362      1.1  dyoung 		hchan.channel = chan->ic_freq;
   2363      1.1  dyoung 		hchan.channelFlags = ath_chan2flags(ic, chan);
   2364      1.1  dyoung 		if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) {
   2365      1.1  dyoung 			if_printf(&ic->ic_if, "ath_chan_set: unable to reset "
   2366      1.1  dyoung 				"channel %u (%u Mhz)\n",
   2367      1.1  dyoung 				ieee80211_chan2ieee(ic, chan), chan->ic_freq);
   2368      1.1  dyoung 			return EIO;
   2369      1.1  dyoung 		}
   2370      1.1  dyoung 		/*
   2371      1.1  dyoung 		 * Re-enable rx framework.
   2372      1.1  dyoung 		 */
   2373      1.1  dyoung 		if (ath_startrecv(sc) != 0) {
   2374      1.1  dyoung 			if_printf(&ic->ic_if,
   2375      1.1  dyoung 				"ath_chan_set: unable to restart recv logic\n");
   2376      1.1  dyoung 			return EIO;
   2377      1.1  dyoung 		}
   2378      1.1  dyoung 
   2379      1.1  dyoung 		/*
   2380      1.1  dyoung 		 * Update BPF state.
   2381      1.1  dyoung 		 */
   2382      1.1  dyoung 		sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
   2383      1.1  dyoung 			htole16(chan->ic_freq);
   2384      1.1  dyoung 		sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
   2385      1.1  dyoung 			htole16(chan->ic_flags);
   2386      1.1  dyoung 
   2387      1.1  dyoung 		/*
   2388      1.1  dyoung 		 * Change channels and update the h/w rate map
   2389      1.1  dyoung 		 * if we're switching; e.g. 11a to 11b/g.
   2390      1.1  dyoung 		 */
   2391      1.1  dyoung 		ic->ic_ibss_chan = chan;
   2392      1.1  dyoung 		mode = ieee80211_chan2mode(ic, chan);
   2393      1.1  dyoung 		if (mode != sc->sc_curmode)
   2394      1.1  dyoung 			ath_setcurmode(sc, mode);
   2395      1.1  dyoung 
   2396      1.1  dyoung 		/*
   2397      1.1  dyoung 		 * Re-enable interrupts.
   2398      1.1  dyoung 		 */
   2399      1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   2400      1.1  dyoung 	}
   2401      1.1  dyoung 	return 0;
   2402      1.1  dyoung }
   2403      1.1  dyoung 
   2404      1.1  dyoung static void
   2405      1.1  dyoung ath_next_scan(void *arg)
   2406      1.1  dyoung {
   2407      1.1  dyoung 	struct ath_softc *sc = arg;
   2408      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2409      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   2410      1.1  dyoung 
   2411      1.1  dyoung 	if (ic->ic_state == IEEE80211_S_SCAN)
   2412      1.1  dyoung 		ieee80211_next_scan(ifp);
   2413      1.1  dyoung }
   2414      1.1  dyoung 
   2415      1.1  dyoung /*
   2416      1.1  dyoung  * Periodically recalibrate the PHY to account
   2417      1.1  dyoung  * for temperature/environment changes.
   2418      1.1  dyoung  */
   2419      1.1  dyoung static void
   2420      1.1  dyoung ath_calibrate(void *arg)
   2421      1.1  dyoung {
   2422      1.1  dyoung 	struct ath_softc *sc = arg;
   2423      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2424      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2425      1.1  dyoung 	struct ieee80211_channel *c;
   2426      1.1  dyoung 	HAL_CHANNEL hchan;
   2427      1.1  dyoung 
   2428      1.1  dyoung 	sc->sc_stats.ast_per_cal++;
   2429      1.1  dyoung 
   2430      1.1  dyoung 	/*
   2431      1.1  dyoung 	 * Convert to a HAL channel description with the flags
   2432      1.1  dyoung 	 * constrained to reflect the current operating mode.
   2433      1.1  dyoung 	 */
   2434      1.1  dyoung 	c = ic->ic_ibss_chan;
   2435      1.1  dyoung 	hchan.channel = c->ic_freq;
   2436      1.1  dyoung 	hchan.channelFlags = ath_chan2flags(ic, c);
   2437      1.1  dyoung 
   2438      1.1  dyoung 	DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags));
   2439      1.1  dyoung 
   2440      1.1  dyoung 	if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
   2441      1.1  dyoung 		/*
   2442      1.1  dyoung 		 * Rfgain is out of bounds, reset the chip
   2443      1.1  dyoung 		 * to load new gain values.
   2444      1.1  dyoung 		 */
   2445      1.1  dyoung 		sc->sc_stats.ast_per_rfgain++;
   2446      1.1  dyoung 		ath_reset(sc);
   2447      1.1  dyoung 	}
   2448      1.1  dyoung 	if (!ath_hal_calibrate(ah, &hchan)) {
   2449      1.1  dyoung 		DPRINTF(("%s: calibration of channel %u failed\n",
   2450      1.1  dyoung 			__func__, c->ic_freq));
   2451      1.1  dyoung 		sc->sc_stats.ast_per_calfail++;
   2452      1.1  dyoung 	}
   2453      1.1  dyoung 	callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc);
   2454      1.1  dyoung }
   2455      1.1  dyoung 
   2456      1.1  dyoung static int
   2457      1.1  dyoung ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
   2458      1.1  dyoung {
   2459      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   2460      1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
   2461      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2462      1.1  dyoung 	struct ieee80211_node *ni;
   2463      1.1  dyoung 	int i, error;
   2464  1.1.1.2  dyoung 	const u_int8_t *bssid;
   2465      1.1  dyoung 	u_int32_t rfilt;
   2466      1.1  dyoung 	static const HAL_LED_STATE leds[] = {
   2467      1.1  dyoung 	    HAL_LED_INIT,	/* IEEE80211_S_INIT */
   2468      1.1  dyoung 	    HAL_LED_SCAN,	/* IEEE80211_S_SCAN */
   2469      1.1  dyoung 	    HAL_LED_AUTH,	/* IEEE80211_S_AUTH */
   2470      1.1  dyoung 	    HAL_LED_ASSOC, 	/* IEEE80211_S_ASSOC */
   2471      1.1  dyoung 	    HAL_LED_RUN, 	/* IEEE80211_S_RUN */
   2472      1.1  dyoung 	};
   2473      1.1  dyoung 
   2474      1.1  dyoung 	DPRINTF(("%s: %s -> %s\n", __func__,
   2475      1.1  dyoung 		ieee80211_state_name[ic->ic_state],
   2476      1.1  dyoung 		ieee80211_state_name[nstate]));
   2477      1.1  dyoung 
   2478      1.1  dyoung 	ath_hal_setledstate(ah, leds[nstate]);	/* set LED */
   2479      1.1  dyoung 
   2480      1.1  dyoung 	if (nstate == IEEE80211_S_INIT) {
   2481      1.1  dyoung 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
   2482      1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   2483      1.1  dyoung 		callout_stop(&sc->sc_scan_ch);
   2484      1.1  dyoung 		callout_stop(&sc->sc_cal_ch);
   2485      1.1  dyoung 		return (*sc->sc_newstate)(ic, nstate, arg);
   2486      1.1  dyoung 	}
   2487      1.1  dyoung 	ni = ic->ic_bss;
   2488      1.1  dyoung 	error = ath_chan_set(sc, ni->ni_chan);
   2489      1.1  dyoung 	if (error != 0)
   2490      1.1  dyoung 		goto bad;
   2491  1.1.1.2  dyoung 	rfilt = ath_calcrxfilter(sc);
   2492      1.1  dyoung 	if (nstate == IEEE80211_S_SCAN) {
   2493      1.1  dyoung 		callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000,
   2494      1.1  dyoung 			ath_next_scan, sc);
   2495      1.1  dyoung 		bssid = ifp->if_broadcastaddr;
   2496      1.1  dyoung 	} else {
   2497      1.1  dyoung 		callout_stop(&sc->sc_scan_ch);
   2498      1.1  dyoung 		bssid = ni->ni_bssid;
   2499      1.1  dyoung 	}
   2500      1.1  dyoung 	ath_hal_setrxfilter(ah, rfilt);
   2501      1.1  dyoung 	DPRINTF(("%s: RX filter 0x%x bssid %s\n",
   2502      1.1  dyoung 		 __func__, rfilt, ether_sprintf(bssid)));
   2503      1.1  dyoung 
   2504      1.1  dyoung 	if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA)
   2505      1.1  dyoung 		ath_hal_setassocid(ah, bssid, ni->ni_associd);
   2506      1.1  dyoung 	else
   2507      1.1  dyoung 		ath_hal_setassocid(ah, bssid, 0);
   2508      1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_WEPON) {
   2509      1.1  dyoung 		for (i = 0; i < IEEE80211_WEP_NKID; i++)
   2510      1.1  dyoung 			if (ath_hal_keyisvalid(ah, i))
   2511      1.1  dyoung 				ath_hal_keysetmac(ah, i, bssid);
   2512      1.1  dyoung 	}
   2513      1.1  dyoung 
   2514      1.1  dyoung 	if (nstate == IEEE80211_S_RUN) {
   2515      1.1  dyoung 		DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s "
   2516      1.1  dyoung 			"capinfo=0x%04x chan=%d\n"
   2517      1.1  dyoung 			 , __func__
   2518      1.1  dyoung 			 , ic->ic_flags
   2519      1.1  dyoung 			 , ni->ni_intval
   2520      1.1  dyoung 			 , ether_sprintf(ni->ni_bssid)
   2521      1.1  dyoung 			 , ni->ni_capinfo
   2522      1.1  dyoung 			 , ieee80211_chan2ieee(ic, ni->ni_chan)));
   2523      1.1  dyoung 
   2524      1.1  dyoung 		/*
   2525      1.1  dyoung 		 * Allocate and setup the beacon frame for AP or adhoc mode.
   2526      1.1  dyoung 		 */
   2527      1.1  dyoung 		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
   2528      1.1  dyoung 		    ic->ic_opmode == IEEE80211_M_IBSS) {
   2529      1.1  dyoung 			error = ath_beacon_alloc(sc, ni);
   2530      1.1  dyoung 			if (error != 0)
   2531      1.1  dyoung 				goto bad;
   2532      1.1  dyoung 		}
   2533      1.1  dyoung 
   2534      1.1  dyoung 		/*
   2535      1.1  dyoung 		 * Configure the beacon and sleep timers.
   2536      1.1  dyoung 		 */
   2537      1.1  dyoung 		ath_beacon_config(sc);
   2538      1.1  dyoung 
   2539      1.1  dyoung 		/* start periodic recalibration timer */
   2540      1.1  dyoung 		callout_reset(&sc->sc_cal_ch, hz * ath_calinterval,
   2541      1.1  dyoung 			ath_calibrate, sc);
   2542      1.1  dyoung 	} else {
   2543      1.1  dyoung 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
   2544      1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   2545      1.1  dyoung 		callout_stop(&sc->sc_cal_ch);		/* no calibration */
   2546      1.1  dyoung 	}
   2547      1.1  dyoung 	/*
   2548      1.1  dyoung 	 * Reset the rate control state.
   2549      1.1  dyoung 	 */
   2550      1.1  dyoung 	ath_rate_ctl_reset(sc, nstate);
   2551      1.1  dyoung 	/*
   2552      1.1  dyoung 	 * Invoke the parent method to complete the work.
   2553      1.1  dyoung 	 */
   2554      1.1  dyoung 	return (*sc->sc_newstate)(ic, nstate, arg);
   2555      1.1  dyoung bad:
   2556      1.1  dyoung 	callout_stop(&sc->sc_scan_ch);
   2557      1.1  dyoung 	callout_stop(&sc->sc_cal_ch);
   2558      1.1  dyoung 	/* NB: do not invoke the parent */
   2559      1.1  dyoung 	return error;
   2560      1.1  dyoung }
   2561      1.1  dyoung 
   2562      1.1  dyoung /*
   2563      1.1  dyoung  * Setup driver-specific state for a newly associated node.
   2564      1.1  dyoung  * Note that we're called also on a re-associate, the isnew
   2565      1.1  dyoung  * param tells us if this is the first time or not.
   2566      1.1  dyoung  */
   2567      1.1  dyoung static void
   2568      1.1  dyoung ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
   2569      1.1  dyoung {
   2570      1.1  dyoung 	if (isnew) {
   2571      1.1  dyoung 		struct ath_node *an = (struct ath_node *) ni;
   2572      1.1  dyoung 
   2573      1.1  dyoung 		an->an_tx_ok = an->an_tx_err =
   2574      1.1  dyoung 			an->an_tx_retr = an->an_tx_upper = 0;
   2575      1.1  dyoung 		/* start with highest negotiated rate */
   2576      1.1  dyoung 		/*
   2577      1.1  dyoung 		 * XXX should do otherwise but only when
   2578      1.1  dyoung 		 * the rate control algorithm is better.
   2579      1.1  dyoung 		 */
   2580      1.1  dyoung 		KASSERT(ni->ni_rates.rs_nrates > 0,
   2581      1.1  dyoung 			("new association w/ no rates!"));
   2582      1.1  dyoung 		ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
   2583      1.1  dyoung 	}
   2584      1.1  dyoung }
   2585      1.1  dyoung 
   2586      1.1  dyoung static int
   2587      1.1  dyoung ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor)
   2588      1.1  dyoung {
   2589      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2590      1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   2591      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2592      1.1  dyoung 	HAL_CHANNEL *chans;
   2593      1.1  dyoung 	int i, ix, nchan;
   2594      1.1  dyoung 
   2595      1.1  dyoung 	chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL),
   2596      1.1  dyoung 			M_TEMP, M_NOWAIT);
   2597      1.1  dyoung 	if (chans == NULL) {
   2598      1.1  dyoung 		if_printf(ifp, "unable to allocate channel table\n");
   2599      1.1  dyoung 		return ENOMEM;
   2600      1.1  dyoung 	}
   2601      1.1  dyoung 	if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
   2602      1.1  dyoung 	    cc, HAL_MODE_ALL, outdoor)) {
   2603      1.1  dyoung 		if_printf(ifp, "unable to collect channel list from hal\n");
   2604      1.1  dyoung 		free(chans, M_TEMP);
   2605      1.1  dyoung 		return EINVAL;
   2606      1.1  dyoung 	}
   2607      1.1  dyoung 
   2608      1.1  dyoung 	/*
   2609      1.1  dyoung 	 * Convert HAL channels to ieee80211 ones and insert
   2610      1.1  dyoung 	 * them in the table according to their channel number.
   2611      1.1  dyoung 	 */
   2612      1.1  dyoung 	for (i = 0; i < nchan; i++) {
   2613      1.1  dyoung 		HAL_CHANNEL *c = &chans[i];
   2614      1.1  dyoung 		ix = ath_hal_mhz2ieee(c->channel, c->channelFlags);
   2615      1.1  dyoung 		if (ix > IEEE80211_CHAN_MAX) {
   2616      1.1  dyoung 			if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n",
   2617      1.1  dyoung 				ix, c->channel, c->channelFlags);
   2618      1.1  dyoung 			continue;
   2619      1.1  dyoung 		}
   2620      1.1  dyoung 		/* NB: flags are known to be compatible */
   2621      1.1  dyoung 		if (ic->ic_channels[ix].ic_freq == 0) {
   2622      1.1  dyoung 			ic->ic_channels[ix].ic_freq = c->channel;
   2623      1.1  dyoung 			ic->ic_channels[ix].ic_flags = c->channelFlags;
   2624      1.1  dyoung 		} else {
   2625      1.1  dyoung 			/* channels overlap; e.g. 11g and 11b */
   2626      1.1  dyoung 			ic->ic_channels[ix].ic_flags |= c->channelFlags;
   2627      1.1  dyoung 		}
   2628      1.1  dyoung 	}
   2629      1.1  dyoung 	free(chans, M_TEMP);
   2630      1.1  dyoung 	return 0;
   2631      1.1  dyoung }
   2632      1.1  dyoung 
   2633      1.1  dyoung static int
   2634      1.1  dyoung ath_rate_setup(struct ath_softc *sc, u_int mode)
   2635      1.1  dyoung {
   2636      1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2637      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2638      1.1  dyoung 	const HAL_RATE_TABLE *rt;
   2639      1.1  dyoung 	struct ieee80211_rateset *rs;
   2640      1.1  dyoung 	int i, maxrates;
   2641      1.1  dyoung 
   2642      1.1  dyoung 	switch (mode) {
   2643      1.1  dyoung 	case IEEE80211_MODE_11A:
   2644      1.1  dyoung 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A);
   2645      1.1  dyoung 		break;
   2646      1.1  dyoung 	case IEEE80211_MODE_11B:
   2647      1.1  dyoung 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B);
   2648      1.1  dyoung 		break;
   2649      1.1  dyoung 	case IEEE80211_MODE_11G:
   2650      1.1  dyoung 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G);
   2651      1.1  dyoung 		break;
   2652      1.1  dyoung 	case IEEE80211_MODE_TURBO:
   2653      1.1  dyoung 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO);
   2654      1.1  dyoung 		break;
   2655      1.1  dyoung 	default:
   2656      1.1  dyoung 		DPRINTF(("%s: invalid mode %u\n", __func__, mode));
   2657      1.1  dyoung 		return 0;
   2658      1.1  dyoung 	}
   2659      1.1  dyoung 	rt = sc->sc_rates[mode];
   2660      1.1  dyoung 	if (rt == NULL)
   2661      1.1  dyoung 		return 0;
   2662      1.1  dyoung 	if (rt->rateCount > IEEE80211_RATE_MAXSIZE) {
   2663      1.1  dyoung 		DPRINTF(("%s: rate table too small (%u > %u)\n",
   2664      1.1  dyoung 			__func__, rt->rateCount, IEEE80211_RATE_MAXSIZE));
   2665      1.1  dyoung 		maxrates = IEEE80211_RATE_MAXSIZE;
   2666      1.1  dyoung 	} else
   2667      1.1  dyoung 		maxrates = rt->rateCount;
   2668      1.1  dyoung 	rs = &ic->ic_sup_rates[mode];
   2669      1.1  dyoung 	for (i = 0; i < maxrates; i++)
   2670      1.1  dyoung 		rs->rs_rates[i] = rt->info[i].dot11Rate;
   2671      1.1  dyoung 	rs->rs_nrates = maxrates;
   2672      1.1  dyoung 	return 1;
   2673      1.1  dyoung }
   2674      1.1  dyoung 
   2675      1.1  dyoung static void
   2676      1.1  dyoung ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
   2677      1.1  dyoung {
   2678      1.1  dyoung 	const HAL_RATE_TABLE *rt;
   2679      1.1  dyoung 	int i;
   2680      1.1  dyoung 
   2681      1.1  dyoung 	memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
   2682      1.1  dyoung 	rt = sc->sc_rates[mode];
   2683      1.1  dyoung 	KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
   2684      1.1  dyoung 	for (i = 0; i < rt->rateCount; i++)
   2685      1.1  dyoung 		sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i;
   2686      1.1  dyoung 	memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
   2687      1.1  dyoung 	for (i = 0; i < 32; i++)
   2688      1.1  dyoung 		sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate;
   2689      1.1  dyoung 	sc->sc_currates = rt;
   2690      1.1  dyoung 	sc->sc_curmode = mode;
   2691      1.1  dyoung }
   2692      1.1  dyoung 
   2693      1.1  dyoung /*
   2694      1.1  dyoung  * Reset the rate control state for each 802.11 state transition.
   2695      1.1  dyoung  */
   2696      1.1  dyoung static void
   2697      1.1  dyoung ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state)
   2698      1.1  dyoung {
   2699      1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2700      1.1  dyoung 	struct ieee80211_node *ni;
   2701      1.1  dyoung 	struct ath_node *an;
   2702      1.1  dyoung 
   2703  1.1.1.2  dyoung 	if (ic->ic_opmode != IEEE80211_M_STA) {
   2704  1.1.1.2  dyoung 		/*
   2705  1.1.1.2  dyoung 		 * When operating as a station the node table holds
   2706  1.1.1.2  dyoung 		 * the AP's that were discovered during scanning.
   2707  1.1.1.2  dyoung 		 * For any other operating mode we want to reset the
   2708  1.1.1.2  dyoung 		 * tx rate state of each node.
   2709  1.1.1.2  dyoung 		 */
   2710      1.1  dyoung 		TAILQ_FOREACH(ni, &ic->ic_node, ni_list) {
   2711      1.1  dyoung 			ni->ni_txrate = 0;		/* use lowest rate */
   2712      1.1  dyoung 			an = (struct ath_node *) ni;
   2713      1.1  dyoung 			an->an_tx_ok = an->an_tx_err = an->an_tx_retr =
   2714      1.1  dyoung 			    an->an_tx_upper = 0;
   2715      1.1  dyoung 		}
   2716      1.1  dyoung 	}
   2717  1.1.1.2  dyoung 	/*
   2718  1.1.1.2  dyoung 	 * Reset local xmit state; this is really only meaningful
   2719  1.1.1.2  dyoung 	 * when operating in station or adhoc mode.
   2720  1.1.1.2  dyoung 	 */
   2721  1.1.1.2  dyoung 	ni = ic->ic_bss;
   2722  1.1.1.2  dyoung 	an = (struct ath_node *) ni;
   2723  1.1.1.2  dyoung 	an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0;
   2724  1.1.1.2  dyoung 	if (state == IEEE80211_S_RUN) {
   2725  1.1.1.2  dyoung 		/* start with highest negotiated rate */
   2726  1.1.1.2  dyoung 		KASSERT(ni->ni_rates.rs_nrates > 0,
   2727  1.1.1.2  dyoung 			("transition to RUN state w/ no rates!"));
   2728  1.1.1.2  dyoung 		ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
   2729  1.1.1.2  dyoung 	} else {
   2730  1.1.1.2  dyoung 		/* use lowest rate */
   2731  1.1.1.2  dyoung 		ni->ni_txrate = 0;
   2732  1.1.1.2  dyoung 	}
   2733      1.1  dyoung }
   2734      1.1  dyoung 
   2735      1.1  dyoung /*
   2736      1.1  dyoung  * Examine and potentially adjust the transmit rate.
   2737      1.1  dyoung  */
   2738      1.1  dyoung static void
   2739      1.1  dyoung ath_rate_ctl(void *arg, struct ieee80211_node *ni)
   2740      1.1  dyoung {
   2741      1.1  dyoung 	struct ath_softc *sc = arg;
   2742      1.1  dyoung 	struct ath_node *an = (struct ath_node *) ni;
   2743      1.1  dyoung 	struct ieee80211_rateset *rs = &ni->ni_rates;
   2744      1.1  dyoung 	int mod = 0, orate, enough;
   2745      1.1  dyoung 
   2746      1.1  dyoung 	/*
   2747      1.1  dyoung 	 * Rate control
   2748      1.1  dyoung 	 * XXX: very primitive version.
   2749      1.1  dyoung 	 */
   2750      1.1  dyoung 	sc->sc_stats.ast_rate_calls++;
   2751      1.1  dyoung 
   2752      1.1  dyoung 	enough = (an->an_tx_ok + an->an_tx_err >= 10);
   2753      1.1  dyoung 
   2754      1.1  dyoung 	/* no packet reached -> down */
   2755      1.1  dyoung 	if (an->an_tx_err > 0 && an->an_tx_ok == 0)
   2756      1.1  dyoung 		mod = -1;
   2757      1.1  dyoung 
   2758      1.1  dyoung 	/* all packets needs retry in average -> down */
   2759      1.1  dyoung 	if (enough && an->an_tx_ok < an->an_tx_retr)
   2760      1.1  dyoung 		mod = -1;
   2761      1.1  dyoung 
   2762      1.1  dyoung 	/* no error and less than 10% of packets needs retry -> up */
   2763      1.1  dyoung 	if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10)
   2764      1.1  dyoung 		mod = 1;
   2765      1.1  dyoung 
   2766      1.1  dyoung 	orate = ni->ni_txrate;
   2767      1.1  dyoung 	switch (mod) {
   2768      1.1  dyoung 	case 0:
   2769      1.1  dyoung 		if (enough && an->an_tx_upper > 0)
   2770      1.1  dyoung 			an->an_tx_upper--;
   2771      1.1  dyoung 		break;
   2772      1.1  dyoung 	case -1:
   2773      1.1  dyoung 		if (ni->ni_txrate > 0) {
   2774      1.1  dyoung 			ni->ni_txrate--;
   2775      1.1  dyoung 			sc->sc_stats.ast_rate_drop++;
   2776      1.1  dyoung 		}
   2777      1.1  dyoung 		an->an_tx_upper = 0;
   2778      1.1  dyoung 		break;
   2779      1.1  dyoung 	case 1:
   2780      1.1  dyoung 		if (++an->an_tx_upper < 2)
   2781      1.1  dyoung 			break;
   2782      1.1  dyoung 		an->an_tx_upper = 0;
   2783      1.1  dyoung 		if (ni->ni_txrate + 1 < rs->rs_nrates) {
   2784      1.1  dyoung 			ni->ni_txrate++;
   2785      1.1  dyoung 			sc->sc_stats.ast_rate_raise++;
   2786      1.1  dyoung 		}
   2787      1.1  dyoung 		break;
   2788      1.1  dyoung 	}
   2789      1.1  dyoung 
   2790      1.1  dyoung 	if (ni->ni_txrate != orate) {
   2791  1.1.1.2  dyoung 		DPRINTF(("%s: %dM -> %dM (%d ok, %d err, %d retr)\n",
   2792      1.1  dyoung 		    __func__,
   2793      1.1  dyoung 		    (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2,
   2794      1.1  dyoung 		    (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2,
   2795  1.1.1.2  dyoung 		    an->an_tx_ok, an->an_tx_err, an->an_tx_retr));
   2796      1.1  dyoung 	}
   2797      1.1  dyoung 	if (ni->ni_txrate != orate || enough)
   2798      1.1  dyoung 		an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0;
   2799      1.1  dyoung }
   2800      1.1  dyoung 
   2801      1.1  dyoung #ifdef AR_DEBUG
   2802      1.1  dyoung static int
   2803      1.1  dyoung sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
   2804      1.1  dyoung {
   2805      1.1  dyoung 	char dmode[64];
   2806      1.1  dyoung 	int error;
   2807      1.1  dyoung 
   2808      1.1  dyoung 	strncpy(dmode, "", sizeof(dmode) - 1);
   2809      1.1  dyoung 	dmode[sizeof(dmode) - 1] = '\0';
   2810      1.1  dyoung 	error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
   2811      1.1  dyoung 
   2812      1.1  dyoung 	if (error == 0 && req->newptr != NULL) {
   2813      1.1  dyoung 		struct ifnet *ifp;
   2814      1.1  dyoung 		struct ath_softc *sc;
   2815      1.1  dyoung 
   2816      1.1  dyoung 		ifp = ifunit("ath0");		/* XXX */
   2817      1.1  dyoung 		if (!ifp)
   2818      1.1  dyoung 			return EINVAL;
   2819      1.1  dyoung 		sc = ifp->if_softc;
   2820      1.1  dyoung 		if (strcmp(dmode, "hal") == 0)
   2821      1.1  dyoung 			ath_hal_dumpstate(sc->sc_ah);
   2822      1.1  dyoung 		else
   2823      1.1  dyoung 			return EINVAL;
   2824      1.1  dyoung 	}
   2825      1.1  dyoung 	return error;
   2826      1.1  dyoung }
   2827      1.1  dyoung SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
   2828      1.1  dyoung 	0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
   2829      1.1  dyoung 
   2830      1.1  dyoung static void
   2831      1.1  dyoung ath_printrxbuf(struct ath_buf *bf, int done)
   2832      1.1  dyoung {
   2833      1.1  dyoung 	struct ath_desc *ds;
   2834      1.1  dyoung 	int i;
   2835      1.1  dyoung 
   2836      1.1  dyoung 	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
   2837      1.1  dyoung 		printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n",
   2838      1.1  dyoung 		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
   2839      1.1  dyoung 		    ds->ds_link, ds->ds_data,
   2840      1.1  dyoung 		    ds->ds_ctl0, ds->ds_ctl1,
   2841      1.1  dyoung 		    ds->ds_hw[0], ds->ds_hw[1],
   2842      1.1  dyoung 		    !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!');
   2843      1.1  dyoung 	}
   2844      1.1  dyoung }
   2845      1.1  dyoung 
   2846      1.1  dyoung static void
   2847      1.1  dyoung ath_printtxbuf(struct ath_buf *bf, int done)
   2848      1.1  dyoung {
   2849      1.1  dyoung 	struct ath_desc *ds;
   2850      1.1  dyoung 	int i;
   2851      1.1  dyoung 
   2852      1.1  dyoung 	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
   2853      1.1  dyoung 		printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n",
   2854      1.1  dyoung 		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
   2855      1.1  dyoung 		    ds->ds_link, ds->ds_data,
   2856      1.1  dyoung 		    ds->ds_ctl0, ds->ds_ctl1,
   2857      1.1  dyoung 		    ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3],
   2858      1.1  dyoung 		    !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!');
   2859      1.1  dyoung 	}
   2860      1.1  dyoung }
   2861      1.1  dyoung #endif /* AR_DEBUG */
   2862