ath.c revision 1.2 1 1.1 dyoung /*-
2 1.1 dyoung * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting
3 1.1 dyoung * All rights reserved.
4 1.1 dyoung *
5 1.1 dyoung * Redistribution and use in source and binary forms, with or without
6 1.1 dyoung * modification, are permitted provided that the following conditions
7 1.1 dyoung * are met:
8 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
9 1.1 dyoung * notice, this list of conditions and the following disclaimer,
10 1.1 dyoung * without modification.
11 1.1 dyoung * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 1.1 dyoung * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 1.1 dyoung * redistribution must be conditioned upon including a substantially
14 1.1 dyoung * similar Disclaimer requirement for further binary redistribution.
15 1.1 dyoung * 3. Neither the names of the above-listed copyright holders nor the names
16 1.1 dyoung * of any contributors may be used to endorse or promote products derived
17 1.1 dyoung * from this software without specific prior written permission.
18 1.1 dyoung *
19 1.1 dyoung * Alternatively, this software may be distributed under the terms of the
20 1.1 dyoung * GNU General Public License ("GPL") version 2 as published by the Free
21 1.1 dyoung * Software Foundation.
22 1.1 dyoung *
23 1.1 dyoung * NO WARRANTY
24 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 1.1 dyoung * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 1.1 dyoung * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
27 1.1 dyoung * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
28 1.1 dyoung * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
29 1.1 dyoung * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 1.1 dyoung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 1.1 dyoung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 1.1 dyoung * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 1.1 dyoung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 1.1 dyoung * THE POSSIBILITY OF SUCH DAMAGES.
35 1.1 dyoung */
36 1.1 dyoung
37 1.1 dyoung #include <sys/cdefs.h>
38 1.2 dyoung #ifdef __FreeBSD__
39 1.1 dyoung __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.14 2003/09/05 22:22:49 sam Exp $");
40 1.2 dyoung #endif
41 1.2 dyoung #ifdef __NetBSD__
42 1.2 dyoung __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.2 2003/10/13 05:34:30 dyoung Exp $");
43 1.2 dyoung #endif
44 1.1 dyoung
45 1.1 dyoung /*
46 1.1 dyoung * Driver for the Atheros Wireless LAN controller.
47 1.1 dyoung *
48 1.1 dyoung * This software is derived from work of Atsushi Onoe; his contribution
49 1.1 dyoung * is greatly appreciated.
50 1.1 dyoung */
51 1.1 dyoung
52 1.1 dyoung #include "opt_inet.h"
53 1.1 dyoung
54 1.2 dyoung #ifdef __NetBSD__
55 1.2 dyoung #include "bpfilter.h"
56 1.2 dyoung #endif /* __NetBSD__ */
57 1.2 dyoung
58 1.1 dyoung #include <sys/param.h>
59 1.1 dyoung #include <sys/systm.h>
60 1.2 dyoung #include <sys/types.h>
61 1.1 dyoung #include <sys/sysctl.h>
62 1.1 dyoung #include <sys/mbuf.h>
63 1.1 dyoung #include <sys/malloc.h>
64 1.1 dyoung #include <sys/lock.h>
65 1.2 dyoung #ifdef __FreeBSD__
66 1.1 dyoung #include <sys/mutex.h>
67 1.2 dyoung #endif
68 1.1 dyoung #include <sys/kernel.h>
69 1.1 dyoung #include <sys/socket.h>
70 1.1 dyoung #include <sys/sockio.h>
71 1.1 dyoung #include <sys/errno.h>
72 1.1 dyoung #include <sys/callout.h>
73 1.2 dyoung #ifdef __FreeBSD__
74 1.1 dyoung #include <sys/bus.h>
75 1.2 dyoung #else
76 1.2 dyoung #include <machine/bus.h>
77 1.2 dyoung #endif
78 1.1 dyoung #include <sys/endian.h>
79 1.1 dyoung
80 1.1 dyoung #include <machine/bus.h>
81 1.1 dyoung
82 1.1 dyoung #include <net/if.h>
83 1.1 dyoung #include <net/if_dl.h>
84 1.1 dyoung #include <net/if_media.h>
85 1.1 dyoung #include <net/if_arp.h>
86 1.2 dyoung #ifdef __FreeBSD__
87 1.1 dyoung #include <net/ethernet.h>
88 1.2 dyoung #else
89 1.2 dyoung #include <net/if_ether.h>
90 1.2 dyoung #endif
91 1.1 dyoung #include <net/if_llc.h>
92 1.1 dyoung
93 1.1 dyoung #include <net80211/ieee80211_var.h>
94 1.2 dyoung #include <net80211/ieee80211_compat.h>
95 1.1 dyoung
96 1.2 dyoung #if NBPFILTER > 0
97 1.1 dyoung #include <net/bpf.h>
98 1.2 dyoung #endif
99 1.1 dyoung
100 1.1 dyoung #ifdef INET
101 1.1 dyoung #include <netinet/in.h>
102 1.1 dyoung #endif
103 1.1 dyoung
104 1.2 dyoung #include <dev/ic/athcompat.h>
105 1.2 dyoung
106 1.1 dyoung #define AR_DEBUG
107 1.2 dyoung #ifdef __FreeBSD__
108 1.1 dyoung #include <dev/ath/if_athvar.h>
109 1.1 dyoung #include <contrib/dev/ath/ah_desc.h>
110 1.2 dyoung #else
111 1.2 dyoung #include <dev/ic/athvar.h>
112 1.2 dyoung #include <../contrib/sys/dev/ic/athhal_desc.h>
113 1.2 dyoung #endif
114 1.1 dyoung
115 1.1 dyoung /* unalligned little endian access */
116 1.1 dyoung #define LE_READ_2(p) \
117 1.1 dyoung ((u_int16_t) \
118 1.1 dyoung ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8)))
119 1.1 dyoung #define LE_READ_4(p) \
120 1.1 dyoung ((u_int32_t) \
121 1.1 dyoung ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \
122 1.1 dyoung (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
123 1.1 dyoung
124 1.2 dyoung #ifdef __FreeBSD__
125 1.1 dyoung static void ath_init(void *);
126 1.2 dyoung #else
127 1.2 dyoung static int ath_init(struct ifnet *);
128 1.2 dyoung #endif
129 1.2 dyoung static int ath_init1(struct ath_softc *);
130 1.2 dyoung static int ath_intr1(struct ath_softc *);
131 1.1 dyoung static void ath_stop(struct ifnet *);
132 1.1 dyoung static void ath_start(struct ifnet *);
133 1.1 dyoung static void ath_reset(struct ath_softc *);
134 1.1 dyoung static int ath_media_change(struct ifnet *);
135 1.1 dyoung static void ath_watchdog(struct ifnet *);
136 1.1 dyoung static int ath_ioctl(struct ifnet *, u_long, caddr_t);
137 1.1 dyoung static void ath_fatal_proc(void *, int);
138 1.1 dyoung static void ath_rxorn_proc(void *, int);
139 1.1 dyoung static void ath_bmiss_proc(void *, int);
140 1.1 dyoung static void ath_initkeytable(struct ath_softc *);
141 1.1 dyoung static void ath_mode_init(struct ath_softc *);
142 1.1 dyoung static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
143 1.1 dyoung static void ath_beacon_proc(void *, int);
144 1.1 dyoung static void ath_beacon_free(struct ath_softc *);
145 1.1 dyoung static void ath_beacon_config(struct ath_softc *);
146 1.1 dyoung static int ath_desc_alloc(struct ath_softc *);
147 1.1 dyoung static void ath_desc_free(struct ath_softc *);
148 1.1 dyoung static struct ieee80211_node *ath_node_alloc(struct ieee80211com *);
149 1.1 dyoung static void ath_node_free(struct ieee80211com *, struct ieee80211_node *);
150 1.1 dyoung static void ath_node_copy(struct ieee80211com *,
151 1.1 dyoung struct ieee80211_node *, const struct ieee80211_node *);
152 1.1 dyoung static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
153 1.1 dyoung static void ath_rx_proc(void *, int);
154 1.1 dyoung static int ath_tx_start(struct ath_softc *, struct ieee80211_node *,
155 1.1 dyoung struct ath_buf *, struct mbuf *);
156 1.1 dyoung static void ath_tx_proc(void *, int);
157 1.1 dyoung static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
158 1.1 dyoung static void ath_draintxq(struct ath_softc *);
159 1.1 dyoung static void ath_stoprecv(struct ath_softc *);
160 1.1 dyoung static int ath_startrecv(struct ath_softc *);
161 1.1 dyoung static void ath_next_scan(void *);
162 1.1 dyoung static void ath_calibrate(void *);
163 1.1 dyoung static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int);
164 1.1 dyoung static void ath_newassoc(struct ieee80211com *,
165 1.1 dyoung struct ieee80211_node *, int);
166 1.1 dyoung static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor);
167 1.1 dyoung
168 1.1 dyoung static int ath_rate_setup(struct ath_softc *sc, u_int mode);
169 1.1 dyoung static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
170 1.1 dyoung static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state);
171 1.1 dyoung static void ath_rate_ctl(void *, struct ieee80211_node *);
172 1.1 dyoung
173 1.2 dyoung #ifdef __FreeBSD__
174 1.1 dyoung SYSCTL_DECL(_hw_ath);
175 1.1 dyoung /* XXX validate sysctl values */
176 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime,
177 1.1 dyoung 0, "channel dwell time (ms) for AP/station scanning");
178 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval,
179 1.1 dyoung 0, "chip calibration interval (secs)");
180 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor,
181 1.1 dyoung 0, "enable/disable outdoor operation");
182 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode,
183 1.1 dyoung 0, "country code");
184 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain,
185 1.1 dyoung 0, "regulatory domain");
186 1.2 dyoung #endif /* __FreeBSD__ */
187 1.2 dyoung
188 1.2 dyoung static int ath_dwelltime = 200; /* 5 channels/second */
189 1.2 dyoung static int ath_calinterval = 30; /* calibrate every 30 secs */
190 1.2 dyoung static int ath_outdoor = AH_TRUE; /* outdoor operation */
191 1.2 dyoung static int ath_countrycode = CTRY_DEFAULT; /* country code */
192 1.2 dyoung static int ath_regdomain = 0; /* regulatory domain */
193 1.1 dyoung
194 1.1 dyoung #ifdef AR_DEBUG
195 1.1 dyoung int ath_debug = 0;
196 1.2 dyoung #ifdef __FreeBSD__
197 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
198 1.1 dyoung 0, "control debugging printfs");
199 1.2 dyoung #endif /* __FreeBSD__ */
200 1.1 dyoung #define IFF_DUMPPKTS(_ifp) \
201 1.1 dyoung (ath_debug || \
202 1.1 dyoung ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
203 1.1 dyoung static void ath_printrxbuf(struct ath_buf *bf, int);
204 1.1 dyoung static void ath_printtxbuf(struct ath_buf *bf, int);
205 1.1 dyoung #define DPRINTF(X) if (ath_debug) printf X
206 1.1 dyoung #define DPRINTF2(X) if (ath_debug > 1) printf X
207 1.1 dyoung #else
208 1.1 dyoung #define IFF_DUMPPKTS(_ifp) \
209 1.1 dyoung (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
210 1.1 dyoung #define DPRINTF(X)
211 1.1 dyoung #define DPRINTF2(X)
212 1.1 dyoung #endif
213 1.1 dyoung
214 1.1 dyoung int
215 1.1 dyoung ath_attach(u_int16_t devid, struct ath_softc *sc)
216 1.1 dyoung {
217 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
218 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
219 1.1 dyoung struct ath_hal *ah;
220 1.1 dyoung HAL_STATUS status;
221 1.1 dyoung int error = 0;
222 1.1 dyoung
223 1.1 dyoung DPRINTF(("ath_attach: devid 0x%x\n", devid));
224 1.1 dyoung
225 1.2 dyoung #ifdef __FreeBSD__
226 1.1 dyoung /* set these up early for if_printf use */
227 1.1 dyoung ifp->if_unit = device_get_unit(sc->sc_dev);
228 1.1 dyoung ifp->if_name = "ath";
229 1.2 dyoung #else
230 1.2 dyoung memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
231 1.2 dyoung #endif
232 1.1 dyoung
233 1.1 dyoung ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
234 1.1 dyoung if (ah == NULL) {
235 1.1 dyoung if_printf(ifp, "unable to attach hardware; HAL status %u\n",
236 1.1 dyoung status);
237 1.1 dyoung error = ENXIO;
238 1.1 dyoung goto bad;
239 1.1 dyoung }
240 1.1 dyoung sc->sc_ah = ah;
241 1.1 dyoung sc->sc_invalid = 0; /* ready to go, enable interrupt handling */
242 1.1 dyoung
243 1.1 dyoung /*
244 1.1 dyoung * Collect the channel list using the default country
245 1.1 dyoung * code and including outdoor channels. The 802.11 layer
246 1.1 dyoung * is resposible for filtering this list based on settings
247 1.1 dyoung * like the phy mode.
248 1.1 dyoung */
249 1.1 dyoung error = ath_getchannels(sc, ath_countrycode, ath_outdoor);
250 1.1 dyoung if (error != 0)
251 1.1 dyoung goto bad;
252 1.1 dyoung /*
253 1.1 dyoung * Copy these back; they are set as a side effect
254 1.1 dyoung * of constructing the channel list.
255 1.1 dyoung */
256 1.1 dyoung ath_regdomain = ath_hal_getregdomain(ah);
257 1.1 dyoung ath_countrycode = ath_hal_getcountrycode(ah);
258 1.1 dyoung
259 1.1 dyoung /*
260 1.1 dyoung * Setup rate tables for all potential media types.
261 1.1 dyoung */
262 1.1 dyoung ath_rate_setup(sc, IEEE80211_MODE_11A);
263 1.1 dyoung ath_rate_setup(sc, IEEE80211_MODE_11B);
264 1.1 dyoung ath_rate_setup(sc, IEEE80211_MODE_11G);
265 1.1 dyoung ath_rate_setup(sc, IEEE80211_MODE_TURBO);
266 1.1 dyoung
267 1.1 dyoung error = ath_desc_alloc(sc);
268 1.1 dyoung if (error != 0) {
269 1.1 dyoung if_printf(ifp, "failed to allocate descriptors: %d\n", error);
270 1.1 dyoung goto bad;
271 1.1 dyoung }
272 1.2 dyoung ATH_CALLOUT_INIT(&sc->sc_scan_ch);
273 1.2 dyoung ATH_CALLOUT_INIT(&sc->sc_cal_ch);
274 1.1 dyoung
275 1.2 dyoung #ifdef __FreeBSD__
276 1.1 dyoung mtx_init(&sc->sc_txbuflock,
277 1.1 dyoung device_get_nameunit(sc->sc_dev), "xmit buf q", MTX_DEF);
278 1.1 dyoung mtx_init(&sc->sc_txqlock,
279 1.1 dyoung device_get_nameunit(sc->sc_dev), "xmit q", MTX_DEF);
280 1.2 dyoung #endif
281 1.1 dyoung
282 1.2 dyoung ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc);
283 1.2 dyoung ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc);
284 1.2 dyoung ATH_TASK_INIT(&sc->sc_swbatask, ath_beacon_proc, sc);
285 1.2 dyoung ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc);
286 1.2 dyoung ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc);
287 1.2 dyoung ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc);
288 1.1 dyoung
289 1.1 dyoung /*
290 1.1 dyoung * For now just pre-allocate one data queue and one
291 1.1 dyoung * beacon queue. Note that the HAL handles resetting
292 1.1 dyoung * them at the needed time. Eventually we'll want to
293 1.1 dyoung * allocate more tx queues for splitting management
294 1.1 dyoung * frames and for QOS support.
295 1.1 dyoung */
296 1.1 dyoung sc->sc_txhalq = ath_hal_setuptxqueue(ah,
297 1.1 dyoung HAL_TX_QUEUE_DATA,
298 1.1 dyoung AH_TRUE /* enable interrupts */
299 1.1 dyoung );
300 1.1 dyoung if (sc->sc_txhalq == (u_int) -1) {
301 1.1 dyoung if_printf(ifp, "unable to setup a data xmit queue!\n");
302 1.1 dyoung goto bad;
303 1.1 dyoung }
304 1.1 dyoung sc->sc_bhalq = ath_hal_setuptxqueue(ah,
305 1.1 dyoung HAL_TX_QUEUE_BEACON,
306 1.1 dyoung AH_TRUE /* enable interrupts */
307 1.1 dyoung );
308 1.1 dyoung if (sc->sc_bhalq == (u_int) -1) {
309 1.1 dyoung if_printf(ifp, "unable to setup a beacon xmit queue!\n");
310 1.1 dyoung goto bad;
311 1.1 dyoung }
312 1.1 dyoung
313 1.1 dyoung ifp->if_softc = sc;
314 1.1 dyoung ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
315 1.1 dyoung ifp->if_start = ath_start;
316 1.1 dyoung ifp->if_watchdog = ath_watchdog;
317 1.1 dyoung ifp->if_ioctl = ath_ioctl;
318 1.1 dyoung ifp->if_init = ath_init;
319 1.2 dyoung #ifdef __FreeBSD__
320 1.1 dyoung ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
321 1.2 dyoung #else
322 1.2 dyoung #if 0
323 1.2 dyoung ifp->if_stop = ath_stop; /* XXX */
324 1.2 dyoung #endif
325 1.2 dyoung IFQ_SET_READY(&ifp->if_snd);
326 1.2 dyoung #endif
327 1.1 dyoung
328 1.1 dyoung ic->ic_softc = sc;
329 1.1 dyoung ic->ic_newassoc = ath_newassoc;
330 1.1 dyoung /* XXX not right but it's not used anywhere important */
331 1.1 dyoung ic->ic_phytype = IEEE80211_T_OFDM;
332 1.1 dyoung ic->ic_opmode = IEEE80211_M_STA;
333 1.1 dyoung ic->ic_caps = IEEE80211_C_WEP | IEEE80211_C_IBSS | IEEE80211_C_HOSTAP
334 1.1 dyoung | IEEE80211_C_MONITOR;
335 1.1 dyoung /* NB: 11g support is identified when we fetch the channel set */
336 1.1 dyoung if (sc->sc_have11g)
337 1.1 dyoung ic->ic_caps |= IEEE80211_C_SHPREAMBLE;
338 1.1 dyoung
339 1.1 dyoung /* get mac address from hardware */
340 1.1 dyoung ath_hal_getmac(ah, ic->ic_myaddr);
341 1.1 dyoung
342 1.2 dyoung #ifdef __NetBSD__
343 1.2 dyoung if_attach(ifp);
344 1.2 dyoung #endif
345 1.1 dyoung /* call MI attach routine. */
346 1.1 dyoung ieee80211_ifattach(ifp);
347 1.1 dyoung /* override default methods */
348 1.1 dyoung ic->ic_node_alloc = ath_node_alloc;
349 1.1 dyoung ic->ic_node_free = ath_node_free;
350 1.1 dyoung ic->ic_node_copy = ath_node_copy;
351 1.1 dyoung sc->sc_newstate = ic->ic_newstate;
352 1.1 dyoung ic->ic_newstate = ath_newstate;
353 1.1 dyoung /* complete initialization */
354 1.1 dyoung ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status);
355 1.1 dyoung
356 1.2 dyoung #if NBPFILTER > 0
357 1.1 dyoung bpfattach2(ifp, DLT_IEEE802_11_RADIO,
358 1.1 dyoung sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
359 1.1 dyoung &sc->sc_drvbpf);
360 1.2 dyoung #endif
361 1.1 dyoung /*
362 1.1 dyoung * Initialize constant fields.
363 1.1 dyoung *
364 1.1 dyoung * NB: the channel is setup each time we transition to the
365 1.1 dyoung * RUN state to avoid filling it in for each frame.
366 1.1 dyoung */
367 1.1 dyoung sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th);
368 1.1 dyoung sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT;
369 1.1 dyoung
370 1.1 dyoung sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th);
371 1.1 dyoung sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT;
372 1.1 dyoung
373 1.1 dyoung if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr));
374 1.1 dyoung
375 1.1 dyoung return 0;
376 1.1 dyoung bad:
377 1.1 dyoung if (ah)
378 1.1 dyoung ath_hal_detach(ah);
379 1.1 dyoung sc->sc_invalid = 1;
380 1.1 dyoung return error;
381 1.1 dyoung }
382 1.1 dyoung
383 1.1 dyoung int
384 1.1 dyoung ath_detach(struct ath_softc *sc)
385 1.1 dyoung {
386 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
387 1.2 dyoung ath_softc_critsect_decl(s);
388 1.1 dyoung
389 1.1 dyoung DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags));
390 1.1 dyoung
391 1.2 dyoung ath_softc_critsect_begin(sc, s);
392 1.1 dyoung ath_stop(ifp);
393 1.2 dyoung #if NBPFILTER > 0
394 1.1 dyoung bpfdetach(ifp);
395 1.2 dyoung #endif
396 1.1 dyoung ath_desc_free(sc);
397 1.1 dyoung ath_hal_detach(sc->sc_ah);
398 1.1 dyoung ieee80211_ifdetach(ifp);
399 1.2 dyoung #ifdef __NetBSD__
400 1.2 dyoung if_detach(ifp);
401 1.2 dyoung #endif
402 1.2 dyoung ath_softc_critsect_end(sc, s);
403 1.1 dyoung return 0;
404 1.1 dyoung }
405 1.1 dyoung
406 1.1 dyoung void
407 1.1 dyoung ath_suspend(struct ath_softc *sc)
408 1.1 dyoung {
409 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
410 1.1 dyoung
411 1.1 dyoung DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags));
412 1.1 dyoung
413 1.1 dyoung ath_stop(ifp);
414 1.1 dyoung }
415 1.1 dyoung
416 1.1 dyoung void
417 1.1 dyoung ath_resume(struct ath_softc *sc)
418 1.1 dyoung {
419 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
420 1.1 dyoung
421 1.1 dyoung DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags));
422 1.1 dyoung
423 1.1 dyoung if (ifp->if_flags & IFF_UP) {
424 1.1 dyoung ath_init(ifp);
425 1.1 dyoung if (ifp->if_flags & IFF_RUNNING)
426 1.1 dyoung ath_start(ifp);
427 1.1 dyoung }
428 1.1 dyoung }
429 1.1 dyoung
430 1.1 dyoung void
431 1.1 dyoung ath_shutdown(struct ath_softc *sc)
432 1.1 dyoung {
433 1.2 dyoung #if 1
434 1.2 dyoung return;
435 1.2 dyoung #else
436 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
437 1.1 dyoung
438 1.1 dyoung DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags));
439 1.1 dyoung
440 1.1 dyoung ath_stop(ifp);
441 1.2 dyoung #endif
442 1.1 dyoung }
443 1.1 dyoung
444 1.2 dyoung #ifdef __NetBSD__
445 1.2 dyoung int
446 1.2 dyoung ath_intr(void *arg)
447 1.2 dyoung {
448 1.2 dyoung return ath_intr1((struct ath_softc *)arg);
449 1.2 dyoung }
450 1.2 dyoung #else
451 1.1 dyoung void
452 1.1 dyoung ath_intr(void *arg)
453 1.1 dyoung {
454 1.2 dyoung (void)ath_intr1((struct ath_softc *)arg);
455 1.2 dyoung }
456 1.2 dyoung #endif
457 1.2 dyoung
458 1.2 dyoung static int
459 1.2 dyoung ath_intr1(struct ath_softc *sc)
460 1.2 dyoung {
461 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
462 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
463 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
464 1.1 dyoung HAL_INT status;
465 1.1 dyoung
466 1.1 dyoung if (sc->sc_invalid) {
467 1.1 dyoung /*
468 1.1 dyoung * The hardware is not ready/present, don't touch anything.
469 1.1 dyoung * Note this can happen early on if the IRQ is shared.
470 1.1 dyoung */
471 1.1 dyoung DPRINTF(("ath_intr: invalid; ignored\n"));
472 1.2 dyoung return 0;
473 1.1 dyoung }
474 1.1 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
475 1.1 dyoung DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags));
476 1.1 dyoung ath_hal_getisr(ah, &status); /* clear ISR */
477 1.1 dyoung ath_hal_intrset(ah, 0); /* disable further intr's */
478 1.2 dyoung return 1; /* XXX */
479 1.1 dyoung }
480 1.1 dyoung ath_hal_getisr(ah, &status); /* NB: clears ISR too */
481 1.1 dyoung DPRINTF2(("ath_intr: status 0x%x\n", status));
482 1.1 dyoung #ifdef AR_DEBUG
483 1.1 dyoung if (ath_debug &&
484 1.1 dyoung (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) {
485 1.1 dyoung if_printf(ifp, "ath_intr: status 0x%x\n", status);
486 1.1 dyoung ath_hal_dumpstate(ah);
487 1.1 dyoung }
488 1.1 dyoung #endif /* AR_DEBUG */
489 1.1 dyoung if (status & HAL_INT_FATAL) {
490 1.1 dyoung sc->sc_stats.ast_hardware++;
491 1.1 dyoung ath_hal_intrset(ah, 0); /* disable intr's until reset */
492 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask);
493 1.1 dyoung } else if (status & HAL_INT_RXORN) {
494 1.1 dyoung sc->sc_stats.ast_rxorn++;
495 1.1 dyoung ath_hal_intrset(ah, 0); /* disable intr's until reset */
496 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask);
497 1.1 dyoung } else {
498 1.1 dyoung if (status & HAL_INT_RXEOL) {
499 1.1 dyoung /*
500 1.1 dyoung * NB: the hardware should re-read the link when
501 1.1 dyoung * RXE bit is written, but it doesn't work at
502 1.1 dyoung * least on older hardware revs.
503 1.1 dyoung */
504 1.1 dyoung sc->sc_stats.ast_rxeol++;
505 1.1 dyoung sc->sc_rxlink = NULL;
506 1.1 dyoung }
507 1.1 dyoung if (status & HAL_INT_TXURN) {
508 1.1 dyoung sc->sc_stats.ast_txurn++;
509 1.1 dyoung /* bump tx trigger level */
510 1.1 dyoung ath_hal_updatetxtriglevel(ah, AH_TRUE);
511 1.1 dyoung }
512 1.1 dyoung if (status & HAL_INT_RX)
513 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask);
514 1.1 dyoung if (status & HAL_INT_TX)
515 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask);
516 1.1 dyoung if (status & HAL_INT_SWBA)
517 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_swbatask);
518 1.1 dyoung if (status & HAL_INT_BMISS) {
519 1.1 dyoung sc->sc_stats.ast_bmiss++;
520 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask);
521 1.1 dyoung }
522 1.1 dyoung }
523 1.2 dyoung return 1;
524 1.1 dyoung }
525 1.1 dyoung
526 1.1 dyoung static void
527 1.1 dyoung ath_fatal_proc(void *arg, int pending)
528 1.1 dyoung {
529 1.1 dyoung struct ath_softc *sc = arg;
530 1.1 dyoung
531 1.1 dyoung device_printf(sc->sc_dev, "hardware error; resetting\n");
532 1.1 dyoung ath_reset(sc);
533 1.1 dyoung }
534 1.1 dyoung
535 1.1 dyoung static void
536 1.1 dyoung ath_rxorn_proc(void *arg, int pending)
537 1.1 dyoung {
538 1.1 dyoung struct ath_softc *sc = arg;
539 1.1 dyoung
540 1.1 dyoung device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n");
541 1.1 dyoung ath_reset(sc);
542 1.1 dyoung }
543 1.1 dyoung
544 1.1 dyoung static void
545 1.1 dyoung ath_bmiss_proc(void *arg, int pending)
546 1.1 dyoung {
547 1.1 dyoung struct ath_softc *sc = arg;
548 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
549 1.1 dyoung
550 1.1 dyoung DPRINTF(("ath_bmiss_proc: pending %u\n", pending));
551 1.1 dyoung KASSERT(ic->ic_opmode == IEEE80211_M_STA,
552 1.1 dyoung ("unexpect operating mode %u", ic->ic_opmode));
553 1.1 dyoung if (ic->ic_state == IEEE80211_S_RUN)
554 1.1 dyoung ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
555 1.1 dyoung }
556 1.1 dyoung
557 1.1 dyoung static u_int
558 1.1 dyoung ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan)
559 1.1 dyoung {
560 1.1 dyoung static const u_int modeflags[] = {
561 1.1 dyoung 0, /* IEEE80211_MODE_AUTO */
562 1.1 dyoung CHANNEL_A, /* IEEE80211_MODE_11A */
563 1.1 dyoung CHANNEL_B, /* IEEE80211_MODE_11B */
564 1.1 dyoung CHANNEL_PUREG, /* IEEE80211_MODE_11G */
565 1.1 dyoung CHANNEL_T /* IEEE80211_MODE_TURBO */
566 1.1 dyoung };
567 1.1 dyoung return modeflags[ieee80211_chan2mode(ic, chan)];
568 1.1 dyoung }
569 1.1 dyoung
570 1.2 dyoung #ifdef __NetBSD__
571 1.2 dyoung static int
572 1.2 dyoung ath_init(struct ifnet *ifp)
573 1.2 dyoung {
574 1.2 dyoung return ath_init1((struct ath_softc *)ifp->if_softc);
575 1.2 dyoung }
576 1.2 dyoung #else
577 1.1 dyoung static void
578 1.1 dyoung ath_init(void *arg)
579 1.1 dyoung {
580 1.2 dyoung (void)ath_init1((struct ath_softc *)arg);
581 1.2 dyoung }
582 1.2 dyoung #endif
583 1.2 dyoung
584 1.2 dyoung static int
585 1.2 dyoung ath_init1(struct ath_softc *sc)
586 1.2 dyoung {
587 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
588 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
589 1.1 dyoung struct ieee80211_node *ni;
590 1.1 dyoung enum ieee80211_phymode mode;
591 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
592 1.1 dyoung HAL_STATUS status;
593 1.1 dyoung HAL_CHANNEL hchan;
594 1.2 dyoung int error = 0;
595 1.2 dyoung ath_softc_critsect_decl(s);
596 1.1 dyoung
597 1.1 dyoung DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags));
598 1.1 dyoung
599 1.2 dyoung ath_softc_critsect_begin(sc, s);
600 1.1 dyoung /*
601 1.1 dyoung * Stop anything previously setup. This is safe
602 1.1 dyoung * whether this is the first time through or not.
603 1.1 dyoung */
604 1.1 dyoung ath_stop(ifp);
605 1.1 dyoung
606 1.1 dyoung /*
607 1.1 dyoung * The basic interface to setting the hardware in a good
608 1.1 dyoung * state is ``reset''. On return the hardware is known to
609 1.1 dyoung * be powered up and with interrupts disabled. This must
610 1.1 dyoung * be followed by initialization of the appropriate bits
611 1.1 dyoung * and then setup of the interrupt mask.
612 1.1 dyoung */
613 1.1 dyoung hchan.channel = ic->ic_ibss_chan->ic_freq;
614 1.1 dyoung hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan);
615 1.1 dyoung if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) {
616 1.1 dyoung if_printf(ifp, "unable to reset hardware; hal status %u\n",
617 1.1 dyoung status);
618 1.2 dyoung error = -1;
619 1.1 dyoung goto done;
620 1.1 dyoung }
621 1.1 dyoung
622 1.1 dyoung /*
623 1.1 dyoung * Setup the hardware after reset: the key cache
624 1.1 dyoung * is filled as needed and the receive engine is
625 1.1 dyoung * set going. Frame transmit is handled entirely
626 1.1 dyoung * in the frame output path; there's nothing to do
627 1.1 dyoung * here except setup the interrupt mask.
628 1.1 dyoung */
629 1.1 dyoung if (ic->ic_flags & IEEE80211_F_WEPON)
630 1.1 dyoung ath_initkeytable(sc);
631 1.2 dyoung if ((error = ath_startrecv(sc)) != 0) {
632 1.1 dyoung if_printf(ifp, "unable to start recv logic\n");
633 1.1 dyoung goto done;
634 1.1 dyoung }
635 1.1 dyoung
636 1.1 dyoung /*
637 1.1 dyoung * Enable interrupts.
638 1.1 dyoung */
639 1.1 dyoung sc->sc_imask = HAL_INT_RX | HAL_INT_TX
640 1.1 dyoung | HAL_INT_RXEOL | HAL_INT_RXORN
641 1.1 dyoung | HAL_INT_FATAL | HAL_INT_GLOBAL;
642 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
643 1.1 dyoung
644 1.1 dyoung ifp->if_flags |= IFF_RUNNING;
645 1.1 dyoung ic->ic_state = IEEE80211_S_INIT;
646 1.1 dyoung
647 1.1 dyoung /*
648 1.1 dyoung * The hardware should be ready to go now so it's safe
649 1.1 dyoung * to kick the 802.11 state machine as it's likely to
650 1.1 dyoung * immediately call back to us to send mgmt frames.
651 1.1 dyoung */
652 1.1 dyoung ni = ic->ic_bss;
653 1.1 dyoung ni->ni_chan = ic->ic_ibss_chan;
654 1.1 dyoung mode = ieee80211_chan2mode(ic, ni->ni_chan);
655 1.1 dyoung if (mode != sc->sc_curmode)
656 1.1 dyoung ath_setcurmode(sc, mode);
657 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_MONITOR)
658 1.1 dyoung ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
659 1.1 dyoung else
660 1.1 dyoung ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
661 1.1 dyoung done:
662 1.2 dyoung ath_softc_critsect_end(sc, s);
663 1.2 dyoung return error;
664 1.1 dyoung }
665 1.1 dyoung
666 1.1 dyoung static void
667 1.1 dyoung ath_stop(struct ifnet *ifp)
668 1.1 dyoung {
669 1.1 dyoung struct ieee80211com *ic = (struct ieee80211com *) ifp;
670 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
671 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
672 1.2 dyoung ath_softc_critsect_decl(s);
673 1.1 dyoung
674 1.1 dyoung DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n",
675 1.1 dyoung sc->sc_invalid, ifp->if_flags));
676 1.1 dyoung
677 1.2 dyoung ath_softc_critsect_begin(sc, s);
678 1.1 dyoung if (ifp->if_flags & IFF_RUNNING) {
679 1.1 dyoung /*
680 1.1 dyoung * Shutdown the hardware and driver:
681 1.1 dyoung * disable interrupts
682 1.1 dyoung * turn off timers
683 1.1 dyoung * clear transmit machinery
684 1.1 dyoung * clear receive machinery
685 1.1 dyoung * drain and release tx queues
686 1.1 dyoung * reclaim beacon resources
687 1.1 dyoung * reset 802.11 state machine
688 1.1 dyoung * power down hardware
689 1.1 dyoung *
690 1.1 dyoung * Note that some of this work is not possible if the
691 1.1 dyoung * hardware is gone (invalid).
692 1.1 dyoung */
693 1.1 dyoung ifp->if_flags &= ~IFF_RUNNING;
694 1.1 dyoung ifp->if_timer = 0;
695 1.1 dyoung if (!sc->sc_invalid)
696 1.1 dyoung ath_hal_intrset(ah, 0);
697 1.1 dyoung ath_draintxq(sc);
698 1.1 dyoung if (!sc->sc_invalid)
699 1.1 dyoung ath_stoprecv(sc);
700 1.1 dyoung else
701 1.1 dyoung sc->sc_rxlink = NULL;
702 1.2 dyoung #ifdef __FreeBSD__
703 1.1 dyoung IF_DRAIN(&ifp->if_snd);
704 1.2 dyoung #else
705 1.2 dyoung IF_PURGE(&ifp->if_snd);
706 1.2 dyoung #endif
707 1.1 dyoung ath_beacon_free(sc);
708 1.1 dyoung ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
709 1.1 dyoung if (!sc->sc_invalid)
710 1.1 dyoung ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0);
711 1.1 dyoung }
712 1.2 dyoung ath_softc_critsect_end(sc, s);
713 1.1 dyoung }
714 1.1 dyoung
715 1.1 dyoung /*
716 1.1 dyoung * Reset the hardware w/o losing operational state. This is
717 1.1 dyoung * basically a more efficient way of doing ath_stop, ath_init,
718 1.1 dyoung * followed by state transitions to the current 802.11
719 1.1 dyoung * operational state. Used to recover from errors rx overrun
720 1.1 dyoung * and to reset the hardware when rf gain settings must be reset.
721 1.1 dyoung */
722 1.1 dyoung static void
723 1.1 dyoung ath_reset(struct ath_softc *sc)
724 1.1 dyoung {
725 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
726 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
727 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
728 1.1 dyoung struct ieee80211_channel *c;
729 1.1 dyoung HAL_STATUS status;
730 1.1 dyoung HAL_CHANNEL hchan;
731 1.1 dyoung
732 1.1 dyoung /*
733 1.1 dyoung * Convert to a HAL channel description with the flags
734 1.1 dyoung * constrained to reflect the current operating mode.
735 1.1 dyoung */
736 1.1 dyoung c = ic->ic_ibss_chan;
737 1.1 dyoung hchan.channel = c->ic_freq;
738 1.1 dyoung hchan.channelFlags = ath_chan2flags(ic, c);
739 1.1 dyoung
740 1.1 dyoung ath_hal_intrset(ah, 0); /* disable interrupts */
741 1.1 dyoung ath_draintxq(sc); /* stop xmit side */
742 1.1 dyoung ath_stoprecv(sc); /* stop recv side */
743 1.1 dyoung /* NB: indicate channel change so we do a full reset */
744 1.1 dyoung if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status))
745 1.1 dyoung if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
746 1.1 dyoung __func__, status);
747 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
748 1.1 dyoung if (ath_startrecv(sc) != 0) /* restart recv */
749 1.1 dyoung if_printf(ifp, "%s: unable to start recv logic\n", __func__);
750 1.1 dyoung ath_start(ifp); /* restart xmit */
751 1.1 dyoung if (ic->ic_state == IEEE80211_S_RUN)
752 1.1 dyoung ath_beacon_config(sc); /* restart beacons */
753 1.1 dyoung }
754 1.1 dyoung
755 1.1 dyoung static void
756 1.1 dyoung ath_start(struct ifnet *ifp)
757 1.1 dyoung {
758 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
759 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
760 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
761 1.1 dyoung struct ieee80211_node *ni;
762 1.1 dyoung struct ath_buf *bf;
763 1.1 dyoung struct mbuf *m;
764 1.1 dyoung struct ieee80211_frame *wh;
765 1.2 dyoung ath_txbuf_critsect_decl(s);
766 1.1 dyoung
767 1.1 dyoung if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
768 1.1 dyoung return;
769 1.1 dyoung for (;;) {
770 1.1 dyoung /*
771 1.1 dyoung * Grab a TX buffer and associated resources.
772 1.1 dyoung */
773 1.2 dyoung ath_txbuf_critsect_begin(sc, s);
774 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_txbuf);
775 1.1 dyoung if (bf != NULL)
776 1.1 dyoung TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
777 1.2 dyoung ath_txbuf_critsect_end(sc, s);
778 1.1 dyoung if (bf == NULL) {
779 1.1 dyoung DPRINTF(("ath_start: out of xmit buffers\n"));
780 1.1 dyoung sc->sc_stats.ast_tx_qstop++;
781 1.1 dyoung ifp->if_flags |= IFF_OACTIVE;
782 1.1 dyoung break;
783 1.1 dyoung }
784 1.1 dyoung /*
785 1.1 dyoung * Poll the management queue for frames; they
786 1.1 dyoung * have priority over normal data frames.
787 1.1 dyoung */
788 1.1 dyoung IF_DEQUEUE(&ic->ic_mgtq, m);
789 1.1 dyoung if (m == NULL) {
790 1.1 dyoung /*
791 1.1 dyoung * No data frames go out unless we're associated.
792 1.1 dyoung */
793 1.1 dyoung if (ic->ic_state != IEEE80211_S_RUN) {
794 1.1 dyoung DPRINTF(("ath_start: ignore data packet, "
795 1.1 dyoung "state %u\n", ic->ic_state));
796 1.1 dyoung sc->sc_stats.ast_tx_discard++;
797 1.2 dyoung ath_txbuf_critsect_begin(sc, s);
798 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
799 1.2 dyoung ath_txbuf_critsect_end(sc, s);
800 1.1 dyoung break;
801 1.1 dyoung }
802 1.1 dyoung IF_DEQUEUE(&ifp->if_snd, m);
803 1.1 dyoung if (m == NULL) {
804 1.2 dyoung ath_txbuf_critsect_begin(sc, s);
805 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
806 1.2 dyoung ath_txbuf_critsect_end(sc, s);
807 1.1 dyoung break;
808 1.1 dyoung }
809 1.1 dyoung ifp->if_opackets++;
810 1.2 dyoung
811 1.2 dyoung #ifdef __NetBSD__
812 1.2 dyoung #if NBPFILTER > 0
813 1.2 dyoung if (ifp->if_bpf)
814 1.2 dyoung bpf_mtap(ifp->if_bpf, m);
815 1.2 dyoung #endif
816 1.2 dyoung #endif
817 1.2 dyoung #ifdef __FreeBSD__
818 1.1 dyoung BPF_MTAP(ifp, m);
819 1.2 dyoung #endif
820 1.1 dyoung /*
821 1.1 dyoung * Encapsulate the packet in prep for transmission.
822 1.1 dyoung */
823 1.1 dyoung m = ieee80211_encap(ifp, m, &ni);
824 1.1 dyoung if (m == NULL) {
825 1.1 dyoung DPRINTF(("ath_start: encapsulation failure\n"));
826 1.1 dyoung sc->sc_stats.ast_tx_encap++;
827 1.1 dyoung goto bad;
828 1.1 dyoung }
829 1.1 dyoung wh = mtod(m, struct ieee80211_frame *);
830 1.1 dyoung if (ic->ic_flags & IEEE80211_F_WEPON)
831 1.1 dyoung wh->i_fc[1] |= IEEE80211_FC1_WEP;
832 1.1 dyoung } else {
833 1.1 dyoung /*
834 1.1 dyoung * Hack! The referenced node pointer is in the
835 1.1 dyoung * rcvif field of the packet header. This is
836 1.1 dyoung * placed there by ieee80211_mgmt_output because
837 1.1 dyoung * we need to hold the reference with the frame
838 1.1 dyoung * and there's no other way (other than packet
839 1.1 dyoung * tags which we consider too expensive to use)
840 1.1 dyoung * to pass it along.
841 1.1 dyoung */
842 1.1 dyoung ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
843 1.1 dyoung m->m_pkthdr.rcvif = NULL;
844 1.1 dyoung
845 1.1 dyoung wh = mtod(m, struct ieee80211_frame *);
846 1.1 dyoung if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
847 1.1 dyoung IEEE80211_FC0_SUBTYPE_PROBE_RESP) {
848 1.1 dyoung /* fill time stamp */
849 1.1 dyoung u_int64_t tsf;
850 1.1 dyoung u_int32_t *tstamp;
851 1.1 dyoung
852 1.1 dyoung tsf = ath_hal_gettsf64(ah);
853 1.1 dyoung /* XXX: adjust 100us delay to xmit */
854 1.1 dyoung tsf += 100;
855 1.1 dyoung tstamp = (u_int32_t *)&wh[1];
856 1.1 dyoung tstamp[0] = htole32(tsf & 0xffffffff);
857 1.1 dyoung tstamp[1] = htole32(tsf >> 32);
858 1.1 dyoung }
859 1.1 dyoung sc->sc_stats.ast_tx_mgmt++;
860 1.1 dyoung }
861 1.2 dyoung #if NBPFILTER > 0
862 1.1 dyoung if (ic->ic_rawbpf)
863 1.1 dyoung bpf_mtap(ic->ic_rawbpf, m);
864 1.2 dyoung #endif
865 1.1 dyoung
866 1.2 dyoung #if NBPFILTER > 0
867 1.1 dyoung if (sc->sc_drvbpf) {
868 1.2 dyoung #ifdef __FreeBSD__
869 1.1 dyoung struct mbuf *mb;
870 1.1 dyoung
871 1.1 dyoung MGETHDR(mb, M_DONTWAIT, m->m_type);
872 1.1 dyoung if (mb != NULL) {
873 1.1 dyoung sc->sc_tx_th.wt_rate =
874 1.1 dyoung ni->ni_rates.rs_rates[ni->ni_txrate];
875 1.1 dyoung
876 1.1 dyoung mb->m_next = m;
877 1.1 dyoung mb->m_data = (caddr_t)&sc->sc_tx_th;
878 1.1 dyoung mb->m_len = sizeof(sc->sc_tx_th);
879 1.1 dyoung mb->m_pkthdr.len += mb->m_len;
880 1.1 dyoung bpf_mtap(sc->sc_drvbpf, mb);
881 1.1 dyoung m_free(mb);
882 1.1 dyoung }
883 1.2 dyoung #else
884 1.2 dyoung struct mbuf mb;
885 1.2 dyoung
886 1.2 dyoung M_COPY_PKTHDR(&mb, m);
887 1.2 dyoung sc->sc_tx_th.wt_rate =
888 1.2 dyoung ni->ni_rates.rs_rates[ni->ni_txrate];
889 1.2 dyoung
890 1.2 dyoung mb.m_next = m;
891 1.2 dyoung mb.m_data = (caddr_t)&sc->sc_tx_th;
892 1.2 dyoung mb.m_len = sizeof(sc->sc_tx_th);
893 1.2 dyoung mb.m_pkthdr.len += mb.m_len;
894 1.2 dyoung bpf_mtap(sc->sc_drvbpf, &mb);
895 1.2 dyoung #endif
896 1.1 dyoung }
897 1.2 dyoung #endif
898 1.1 dyoung
899 1.1 dyoung /*
900 1.1 dyoung * TODO:
901 1.1 dyoung * The duration field of 802.11 header should be filled.
902 1.1 dyoung * XXX This may be done in the ieee80211 layer, but the upper
903 1.1 dyoung * doesn't know the detail of parameters such as IFS
904 1.1 dyoung * for now..
905 1.1 dyoung */
906 1.1 dyoung if (ath_tx_start(sc, ni, bf, m)) {
907 1.1 dyoung bad:
908 1.2 dyoung ath_txbuf_critsect_begin(sc, s);
909 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
910 1.2 dyoung ath_txbuf_critsect_end(sc, s);
911 1.1 dyoung ifp->if_oerrors++;
912 1.1 dyoung if (ni && ni != ic->ic_bss)
913 1.1 dyoung ieee80211_free_node(ic, ni);
914 1.1 dyoung continue;
915 1.1 dyoung }
916 1.1 dyoung
917 1.1 dyoung sc->sc_tx_timer = 5;
918 1.1 dyoung ifp->if_timer = 1;
919 1.1 dyoung }
920 1.1 dyoung }
921 1.1 dyoung
922 1.1 dyoung static int
923 1.1 dyoung ath_media_change(struct ifnet *ifp)
924 1.1 dyoung {
925 1.1 dyoung int error;
926 1.1 dyoung
927 1.1 dyoung error = ieee80211_media_change(ifp);
928 1.1 dyoung if (error == ENETRESET) {
929 1.1 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
930 1.1 dyoung (IFF_RUNNING|IFF_UP))
931 1.1 dyoung ath_init(ifp); /* XXX lose error */
932 1.1 dyoung error = 0;
933 1.1 dyoung }
934 1.1 dyoung return error;
935 1.1 dyoung }
936 1.1 dyoung
937 1.1 dyoung static void
938 1.1 dyoung ath_watchdog(struct ifnet *ifp)
939 1.1 dyoung {
940 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
941 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
942 1.1 dyoung
943 1.1 dyoung ifp->if_timer = 0;
944 1.1 dyoung if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
945 1.1 dyoung return;
946 1.1 dyoung if (sc->sc_tx_timer) {
947 1.1 dyoung if (--sc->sc_tx_timer == 0) {
948 1.1 dyoung if_printf(ifp, "device timeout\n");
949 1.1 dyoung #ifdef AR_DEBUG
950 1.1 dyoung if (ath_debug)
951 1.1 dyoung ath_hal_dumpstate(sc->sc_ah);
952 1.1 dyoung #endif /* AR_DEBUG */
953 1.1 dyoung ath_init(ifp); /* XXX ath_reset??? */
954 1.1 dyoung ifp->if_oerrors++;
955 1.1 dyoung sc->sc_stats.ast_watchdog++;
956 1.1 dyoung return;
957 1.1 dyoung }
958 1.1 dyoung ifp->if_timer = 1;
959 1.1 dyoung }
960 1.1 dyoung if (ic->ic_fixed_rate == -1) {
961 1.1 dyoung /*
962 1.1 dyoung * Run the rate control algorithm if we're not
963 1.1 dyoung * locked at a fixed rate.
964 1.1 dyoung */
965 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_STA)
966 1.1 dyoung ath_rate_ctl(sc, ic->ic_bss);
967 1.1 dyoung else
968 1.1 dyoung ieee80211_iterate_nodes(ic, ath_rate_ctl, sc);
969 1.1 dyoung }
970 1.1 dyoung ieee80211_watchdog(ifp);
971 1.1 dyoung }
972 1.1 dyoung
973 1.1 dyoung static int
974 1.1 dyoung ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
975 1.1 dyoung {
976 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
977 1.1 dyoung struct ifreq *ifr = (struct ifreq *)data;
978 1.1 dyoung int error = 0;
979 1.2 dyoung ath_softc_critsect_decl(s);
980 1.1 dyoung
981 1.2 dyoung ath_softc_critsect_begin(sc, s);
982 1.1 dyoung switch (cmd) {
983 1.1 dyoung case SIOCSIFFLAGS:
984 1.1 dyoung if (ifp->if_flags & IFF_UP) {
985 1.1 dyoung if (ifp->if_flags & IFF_RUNNING) {
986 1.1 dyoung /*
987 1.1 dyoung * To avoid rescanning another access point,
988 1.1 dyoung * do not call ath_init() here. Instead,
989 1.1 dyoung * only reflect promisc mode settings.
990 1.1 dyoung */
991 1.1 dyoung ath_mode_init(sc);
992 1.1 dyoung } else
993 1.1 dyoung ath_init(ifp); /* XXX lose error */
994 1.1 dyoung } else
995 1.1 dyoung ath_stop(ifp);
996 1.1 dyoung break;
997 1.1 dyoung case SIOCADDMULTI:
998 1.1 dyoung case SIOCDELMULTI:
999 1.1 dyoung /*
1000 1.1 dyoung * The upper layer has already installed/removed
1001 1.1 dyoung * the multicast address(es), just recalculate the
1002 1.1 dyoung * multicast filter for the card.
1003 1.1 dyoung */
1004 1.1 dyoung if (ifp->if_flags & IFF_RUNNING)
1005 1.1 dyoung ath_mode_init(sc);
1006 1.1 dyoung break;
1007 1.1 dyoung case SIOCGATHSTATS:
1008 1.1 dyoung copyout(&sc->sc_stats, ifr->ifr_data, sizeof (sc->sc_stats));
1009 1.1 dyoung break;
1010 1.1 dyoung default:
1011 1.1 dyoung error = ieee80211_ioctl(ifp, cmd, data);
1012 1.1 dyoung if (error == ENETRESET) {
1013 1.1 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
1014 1.1 dyoung (IFF_RUNNING|IFF_UP))
1015 1.1 dyoung ath_init(ifp); /* XXX lose error */
1016 1.1 dyoung error = 0;
1017 1.1 dyoung }
1018 1.1 dyoung break;
1019 1.1 dyoung }
1020 1.2 dyoung ath_softc_critsect_end(sc, s);
1021 1.1 dyoung return error;
1022 1.1 dyoung }
1023 1.1 dyoung
1024 1.1 dyoung /*
1025 1.1 dyoung * Fill the hardware key cache with key entries.
1026 1.1 dyoung */
1027 1.1 dyoung static void
1028 1.1 dyoung ath_initkeytable(struct ath_softc *sc)
1029 1.1 dyoung {
1030 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1031 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1032 1.1 dyoung int i;
1033 1.1 dyoung
1034 1.1 dyoung for (i = 0; i < IEEE80211_WEP_NKID; i++) {
1035 1.1 dyoung struct ieee80211_wepkey *k = &ic->ic_nw_keys[i];
1036 1.1 dyoung if (k->wk_len == 0)
1037 1.1 dyoung ath_hal_keyreset(ah, i);
1038 1.1 dyoung else
1039 1.1 dyoung /* XXX return value */
1040 1.1 dyoung /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */
1041 1.1 dyoung ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k);
1042 1.1 dyoung }
1043 1.1 dyoung }
1044 1.1 dyoung
1045 1.1 dyoung static void
1046 1.2 dyoung ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2])
1047 1.2 dyoung {
1048 1.2 dyoung u_int32_t val;
1049 1.2 dyoung u_int8_t pos;
1050 1.2 dyoung
1051 1.2 dyoung val = LE_READ_4(dl + 0);
1052 1.2 dyoung pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
1053 1.2 dyoung val = LE_READ_4(dl + 3);
1054 1.2 dyoung pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
1055 1.2 dyoung pos &= 0x3f;
1056 1.2 dyoung (*mfilt)[pos / 32] |= (1 << (pos % 32));
1057 1.2 dyoung }
1058 1.2 dyoung
1059 1.2 dyoung #ifdef __FreeBSD__
1060 1.2 dyoung static void
1061 1.2 dyoung ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
1062 1.2 dyoung {
1063 1.2 dyoung struct ieee80211com *ic = &sc->sc_ic;
1064 1.2 dyoung struct ifnet *ifp = &ic->ic_if;
1065 1.2 dyoung struct ifmultiaddr *ifma;
1066 1.2 dyoung
1067 1.2 dyoung TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1068 1.2 dyoung caddr_t dl;
1069 1.2 dyoung
1070 1.2 dyoung /* calculate XOR of eight 6bit values */
1071 1.2 dyoung dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
1072 1.2 dyoung ath_mcastfilter_accum(dl, &mfilt);
1073 1.2 dyoung }
1074 1.2 dyoung }
1075 1.2 dyoung #else
1076 1.2 dyoung static void
1077 1.2 dyoung ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
1078 1.2 dyoung {
1079 1.2 dyoung struct ether_multi *enm;
1080 1.2 dyoung struct ether_multistep estep;
1081 1.2 dyoung
1082 1.2 dyoung ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm);
1083 1.2 dyoung while (enm != NULL) {
1084 1.2 dyoung /* XXX Punt on ranges. */
1085 1.2 dyoung if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) {
1086 1.2 dyoung (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0);
1087 1.2 dyoung break;
1088 1.2 dyoung }
1089 1.2 dyoung ath_mcastfilter_accum(enm->enm_addrlo, mfilt);
1090 1.2 dyoung ETHER_NEXT_MULTI(estep, enm);
1091 1.2 dyoung }
1092 1.2 dyoung }
1093 1.2 dyoung #endif
1094 1.2 dyoung
1095 1.2 dyoung static void
1096 1.1 dyoung ath_mode_init(struct ath_softc *sc)
1097 1.1 dyoung {
1098 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1099 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1100 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
1101 1.2 dyoung u_int32_t rfilt, mfilt[2];
1102 1.1 dyoung
1103 1.1 dyoung /* configure operational mode */
1104 1.1 dyoung ath_hal_setopmode(ah, ic->ic_opmode);
1105 1.1 dyoung
1106 1.1 dyoung /* receive filter */
1107 1.1 dyoung rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
1108 1.1 dyoung | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
1109 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_STA)
1110 1.1 dyoung rfilt |= HAL_RX_FILTER_PROBEREQ;
1111 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
1112 1.1 dyoung (ifp->if_flags & IFF_PROMISC))
1113 1.1 dyoung rfilt |= HAL_RX_FILTER_PROM;
1114 1.1 dyoung if (ic->ic_state == IEEE80211_S_SCAN)
1115 1.1 dyoung rfilt |= HAL_RX_FILTER_BEACON;
1116 1.1 dyoung ath_hal_setrxfilter(ah, rfilt);
1117 1.1 dyoung
1118 1.1 dyoung /* calculate and install multicast filter */
1119 1.1 dyoung if ((ifp->if_flags & IFF_ALLMULTI) == 0) {
1120 1.1 dyoung mfilt[0] = mfilt[1] = 0;
1121 1.2 dyoung ath_mcastfilter_compute(sc, &mfilt);
1122 1.1 dyoung } else {
1123 1.1 dyoung mfilt[0] = mfilt[1] = ~0;
1124 1.1 dyoung }
1125 1.1 dyoung ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
1126 1.1 dyoung DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n",
1127 1.1 dyoung rfilt, mfilt[0], mfilt[1]));
1128 1.1 dyoung }
1129 1.1 dyoung
1130 1.2 dyoung #ifdef __FreeBSD__
1131 1.1 dyoung static void
1132 1.1 dyoung ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error)
1133 1.1 dyoung {
1134 1.1 dyoung struct ath_buf *bf = arg;
1135 1.1 dyoung
1136 1.1 dyoung KASSERT(nseg <= ATH_MAX_SCATTER,
1137 1.1 dyoung ("ath_mbuf_load_cb: too many DMA segments %u", nseg));
1138 1.1 dyoung bf->bf_mapsize = mapsize;
1139 1.1 dyoung bf->bf_nseg = nseg;
1140 1.1 dyoung bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0]));
1141 1.1 dyoung }
1142 1.2 dyoung #endif /* __FreeBSD__ */
1143 1.2 dyoung
1144 1.2 dyoung static struct mbuf *
1145 1.2 dyoung ath_getmbuf(int flags, int type, u_int pktlen)
1146 1.2 dyoung {
1147 1.2 dyoung struct mbuf *m;
1148 1.2 dyoung
1149 1.2 dyoung KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen));
1150 1.2 dyoung #ifdef __FreeBSD__
1151 1.2 dyoung if (pktlen <= MHLEN)
1152 1.2 dyoung MGETHDR(m, flags, type);
1153 1.2 dyoung else
1154 1.2 dyoung m = m_getcl(flags, type, M_PKTHDR);
1155 1.2 dyoung #else
1156 1.2 dyoung MGETHDR(m, flags, type);
1157 1.2 dyoung if (m != NULL && pktlen > MHLEN)
1158 1.2 dyoung MCLGET(m, flags);
1159 1.2 dyoung #endif
1160 1.2 dyoung return m;
1161 1.2 dyoung }
1162 1.1 dyoung
1163 1.1 dyoung static int
1164 1.1 dyoung ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
1165 1.1 dyoung {
1166 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1167 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
1168 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1169 1.1 dyoung struct ieee80211_frame *wh;
1170 1.1 dyoung struct ath_buf *bf;
1171 1.1 dyoung struct ath_desc *ds;
1172 1.1 dyoung struct mbuf *m;
1173 1.1 dyoung int error, pktlen;
1174 1.1 dyoung u_int8_t *frm, rate;
1175 1.1 dyoung u_int16_t capinfo;
1176 1.1 dyoung struct ieee80211_rateset *rs;
1177 1.1 dyoung const HAL_RATE_TABLE *rt;
1178 1.1 dyoung
1179 1.1 dyoung bf = sc->sc_bcbuf;
1180 1.1 dyoung if (bf->bf_m != NULL) {
1181 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1182 1.1 dyoung m_freem(bf->bf_m);
1183 1.1 dyoung bf->bf_m = NULL;
1184 1.1 dyoung bf->bf_node = NULL;
1185 1.1 dyoung }
1186 1.1 dyoung /*
1187 1.1 dyoung * NB: the beacon data buffer must be 32-bit aligned;
1188 1.1 dyoung * we assume the mbuf routines will return us something
1189 1.1 dyoung * with this alignment (perhaps should assert).
1190 1.1 dyoung */
1191 1.1 dyoung rs = &ni->ni_rates;
1192 1.1 dyoung pktlen = sizeof (struct ieee80211_frame)
1193 1.1 dyoung + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 6;
1194 1.1 dyoung if (rs->rs_nrates > IEEE80211_RATE_SIZE)
1195 1.1 dyoung pktlen += 2;
1196 1.2 dyoung m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen);
1197 1.1 dyoung if (m == NULL) {
1198 1.1 dyoung DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n",
1199 1.1 dyoung pktlen));
1200 1.1 dyoung sc->sc_stats.ast_be_nombuf++;
1201 1.1 dyoung return ENOMEM;
1202 1.1 dyoung }
1203 1.1 dyoung
1204 1.1 dyoung wh = mtod(m, struct ieee80211_frame *);
1205 1.1 dyoung wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
1206 1.1 dyoung IEEE80211_FC0_SUBTYPE_BEACON;
1207 1.1 dyoung wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1208 1.1 dyoung *(u_int16_t *)wh->i_dur = 0;
1209 1.1 dyoung memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
1210 1.1 dyoung memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
1211 1.1 dyoung memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
1212 1.1 dyoung *(u_int16_t *)wh->i_seq = 0;
1213 1.1 dyoung
1214 1.1 dyoung /*
1215 1.1 dyoung * beacon frame format
1216 1.1 dyoung * [8] time stamp
1217 1.1 dyoung * [2] beacon interval
1218 1.1 dyoung * [2] cabability information
1219 1.1 dyoung * [tlv] ssid
1220 1.1 dyoung * [tlv] supported rates
1221 1.1 dyoung * [tlv] parameter set (IBSS)
1222 1.1 dyoung * [tlv] extended supported rates
1223 1.1 dyoung */
1224 1.1 dyoung frm = (u_int8_t *)&wh[1];
1225 1.1 dyoung memset(frm, 0, 8); /* timestamp is set by hardware */
1226 1.1 dyoung frm += 8;
1227 1.1 dyoung *(u_int16_t *)frm = htole16(ni->ni_intval);
1228 1.1 dyoung frm += 2;
1229 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_IBSS)
1230 1.1 dyoung capinfo = IEEE80211_CAPINFO_IBSS;
1231 1.1 dyoung else
1232 1.1 dyoung capinfo = IEEE80211_CAPINFO_ESS;
1233 1.1 dyoung if (ic->ic_flags & IEEE80211_F_WEPON)
1234 1.1 dyoung capinfo |= IEEE80211_CAPINFO_PRIVACY;
1235 1.1 dyoung if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1236 1.1 dyoung capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
1237 1.1 dyoung if (ic->ic_flags & IEEE80211_F_SHSLOT)
1238 1.1 dyoung capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
1239 1.1 dyoung *(u_int16_t *)frm = htole16(capinfo);
1240 1.1 dyoung frm += 2;
1241 1.1 dyoung *frm++ = IEEE80211_ELEMID_SSID;
1242 1.1 dyoung *frm++ = ni->ni_esslen;
1243 1.1 dyoung memcpy(frm, ni->ni_essid, ni->ni_esslen);
1244 1.1 dyoung frm += ni->ni_esslen;
1245 1.1 dyoung frm = ieee80211_add_rates(frm, rs);
1246 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_IBSS) {
1247 1.1 dyoung *frm++ = IEEE80211_ELEMID_IBSSPARMS;
1248 1.1 dyoung *frm++ = 2;
1249 1.1 dyoung *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */
1250 1.1 dyoung } else {
1251 1.1 dyoung /* TODO: TIM */
1252 1.1 dyoung *frm++ = IEEE80211_ELEMID_TIM;
1253 1.1 dyoung *frm++ = 4; /* length */
1254 1.1 dyoung *frm++ = 0; /* DTIM count */
1255 1.1 dyoung *frm++ = 1; /* DTIM period */
1256 1.1 dyoung *frm++ = 0; /* bitmap control */
1257 1.1 dyoung *frm++ = 0; /* Partial Virtual Bitmap (variable length) */
1258 1.1 dyoung }
1259 1.1 dyoung frm = ieee80211_add_xrates(frm, rs);
1260 1.1 dyoung m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
1261 1.1 dyoung KASSERT(m->m_pkthdr.len <= pktlen,
1262 1.1 dyoung ("beacon bigger than expected, len %u calculated %u",
1263 1.1 dyoung m->m_pkthdr.len, pktlen));
1264 1.1 dyoung
1265 1.1 dyoung DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len));
1266 1.2 dyoung error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT);
1267 1.1 dyoung if (error != 0) {
1268 1.1 dyoung m_freem(m);
1269 1.1 dyoung return error;
1270 1.1 dyoung }
1271 1.1 dyoung KASSERT(bf->bf_nseg == 1,
1272 1.1 dyoung ("ath_beacon_alloc: multi-segment packet; nseg %u",
1273 1.1 dyoung bf->bf_nseg));
1274 1.1 dyoung bf->bf_m = m;
1275 1.1 dyoung
1276 1.1 dyoung /* setup descriptors */
1277 1.1 dyoung ds = bf->bf_desc;
1278 1.1 dyoung
1279 1.1 dyoung ds->ds_link = 0;
1280 1.1 dyoung ds->ds_data = bf->bf_segs[0].ds_addr;
1281 1.2 dyoung
1282 1.2 dyoung DPRINTF2(("%s: segaddr %p seglen %u\n", __func__,
1283 1.2 dyoung (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len));
1284 1.2 dyoung
1285 1.1 dyoung /*
1286 1.1 dyoung * Calculate rate code.
1287 1.1 dyoung * XXX everything at min xmit rate
1288 1.1 dyoung */
1289 1.1 dyoung rt = sc->sc_currates;
1290 1.1 dyoung KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1291 1.1 dyoung if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1292 1.1 dyoung rate = rt->info[0].rateCode | rt->info[0].shortPreamble;
1293 1.1 dyoung else
1294 1.1 dyoung rate = rt->info[0].rateCode;
1295 1.2 dyoung if (!ath_hal_setuptxdesc(ah, ds
1296 1.1 dyoung , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */
1297 1.1 dyoung , sizeof(struct ieee80211_frame) /* header length */
1298 1.1 dyoung , HAL_PKT_TYPE_BEACON /* Atheros packet type */
1299 1.1 dyoung , 0x20 /* txpower XXX */
1300 1.1 dyoung , rate, 1 /* series 0 rate/tries */
1301 1.1 dyoung , HAL_TXKEYIX_INVALID /* no encryption */
1302 1.1 dyoung , 0 /* antenna mode */
1303 1.1 dyoung , HAL_TXDESC_NOACK /* no ack for beacons */
1304 1.1 dyoung , 0 /* rts/cts rate */
1305 1.1 dyoung , 0 /* rts/cts duration */
1306 1.2 dyoung )) {
1307 1.2 dyoung printf("%s: ath_hal_setuptxdesc failed\n", __func__);
1308 1.2 dyoung return -1;
1309 1.2 dyoung }
1310 1.1 dyoung /* NB: beacon's BufLen must be a multiple of 4 bytes */
1311 1.1 dyoung /* XXX verify mbuf data area covers this roundup */
1312 1.2 dyoung if (!ath_hal_filltxdesc(ah, ds
1313 1.1 dyoung , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */
1314 1.1 dyoung , AH_TRUE /* first segment */
1315 1.1 dyoung , AH_TRUE /* last segment */
1316 1.2 dyoung )) {
1317 1.2 dyoung printf("%s: ath_hal_filltxdesc failed\n", __func__);
1318 1.2 dyoung return -1;
1319 1.2 dyoung }
1320 1.2 dyoung
1321 1.2 dyoung /* XXX it is not appropriate to bus_dmamap_sync? -dcy */
1322 1.1 dyoung
1323 1.1 dyoung return 0;
1324 1.1 dyoung }
1325 1.1 dyoung
1326 1.1 dyoung static void
1327 1.1 dyoung ath_beacon_proc(void *arg, int pending)
1328 1.1 dyoung {
1329 1.1 dyoung struct ath_softc *sc = arg;
1330 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1331 1.1 dyoung struct ath_buf *bf = sc->sc_bcbuf;
1332 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1333 1.1 dyoung
1334 1.1 dyoung DPRINTF2(("%s: pending %u\n", __func__, pending));
1335 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_STA ||
1336 1.1 dyoung bf == NULL || bf->bf_m == NULL) {
1337 1.1 dyoung DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n",
1338 1.1 dyoung __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL));
1339 1.1 dyoung return;
1340 1.1 dyoung }
1341 1.1 dyoung /* TODO: update beacon to reflect PS poll state */
1342 1.1 dyoung if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
1343 1.1 dyoung DPRINTF(("%s: beacon queue %u did not stop?",
1344 1.1 dyoung __func__, sc->sc_bhalq));
1345 1.1 dyoung return; /* busy, XXX is this right? */
1346 1.1 dyoung }
1347 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
1348 1.1 dyoung
1349 1.1 dyoung ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
1350 1.1 dyoung ath_hal_txstart(ah, sc->sc_bhalq);
1351 1.2 dyoung DPRINTF2(("%s: BCDP%u = %p (%p)\n", __func__,
1352 1.1 dyoung sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
1353 1.1 dyoung }
1354 1.1 dyoung
1355 1.1 dyoung static void
1356 1.1 dyoung ath_beacon_free(struct ath_softc *sc)
1357 1.1 dyoung {
1358 1.1 dyoung struct ath_buf *bf = sc->sc_bcbuf;
1359 1.1 dyoung
1360 1.1 dyoung if (bf->bf_m != NULL) {
1361 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1362 1.1 dyoung m_freem(bf->bf_m);
1363 1.1 dyoung bf->bf_m = NULL;
1364 1.1 dyoung bf->bf_node = NULL;
1365 1.1 dyoung }
1366 1.1 dyoung }
1367 1.1 dyoung
1368 1.1 dyoung /*
1369 1.1 dyoung * Configure the beacon and sleep timers.
1370 1.1 dyoung *
1371 1.1 dyoung * When operating as an AP this resets the TSF and sets
1372 1.1 dyoung * up the hardware to notify us when we need to issue beacons.
1373 1.1 dyoung *
1374 1.1 dyoung * When operating in station mode this sets up the beacon
1375 1.1 dyoung * timers according to the timestamp of the last received
1376 1.1 dyoung * beacon and the current TSF, configures PCF and DTIM
1377 1.1 dyoung * handling, programs the sleep registers so the hardware
1378 1.1 dyoung * will wakeup in time to receive beacons, and configures
1379 1.1 dyoung * the beacon miss handling so we'll receive a BMISS
1380 1.1 dyoung * interrupt when we stop seeing beacons from the AP
1381 1.1 dyoung * we've associated with.
1382 1.1 dyoung */
1383 1.1 dyoung static void
1384 1.1 dyoung ath_beacon_config(struct ath_softc *sc)
1385 1.1 dyoung {
1386 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1387 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1388 1.1 dyoung struct ieee80211_node *ni = ic->ic_bss;
1389 1.1 dyoung u_int32_t nexttbtt;
1390 1.1 dyoung
1391 1.1 dyoung nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) |
1392 1.1 dyoung (LE_READ_4(ni->ni_tstamp) >> 10);
1393 1.1 dyoung DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt));
1394 1.1 dyoung nexttbtt += ni->ni_intval;
1395 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_STA) {
1396 1.1 dyoung HAL_BEACON_STATE bs;
1397 1.1 dyoung u_int32_t bmisstime;
1398 1.1 dyoung
1399 1.1 dyoung /* NB: no PCF support right now */
1400 1.1 dyoung memset(&bs, 0, sizeof(bs));
1401 1.1 dyoung bs.bs_intval = ni->ni_intval;
1402 1.1 dyoung bs.bs_nexttbtt = nexttbtt;
1403 1.1 dyoung bs.bs_dtimperiod = bs.bs_intval;
1404 1.1 dyoung bs.bs_nextdtim = nexttbtt;
1405 1.1 dyoung /*
1406 1.1 dyoung * Calculate the number of consecutive beacons to miss
1407 1.1 dyoung * before taking a BMISS interrupt. The configuration
1408 1.1 dyoung * is specified in ms, so we need to convert that to
1409 1.1 dyoung * TU's and then calculate based on the beacon interval.
1410 1.1 dyoung * Note that we clamp the result to at most 10 beacons.
1411 1.1 dyoung */
1412 1.1 dyoung bmisstime = (ic->ic_bmisstimeout * 1000) / 1024;
1413 1.1 dyoung bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval);
1414 1.1 dyoung if (bs.bs_bmissthreshold > 10)
1415 1.1 dyoung bs.bs_bmissthreshold = 10;
1416 1.1 dyoung else if (bs.bs_bmissthreshold <= 0)
1417 1.1 dyoung bs.bs_bmissthreshold = 1;
1418 1.1 dyoung
1419 1.1 dyoung /*
1420 1.1 dyoung * Calculate sleep duration. The configuration is
1421 1.1 dyoung * given in ms. We insure a multiple of the beacon
1422 1.1 dyoung * period is used. Also, if the sleep duration is
1423 1.1 dyoung * greater than the DTIM period then it makes senses
1424 1.1 dyoung * to make it a multiple of that.
1425 1.1 dyoung *
1426 1.1 dyoung * XXX fixed at 100ms
1427 1.1 dyoung */
1428 1.1 dyoung bs.bs_sleepduration =
1429 1.1 dyoung roundup((100 * 1000) / 1024, bs.bs_intval);
1430 1.1 dyoung if (bs.bs_sleepduration > bs.bs_dtimperiod)
1431 1.1 dyoung bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
1432 1.1 dyoung
1433 1.1 dyoung DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n"
1434 1.1 dyoung , __func__
1435 1.1 dyoung , bs.bs_intval
1436 1.1 dyoung , bs.bs_nexttbtt
1437 1.1 dyoung , bs.bs_dtimperiod
1438 1.1 dyoung , bs.bs_nextdtim
1439 1.1 dyoung , bs.bs_bmissthreshold
1440 1.1 dyoung , bs.bs_sleepduration
1441 1.1 dyoung ));
1442 1.1 dyoung ath_hal_intrset(ah, 0);
1443 1.1 dyoung /*
1444 1.1 dyoung * Reset our tsf so the hardware will update the
1445 1.1 dyoung * tsf register to reflect timestamps found in
1446 1.1 dyoung * received beacons.
1447 1.1 dyoung */
1448 1.1 dyoung ath_hal_resettsf(ah);
1449 1.1 dyoung ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0);
1450 1.1 dyoung sc->sc_imask |= HAL_INT_BMISS;
1451 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
1452 1.1 dyoung } else {
1453 1.1 dyoung DPRINTF(("%s: intval %u nexttbtt %u\n",
1454 1.1 dyoung __func__, ni->ni_intval, nexttbtt));
1455 1.1 dyoung ath_hal_intrset(ah, 0);
1456 1.1 dyoung ath_hal_beaconinit(ah, ic->ic_opmode,
1457 1.1 dyoung nexttbtt, ni->ni_intval);
1458 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_MONITOR)
1459 1.1 dyoung sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */
1460 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
1461 1.1 dyoung }
1462 1.1 dyoung }
1463 1.1 dyoung
1464 1.2 dyoung #ifdef __FreeBSD__
1465 1.1 dyoung static void
1466 1.1 dyoung ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1467 1.1 dyoung {
1468 1.1 dyoung bus_addr_t *paddr = (bus_addr_t*) arg;
1469 1.1 dyoung *paddr = segs->ds_addr;
1470 1.1 dyoung }
1471 1.2 dyoung #endif
1472 1.1 dyoung
1473 1.2 dyoung #ifdef __FreeBSD__
1474 1.1 dyoung static int
1475 1.1 dyoung ath_desc_alloc(struct ath_softc *sc)
1476 1.1 dyoung {
1477 1.1 dyoung int i, bsize, error;
1478 1.1 dyoung struct ath_desc *ds;
1479 1.1 dyoung struct ath_buf *bf;
1480 1.1 dyoung
1481 1.1 dyoung /* allocate descriptors */
1482 1.1 dyoung sc->sc_desc_len = sizeof(struct ath_desc) *
1483 1.1 dyoung (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
1484 1.1 dyoung error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap);
1485 1.1 dyoung if (error != 0)
1486 1.1 dyoung return error;
1487 1.1 dyoung
1488 1.1 dyoung error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc,
1489 1.1 dyoung BUS_DMA_NOWAIT, &sc->sc_ddmamap);
1490 1.2 dyoung
1491 1.1 dyoung if (error != 0)
1492 1.1 dyoung goto fail0;
1493 1.1 dyoung
1494 1.1 dyoung error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap,
1495 1.1 dyoung sc->sc_desc, sc->sc_desc_len,
1496 1.1 dyoung ath_load_cb, &sc->sc_desc_paddr,
1497 1.1 dyoung BUS_DMA_NOWAIT);
1498 1.1 dyoung if (error != 0)
1499 1.1 dyoung goto fail1;
1500 1.1 dyoung
1501 1.1 dyoung ds = sc->sc_desc;
1502 1.1 dyoung DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n",
1503 1.1 dyoung ds, sc->sc_desc_len,
1504 1.1 dyoung (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
1505 1.1 dyoung
1506 1.1 dyoung /* allocate buffers */
1507 1.1 dyoung bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
1508 1.1 dyoung bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
1509 1.2 dyoung if (bf == NULL) {
1510 1.2 dyoung printf("%s: unable to allocate Tx/Rx buffers\n",
1511 1.2 dyoung sc->sc_dev.dv_xname);
1512 1.2 dyoung error = -1;
1513 1.1 dyoung goto fail2;
1514 1.2 dyoung }
1515 1.1 dyoung sc->sc_bufptr = bf;
1516 1.1 dyoung
1517 1.1 dyoung TAILQ_INIT(&sc->sc_rxbuf);
1518 1.1 dyoung for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
1519 1.1 dyoung bf->bf_desc = ds;
1520 1.1 dyoung bf->bf_daddr = sc->sc_desc_paddr +
1521 1.1 dyoung ((caddr_t)ds - (caddr_t)sc->sc_desc);
1522 1.1 dyoung error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
1523 1.1 dyoung &bf->bf_dmamap);
1524 1.1 dyoung if (error != 0)
1525 1.1 dyoung break;
1526 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
1527 1.1 dyoung }
1528 1.1 dyoung
1529 1.1 dyoung TAILQ_INIT(&sc->sc_txbuf);
1530 1.1 dyoung for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
1531 1.1 dyoung bf->bf_desc = ds;
1532 1.1 dyoung bf->bf_daddr = sc->sc_desc_paddr +
1533 1.1 dyoung ((caddr_t)ds - (caddr_t)sc->sc_desc);
1534 1.1 dyoung error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
1535 1.1 dyoung &bf->bf_dmamap);
1536 1.1 dyoung if (error != 0)
1537 1.1 dyoung break;
1538 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1539 1.1 dyoung }
1540 1.1 dyoung TAILQ_INIT(&sc->sc_txq);
1541 1.1 dyoung
1542 1.1 dyoung /* beacon buffer */
1543 1.1 dyoung bf->bf_desc = ds;
1544 1.1 dyoung bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
1545 1.1 dyoung error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap);
1546 1.1 dyoung if (error != 0)
1547 1.1 dyoung return error;
1548 1.1 dyoung sc->sc_bcbuf = bf;
1549 1.1 dyoung return 0;
1550 1.1 dyoung
1551 1.1 dyoung fail2:
1552 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
1553 1.1 dyoung fail1:
1554 1.1 dyoung bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
1555 1.1 dyoung fail0:
1556 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
1557 1.1 dyoung sc->sc_ddmamap = NULL;
1558 1.1 dyoung return error;
1559 1.1 dyoung }
1560 1.2 dyoung #else
1561 1.2 dyoung static int
1562 1.2 dyoung ath_desc_alloc(struct ath_softc *sc)
1563 1.2 dyoung {
1564 1.2 dyoung int i, bsize, error = -1;
1565 1.2 dyoung struct ath_desc *ds;
1566 1.2 dyoung struct ath_buf *bf;
1567 1.2 dyoung
1568 1.2 dyoung /* allocate descriptors */
1569 1.2 dyoung sc->sc_desc_len = sizeof(struct ath_desc) *
1570 1.2 dyoung (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
1571 1.2 dyoung if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE,
1572 1.2 dyoung 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) {
1573 1.2 dyoung printf("%s: unable to allocate control data, error = %d\n",
1574 1.2 dyoung sc->sc_dev.dv_xname, error);
1575 1.2 dyoung goto fail0;
1576 1.2 dyoung }
1577 1.2 dyoung
1578 1.2 dyoung if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg,
1579 1.2 dyoung sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) {
1580 1.2 dyoung printf("%s: unable to map control data, error = %d\n",
1581 1.2 dyoung sc->sc_dev.dv_xname, error);
1582 1.2 dyoung goto fail1;
1583 1.2 dyoung }
1584 1.2 dyoung
1585 1.2 dyoung if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1,
1586 1.2 dyoung sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) {
1587 1.2 dyoung printf("%s: unable to create control data DMA map, "
1588 1.2 dyoung "error = %d\n", sc->sc_dev.dv_xname, error);
1589 1.2 dyoung goto fail2;
1590 1.2 dyoung }
1591 1.2 dyoung
1592 1.2 dyoung if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc,
1593 1.2 dyoung sc->sc_desc_len, NULL, 0)) != 0) {
1594 1.2 dyoung printf("%s: unable to load control data DMA map, error = %d\n",
1595 1.2 dyoung sc->sc_dev.dv_xname, error);
1596 1.2 dyoung goto fail3;
1597 1.2 dyoung }
1598 1.2 dyoung
1599 1.2 dyoung ds = sc->sc_desc;
1600 1.2 dyoung sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr;
1601 1.2 dyoung
1602 1.2 dyoung DPRINTF(("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n",
1603 1.2 dyoung ds, (u_long)sc->sc_desc_len,
1604 1.2 dyoung (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
1605 1.2 dyoung
1606 1.2 dyoung /* allocate buffers */
1607 1.2 dyoung bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
1608 1.2 dyoung bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
1609 1.2 dyoung if (bf == NULL) {
1610 1.2 dyoung printf("%s: unable to allocate Tx/Rx buffers\n",
1611 1.2 dyoung sc->sc_dev.dv_xname);
1612 1.2 dyoung error = ENOMEM;
1613 1.2 dyoung goto fail3;
1614 1.2 dyoung }
1615 1.2 dyoung sc->sc_bufptr = bf;
1616 1.2 dyoung
1617 1.2 dyoung TAILQ_INIT(&sc->sc_rxbuf);
1618 1.2 dyoung for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
1619 1.2 dyoung bf->bf_desc = ds;
1620 1.2 dyoung bf->bf_daddr = sc->sc_desc_paddr +
1621 1.2 dyoung ((caddr_t)ds - (caddr_t)sc->sc_desc);
1622 1.2 dyoung if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
1623 1.2 dyoung MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
1624 1.2 dyoung printf("%s: unable to create Rx dmamap, error = %d\n",
1625 1.2 dyoung sc->sc_dev.dv_xname, error);
1626 1.2 dyoung goto fail4;
1627 1.2 dyoung }
1628 1.2 dyoung TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
1629 1.2 dyoung }
1630 1.2 dyoung
1631 1.2 dyoung TAILQ_INIT(&sc->sc_txbuf);
1632 1.2 dyoung for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
1633 1.2 dyoung bf->bf_desc = ds;
1634 1.2 dyoung bf->bf_daddr = sc->sc_desc_paddr +
1635 1.2 dyoung ((caddr_t)ds - (caddr_t)sc->sc_desc);
1636 1.2 dyoung if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
1637 1.2 dyoung ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
1638 1.2 dyoung printf("%s: unable to create Tx dmamap, error = %d\n",
1639 1.2 dyoung sc->sc_dev.dv_xname, error);
1640 1.2 dyoung goto fail5;
1641 1.2 dyoung }
1642 1.2 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1643 1.2 dyoung }
1644 1.2 dyoung TAILQ_INIT(&sc->sc_txq);
1645 1.2 dyoung
1646 1.2 dyoung /* beacon buffer */
1647 1.2 dyoung bf->bf_desc = ds;
1648 1.2 dyoung bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
1649 1.2 dyoung if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
1650 1.2 dyoung &bf->bf_dmamap)) != 0) {
1651 1.2 dyoung printf("%s: unable to create beacon dmamap, error = %d\n",
1652 1.2 dyoung sc->sc_dev.dv_xname, error);
1653 1.2 dyoung goto fail5;
1654 1.2 dyoung }
1655 1.2 dyoung sc->sc_bcbuf = bf;
1656 1.2 dyoung return 0;
1657 1.2 dyoung
1658 1.2 dyoung fail5:
1659 1.2 dyoung for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) {
1660 1.2 dyoung if (sc->sc_bufptr[i].bf_dmamap == NULL)
1661 1.2 dyoung continue;
1662 1.2 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
1663 1.2 dyoung }
1664 1.2 dyoung fail4:
1665 1.2 dyoung for (i = 0; i < ATH_RXBUF; i++) {
1666 1.2 dyoung if (sc->sc_bufptr[i].bf_dmamap == NULL)
1667 1.2 dyoung continue;
1668 1.2 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
1669 1.2 dyoung }
1670 1.2 dyoung fail3:
1671 1.2 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
1672 1.2 dyoung fail2:
1673 1.2 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
1674 1.2 dyoung sc->sc_ddmamap = NULL;
1675 1.2 dyoung fail1:
1676 1.2 dyoung bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len);
1677 1.2 dyoung fail0:
1678 1.2 dyoung bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
1679 1.2 dyoung return error;
1680 1.2 dyoung }
1681 1.2 dyoung #endif
1682 1.1 dyoung
1683 1.1 dyoung static void
1684 1.1 dyoung ath_desc_free(struct ath_softc *sc)
1685 1.1 dyoung {
1686 1.1 dyoung struct ath_buf *bf;
1687 1.1 dyoung
1688 1.2 dyoung #ifdef __FreeBSD__
1689 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
1690 1.1 dyoung bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
1691 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
1692 1.2 dyoung #else
1693 1.2 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
1694 1.2 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
1695 1.2 dyoung bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
1696 1.2 dyoung #endif
1697 1.1 dyoung
1698 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
1699 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1700 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
1701 1.1 dyoung m_freem(bf->bf_m);
1702 1.1 dyoung }
1703 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list)
1704 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
1705 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
1706 1.1 dyoung if (bf->bf_m) {
1707 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1708 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
1709 1.1 dyoung m_freem(bf->bf_m);
1710 1.1 dyoung bf->bf_m = NULL;
1711 1.1 dyoung }
1712 1.1 dyoung }
1713 1.1 dyoung if (sc->sc_bcbuf != NULL) {
1714 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
1715 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
1716 1.1 dyoung sc->sc_bcbuf = NULL;
1717 1.1 dyoung }
1718 1.1 dyoung
1719 1.1 dyoung TAILQ_INIT(&sc->sc_rxbuf);
1720 1.1 dyoung TAILQ_INIT(&sc->sc_txbuf);
1721 1.1 dyoung TAILQ_INIT(&sc->sc_txq);
1722 1.1 dyoung free(sc->sc_bufptr, M_DEVBUF);
1723 1.1 dyoung sc->sc_bufptr = NULL;
1724 1.1 dyoung }
1725 1.1 dyoung
1726 1.1 dyoung static struct ieee80211_node *
1727 1.1 dyoung ath_node_alloc(struct ieee80211com *ic)
1728 1.1 dyoung {
1729 1.1 dyoung struct ath_node *an =
1730 1.1 dyoung malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO);
1731 1.1 dyoung return an ? &an->an_node : NULL;
1732 1.1 dyoung }
1733 1.1 dyoung
1734 1.1 dyoung static void
1735 1.1 dyoung ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
1736 1.1 dyoung {
1737 1.2 dyoung struct ath_softc *sc = ic->ic_if.if_softc;
1738 1.1 dyoung struct ath_buf *bf;
1739 1.1 dyoung
1740 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
1741 1.1 dyoung if (bf->bf_node == ni)
1742 1.1 dyoung bf->bf_node = NULL;
1743 1.1 dyoung }
1744 1.1 dyoung free(ni, M_DEVBUF);
1745 1.1 dyoung }
1746 1.1 dyoung
1747 1.1 dyoung static void
1748 1.1 dyoung ath_node_copy(struct ieee80211com *ic,
1749 1.1 dyoung struct ieee80211_node *dst, const struct ieee80211_node *src)
1750 1.1 dyoung {
1751 1.1 dyoung *(struct ath_node *)dst = *(const struct ath_node *)src;
1752 1.1 dyoung }
1753 1.1 dyoung
1754 1.1 dyoung static int
1755 1.1 dyoung ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
1756 1.1 dyoung {
1757 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1758 1.1 dyoung int error;
1759 1.1 dyoung struct mbuf *m;
1760 1.1 dyoung struct ath_desc *ds;
1761 1.1 dyoung
1762 1.1 dyoung m = bf->bf_m;
1763 1.1 dyoung if (m == NULL) {
1764 1.1 dyoung /*
1765 1.1 dyoung * NB: by assigning a page to the rx dma buffer we
1766 1.1 dyoung * implicitly satisfy the Atheros requirement that
1767 1.1 dyoung * this buffer be cache-line-aligned and sized to be
1768 1.1 dyoung * multiple of the cache line size. Not doing this
1769 1.1 dyoung * causes weird stuff to happen (for the 5210 at least).
1770 1.1 dyoung */
1771 1.2 dyoung m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES);
1772 1.1 dyoung if (m == NULL) {
1773 1.1 dyoung DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n"));
1774 1.1 dyoung sc->sc_stats.ast_rx_nombuf++;
1775 1.1 dyoung return ENOMEM;
1776 1.1 dyoung }
1777 1.1 dyoung bf->bf_m = m;
1778 1.1 dyoung m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
1779 1.1 dyoung
1780 1.2 dyoung error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m,
1781 1.2 dyoung BUS_DMA_NOWAIT);
1782 1.1 dyoung if (error != 0) {
1783 1.2 dyoung DPRINTF(("ath_rxbuf_init: ath_buf_dmamap_load_mbuf failed;"
1784 1.1 dyoung " error %d\n", error));
1785 1.1 dyoung sc->sc_stats.ast_rx_busdma++;
1786 1.1 dyoung return error;
1787 1.1 dyoung }
1788 1.1 dyoung KASSERT(bf->bf_nseg == 1,
1789 1.1 dyoung ("ath_rxbuf_init: multi-segment packet; nseg %u",
1790 1.1 dyoung bf->bf_nseg));
1791 1.1 dyoung }
1792 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD);
1793 1.1 dyoung
1794 1.1 dyoung /* setup descriptors */
1795 1.1 dyoung ds = bf->bf_desc;
1796 1.1 dyoung ds->ds_link = 0;
1797 1.1 dyoung ds->ds_data = bf->bf_segs[0].ds_addr;
1798 1.1 dyoung ath_hal_setuprxdesc(ah, ds
1799 1.1 dyoung , m->m_len /* buffer size */
1800 1.1 dyoung , 0
1801 1.1 dyoung );
1802 1.1 dyoung
1803 1.1 dyoung if (sc->sc_rxlink != NULL)
1804 1.1 dyoung *sc->sc_rxlink = bf->bf_daddr;
1805 1.1 dyoung sc->sc_rxlink = &ds->ds_link;
1806 1.1 dyoung return 0;
1807 1.1 dyoung }
1808 1.1 dyoung
1809 1.1 dyoung static void
1810 1.1 dyoung ath_rx_proc(void *arg, int npending)
1811 1.1 dyoung {
1812 1.1 dyoung struct ath_softc *sc = arg;
1813 1.1 dyoung struct ath_buf *bf;
1814 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1815 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
1816 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1817 1.1 dyoung struct ath_desc *ds;
1818 1.1 dyoung struct mbuf *m;
1819 1.1 dyoung struct ieee80211_frame *wh, whbuf;
1820 1.1 dyoung struct ieee80211_node *ni;
1821 1.1 dyoung int len;
1822 1.1 dyoung u_int phyerr;
1823 1.1 dyoung HAL_STATUS status;
1824 1.1 dyoung
1825 1.1 dyoung DPRINTF2(("ath_rx_proc: pending %u\n", npending));
1826 1.1 dyoung do {
1827 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_rxbuf);
1828 1.1 dyoung if (bf == NULL) { /* NB: shouldn't happen */
1829 1.1 dyoung if_printf(ifp, "ath_rx_proc: no buffer!\n");
1830 1.1 dyoung break;
1831 1.1 dyoung }
1832 1.1 dyoung m = bf->bf_m;
1833 1.1 dyoung if (m == NULL) { /* NB: shouldn't happen */
1834 1.1 dyoung if_printf(ifp, "ath_rx_proc: no mbuf!\n");
1835 1.1 dyoung continue;
1836 1.1 dyoung }
1837 1.1 dyoung ds = bf->bf_desc;
1838 1.1 dyoung status = ath_hal_rxprocdesc(ah, ds);
1839 1.1 dyoung #ifdef AR_DEBUG
1840 1.1 dyoung if (ath_debug > 1)
1841 1.1 dyoung ath_printrxbuf(bf, status == HAL_OK);
1842 1.1 dyoung #endif
1843 1.1 dyoung if (status == HAL_EINPROGRESS)
1844 1.1 dyoung break;
1845 1.1 dyoung TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
1846 1.1 dyoung if (ds->ds_rxstat.rs_status != 0) {
1847 1.1 dyoung ifp->if_ierrors++;
1848 1.1 dyoung if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC)
1849 1.1 dyoung sc->sc_stats.ast_rx_crcerr++;
1850 1.1 dyoung if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO)
1851 1.1 dyoung sc->sc_stats.ast_rx_fifoerr++;
1852 1.1 dyoung if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT)
1853 1.1 dyoung sc->sc_stats.ast_rx_badcrypt++;
1854 1.1 dyoung if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) {
1855 1.1 dyoung sc->sc_stats.ast_rx_phyerr++;
1856 1.1 dyoung phyerr = ds->ds_rxstat.rs_phyerr & 0x1f;
1857 1.1 dyoung sc->sc_stats.ast_rx_phy[phyerr]++;
1858 1.1 dyoung }
1859 1.1 dyoung goto rx_next;
1860 1.1 dyoung }
1861 1.1 dyoung
1862 1.1 dyoung len = ds->ds_rxstat.rs_datalen;
1863 1.1 dyoung if (len < sizeof(struct ieee80211_frame)) {
1864 1.1 dyoung DPRINTF(("ath_rx_proc: short packet %d\n", len));
1865 1.1 dyoung sc->sc_stats.ast_rx_tooshort++;
1866 1.1 dyoung goto rx_next;
1867 1.1 dyoung }
1868 1.1 dyoung
1869 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD);
1870 1.1 dyoung
1871 1.1 dyoung wh = mtod(m, struct ieee80211_frame *);
1872 1.1 dyoung if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1873 1.1 dyoung IEEE80211_FC0_TYPE_CTL &&
1874 1.1 dyoung ic->ic_opmode != IEEE80211_M_MONITOR) {
1875 1.1 dyoung /*
1876 1.1 dyoung * Discard control frame when not in monitor mode.
1877 1.1 dyoung */
1878 1.1 dyoung DPRINTF(("ath_rx_proc: control frame\n"));
1879 1.1 dyoung sc->sc_stats.ast_rx_ctl++;
1880 1.1 dyoung goto rx_next;
1881 1.1 dyoung }
1882 1.1 dyoung
1883 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1884 1.1 dyoung bf->bf_m = NULL;
1885 1.1 dyoung m->m_pkthdr.rcvif = ifp;
1886 1.1 dyoung m->m_pkthdr.len = m->m_len = len;
1887 1.1 dyoung
1888 1.2 dyoung #if NBPFILTER > 0
1889 1.1 dyoung if (sc->sc_drvbpf) {
1890 1.2 dyoung #ifdef __FreeBSD__
1891 1.1 dyoung struct mbuf *mb;
1892 1.1 dyoung
1893 1.1 dyoung /* XXX pre-allocate space when setting up recv's */
1894 1.1 dyoung MGETHDR(mb, M_DONTWAIT, m->m_type);
1895 1.1 dyoung if (mb != NULL) {
1896 1.1 dyoung sc->sc_rx_th.wr_rate =
1897 1.1 dyoung sc->sc_hwmap[ds->ds_rxstat.rs_rate];
1898 1.1 dyoung sc->sc_rx_th.wr_antsignal =
1899 1.1 dyoung ds->ds_rxstat.rs_rssi;
1900 1.1 dyoung sc->sc_rx_th.wr_antenna =
1901 1.1 dyoung ds->ds_rxstat.rs_antenna;
1902 1.1 dyoung /* XXX TSF */
1903 1.1 dyoung
1904 1.1 dyoung (void) m_dup_pkthdr(mb, m, M_DONTWAIT);
1905 1.1 dyoung mb->m_next = m;
1906 1.1 dyoung mb->m_data = (caddr_t)&sc->sc_rx_th;
1907 1.1 dyoung mb->m_len = sizeof(sc->sc_rx_th);
1908 1.1 dyoung mb->m_pkthdr.len += mb->m_len;
1909 1.1 dyoung bpf_mtap(sc->sc_drvbpf, mb);
1910 1.1 dyoung m_free(mb);
1911 1.1 dyoung }
1912 1.2 dyoung #else
1913 1.2 dyoung /* XXX pre-allocate space when setting up recv's */
1914 1.2 dyoung struct mbuf mb;
1915 1.2 dyoung
1916 1.2 dyoung sc->sc_rx_th.wr_rate =
1917 1.2 dyoung sc->sc_hwmap[ds->ds_rxstat.rs_rate];
1918 1.2 dyoung sc->sc_rx_th.wr_antsignal =
1919 1.2 dyoung ds->ds_rxstat.rs_rssi;
1920 1.2 dyoung sc->sc_rx_th.wr_antenna =
1921 1.2 dyoung ds->ds_rxstat.rs_antenna;
1922 1.2 dyoung /* XXX TSF */
1923 1.2 dyoung
1924 1.2 dyoung M_COPY_PKTHDR(&mb, m);
1925 1.2 dyoung mb.m_next = m;
1926 1.2 dyoung mb.m_data = (caddr_t)&sc->sc_rx_th;
1927 1.2 dyoung mb.m_len = sizeof(sc->sc_rx_th);
1928 1.2 dyoung mb.m_pkthdr.len += mb.m_len;
1929 1.2 dyoung bpf_mtap(sc->sc_drvbpf, &mb);
1930 1.2 dyoung #endif
1931 1.1 dyoung }
1932 1.2 dyoung #endif
1933 1.1 dyoung
1934 1.1 dyoung m_adj(m, -IEEE80211_CRC_LEN);
1935 1.1 dyoung if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1936 1.1 dyoung /*
1937 1.1 dyoung * WEP is decrypted by hardware. Clear WEP bit
1938 1.1 dyoung * and trim WEP header for ieee80211_input().
1939 1.1 dyoung */
1940 1.1 dyoung wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
1941 1.1 dyoung memcpy(&whbuf, wh, sizeof(whbuf));
1942 1.1 dyoung m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN);
1943 1.1 dyoung memcpy(mtod(m, caddr_t), &whbuf, sizeof(whbuf));
1944 1.1 dyoung /*
1945 1.1 dyoung * Also trim WEP ICV from the tail.
1946 1.1 dyoung */
1947 1.1 dyoung m_adj(m, -IEEE80211_WEP_CRCLEN);
1948 1.1 dyoung }
1949 1.1 dyoung
1950 1.1 dyoung /*
1951 1.1 dyoung * Locate the node for sender, track state, and
1952 1.1 dyoung * then pass this node (referenced) up to the 802.11
1953 1.1 dyoung * layer for its use. We are required to pass
1954 1.1 dyoung * something so we fall back to ic_bss when this frame
1955 1.1 dyoung * is from an unknown sender.
1956 1.1 dyoung */
1957 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_STA) {
1958 1.1 dyoung ni = ieee80211_find_node(ic, wh->i_addr2);
1959 1.1 dyoung if (ni == NULL)
1960 1.1 dyoung ni = ieee80211_ref_node(ic->ic_bss);
1961 1.1 dyoung } else
1962 1.1 dyoung ni = ieee80211_ref_node(ic->ic_bss);
1963 1.1 dyoung ATH_NODE(ni)->an_rx_antenna = ds->ds_rxstat.rs_antenna;
1964 1.1 dyoung /*
1965 1.1 dyoung * Send frame up for processing.
1966 1.1 dyoung */
1967 1.1 dyoung ieee80211_input(ifp, m, ni,
1968 1.1 dyoung ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp);
1969 1.1 dyoung /*
1970 1.1 dyoung * The frame may have caused the node to be marked for
1971 1.1 dyoung * reclamation (e.g. in response to a DEAUTH message)
1972 1.1 dyoung * so use free_node here instead of unref_node.
1973 1.1 dyoung */
1974 1.1 dyoung if (ni == ic->ic_bss)
1975 1.1 dyoung ieee80211_unref_node(&ni);
1976 1.1 dyoung else
1977 1.1 dyoung ieee80211_free_node(ic, ni);
1978 1.1 dyoung rx_next:
1979 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
1980 1.1 dyoung } while (ath_rxbuf_init(sc, bf) == 0);
1981 1.1 dyoung
1982 1.1 dyoung ath_hal_rxmonitor(ah); /* rx signal state monitoring */
1983 1.1 dyoung ath_hal_rxena(ah); /* in case of RXEOL */
1984 1.1 dyoung }
1985 1.1 dyoung
1986 1.1 dyoung /*
1987 1.1 dyoung * XXX Size of an ACK control frame in bytes.
1988 1.1 dyoung */
1989 1.1 dyoung #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4)
1990 1.1 dyoung
1991 1.1 dyoung static int
1992 1.1 dyoung ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
1993 1.1 dyoung struct mbuf *m0)
1994 1.1 dyoung {
1995 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1996 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1997 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
1998 1.1 dyoung int i, error, iswep, hdrlen, pktlen;
1999 1.1 dyoung u_int8_t rix, cix, txrate, ctsrate;
2000 1.1 dyoung struct ath_desc *ds;
2001 1.1 dyoung struct mbuf *m;
2002 1.1 dyoung struct ieee80211_frame *wh;
2003 1.1 dyoung u_int32_t iv;
2004 1.1 dyoung u_int8_t *ivp;
2005 1.1 dyoung u_int8_t hdrbuf[sizeof(struct ieee80211_frame) +
2006 1.1 dyoung IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN];
2007 1.1 dyoung u_int subtype, flags, ctsduration, antenna;
2008 1.1 dyoung HAL_PKT_TYPE atype;
2009 1.1 dyoung const HAL_RATE_TABLE *rt;
2010 1.1 dyoung HAL_BOOL shortPreamble;
2011 1.1 dyoung struct ath_node *an;
2012 1.2 dyoung ath_txq_critsect_decl(s);
2013 1.1 dyoung
2014 1.1 dyoung wh = mtod(m0, struct ieee80211_frame *);
2015 1.1 dyoung iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
2016 1.1 dyoung hdrlen = sizeof(struct ieee80211_frame);
2017 1.1 dyoung pktlen = m0->m_pkthdr.len;
2018 1.1 dyoung
2019 1.1 dyoung if (iswep) {
2020 1.1 dyoung memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen);
2021 1.1 dyoung m_adj(m0, hdrlen);
2022 1.1 dyoung M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT);
2023 1.1 dyoung if (m0 == NULL) {
2024 1.1 dyoung sc->sc_stats.ast_tx_nombuf++;
2025 1.1 dyoung return ENOMEM;
2026 1.1 dyoung }
2027 1.1 dyoung ivp = hdrbuf + hdrlen;
2028 1.1 dyoung /*
2029 1.1 dyoung * XXX
2030 1.1 dyoung * IV must not duplicate during the lifetime of the key.
2031 1.1 dyoung * But no mechanism to renew keys is defined in IEEE 802.11
2032 1.1 dyoung * WEP. And IV may be duplicated between other stations
2033 1.1 dyoung * because of the session key itself is shared.
2034 1.1 dyoung * So we use pseudo random IV for now, though it is not the
2035 1.1 dyoung * right way.
2036 1.1 dyoung */
2037 1.1 dyoung iv = arc4random();
2038 1.1 dyoung for (i = 0; i < IEEE80211_WEP_IVLEN; i++) {
2039 1.1 dyoung ivp[i] = iv;
2040 1.1 dyoung iv >>= 8;
2041 1.1 dyoung }
2042 1.1 dyoung ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */
2043 1.1 dyoung memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf));
2044 1.1 dyoung /*
2045 1.1 dyoung * The ICV length must be included into hdrlen and pktlen.
2046 1.1 dyoung */
2047 1.1 dyoung hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN;
2048 1.1 dyoung pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN;
2049 1.1 dyoung }
2050 1.1 dyoung pktlen += IEEE80211_CRC_LEN;
2051 1.1 dyoung
2052 1.1 dyoung /*
2053 1.1 dyoung * Load the DMA map so any coalescing is done. This
2054 1.1 dyoung * also calculates the number of descriptors we need.
2055 1.1 dyoung */
2056 1.2 dyoung error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT);
2057 1.1 dyoung if (error != 0) {
2058 1.1 dyoung sc->sc_stats.ast_tx_busdma++;
2059 1.1 dyoung m_freem(m0);
2060 1.1 dyoung return error;
2061 1.1 dyoung }
2062 1.1 dyoung /*
2063 1.1 dyoung * Discard null packets and check for packets that
2064 1.1 dyoung * require too many TX descriptors. We try to convert
2065 1.1 dyoung * the latter to a cluster.
2066 1.1 dyoung */
2067 1.1 dyoung if (bf->bf_nseg > ATH_TXDESC) { /* too many desc's, linearize */
2068 1.1 dyoung sc->sc_stats.ast_tx_linear++;
2069 1.1 dyoung MGETHDR(m, M_DONTWAIT, MT_DATA);
2070 1.1 dyoung if (m == NULL) {
2071 1.1 dyoung sc->sc_stats.ast_tx_nombuf++;
2072 1.1 dyoung m_freem(m0);
2073 1.1 dyoung return ENOMEM;
2074 1.1 dyoung }
2075 1.2 dyoung #ifdef __FreeBSD__
2076 1.1 dyoung M_MOVE_PKTHDR(m, m0);
2077 1.2 dyoung #else
2078 1.2 dyoung M_COPY_PKTHDR(m, m0);
2079 1.2 dyoung #endif
2080 1.1 dyoung MCLGET(m, M_DONTWAIT);
2081 1.1 dyoung if ((m->m_flags & M_EXT) == 0) {
2082 1.1 dyoung sc->sc_stats.ast_tx_nomcl++;
2083 1.1 dyoung m_freem(m0);
2084 1.1 dyoung m_free(m);
2085 1.1 dyoung return ENOMEM;
2086 1.1 dyoung }
2087 1.1 dyoung m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
2088 1.1 dyoung m_freem(m0);
2089 1.1 dyoung m->m_len = m->m_pkthdr.len;
2090 1.1 dyoung m0 = m;
2091 1.2 dyoung error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0,
2092 1.2 dyoung BUS_DMA_NOWAIT);
2093 1.1 dyoung if (error != 0) {
2094 1.1 dyoung sc->sc_stats.ast_tx_busdma++;
2095 1.1 dyoung m_freem(m0);
2096 1.1 dyoung return error;
2097 1.1 dyoung }
2098 1.1 dyoung KASSERT(bf->bf_nseg == 1,
2099 1.1 dyoung ("ath_tx_start: packet not one segment; nseg %u",
2100 1.1 dyoung bf->bf_nseg));
2101 1.1 dyoung } else if (bf->bf_nseg == 0) { /* null packet, discard */
2102 1.1 dyoung sc->sc_stats.ast_tx_nodata++;
2103 1.1 dyoung m_freem(m0);
2104 1.1 dyoung return EIO;
2105 1.1 dyoung }
2106 1.1 dyoung DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen));
2107 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
2108 1.1 dyoung bf->bf_m = m0;
2109 1.1 dyoung bf->bf_node = ni; /* NB: held reference */
2110 1.1 dyoung
2111 1.1 dyoung /* setup descriptors */
2112 1.1 dyoung ds = bf->bf_desc;
2113 1.1 dyoung rt = sc->sc_currates;
2114 1.1 dyoung KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2115 1.1 dyoung
2116 1.1 dyoung /*
2117 1.1 dyoung * Calculate Atheros packet type from IEEE80211 packet header
2118 1.1 dyoung * and setup for rate calculations.
2119 1.1 dyoung */
2120 1.1 dyoung atype = HAL_PKT_TYPE_NORMAL; /* default */
2121 1.1 dyoung switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
2122 1.1 dyoung case IEEE80211_FC0_TYPE_MGT:
2123 1.1 dyoung subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2124 1.1 dyoung if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
2125 1.1 dyoung atype = HAL_PKT_TYPE_BEACON;
2126 1.1 dyoung else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
2127 1.1 dyoung atype = HAL_PKT_TYPE_PROBE_RESP;
2128 1.1 dyoung else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
2129 1.1 dyoung atype = HAL_PKT_TYPE_ATIM;
2130 1.1 dyoung rix = 0; /* XXX lowest rate */
2131 1.1 dyoung break;
2132 1.1 dyoung case IEEE80211_FC0_TYPE_CTL:
2133 1.1 dyoung subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2134 1.1 dyoung if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL)
2135 1.1 dyoung atype = HAL_PKT_TYPE_PSPOLL;
2136 1.1 dyoung rix = 0; /* XXX lowest rate */
2137 1.1 dyoung break;
2138 1.1 dyoung default:
2139 1.1 dyoung rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] &
2140 1.1 dyoung IEEE80211_RATE_VAL];
2141 1.1 dyoung if (rix == 0xff) {
2142 1.1 dyoung if_printf(ifp, "bogus xmit rate 0x%x\n",
2143 1.1 dyoung ni->ni_rates.rs_rates[ni->ni_txrate]);
2144 1.1 dyoung sc->sc_stats.ast_tx_badrate++;
2145 1.1 dyoung m_freem(m0);
2146 1.1 dyoung return EIO;
2147 1.1 dyoung }
2148 1.1 dyoung break;
2149 1.1 dyoung }
2150 1.1 dyoung /*
2151 1.1 dyoung * NB: the 802.11 layer marks whether or not we should
2152 1.1 dyoung * use short preamble based on the current mode and
2153 1.1 dyoung * negotiated parameters.
2154 1.1 dyoung */
2155 1.1 dyoung if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) {
2156 1.1 dyoung txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble;
2157 1.1 dyoung shortPreamble = AH_TRUE;
2158 1.1 dyoung sc->sc_stats.ast_tx_shortpre++;
2159 1.1 dyoung } else {
2160 1.1 dyoung txrate = rt->info[rix].rateCode;
2161 1.1 dyoung shortPreamble = AH_FALSE;
2162 1.1 dyoung }
2163 1.1 dyoung
2164 1.1 dyoung /*
2165 1.1 dyoung * Calculate miscellaneous flags.
2166 1.1 dyoung */
2167 1.1 dyoung flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */
2168 1.1 dyoung if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2169 1.1 dyoung flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
2170 1.1 dyoung sc->sc_stats.ast_tx_noack++;
2171 1.1 dyoung } else if (pktlen > ic->ic_rtsthreshold) {
2172 1.1 dyoung flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
2173 1.1 dyoung sc->sc_stats.ast_tx_rts++;
2174 1.1 dyoung }
2175 1.1 dyoung
2176 1.1 dyoung /*
2177 1.1 dyoung * Calculate RTS/CTS rate and duration if needed.
2178 1.1 dyoung */
2179 1.1 dyoung ctsduration = 0;
2180 1.1 dyoung if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
2181 1.1 dyoung /*
2182 1.1 dyoung * CTS transmit rate is derived from the transmit rate
2183 1.1 dyoung * by looking in the h/w rate table. We must also factor
2184 1.1 dyoung * in whether or not a short preamble is to be used.
2185 1.1 dyoung */
2186 1.1 dyoung cix = rt->info[rix].controlRate;
2187 1.1 dyoung ctsrate = rt->info[cix].rateCode;
2188 1.1 dyoung if (shortPreamble)
2189 1.1 dyoung ctsrate |= rt->info[cix].shortPreamble;
2190 1.1 dyoung /*
2191 1.1 dyoung * Compute the transmit duration based on the size
2192 1.1 dyoung * of an ACK frame. We call into the HAL to do the
2193 1.1 dyoung * computation since it depends on the characteristics
2194 1.1 dyoung * of the actual PHY being used.
2195 1.1 dyoung */
2196 1.1 dyoung if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */
2197 1.1 dyoung ctsduration += ath_hal_computetxtime(ah,
2198 1.1 dyoung rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
2199 1.1 dyoung }
2200 1.1 dyoung /* SIFS + data */
2201 1.1 dyoung ctsduration += ath_hal_computetxtime(ah,
2202 1.1 dyoung rt, pktlen, rix, shortPreamble);
2203 1.1 dyoung if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */
2204 1.1 dyoung ctsduration += ath_hal_computetxtime(ah,
2205 1.1 dyoung rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
2206 1.1 dyoung }
2207 1.1 dyoung } else
2208 1.1 dyoung ctsrate = 0;
2209 1.1 dyoung
2210 1.1 dyoung /*
2211 1.1 dyoung * For now use the antenna on which the last good
2212 1.1 dyoung * frame was received on. We assume this field is
2213 1.1 dyoung * initialized to 0 which gives us ``auto'' or the
2214 1.1 dyoung * ``default'' antenna.
2215 1.1 dyoung */
2216 1.1 dyoung an = (struct ath_node *) ni;
2217 1.1 dyoung if (an->an_tx_antenna)
2218 1.1 dyoung antenna = an->an_tx_antenna;
2219 1.1 dyoung else
2220 1.1 dyoung antenna = an->an_rx_antenna;
2221 1.1 dyoung
2222 1.1 dyoung /*
2223 1.1 dyoung * Formulate first tx descriptor with tx controls.
2224 1.1 dyoung */
2225 1.1 dyoung /* XXX check return value? */
2226 1.1 dyoung ath_hal_setuptxdesc(ah, ds
2227 1.1 dyoung , pktlen /* packet length */
2228 1.1 dyoung , hdrlen /* header length */
2229 1.1 dyoung , atype /* Atheros packet type */
2230 1.1 dyoung , 60 /* txpower XXX */
2231 1.1 dyoung , txrate, 1+10 /* series 0 rate/tries */
2232 1.1 dyoung , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID
2233 1.1 dyoung , antenna /* antenna mode */
2234 1.1 dyoung , flags /* flags */
2235 1.1 dyoung , ctsrate /* rts/cts rate */
2236 1.1 dyoung , ctsduration /* rts/cts duration */
2237 1.1 dyoung );
2238 1.1 dyoung #ifdef notyet
2239 1.1 dyoung ath_hal_setupxtxdesc(ah, ds
2240 1.1 dyoung , AH_FALSE /* short preamble */
2241 1.1 dyoung , 0, 0 /* series 1 rate/tries */
2242 1.1 dyoung , 0, 0 /* series 2 rate/tries */
2243 1.1 dyoung , 0, 0 /* series 3 rate/tries */
2244 1.1 dyoung );
2245 1.1 dyoung #endif
2246 1.1 dyoung /*
2247 1.1 dyoung * Fillin the remainder of the descriptor info.
2248 1.1 dyoung */
2249 1.1 dyoung for (i = 0; i < bf->bf_nseg; i++, ds++) {
2250 1.1 dyoung ds->ds_data = bf->bf_segs[i].ds_addr;
2251 1.1 dyoung if (i == bf->bf_nseg - 1)
2252 1.1 dyoung ds->ds_link = 0;
2253 1.1 dyoung else
2254 1.1 dyoung ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
2255 1.1 dyoung ath_hal_filltxdesc(ah, ds
2256 1.1 dyoung , bf->bf_segs[i].ds_len /* segment length */
2257 1.1 dyoung , i == 0 /* first segment */
2258 1.1 dyoung , i == bf->bf_nseg - 1 /* last segment */
2259 1.1 dyoung );
2260 1.1 dyoung DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n",
2261 1.1 dyoung i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1,
2262 1.1 dyoung ds->ds_hw[0], ds->ds_hw[1]));
2263 1.1 dyoung }
2264 1.1 dyoung
2265 1.1 dyoung /*
2266 1.1 dyoung * Insert the frame on the outbound list and
2267 1.1 dyoung * pass it on to the hardware.
2268 1.1 dyoung */
2269 1.2 dyoung ath_txq_critsect_begin(sc, s);
2270 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
2271 1.1 dyoung if (sc->sc_txlink == NULL) {
2272 1.1 dyoung ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr);
2273 1.1 dyoung DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n",
2274 1.1 dyoung (caddr_t)bf->bf_daddr, bf->bf_desc));
2275 1.1 dyoung } else {
2276 1.1 dyoung *sc->sc_txlink = bf->bf_daddr;
2277 1.1 dyoung DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n",
2278 1.1 dyoung sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc));
2279 1.1 dyoung }
2280 1.1 dyoung sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
2281 1.2 dyoung ath_txq_critsect_end(sc, s);
2282 1.1 dyoung
2283 1.1 dyoung ath_hal_txstart(ah, sc->sc_txhalq);
2284 1.1 dyoung return 0;
2285 1.1 dyoung }
2286 1.1 dyoung
2287 1.1 dyoung static void
2288 1.1 dyoung ath_tx_proc(void *arg, int npending)
2289 1.1 dyoung {
2290 1.1 dyoung struct ath_softc *sc = arg;
2291 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2292 1.1 dyoung struct ath_buf *bf;
2293 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2294 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
2295 1.1 dyoung struct ath_desc *ds;
2296 1.1 dyoung struct ieee80211_node *ni;
2297 1.1 dyoung struct ath_node *an;
2298 1.1 dyoung int sr, lr;
2299 1.1 dyoung HAL_STATUS status;
2300 1.2 dyoung ath_txq_critsect_decl(s);
2301 1.2 dyoung ath_txbuf_critsect_decl(s2);
2302 1.1 dyoung
2303 1.1 dyoung DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n",
2304 1.1 dyoung npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq),
2305 1.1 dyoung sc->sc_txlink));
2306 1.1 dyoung for (;;) {
2307 1.2 dyoung ath_txq_critsect_begin(sc, s);
2308 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_txq);
2309 1.1 dyoung if (bf == NULL) {
2310 1.1 dyoung sc->sc_txlink = NULL;
2311 1.2 dyoung ath_txq_critsect_end(sc, s);
2312 1.1 dyoung break;
2313 1.1 dyoung }
2314 1.1 dyoung /* only the last descriptor is needed */
2315 1.1 dyoung ds = &bf->bf_desc[bf->bf_nseg - 1];
2316 1.1 dyoung status = ath_hal_txprocdesc(ah, ds);
2317 1.1 dyoung #ifdef AR_DEBUG
2318 1.1 dyoung if (ath_debug > 1)
2319 1.1 dyoung ath_printtxbuf(bf, status == HAL_OK);
2320 1.1 dyoung #endif
2321 1.1 dyoung if (status == HAL_EINPROGRESS) {
2322 1.2 dyoung ath_txq_critsect_end(sc, s);
2323 1.1 dyoung break;
2324 1.1 dyoung }
2325 1.1 dyoung TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
2326 1.2 dyoung ath_txq_critsect_end(sc, s);
2327 1.1 dyoung
2328 1.1 dyoung ni = bf->bf_node;
2329 1.1 dyoung if (ni != NULL) {
2330 1.1 dyoung an = (struct ath_node *) ni;
2331 1.1 dyoung if (ds->ds_txstat.ts_status == 0) {
2332 1.1 dyoung an->an_tx_ok++;
2333 1.1 dyoung an->an_tx_antenna = ds->ds_txstat.ts_antenna;
2334 1.1 dyoung } else {
2335 1.1 dyoung an->an_tx_err++;
2336 1.1 dyoung ifp->if_oerrors++;
2337 1.1 dyoung if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY)
2338 1.1 dyoung sc->sc_stats.ast_tx_xretries++;
2339 1.1 dyoung if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO)
2340 1.1 dyoung sc->sc_stats.ast_tx_fifoerr++;
2341 1.1 dyoung if (ds->ds_txstat.ts_status & HAL_TXERR_FILT)
2342 1.1 dyoung sc->sc_stats.ast_tx_filtered++;
2343 1.1 dyoung an->an_tx_antenna = 0; /* invalidate */
2344 1.1 dyoung }
2345 1.1 dyoung sr = ds->ds_txstat.ts_shortretry;
2346 1.1 dyoung lr = ds->ds_txstat.ts_longretry;
2347 1.1 dyoung sc->sc_stats.ast_tx_shortretry += sr;
2348 1.1 dyoung sc->sc_stats.ast_tx_longretry += lr;
2349 1.1 dyoung if (sr + lr)
2350 1.1 dyoung an->an_tx_retr++;
2351 1.1 dyoung /*
2352 1.1 dyoung * Reclaim reference to node.
2353 1.1 dyoung *
2354 1.1 dyoung * NB: the node may be reclaimed here if, for example
2355 1.1 dyoung * this is a DEAUTH message that was sent and the
2356 1.1 dyoung * node was timed out due to inactivity.
2357 1.1 dyoung */
2358 1.1 dyoung if (ni != ic->ic_bss)
2359 1.1 dyoung ieee80211_free_node(ic, ni);
2360 1.1 dyoung }
2361 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE);
2362 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2363 1.1 dyoung m_freem(bf->bf_m);
2364 1.1 dyoung bf->bf_m = NULL;
2365 1.1 dyoung bf->bf_node = NULL;
2366 1.1 dyoung
2367 1.2 dyoung ath_txbuf_critsect_begin(sc, s2);
2368 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2369 1.2 dyoung ath_txbuf_critsect_end(sc, s2);
2370 1.1 dyoung }
2371 1.1 dyoung ifp->if_flags &= ~IFF_OACTIVE;
2372 1.1 dyoung sc->sc_tx_timer = 0;
2373 1.1 dyoung
2374 1.1 dyoung ath_start(ifp);
2375 1.1 dyoung }
2376 1.1 dyoung
2377 1.1 dyoung /*
2378 1.1 dyoung * Drain the transmit queue and reclaim resources.
2379 1.1 dyoung */
2380 1.1 dyoung static void
2381 1.1 dyoung ath_draintxq(struct ath_softc *sc)
2382 1.1 dyoung {
2383 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2384 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
2385 1.1 dyoung struct ath_buf *bf;
2386 1.2 dyoung ath_txq_critsect_decl(s);
2387 1.2 dyoung ath_txbuf_critsect_decl(s2);
2388 1.1 dyoung
2389 1.1 dyoung /* XXX return value */
2390 1.1 dyoung if (!sc->sc_invalid) {
2391 1.1 dyoung /* don't touch the hardware if marked invalid */
2392 1.1 dyoung (void) ath_hal_stoptxdma(ah, sc->sc_txhalq);
2393 1.1 dyoung DPRINTF(("ath_draintxq: tx queue %p, link %p\n",
2394 1.1 dyoung (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq),
2395 1.1 dyoung sc->sc_txlink));
2396 1.1 dyoung (void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
2397 1.1 dyoung DPRINTF(("ath_draintxq: beacon queue %p\n",
2398 1.1 dyoung (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq)));
2399 1.1 dyoung }
2400 1.1 dyoung for (;;) {
2401 1.2 dyoung ath_txq_critsect_begin(sc, s);
2402 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_txq);
2403 1.1 dyoung if (bf == NULL) {
2404 1.1 dyoung sc->sc_txlink = NULL;
2405 1.2 dyoung ath_txq_critsect_end(sc, s);
2406 1.1 dyoung break;
2407 1.1 dyoung }
2408 1.1 dyoung TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
2409 1.2 dyoung ath_txq_critsect_end(sc, s);
2410 1.1 dyoung #ifdef AR_DEBUG
2411 1.1 dyoung if (ath_debug)
2412 1.1 dyoung ath_printtxbuf(bf,
2413 1.1 dyoung ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK);
2414 1.1 dyoung #endif /* AR_DEBUG */
2415 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2416 1.1 dyoung m_freem(bf->bf_m);
2417 1.1 dyoung bf->bf_m = NULL;
2418 1.1 dyoung bf->bf_node = NULL;
2419 1.2 dyoung ath_txbuf_critsect_begin(sc, s2);
2420 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2421 1.2 dyoung ath_txbuf_critsect_end(sc, s2);
2422 1.1 dyoung }
2423 1.1 dyoung ifp->if_flags &= ~IFF_OACTIVE;
2424 1.1 dyoung sc->sc_tx_timer = 0;
2425 1.1 dyoung }
2426 1.1 dyoung
2427 1.1 dyoung /*
2428 1.1 dyoung * Disable the receive h/w in preparation for a reset.
2429 1.1 dyoung */
2430 1.1 dyoung static void
2431 1.1 dyoung ath_stoprecv(struct ath_softc *sc)
2432 1.1 dyoung {
2433 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2434 1.1 dyoung
2435 1.1 dyoung ath_hal_stoppcurecv(ah); /* disable PCU */
2436 1.1 dyoung ath_hal_setrxfilter(ah, 0); /* clear recv filter */
2437 1.1 dyoung ath_hal_stopdmarecv(ah); /* disable DMA engine */
2438 1.1 dyoung DELAY(3000); /* long enough for 1 frame */
2439 1.1 dyoung #ifdef AR_DEBUG
2440 1.1 dyoung if (ath_debug) {
2441 1.1 dyoung struct ath_buf *bf;
2442 1.1 dyoung
2443 1.1 dyoung DPRINTF(("ath_stoprecv: rx queue %p, link %p\n",
2444 1.1 dyoung (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink));
2445 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
2446 1.1 dyoung if (ath_hal_rxprocdesc(ah, bf->bf_desc) == HAL_OK)
2447 1.1 dyoung ath_printrxbuf(bf, 1);
2448 1.1 dyoung }
2449 1.1 dyoung }
2450 1.1 dyoung #endif
2451 1.1 dyoung sc->sc_rxlink = NULL; /* just in case */
2452 1.1 dyoung }
2453 1.1 dyoung
2454 1.1 dyoung /*
2455 1.1 dyoung * Enable the receive h/w following a reset.
2456 1.1 dyoung */
2457 1.1 dyoung static int
2458 1.1 dyoung ath_startrecv(struct ath_softc *sc)
2459 1.1 dyoung {
2460 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2461 1.1 dyoung struct ath_buf *bf;
2462 1.1 dyoung
2463 1.1 dyoung sc->sc_rxlink = NULL;
2464 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
2465 1.1 dyoung int error = ath_rxbuf_init(sc, bf);
2466 1.1 dyoung if (error != 0) {
2467 1.1 dyoung DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n",
2468 1.1 dyoung error));
2469 1.1 dyoung return error;
2470 1.1 dyoung }
2471 1.1 dyoung }
2472 1.1 dyoung
2473 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_rxbuf);
2474 1.1 dyoung ath_hal_putrxbuf(ah, bf->bf_daddr);
2475 1.1 dyoung ath_hal_rxena(ah); /* enable recv descriptors */
2476 1.1 dyoung ath_mode_init(sc); /* set filters, etc. */
2477 1.1 dyoung ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
2478 1.1 dyoung return 0;
2479 1.1 dyoung }
2480 1.1 dyoung
2481 1.1 dyoung /*
2482 1.1 dyoung * Set/change channels. If the channel is really being changed,
2483 1.1 dyoung * it's done by resetting the chip. To accomplish this we must
2484 1.1 dyoung * first cleanup any pending DMA, then restart stuff after a la
2485 1.1 dyoung * ath_init.
2486 1.1 dyoung */
2487 1.1 dyoung static int
2488 1.1 dyoung ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
2489 1.1 dyoung {
2490 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2491 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2492 1.1 dyoung
2493 1.1 dyoung DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n",
2494 1.1 dyoung ieee80211_chan2ieee(ic, ic->ic_ibss_chan),
2495 1.1 dyoung ic->ic_ibss_chan->ic_freq,
2496 1.1 dyoung ieee80211_chan2ieee(ic, chan), chan->ic_freq));
2497 1.1 dyoung if (chan != ic->ic_ibss_chan) {
2498 1.1 dyoung HAL_STATUS status;
2499 1.1 dyoung HAL_CHANNEL hchan;
2500 1.1 dyoung enum ieee80211_phymode mode;
2501 1.1 dyoung
2502 1.1 dyoung /*
2503 1.1 dyoung * To switch channels clear any pending DMA operations;
2504 1.1 dyoung * wait long enough for the RX fifo to drain, reset the
2505 1.1 dyoung * hardware at the new frequency, and then re-enable
2506 1.1 dyoung * the relevant bits of the h/w.
2507 1.1 dyoung */
2508 1.1 dyoung ath_hal_intrset(ah, 0); /* disable interrupts */
2509 1.1 dyoung ath_draintxq(sc); /* clear pending tx frames */
2510 1.1 dyoung ath_stoprecv(sc); /* turn off frame recv */
2511 1.1 dyoung /*
2512 1.1 dyoung * Convert to a HAL channel description with
2513 1.1 dyoung * the flags constrained to reflect the current
2514 1.1 dyoung * operating mode.
2515 1.1 dyoung */
2516 1.1 dyoung hchan.channel = chan->ic_freq;
2517 1.1 dyoung hchan.channelFlags = ath_chan2flags(ic, chan);
2518 1.1 dyoung if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) {
2519 1.1 dyoung if_printf(&ic->ic_if, "ath_chan_set: unable to reset "
2520 1.1 dyoung "channel %u (%u Mhz)\n",
2521 1.1 dyoung ieee80211_chan2ieee(ic, chan), chan->ic_freq);
2522 1.1 dyoung return EIO;
2523 1.1 dyoung }
2524 1.1 dyoung /*
2525 1.1 dyoung * Re-enable rx framework.
2526 1.1 dyoung */
2527 1.1 dyoung if (ath_startrecv(sc) != 0) {
2528 1.1 dyoung if_printf(&ic->ic_if,
2529 1.1 dyoung "ath_chan_set: unable to restart recv logic\n");
2530 1.1 dyoung return EIO;
2531 1.1 dyoung }
2532 1.1 dyoung
2533 1.1 dyoung /*
2534 1.1 dyoung * Update BPF state.
2535 1.1 dyoung */
2536 1.1 dyoung sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
2537 1.1 dyoung htole16(chan->ic_freq);
2538 1.1 dyoung sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
2539 1.1 dyoung htole16(chan->ic_flags);
2540 1.1 dyoung
2541 1.1 dyoung /*
2542 1.1 dyoung * Change channels and update the h/w rate map
2543 1.1 dyoung * if we're switching; e.g. 11a to 11b/g.
2544 1.1 dyoung */
2545 1.1 dyoung ic->ic_ibss_chan = chan;
2546 1.1 dyoung mode = ieee80211_chan2mode(ic, chan);
2547 1.1 dyoung if (mode != sc->sc_curmode)
2548 1.1 dyoung ath_setcurmode(sc, mode);
2549 1.1 dyoung
2550 1.1 dyoung /*
2551 1.1 dyoung * Re-enable interrupts.
2552 1.1 dyoung */
2553 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
2554 1.1 dyoung }
2555 1.1 dyoung return 0;
2556 1.1 dyoung }
2557 1.1 dyoung
2558 1.1 dyoung static void
2559 1.1 dyoung ath_next_scan(void *arg)
2560 1.1 dyoung {
2561 1.1 dyoung struct ath_softc *sc = arg;
2562 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2563 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
2564 1.2 dyoung int s;
2565 1.2 dyoung
2566 1.2 dyoung /* don't call ath_start w/o network interrupts blocked */
2567 1.2 dyoung s = splnet();
2568 1.1 dyoung
2569 1.1 dyoung if (ic->ic_state == IEEE80211_S_SCAN)
2570 1.1 dyoung ieee80211_next_scan(ifp);
2571 1.2 dyoung splx(s);
2572 1.1 dyoung }
2573 1.1 dyoung
2574 1.1 dyoung /*
2575 1.1 dyoung * Periodically recalibrate the PHY to account
2576 1.1 dyoung * for temperature/environment changes.
2577 1.1 dyoung */
2578 1.1 dyoung static void
2579 1.1 dyoung ath_calibrate(void *arg)
2580 1.1 dyoung {
2581 1.1 dyoung struct ath_softc *sc = arg;
2582 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2583 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2584 1.1 dyoung struct ieee80211_channel *c;
2585 1.1 dyoung HAL_CHANNEL hchan;
2586 1.1 dyoung
2587 1.1 dyoung sc->sc_stats.ast_per_cal++;
2588 1.1 dyoung
2589 1.1 dyoung /*
2590 1.1 dyoung * Convert to a HAL channel description with the flags
2591 1.1 dyoung * constrained to reflect the current operating mode.
2592 1.1 dyoung */
2593 1.1 dyoung c = ic->ic_ibss_chan;
2594 1.1 dyoung hchan.channel = c->ic_freq;
2595 1.1 dyoung hchan.channelFlags = ath_chan2flags(ic, c);
2596 1.1 dyoung
2597 1.1 dyoung DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags));
2598 1.1 dyoung
2599 1.1 dyoung if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
2600 1.1 dyoung /*
2601 1.1 dyoung * Rfgain is out of bounds, reset the chip
2602 1.1 dyoung * to load new gain values.
2603 1.1 dyoung */
2604 1.1 dyoung sc->sc_stats.ast_per_rfgain++;
2605 1.1 dyoung ath_reset(sc);
2606 1.1 dyoung }
2607 1.1 dyoung if (!ath_hal_calibrate(ah, &hchan)) {
2608 1.1 dyoung DPRINTF(("%s: calibration of channel %u failed\n",
2609 1.1 dyoung __func__, c->ic_freq));
2610 1.1 dyoung sc->sc_stats.ast_per_calfail++;
2611 1.1 dyoung }
2612 1.1 dyoung callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc);
2613 1.1 dyoung }
2614 1.1 dyoung
2615 1.1 dyoung static int
2616 1.1 dyoung ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
2617 1.1 dyoung {
2618 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
2619 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
2620 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2621 1.1 dyoung struct ieee80211_node *ni;
2622 1.1 dyoung int i, error;
2623 1.1 dyoung u_int8_t *bssid;
2624 1.1 dyoung u_int32_t rfilt;
2625 1.1 dyoung static const HAL_LED_STATE leds[] = {
2626 1.1 dyoung HAL_LED_INIT, /* IEEE80211_S_INIT */
2627 1.1 dyoung HAL_LED_SCAN, /* IEEE80211_S_SCAN */
2628 1.1 dyoung HAL_LED_AUTH, /* IEEE80211_S_AUTH */
2629 1.1 dyoung HAL_LED_ASSOC, /* IEEE80211_S_ASSOC */
2630 1.1 dyoung HAL_LED_RUN, /* IEEE80211_S_RUN */
2631 1.1 dyoung };
2632 1.1 dyoung
2633 1.1 dyoung DPRINTF(("%s: %s -> %s\n", __func__,
2634 1.1 dyoung ieee80211_state_name[ic->ic_state],
2635 1.1 dyoung ieee80211_state_name[nstate]));
2636 1.1 dyoung
2637 1.1 dyoung ath_hal_setledstate(ah, leds[nstate]); /* set LED */
2638 1.1 dyoung
2639 1.1 dyoung if (nstate == IEEE80211_S_INIT) {
2640 1.1 dyoung sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
2641 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
2642 1.1 dyoung callout_stop(&sc->sc_scan_ch);
2643 1.1 dyoung callout_stop(&sc->sc_cal_ch);
2644 1.1 dyoung return (*sc->sc_newstate)(ic, nstate, arg);
2645 1.1 dyoung }
2646 1.1 dyoung ni = ic->ic_bss;
2647 1.1 dyoung error = ath_chan_set(sc, ni->ni_chan);
2648 1.1 dyoung if (error != 0)
2649 1.1 dyoung goto bad;
2650 1.1 dyoung rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
2651 1.1 dyoung | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
2652 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_STA)
2653 1.1 dyoung rfilt |= HAL_RX_FILTER_PROBEREQ;
2654 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2655 1.1 dyoung (ifp->if_flags & IFF_PROMISC))
2656 1.1 dyoung rfilt |= HAL_RX_FILTER_PROM;
2657 1.1 dyoung if (nstate == IEEE80211_S_SCAN) {
2658 1.1 dyoung callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000,
2659 1.1 dyoung ath_next_scan, sc);
2660 1.1 dyoung bssid = ifp->if_broadcastaddr;
2661 1.1 dyoung rfilt |= HAL_RX_FILTER_BEACON;
2662 1.1 dyoung } else {
2663 1.1 dyoung callout_stop(&sc->sc_scan_ch);
2664 1.1 dyoung bssid = ni->ni_bssid;
2665 1.1 dyoung }
2666 1.1 dyoung ath_hal_setrxfilter(ah, rfilt);
2667 1.1 dyoung DPRINTF(("%s: RX filter 0x%x bssid %s\n",
2668 1.1 dyoung __func__, rfilt, ether_sprintf(bssid)));
2669 1.1 dyoung
2670 1.1 dyoung if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA)
2671 1.1 dyoung ath_hal_setassocid(ah, bssid, ni->ni_associd);
2672 1.1 dyoung else
2673 1.1 dyoung ath_hal_setassocid(ah, bssid, 0);
2674 1.1 dyoung if (ic->ic_flags & IEEE80211_F_WEPON) {
2675 1.1 dyoung for (i = 0; i < IEEE80211_WEP_NKID; i++)
2676 1.1 dyoung if (ath_hal_keyisvalid(ah, i))
2677 1.1 dyoung ath_hal_keysetmac(ah, i, bssid);
2678 1.1 dyoung }
2679 1.1 dyoung
2680 1.1 dyoung if (nstate == IEEE80211_S_RUN) {
2681 1.1 dyoung DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s "
2682 1.1 dyoung "capinfo=0x%04x chan=%d\n"
2683 1.1 dyoung , __func__
2684 1.1 dyoung , ic->ic_flags
2685 1.1 dyoung , ni->ni_intval
2686 1.1 dyoung , ether_sprintf(ni->ni_bssid)
2687 1.1 dyoung , ni->ni_capinfo
2688 1.1 dyoung , ieee80211_chan2ieee(ic, ni->ni_chan)));
2689 1.1 dyoung
2690 1.1 dyoung /*
2691 1.1 dyoung * Allocate and setup the beacon frame for AP or adhoc mode.
2692 1.1 dyoung */
2693 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
2694 1.1 dyoung ic->ic_opmode == IEEE80211_M_IBSS) {
2695 1.1 dyoung error = ath_beacon_alloc(sc, ni);
2696 1.1 dyoung if (error != 0)
2697 1.1 dyoung goto bad;
2698 1.1 dyoung }
2699 1.1 dyoung
2700 1.1 dyoung /*
2701 1.1 dyoung * Configure the beacon and sleep timers.
2702 1.1 dyoung */
2703 1.1 dyoung ath_beacon_config(sc);
2704 1.1 dyoung
2705 1.1 dyoung /* start periodic recalibration timer */
2706 1.1 dyoung callout_reset(&sc->sc_cal_ch, hz * ath_calinterval,
2707 1.1 dyoung ath_calibrate, sc);
2708 1.1 dyoung } else {
2709 1.1 dyoung sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
2710 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
2711 1.1 dyoung callout_stop(&sc->sc_cal_ch); /* no calibration */
2712 1.1 dyoung }
2713 1.1 dyoung /*
2714 1.1 dyoung * Reset the rate control state.
2715 1.1 dyoung */
2716 1.1 dyoung ath_rate_ctl_reset(sc, nstate);
2717 1.1 dyoung /*
2718 1.1 dyoung * Invoke the parent method to complete the work.
2719 1.1 dyoung */
2720 1.1 dyoung return (*sc->sc_newstate)(ic, nstate, arg);
2721 1.1 dyoung bad:
2722 1.1 dyoung callout_stop(&sc->sc_scan_ch);
2723 1.1 dyoung callout_stop(&sc->sc_cal_ch);
2724 1.1 dyoung /* NB: do not invoke the parent */
2725 1.1 dyoung return error;
2726 1.1 dyoung }
2727 1.1 dyoung
2728 1.1 dyoung /*
2729 1.1 dyoung * Setup driver-specific state for a newly associated node.
2730 1.1 dyoung * Note that we're called also on a re-associate, the isnew
2731 1.1 dyoung * param tells us if this is the first time or not.
2732 1.1 dyoung */
2733 1.1 dyoung static void
2734 1.1 dyoung ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
2735 1.1 dyoung {
2736 1.1 dyoung if (isnew) {
2737 1.1 dyoung struct ath_node *an = (struct ath_node *) ni;
2738 1.1 dyoung
2739 1.1 dyoung an->an_tx_ok = an->an_tx_err =
2740 1.1 dyoung an->an_tx_retr = an->an_tx_upper = 0;
2741 1.1 dyoung /* start with highest negotiated rate */
2742 1.1 dyoung /*
2743 1.1 dyoung * XXX should do otherwise but only when
2744 1.1 dyoung * the rate control algorithm is better.
2745 1.1 dyoung */
2746 1.1 dyoung KASSERT(ni->ni_rates.rs_nrates > 0,
2747 1.1 dyoung ("new association w/ no rates!"));
2748 1.1 dyoung ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
2749 1.1 dyoung }
2750 1.1 dyoung }
2751 1.1 dyoung
2752 1.1 dyoung static int
2753 1.1 dyoung ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor)
2754 1.1 dyoung {
2755 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2756 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
2757 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2758 1.1 dyoung HAL_CHANNEL *chans;
2759 1.1 dyoung int i, ix, nchan;
2760 1.1 dyoung
2761 1.1 dyoung sc->sc_have11g = 0;
2762 1.1 dyoung chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL),
2763 1.1 dyoung M_TEMP, M_NOWAIT);
2764 1.1 dyoung if (chans == NULL) {
2765 1.1 dyoung if_printf(ifp, "unable to allocate channel table\n");
2766 1.1 dyoung return ENOMEM;
2767 1.1 dyoung }
2768 1.1 dyoung if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
2769 1.1 dyoung cc, HAL_MODE_ALL, outdoor)) {
2770 1.1 dyoung if_printf(ifp, "unable to collect channel list from hal\n");
2771 1.1 dyoung free(chans, M_TEMP);
2772 1.1 dyoung return EINVAL;
2773 1.1 dyoung }
2774 1.1 dyoung
2775 1.1 dyoung /*
2776 1.1 dyoung * Convert HAL channels to ieee80211 ones and insert
2777 1.1 dyoung * them in the table according to their channel number.
2778 1.1 dyoung */
2779 1.1 dyoung for (i = 0; i < nchan; i++) {
2780 1.1 dyoung HAL_CHANNEL *c = &chans[i];
2781 1.1 dyoung ix = ath_hal_mhz2ieee(c->channel, c->channelFlags);
2782 1.1 dyoung if (ix > IEEE80211_CHAN_MAX) {
2783 1.1 dyoung if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n",
2784 1.1 dyoung ix, c->channel, c->channelFlags);
2785 1.1 dyoung continue;
2786 1.1 dyoung }
2787 1.1 dyoung /* NB: flags are known to be compatible */
2788 1.1 dyoung if (ic->ic_channels[ix].ic_freq == 0) {
2789 1.1 dyoung ic->ic_channels[ix].ic_freq = c->channel;
2790 1.1 dyoung ic->ic_channels[ix].ic_flags = c->channelFlags;
2791 1.1 dyoung } else {
2792 1.1 dyoung /* channels overlap; e.g. 11g and 11b */
2793 1.1 dyoung ic->ic_channels[ix].ic_flags |= c->channelFlags;
2794 1.1 dyoung }
2795 1.1 dyoung if ((c->channelFlags & CHANNEL_G) == CHANNEL_G)
2796 1.1 dyoung sc->sc_have11g = 1;
2797 1.1 dyoung }
2798 1.1 dyoung free(chans, M_TEMP);
2799 1.1 dyoung return 0;
2800 1.1 dyoung }
2801 1.1 dyoung
2802 1.1 dyoung static int
2803 1.1 dyoung ath_rate_setup(struct ath_softc *sc, u_int mode)
2804 1.1 dyoung {
2805 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2806 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2807 1.1 dyoung const HAL_RATE_TABLE *rt;
2808 1.1 dyoung struct ieee80211_rateset *rs;
2809 1.1 dyoung int i, maxrates;
2810 1.1 dyoung
2811 1.1 dyoung switch (mode) {
2812 1.1 dyoung case IEEE80211_MODE_11A:
2813 1.1 dyoung sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A);
2814 1.1 dyoung break;
2815 1.1 dyoung case IEEE80211_MODE_11B:
2816 1.1 dyoung sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B);
2817 1.1 dyoung break;
2818 1.1 dyoung case IEEE80211_MODE_11G:
2819 1.1 dyoung sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G);
2820 1.1 dyoung break;
2821 1.1 dyoung case IEEE80211_MODE_TURBO:
2822 1.1 dyoung sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO);
2823 1.1 dyoung break;
2824 1.1 dyoung default:
2825 1.1 dyoung DPRINTF(("%s: invalid mode %u\n", __func__, mode));
2826 1.1 dyoung return 0;
2827 1.1 dyoung }
2828 1.1 dyoung rt = sc->sc_rates[mode];
2829 1.1 dyoung if (rt == NULL)
2830 1.1 dyoung return 0;
2831 1.1 dyoung if (rt->rateCount > IEEE80211_RATE_MAXSIZE) {
2832 1.1 dyoung DPRINTF(("%s: rate table too small (%u > %u)\n",
2833 1.1 dyoung __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE));
2834 1.1 dyoung maxrates = IEEE80211_RATE_MAXSIZE;
2835 1.1 dyoung } else
2836 1.1 dyoung maxrates = rt->rateCount;
2837 1.1 dyoung rs = &ic->ic_sup_rates[mode];
2838 1.1 dyoung for (i = 0; i < maxrates; i++)
2839 1.1 dyoung rs->rs_rates[i] = rt->info[i].dot11Rate;
2840 1.1 dyoung rs->rs_nrates = maxrates;
2841 1.1 dyoung return 1;
2842 1.1 dyoung }
2843 1.1 dyoung
2844 1.1 dyoung static void
2845 1.1 dyoung ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
2846 1.1 dyoung {
2847 1.1 dyoung const HAL_RATE_TABLE *rt;
2848 1.1 dyoung int i;
2849 1.1 dyoung
2850 1.1 dyoung memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
2851 1.1 dyoung rt = sc->sc_rates[mode];
2852 1.1 dyoung KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
2853 1.1 dyoung for (i = 0; i < rt->rateCount; i++)
2854 1.1 dyoung sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i;
2855 1.1 dyoung memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
2856 1.1 dyoung for (i = 0; i < 32; i++)
2857 1.1 dyoung sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate;
2858 1.1 dyoung sc->sc_currates = rt;
2859 1.1 dyoung sc->sc_curmode = mode;
2860 1.1 dyoung }
2861 1.1 dyoung
2862 1.1 dyoung /*
2863 1.1 dyoung * Reset the rate control state for each 802.11 state transition.
2864 1.1 dyoung */
2865 1.1 dyoung static void
2866 1.1 dyoung ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state)
2867 1.1 dyoung {
2868 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2869 1.1 dyoung struct ieee80211_node *ni;
2870 1.1 dyoung struct ath_node *an;
2871 1.1 dyoung
2872 1.1 dyoung an = (struct ath_node *) ic->ic_bss;
2873 1.1 dyoung an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0;
2874 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_STA) {
2875 1.1 dyoung ni = ic->ic_bss;
2876 1.1 dyoung if (state == IEEE80211_S_RUN) {
2877 1.1 dyoung /* start with highest negotiated rate */
2878 1.1 dyoung KASSERT(ni->ni_rates.rs_nrates > 0,
2879 1.1 dyoung ("transition to RUN state w/ no rates!"));
2880 1.1 dyoung ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
2881 1.1 dyoung } else {
2882 1.1 dyoung /* use lowest rate */
2883 1.1 dyoung ni->ni_txrate = 0;
2884 1.1 dyoung }
2885 1.1 dyoung } else {
2886 1.1 dyoung TAILQ_FOREACH(ni, &ic->ic_node, ni_list) {
2887 1.1 dyoung ni->ni_txrate = 0; /* use lowest rate */
2888 1.1 dyoung an = (struct ath_node *) ni;
2889 1.1 dyoung an->an_tx_ok = an->an_tx_err = an->an_tx_retr =
2890 1.1 dyoung an->an_tx_upper = 0;
2891 1.1 dyoung }
2892 1.1 dyoung }
2893 1.1 dyoung }
2894 1.1 dyoung
2895 1.1 dyoung /*
2896 1.1 dyoung * Examine and potentially adjust the transmit rate.
2897 1.1 dyoung */
2898 1.1 dyoung static void
2899 1.1 dyoung ath_rate_ctl(void *arg, struct ieee80211_node *ni)
2900 1.1 dyoung {
2901 1.1 dyoung struct ath_softc *sc = arg;
2902 1.1 dyoung struct ath_node *an = (struct ath_node *) ni;
2903 1.1 dyoung struct ieee80211_rateset *rs = &ni->ni_rates;
2904 1.1 dyoung int mod = 0, orate, enough;
2905 1.1 dyoung
2906 1.1 dyoung /*
2907 1.1 dyoung * Rate control
2908 1.1 dyoung * XXX: very primitive version.
2909 1.1 dyoung */
2910 1.1 dyoung sc->sc_stats.ast_rate_calls++;
2911 1.1 dyoung
2912 1.1 dyoung enough = (an->an_tx_ok + an->an_tx_err >= 10);
2913 1.1 dyoung
2914 1.1 dyoung /* no packet reached -> down */
2915 1.1 dyoung if (an->an_tx_err > 0 && an->an_tx_ok == 0)
2916 1.1 dyoung mod = -1;
2917 1.1 dyoung
2918 1.1 dyoung /* all packets needs retry in average -> down */
2919 1.1 dyoung if (enough && an->an_tx_ok < an->an_tx_retr)
2920 1.1 dyoung mod = -1;
2921 1.1 dyoung
2922 1.1 dyoung /* no error and less than 10% of packets needs retry -> up */
2923 1.1 dyoung if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10)
2924 1.1 dyoung mod = 1;
2925 1.1 dyoung
2926 1.1 dyoung orate = ni->ni_txrate;
2927 1.1 dyoung switch (mod) {
2928 1.1 dyoung case 0:
2929 1.1 dyoung if (enough && an->an_tx_upper > 0)
2930 1.1 dyoung an->an_tx_upper--;
2931 1.1 dyoung break;
2932 1.1 dyoung case -1:
2933 1.1 dyoung if (ni->ni_txrate > 0) {
2934 1.1 dyoung ni->ni_txrate--;
2935 1.1 dyoung sc->sc_stats.ast_rate_drop++;
2936 1.1 dyoung }
2937 1.1 dyoung an->an_tx_upper = 0;
2938 1.1 dyoung break;
2939 1.1 dyoung case 1:
2940 1.1 dyoung if (++an->an_tx_upper < 2)
2941 1.1 dyoung break;
2942 1.1 dyoung an->an_tx_upper = 0;
2943 1.1 dyoung if (ni->ni_txrate + 1 < rs->rs_nrates) {
2944 1.1 dyoung ni->ni_txrate++;
2945 1.1 dyoung sc->sc_stats.ast_rate_raise++;
2946 1.1 dyoung }
2947 1.1 dyoung break;
2948 1.1 dyoung }
2949 1.1 dyoung
2950 1.1 dyoung if (ni->ni_txrate != orate) {
2951 1.1 dyoung printf("%s: %dM -> %dM (%d ok, %d err, %d retr)\n",
2952 1.1 dyoung __func__,
2953 1.1 dyoung (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2,
2954 1.1 dyoung (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2,
2955 1.1 dyoung an->an_tx_ok, an->an_tx_err, an->an_tx_retr);
2956 1.1 dyoung }
2957 1.1 dyoung if (ni->ni_txrate != orate || enough)
2958 1.1 dyoung an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0;
2959 1.1 dyoung }
2960 1.1 dyoung
2961 1.1 dyoung #ifdef AR_DEBUG
2962 1.2 dyoung #ifdef __FreeBSD__
2963 1.1 dyoung static int
2964 1.1 dyoung sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
2965 1.1 dyoung {
2966 1.1 dyoung char dmode[64];
2967 1.1 dyoung int error;
2968 1.1 dyoung
2969 1.1 dyoung strncpy(dmode, "", sizeof(dmode) - 1);
2970 1.1 dyoung dmode[sizeof(dmode) - 1] = '\0';
2971 1.1 dyoung error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
2972 1.1 dyoung
2973 1.1 dyoung if (error == 0 && req->newptr != NULL) {
2974 1.1 dyoung struct ifnet *ifp;
2975 1.1 dyoung struct ath_softc *sc;
2976 1.1 dyoung
2977 1.1 dyoung ifp = ifunit("ath0"); /* XXX */
2978 1.1 dyoung if (!ifp)
2979 1.1 dyoung return EINVAL;
2980 1.1 dyoung sc = ifp->if_softc;
2981 1.1 dyoung if (strcmp(dmode, "hal") == 0)
2982 1.1 dyoung ath_hal_dumpstate(sc->sc_ah);
2983 1.1 dyoung else if (strcmp(dmode, "eeprom") == 0)
2984 1.1 dyoung ath_hal_dumpeeprom(sc->sc_ah);
2985 1.1 dyoung else if (strcmp(dmode, "rfgain") == 0)
2986 1.1 dyoung ath_hal_dumprfgain(sc->sc_ah);
2987 1.1 dyoung else if (strcmp(dmode, "ani") == 0)
2988 1.1 dyoung ath_hal_dumpani(sc->sc_ah);
2989 1.1 dyoung else
2990 1.1 dyoung return EINVAL;
2991 1.1 dyoung }
2992 1.1 dyoung return error;
2993 1.1 dyoung }
2994 1.1 dyoung SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
2995 1.1 dyoung 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
2996 1.2 dyoung #endif /* __FreeBSD__ */
2997 1.1 dyoung
2998 1.1 dyoung static void
2999 1.1 dyoung ath_printrxbuf(struct ath_buf *bf, int done)
3000 1.1 dyoung {
3001 1.1 dyoung struct ath_desc *ds;
3002 1.1 dyoung int i;
3003 1.1 dyoung
3004 1.1 dyoung for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
3005 1.1 dyoung printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n",
3006 1.1 dyoung i, ds, (struct ath_desc *)bf->bf_daddr + i,
3007 1.1 dyoung ds->ds_link, ds->ds_data,
3008 1.1 dyoung ds->ds_ctl0, ds->ds_ctl1,
3009 1.1 dyoung ds->ds_hw[0], ds->ds_hw[1],
3010 1.1 dyoung !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!');
3011 1.1 dyoung }
3012 1.1 dyoung }
3013 1.1 dyoung
3014 1.1 dyoung static void
3015 1.1 dyoung ath_printtxbuf(struct ath_buf *bf, int done)
3016 1.1 dyoung {
3017 1.1 dyoung struct ath_desc *ds;
3018 1.1 dyoung int i;
3019 1.1 dyoung
3020 1.1 dyoung for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
3021 1.1 dyoung printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n",
3022 1.1 dyoung i, ds, (struct ath_desc *)bf->bf_daddr + i,
3023 1.1 dyoung ds->ds_link, ds->ds_data,
3024 1.1 dyoung ds->ds_ctl0, ds->ds_ctl1,
3025 1.1 dyoung ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3],
3026 1.1 dyoung !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!');
3027 1.1 dyoung }
3028 1.1 dyoung }
3029 1.1 dyoung #endif /* AR_DEBUG */
3030