ath.c revision 1.34 1 1.34 yamt /* $NetBSD: ath.c,v 1.34 2004/08/08 13:01:03 yamt Exp $ */
2 1.9 itojun
3 1.1 dyoung /*-
4 1.25 dyoung * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
5 1.1 dyoung * All rights reserved.
6 1.1 dyoung *
7 1.1 dyoung * Redistribution and use in source and binary forms, with or without
8 1.1 dyoung * modification, are permitted provided that the following conditions
9 1.1 dyoung * are met:
10 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
11 1.1 dyoung * notice, this list of conditions and the following disclaimer,
12 1.1 dyoung * without modification.
13 1.1 dyoung * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 1.1 dyoung * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 1.1 dyoung * redistribution must be conditioned upon including a substantially
16 1.1 dyoung * similar Disclaimer requirement for further binary redistribution.
17 1.1 dyoung * 3. Neither the names of the above-listed copyright holders nor the names
18 1.1 dyoung * of any contributors may be used to endorse or promote products derived
19 1.1 dyoung * from this software without specific prior written permission.
20 1.1 dyoung *
21 1.1 dyoung * Alternatively, this software may be distributed under the terms of the
22 1.1 dyoung * GNU General Public License ("GPL") version 2 as published by the Free
23 1.1 dyoung * Software Foundation.
24 1.1 dyoung *
25 1.1 dyoung * NO WARRANTY
26 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 1.1 dyoung * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 1.1 dyoung * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
29 1.1 dyoung * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
30 1.1 dyoung * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
31 1.1 dyoung * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 dyoung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 dyoung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
34 1.1 dyoung * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 dyoung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
36 1.1 dyoung * THE POSSIBILITY OF SUCH DAMAGES.
37 1.1 dyoung */
38 1.1 dyoung
39 1.1 dyoung #include <sys/cdefs.h>
40 1.2 dyoung #ifdef __FreeBSD__
41 1.25 dyoung __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.54 2004/04/05 04:42:42 sam Exp $");
42 1.2 dyoung #endif
43 1.2 dyoung #ifdef __NetBSD__
44 1.34 yamt __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.34 2004/08/08 13:01:03 yamt Exp $");
45 1.2 dyoung #endif
46 1.1 dyoung
47 1.1 dyoung /*
48 1.1 dyoung * Driver for the Atheros Wireless LAN controller.
49 1.1 dyoung *
50 1.1 dyoung * This software is derived from work of Atsushi Onoe; his contribution
51 1.1 dyoung * is greatly appreciated.
52 1.1 dyoung */
53 1.1 dyoung
54 1.1 dyoung #include "opt_inet.h"
55 1.1 dyoung
56 1.2 dyoung #ifdef __NetBSD__
57 1.2 dyoung #include "bpfilter.h"
58 1.2 dyoung #endif /* __NetBSD__ */
59 1.2 dyoung
60 1.1 dyoung #include <sys/param.h>
61 1.1 dyoung #include <sys/systm.h>
62 1.2 dyoung #include <sys/types.h>
63 1.1 dyoung #include <sys/sysctl.h>
64 1.1 dyoung #include <sys/mbuf.h>
65 1.1 dyoung #include <sys/malloc.h>
66 1.1 dyoung #include <sys/lock.h>
67 1.2 dyoung #ifdef __FreeBSD__
68 1.1 dyoung #include <sys/mutex.h>
69 1.2 dyoung #endif
70 1.1 dyoung #include <sys/kernel.h>
71 1.1 dyoung #include <sys/socket.h>
72 1.1 dyoung #include <sys/sockio.h>
73 1.1 dyoung #include <sys/errno.h>
74 1.1 dyoung #include <sys/callout.h>
75 1.2 dyoung #ifdef __FreeBSD__
76 1.1 dyoung #include <sys/bus.h>
77 1.2 dyoung #else
78 1.2 dyoung #include <machine/bus.h>
79 1.2 dyoung #endif
80 1.1 dyoung #include <sys/endian.h>
81 1.1 dyoung
82 1.1 dyoung #include <machine/bus.h>
83 1.1 dyoung
84 1.1 dyoung #include <net/if.h>
85 1.1 dyoung #include <net/if_dl.h>
86 1.1 dyoung #include <net/if_media.h>
87 1.1 dyoung #include <net/if_arp.h>
88 1.2 dyoung #ifdef __FreeBSD__
89 1.1 dyoung #include <net/ethernet.h>
90 1.2 dyoung #else
91 1.2 dyoung #include <net/if_ether.h>
92 1.2 dyoung #endif
93 1.1 dyoung #include <net/if_llc.h>
94 1.1 dyoung
95 1.1 dyoung #include <net80211/ieee80211_var.h>
96 1.2 dyoung #include <net80211/ieee80211_compat.h>
97 1.1 dyoung
98 1.2 dyoung #if NBPFILTER > 0
99 1.1 dyoung #include <net/bpf.h>
100 1.2 dyoung #endif
101 1.1 dyoung
102 1.1 dyoung #ifdef INET
103 1.1 dyoung #include <netinet/in.h>
104 1.1 dyoung #endif
105 1.1 dyoung
106 1.2 dyoung #include <dev/ic/athcompat.h>
107 1.2 dyoung
108 1.1 dyoung #define AR_DEBUG
109 1.2 dyoung #ifdef __FreeBSD__
110 1.1 dyoung #include <dev/ath/if_athvar.h>
111 1.1 dyoung #include <contrib/dev/ath/ah_desc.h>
112 1.2 dyoung #else
113 1.2 dyoung #include <dev/ic/athvar.h>
114 1.2 dyoung #include <../contrib/sys/dev/ic/athhal_desc.h>
115 1.2 dyoung #endif
116 1.1 dyoung
117 1.15 wiz /* unaligned little endian access */
118 1.1 dyoung #define LE_READ_2(p) \
119 1.1 dyoung ((u_int16_t) \
120 1.1 dyoung ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8)))
121 1.1 dyoung #define LE_READ_4(p) \
122 1.1 dyoung ((u_int32_t) \
123 1.1 dyoung ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \
124 1.1 dyoung (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
125 1.1 dyoung
126 1.2 dyoung #ifdef __FreeBSD__
127 1.1 dyoung static void ath_init(void *);
128 1.2 dyoung #else
129 1.2 dyoung static int ath_init(struct ifnet *);
130 1.2 dyoung #endif
131 1.2 dyoung static int ath_init1(struct ath_softc *);
132 1.2 dyoung static int ath_intr1(struct ath_softc *);
133 1.1 dyoung static void ath_stop(struct ifnet *);
134 1.1 dyoung static void ath_start(struct ifnet *);
135 1.1 dyoung static void ath_reset(struct ath_softc *);
136 1.1 dyoung static int ath_media_change(struct ifnet *);
137 1.1 dyoung static void ath_watchdog(struct ifnet *);
138 1.1 dyoung static int ath_ioctl(struct ifnet *, u_long, caddr_t);
139 1.1 dyoung static void ath_fatal_proc(void *, int);
140 1.1 dyoung static void ath_rxorn_proc(void *, int);
141 1.1 dyoung static void ath_bmiss_proc(void *, int);
142 1.1 dyoung static void ath_initkeytable(struct ath_softc *);
143 1.1 dyoung static void ath_mode_init(struct ath_softc *);
144 1.1 dyoung static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
145 1.1 dyoung static void ath_beacon_proc(void *, int);
146 1.1 dyoung static void ath_beacon_free(struct ath_softc *);
147 1.1 dyoung static void ath_beacon_config(struct ath_softc *);
148 1.1 dyoung static int ath_desc_alloc(struct ath_softc *);
149 1.1 dyoung static void ath_desc_free(struct ath_softc *);
150 1.1 dyoung static struct ieee80211_node *ath_node_alloc(struct ieee80211com *);
151 1.1 dyoung static void ath_node_free(struct ieee80211com *, struct ieee80211_node *);
152 1.1 dyoung static void ath_node_copy(struct ieee80211com *,
153 1.1 dyoung struct ieee80211_node *, const struct ieee80211_node *);
154 1.18 dyoung static u_int8_t ath_node_getrssi(struct ieee80211com *,
155 1.18 dyoung struct ieee80211_node *);
156 1.1 dyoung static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
157 1.1 dyoung static void ath_rx_proc(void *, int);
158 1.1 dyoung static int ath_tx_start(struct ath_softc *, struct ieee80211_node *,
159 1.1 dyoung struct ath_buf *, struct mbuf *);
160 1.1 dyoung static void ath_tx_proc(void *, int);
161 1.1 dyoung static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
162 1.1 dyoung static void ath_draintxq(struct ath_softc *);
163 1.1 dyoung static void ath_stoprecv(struct ath_softc *);
164 1.1 dyoung static int ath_startrecv(struct ath_softc *);
165 1.1 dyoung static void ath_next_scan(void *);
166 1.1 dyoung static void ath_calibrate(void *);
167 1.1 dyoung static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int);
168 1.1 dyoung static void ath_newassoc(struct ieee80211com *,
169 1.1 dyoung struct ieee80211_node *, int);
170 1.21 dyoung static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor,
171 1.21 dyoung HAL_BOOL xchanmode);
172 1.1 dyoung
173 1.1 dyoung static int ath_rate_setup(struct ath_softc *sc, u_int mode);
174 1.1 dyoung static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
175 1.1 dyoung static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state);
176 1.1 dyoung static void ath_rate_ctl(void *, struct ieee80211_node *);
177 1.1 dyoung
178 1.3 ichiro #ifdef __NetBSD__
179 1.3 ichiro int ath_enable(struct ath_softc *);
180 1.3 ichiro void ath_disable(struct ath_softc *);
181 1.3 ichiro void ath_power(int, void *);
182 1.3 ichiro #endif
183 1.3 ichiro
184 1.2 dyoung #ifdef __FreeBSD__
185 1.1 dyoung SYSCTL_DECL(_hw_ath);
186 1.1 dyoung /* XXX validate sysctl values */
187 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime,
188 1.1 dyoung 0, "channel dwell time (ms) for AP/station scanning");
189 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval,
190 1.1 dyoung 0, "chip calibration interval (secs)");
191 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor,
192 1.1 dyoung 0, "enable/disable outdoor operation");
193 1.25 dyoung TUNABLE_INT("hw.ath.outdoor", &ath_outdoor);
194 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode,
195 1.1 dyoung 0, "country code");
196 1.25 dyoung TUNABLE_INT("hw.ath.countrycode", &ath_countrycode);
197 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain,
198 1.1 dyoung 0, "regulatory domain");
199 1.2 dyoung #endif /* __FreeBSD__ */
200 1.2 dyoung
201 1.20 dyoung #ifdef __NetBSD__
202 1.20 dyoung static int ath_dwelltime_nodenum, ath_calibrate_nodenum, ath_outdoor_nodenum,
203 1.20 dyoung ath_countrycode_nodenum, ath_regdomain_nodenum, ath_debug_nodenum;
204 1.20 dyoung #endif /* __NetBSD__ */
205 1.20 dyoung
206 1.2 dyoung static int ath_dwelltime = 200; /* 5 channels/second */
207 1.2 dyoung static int ath_calinterval = 30; /* calibrate every 30 secs */
208 1.2 dyoung static int ath_outdoor = AH_TRUE; /* outdoor operation */
209 1.21 dyoung static int ath_xchanmode = AH_TRUE; /* enable extended channels */
210 1.2 dyoung static int ath_countrycode = CTRY_DEFAULT; /* country code */
211 1.2 dyoung static int ath_regdomain = 0; /* regulatory domain */
212 1.1 dyoung
213 1.1 dyoung #ifdef AR_DEBUG
214 1.1 dyoung int ath_debug = 0;
215 1.2 dyoung #ifdef __FreeBSD__
216 1.1 dyoung SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
217 1.1 dyoung 0, "control debugging printfs");
218 1.25 dyoung TUNABLE_INT("hw.ath.debug", &ath_debug);
219 1.2 dyoung #endif /* __FreeBSD__ */
220 1.25 dyoung #define IFF_DUMPPKTS(_ifp, _m) \
221 1.25 dyoung ((ath_debug & _m) || \
222 1.1 dyoung ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
223 1.1 dyoung static void ath_printrxbuf(struct ath_buf *bf, int);
224 1.1 dyoung static void ath_printtxbuf(struct ath_buf *bf, int);
225 1.25 dyoung enum {
226 1.25 dyoung ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
227 1.25 dyoung ATH_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */
228 1.25 dyoung ATH_DEBUG_RECV = 0x00000004, /* basic recv operation */
229 1.25 dyoung ATH_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */
230 1.25 dyoung ATH_DEBUG_RATE = 0x00000010, /* rate control */
231 1.25 dyoung ATH_DEBUG_RESET = 0x00000020, /* reset processing */
232 1.25 dyoung ATH_DEBUG_MODE = 0x00000040, /* mode init/setup */
233 1.25 dyoung ATH_DEBUG_BEACON = 0x00000080, /* beacon handling */
234 1.25 dyoung ATH_DEBUG_WATCHDOG = 0x00000100, /* watchdog timeout */
235 1.25 dyoung ATH_DEBUG_INTR = 0x00001000, /* ISR */
236 1.25 dyoung ATH_DEBUG_TX_PROC = 0x00002000, /* tx ISR proc */
237 1.25 dyoung ATH_DEBUG_RX_PROC = 0x00004000, /* rx ISR proc */
238 1.25 dyoung ATH_DEBUG_BEACON_PROC = 0x00008000, /* beacon ISR proc */
239 1.25 dyoung ATH_DEBUG_CALIBRATE = 0x00010000, /* periodic calibration */
240 1.25 dyoung ATH_DEBUG_ANY = 0xffffffff
241 1.25 dyoung };
242 1.25 dyoung #define DPRINTF(_m,X) if (ath_debug & (_m)) printf X
243 1.1 dyoung #else
244 1.25 dyoung #define IFF_DUMPPKTS(_ifp, _m) \
245 1.1 dyoung (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
246 1.25 dyoung #define DPRINTF(_m, X)
247 1.1 dyoung #endif
248 1.1 dyoung
249 1.3 ichiro #ifdef __NetBSD__
250 1.3 ichiro int
251 1.3 ichiro ath_activate(struct device *self, enum devact act)
252 1.3 ichiro {
253 1.3 ichiro struct ath_softc *sc = (struct ath_softc *)self;
254 1.3 ichiro int rv = 0, s;
255 1.3 ichiro
256 1.3 ichiro s = splnet();
257 1.3 ichiro switch (act) {
258 1.3 ichiro case DVACT_ACTIVATE:
259 1.3 ichiro rv = EOPNOTSUPP;
260 1.3 ichiro break;
261 1.3 ichiro case DVACT_DEACTIVATE:
262 1.3 ichiro if_deactivate(&sc->sc_ic.ic_if);
263 1.3 ichiro break;
264 1.3 ichiro }
265 1.3 ichiro splx(s);
266 1.3 ichiro return rv;
267 1.3 ichiro }
268 1.3 ichiro
269 1.3 ichiro int
270 1.3 ichiro ath_enable(struct ath_softc *sc)
271 1.3 ichiro {
272 1.3 ichiro if (ATH_IS_ENABLED(sc) == 0) {
273 1.3 ichiro if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
274 1.3 ichiro printf("%s: device enable failed\n",
275 1.3 ichiro sc->sc_dev.dv_xname);
276 1.3 ichiro return (EIO);
277 1.3 ichiro }
278 1.3 ichiro sc->sc_flags |= ATH_ENABLED;
279 1.3 ichiro }
280 1.3 ichiro return (0);
281 1.3 ichiro }
282 1.3 ichiro
283 1.3 ichiro void
284 1.3 ichiro ath_disable(struct ath_softc *sc)
285 1.3 ichiro {
286 1.3 ichiro if (!ATH_IS_ENABLED(sc))
287 1.3 ichiro return;
288 1.3 ichiro if (sc->sc_disable != NULL)
289 1.3 ichiro (*sc->sc_disable)(sc);
290 1.3 ichiro sc->sc_flags &= ~ATH_ENABLED;
291 1.3 ichiro }
292 1.20 dyoung
293 1.20 dyoung static int
294 1.20 dyoung sysctl_ath_verify(SYSCTLFN_ARGS)
295 1.20 dyoung {
296 1.20 dyoung int error, t;
297 1.20 dyoung struct sysctlnode node;
298 1.20 dyoung
299 1.20 dyoung node = *rnode;
300 1.20 dyoung t = *(int*)rnode->sysctl_data;
301 1.20 dyoung node.sysctl_data = &t;
302 1.20 dyoung error = sysctl_lookup(SYSCTLFN_CALL(&node));
303 1.20 dyoung if (error || newp == NULL)
304 1.20 dyoung return (error);
305 1.20 dyoung
306 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: t = %d, nodenum = %d, rnodenum = %d\n",
307 1.25 dyoung __func__, t, node.sysctl_num, rnode->sysctl_num));
308 1.20 dyoung
309 1.20 dyoung if (node.sysctl_num == ath_dwelltime_nodenum) {
310 1.20 dyoung if (t <= 0)
311 1.20 dyoung return (EINVAL);
312 1.20 dyoung } else if (node.sysctl_num == ath_calibrate_nodenum) {
313 1.20 dyoung if (t <= 0)
314 1.20 dyoung return (EINVAL);
315 1.20 dyoung #ifdef AR_DEBUG
316 1.20 dyoung } else if (node.sysctl_num == ath_debug_nodenum) {
317 1.20 dyoung if (t < 0 || t > 2)
318 1.20 dyoung return (EINVAL);
319 1.20 dyoung #endif /* AR_DEBUG */
320 1.20 dyoung } else
321 1.20 dyoung return (EINVAL);
322 1.20 dyoung
323 1.20 dyoung *(int*)rnode->sysctl_data = t;
324 1.20 dyoung
325 1.20 dyoung return (0);
326 1.20 dyoung }
327 1.20 dyoung
328 1.20 dyoung /*
329 1.20 dyoung * Setup sysctl(3) MIB, ath.*.
330 1.20 dyoung *
331 1.23 atatat * TBD condition CTLFLAG_PERMANENT on being an LKM or not
332 1.20 dyoung */
333 1.20 dyoung SYSCTL_SETUP(sysctl_ath, "sysctl ath subtree setup")
334 1.20 dyoung {
335 1.24 atatat int rc, ath_node_num;
336 1.23 atatat struct sysctlnode *node;
337 1.20 dyoung
338 1.23 atatat if ((rc = sysctl_createv(clog, 0, NULL, NULL,
339 1.23 atatat CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL,
340 1.23 atatat NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0)
341 1.22 dyoung goto err;
342 1.22 dyoung
343 1.23 atatat if ((rc = sysctl_createv(clog, 0, NULL, &node,
344 1.26 atatat CTLFLAG_PERMANENT, CTLTYPE_NODE, "ath",
345 1.26 atatat SYSCTL_DESCR("ath information and options"),
346 1.23 atatat NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
347 1.20 dyoung goto err;
348 1.20 dyoung
349 1.24 atatat ath_node_num = node->sysctl_num;
350 1.20 dyoung
351 1.20 dyoung /* channel dwell time (ms) for AP/station scanning */
352 1.23 atatat if ((rc = sysctl_createv(clog, 0, NULL, &node,
353 1.23 atatat CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
354 1.26 atatat CTLTYPE_INT, "dwell",
355 1.26 atatat SYSCTL_DESCR("Channel dwell time (ms) for AP/station scanning"),
356 1.26 atatat sysctl_ath_verify, 0, &ath_dwelltime,
357 1.24 atatat 0, CTL_HW, ath_node_num, CTL_CREATE,
358 1.22 dyoung CTL_EOL)) != 0)
359 1.20 dyoung goto err;
360 1.20 dyoung
361 1.20 dyoung ath_dwelltime_nodenum = node->sysctl_num;
362 1.20 dyoung
363 1.20 dyoung /* chip calibration interval (secs) */
364 1.23 atatat if ((rc = sysctl_createv(clog, 0, NULL, &node,
365 1.23 atatat CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
366 1.26 atatat CTLTYPE_INT, "calibrate",
367 1.26 atatat SYSCTL_DESCR("Chip calibration interval (secs)"), sysctl_ath_verify,
368 1.22 dyoung 0, &ath_calinterval, 0, CTL_HW,
369 1.24 atatat ath_node_num, CTL_CREATE, CTL_EOL)) != 0)
370 1.20 dyoung goto err;
371 1.20 dyoung
372 1.20 dyoung ath_calibrate_nodenum = node->sysctl_num;
373 1.20 dyoung
374 1.20 dyoung /* enable/disable outdoor operation */
375 1.23 atatat if ((rc = sysctl_createv(clog, 0, NULL, &node,
376 1.23 atatat CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
377 1.26 atatat "outdoor", SYSCTL_DESCR("Enable/disable outdoor operation"),
378 1.26 atatat NULL, 0, &ath_outdoor, 0,
379 1.24 atatat CTL_HW, ath_node_num, CTL_CREATE,
380 1.22 dyoung CTL_EOL)) != 0)
381 1.20 dyoung goto err;
382 1.20 dyoung
383 1.20 dyoung ath_outdoor_nodenum = node->sysctl_num;
384 1.20 dyoung
385 1.20 dyoung /* country code */
386 1.23 atatat if ((rc = sysctl_createv(clog, 0, NULL, &node,
387 1.23 atatat CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
388 1.26 atatat "countrycode", SYSCTL_DESCR("Country code"),
389 1.26 atatat NULL, 0, &ath_countrycode, 0,
390 1.24 atatat CTL_HW, ath_node_num, CTL_CREATE,
391 1.22 dyoung CTL_EOL)) != 0)
392 1.20 dyoung goto err;
393 1.20 dyoung
394 1.20 dyoung ath_countrycode_nodenum = node->sysctl_num;
395 1.20 dyoung
396 1.20 dyoung /* regulatory domain */
397 1.23 atatat if ((rc = sysctl_createv(clog, 0, NULL, &node,
398 1.23 atatat CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
399 1.26 atatat "regdomain", SYSCTL_DESCR("Regulatory domain"),
400 1.26 atatat NULL, 0, &ath_regdomain, 0,
401 1.24 atatat CTL_HW, ath_node_num, CTL_CREATE,
402 1.22 dyoung CTL_EOL)) != 0)
403 1.20 dyoung goto err;
404 1.20 dyoung
405 1.20 dyoung ath_regdomain_nodenum = node->sysctl_num;
406 1.20 dyoung
407 1.20 dyoung #ifdef AR_DEBUG
408 1.20 dyoung
409 1.20 dyoung /* control debugging printfs */
410 1.23 atatat if ((rc = sysctl_createv(clog, 0, NULL, &node,
411 1.23 atatat CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
412 1.26 atatat "debug", SYSCTL_DESCR("Enable/disable ath debugging output"),
413 1.26 atatat sysctl_ath_verify, 0, &ath_debug, 0,
414 1.24 atatat CTL_HW, ath_node_num, CTL_CREATE,
415 1.22 dyoung CTL_EOL)) != 0)
416 1.20 dyoung goto err;
417 1.20 dyoung
418 1.20 dyoung ath_debug_nodenum = node->sysctl_num;
419 1.20 dyoung
420 1.20 dyoung #endif /* AR_DEBUG */
421 1.20 dyoung return;
422 1.20 dyoung err:
423 1.20 dyoung printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc);
424 1.20 dyoung }
425 1.20 dyoung #endif /* __NetBSD__ */
426 1.3 ichiro
427 1.1 dyoung int
428 1.1 dyoung ath_attach(u_int16_t devid, struct ath_softc *sc)
429 1.1 dyoung {
430 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
431 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
432 1.1 dyoung struct ath_hal *ah;
433 1.1 dyoung HAL_STATUS status;
434 1.31 dyoung HAL_TXQ_INFO qinfo;
435 1.1 dyoung int error = 0;
436 1.1 dyoung
437 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: devid 0x%x\n", __func__, devid));
438 1.1 dyoung
439 1.2 dyoung #ifdef __FreeBSD__
440 1.1 dyoung /* set these up early for if_printf use */
441 1.18 dyoung if_initname(ifp, device_get_name(sc->sc_dev),
442 1.18 dyoung device_get_unit(sc->sc_dev));
443 1.2 dyoung #else
444 1.2 dyoung memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
445 1.2 dyoung #endif
446 1.1 dyoung
447 1.1 dyoung ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
448 1.1 dyoung if (ah == NULL) {
449 1.1 dyoung if_printf(ifp, "unable to attach hardware; HAL status %u\n",
450 1.1 dyoung status);
451 1.1 dyoung error = ENXIO;
452 1.1 dyoung goto bad;
453 1.1 dyoung }
454 1.18 dyoung if (ah->ah_abi != HAL_ABI_VERSION) {
455 1.18 dyoung if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n",
456 1.18 dyoung ah->ah_abi, HAL_ABI_VERSION);
457 1.18 dyoung error = ENXIO;
458 1.18 dyoung goto bad;
459 1.18 dyoung }
460 1.18 dyoung if_printf(ifp, "mac %d.%d phy %d.%d",
461 1.18 dyoung ah->ah_macVersion, ah->ah_macRev,
462 1.18 dyoung ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf);
463 1.18 dyoung if (ah->ah_analog5GhzRev)
464 1.18 dyoung printf(" 5ghz radio %d.%d",
465 1.18 dyoung ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf);
466 1.18 dyoung if (ah->ah_analog2GhzRev)
467 1.18 dyoung printf(" 2ghz radio %d.%d",
468 1.18 dyoung ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf);
469 1.18 dyoung printf("\n");
470 1.1 dyoung sc->sc_ah = ah;
471 1.1 dyoung sc->sc_invalid = 0; /* ready to go, enable interrupt handling */
472 1.1 dyoung
473 1.1 dyoung /*
474 1.1 dyoung * Collect the channel list using the default country
475 1.1 dyoung * code and including outdoor channels. The 802.11 layer
476 1.1 dyoung * is resposible for filtering this list based on settings
477 1.1 dyoung * like the phy mode.
478 1.1 dyoung */
479 1.21 dyoung error = ath_getchannels(sc, ath_countrycode, ath_outdoor,
480 1.21 dyoung ath_xchanmode);
481 1.1 dyoung if (error != 0)
482 1.1 dyoung goto bad;
483 1.1 dyoung /*
484 1.1 dyoung * Copy these back; they are set as a side effect
485 1.1 dyoung * of constructing the channel list.
486 1.1 dyoung */
487 1.31 dyoung ath_hal_getregdomain(ah, &ath_regdomain);
488 1.31 dyoung ath_hal_getcountrycode(ah, &ath_countrycode);
489 1.1 dyoung
490 1.1 dyoung /*
491 1.1 dyoung * Setup rate tables for all potential media types.
492 1.1 dyoung */
493 1.1 dyoung ath_rate_setup(sc, IEEE80211_MODE_11A);
494 1.1 dyoung ath_rate_setup(sc, IEEE80211_MODE_11B);
495 1.1 dyoung ath_rate_setup(sc, IEEE80211_MODE_11G);
496 1.1 dyoung ath_rate_setup(sc, IEEE80211_MODE_TURBO);
497 1.1 dyoung
498 1.1 dyoung error = ath_desc_alloc(sc);
499 1.1 dyoung if (error != 0) {
500 1.1 dyoung if_printf(ifp, "failed to allocate descriptors: %d\n", error);
501 1.1 dyoung goto bad;
502 1.1 dyoung }
503 1.2 dyoung ATH_CALLOUT_INIT(&sc->sc_scan_ch);
504 1.2 dyoung ATH_CALLOUT_INIT(&sc->sc_cal_ch);
505 1.1 dyoung
506 1.2 dyoung #ifdef __FreeBSD__
507 1.18 dyoung ATH_TXBUF_LOCK_INIT(sc);
508 1.18 dyoung ATH_TXQ_LOCK_INIT(sc);
509 1.2 dyoung #endif
510 1.1 dyoung
511 1.2 dyoung ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc);
512 1.2 dyoung ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc);
513 1.2 dyoung ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc);
514 1.2 dyoung ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc);
515 1.2 dyoung ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc);
516 1.1 dyoung
517 1.1 dyoung /*
518 1.1 dyoung * For now just pre-allocate one data queue and one
519 1.1 dyoung * beacon queue. Note that the HAL handles resetting
520 1.1 dyoung * them at the needed time. Eventually we'll want to
521 1.1 dyoung * allocate more tx queues for splitting management
522 1.1 dyoung * frames and for QOS support.
523 1.1 dyoung */
524 1.31 dyoung sc->sc_bhalq = ath_hal_setuptxqueue(ah,HAL_TX_QUEUE_BEACON,NULL);
525 1.31 dyoung if (sc->sc_bhalq == (u_int) -1) {
526 1.31 dyoung if_printf(ifp, "unable to setup a beacon xmit queue!\n");
527 1.31 dyoung goto bad2;
528 1.31 dyoung }
529 1.31 dyoung
530 1.31 dyoung memset(&qinfo, 0, sizeof(qinfo));
531 1.31 dyoung qinfo.tqi_subtype = HAL_WME_AC_BE;
532 1.31 dyoung sc->sc_txhalq = ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_DATA, &qinfo);
533 1.1 dyoung if (sc->sc_txhalq == (u_int) -1) {
534 1.1 dyoung if_printf(ifp, "unable to setup a data xmit queue!\n");
535 1.25 dyoung goto bad2;
536 1.1 dyoung }
537 1.1 dyoung
538 1.1 dyoung ifp->if_softc = sc;
539 1.1 dyoung ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
540 1.1 dyoung ifp->if_start = ath_start;
541 1.1 dyoung ifp->if_watchdog = ath_watchdog;
542 1.1 dyoung ifp->if_ioctl = ath_ioctl;
543 1.1 dyoung ifp->if_init = ath_init;
544 1.2 dyoung #ifdef __FreeBSD__
545 1.1 dyoung ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
546 1.2 dyoung #else
547 1.2 dyoung #if 0
548 1.2 dyoung ifp->if_stop = ath_stop; /* XXX */
549 1.2 dyoung #endif
550 1.2 dyoung IFQ_SET_READY(&ifp->if_snd);
551 1.2 dyoung #endif
552 1.1 dyoung
553 1.1 dyoung ic->ic_softc = sc;
554 1.1 dyoung ic->ic_newassoc = ath_newassoc;
555 1.1 dyoung /* XXX not right but it's not used anywhere important */
556 1.1 dyoung ic->ic_phytype = IEEE80211_T_OFDM;
557 1.1 dyoung ic->ic_opmode = IEEE80211_M_STA;
558 1.18 dyoung ic->ic_caps = IEEE80211_C_WEP /* wep supported */
559 1.18 dyoung | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
560 1.18 dyoung | IEEE80211_C_HOSTAP /* hostap mode */
561 1.18 dyoung | IEEE80211_C_MONITOR /* monitor mode */
562 1.18 dyoung | IEEE80211_C_SHPREAMBLE /* short preamble supported */
563 1.25 dyoung ;
564 1.1 dyoung
565 1.1 dyoung /* get mac address from hardware */
566 1.1 dyoung ath_hal_getmac(ah, ic->ic_myaddr);
567 1.1 dyoung
568 1.2 dyoung #ifdef __NetBSD__
569 1.2 dyoung if_attach(ifp);
570 1.2 dyoung #endif
571 1.1 dyoung /* call MI attach routine. */
572 1.1 dyoung ieee80211_ifattach(ifp);
573 1.1 dyoung /* override default methods */
574 1.1 dyoung ic->ic_node_alloc = ath_node_alloc;
575 1.25 dyoung sc->sc_node_free = ic->ic_node_free;
576 1.1 dyoung ic->ic_node_free = ath_node_free;
577 1.25 dyoung sc->sc_node_copy = ic->ic_node_copy;
578 1.1 dyoung ic->ic_node_copy = ath_node_copy;
579 1.18 dyoung ic->ic_node_getrssi = ath_node_getrssi;
580 1.1 dyoung sc->sc_newstate = ic->ic_newstate;
581 1.1 dyoung ic->ic_newstate = ath_newstate;
582 1.1 dyoung /* complete initialization */
583 1.1 dyoung ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status);
584 1.1 dyoung
585 1.2 dyoung #if NBPFILTER > 0
586 1.1 dyoung bpfattach2(ifp, DLT_IEEE802_11_RADIO,
587 1.1 dyoung sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
588 1.1 dyoung &sc->sc_drvbpf);
589 1.2 dyoung #endif
590 1.1 dyoung /*
591 1.1 dyoung * Initialize constant fields.
592 1.25 dyoung * XXX make header lengths a multiple of 32-bits so subsequent
593 1.25 dyoung * headers are properly aligned; this is a kludge to keep
594 1.25 dyoung * certain applications happy.
595 1.1 dyoung *
596 1.1 dyoung * NB: the channel is setup each time we transition to the
597 1.1 dyoung * RUN state to avoid filling it in for each frame.
598 1.1 dyoung */
599 1.25 dyoung sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(u_int32_t));
600 1.25 dyoung sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len);
601 1.25 dyoung sc->sc_tx_th.wt_ihdr.it_present = htole32(ATH_TX_RADIOTAP_PRESENT);
602 1.25 dyoung
603 1.25 dyoung sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(u_int32_t));
604 1.25 dyoung sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len);
605 1.25 dyoung sc->sc_rx_th.wr_ihdr.it_present = htole32(ATH_RX_RADIOTAP_PRESENT);
606 1.1 dyoung
607 1.3 ichiro #ifdef __NetBSD__
608 1.3 ichiro sc->sc_flags |= ATH_ATTACHED;
609 1.3 ichiro /*
610 1.3 ichiro * Make sure the interface is shutdown during reboot.
611 1.3 ichiro */
612 1.3 ichiro sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc);
613 1.3 ichiro if (sc->sc_sdhook == NULL)
614 1.3 ichiro printf("%s: WARNING: unable to establish shutdown hook\n",
615 1.3 ichiro sc->sc_dev.dv_xname);
616 1.3 ichiro sc->sc_powerhook = powerhook_establish(ath_power, sc);
617 1.3 ichiro if (sc->sc_powerhook == NULL)
618 1.3 ichiro printf("%s: WARNING: unable to establish power hook\n",
619 1.3 ichiro sc->sc_dev.dv_xname);
620 1.3 ichiro #endif
621 1.1 dyoung return 0;
622 1.25 dyoung bad2:
623 1.25 dyoung ath_desc_free(sc);
624 1.1 dyoung bad:
625 1.1 dyoung if (ah)
626 1.1 dyoung ath_hal_detach(ah);
627 1.1 dyoung sc->sc_invalid = 1;
628 1.1 dyoung return error;
629 1.1 dyoung }
630 1.1 dyoung
631 1.1 dyoung int
632 1.1 dyoung ath_detach(struct ath_softc *sc)
633 1.1 dyoung {
634 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
635 1.2 dyoung ath_softc_critsect_decl(s);
636 1.1 dyoung
637 1.3 ichiro if ((sc->sc_flags & ATH_ATTACHED) == 0)
638 1.3 ichiro return (0);
639 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
640 1.1 dyoung
641 1.2 dyoung ath_softc_critsect_begin(sc, s);
642 1.1 dyoung ath_stop(ifp);
643 1.2 dyoung #if NBPFILTER > 0
644 1.1 dyoung bpfdetach(ifp);
645 1.2 dyoung #endif
646 1.1 dyoung ath_desc_free(sc);
647 1.1 dyoung ath_hal_detach(sc->sc_ah);
648 1.1 dyoung ieee80211_ifdetach(ifp);
649 1.2 dyoung #ifdef __NetBSD__
650 1.2 dyoung if_detach(ifp);
651 1.18 dyoung #endif /* __NetBSD__ */
652 1.2 dyoung ath_softc_critsect_end(sc, s);
653 1.10 ichiro #ifdef __NetBSD__
654 1.13 yamt powerhook_disestablish(sc->sc_powerhook);
655 1.13 yamt shutdownhook_disestablish(sc->sc_sdhook);
656 1.18 dyoung #endif /* __NetBSD__ */
657 1.18 dyoung #ifdef __FreeBSD__
658 1.18 dyoung
659 1.18 dyoung ATH_TXBUF_LOCK_DESTROY(sc);
660 1.18 dyoung ATH_TXQ_LOCK_DESTROY(sc);
661 1.18 dyoung
662 1.18 dyoung #endif /* __FreeBSD__ */
663 1.1 dyoung return 0;
664 1.1 dyoung }
665 1.1 dyoung
666 1.10 ichiro #ifdef __NetBSD__
667 1.1 dyoung void
668 1.3 ichiro ath_power(int why, void *arg)
669 1.3 ichiro {
670 1.3 ichiro struct ath_softc *sc = arg;
671 1.3 ichiro int s;
672 1.3 ichiro
673 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("ath_power(%d)\n", why));
674 1.3 ichiro
675 1.3 ichiro s = splnet();
676 1.3 ichiro switch (why) {
677 1.3 ichiro case PWR_SUSPEND:
678 1.3 ichiro case PWR_STANDBY:
679 1.3 ichiro ath_suspend(sc, why);
680 1.3 ichiro break;
681 1.3 ichiro case PWR_RESUME:
682 1.3 ichiro ath_resume(sc, why);
683 1.3 ichiro break;
684 1.3 ichiro case PWR_SOFTSUSPEND:
685 1.3 ichiro case PWR_SOFTSTANDBY:
686 1.3 ichiro case PWR_SOFTRESUME:
687 1.3 ichiro break;
688 1.3 ichiro }
689 1.3 ichiro splx(s);
690 1.3 ichiro }
691 1.10 ichiro #endif
692 1.3 ichiro
693 1.3 ichiro void
694 1.3 ichiro ath_suspend(struct ath_softc *sc, int why)
695 1.1 dyoung {
696 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
697 1.1 dyoung
698 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
699 1.1 dyoung
700 1.1 dyoung ath_stop(ifp);
701 1.3 ichiro if (sc->sc_power != NULL)
702 1.3 ichiro (*sc->sc_power)(sc, why);
703 1.1 dyoung }
704 1.1 dyoung
705 1.1 dyoung void
706 1.3 ichiro ath_resume(struct ath_softc *sc, int why)
707 1.1 dyoung {
708 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
709 1.1 dyoung
710 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
711 1.1 dyoung
712 1.1 dyoung if (ifp->if_flags & IFF_UP) {
713 1.1 dyoung ath_init(ifp);
714 1.3 ichiro #if 0
715 1.3 ichiro (void)ath_intr(sc);
716 1.3 ichiro #endif
717 1.3 ichiro if (sc->sc_power != NULL)
718 1.3 ichiro (*sc->sc_power)(sc, why);
719 1.1 dyoung if (ifp->if_flags & IFF_RUNNING)
720 1.1 dyoung ath_start(ifp);
721 1.1 dyoung }
722 1.1 dyoung }
723 1.1 dyoung
724 1.10 ichiro #ifdef __NetBSD__
725 1.10 ichiro void
726 1.10 ichiro ath_shutdown(void *arg)
727 1.10 ichiro {
728 1.10 ichiro struct ath_softc *sc = arg;
729 1.10 ichiro
730 1.10 ichiro ath_stop(&sc->sc_ic.ic_if);
731 1.10 ichiro }
732 1.10 ichiro #else
733 1.1 dyoung void
734 1.1 dyoung ath_shutdown(struct ath_softc *sc)
735 1.1 dyoung {
736 1.2 dyoung #if 1
737 1.2 dyoung return;
738 1.2 dyoung #else
739 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
740 1.1 dyoung
741 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
742 1.1 dyoung
743 1.1 dyoung ath_stop(ifp);
744 1.2 dyoung #endif
745 1.1 dyoung }
746 1.10 ichiro #endif
747 1.1 dyoung
748 1.2 dyoung #ifdef __NetBSD__
749 1.2 dyoung int
750 1.2 dyoung ath_intr(void *arg)
751 1.2 dyoung {
752 1.2 dyoung return ath_intr1((struct ath_softc *)arg);
753 1.2 dyoung }
754 1.2 dyoung #else
755 1.1 dyoung void
756 1.1 dyoung ath_intr(void *arg)
757 1.1 dyoung {
758 1.2 dyoung (void)ath_intr1((struct ath_softc *)arg);
759 1.2 dyoung }
760 1.2 dyoung #endif
761 1.2 dyoung
762 1.2 dyoung static int
763 1.2 dyoung ath_intr1(struct ath_softc *sc)
764 1.2 dyoung {
765 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
766 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
767 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
768 1.1 dyoung HAL_INT status;
769 1.1 dyoung
770 1.1 dyoung if (sc->sc_invalid) {
771 1.1 dyoung /*
772 1.1 dyoung * The hardware is not ready/present, don't touch anything.
773 1.1 dyoung * Note this can happen early on if the IRQ is shared.
774 1.1 dyoung */
775 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: invalid; ignored\n", __func__));
776 1.2 dyoung return 0;
777 1.1 dyoung }
778 1.25 dyoung if (!ath_hal_intrpend(ah)) /* shared irq, not for us */
779 1.25 dyoung return 0;
780 1.1 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
781 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n",
782 1.25 dyoung __func__, ifp->if_flags));
783 1.1 dyoung ath_hal_getisr(ah, &status); /* clear ISR */
784 1.1 dyoung ath_hal_intrset(ah, 0); /* disable further intr's */
785 1.2 dyoung return 1; /* XXX */
786 1.1 dyoung }
787 1.1 dyoung ath_hal_getisr(ah, &status); /* NB: clears ISR too */
788 1.25 dyoung DPRINTF(ATH_DEBUG_INTR, ("%s: status 0x%x\n", __func__, status));
789 1.18 dyoung status &= sc->sc_imask; /* discard unasked for bits */
790 1.1 dyoung if (status & HAL_INT_FATAL) {
791 1.1 dyoung sc->sc_stats.ast_hardware++;
792 1.1 dyoung ath_hal_intrset(ah, 0); /* disable intr's until reset */
793 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask);
794 1.1 dyoung } else if (status & HAL_INT_RXORN) {
795 1.1 dyoung sc->sc_stats.ast_rxorn++;
796 1.1 dyoung ath_hal_intrset(ah, 0); /* disable intr's until reset */
797 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask);
798 1.1 dyoung } else {
799 1.1 dyoung if (status & HAL_INT_RXEOL) {
800 1.1 dyoung /*
801 1.1 dyoung * NB: the hardware should re-read the link when
802 1.1 dyoung * RXE bit is written, but it doesn't work at
803 1.1 dyoung * least on older hardware revs.
804 1.1 dyoung */
805 1.1 dyoung sc->sc_stats.ast_rxeol++;
806 1.1 dyoung sc->sc_rxlink = NULL;
807 1.1 dyoung }
808 1.1 dyoung if (status & HAL_INT_TXURN) {
809 1.1 dyoung sc->sc_stats.ast_txurn++;
810 1.1 dyoung /* bump tx trigger level */
811 1.1 dyoung ath_hal_updatetxtriglevel(ah, AH_TRUE);
812 1.1 dyoung }
813 1.1 dyoung if (status & HAL_INT_RX)
814 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask);
815 1.1 dyoung if (status & HAL_INT_TX)
816 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask);
817 1.25 dyoung if (status & HAL_INT_SWBA) {
818 1.25 dyoung /*
819 1.25 dyoung * Handle beacon transmission directly; deferring
820 1.25 dyoung * this is too slow to meet timing constraints
821 1.25 dyoung * under load.
822 1.25 dyoung */
823 1.25 dyoung ath_beacon_proc(sc, 0);
824 1.25 dyoung }
825 1.1 dyoung if (status & HAL_INT_BMISS) {
826 1.1 dyoung sc->sc_stats.ast_bmiss++;
827 1.2 dyoung ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask);
828 1.1 dyoung }
829 1.1 dyoung }
830 1.2 dyoung return 1;
831 1.1 dyoung }
832 1.1 dyoung
833 1.1 dyoung static void
834 1.1 dyoung ath_fatal_proc(void *arg, int pending)
835 1.1 dyoung {
836 1.1 dyoung struct ath_softc *sc = arg;
837 1.1 dyoung
838 1.1 dyoung device_printf(sc->sc_dev, "hardware error; resetting\n");
839 1.1 dyoung ath_reset(sc);
840 1.1 dyoung }
841 1.1 dyoung
842 1.1 dyoung static void
843 1.1 dyoung ath_rxorn_proc(void *arg, int pending)
844 1.1 dyoung {
845 1.1 dyoung struct ath_softc *sc = arg;
846 1.1 dyoung
847 1.1 dyoung device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n");
848 1.1 dyoung ath_reset(sc);
849 1.1 dyoung }
850 1.1 dyoung
851 1.1 dyoung static void
852 1.1 dyoung ath_bmiss_proc(void *arg, int pending)
853 1.1 dyoung {
854 1.1 dyoung struct ath_softc *sc = arg;
855 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
856 1.1 dyoung
857 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: pending %u\n", __func__, pending));
858 1.17 dyoung if (ic->ic_opmode != IEEE80211_M_STA)
859 1.17 dyoung return;
860 1.18 dyoung if (ic->ic_state == IEEE80211_S_RUN) {
861 1.18 dyoung /*
862 1.18 dyoung * Rather than go directly to scan state, try to
863 1.18 dyoung * reassociate first. If that fails then the state
864 1.18 dyoung * machine will drop us into scanning after timing
865 1.18 dyoung * out waiting for a probe response.
866 1.18 dyoung */
867 1.18 dyoung ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1);
868 1.18 dyoung }
869 1.1 dyoung }
870 1.1 dyoung
871 1.1 dyoung static u_int
872 1.1 dyoung ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan)
873 1.1 dyoung {
874 1.4 dyoung enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan);
875 1.4 dyoung
876 1.4 dyoung switch (mode) {
877 1.4 dyoung case IEEE80211_MODE_AUTO:
878 1.4 dyoung return 0;
879 1.4 dyoung case IEEE80211_MODE_11A:
880 1.4 dyoung return CHANNEL_A;
881 1.4 dyoung case IEEE80211_MODE_11B:
882 1.4 dyoung return CHANNEL_B;
883 1.4 dyoung case IEEE80211_MODE_11G:
884 1.4 dyoung return CHANNEL_PUREG;
885 1.4 dyoung case IEEE80211_MODE_TURBO:
886 1.4 dyoung return CHANNEL_T;
887 1.4 dyoung default:
888 1.4 dyoung panic("%s: unsupported mode %d\n", __func__, mode);
889 1.4 dyoung return 0;
890 1.4 dyoung }
891 1.1 dyoung }
892 1.1 dyoung
893 1.2 dyoung #ifdef __NetBSD__
894 1.2 dyoung static int
895 1.2 dyoung ath_init(struct ifnet *ifp)
896 1.2 dyoung {
897 1.2 dyoung return ath_init1((struct ath_softc *)ifp->if_softc);
898 1.2 dyoung }
899 1.2 dyoung #else
900 1.1 dyoung static void
901 1.1 dyoung ath_init(void *arg)
902 1.1 dyoung {
903 1.2 dyoung (void)ath_init1((struct ath_softc *)arg);
904 1.2 dyoung }
905 1.2 dyoung #endif
906 1.2 dyoung
907 1.2 dyoung static int
908 1.2 dyoung ath_init1(struct ath_softc *sc)
909 1.2 dyoung {
910 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
911 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
912 1.1 dyoung struct ieee80211_node *ni;
913 1.1 dyoung enum ieee80211_phymode mode;
914 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
915 1.1 dyoung HAL_STATUS status;
916 1.1 dyoung HAL_CHANNEL hchan;
917 1.2 dyoung int error = 0;
918 1.2 dyoung ath_softc_critsect_decl(s);
919 1.1 dyoung
920 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n",
921 1.25 dyoung __func__, ifp->if_flags));
922 1.1 dyoung
923 1.3 ichiro #ifdef __NetBSD__
924 1.3 ichiro if ((error = ath_enable(sc)) != 0)
925 1.3 ichiro return error;
926 1.3 ichiro #endif
927 1.3 ichiro
928 1.2 dyoung ath_softc_critsect_begin(sc, s);
929 1.1 dyoung /*
930 1.1 dyoung * Stop anything previously setup. This is safe
931 1.1 dyoung * whether this is the first time through or not.
932 1.1 dyoung */
933 1.1 dyoung ath_stop(ifp);
934 1.1 dyoung
935 1.1 dyoung /*
936 1.1 dyoung * The basic interface to setting the hardware in a good
937 1.1 dyoung * state is ``reset''. On return the hardware is known to
938 1.1 dyoung * be powered up and with interrupts disabled. This must
939 1.1 dyoung * be followed by initialization of the appropriate bits
940 1.1 dyoung * and then setup of the interrupt mask.
941 1.1 dyoung */
942 1.1 dyoung hchan.channel = ic->ic_ibss_chan->ic_freq;
943 1.1 dyoung hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan);
944 1.1 dyoung if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) {
945 1.1 dyoung if_printf(ifp, "unable to reset hardware; hal status %u\n",
946 1.1 dyoung status);
947 1.34 yamt error = EIO;
948 1.1 dyoung goto done;
949 1.1 dyoung }
950 1.1 dyoung
951 1.1 dyoung /*
952 1.1 dyoung * Setup the hardware after reset: the key cache
953 1.1 dyoung * is filled as needed and the receive engine is
954 1.1 dyoung * set going. Frame transmit is handled entirely
955 1.1 dyoung * in the frame output path; there's nothing to do
956 1.1 dyoung * here except setup the interrupt mask.
957 1.1 dyoung */
958 1.29 mycroft if (ic->ic_flags & IEEE80211_F_PRIVACY)
959 1.1 dyoung ath_initkeytable(sc);
960 1.2 dyoung if ((error = ath_startrecv(sc)) != 0) {
961 1.1 dyoung if_printf(ifp, "unable to start recv logic\n");
962 1.1 dyoung goto done;
963 1.1 dyoung }
964 1.1 dyoung
965 1.1 dyoung /*
966 1.1 dyoung * Enable interrupts.
967 1.1 dyoung */
968 1.1 dyoung sc->sc_imask = HAL_INT_RX | HAL_INT_TX
969 1.1 dyoung | HAL_INT_RXEOL | HAL_INT_RXORN
970 1.1 dyoung | HAL_INT_FATAL | HAL_INT_GLOBAL;
971 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
972 1.1 dyoung
973 1.1 dyoung ifp->if_flags |= IFF_RUNNING;
974 1.1 dyoung ic->ic_state = IEEE80211_S_INIT;
975 1.1 dyoung
976 1.1 dyoung /*
977 1.1 dyoung * The hardware should be ready to go now so it's safe
978 1.1 dyoung * to kick the 802.11 state machine as it's likely to
979 1.1 dyoung * immediately call back to us to send mgmt frames.
980 1.1 dyoung */
981 1.1 dyoung ni = ic->ic_bss;
982 1.1 dyoung ni->ni_chan = ic->ic_ibss_chan;
983 1.1 dyoung mode = ieee80211_chan2mode(ic, ni->ni_chan);
984 1.1 dyoung if (mode != sc->sc_curmode)
985 1.1 dyoung ath_setcurmode(sc, mode);
986 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_MONITOR)
987 1.1 dyoung ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
988 1.1 dyoung else
989 1.1 dyoung ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
990 1.1 dyoung done:
991 1.2 dyoung ath_softc_critsect_end(sc, s);
992 1.2 dyoung return error;
993 1.1 dyoung }
994 1.1 dyoung
995 1.1 dyoung static void
996 1.1 dyoung ath_stop(struct ifnet *ifp)
997 1.1 dyoung {
998 1.1 dyoung struct ieee80211com *ic = (struct ieee80211com *) ifp;
999 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
1000 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1001 1.2 dyoung ath_softc_critsect_decl(s);
1002 1.1 dyoung
1003 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: invalid %u if_flags 0x%x\n",
1004 1.25 dyoung __func__, sc->sc_invalid, ifp->if_flags));
1005 1.1 dyoung
1006 1.2 dyoung ath_softc_critsect_begin(sc, s);
1007 1.1 dyoung if (ifp->if_flags & IFF_RUNNING) {
1008 1.1 dyoung /*
1009 1.1 dyoung * Shutdown the hardware and driver:
1010 1.1 dyoung * disable interrupts
1011 1.1 dyoung * turn off timers
1012 1.1 dyoung * clear transmit machinery
1013 1.1 dyoung * clear receive machinery
1014 1.1 dyoung * drain and release tx queues
1015 1.1 dyoung * reclaim beacon resources
1016 1.1 dyoung * reset 802.11 state machine
1017 1.1 dyoung * power down hardware
1018 1.1 dyoung *
1019 1.1 dyoung * Note that some of this work is not possible if the
1020 1.1 dyoung * hardware is gone (invalid).
1021 1.1 dyoung */
1022 1.1 dyoung ifp->if_flags &= ~IFF_RUNNING;
1023 1.1 dyoung ifp->if_timer = 0;
1024 1.1 dyoung if (!sc->sc_invalid)
1025 1.1 dyoung ath_hal_intrset(ah, 0);
1026 1.1 dyoung ath_draintxq(sc);
1027 1.1 dyoung if (!sc->sc_invalid)
1028 1.1 dyoung ath_stoprecv(sc);
1029 1.1 dyoung else
1030 1.1 dyoung sc->sc_rxlink = NULL;
1031 1.2 dyoung #ifdef __FreeBSD__
1032 1.1 dyoung IF_DRAIN(&ifp->if_snd);
1033 1.2 dyoung #else
1034 1.2 dyoung IF_PURGE(&ifp->if_snd);
1035 1.2 dyoung #endif
1036 1.1 dyoung ath_beacon_free(sc);
1037 1.1 dyoung ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
1038 1.3 ichiro if (!sc->sc_invalid) {
1039 1.1 dyoung ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0);
1040 1.3 ichiro }
1041 1.3 ichiro #ifdef __NetBSD__
1042 1.3 ichiro ath_disable(sc);
1043 1.3 ichiro #endif
1044 1.1 dyoung }
1045 1.2 dyoung ath_softc_critsect_end(sc, s);
1046 1.1 dyoung }
1047 1.1 dyoung
1048 1.1 dyoung /*
1049 1.1 dyoung * Reset the hardware w/o losing operational state. This is
1050 1.1 dyoung * basically a more efficient way of doing ath_stop, ath_init,
1051 1.1 dyoung * followed by state transitions to the current 802.11
1052 1.1 dyoung * operational state. Used to recover from errors rx overrun
1053 1.1 dyoung * and to reset the hardware when rf gain settings must be reset.
1054 1.1 dyoung */
1055 1.1 dyoung static void
1056 1.1 dyoung ath_reset(struct ath_softc *sc)
1057 1.1 dyoung {
1058 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1059 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
1060 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1061 1.1 dyoung struct ieee80211_channel *c;
1062 1.1 dyoung HAL_STATUS status;
1063 1.1 dyoung HAL_CHANNEL hchan;
1064 1.1 dyoung
1065 1.1 dyoung /*
1066 1.1 dyoung * Convert to a HAL channel description with the flags
1067 1.1 dyoung * constrained to reflect the current operating mode.
1068 1.1 dyoung */
1069 1.1 dyoung c = ic->ic_ibss_chan;
1070 1.1 dyoung hchan.channel = c->ic_freq;
1071 1.1 dyoung hchan.channelFlags = ath_chan2flags(ic, c);
1072 1.1 dyoung
1073 1.1 dyoung ath_hal_intrset(ah, 0); /* disable interrupts */
1074 1.1 dyoung ath_draintxq(sc); /* stop xmit side */
1075 1.1 dyoung ath_stoprecv(sc); /* stop recv side */
1076 1.1 dyoung /* NB: indicate channel change so we do a full reset */
1077 1.1 dyoung if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status))
1078 1.1 dyoung if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
1079 1.1 dyoung __func__, status);
1080 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
1081 1.1 dyoung if (ath_startrecv(sc) != 0) /* restart recv */
1082 1.1 dyoung if_printf(ifp, "%s: unable to start recv logic\n", __func__);
1083 1.1 dyoung ath_start(ifp); /* restart xmit */
1084 1.1 dyoung if (ic->ic_state == IEEE80211_S_RUN)
1085 1.1 dyoung ath_beacon_config(sc); /* restart beacons */
1086 1.1 dyoung }
1087 1.1 dyoung
1088 1.1 dyoung static void
1089 1.1 dyoung ath_start(struct ifnet *ifp)
1090 1.1 dyoung {
1091 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
1092 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1093 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1094 1.1 dyoung struct ieee80211_node *ni;
1095 1.1 dyoung struct ath_buf *bf;
1096 1.1 dyoung struct mbuf *m;
1097 1.1 dyoung struct ieee80211_frame *wh;
1098 1.2 dyoung ath_txbuf_critsect_decl(s);
1099 1.1 dyoung
1100 1.1 dyoung if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
1101 1.1 dyoung return;
1102 1.1 dyoung for (;;) {
1103 1.1 dyoung /*
1104 1.1 dyoung * Grab a TX buffer and associated resources.
1105 1.1 dyoung */
1106 1.2 dyoung ath_txbuf_critsect_begin(sc, s);
1107 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_txbuf);
1108 1.1 dyoung if (bf != NULL)
1109 1.1 dyoung TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
1110 1.2 dyoung ath_txbuf_critsect_end(sc, s);
1111 1.1 dyoung if (bf == NULL) {
1112 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: out of xmit buffers\n",
1113 1.25 dyoung __func__));
1114 1.1 dyoung sc->sc_stats.ast_tx_qstop++;
1115 1.1 dyoung ifp->if_flags |= IFF_OACTIVE;
1116 1.1 dyoung break;
1117 1.1 dyoung }
1118 1.1 dyoung /*
1119 1.1 dyoung * Poll the management queue for frames; they
1120 1.1 dyoung * have priority over normal data frames.
1121 1.1 dyoung */
1122 1.1 dyoung IF_DEQUEUE(&ic->ic_mgtq, m);
1123 1.1 dyoung if (m == NULL) {
1124 1.1 dyoung /*
1125 1.1 dyoung * No data frames go out unless we're associated.
1126 1.1 dyoung */
1127 1.1 dyoung if (ic->ic_state != IEEE80211_S_RUN) {
1128 1.25 dyoung DPRINTF(ATH_DEBUG_ANY,
1129 1.25 dyoung ("%s: ignore data packet, state %u\n",
1130 1.25 dyoung __func__, ic->ic_state));
1131 1.1 dyoung sc->sc_stats.ast_tx_discard++;
1132 1.2 dyoung ath_txbuf_critsect_begin(sc, s);
1133 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1134 1.2 dyoung ath_txbuf_critsect_end(sc, s);
1135 1.1 dyoung break;
1136 1.1 dyoung }
1137 1.1 dyoung IF_DEQUEUE(&ifp->if_snd, m);
1138 1.1 dyoung if (m == NULL) {
1139 1.2 dyoung ath_txbuf_critsect_begin(sc, s);
1140 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1141 1.2 dyoung ath_txbuf_critsect_end(sc, s);
1142 1.1 dyoung break;
1143 1.1 dyoung }
1144 1.1 dyoung ifp->if_opackets++;
1145 1.2 dyoung
1146 1.2 dyoung #ifdef __NetBSD__
1147 1.2 dyoung #if NBPFILTER > 0
1148 1.2 dyoung if (ifp->if_bpf)
1149 1.2 dyoung bpf_mtap(ifp->if_bpf, m);
1150 1.2 dyoung #endif
1151 1.2 dyoung #endif
1152 1.2 dyoung #ifdef __FreeBSD__
1153 1.1 dyoung BPF_MTAP(ifp, m);
1154 1.2 dyoung #endif
1155 1.1 dyoung /*
1156 1.1 dyoung * Encapsulate the packet in prep for transmission.
1157 1.1 dyoung */
1158 1.1 dyoung m = ieee80211_encap(ifp, m, &ni);
1159 1.1 dyoung if (m == NULL) {
1160 1.25 dyoung DPRINTF(ATH_DEBUG_ANY,
1161 1.25 dyoung ("%s: encapsulation failure\n",
1162 1.25 dyoung __func__));
1163 1.1 dyoung sc->sc_stats.ast_tx_encap++;
1164 1.1 dyoung goto bad;
1165 1.1 dyoung }
1166 1.1 dyoung wh = mtod(m, struct ieee80211_frame *);
1167 1.1 dyoung } else {
1168 1.1 dyoung /*
1169 1.1 dyoung * Hack! The referenced node pointer is in the
1170 1.1 dyoung * rcvif field of the packet header. This is
1171 1.1 dyoung * placed there by ieee80211_mgmt_output because
1172 1.1 dyoung * we need to hold the reference with the frame
1173 1.1 dyoung * and there's no other way (other than packet
1174 1.1 dyoung * tags which we consider too expensive to use)
1175 1.1 dyoung * to pass it along.
1176 1.1 dyoung */
1177 1.1 dyoung ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1178 1.1 dyoung m->m_pkthdr.rcvif = NULL;
1179 1.1 dyoung
1180 1.1 dyoung wh = mtod(m, struct ieee80211_frame *);
1181 1.1 dyoung if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1182 1.1 dyoung IEEE80211_FC0_SUBTYPE_PROBE_RESP) {
1183 1.1 dyoung /* fill time stamp */
1184 1.1 dyoung u_int64_t tsf;
1185 1.1 dyoung u_int32_t *tstamp;
1186 1.1 dyoung
1187 1.1 dyoung tsf = ath_hal_gettsf64(ah);
1188 1.1 dyoung /* XXX: adjust 100us delay to xmit */
1189 1.1 dyoung tsf += 100;
1190 1.1 dyoung tstamp = (u_int32_t *)&wh[1];
1191 1.1 dyoung tstamp[0] = htole32(tsf & 0xffffffff);
1192 1.1 dyoung tstamp[1] = htole32(tsf >> 32);
1193 1.1 dyoung }
1194 1.1 dyoung sc->sc_stats.ast_tx_mgmt++;
1195 1.1 dyoung }
1196 1.1 dyoung
1197 1.1 dyoung if (ath_tx_start(sc, ni, bf, m)) {
1198 1.1 dyoung bad:
1199 1.2 dyoung ath_txbuf_critsect_begin(sc, s);
1200 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1201 1.2 dyoung ath_txbuf_critsect_end(sc, s);
1202 1.1 dyoung ifp->if_oerrors++;
1203 1.1 dyoung if (ni && ni != ic->ic_bss)
1204 1.1 dyoung ieee80211_free_node(ic, ni);
1205 1.1 dyoung continue;
1206 1.1 dyoung }
1207 1.1 dyoung
1208 1.1 dyoung sc->sc_tx_timer = 5;
1209 1.1 dyoung ifp->if_timer = 1;
1210 1.1 dyoung }
1211 1.1 dyoung }
1212 1.1 dyoung
1213 1.1 dyoung static int
1214 1.1 dyoung ath_media_change(struct ifnet *ifp)
1215 1.1 dyoung {
1216 1.1 dyoung int error;
1217 1.1 dyoung
1218 1.1 dyoung error = ieee80211_media_change(ifp);
1219 1.1 dyoung if (error == ENETRESET) {
1220 1.1 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
1221 1.1 dyoung (IFF_RUNNING|IFF_UP))
1222 1.1 dyoung ath_init(ifp); /* XXX lose error */
1223 1.1 dyoung error = 0;
1224 1.1 dyoung }
1225 1.1 dyoung return error;
1226 1.1 dyoung }
1227 1.1 dyoung
1228 1.1 dyoung static void
1229 1.1 dyoung ath_watchdog(struct ifnet *ifp)
1230 1.1 dyoung {
1231 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
1232 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1233 1.1 dyoung
1234 1.1 dyoung ifp->if_timer = 0;
1235 1.1 dyoung if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
1236 1.1 dyoung return;
1237 1.1 dyoung if (sc->sc_tx_timer) {
1238 1.1 dyoung if (--sc->sc_tx_timer == 0) {
1239 1.1 dyoung if_printf(ifp, "device timeout\n");
1240 1.25 dyoung ath_reset(sc);
1241 1.1 dyoung ifp->if_oerrors++;
1242 1.1 dyoung sc->sc_stats.ast_watchdog++;
1243 1.1 dyoung return;
1244 1.1 dyoung }
1245 1.1 dyoung ifp->if_timer = 1;
1246 1.1 dyoung }
1247 1.1 dyoung if (ic->ic_fixed_rate == -1) {
1248 1.1 dyoung /*
1249 1.1 dyoung * Run the rate control algorithm if we're not
1250 1.1 dyoung * locked at a fixed rate.
1251 1.1 dyoung */
1252 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_STA)
1253 1.1 dyoung ath_rate_ctl(sc, ic->ic_bss);
1254 1.1 dyoung else
1255 1.1 dyoung ieee80211_iterate_nodes(ic, ath_rate_ctl, sc);
1256 1.1 dyoung }
1257 1.1 dyoung ieee80211_watchdog(ifp);
1258 1.1 dyoung }
1259 1.1 dyoung
1260 1.1 dyoung static int
1261 1.1 dyoung ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1262 1.1 dyoung {
1263 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
1264 1.1 dyoung struct ifreq *ifr = (struct ifreq *)data;
1265 1.1 dyoung int error = 0;
1266 1.2 dyoung ath_softc_critsect_decl(s);
1267 1.1 dyoung
1268 1.2 dyoung ath_softc_critsect_begin(sc, s);
1269 1.1 dyoung switch (cmd) {
1270 1.1 dyoung case SIOCSIFFLAGS:
1271 1.1 dyoung if (ifp->if_flags & IFF_UP) {
1272 1.1 dyoung if (ifp->if_flags & IFF_RUNNING) {
1273 1.1 dyoung /*
1274 1.1 dyoung * To avoid rescanning another access point,
1275 1.1 dyoung * do not call ath_init() here. Instead,
1276 1.1 dyoung * only reflect promisc mode settings.
1277 1.1 dyoung */
1278 1.1 dyoung ath_mode_init(sc);
1279 1.18 dyoung } else {
1280 1.18 dyoung /*
1281 1.18 dyoung * Beware of being called during detach to
1282 1.18 dyoung * reset promiscuous mode. In that case we
1283 1.18 dyoung * will still be marked UP but not RUNNING.
1284 1.18 dyoung * However trying to re-init the interface
1285 1.18 dyoung * is the wrong thing to do as we've already
1286 1.18 dyoung * torn down much of our state. There's
1287 1.18 dyoung * probably a better way to deal with this.
1288 1.18 dyoung */
1289 1.18 dyoung if (!sc->sc_invalid)
1290 1.18 dyoung ath_init(ifp); /* XXX lose error */
1291 1.18 dyoung }
1292 1.1 dyoung } else
1293 1.1 dyoung ath_stop(ifp);
1294 1.1 dyoung break;
1295 1.1 dyoung case SIOCADDMULTI:
1296 1.1 dyoung case SIOCDELMULTI:
1297 1.5 enami #ifdef __FreeBSD__
1298 1.1 dyoung /*
1299 1.1 dyoung * The upper layer has already installed/removed
1300 1.1 dyoung * the multicast address(es), just recalculate the
1301 1.1 dyoung * multicast filter for the card.
1302 1.1 dyoung */
1303 1.1 dyoung if (ifp->if_flags & IFF_RUNNING)
1304 1.1 dyoung ath_mode_init(sc);
1305 1.5 enami #endif
1306 1.5 enami #ifdef __NetBSD__
1307 1.5 enami error = (cmd == SIOCADDMULTI) ?
1308 1.5 enami ether_addmulti(ifr, &sc->sc_ic.ic_ec) :
1309 1.5 enami ether_delmulti(ifr, &sc->sc_ic.ic_ec);
1310 1.5 enami if (error == ENETRESET) {
1311 1.5 enami if (ifp->if_flags & IFF_RUNNING)
1312 1.5 enami ath_mode_init(sc);
1313 1.8 enami error = 0;
1314 1.5 enami }
1315 1.5 enami #endif
1316 1.1 dyoung break;
1317 1.1 dyoung case SIOCGATHSTATS:
1318 1.18 dyoung error = copyout(&sc->sc_stats,
1319 1.18 dyoung ifr->ifr_data, sizeof (sc->sc_stats));
1320 1.1 dyoung break;
1321 1.18 dyoung case SIOCGATHDIAG: {
1322 1.31 dyoung #if 0 /* XXX punt */
1323 1.18 dyoung struct ath_diag *ad = (struct ath_diag *)data;
1324 1.18 dyoung struct ath_hal *ah = sc->sc_ah;
1325 1.18 dyoung void *data;
1326 1.18 dyoung u_int size;
1327 1.18 dyoung
1328 1.18 dyoung if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) {
1329 1.18 dyoung if (size < ad->ad_size)
1330 1.18 dyoung ad->ad_size = size;
1331 1.18 dyoung if (data)
1332 1.18 dyoung error = copyout(data, ad->ad_data, ad->ad_size);
1333 1.18 dyoung } else
1334 1.18 dyoung error = EINVAL;
1335 1.31 dyoung #else
1336 1.31 dyoung error = EINVAL;
1337 1.31 dyoung #endif
1338 1.18 dyoung break;
1339 1.18 dyoung }
1340 1.1 dyoung default:
1341 1.1 dyoung error = ieee80211_ioctl(ifp, cmd, data);
1342 1.1 dyoung if (error == ENETRESET) {
1343 1.1 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
1344 1.1 dyoung (IFF_RUNNING|IFF_UP))
1345 1.1 dyoung ath_init(ifp); /* XXX lose error */
1346 1.1 dyoung error = 0;
1347 1.1 dyoung }
1348 1.1 dyoung break;
1349 1.1 dyoung }
1350 1.2 dyoung ath_softc_critsect_end(sc, s);
1351 1.1 dyoung return error;
1352 1.1 dyoung }
1353 1.1 dyoung
1354 1.1 dyoung /*
1355 1.1 dyoung * Fill the hardware key cache with key entries.
1356 1.1 dyoung */
1357 1.1 dyoung static void
1358 1.1 dyoung ath_initkeytable(struct ath_softc *sc)
1359 1.1 dyoung {
1360 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1361 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1362 1.1 dyoung int i;
1363 1.1 dyoung
1364 1.33 dyoung /* XXX maybe should reset all keys when !WEPON */
1365 1.1 dyoung for (i = 0; i < IEEE80211_WEP_NKID; i++) {
1366 1.1 dyoung struct ieee80211_wepkey *k = &ic->ic_nw_keys[i];
1367 1.1 dyoung if (k->wk_len == 0)
1368 1.1 dyoung ath_hal_keyreset(ah, i);
1369 1.33 dyoung else {
1370 1.33 dyoung HAL_KEYVAL hk;
1371 1.33 dyoung
1372 1.33 dyoung memset(&hk, 0, sizeof(hk));
1373 1.33 dyoung hk.kv_type = HAL_CIPHER_WEP;
1374 1.33 dyoung hk.kv_len = k->wk_len;
1375 1.33 dyoung memcpy(hk.kv_val, k->wk_key, k->wk_len);
1376 1.1 dyoung /* XXX return value */
1377 1.33 dyoung ath_hal_keyset(ah, i, &hk);
1378 1.33 dyoung }
1379 1.1 dyoung }
1380 1.1 dyoung }
1381 1.1 dyoung
1382 1.1 dyoung static void
1383 1.2 dyoung ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2])
1384 1.2 dyoung {
1385 1.2 dyoung u_int32_t val;
1386 1.2 dyoung u_int8_t pos;
1387 1.2 dyoung
1388 1.2 dyoung val = LE_READ_4(dl + 0);
1389 1.2 dyoung pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
1390 1.2 dyoung val = LE_READ_4(dl + 3);
1391 1.2 dyoung pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
1392 1.2 dyoung pos &= 0x3f;
1393 1.2 dyoung (*mfilt)[pos / 32] |= (1 << (pos % 32));
1394 1.2 dyoung }
1395 1.2 dyoung
1396 1.2 dyoung #ifdef __FreeBSD__
1397 1.2 dyoung static void
1398 1.2 dyoung ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
1399 1.2 dyoung {
1400 1.2 dyoung struct ieee80211com *ic = &sc->sc_ic;
1401 1.2 dyoung struct ifnet *ifp = &ic->ic_if;
1402 1.2 dyoung struct ifmultiaddr *ifma;
1403 1.2 dyoung
1404 1.2 dyoung TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1405 1.2 dyoung caddr_t dl;
1406 1.2 dyoung
1407 1.2 dyoung /* calculate XOR of eight 6bit values */
1408 1.2 dyoung dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
1409 1.2 dyoung ath_mcastfilter_accum(dl, &mfilt);
1410 1.2 dyoung }
1411 1.2 dyoung }
1412 1.2 dyoung #else
1413 1.2 dyoung static void
1414 1.2 dyoung ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
1415 1.2 dyoung {
1416 1.5 enami struct ifnet *ifp = &sc->sc_ic.ic_if;
1417 1.2 dyoung struct ether_multi *enm;
1418 1.2 dyoung struct ether_multistep estep;
1419 1.2 dyoung
1420 1.2 dyoung ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm);
1421 1.2 dyoung while (enm != NULL) {
1422 1.2 dyoung /* XXX Punt on ranges. */
1423 1.2 dyoung if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) {
1424 1.2 dyoung (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0);
1425 1.5 enami ifp->if_flags |= IFF_ALLMULTI;
1426 1.5 enami return;
1427 1.2 dyoung }
1428 1.2 dyoung ath_mcastfilter_accum(enm->enm_addrlo, mfilt);
1429 1.2 dyoung ETHER_NEXT_MULTI(estep, enm);
1430 1.2 dyoung }
1431 1.5 enami ifp->if_flags &= ~IFF_ALLMULTI;
1432 1.2 dyoung }
1433 1.2 dyoung #endif
1434 1.2 dyoung
1435 1.18 dyoung /*
1436 1.18 dyoung * Calculate the receive filter according to the
1437 1.18 dyoung * operating mode and state:
1438 1.18 dyoung *
1439 1.18 dyoung * o always accept unicast, broadcast, and multicast traffic
1440 1.18 dyoung * o maintain current state of phy error reception
1441 1.18 dyoung * o probe request frames are accepted only when operating in
1442 1.18 dyoung * hostap, adhoc, or monitor modes
1443 1.18 dyoung * o enable promiscuous mode according to the interface state
1444 1.18 dyoung * o accept beacons:
1445 1.18 dyoung * - when operating in adhoc mode so the 802.11 layer creates
1446 1.18 dyoung * node table entries for peers,
1447 1.18 dyoung * - when operating in station mode for collecting rssi data when
1448 1.18 dyoung * the station is otherwise quiet, or
1449 1.18 dyoung * - when scanning
1450 1.18 dyoung */
1451 1.18 dyoung static u_int32_t
1452 1.18 dyoung ath_calcrxfilter(struct ath_softc *sc)
1453 1.1 dyoung {
1454 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1455 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1456 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
1457 1.18 dyoung u_int32_t rfilt;
1458 1.1 dyoung
1459 1.1 dyoung rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
1460 1.1 dyoung | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
1461 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_STA)
1462 1.1 dyoung rfilt |= HAL_RX_FILTER_PROBEREQ;
1463 1.32 mycroft if (ic->ic_opmode != IEEE80211_M_AHDEMO)
1464 1.1 dyoung rfilt |= HAL_RX_FILTER_BEACON;
1465 1.28 mycroft if (ifp->if_flags & IFF_PROMISC)
1466 1.28 mycroft rfilt |= HAL_RX_FILTER_PROM;
1467 1.18 dyoung return rfilt;
1468 1.18 dyoung }
1469 1.18 dyoung
1470 1.18 dyoung static void
1471 1.18 dyoung ath_mode_init(struct ath_softc *sc)
1472 1.18 dyoung {
1473 1.19 dyoung #ifdef __FreeBSD__
1474 1.18 dyoung struct ieee80211com *ic = &sc->sc_ic;
1475 1.19 dyoung #endif
1476 1.18 dyoung struct ath_hal *ah = sc->sc_ah;
1477 1.18 dyoung u_int32_t rfilt, mfilt[2];
1478 1.18 dyoung
1479 1.18 dyoung /* configure rx filter */
1480 1.18 dyoung rfilt = ath_calcrxfilter(sc);
1481 1.1 dyoung ath_hal_setrxfilter(ah, rfilt);
1482 1.1 dyoung
1483 1.18 dyoung /* configure operational mode */
1484 1.19 dyoung ath_hal_setopmode(ah);
1485 1.18 dyoung
1486 1.1 dyoung /* calculate and install multicast filter */
1487 1.5 enami #ifdef __FreeBSD__
1488 1.18 dyoung if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) {
1489 1.1 dyoung mfilt[0] = mfilt[1] = 0;
1490 1.2 dyoung ath_mcastfilter_compute(sc, &mfilt);
1491 1.1 dyoung } else {
1492 1.1 dyoung mfilt[0] = mfilt[1] = ~0;
1493 1.1 dyoung }
1494 1.5 enami #endif
1495 1.5 enami #ifdef __NetBSD__
1496 1.5 enami mfilt[0] = mfilt[1] = 0;
1497 1.5 enami ath_mcastfilter_compute(sc, &mfilt);
1498 1.5 enami #endif
1499 1.1 dyoung ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
1500 1.25 dyoung DPRINTF(ATH_DEBUG_MODE, ("%s: RX filter 0x%x, MC filter %08x:%08x\n",
1501 1.25 dyoung __func__, rfilt, mfilt[0], mfilt[1]));
1502 1.1 dyoung }
1503 1.1 dyoung
1504 1.2 dyoung #ifdef __FreeBSD__
1505 1.1 dyoung static void
1506 1.1 dyoung ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error)
1507 1.1 dyoung {
1508 1.1 dyoung struct ath_buf *bf = arg;
1509 1.1 dyoung
1510 1.1 dyoung KASSERT(nseg <= ATH_MAX_SCATTER,
1511 1.1 dyoung ("ath_mbuf_load_cb: too many DMA segments %u", nseg));
1512 1.1 dyoung bf->bf_mapsize = mapsize;
1513 1.1 dyoung bf->bf_nseg = nseg;
1514 1.1 dyoung bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0]));
1515 1.1 dyoung }
1516 1.2 dyoung #endif /* __FreeBSD__ */
1517 1.2 dyoung
1518 1.2 dyoung static struct mbuf *
1519 1.2 dyoung ath_getmbuf(int flags, int type, u_int pktlen)
1520 1.2 dyoung {
1521 1.2 dyoung struct mbuf *m;
1522 1.2 dyoung
1523 1.2 dyoung KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen));
1524 1.2 dyoung #ifdef __FreeBSD__
1525 1.2 dyoung if (pktlen <= MHLEN)
1526 1.2 dyoung MGETHDR(m, flags, type);
1527 1.2 dyoung else
1528 1.2 dyoung m = m_getcl(flags, type, M_PKTHDR);
1529 1.2 dyoung #else
1530 1.2 dyoung MGETHDR(m, flags, type);
1531 1.2 dyoung if (m != NULL && pktlen > MHLEN)
1532 1.2 dyoung MCLGET(m, flags);
1533 1.2 dyoung #endif
1534 1.2 dyoung return m;
1535 1.2 dyoung }
1536 1.1 dyoung
1537 1.1 dyoung static int
1538 1.1 dyoung ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
1539 1.1 dyoung {
1540 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1541 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
1542 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1543 1.1 dyoung struct ieee80211_frame *wh;
1544 1.1 dyoung struct ath_buf *bf;
1545 1.1 dyoung struct ath_desc *ds;
1546 1.1 dyoung struct mbuf *m;
1547 1.1 dyoung int error, pktlen;
1548 1.1 dyoung u_int8_t *frm, rate;
1549 1.1 dyoung u_int16_t capinfo;
1550 1.1 dyoung struct ieee80211_rateset *rs;
1551 1.1 dyoung const HAL_RATE_TABLE *rt;
1552 1.1 dyoung
1553 1.1 dyoung bf = sc->sc_bcbuf;
1554 1.1 dyoung if (bf->bf_m != NULL) {
1555 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1556 1.1 dyoung m_freem(bf->bf_m);
1557 1.1 dyoung bf->bf_m = NULL;
1558 1.1 dyoung bf->bf_node = NULL;
1559 1.1 dyoung }
1560 1.1 dyoung /*
1561 1.1 dyoung * NB: the beacon data buffer must be 32-bit aligned;
1562 1.1 dyoung * we assume the mbuf routines will return us something
1563 1.1 dyoung * with this alignment (perhaps should assert).
1564 1.1 dyoung */
1565 1.1 dyoung rs = &ni->ni_rates;
1566 1.1 dyoung pktlen = sizeof (struct ieee80211_frame)
1567 1.18 dyoung + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6;
1568 1.1 dyoung if (rs->rs_nrates > IEEE80211_RATE_SIZE)
1569 1.1 dyoung pktlen += 2;
1570 1.2 dyoung m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen);
1571 1.1 dyoung if (m == NULL) {
1572 1.25 dyoung DPRINTF(ATH_DEBUG_BEACON,
1573 1.25 dyoung ("%s: cannot get mbuf/cluster; size %u\n",
1574 1.25 dyoung __func__, pktlen));
1575 1.1 dyoung sc->sc_stats.ast_be_nombuf++;
1576 1.1 dyoung return ENOMEM;
1577 1.1 dyoung }
1578 1.1 dyoung
1579 1.1 dyoung wh = mtod(m, struct ieee80211_frame *);
1580 1.1 dyoung wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
1581 1.1 dyoung IEEE80211_FC0_SUBTYPE_BEACON;
1582 1.1 dyoung wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1583 1.1 dyoung *(u_int16_t *)wh->i_dur = 0;
1584 1.1 dyoung memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
1585 1.1 dyoung memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
1586 1.1 dyoung memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
1587 1.1 dyoung *(u_int16_t *)wh->i_seq = 0;
1588 1.1 dyoung
1589 1.1 dyoung /*
1590 1.1 dyoung * beacon frame format
1591 1.1 dyoung * [8] time stamp
1592 1.1 dyoung * [2] beacon interval
1593 1.1 dyoung * [2] cabability information
1594 1.1 dyoung * [tlv] ssid
1595 1.1 dyoung * [tlv] supported rates
1596 1.1 dyoung * [tlv] parameter set (IBSS)
1597 1.1 dyoung * [tlv] extended supported rates
1598 1.1 dyoung */
1599 1.1 dyoung frm = (u_int8_t *)&wh[1];
1600 1.1 dyoung memset(frm, 0, 8); /* timestamp is set by hardware */
1601 1.1 dyoung frm += 8;
1602 1.1 dyoung *(u_int16_t *)frm = htole16(ni->ni_intval);
1603 1.1 dyoung frm += 2;
1604 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_IBSS)
1605 1.1 dyoung capinfo = IEEE80211_CAPINFO_IBSS;
1606 1.1 dyoung else
1607 1.1 dyoung capinfo = IEEE80211_CAPINFO_ESS;
1608 1.29 mycroft if (ic->ic_flags & IEEE80211_F_PRIVACY)
1609 1.1 dyoung capinfo |= IEEE80211_CAPINFO_PRIVACY;
1610 1.18 dyoung if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1611 1.18 dyoung IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
1612 1.1 dyoung capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
1613 1.1 dyoung if (ic->ic_flags & IEEE80211_F_SHSLOT)
1614 1.1 dyoung capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
1615 1.1 dyoung *(u_int16_t *)frm = htole16(capinfo);
1616 1.1 dyoung frm += 2;
1617 1.1 dyoung *frm++ = IEEE80211_ELEMID_SSID;
1618 1.1 dyoung *frm++ = ni->ni_esslen;
1619 1.1 dyoung memcpy(frm, ni->ni_essid, ni->ni_esslen);
1620 1.1 dyoung frm += ni->ni_esslen;
1621 1.1 dyoung frm = ieee80211_add_rates(frm, rs);
1622 1.18 dyoung *frm++ = IEEE80211_ELEMID_DSPARMS;
1623 1.18 dyoung *frm++ = 1;
1624 1.18 dyoung *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan);
1625 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_IBSS) {
1626 1.1 dyoung *frm++ = IEEE80211_ELEMID_IBSSPARMS;
1627 1.1 dyoung *frm++ = 2;
1628 1.1 dyoung *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */
1629 1.1 dyoung } else {
1630 1.1 dyoung /* TODO: TIM */
1631 1.1 dyoung *frm++ = IEEE80211_ELEMID_TIM;
1632 1.1 dyoung *frm++ = 4; /* length */
1633 1.1 dyoung *frm++ = 0; /* DTIM count */
1634 1.1 dyoung *frm++ = 1; /* DTIM period */
1635 1.1 dyoung *frm++ = 0; /* bitmap control */
1636 1.1 dyoung *frm++ = 0; /* Partial Virtual Bitmap (variable length) */
1637 1.1 dyoung }
1638 1.1 dyoung frm = ieee80211_add_xrates(frm, rs);
1639 1.1 dyoung m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
1640 1.1 dyoung KASSERT(m->m_pkthdr.len <= pktlen,
1641 1.1 dyoung ("beacon bigger than expected, len %u calculated %u",
1642 1.1 dyoung m->m_pkthdr.len, pktlen));
1643 1.1 dyoung
1644 1.25 dyoung DPRINTF(ATH_DEBUG_BEACON, ("%s: m %p len %u\n", __func__, m, m->m_len));
1645 1.2 dyoung error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT);
1646 1.1 dyoung if (error != 0) {
1647 1.1 dyoung m_freem(m);
1648 1.1 dyoung return error;
1649 1.1 dyoung }
1650 1.1 dyoung KASSERT(bf->bf_nseg == 1,
1651 1.25 dyoung ("%s: multi-segment packet; nseg %u", __func__, bf->bf_nseg));
1652 1.1 dyoung bf->bf_m = m;
1653 1.1 dyoung
1654 1.1 dyoung /* setup descriptors */
1655 1.1 dyoung ds = bf->bf_desc;
1656 1.1 dyoung
1657 1.1 dyoung ds->ds_link = 0;
1658 1.1 dyoung ds->ds_data = bf->bf_segs[0].ds_addr;
1659 1.2 dyoung
1660 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: segaddr %p seglen %u\n", __func__,
1661 1.2 dyoung (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len));
1662 1.2 dyoung
1663 1.1 dyoung /*
1664 1.1 dyoung * Calculate rate code.
1665 1.1 dyoung * XXX everything at min xmit rate
1666 1.1 dyoung */
1667 1.1 dyoung rt = sc->sc_currates;
1668 1.1 dyoung KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1669 1.1 dyoung if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1670 1.1 dyoung rate = rt->info[0].rateCode | rt->info[0].shortPreamble;
1671 1.1 dyoung else
1672 1.1 dyoung rate = rt->info[0].rateCode;
1673 1.2 dyoung if (!ath_hal_setuptxdesc(ah, ds
1674 1.1 dyoung , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */
1675 1.1 dyoung , sizeof(struct ieee80211_frame) /* header length */
1676 1.1 dyoung , HAL_PKT_TYPE_BEACON /* Atheros packet type */
1677 1.1 dyoung , 0x20 /* txpower XXX */
1678 1.1 dyoung , rate, 1 /* series 0 rate/tries */
1679 1.1 dyoung , HAL_TXKEYIX_INVALID /* no encryption */
1680 1.1 dyoung , 0 /* antenna mode */
1681 1.1 dyoung , HAL_TXDESC_NOACK /* no ack for beacons */
1682 1.1 dyoung , 0 /* rts/cts rate */
1683 1.1 dyoung , 0 /* rts/cts duration */
1684 1.2 dyoung )) {
1685 1.2 dyoung printf("%s: ath_hal_setuptxdesc failed\n", __func__);
1686 1.2 dyoung return -1;
1687 1.2 dyoung }
1688 1.1 dyoung /* NB: beacon's BufLen must be a multiple of 4 bytes */
1689 1.1 dyoung /* XXX verify mbuf data area covers this roundup */
1690 1.2 dyoung if (!ath_hal_filltxdesc(ah, ds
1691 1.1 dyoung , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */
1692 1.1 dyoung , AH_TRUE /* first segment */
1693 1.1 dyoung , AH_TRUE /* last segment */
1694 1.2 dyoung )) {
1695 1.2 dyoung printf("%s: ath_hal_filltxdesc failed\n", __func__);
1696 1.2 dyoung return -1;
1697 1.2 dyoung }
1698 1.2 dyoung
1699 1.2 dyoung /* XXX it is not appropriate to bus_dmamap_sync? -dcy */
1700 1.1 dyoung
1701 1.1 dyoung return 0;
1702 1.1 dyoung }
1703 1.1 dyoung
1704 1.1 dyoung static void
1705 1.1 dyoung ath_beacon_proc(void *arg, int pending)
1706 1.1 dyoung {
1707 1.1 dyoung struct ath_softc *sc = arg;
1708 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1709 1.1 dyoung struct ath_buf *bf = sc->sc_bcbuf;
1710 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1711 1.1 dyoung
1712 1.25 dyoung DPRINTF(ATH_DEBUG_BEACON_PROC, ("%s: pending %u\n", __func__, pending));
1713 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_STA ||
1714 1.1 dyoung bf == NULL || bf->bf_m == NULL) {
1715 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: ic_flags=%x bf=%p bf_m=%p\n",
1716 1.1 dyoung __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL));
1717 1.1 dyoung return;
1718 1.1 dyoung }
1719 1.1 dyoung /* TODO: update beacon to reflect PS poll state */
1720 1.1 dyoung if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
1721 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: beacon queue %u did not stop?\n",
1722 1.1 dyoung __func__, sc->sc_bhalq));
1723 1.25 dyoung /* NB: the HAL still stops DMA, so proceed */
1724 1.1 dyoung }
1725 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
1726 1.1 dyoung
1727 1.1 dyoung ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
1728 1.1 dyoung ath_hal_txstart(ah, sc->sc_bhalq);
1729 1.25 dyoung DPRINTF(ATH_DEBUG_BEACON_PROC,
1730 1.25 dyoung ("%s: TXDP%u = %p (%p)\n", __func__,
1731 1.1 dyoung sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
1732 1.1 dyoung }
1733 1.1 dyoung
1734 1.1 dyoung static void
1735 1.1 dyoung ath_beacon_free(struct ath_softc *sc)
1736 1.1 dyoung {
1737 1.1 dyoung struct ath_buf *bf = sc->sc_bcbuf;
1738 1.1 dyoung
1739 1.1 dyoung if (bf->bf_m != NULL) {
1740 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1741 1.1 dyoung m_freem(bf->bf_m);
1742 1.1 dyoung bf->bf_m = NULL;
1743 1.1 dyoung bf->bf_node = NULL;
1744 1.1 dyoung }
1745 1.1 dyoung }
1746 1.1 dyoung
1747 1.1 dyoung /*
1748 1.1 dyoung * Configure the beacon and sleep timers.
1749 1.1 dyoung *
1750 1.1 dyoung * When operating as an AP this resets the TSF and sets
1751 1.1 dyoung * up the hardware to notify us when we need to issue beacons.
1752 1.1 dyoung *
1753 1.1 dyoung * When operating in station mode this sets up the beacon
1754 1.1 dyoung * timers according to the timestamp of the last received
1755 1.1 dyoung * beacon and the current TSF, configures PCF and DTIM
1756 1.1 dyoung * handling, programs the sleep registers so the hardware
1757 1.1 dyoung * will wakeup in time to receive beacons, and configures
1758 1.1 dyoung * the beacon miss handling so we'll receive a BMISS
1759 1.1 dyoung * interrupt when we stop seeing beacons from the AP
1760 1.1 dyoung * we've associated with.
1761 1.1 dyoung */
1762 1.1 dyoung static void
1763 1.1 dyoung ath_beacon_config(struct ath_softc *sc)
1764 1.1 dyoung {
1765 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
1766 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1767 1.1 dyoung struct ieee80211_node *ni = ic->ic_bss;
1768 1.31 dyoung u_int32_t nexttbtt, intval;
1769 1.1 dyoung
1770 1.1 dyoung nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) |
1771 1.1 dyoung (LE_READ_4(ni->ni_tstamp) >> 10);
1772 1.25 dyoung DPRINTF(ATH_DEBUG_BEACON, ("%s: nexttbtt=%u\n", __func__, nexttbtt));
1773 1.1 dyoung nexttbtt += ni->ni_intval;
1774 1.31 dyoung intval = ni->ni_intval & HAL_BEACON_PERIOD;
1775 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_STA) {
1776 1.1 dyoung HAL_BEACON_STATE bs;
1777 1.1 dyoung u_int32_t bmisstime;
1778 1.1 dyoung
1779 1.1 dyoung /* NB: no PCF support right now */
1780 1.1 dyoung memset(&bs, 0, sizeof(bs));
1781 1.31 dyoung /*
1782 1.31 dyoung * Reset our tsf so the hardware will update the
1783 1.31 dyoung * tsf register to reflect timestamps found in
1784 1.31 dyoung * received beacons.
1785 1.31 dyoung */
1786 1.31 dyoung bs.bs_intval = intval | HAL_BEACON_RESET_TSF;
1787 1.1 dyoung bs.bs_nexttbtt = nexttbtt;
1788 1.1 dyoung bs.bs_dtimperiod = bs.bs_intval;
1789 1.1 dyoung bs.bs_nextdtim = nexttbtt;
1790 1.1 dyoung /*
1791 1.1 dyoung * Calculate the number of consecutive beacons to miss
1792 1.1 dyoung * before taking a BMISS interrupt. The configuration
1793 1.1 dyoung * is specified in ms, so we need to convert that to
1794 1.1 dyoung * TU's and then calculate based on the beacon interval.
1795 1.1 dyoung * Note that we clamp the result to at most 10 beacons.
1796 1.1 dyoung */
1797 1.1 dyoung bmisstime = (ic->ic_bmisstimeout * 1000) / 1024;
1798 1.1 dyoung bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval);
1799 1.1 dyoung if (bs.bs_bmissthreshold > 10)
1800 1.1 dyoung bs.bs_bmissthreshold = 10;
1801 1.1 dyoung else if (bs.bs_bmissthreshold <= 0)
1802 1.1 dyoung bs.bs_bmissthreshold = 1;
1803 1.1 dyoung
1804 1.1 dyoung /*
1805 1.1 dyoung * Calculate sleep duration. The configuration is
1806 1.1 dyoung * given in ms. We insure a multiple of the beacon
1807 1.1 dyoung * period is used. Also, if the sleep duration is
1808 1.1 dyoung * greater than the DTIM period then it makes senses
1809 1.1 dyoung * to make it a multiple of that.
1810 1.1 dyoung *
1811 1.1 dyoung * XXX fixed at 100ms
1812 1.1 dyoung */
1813 1.1 dyoung bs.bs_sleepduration =
1814 1.1 dyoung roundup((100 * 1000) / 1024, bs.bs_intval);
1815 1.1 dyoung if (bs.bs_sleepduration > bs.bs_dtimperiod)
1816 1.1 dyoung bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
1817 1.1 dyoung
1818 1.25 dyoung DPRINTF(ATH_DEBUG_BEACON,
1819 1.25 dyoung ("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n"
1820 1.1 dyoung , __func__
1821 1.1 dyoung , bs.bs_intval
1822 1.1 dyoung , bs.bs_nexttbtt
1823 1.1 dyoung , bs.bs_dtimperiod
1824 1.1 dyoung , bs.bs_nextdtim
1825 1.1 dyoung , bs.bs_bmissthreshold
1826 1.1 dyoung , bs.bs_sleepduration
1827 1.1 dyoung ));
1828 1.1 dyoung ath_hal_intrset(ah, 0);
1829 1.1 dyoung ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0);
1830 1.1 dyoung sc->sc_imask |= HAL_INT_BMISS;
1831 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
1832 1.1 dyoung } else {
1833 1.25 dyoung DPRINTF(ATH_DEBUG_BEACON, ("%s: intval %u nexttbtt %u\n",
1834 1.1 dyoung __func__, ni->ni_intval, nexttbtt));
1835 1.1 dyoung ath_hal_intrset(ah, 0);
1836 1.19 dyoung ath_hal_beaconinit(ah, nexttbtt, ni->ni_intval);
1837 1.1 dyoung if (ic->ic_opmode != IEEE80211_M_MONITOR)
1838 1.1 dyoung sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */
1839 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
1840 1.1 dyoung }
1841 1.1 dyoung }
1842 1.1 dyoung
1843 1.2 dyoung #ifdef __FreeBSD__
1844 1.1 dyoung static void
1845 1.1 dyoung ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1846 1.1 dyoung {
1847 1.1 dyoung bus_addr_t *paddr = (bus_addr_t*) arg;
1848 1.1 dyoung *paddr = segs->ds_addr;
1849 1.1 dyoung }
1850 1.2 dyoung #endif
1851 1.1 dyoung
1852 1.2 dyoung #ifdef __FreeBSD__
1853 1.1 dyoung static int
1854 1.1 dyoung ath_desc_alloc(struct ath_softc *sc)
1855 1.1 dyoung {
1856 1.1 dyoung int i, bsize, error;
1857 1.1 dyoung struct ath_desc *ds;
1858 1.1 dyoung struct ath_buf *bf;
1859 1.1 dyoung
1860 1.1 dyoung /* allocate descriptors */
1861 1.1 dyoung sc->sc_desc_len = sizeof(struct ath_desc) *
1862 1.1 dyoung (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
1863 1.1 dyoung error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap);
1864 1.1 dyoung if (error != 0)
1865 1.1 dyoung return error;
1866 1.1 dyoung
1867 1.1 dyoung error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc,
1868 1.1 dyoung BUS_DMA_NOWAIT, &sc->sc_ddmamap);
1869 1.2 dyoung
1870 1.1 dyoung if (error != 0)
1871 1.1 dyoung goto fail0;
1872 1.1 dyoung
1873 1.1 dyoung error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap,
1874 1.1 dyoung sc->sc_desc, sc->sc_desc_len,
1875 1.1 dyoung ath_load_cb, &sc->sc_desc_paddr,
1876 1.1 dyoung BUS_DMA_NOWAIT);
1877 1.1 dyoung if (error != 0)
1878 1.1 dyoung goto fail1;
1879 1.1 dyoung
1880 1.1 dyoung ds = sc->sc_desc;
1881 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: DMA map: %p (%lu) -> %p (%lu)\n",
1882 1.25 dyoung __func__, ds, (u_long) sc->sc_desc_len, (caddr_t) sc->sc_desc_paddr,
1883 1.25 dyoung /*XXX*/ (u_long) sc->sc_desc_len));
1884 1.1 dyoung
1885 1.1 dyoung /* allocate buffers */
1886 1.1 dyoung bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
1887 1.1 dyoung bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
1888 1.2 dyoung if (bf == NULL) {
1889 1.2 dyoung printf("%s: unable to allocate Tx/Rx buffers\n",
1890 1.2 dyoung sc->sc_dev.dv_xname);
1891 1.2 dyoung error = -1;
1892 1.1 dyoung goto fail2;
1893 1.2 dyoung }
1894 1.1 dyoung sc->sc_bufptr = bf;
1895 1.1 dyoung
1896 1.1 dyoung TAILQ_INIT(&sc->sc_rxbuf);
1897 1.1 dyoung for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
1898 1.1 dyoung bf->bf_desc = ds;
1899 1.1 dyoung bf->bf_daddr = sc->sc_desc_paddr +
1900 1.1 dyoung ((caddr_t)ds - (caddr_t)sc->sc_desc);
1901 1.1 dyoung error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
1902 1.1 dyoung &bf->bf_dmamap);
1903 1.1 dyoung if (error != 0)
1904 1.1 dyoung break;
1905 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
1906 1.1 dyoung }
1907 1.1 dyoung
1908 1.1 dyoung TAILQ_INIT(&sc->sc_txbuf);
1909 1.1 dyoung for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
1910 1.1 dyoung bf->bf_desc = ds;
1911 1.1 dyoung bf->bf_daddr = sc->sc_desc_paddr +
1912 1.1 dyoung ((caddr_t)ds - (caddr_t)sc->sc_desc);
1913 1.1 dyoung error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
1914 1.1 dyoung &bf->bf_dmamap);
1915 1.1 dyoung if (error != 0)
1916 1.1 dyoung break;
1917 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1918 1.1 dyoung }
1919 1.1 dyoung TAILQ_INIT(&sc->sc_txq);
1920 1.1 dyoung
1921 1.1 dyoung /* beacon buffer */
1922 1.1 dyoung bf->bf_desc = ds;
1923 1.1 dyoung bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
1924 1.1 dyoung error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap);
1925 1.1 dyoung if (error != 0)
1926 1.1 dyoung return error;
1927 1.1 dyoung sc->sc_bcbuf = bf;
1928 1.1 dyoung return 0;
1929 1.1 dyoung
1930 1.1 dyoung fail2:
1931 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
1932 1.1 dyoung fail1:
1933 1.1 dyoung bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
1934 1.1 dyoung fail0:
1935 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
1936 1.1 dyoung sc->sc_ddmamap = NULL;
1937 1.1 dyoung return error;
1938 1.1 dyoung }
1939 1.2 dyoung #else
1940 1.2 dyoung static int
1941 1.2 dyoung ath_desc_alloc(struct ath_softc *sc)
1942 1.2 dyoung {
1943 1.2 dyoung int i, bsize, error = -1;
1944 1.2 dyoung struct ath_desc *ds;
1945 1.2 dyoung struct ath_buf *bf;
1946 1.2 dyoung
1947 1.2 dyoung /* allocate descriptors */
1948 1.2 dyoung sc->sc_desc_len = sizeof(struct ath_desc) *
1949 1.2 dyoung (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
1950 1.2 dyoung if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE,
1951 1.2 dyoung 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) {
1952 1.2 dyoung printf("%s: unable to allocate control data, error = %d\n",
1953 1.2 dyoung sc->sc_dev.dv_xname, error);
1954 1.2 dyoung goto fail0;
1955 1.2 dyoung }
1956 1.2 dyoung
1957 1.2 dyoung if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg,
1958 1.2 dyoung sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) {
1959 1.2 dyoung printf("%s: unable to map control data, error = %d\n",
1960 1.2 dyoung sc->sc_dev.dv_xname, error);
1961 1.2 dyoung goto fail1;
1962 1.2 dyoung }
1963 1.2 dyoung
1964 1.2 dyoung if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1,
1965 1.2 dyoung sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) {
1966 1.2 dyoung printf("%s: unable to create control data DMA map, "
1967 1.2 dyoung "error = %d\n", sc->sc_dev.dv_xname, error);
1968 1.2 dyoung goto fail2;
1969 1.2 dyoung }
1970 1.2 dyoung
1971 1.2 dyoung if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc,
1972 1.2 dyoung sc->sc_desc_len, NULL, 0)) != 0) {
1973 1.2 dyoung printf("%s: unable to load control data DMA map, error = %d\n",
1974 1.2 dyoung sc->sc_dev.dv_xname, error);
1975 1.2 dyoung goto fail3;
1976 1.2 dyoung }
1977 1.2 dyoung
1978 1.2 dyoung ds = sc->sc_desc;
1979 1.2 dyoung sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr;
1980 1.2 dyoung
1981 1.25 dyoung DPRINTF(ATH_DEBUG_XMIT_DESC|ATH_DEBUG_RECV_DESC,
1982 1.25 dyoung ("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n",
1983 1.2 dyoung ds, (u_long)sc->sc_desc_len,
1984 1.2 dyoung (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
1985 1.2 dyoung
1986 1.2 dyoung /* allocate buffers */
1987 1.2 dyoung bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
1988 1.2 dyoung bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
1989 1.2 dyoung if (bf == NULL) {
1990 1.2 dyoung printf("%s: unable to allocate Tx/Rx buffers\n",
1991 1.2 dyoung sc->sc_dev.dv_xname);
1992 1.2 dyoung error = ENOMEM;
1993 1.2 dyoung goto fail3;
1994 1.2 dyoung }
1995 1.2 dyoung sc->sc_bufptr = bf;
1996 1.2 dyoung
1997 1.2 dyoung TAILQ_INIT(&sc->sc_rxbuf);
1998 1.2 dyoung for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
1999 1.2 dyoung bf->bf_desc = ds;
2000 1.2 dyoung bf->bf_daddr = sc->sc_desc_paddr +
2001 1.2 dyoung ((caddr_t)ds - (caddr_t)sc->sc_desc);
2002 1.2 dyoung if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
2003 1.2 dyoung MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
2004 1.2 dyoung printf("%s: unable to create Rx dmamap, error = %d\n",
2005 1.2 dyoung sc->sc_dev.dv_xname, error);
2006 1.2 dyoung goto fail4;
2007 1.2 dyoung }
2008 1.2 dyoung TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
2009 1.2 dyoung }
2010 1.2 dyoung
2011 1.2 dyoung TAILQ_INIT(&sc->sc_txbuf);
2012 1.2 dyoung for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
2013 1.2 dyoung bf->bf_desc = ds;
2014 1.2 dyoung bf->bf_daddr = sc->sc_desc_paddr +
2015 1.2 dyoung ((caddr_t)ds - (caddr_t)sc->sc_desc);
2016 1.2 dyoung if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
2017 1.2 dyoung ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
2018 1.2 dyoung printf("%s: unable to create Tx dmamap, error = %d\n",
2019 1.2 dyoung sc->sc_dev.dv_xname, error);
2020 1.2 dyoung goto fail5;
2021 1.2 dyoung }
2022 1.2 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2023 1.2 dyoung }
2024 1.2 dyoung TAILQ_INIT(&sc->sc_txq);
2025 1.2 dyoung
2026 1.2 dyoung /* beacon buffer */
2027 1.2 dyoung bf->bf_desc = ds;
2028 1.2 dyoung bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
2029 1.2 dyoung if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
2030 1.2 dyoung &bf->bf_dmamap)) != 0) {
2031 1.2 dyoung printf("%s: unable to create beacon dmamap, error = %d\n",
2032 1.2 dyoung sc->sc_dev.dv_xname, error);
2033 1.2 dyoung goto fail5;
2034 1.2 dyoung }
2035 1.2 dyoung sc->sc_bcbuf = bf;
2036 1.2 dyoung return 0;
2037 1.2 dyoung
2038 1.2 dyoung fail5:
2039 1.2 dyoung for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) {
2040 1.2 dyoung if (sc->sc_bufptr[i].bf_dmamap == NULL)
2041 1.2 dyoung continue;
2042 1.2 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
2043 1.2 dyoung }
2044 1.2 dyoung fail4:
2045 1.2 dyoung for (i = 0; i < ATH_RXBUF; i++) {
2046 1.2 dyoung if (sc->sc_bufptr[i].bf_dmamap == NULL)
2047 1.2 dyoung continue;
2048 1.2 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
2049 1.2 dyoung }
2050 1.2 dyoung fail3:
2051 1.2 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
2052 1.2 dyoung fail2:
2053 1.2 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
2054 1.2 dyoung sc->sc_ddmamap = NULL;
2055 1.2 dyoung fail1:
2056 1.2 dyoung bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len);
2057 1.2 dyoung fail0:
2058 1.2 dyoung bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
2059 1.2 dyoung return error;
2060 1.2 dyoung }
2061 1.2 dyoung #endif
2062 1.1 dyoung
2063 1.1 dyoung static void
2064 1.1 dyoung ath_desc_free(struct ath_softc *sc)
2065 1.1 dyoung {
2066 1.1 dyoung struct ath_buf *bf;
2067 1.1 dyoung
2068 1.2 dyoung #ifdef __FreeBSD__
2069 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
2070 1.1 dyoung bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
2071 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
2072 1.2 dyoung #else
2073 1.2 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
2074 1.2 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
2075 1.2 dyoung bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
2076 1.2 dyoung #endif
2077 1.1 dyoung
2078 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
2079 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2080 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
2081 1.1 dyoung m_freem(bf->bf_m);
2082 1.1 dyoung }
2083 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list)
2084 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
2085 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
2086 1.1 dyoung if (bf->bf_m) {
2087 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2088 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
2089 1.1 dyoung m_freem(bf->bf_m);
2090 1.1 dyoung bf->bf_m = NULL;
2091 1.1 dyoung }
2092 1.1 dyoung }
2093 1.1 dyoung if (sc->sc_bcbuf != NULL) {
2094 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
2095 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
2096 1.1 dyoung sc->sc_bcbuf = NULL;
2097 1.1 dyoung }
2098 1.1 dyoung
2099 1.1 dyoung TAILQ_INIT(&sc->sc_rxbuf);
2100 1.1 dyoung TAILQ_INIT(&sc->sc_txbuf);
2101 1.1 dyoung TAILQ_INIT(&sc->sc_txq);
2102 1.1 dyoung free(sc->sc_bufptr, M_DEVBUF);
2103 1.1 dyoung sc->sc_bufptr = NULL;
2104 1.1 dyoung }
2105 1.1 dyoung
2106 1.1 dyoung static struct ieee80211_node *
2107 1.1 dyoung ath_node_alloc(struct ieee80211com *ic)
2108 1.1 dyoung {
2109 1.1 dyoung struct ath_node *an =
2110 1.25 dyoung malloc(sizeof(struct ath_node), M_80211_NODE, M_NOWAIT|M_ZERO);
2111 1.18 dyoung if (an) {
2112 1.18 dyoung int i;
2113 1.18 dyoung for (i = 0; i < ATH_RHIST_SIZE; i++)
2114 1.18 dyoung an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME;
2115 1.18 dyoung an->an_rx_hist_next = ATH_RHIST_SIZE-1;
2116 1.18 dyoung return &an->an_node;
2117 1.18 dyoung } else
2118 1.18 dyoung return NULL;
2119 1.1 dyoung }
2120 1.1 dyoung
2121 1.1 dyoung static void
2122 1.1 dyoung ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
2123 1.1 dyoung {
2124 1.2 dyoung struct ath_softc *sc = ic->ic_if.if_softc;
2125 1.1 dyoung struct ath_buf *bf;
2126 1.1 dyoung
2127 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
2128 1.1 dyoung if (bf->bf_node == ni)
2129 1.1 dyoung bf->bf_node = NULL;
2130 1.1 dyoung }
2131 1.25 dyoung (*sc->sc_node_free)(ic, ni);
2132 1.1 dyoung }
2133 1.1 dyoung
2134 1.1 dyoung static void
2135 1.1 dyoung ath_node_copy(struct ieee80211com *ic,
2136 1.1 dyoung struct ieee80211_node *dst, const struct ieee80211_node *src)
2137 1.1 dyoung {
2138 1.25 dyoung struct ath_softc *sc = ic->ic_if.if_softc;
2139 1.25 dyoung
2140 1.25 dyoung memcpy(&dst[1], &src[1],
2141 1.25 dyoung sizeof(struct ath_node) - sizeof(struct ieee80211_node));
2142 1.25 dyoung (*sc->sc_node_copy)(ic, dst, src);
2143 1.1 dyoung }
2144 1.1 dyoung
2145 1.18 dyoung static u_int8_t
2146 1.18 dyoung ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni)
2147 1.18 dyoung {
2148 1.18 dyoung struct ath_node *an = ATH_NODE(ni);
2149 1.18 dyoung int i, now, nsamples, rssi;
2150 1.18 dyoung
2151 1.18 dyoung /*
2152 1.18 dyoung * Calculate the average over the last second of sampled data.
2153 1.18 dyoung */
2154 1.18 dyoung now = ATH_TICKS();
2155 1.18 dyoung nsamples = 0;
2156 1.18 dyoung rssi = 0;
2157 1.18 dyoung i = an->an_rx_hist_next;
2158 1.18 dyoung do {
2159 1.18 dyoung struct ath_recv_hist *rh = &an->an_rx_hist[i];
2160 1.18 dyoung if (rh->arh_ticks == ATH_RHIST_NOTIME)
2161 1.18 dyoung goto done;
2162 1.18 dyoung if (now - rh->arh_ticks > hz)
2163 1.18 dyoung goto done;
2164 1.18 dyoung rssi += rh->arh_rssi;
2165 1.18 dyoung nsamples++;
2166 1.18 dyoung if (i == 0)
2167 1.18 dyoung i = ATH_RHIST_SIZE-1;
2168 1.18 dyoung else
2169 1.18 dyoung i--;
2170 1.18 dyoung } while (i != an->an_rx_hist_next);
2171 1.18 dyoung done:
2172 1.18 dyoung /*
2173 1.18 dyoung * Return either the average or the last known
2174 1.18 dyoung * value if there is no recent data.
2175 1.18 dyoung */
2176 1.18 dyoung return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi);
2177 1.18 dyoung }
2178 1.18 dyoung
2179 1.1 dyoung static int
2180 1.1 dyoung ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
2181 1.1 dyoung {
2182 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2183 1.1 dyoung int error;
2184 1.1 dyoung struct mbuf *m;
2185 1.1 dyoung struct ath_desc *ds;
2186 1.1 dyoung
2187 1.1 dyoung m = bf->bf_m;
2188 1.1 dyoung if (m == NULL) {
2189 1.1 dyoung /*
2190 1.1 dyoung * NB: by assigning a page to the rx dma buffer we
2191 1.1 dyoung * implicitly satisfy the Atheros requirement that
2192 1.1 dyoung * this buffer be cache-line-aligned and sized to be
2193 1.1 dyoung * multiple of the cache line size. Not doing this
2194 1.1 dyoung * causes weird stuff to happen (for the 5210 at least).
2195 1.1 dyoung */
2196 1.2 dyoung m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES);
2197 1.1 dyoung if (m == NULL) {
2198 1.25 dyoung DPRINTF(ATH_DEBUG_ANY,
2199 1.25 dyoung ("%s: no mbuf/cluster\n", __func__));
2200 1.1 dyoung sc->sc_stats.ast_rx_nombuf++;
2201 1.1 dyoung return ENOMEM;
2202 1.1 dyoung }
2203 1.1 dyoung bf->bf_m = m;
2204 1.1 dyoung m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
2205 1.1 dyoung
2206 1.2 dyoung error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m,
2207 1.2 dyoung BUS_DMA_NOWAIT);
2208 1.1 dyoung if (error != 0) {
2209 1.25 dyoung DPRINTF(ATH_DEBUG_ANY,
2210 1.25 dyoung ("%s: ath_buf_dmamap_load_mbuf failed;"
2211 1.25 dyoung " error %d\n", __func__, error));
2212 1.1 dyoung sc->sc_stats.ast_rx_busdma++;
2213 1.1 dyoung return error;
2214 1.1 dyoung }
2215 1.1 dyoung KASSERT(bf->bf_nseg == 1,
2216 1.1 dyoung ("ath_rxbuf_init: multi-segment packet; nseg %u",
2217 1.1 dyoung bf->bf_nseg));
2218 1.1 dyoung }
2219 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD);
2220 1.1 dyoung
2221 1.18 dyoung /*
2222 1.18 dyoung * Setup descriptors. For receive we always terminate
2223 1.18 dyoung * the descriptor list with a self-linked entry so we'll
2224 1.18 dyoung * not get overrun under high load (as can happen with a
2225 1.18 dyoung * 5212 when ANI processing enables PHY errors).
2226 1.18 dyoung *
2227 1.18 dyoung * To insure the last descriptor is self-linked we create
2228 1.18 dyoung * each descriptor as self-linked and add it to the end. As
2229 1.18 dyoung * each additional descriptor is added the previous self-linked
2230 1.18 dyoung * entry is ``fixed'' naturally. This should be safe even
2231 1.18 dyoung * if DMA is happening. When processing RX interrupts we
2232 1.18 dyoung * never remove/process the last, self-linked, entry on the
2233 1.18 dyoung * descriptor list. This insures the hardware always has
2234 1.18 dyoung * someplace to write a new frame.
2235 1.18 dyoung */
2236 1.1 dyoung ds = bf->bf_desc;
2237 1.18 dyoung ds->ds_link = bf->bf_daddr; /* link to self */
2238 1.1 dyoung ds->ds_data = bf->bf_segs[0].ds_addr;
2239 1.1 dyoung ath_hal_setuprxdesc(ah, ds
2240 1.1 dyoung , m->m_len /* buffer size */
2241 1.1 dyoung , 0
2242 1.1 dyoung );
2243 1.1 dyoung
2244 1.1 dyoung if (sc->sc_rxlink != NULL)
2245 1.1 dyoung *sc->sc_rxlink = bf->bf_daddr;
2246 1.1 dyoung sc->sc_rxlink = &ds->ds_link;
2247 1.1 dyoung return 0;
2248 1.1 dyoung }
2249 1.1 dyoung
2250 1.1 dyoung static void
2251 1.1 dyoung ath_rx_proc(void *arg, int npending)
2252 1.1 dyoung {
2253 1.18 dyoung #define PA2DESC(_sc, _pa) \
2254 1.18 dyoung ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
2255 1.18 dyoung ((_pa) - (_sc)->sc_desc_paddr)))
2256 1.1 dyoung struct ath_softc *sc = arg;
2257 1.1 dyoung struct ath_buf *bf;
2258 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2259 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
2260 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2261 1.1 dyoung struct ath_desc *ds;
2262 1.1 dyoung struct mbuf *m;
2263 1.1 dyoung struct ieee80211_frame *wh, whbuf;
2264 1.1 dyoung struct ieee80211_node *ni;
2265 1.18 dyoung struct ath_node *an;
2266 1.18 dyoung struct ath_recv_hist *rh;
2267 1.1 dyoung int len;
2268 1.1 dyoung u_int phyerr;
2269 1.1 dyoung HAL_STATUS status;
2270 1.1 dyoung
2271 1.25 dyoung DPRINTF(ATH_DEBUG_RX_PROC, ("%s: pending %u\n", __func__, npending));
2272 1.1 dyoung do {
2273 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_rxbuf);
2274 1.1 dyoung if (bf == NULL) { /* NB: shouldn't happen */
2275 1.1 dyoung if_printf(ifp, "ath_rx_proc: no buffer!\n");
2276 1.1 dyoung break;
2277 1.1 dyoung }
2278 1.18 dyoung ds = bf->bf_desc;
2279 1.18 dyoung if (ds->ds_link == bf->bf_daddr) {
2280 1.18 dyoung /* NB: never process the self-linked entry at the end */
2281 1.18 dyoung break;
2282 1.18 dyoung }
2283 1.1 dyoung m = bf->bf_m;
2284 1.1 dyoung if (m == NULL) { /* NB: shouldn't happen */
2285 1.1 dyoung if_printf(ifp, "ath_rx_proc: no mbuf!\n");
2286 1.1 dyoung continue;
2287 1.1 dyoung }
2288 1.18 dyoung /* XXX sync descriptor memory */
2289 1.18 dyoung /*
2290 1.18 dyoung * Must provide the virtual address of the current
2291 1.18 dyoung * descriptor, the physical address, and the virtual
2292 1.18 dyoung * address of the next descriptor in the h/w chain.
2293 1.18 dyoung * This allows the HAL to look ahead to see if the
2294 1.18 dyoung * hardware is done with a descriptor by checking the
2295 1.18 dyoung * done bit in the following descriptor and the address
2296 1.18 dyoung * of the current descriptor the DMA engine is working
2297 1.18 dyoung * on. All this is necessary because of our use of
2298 1.18 dyoung * a self-linked list to avoid rx overruns.
2299 1.18 dyoung */
2300 1.18 dyoung status = ath_hal_rxprocdesc(ah, ds,
2301 1.18 dyoung bf->bf_daddr, PA2DESC(sc, ds->ds_link));
2302 1.1 dyoung #ifdef AR_DEBUG
2303 1.25 dyoung if (ath_debug & ATH_DEBUG_RECV_DESC)
2304 1.1 dyoung ath_printrxbuf(bf, status == HAL_OK);
2305 1.1 dyoung #endif
2306 1.1 dyoung if (status == HAL_EINPROGRESS)
2307 1.1 dyoung break;
2308 1.1 dyoung TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
2309 1.33 dyoung
2310 1.33 dyoung if (ds->ds_rxstat.rs_more) {
2311 1.33 dyoung /*
2312 1.33 dyoung * Frame spans multiple descriptors; this
2313 1.33 dyoung * cannot happen yet as we don't support
2314 1.33 dyoung * jumbograms. If not in monitor mode,
2315 1.33 dyoung * discard the frame.
2316 1.33 dyoung */
2317 1.33 dyoung
2318 1.33 dyoung /* enable this if you want to see error frames in Monitor mode */
2319 1.33 dyoung #ifdef ERROR_FRAMES
2320 1.33 dyoung if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2321 1.33 dyoung /* XXX statistic */
2322 1.33 dyoung goto rx_next;
2323 1.33 dyoung }
2324 1.33 dyoung #endif
2325 1.33 dyoung /* fall thru for monitor mode handling... */
2326 1.33 dyoung
2327 1.33 dyoung } else if (ds->ds_rxstat.rs_status != 0) {
2328 1.1 dyoung if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC)
2329 1.1 dyoung sc->sc_stats.ast_rx_crcerr++;
2330 1.1 dyoung if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO)
2331 1.1 dyoung sc->sc_stats.ast_rx_fifoerr++;
2332 1.1 dyoung if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT)
2333 1.1 dyoung sc->sc_stats.ast_rx_badcrypt++;
2334 1.1 dyoung if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) {
2335 1.1 dyoung sc->sc_stats.ast_rx_phyerr++;
2336 1.1 dyoung phyerr = ds->ds_rxstat.rs_phyerr & 0x1f;
2337 1.1 dyoung sc->sc_stats.ast_rx_phy[phyerr]++;
2338 1.1 dyoung }
2339 1.33 dyoung
2340 1.33 dyoung /*
2341 1.33 dyoung * reject error frames, we normally don't want
2342 1.33 dyoung * to see them in monitor mode.
2343 1.33 dyoung */
2344 1.33 dyoung if ((ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT ) ||
2345 1.33 dyoung (ds->ds_rxstat.rs_status & HAL_RXERR_PHY))
2346 1.33 dyoung goto rx_next;
2347 1.33 dyoung
2348 1.33 dyoung /*
2349 1.33 dyoung * In monitor mode, allow through packets that
2350 1.33 dyoung * cannot be decrypted
2351 1.33 dyoung */
2352 1.33 dyoung if ((ds->ds_rxstat.rs_status & ~HAL_RXERR_DECRYPT) ||
2353 1.33 dyoung sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR)
2354 1.33 dyoung goto rx_next;
2355 1.1 dyoung }
2356 1.1 dyoung
2357 1.1 dyoung len = ds->ds_rxstat.rs_datalen;
2358 1.18 dyoung if (len < IEEE80211_MIN_LEN) {
2359 1.25 dyoung DPRINTF(ATH_DEBUG_RECV, ("%s: short packet %d\n",
2360 1.25 dyoung __func__, len));
2361 1.1 dyoung sc->sc_stats.ast_rx_tooshort++;
2362 1.1 dyoung goto rx_next;
2363 1.1 dyoung }
2364 1.1 dyoung
2365 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD);
2366 1.1 dyoung
2367 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2368 1.1 dyoung bf->bf_m = NULL;
2369 1.1 dyoung m->m_pkthdr.rcvif = ifp;
2370 1.1 dyoung m->m_pkthdr.len = m->m_len = len;
2371 1.1 dyoung
2372 1.2 dyoung #if NBPFILTER > 0
2373 1.1 dyoung if (sc->sc_drvbpf) {
2374 1.2 dyoung sc->sc_rx_th.wr_rate =
2375 1.2 dyoung sc->sc_hwmap[ds->ds_rxstat.rs_rate];
2376 1.25 dyoung sc->sc_rx_th.wr_antsignal = ds->ds_rxstat.rs_rssi;
2377 1.25 dyoung sc->sc_rx_th.wr_antenna = ds->ds_rxstat.rs_antenna;
2378 1.2 dyoung /* XXX TSF */
2379 1.25 dyoung bpf_mtap2(sc->sc_drvbpf,
2380 1.25 dyoung &sc->sc_rx_th, sc->sc_rx_th_len, m);
2381 1.1 dyoung }
2382 1.2 dyoung #endif
2383 1.1 dyoung
2384 1.1 dyoung m_adj(m, -IEEE80211_CRC_LEN);
2385 1.18 dyoung wh = mtod(m, struct ieee80211_frame *);
2386 1.1 dyoung if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
2387 1.1 dyoung /*
2388 1.1 dyoung * WEP is decrypted by hardware. Clear WEP bit
2389 1.1 dyoung * and trim WEP header for ieee80211_input().
2390 1.1 dyoung */
2391 1.1 dyoung wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
2392 1.1 dyoung memcpy(&whbuf, wh, sizeof(whbuf));
2393 1.1 dyoung m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN);
2394 1.18 dyoung wh = mtod(m, struct ieee80211_frame *);
2395 1.18 dyoung memcpy(wh, &whbuf, sizeof(whbuf));
2396 1.1 dyoung /*
2397 1.1 dyoung * Also trim WEP ICV from the tail.
2398 1.1 dyoung */
2399 1.1 dyoung m_adj(m, -IEEE80211_WEP_CRCLEN);
2400 1.6 dyoung /*
2401 1.6 dyoung * The header has probably moved.
2402 1.6 dyoung */
2403 1.6 dyoung wh = mtod(m, struct ieee80211_frame *);
2404 1.1 dyoung }
2405 1.1 dyoung
2406 1.1 dyoung /*
2407 1.1 dyoung * Locate the node for sender, track state, and
2408 1.1 dyoung * then pass this node (referenced) up to the 802.11
2409 1.1 dyoung * layer for its use. We are required to pass
2410 1.1 dyoung * something so we fall back to ic_bss when this frame
2411 1.1 dyoung * is from an unknown sender.
2412 1.1 dyoung */
2413 1.14 dyoung ni = ieee80211_find_rxnode(ic, wh);
2414 1.18 dyoung
2415 1.18 dyoung /*
2416 1.18 dyoung * Record driver-specific state.
2417 1.18 dyoung */
2418 1.18 dyoung an = ATH_NODE(ni);
2419 1.18 dyoung if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE)
2420 1.18 dyoung an->an_rx_hist_next = 0;
2421 1.18 dyoung rh = &an->an_rx_hist[an->an_rx_hist_next];
2422 1.18 dyoung rh->arh_ticks = ATH_TICKS();
2423 1.18 dyoung rh->arh_rssi = ds->ds_rxstat.rs_rssi;
2424 1.18 dyoung rh->arh_antenna = ds->ds_rxstat.rs_antenna;
2425 1.18 dyoung
2426 1.1 dyoung /*
2427 1.1 dyoung * Send frame up for processing.
2428 1.1 dyoung */
2429 1.1 dyoung ieee80211_input(ifp, m, ni,
2430 1.1 dyoung ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp);
2431 1.18 dyoung
2432 1.1 dyoung /*
2433 1.1 dyoung * The frame may have caused the node to be marked for
2434 1.1 dyoung * reclamation (e.g. in response to a DEAUTH message)
2435 1.1 dyoung * so use free_node here instead of unref_node.
2436 1.1 dyoung */
2437 1.1 dyoung if (ni == ic->ic_bss)
2438 1.1 dyoung ieee80211_unref_node(&ni);
2439 1.1 dyoung else
2440 1.1 dyoung ieee80211_free_node(ic, ni);
2441 1.1 dyoung rx_next:
2442 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
2443 1.1 dyoung } while (ath_rxbuf_init(sc, bf) == 0);
2444 1.1 dyoung
2445 1.1 dyoung ath_hal_rxmonitor(ah); /* rx signal state monitoring */
2446 1.1 dyoung ath_hal_rxena(ah); /* in case of RXEOL */
2447 1.16 dyoung
2448 1.18 dyoung #ifdef __NetBSD__
2449 1.16 dyoung if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd))
2450 1.16 dyoung ath_start(ifp);
2451 1.18 dyoung #endif /* __NetBSD__ */
2452 1.18 dyoung #undef PA2DESC
2453 1.1 dyoung }
2454 1.1 dyoung
2455 1.1 dyoung /*
2456 1.1 dyoung * XXX Size of an ACK control frame in bytes.
2457 1.1 dyoung */
2458 1.1 dyoung #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4)
2459 1.1 dyoung
2460 1.1 dyoung static int
2461 1.1 dyoung ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
2462 1.1 dyoung struct mbuf *m0)
2463 1.1 dyoung {
2464 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2465 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2466 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
2467 1.1 dyoung int i, error, iswep, hdrlen, pktlen;
2468 1.1 dyoung u_int8_t rix, cix, txrate, ctsrate;
2469 1.1 dyoung struct ath_desc *ds;
2470 1.1 dyoung struct mbuf *m;
2471 1.1 dyoung struct ieee80211_frame *wh;
2472 1.1 dyoung u_int32_t iv;
2473 1.1 dyoung u_int8_t *ivp;
2474 1.1 dyoung u_int8_t hdrbuf[sizeof(struct ieee80211_frame) +
2475 1.1 dyoung IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN];
2476 1.1 dyoung u_int subtype, flags, ctsduration, antenna;
2477 1.1 dyoung HAL_PKT_TYPE atype;
2478 1.1 dyoung const HAL_RATE_TABLE *rt;
2479 1.1 dyoung HAL_BOOL shortPreamble;
2480 1.1 dyoung struct ath_node *an;
2481 1.2 dyoung ath_txq_critsect_decl(s);
2482 1.1 dyoung
2483 1.1 dyoung wh = mtod(m0, struct ieee80211_frame *);
2484 1.1 dyoung iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
2485 1.1 dyoung hdrlen = sizeof(struct ieee80211_frame);
2486 1.1 dyoung pktlen = m0->m_pkthdr.len;
2487 1.1 dyoung
2488 1.1 dyoung if (iswep) {
2489 1.1 dyoung memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen);
2490 1.1 dyoung m_adj(m0, hdrlen);
2491 1.1 dyoung M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT);
2492 1.1 dyoung if (m0 == NULL) {
2493 1.1 dyoung sc->sc_stats.ast_tx_nombuf++;
2494 1.1 dyoung return ENOMEM;
2495 1.1 dyoung }
2496 1.1 dyoung ivp = hdrbuf + hdrlen;
2497 1.12 dyoung wh = mtod(m0, struct ieee80211_frame *);
2498 1.1 dyoung /*
2499 1.1 dyoung * XXX
2500 1.1 dyoung * IV must not duplicate during the lifetime of the key.
2501 1.1 dyoung * But no mechanism to renew keys is defined in IEEE 802.11
2502 1.33 dyoung * for WEP. And the IV may be duplicated at other stations
2503 1.33 dyoung * because the session key itself is shared. So we use a
2504 1.33 dyoung * pseudo random IV for now, though it is not the right way.
2505 1.33 dyoung *
2506 1.33 dyoung * NB: Rather than use a strictly random IV we select a
2507 1.33 dyoung * random one to start and then increment the value for
2508 1.33 dyoung * each frame. This is an explicit tradeoff between
2509 1.33 dyoung * overhead and security. Given the basic insecurity of
2510 1.33 dyoung * WEP this seems worthwhile.
2511 1.1 dyoung */
2512 1.33 dyoung
2513 1.18 dyoung /*
2514 1.18 dyoung * Skip 'bad' IVs from Fluhrer/Mantin/Shamir:
2515 1.33 dyoung * (B, 255, N) with 3 <= B < 16 and 0 <= N <= 255
2516 1.18 dyoung */
2517 1.33 dyoung iv = ic->ic_iv;
2518 1.33 dyoung if ((iv & 0xff00) == 0xff00) {
2519 1.33 dyoung int B = (iv & 0xff0000) >> 16;
2520 1.33 dyoung if (3 <= B && B < 16)
2521 1.33 dyoung iv = (B+1) << 16;
2522 1.33 dyoung }
2523 1.18 dyoung ic->ic_iv = iv + 1;
2524 1.33 dyoung
2525 1.33 dyoung /*
2526 1.33 dyoung * NB: Preserve byte order of IV for packet
2527 1.33 dyoung * sniffers; it doesn't matter otherwise.
2528 1.33 dyoung */
2529 1.33 dyoung #if AH_BYTE_ORDER == AH_BIG_ENDIAN
2530 1.33 dyoung ivp[0] = iv >> 0;
2531 1.33 dyoung ivp[1] = iv >> 8;
2532 1.33 dyoung ivp[2] = iv >> 16;
2533 1.33 dyoung #else
2534 1.33 dyoung ivp[2] = iv >> 0;
2535 1.33 dyoung ivp[1] = iv >> 8;
2536 1.33 dyoung ivp[0] = iv >> 16;
2537 1.33 dyoung #endif
2538 1.33 dyoung ivp[3] = ic->ic_wep_txkey << 6; /* Key ID and pad */
2539 1.1 dyoung memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf));
2540 1.1 dyoung /*
2541 1.1 dyoung * The ICV length must be included into hdrlen and pktlen.
2542 1.1 dyoung */
2543 1.1 dyoung hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN;
2544 1.1 dyoung pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN;
2545 1.1 dyoung }
2546 1.1 dyoung pktlen += IEEE80211_CRC_LEN;
2547 1.1 dyoung
2548 1.1 dyoung /*
2549 1.1 dyoung * Load the DMA map so any coalescing is done. This
2550 1.1 dyoung * also calculates the number of descriptors we need.
2551 1.1 dyoung */
2552 1.2 dyoung error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT);
2553 1.1 dyoung /*
2554 1.1 dyoung * Discard null packets and check for packets that
2555 1.1 dyoung * require too many TX descriptors. We try to convert
2556 1.1 dyoung * the latter to a cluster.
2557 1.1 dyoung */
2558 1.11 dyoung if (error == EFBIG) { /* too many desc's, linearize */
2559 1.1 dyoung sc->sc_stats.ast_tx_linear++;
2560 1.1 dyoung MGETHDR(m, M_DONTWAIT, MT_DATA);
2561 1.1 dyoung if (m == NULL) {
2562 1.1 dyoung sc->sc_stats.ast_tx_nombuf++;
2563 1.1 dyoung m_freem(m0);
2564 1.1 dyoung return ENOMEM;
2565 1.1 dyoung }
2566 1.2 dyoung #ifdef __FreeBSD__
2567 1.1 dyoung M_MOVE_PKTHDR(m, m0);
2568 1.2 dyoung #else
2569 1.2 dyoung M_COPY_PKTHDR(m, m0);
2570 1.2 dyoung #endif
2571 1.1 dyoung MCLGET(m, M_DONTWAIT);
2572 1.1 dyoung if ((m->m_flags & M_EXT) == 0) {
2573 1.1 dyoung sc->sc_stats.ast_tx_nomcl++;
2574 1.1 dyoung m_freem(m0);
2575 1.1 dyoung m_free(m);
2576 1.1 dyoung return ENOMEM;
2577 1.1 dyoung }
2578 1.1 dyoung m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
2579 1.1 dyoung m_freem(m0);
2580 1.1 dyoung m->m_len = m->m_pkthdr.len;
2581 1.1 dyoung m0 = m;
2582 1.2 dyoung error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0,
2583 1.2 dyoung BUS_DMA_NOWAIT);
2584 1.1 dyoung if (error != 0) {
2585 1.1 dyoung sc->sc_stats.ast_tx_busdma++;
2586 1.1 dyoung m_freem(m0);
2587 1.1 dyoung return error;
2588 1.1 dyoung }
2589 1.1 dyoung KASSERT(bf->bf_nseg == 1,
2590 1.1 dyoung ("ath_tx_start: packet not one segment; nseg %u",
2591 1.1 dyoung bf->bf_nseg));
2592 1.11 dyoung } else if (error != 0) {
2593 1.11 dyoung sc->sc_stats.ast_tx_busdma++;
2594 1.11 dyoung m_freem(m0);
2595 1.11 dyoung return error;
2596 1.1 dyoung } else if (bf->bf_nseg == 0) { /* null packet, discard */
2597 1.1 dyoung sc->sc_stats.ast_tx_nodata++;
2598 1.1 dyoung m_freem(m0);
2599 1.1 dyoung return EIO;
2600 1.1 dyoung }
2601 1.25 dyoung DPRINTF(ATH_DEBUG_XMIT, ("%s: m %p len %u\n", __func__, m0, pktlen));
2602 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
2603 1.1 dyoung bf->bf_m = m0;
2604 1.1 dyoung bf->bf_node = ni; /* NB: held reference */
2605 1.1 dyoung
2606 1.1 dyoung /* setup descriptors */
2607 1.1 dyoung ds = bf->bf_desc;
2608 1.1 dyoung rt = sc->sc_currates;
2609 1.1 dyoung KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2610 1.1 dyoung
2611 1.1 dyoung /*
2612 1.1 dyoung * Calculate Atheros packet type from IEEE80211 packet header
2613 1.1 dyoung * and setup for rate calculations.
2614 1.1 dyoung */
2615 1.1 dyoung atype = HAL_PKT_TYPE_NORMAL; /* default */
2616 1.1 dyoung switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
2617 1.1 dyoung case IEEE80211_FC0_TYPE_MGT:
2618 1.1 dyoung subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2619 1.1 dyoung if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
2620 1.1 dyoung atype = HAL_PKT_TYPE_BEACON;
2621 1.1 dyoung else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
2622 1.1 dyoung atype = HAL_PKT_TYPE_PROBE_RESP;
2623 1.1 dyoung else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
2624 1.1 dyoung atype = HAL_PKT_TYPE_ATIM;
2625 1.1 dyoung rix = 0; /* XXX lowest rate */
2626 1.1 dyoung break;
2627 1.1 dyoung case IEEE80211_FC0_TYPE_CTL:
2628 1.1 dyoung subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2629 1.1 dyoung if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL)
2630 1.1 dyoung atype = HAL_PKT_TYPE_PSPOLL;
2631 1.1 dyoung rix = 0; /* XXX lowest rate */
2632 1.1 dyoung break;
2633 1.1 dyoung default:
2634 1.1 dyoung rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] &
2635 1.1 dyoung IEEE80211_RATE_VAL];
2636 1.1 dyoung if (rix == 0xff) {
2637 1.1 dyoung if_printf(ifp, "bogus xmit rate 0x%x\n",
2638 1.1 dyoung ni->ni_rates.rs_rates[ni->ni_txrate]);
2639 1.1 dyoung sc->sc_stats.ast_tx_badrate++;
2640 1.1 dyoung m_freem(m0);
2641 1.1 dyoung return EIO;
2642 1.1 dyoung }
2643 1.1 dyoung break;
2644 1.1 dyoung }
2645 1.1 dyoung /*
2646 1.1 dyoung * NB: the 802.11 layer marks whether or not we should
2647 1.1 dyoung * use short preamble based on the current mode and
2648 1.1 dyoung * negotiated parameters.
2649 1.1 dyoung */
2650 1.18 dyoung if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
2651 1.18 dyoung (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
2652 1.1 dyoung txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble;
2653 1.1 dyoung shortPreamble = AH_TRUE;
2654 1.1 dyoung sc->sc_stats.ast_tx_shortpre++;
2655 1.1 dyoung } else {
2656 1.1 dyoung txrate = rt->info[rix].rateCode;
2657 1.1 dyoung shortPreamble = AH_FALSE;
2658 1.1 dyoung }
2659 1.1 dyoung
2660 1.1 dyoung /*
2661 1.1 dyoung * Calculate miscellaneous flags.
2662 1.1 dyoung */
2663 1.1 dyoung flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */
2664 1.1 dyoung if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2665 1.1 dyoung flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
2666 1.1 dyoung sc->sc_stats.ast_tx_noack++;
2667 1.1 dyoung } else if (pktlen > ic->ic_rtsthreshold) {
2668 1.1 dyoung flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
2669 1.1 dyoung sc->sc_stats.ast_tx_rts++;
2670 1.1 dyoung }
2671 1.1 dyoung
2672 1.1 dyoung /*
2673 1.18 dyoung * Calculate duration. This logically belongs in the 802.11
2674 1.18 dyoung * layer but it lacks sufficient information to calculate it.
2675 1.18 dyoung */
2676 1.18 dyoung if ((flags & HAL_TXDESC_NOACK) == 0 &&
2677 1.18 dyoung (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
2678 1.18 dyoung u_int16_t dur;
2679 1.18 dyoung /*
2680 1.18 dyoung * XXX not right with fragmentation.
2681 1.18 dyoung */
2682 1.18 dyoung dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE,
2683 1.18 dyoung rix, shortPreamble);
2684 1.18 dyoung *((u_int16_t*) wh->i_dur) = htole16(dur);
2685 1.18 dyoung }
2686 1.18 dyoung
2687 1.18 dyoung /*
2688 1.1 dyoung * Calculate RTS/CTS rate and duration if needed.
2689 1.1 dyoung */
2690 1.1 dyoung ctsduration = 0;
2691 1.1 dyoung if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
2692 1.1 dyoung /*
2693 1.1 dyoung * CTS transmit rate is derived from the transmit rate
2694 1.1 dyoung * by looking in the h/w rate table. We must also factor
2695 1.1 dyoung * in whether or not a short preamble is to be used.
2696 1.1 dyoung */
2697 1.1 dyoung cix = rt->info[rix].controlRate;
2698 1.1 dyoung ctsrate = rt->info[cix].rateCode;
2699 1.1 dyoung if (shortPreamble)
2700 1.1 dyoung ctsrate |= rt->info[cix].shortPreamble;
2701 1.1 dyoung /*
2702 1.1 dyoung * Compute the transmit duration based on the size
2703 1.1 dyoung * of an ACK frame. We call into the HAL to do the
2704 1.1 dyoung * computation since it depends on the characteristics
2705 1.1 dyoung * of the actual PHY being used.
2706 1.1 dyoung */
2707 1.1 dyoung if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */
2708 1.1 dyoung ctsduration += ath_hal_computetxtime(ah,
2709 1.1 dyoung rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
2710 1.1 dyoung }
2711 1.1 dyoung /* SIFS + data */
2712 1.1 dyoung ctsduration += ath_hal_computetxtime(ah,
2713 1.1 dyoung rt, pktlen, rix, shortPreamble);
2714 1.1 dyoung if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */
2715 1.1 dyoung ctsduration += ath_hal_computetxtime(ah,
2716 1.1 dyoung rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
2717 1.1 dyoung }
2718 1.1 dyoung } else
2719 1.1 dyoung ctsrate = 0;
2720 1.1 dyoung
2721 1.1 dyoung /*
2722 1.1 dyoung * For now use the antenna on which the last good
2723 1.1 dyoung * frame was received on. We assume this field is
2724 1.1 dyoung * initialized to 0 which gives us ``auto'' or the
2725 1.1 dyoung * ``default'' antenna.
2726 1.1 dyoung */
2727 1.1 dyoung an = (struct ath_node *) ni;
2728 1.1 dyoung if (an->an_tx_antenna)
2729 1.1 dyoung antenna = an->an_tx_antenna;
2730 1.1 dyoung else
2731 1.18 dyoung antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna;
2732 1.1 dyoung
2733 1.25 dyoung if (ic->ic_rawbpf)
2734 1.25 dyoung bpf_mtap(ic->ic_rawbpf, m0);
2735 1.25 dyoung if (sc->sc_drvbpf) {
2736 1.25 dyoung sc->sc_tx_th.wt_flags = 0;
2737 1.25 dyoung if (shortPreamble)
2738 1.25 dyoung sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2739 1.25 dyoung if (iswep)
2740 1.25 dyoung sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2741 1.25 dyoung sc->sc_tx_th.wt_rate = ni->ni_rates.rs_rates[ni->ni_txrate];
2742 1.25 dyoung sc->sc_tx_th.wt_txpower = 60/2; /* XXX */
2743 1.25 dyoung sc->sc_tx_th.wt_antenna = antenna;
2744 1.25 dyoung
2745 1.25 dyoung bpf_mtap2(sc->sc_drvbpf,
2746 1.25 dyoung &sc->sc_tx_th, sc->sc_tx_th_len, m0);
2747 1.25 dyoung }
2748 1.25 dyoung
2749 1.1 dyoung /*
2750 1.1 dyoung * Formulate first tx descriptor with tx controls.
2751 1.1 dyoung */
2752 1.1 dyoung /* XXX check return value? */
2753 1.1 dyoung ath_hal_setuptxdesc(ah, ds
2754 1.1 dyoung , pktlen /* packet length */
2755 1.1 dyoung , hdrlen /* header length */
2756 1.1 dyoung , atype /* Atheros packet type */
2757 1.1 dyoung , 60 /* txpower XXX */
2758 1.1 dyoung , txrate, 1+10 /* series 0 rate/tries */
2759 1.1 dyoung , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID
2760 1.1 dyoung , antenna /* antenna mode */
2761 1.1 dyoung , flags /* flags */
2762 1.1 dyoung , ctsrate /* rts/cts rate */
2763 1.1 dyoung , ctsduration /* rts/cts duration */
2764 1.1 dyoung );
2765 1.1 dyoung #ifdef notyet
2766 1.1 dyoung ath_hal_setupxtxdesc(ah, ds
2767 1.1 dyoung , AH_FALSE /* short preamble */
2768 1.1 dyoung , 0, 0 /* series 1 rate/tries */
2769 1.1 dyoung , 0, 0 /* series 2 rate/tries */
2770 1.1 dyoung , 0, 0 /* series 3 rate/tries */
2771 1.1 dyoung );
2772 1.1 dyoung #endif
2773 1.1 dyoung /*
2774 1.1 dyoung * Fillin the remainder of the descriptor info.
2775 1.1 dyoung */
2776 1.1 dyoung for (i = 0; i < bf->bf_nseg; i++, ds++) {
2777 1.1 dyoung ds->ds_data = bf->bf_segs[i].ds_addr;
2778 1.1 dyoung if (i == bf->bf_nseg - 1)
2779 1.1 dyoung ds->ds_link = 0;
2780 1.1 dyoung else
2781 1.1 dyoung ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
2782 1.1 dyoung ath_hal_filltxdesc(ah, ds
2783 1.1 dyoung , bf->bf_segs[i].ds_len /* segment length */
2784 1.1 dyoung , i == 0 /* first segment */
2785 1.1 dyoung , i == bf->bf_nseg - 1 /* last segment */
2786 1.1 dyoung );
2787 1.25 dyoung DPRINTF(ATH_DEBUG_XMIT,
2788 1.25 dyoung ("%s: %d: %08x %08x %08x %08x %08x %08x\n",
2789 1.25 dyoung __func__, i, ds->ds_link, ds->ds_data,
2790 1.25 dyoung ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]));
2791 1.1 dyoung }
2792 1.1 dyoung
2793 1.1 dyoung /*
2794 1.1 dyoung * Insert the frame on the outbound list and
2795 1.1 dyoung * pass it on to the hardware.
2796 1.1 dyoung */
2797 1.2 dyoung ath_txq_critsect_begin(sc, s);
2798 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
2799 1.1 dyoung if (sc->sc_txlink == NULL) {
2800 1.1 dyoung ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr);
2801 1.25 dyoung DPRINTF(ATH_DEBUG_XMIT, ("%s: TXDP0 = %p (%p)\n", __func__,
2802 1.1 dyoung (caddr_t)bf->bf_daddr, bf->bf_desc));
2803 1.1 dyoung } else {
2804 1.1 dyoung *sc->sc_txlink = bf->bf_daddr;
2805 1.25 dyoung DPRINTF(ATH_DEBUG_XMIT, ("%s: link(%p)=%p (%p)\n", __func__,
2806 1.1 dyoung sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc));
2807 1.1 dyoung }
2808 1.1 dyoung sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
2809 1.2 dyoung ath_txq_critsect_end(sc, s);
2810 1.1 dyoung
2811 1.1 dyoung ath_hal_txstart(ah, sc->sc_txhalq);
2812 1.1 dyoung return 0;
2813 1.1 dyoung }
2814 1.1 dyoung
2815 1.1 dyoung static void
2816 1.1 dyoung ath_tx_proc(void *arg, int npending)
2817 1.1 dyoung {
2818 1.1 dyoung struct ath_softc *sc = arg;
2819 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2820 1.1 dyoung struct ath_buf *bf;
2821 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2822 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
2823 1.1 dyoung struct ath_desc *ds;
2824 1.1 dyoung struct ieee80211_node *ni;
2825 1.1 dyoung struct ath_node *an;
2826 1.1 dyoung int sr, lr;
2827 1.1 dyoung HAL_STATUS status;
2828 1.2 dyoung ath_txq_critsect_decl(s);
2829 1.2 dyoung ath_txbuf_critsect_decl(s2);
2830 1.1 dyoung
2831 1.25 dyoung DPRINTF(ATH_DEBUG_TX_PROC, ("%s: pending %u tx queue %p, link %p\n",
2832 1.25 dyoung __func__, npending,
2833 1.25 dyoung (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq),
2834 1.1 dyoung sc->sc_txlink));
2835 1.1 dyoung for (;;) {
2836 1.2 dyoung ath_txq_critsect_begin(sc, s);
2837 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_txq);
2838 1.1 dyoung if (bf == NULL) {
2839 1.1 dyoung sc->sc_txlink = NULL;
2840 1.2 dyoung ath_txq_critsect_end(sc, s);
2841 1.1 dyoung break;
2842 1.1 dyoung }
2843 1.1 dyoung /* only the last descriptor is needed */
2844 1.1 dyoung ds = &bf->bf_desc[bf->bf_nseg - 1];
2845 1.1 dyoung status = ath_hal_txprocdesc(ah, ds);
2846 1.1 dyoung #ifdef AR_DEBUG
2847 1.25 dyoung if (ath_debug & ATH_DEBUG_XMIT_DESC)
2848 1.1 dyoung ath_printtxbuf(bf, status == HAL_OK);
2849 1.1 dyoung #endif
2850 1.1 dyoung if (status == HAL_EINPROGRESS) {
2851 1.2 dyoung ath_txq_critsect_end(sc, s);
2852 1.1 dyoung break;
2853 1.1 dyoung }
2854 1.1 dyoung TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
2855 1.2 dyoung ath_txq_critsect_end(sc, s);
2856 1.1 dyoung
2857 1.1 dyoung ni = bf->bf_node;
2858 1.1 dyoung if (ni != NULL) {
2859 1.1 dyoung an = (struct ath_node *) ni;
2860 1.1 dyoung if (ds->ds_txstat.ts_status == 0) {
2861 1.1 dyoung an->an_tx_ok++;
2862 1.1 dyoung an->an_tx_antenna = ds->ds_txstat.ts_antenna;
2863 1.1 dyoung } else {
2864 1.1 dyoung an->an_tx_err++;
2865 1.1 dyoung ifp->if_oerrors++;
2866 1.1 dyoung if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY)
2867 1.1 dyoung sc->sc_stats.ast_tx_xretries++;
2868 1.1 dyoung if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO)
2869 1.1 dyoung sc->sc_stats.ast_tx_fifoerr++;
2870 1.1 dyoung if (ds->ds_txstat.ts_status & HAL_TXERR_FILT)
2871 1.1 dyoung sc->sc_stats.ast_tx_filtered++;
2872 1.1 dyoung an->an_tx_antenna = 0; /* invalidate */
2873 1.1 dyoung }
2874 1.1 dyoung sr = ds->ds_txstat.ts_shortretry;
2875 1.1 dyoung lr = ds->ds_txstat.ts_longretry;
2876 1.1 dyoung sc->sc_stats.ast_tx_shortretry += sr;
2877 1.1 dyoung sc->sc_stats.ast_tx_longretry += lr;
2878 1.1 dyoung if (sr + lr)
2879 1.1 dyoung an->an_tx_retr++;
2880 1.1 dyoung /*
2881 1.1 dyoung * Reclaim reference to node.
2882 1.1 dyoung *
2883 1.1 dyoung * NB: the node may be reclaimed here if, for example
2884 1.1 dyoung * this is a DEAUTH message that was sent and the
2885 1.1 dyoung * node was timed out due to inactivity.
2886 1.1 dyoung */
2887 1.1 dyoung if (ni != ic->ic_bss)
2888 1.1 dyoung ieee80211_free_node(ic, ni);
2889 1.1 dyoung }
2890 1.2 dyoung ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE);
2891 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2892 1.1 dyoung m_freem(bf->bf_m);
2893 1.1 dyoung bf->bf_m = NULL;
2894 1.1 dyoung bf->bf_node = NULL;
2895 1.1 dyoung
2896 1.2 dyoung ath_txbuf_critsect_begin(sc, s2);
2897 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2898 1.2 dyoung ath_txbuf_critsect_end(sc, s2);
2899 1.1 dyoung }
2900 1.1 dyoung ifp->if_flags &= ~IFF_OACTIVE;
2901 1.1 dyoung sc->sc_tx_timer = 0;
2902 1.1 dyoung
2903 1.1 dyoung ath_start(ifp);
2904 1.1 dyoung }
2905 1.1 dyoung
2906 1.1 dyoung /*
2907 1.1 dyoung * Drain the transmit queue and reclaim resources.
2908 1.1 dyoung */
2909 1.1 dyoung static void
2910 1.1 dyoung ath_draintxq(struct ath_softc *sc)
2911 1.1 dyoung {
2912 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2913 1.25 dyoung struct ieee80211com *ic = &sc->sc_ic;
2914 1.25 dyoung struct ifnet *ifp = &ic->ic_if;
2915 1.25 dyoung struct ieee80211_node *ni;
2916 1.1 dyoung struct ath_buf *bf;
2917 1.2 dyoung ath_txq_critsect_decl(s);
2918 1.2 dyoung ath_txbuf_critsect_decl(s2);
2919 1.1 dyoung
2920 1.1 dyoung /* XXX return value */
2921 1.1 dyoung if (!sc->sc_invalid) {
2922 1.1 dyoung /* don't touch the hardware if marked invalid */
2923 1.1 dyoung (void) ath_hal_stoptxdma(ah, sc->sc_txhalq);
2924 1.25 dyoung DPRINTF(ATH_DEBUG_RESET,
2925 1.25 dyoung ("%s: tx queue %p, link %p\n", __func__,
2926 1.25 dyoung (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq),
2927 1.1 dyoung sc->sc_txlink));
2928 1.1 dyoung (void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
2929 1.25 dyoung DPRINTF(ATH_DEBUG_RESET,
2930 1.25 dyoung ("%s: beacon queue %p\n", __func__,
2931 1.25 dyoung (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq)));
2932 1.1 dyoung }
2933 1.1 dyoung for (;;) {
2934 1.2 dyoung ath_txq_critsect_begin(sc, s);
2935 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_txq);
2936 1.1 dyoung if (bf == NULL) {
2937 1.1 dyoung sc->sc_txlink = NULL;
2938 1.2 dyoung ath_txq_critsect_end(sc, s);
2939 1.1 dyoung break;
2940 1.1 dyoung }
2941 1.1 dyoung TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
2942 1.2 dyoung ath_txq_critsect_end(sc, s);
2943 1.1 dyoung #ifdef AR_DEBUG
2944 1.25 dyoung if (ath_debug & ATH_DEBUG_RESET)
2945 1.1 dyoung ath_printtxbuf(bf,
2946 1.1 dyoung ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK);
2947 1.1 dyoung #endif /* AR_DEBUG */
2948 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2949 1.1 dyoung m_freem(bf->bf_m);
2950 1.1 dyoung bf->bf_m = NULL;
2951 1.25 dyoung ni = bf->bf_node;
2952 1.1 dyoung bf->bf_node = NULL;
2953 1.2 dyoung ath_txbuf_critsect_begin(sc, s2);
2954 1.25 dyoung if (ni != NULL && ni != ic->ic_bss) {
2955 1.25 dyoung /*
2956 1.25 dyoung * Reclaim node reference.
2957 1.25 dyoung */
2958 1.25 dyoung ieee80211_free_node(ic, ni);
2959 1.25 dyoung }
2960 1.1 dyoung TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2961 1.2 dyoung ath_txbuf_critsect_end(sc, s2);
2962 1.1 dyoung }
2963 1.1 dyoung ifp->if_flags &= ~IFF_OACTIVE;
2964 1.1 dyoung sc->sc_tx_timer = 0;
2965 1.1 dyoung }
2966 1.1 dyoung
2967 1.1 dyoung /*
2968 1.1 dyoung * Disable the receive h/w in preparation for a reset.
2969 1.1 dyoung */
2970 1.1 dyoung static void
2971 1.1 dyoung ath_stoprecv(struct ath_softc *sc)
2972 1.1 dyoung {
2973 1.18 dyoung #define PA2DESC(_sc, _pa) \
2974 1.18 dyoung ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
2975 1.18 dyoung ((_pa) - (_sc)->sc_desc_paddr)))
2976 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
2977 1.1 dyoung
2978 1.1 dyoung ath_hal_stoppcurecv(ah); /* disable PCU */
2979 1.1 dyoung ath_hal_setrxfilter(ah, 0); /* clear recv filter */
2980 1.1 dyoung ath_hal_stopdmarecv(ah); /* disable DMA engine */
2981 1.1 dyoung DELAY(3000); /* long enough for 1 frame */
2982 1.1 dyoung #ifdef AR_DEBUG
2983 1.25 dyoung if (ath_debug & ATH_DEBUG_RESET) {
2984 1.1 dyoung struct ath_buf *bf;
2985 1.1 dyoung
2986 1.25 dyoung printf("%s: rx queue %p, link %p\n", __func__,
2987 1.25 dyoung (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
2988 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
2989 1.18 dyoung struct ath_desc *ds = bf->bf_desc;
2990 1.18 dyoung if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr,
2991 1.18 dyoung PA2DESC(sc, ds->ds_link)) == HAL_OK)
2992 1.1 dyoung ath_printrxbuf(bf, 1);
2993 1.1 dyoung }
2994 1.1 dyoung }
2995 1.1 dyoung #endif
2996 1.1 dyoung sc->sc_rxlink = NULL; /* just in case */
2997 1.18 dyoung #undef PA2DESC
2998 1.1 dyoung }
2999 1.1 dyoung
3000 1.1 dyoung /*
3001 1.1 dyoung * Enable the receive h/w following a reset.
3002 1.1 dyoung */
3003 1.1 dyoung static int
3004 1.1 dyoung ath_startrecv(struct ath_softc *sc)
3005 1.1 dyoung {
3006 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
3007 1.1 dyoung struct ath_buf *bf;
3008 1.1 dyoung
3009 1.1 dyoung sc->sc_rxlink = NULL;
3010 1.1 dyoung TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
3011 1.1 dyoung int error = ath_rxbuf_init(sc, bf);
3012 1.1 dyoung if (error != 0) {
3013 1.25 dyoung DPRINTF(ATH_DEBUG_RECV,
3014 1.25 dyoung ("%s: ath_rxbuf_init failed %d\n",
3015 1.25 dyoung __func__, error));
3016 1.1 dyoung return error;
3017 1.1 dyoung }
3018 1.1 dyoung }
3019 1.1 dyoung
3020 1.1 dyoung bf = TAILQ_FIRST(&sc->sc_rxbuf);
3021 1.1 dyoung ath_hal_putrxbuf(ah, bf->bf_daddr);
3022 1.1 dyoung ath_hal_rxena(ah); /* enable recv descriptors */
3023 1.1 dyoung ath_mode_init(sc); /* set filters, etc. */
3024 1.1 dyoung ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
3025 1.1 dyoung return 0;
3026 1.1 dyoung }
3027 1.1 dyoung
3028 1.1 dyoung /*
3029 1.1 dyoung * Set/change channels. If the channel is really being changed,
3030 1.1 dyoung * it's done by resetting the chip. To accomplish this we must
3031 1.1 dyoung * first cleanup any pending DMA, then restart stuff after a la
3032 1.1 dyoung * ath_init.
3033 1.1 dyoung */
3034 1.1 dyoung static int
3035 1.1 dyoung ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
3036 1.1 dyoung {
3037 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
3038 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
3039 1.1 dyoung
3040 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: %u (%u MHz) -> %u (%u MHz)\n", __func__,
3041 1.1 dyoung ieee80211_chan2ieee(ic, ic->ic_ibss_chan),
3042 1.1 dyoung ic->ic_ibss_chan->ic_freq,
3043 1.1 dyoung ieee80211_chan2ieee(ic, chan), chan->ic_freq));
3044 1.1 dyoung if (chan != ic->ic_ibss_chan) {
3045 1.1 dyoung HAL_STATUS status;
3046 1.1 dyoung HAL_CHANNEL hchan;
3047 1.1 dyoung enum ieee80211_phymode mode;
3048 1.1 dyoung
3049 1.1 dyoung /*
3050 1.1 dyoung * To switch channels clear any pending DMA operations;
3051 1.1 dyoung * wait long enough for the RX fifo to drain, reset the
3052 1.1 dyoung * hardware at the new frequency, and then re-enable
3053 1.1 dyoung * the relevant bits of the h/w.
3054 1.1 dyoung */
3055 1.1 dyoung ath_hal_intrset(ah, 0); /* disable interrupts */
3056 1.1 dyoung ath_draintxq(sc); /* clear pending tx frames */
3057 1.1 dyoung ath_stoprecv(sc); /* turn off frame recv */
3058 1.1 dyoung /*
3059 1.1 dyoung * Convert to a HAL channel description with
3060 1.1 dyoung * the flags constrained to reflect the current
3061 1.1 dyoung * operating mode.
3062 1.1 dyoung */
3063 1.1 dyoung hchan.channel = chan->ic_freq;
3064 1.1 dyoung hchan.channelFlags = ath_chan2flags(ic, chan);
3065 1.1 dyoung if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) {
3066 1.1 dyoung if_printf(&ic->ic_if, "ath_chan_set: unable to reset "
3067 1.1 dyoung "channel %u (%u Mhz)\n",
3068 1.1 dyoung ieee80211_chan2ieee(ic, chan), chan->ic_freq);
3069 1.1 dyoung return EIO;
3070 1.1 dyoung }
3071 1.1 dyoung /*
3072 1.1 dyoung * Re-enable rx framework.
3073 1.1 dyoung */
3074 1.1 dyoung if (ath_startrecv(sc) != 0) {
3075 1.1 dyoung if_printf(&ic->ic_if,
3076 1.1 dyoung "ath_chan_set: unable to restart recv logic\n");
3077 1.1 dyoung return EIO;
3078 1.1 dyoung }
3079 1.1 dyoung
3080 1.1 dyoung /*
3081 1.1 dyoung * Update BPF state.
3082 1.1 dyoung */
3083 1.1 dyoung sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
3084 1.1 dyoung htole16(chan->ic_freq);
3085 1.1 dyoung sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
3086 1.1 dyoung htole16(chan->ic_flags);
3087 1.1 dyoung
3088 1.1 dyoung /*
3089 1.1 dyoung * Change channels and update the h/w rate map
3090 1.1 dyoung * if we're switching; e.g. 11a to 11b/g.
3091 1.1 dyoung */
3092 1.1 dyoung ic->ic_ibss_chan = chan;
3093 1.1 dyoung mode = ieee80211_chan2mode(ic, chan);
3094 1.1 dyoung if (mode != sc->sc_curmode)
3095 1.1 dyoung ath_setcurmode(sc, mode);
3096 1.1 dyoung
3097 1.1 dyoung /*
3098 1.1 dyoung * Re-enable interrupts.
3099 1.1 dyoung */
3100 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
3101 1.1 dyoung }
3102 1.1 dyoung return 0;
3103 1.1 dyoung }
3104 1.1 dyoung
3105 1.1 dyoung static void
3106 1.1 dyoung ath_next_scan(void *arg)
3107 1.1 dyoung {
3108 1.1 dyoung struct ath_softc *sc = arg;
3109 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
3110 1.2 dyoung int s;
3111 1.2 dyoung
3112 1.2 dyoung /* don't call ath_start w/o network interrupts blocked */
3113 1.2 dyoung s = splnet();
3114 1.1 dyoung
3115 1.1 dyoung if (ic->ic_state == IEEE80211_S_SCAN)
3116 1.30 mycroft ieee80211_next_scan(ic);
3117 1.2 dyoung splx(s);
3118 1.1 dyoung }
3119 1.1 dyoung
3120 1.1 dyoung /*
3121 1.1 dyoung * Periodically recalibrate the PHY to account
3122 1.1 dyoung * for temperature/environment changes.
3123 1.1 dyoung */
3124 1.1 dyoung static void
3125 1.1 dyoung ath_calibrate(void *arg)
3126 1.1 dyoung {
3127 1.1 dyoung struct ath_softc *sc = arg;
3128 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
3129 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
3130 1.1 dyoung struct ieee80211_channel *c;
3131 1.1 dyoung HAL_CHANNEL hchan;
3132 1.1 dyoung
3133 1.1 dyoung sc->sc_stats.ast_per_cal++;
3134 1.1 dyoung
3135 1.1 dyoung /*
3136 1.1 dyoung * Convert to a HAL channel description with the flags
3137 1.1 dyoung * constrained to reflect the current operating mode.
3138 1.1 dyoung */
3139 1.1 dyoung c = ic->ic_ibss_chan;
3140 1.1 dyoung hchan.channel = c->ic_freq;
3141 1.1 dyoung hchan.channelFlags = ath_chan2flags(ic, c);
3142 1.1 dyoung
3143 1.25 dyoung DPRINTF(ATH_DEBUG_CALIBRATE,
3144 1.25 dyoung ("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags));
3145 1.1 dyoung
3146 1.1 dyoung if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
3147 1.1 dyoung /*
3148 1.1 dyoung * Rfgain is out of bounds, reset the chip
3149 1.1 dyoung * to load new gain values.
3150 1.1 dyoung */
3151 1.1 dyoung sc->sc_stats.ast_per_rfgain++;
3152 1.1 dyoung ath_reset(sc);
3153 1.1 dyoung }
3154 1.1 dyoung if (!ath_hal_calibrate(ah, &hchan)) {
3155 1.25 dyoung DPRINTF(ATH_DEBUG_ANY,
3156 1.25 dyoung ("%s: calibration of channel %u failed\n",
3157 1.1 dyoung __func__, c->ic_freq));
3158 1.1 dyoung sc->sc_stats.ast_per_calfail++;
3159 1.1 dyoung }
3160 1.1 dyoung callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc);
3161 1.1 dyoung }
3162 1.1 dyoung
3163 1.4 dyoung static HAL_LED_STATE
3164 1.4 dyoung ath_state_to_led(enum ieee80211_state state)
3165 1.4 dyoung {
3166 1.4 dyoung switch (state) {
3167 1.4 dyoung case IEEE80211_S_INIT:
3168 1.4 dyoung return HAL_LED_INIT;
3169 1.4 dyoung case IEEE80211_S_SCAN:
3170 1.4 dyoung return HAL_LED_SCAN;
3171 1.4 dyoung case IEEE80211_S_AUTH:
3172 1.4 dyoung return HAL_LED_AUTH;
3173 1.4 dyoung case IEEE80211_S_ASSOC:
3174 1.4 dyoung return HAL_LED_ASSOC;
3175 1.4 dyoung case IEEE80211_S_RUN:
3176 1.4 dyoung return HAL_LED_RUN;
3177 1.4 dyoung default:
3178 1.4 dyoung panic("%s: unknown 802.11 state %d\n", __func__, state);
3179 1.4 dyoung return HAL_LED_INIT;
3180 1.4 dyoung }
3181 1.4 dyoung }
3182 1.4 dyoung
3183 1.1 dyoung static int
3184 1.1 dyoung ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
3185 1.1 dyoung {
3186 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
3187 1.1 dyoung struct ath_softc *sc = ifp->if_softc;
3188 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
3189 1.1 dyoung struct ieee80211_node *ni;
3190 1.1 dyoung int i, error;
3191 1.18 dyoung const u_int8_t *bssid;
3192 1.1 dyoung u_int32_t rfilt;
3193 1.1 dyoung
3194 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: %s -> %s\n", __func__,
3195 1.1 dyoung ieee80211_state_name[ic->ic_state],
3196 1.1 dyoung ieee80211_state_name[nstate]));
3197 1.1 dyoung
3198 1.4 dyoung ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */
3199 1.1 dyoung
3200 1.1 dyoung if (nstate == IEEE80211_S_INIT) {
3201 1.1 dyoung sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
3202 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
3203 1.1 dyoung callout_stop(&sc->sc_scan_ch);
3204 1.1 dyoung callout_stop(&sc->sc_cal_ch);
3205 1.1 dyoung return (*sc->sc_newstate)(ic, nstate, arg);
3206 1.1 dyoung }
3207 1.1 dyoung ni = ic->ic_bss;
3208 1.1 dyoung error = ath_chan_set(sc, ni->ni_chan);
3209 1.1 dyoung if (error != 0)
3210 1.1 dyoung goto bad;
3211 1.18 dyoung rfilt = ath_calcrxfilter(sc);
3212 1.1 dyoung if (nstate == IEEE80211_S_SCAN) {
3213 1.1 dyoung callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000,
3214 1.1 dyoung ath_next_scan, sc);
3215 1.1 dyoung bssid = ifp->if_broadcastaddr;
3216 1.1 dyoung } else {
3217 1.1 dyoung callout_stop(&sc->sc_scan_ch);
3218 1.1 dyoung bssid = ni->ni_bssid;
3219 1.1 dyoung }
3220 1.1 dyoung ath_hal_setrxfilter(ah, rfilt);
3221 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s: RX filter 0x%x bssid %s\n",
3222 1.1 dyoung __func__, rfilt, ether_sprintf(bssid)));
3223 1.1 dyoung
3224 1.1 dyoung if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA)
3225 1.1 dyoung ath_hal_setassocid(ah, bssid, ni->ni_associd);
3226 1.1 dyoung else
3227 1.1 dyoung ath_hal_setassocid(ah, bssid, 0);
3228 1.29 mycroft if (ic->ic_flags & IEEE80211_F_PRIVACY) {
3229 1.1 dyoung for (i = 0; i < IEEE80211_WEP_NKID; i++)
3230 1.1 dyoung if (ath_hal_keyisvalid(ah, i))
3231 1.1 dyoung ath_hal_keysetmac(ah, i, bssid);
3232 1.1 dyoung }
3233 1.1 dyoung
3234 1.1 dyoung if (nstate == IEEE80211_S_RUN) {
3235 1.25 dyoung DPRINTF(ATH_DEBUG_ANY, ("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s "
3236 1.1 dyoung "capinfo=0x%04x chan=%d\n"
3237 1.1 dyoung , __func__
3238 1.1 dyoung , ic->ic_flags
3239 1.1 dyoung , ni->ni_intval
3240 1.1 dyoung , ether_sprintf(ni->ni_bssid)
3241 1.1 dyoung , ni->ni_capinfo
3242 1.1 dyoung , ieee80211_chan2ieee(ic, ni->ni_chan)));
3243 1.1 dyoung
3244 1.1 dyoung /*
3245 1.1 dyoung * Allocate and setup the beacon frame for AP or adhoc mode.
3246 1.1 dyoung */
3247 1.1 dyoung if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
3248 1.1 dyoung ic->ic_opmode == IEEE80211_M_IBSS) {
3249 1.1 dyoung error = ath_beacon_alloc(sc, ni);
3250 1.1 dyoung if (error != 0)
3251 1.1 dyoung goto bad;
3252 1.1 dyoung }
3253 1.1 dyoung
3254 1.1 dyoung /*
3255 1.1 dyoung * Configure the beacon and sleep timers.
3256 1.1 dyoung */
3257 1.1 dyoung ath_beacon_config(sc);
3258 1.1 dyoung
3259 1.1 dyoung /* start periodic recalibration timer */
3260 1.1 dyoung callout_reset(&sc->sc_cal_ch, hz * ath_calinterval,
3261 1.1 dyoung ath_calibrate, sc);
3262 1.1 dyoung } else {
3263 1.1 dyoung sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
3264 1.1 dyoung ath_hal_intrset(ah, sc->sc_imask);
3265 1.1 dyoung callout_stop(&sc->sc_cal_ch); /* no calibration */
3266 1.1 dyoung }
3267 1.1 dyoung /*
3268 1.1 dyoung * Reset the rate control state.
3269 1.1 dyoung */
3270 1.1 dyoung ath_rate_ctl_reset(sc, nstate);
3271 1.1 dyoung /*
3272 1.1 dyoung * Invoke the parent method to complete the work.
3273 1.1 dyoung */
3274 1.1 dyoung return (*sc->sc_newstate)(ic, nstate, arg);
3275 1.1 dyoung bad:
3276 1.1 dyoung callout_stop(&sc->sc_scan_ch);
3277 1.1 dyoung callout_stop(&sc->sc_cal_ch);
3278 1.1 dyoung /* NB: do not invoke the parent */
3279 1.1 dyoung return error;
3280 1.1 dyoung }
3281 1.1 dyoung
3282 1.1 dyoung /*
3283 1.1 dyoung * Setup driver-specific state for a newly associated node.
3284 1.1 dyoung * Note that we're called also on a re-associate, the isnew
3285 1.1 dyoung * param tells us if this is the first time or not.
3286 1.1 dyoung */
3287 1.1 dyoung static void
3288 1.1 dyoung ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
3289 1.1 dyoung {
3290 1.1 dyoung if (isnew) {
3291 1.1 dyoung struct ath_node *an = (struct ath_node *) ni;
3292 1.1 dyoung
3293 1.1 dyoung an->an_tx_ok = an->an_tx_err =
3294 1.1 dyoung an->an_tx_retr = an->an_tx_upper = 0;
3295 1.1 dyoung /* start with highest negotiated rate */
3296 1.1 dyoung /*
3297 1.1 dyoung * XXX should do otherwise but only when
3298 1.1 dyoung * the rate control algorithm is better.
3299 1.1 dyoung */
3300 1.1 dyoung KASSERT(ni->ni_rates.rs_nrates > 0,
3301 1.1 dyoung ("new association w/ no rates!"));
3302 1.1 dyoung ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
3303 1.1 dyoung }
3304 1.1 dyoung }
3305 1.1 dyoung
3306 1.1 dyoung static int
3307 1.21 dyoung ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor,
3308 1.21 dyoung HAL_BOOL xchanmode)
3309 1.1 dyoung {
3310 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
3311 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
3312 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
3313 1.1 dyoung HAL_CHANNEL *chans;
3314 1.1 dyoung int i, ix, nchan;
3315 1.1 dyoung
3316 1.1 dyoung chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL),
3317 1.1 dyoung M_TEMP, M_NOWAIT);
3318 1.1 dyoung if (chans == NULL) {
3319 1.1 dyoung if_printf(ifp, "unable to allocate channel table\n");
3320 1.1 dyoung return ENOMEM;
3321 1.1 dyoung }
3322 1.1 dyoung if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
3323 1.21 dyoung cc, HAL_MODE_ALL, outdoor, xchanmode)) {
3324 1.1 dyoung if_printf(ifp, "unable to collect channel list from hal\n");
3325 1.1 dyoung free(chans, M_TEMP);
3326 1.1 dyoung return EINVAL;
3327 1.1 dyoung }
3328 1.1 dyoung
3329 1.1 dyoung /*
3330 1.1 dyoung * Convert HAL channels to ieee80211 ones and insert
3331 1.1 dyoung * them in the table according to their channel number.
3332 1.1 dyoung */
3333 1.1 dyoung for (i = 0; i < nchan; i++) {
3334 1.1 dyoung HAL_CHANNEL *c = &chans[i];
3335 1.1 dyoung ix = ath_hal_mhz2ieee(c->channel, c->channelFlags);
3336 1.1 dyoung if (ix > IEEE80211_CHAN_MAX) {
3337 1.1 dyoung if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n",
3338 1.1 dyoung ix, c->channel, c->channelFlags);
3339 1.1 dyoung continue;
3340 1.1 dyoung }
3341 1.25 dyoung DPRINTF(ATH_DEBUG_ANY,
3342 1.25 dyoung ("%s: HAL channel %d/%d freq %d flags %#04x idx %d\n",
3343 1.21 dyoung sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags,
3344 1.21 dyoung ix));
3345 1.1 dyoung /* NB: flags are known to be compatible */
3346 1.1 dyoung if (ic->ic_channels[ix].ic_freq == 0) {
3347 1.1 dyoung ic->ic_channels[ix].ic_freq = c->channel;
3348 1.1 dyoung ic->ic_channels[ix].ic_flags = c->channelFlags;
3349 1.1 dyoung } else {
3350 1.1 dyoung /* channels overlap; e.g. 11g and 11b */
3351 1.1 dyoung ic->ic_channels[ix].ic_flags |= c->channelFlags;
3352 1.1 dyoung }
3353 1.1 dyoung }
3354 1.1 dyoung free(chans, M_TEMP);
3355 1.1 dyoung return 0;
3356 1.1 dyoung }
3357 1.1 dyoung
3358 1.1 dyoung static int
3359 1.1 dyoung ath_rate_setup(struct ath_softc *sc, u_int mode)
3360 1.1 dyoung {
3361 1.1 dyoung struct ath_hal *ah = sc->sc_ah;
3362 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
3363 1.1 dyoung const HAL_RATE_TABLE *rt;
3364 1.1 dyoung struct ieee80211_rateset *rs;
3365 1.1 dyoung int i, maxrates;
3366 1.1 dyoung
3367 1.1 dyoung switch (mode) {
3368 1.1 dyoung case IEEE80211_MODE_11A:
3369 1.1 dyoung sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A);
3370 1.1 dyoung break;
3371 1.1 dyoung case IEEE80211_MODE_11B:
3372 1.1 dyoung sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B);
3373 1.1 dyoung break;
3374 1.1 dyoung case IEEE80211_MODE_11G:
3375 1.1 dyoung sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G);
3376 1.1 dyoung break;
3377 1.1 dyoung case IEEE80211_MODE_TURBO:
3378 1.1 dyoung sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO);
3379 1.1 dyoung break;
3380 1.1 dyoung default:
3381 1.25 dyoung DPRINTF(ATH_DEBUG_ANY,
3382 1.25 dyoung ("%s: invalid mode %u\n", __func__, mode));
3383 1.1 dyoung return 0;
3384 1.1 dyoung }
3385 1.1 dyoung rt = sc->sc_rates[mode];
3386 1.1 dyoung if (rt == NULL)
3387 1.1 dyoung return 0;
3388 1.1 dyoung if (rt->rateCount > IEEE80211_RATE_MAXSIZE) {
3389 1.25 dyoung DPRINTF(ATH_DEBUG_ANY,
3390 1.25 dyoung ("%s: rate table too small (%u > %u)\n",
3391 1.1 dyoung __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE));
3392 1.1 dyoung maxrates = IEEE80211_RATE_MAXSIZE;
3393 1.1 dyoung } else
3394 1.1 dyoung maxrates = rt->rateCount;
3395 1.1 dyoung rs = &ic->ic_sup_rates[mode];
3396 1.1 dyoung for (i = 0; i < maxrates; i++)
3397 1.1 dyoung rs->rs_rates[i] = rt->info[i].dot11Rate;
3398 1.1 dyoung rs->rs_nrates = maxrates;
3399 1.1 dyoung return 1;
3400 1.1 dyoung }
3401 1.1 dyoung
3402 1.1 dyoung static void
3403 1.1 dyoung ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
3404 1.1 dyoung {
3405 1.1 dyoung const HAL_RATE_TABLE *rt;
3406 1.1 dyoung int i;
3407 1.1 dyoung
3408 1.1 dyoung memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
3409 1.1 dyoung rt = sc->sc_rates[mode];
3410 1.1 dyoung KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
3411 1.1 dyoung for (i = 0; i < rt->rateCount; i++)
3412 1.1 dyoung sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i;
3413 1.1 dyoung memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
3414 1.1 dyoung for (i = 0; i < 32; i++)
3415 1.1 dyoung sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate;
3416 1.1 dyoung sc->sc_currates = rt;
3417 1.1 dyoung sc->sc_curmode = mode;
3418 1.1 dyoung }
3419 1.1 dyoung
3420 1.1 dyoung /*
3421 1.1 dyoung * Reset the rate control state for each 802.11 state transition.
3422 1.1 dyoung */
3423 1.1 dyoung static void
3424 1.1 dyoung ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state)
3425 1.1 dyoung {
3426 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
3427 1.1 dyoung struct ieee80211_node *ni;
3428 1.1 dyoung struct ath_node *an;
3429 1.1 dyoung
3430 1.18 dyoung if (ic->ic_opmode != IEEE80211_M_STA) {
3431 1.18 dyoung /*
3432 1.18 dyoung * When operating as a station the node table holds
3433 1.18 dyoung * the AP's that were discovered during scanning.
3434 1.18 dyoung * For any other operating mode we want to reset the
3435 1.18 dyoung * tx rate state of each node.
3436 1.18 dyoung */
3437 1.1 dyoung TAILQ_FOREACH(ni, &ic->ic_node, ni_list) {
3438 1.1 dyoung ni->ni_txrate = 0; /* use lowest rate */
3439 1.1 dyoung an = (struct ath_node *) ni;
3440 1.1 dyoung an->an_tx_ok = an->an_tx_err = an->an_tx_retr =
3441 1.1 dyoung an->an_tx_upper = 0;
3442 1.1 dyoung }
3443 1.1 dyoung }
3444 1.18 dyoung /*
3445 1.18 dyoung * Reset local xmit state; this is really only meaningful
3446 1.18 dyoung * when operating in station or adhoc mode.
3447 1.18 dyoung */
3448 1.18 dyoung ni = ic->ic_bss;
3449 1.18 dyoung an = (struct ath_node *) ni;
3450 1.18 dyoung an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0;
3451 1.18 dyoung if (state == IEEE80211_S_RUN) {
3452 1.18 dyoung /* start with highest negotiated rate */
3453 1.18 dyoung KASSERT(ni->ni_rates.rs_nrates > 0,
3454 1.18 dyoung ("transition to RUN state w/ no rates!"));
3455 1.18 dyoung ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
3456 1.18 dyoung } else {
3457 1.18 dyoung /* use lowest rate */
3458 1.18 dyoung ni->ni_txrate = 0;
3459 1.18 dyoung }
3460 1.1 dyoung }
3461 1.1 dyoung
3462 1.1 dyoung /*
3463 1.1 dyoung * Examine and potentially adjust the transmit rate.
3464 1.1 dyoung */
3465 1.1 dyoung static void
3466 1.1 dyoung ath_rate_ctl(void *arg, struct ieee80211_node *ni)
3467 1.1 dyoung {
3468 1.1 dyoung struct ath_softc *sc = arg;
3469 1.1 dyoung struct ath_node *an = (struct ath_node *) ni;
3470 1.1 dyoung struct ieee80211_rateset *rs = &ni->ni_rates;
3471 1.1 dyoung int mod = 0, orate, enough;
3472 1.1 dyoung
3473 1.1 dyoung /*
3474 1.1 dyoung * Rate control
3475 1.1 dyoung * XXX: very primitive version.
3476 1.1 dyoung */
3477 1.1 dyoung sc->sc_stats.ast_rate_calls++;
3478 1.1 dyoung
3479 1.1 dyoung enough = (an->an_tx_ok + an->an_tx_err >= 10);
3480 1.1 dyoung
3481 1.1 dyoung /* no packet reached -> down */
3482 1.1 dyoung if (an->an_tx_err > 0 && an->an_tx_ok == 0)
3483 1.1 dyoung mod = -1;
3484 1.1 dyoung
3485 1.1 dyoung /* all packets needs retry in average -> down */
3486 1.1 dyoung if (enough && an->an_tx_ok < an->an_tx_retr)
3487 1.1 dyoung mod = -1;
3488 1.1 dyoung
3489 1.1 dyoung /* no error and less than 10% of packets needs retry -> up */
3490 1.1 dyoung if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10)
3491 1.1 dyoung mod = 1;
3492 1.1 dyoung
3493 1.1 dyoung orate = ni->ni_txrate;
3494 1.1 dyoung switch (mod) {
3495 1.1 dyoung case 0:
3496 1.1 dyoung if (enough && an->an_tx_upper > 0)
3497 1.1 dyoung an->an_tx_upper--;
3498 1.1 dyoung break;
3499 1.1 dyoung case -1:
3500 1.1 dyoung if (ni->ni_txrate > 0) {
3501 1.1 dyoung ni->ni_txrate--;
3502 1.1 dyoung sc->sc_stats.ast_rate_drop++;
3503 1.1 dyoung }
3504 1.1 dyoung an->an_tx_upper = 0;
3505 1.1 dyoung break;
3506 1.1 dyoung case 1:
3507 1.1 dyoung if (++an->an_tx_upper < 2)
3508 1.1 dyoung break;
3509 1.1 dyoung an->an_tx_upper = 0;
3510 1.1 dyoung if (ni->ni_txrate + 1 < rs->rs_nrates) {
3511 1.1 dyoung ni->ni_txrate++;
3512 1.1 dyoung sc->sc_stats.ast_rate_raise++;
3513 1.1 dyoung }
3514 1.1 dyoung break;
3515 1.1 dyoung }
3516 1.1 dyoung
3517 1.1 dyoung if (ni->ni_txrate != orate) {
3518 1.25 dyoung DPRINTF(ATH_DEBUG_RATE,
3519 1.25 dyoung ("%s: %dM -> %dM (%d ok, %d err, %d retr)\n",
3520 1.1 dyoung __func__,
3521 1.1 dyoung (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2,
3522 1.1 dyoung (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2,
3523 1.7 itojun an->an_tx_ok, an->an_tx_err, an->an_tx_retr));
3524 1.1 dyoung }
3525 1.1 dyoung if (ni->ni_txrate != orate || enough)
3526 1.1 dyoung an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0;
3527 1.1 dyoung }
3528 1.1 dyoung
3529 1.1 dyoung #ifdef AR_DEBUG
3530 1.2 dyoung #ifdef __FreeBSD__
3531 1.1 dyoung static int
3532 1.1 dyoung sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
3533 1.1 dyoung {
3534 1.1 dyoung char dmode[64];
3535 1.1 dyoung int error;
3536 1.1 dyoung
3537 1.1 dyoung strncpy(dmode, "", sizeof(dmode) - 1);
3538 1.1 dyoung dmode[sizeof(dmode) - 1] = '\0';
3539 1.1 dyoung error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
3540 1.1 dyoung
3541 1.1 dyoung if (error == 0 && req->newptr != NULL) {
3542 1.1 dyoung struct ifnet *ifp;
3543 1.1 dyoung struct ath_softc *sc;
3544 1.1 dyoung
3545 1.1 dyoung ifp = ifunit("ath0"); /* XXX */
3546 1.1 dyoung if (!ifp)
3547 1.1 dyoung return EINVAL;
3548 1.1 dyoung sc = ifp->if_softc;
3549 1.1 dyoung if (strcmp(dmode, "hal") == 0)
3550 1.1 dyoung ath_hal_dumpstate(sc->sc_ah);
3551 1.1 dyoung else
3552 1.1 dyoung return EINVAL;
3553 1.1 dyoung }
3554 1.1 dyoung return error;
3555 1.1 dyoung }
3556 1.1 dyoung SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
3557 1.1 dyoung 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
3558 1.2 dyoung #endif /* __FreeBSD__ */
3559 1.1 dyoung
3560 1.20 dyoung #if 0 /* #ifdef __NetBSD__ */
3561 1.20 dyoung static int
3562 1.20 dyoung sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
3563 1.20 dyoung {
3564 1.20 dyoung char dmode[64];
3565 1.20 dyoung int error;
3566 1.20 dyoung
3567 1.20 dyoung strncpy(dmode, "", sizeof(dmode) - 1);
3568 1.20 dyoung dmode[sizeof(dmode) - 1] = '\0';
3569 1.20 dyoung error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
3570 1.20 dyoung
3571 1.20 dyoung if (error == 0 && req->newptr != NULL) {
3572 1.20 dyoung struct ifnet *ifp;
3573 1.20 dyoung struct ath_softc *sc;
3574 1.20 dyoung
3575 1.20 dyoung ifp = ifunit("ath0"); /* XXX */
3576 1.20 dyoung if (!ifp)
3577 1.20 dyoung return EINVAL;
3578 1.20 dyoung sc = ifp->if_softc;
3579 1.20 dyoung if (strcmp(dmode, "hal") == 0)
3580 1.20 dyoung ath_hal_dumpstate(sc->sc_ah);
3581 1.20 dyoung else
3582 1.20 dyoung return EINVAL;
3583 1.20 dyoung }
3584 1.20 dyoung return error;
3585 1.20 dyoung }
3586 1.20 dyoung SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
3587 1.20 dyoung 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
3588 1.20 dyoung #endif /* __NetBSD__ */
3589 1.20 dyoung
3590 1.1 dyoung static void
3591 1.1 dyoung ath_printrxbuf(struct ath_buf *bf, int done)
3592 1.1 dyoung {
3593 1.1 dyoung struct ath_desc *ds;
3594 1.1 dyoung int i;
3595 1.1 dyoung
3596 1.1 dyoung for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
3597 1.1 dyoung printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n",
3598 1.1 dyoung i, ds, (struct ath_desc *)bf->bf_daddr + i,
3599 1.1 dyoung ds->ds_link, ds->ds_data,
3600 1.1 dyoung ds->ds_ctl0, ds->ds_ctl1,
3601 1.1 dyoung ds->ds_hw[0], ds->ds_hw[1],
3602 1.1 dyoung !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!');
3603 1.1 dyoung }
3604 1.1 dyoung }
3605 1.1 dyoung
3606 1.1 dyoung static void
3607 1.1 dyoung ath_printtxbuf(struct ath_buf *bf, int done)
3608 1.1 dyoung {
3609 1.1 dyoung struct ath_desc *ds;
3610 1.1 dyoung int i;
3611 1.1 dyoung
3612 1.1 dyoung for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
3613 1.1 dyoung printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n",
3614 1.1 dyoung i, ds, (struct ath_desc *)bf->bf_daddr + i,
3615 1.1 dyoung ds->ds_link, ds->ds_data,
3616 1.1 dyoung ds->ds_ctl0, ds->ds_ctl1,
3617 1.1 dyoung ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3],
3618 1.1 dyoung !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!');
3619 1.1 dyoung }
3620 1.1 dyoung }
3621 1.1 dyoung #endif /* AR_DEBUG */
3622