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ath.c revision 1.7
      1  1.1  dyoung /*-
      2  1.1  dyoung  * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting
      3  1.1  dyoung  * All rights reserved.
      4  1.1  dyoung  *
      5  1.1  dyoung  * Redistribution and use in source and binary forms, with or without
      6  1.1  dyoung  * modification, are permitted provided that the following conditions
      7  1.1  dyoung  * are met:
      8  1.1  dyoung  * 1. Redistributions of source code must retain the above copyright
      9  1.1  dyoung  *    notice, this list of conditions and the following disclaimer,
     10  1.1  dyoung  *    without modification.
     11  1.1  dyoung  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
     12  1.1  dyoung  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
     13  1.1  dyoung  *    redistribution must be conditioned upon including a substantially
     14  1.1  dyoung  *    similar Disclaimer requirement for further binary redistribution.
     15  1.1  dyoung  * 3. Neither the names of the above-listed copyright holders nor the names
     16  1.1  dyoung  *    of any contributors may be used to endorse or promote products derived
     17  1.1  dyoung  *    from this software without specific prior written permission.
     18  1.1  dyoung  *
     19  1.1  dyoung  * Alternatively, this software may be distributed under the terms of the
     20  1.1  dyoung  * GNU General Public License ("GPL") version 2 as published by the Free
     21  1.1  dyoung  * Software Foundation.
     22  1.1  dyoung  *
     23  1.1  dyoung  * NO WARRANTY
     24  1.1  dyoung  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     25  1.1  dyoung  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     26  1.1  dyoung  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
     27  1.1  dyoung  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
     28  1.1  dyoung  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
     29  1.1  dyoung  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     30  1.1  dyoung  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     31  1.1  dyoung  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
     32  1.1  dyoung  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     33  1.1  dyoung  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     34  1.1  dyoung  * THE POSSIBILITY OF SUCH DAMAGES.
     35  1.1  dyoung  */
     36  1.1  dyoung 
     37  1.1  dyoung #include <sys/cdefs.h>
     38  1.2  dyoung #ifdef __FreeBSD__
     39  1.1  dyoung __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.14 2003/09/05 22:22:49 sam Exp $");
     40  1.2  dyoung #endif
     41  1.2  dyoung #ifdef __NetBSD__
     42  1.2  dyoung __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.7 2003/10/15 22:19:31 itojun Exp $");
     43  1.2  dyoung #endif
     44  1.1  dyoung 
     45  1.1  dyoung /*
     46  1.1  dyoung  * Driver for the Atheros Wireless LAN controller.
     47  1.1  dyoung  *
     48  1.1  dyoung  * This software is derived from work of Atsushi Onoe; his contribution
     49  1.1  dyoung  * is greatly appreciated.
     50  1.1  dyoung  */
     51  1.1  dyoung 
     52  1.1  dyoung #include "opt_inet.h"
     53  1.1  dyoung 
     54  1.2  dyoung #ifdef __NetBSD__
     55  1.2  dyoung #include "bpfilter.h"
     56  1.2  dyoung #endif /* __NetBSD__ */
     57  1.2  dyoung 
     58  1.1  dyoung #include <sys/param.h>
     59  1.1  dyoung #include <sys/systm.h>
     60  1.2  dyoung #include <sys/types.h>
     61  1.1  dyoung #include <sys/sysctl.h>
     62  1.1  dyoung #include <sys/mbuf.h>
     63  1.1  dyoung #include <sys/malloc.h>
     64  1.1  dyoung #include <sys/lock.h>
     65  1.2  dyoung #ifdef __FreeBSD__
     66  1.1  dyoung #include <sys/mutex.h>
     67  1.2  dyoung #endif
     68  1.1  dyoung #include <sys/kernel.h>
     69  1.1  dyoung #include <sys/socket.h>
     70  1.1  dyoung #include <sys/sockio.h>
     71  1.1  dyoung #include <sys/errno.h>
     72  1.1  dyoung #include <sys/callout.h>
     73  1.2  dyoung #ifdef __FreeBSD__
     74  1.1  dyoung #include <sys/bus.h>
     75  1.2  dyoung #else
     76  1.2  dyoung #include <machine/bus.h>
     77  1.2  dyoung #endif
     78  1.1  dyoung #include <sys/endian.h>
     79  1.1  dyoung 
     80  1.1  dyoung #include <machine/bus.h>
     81  1.1  dyoung 
     82  1.1  dyoung #include <net/if.h>
     83  1.1  dyoung #include <net/if_dl.h>
     84  1.1  dyoung #include <net/if_media.h>
     85  1.1  dyoung #include <net/if_arp.h>
     86  1.2  dyoung #ifdef __FreeBSD__
     87  1.1  dyoung #include <net/ethernet.h>
     88  1.2  dyoung #else
     89  1.2  dyoung #include <net/if_ether.h>
     90  1.2  dyoung #endif
     91  1.1  dyoung #include <net/if_llc.h>
     92  1.1  dyoung 
     93  1.1  dyoung #include <net80211/ieee80211_var.h>
     94  1.2  dyoung #include <net80211/ieee80211_compat.h>
     95  1.1  dyoung 
     96  1.2  dyoung #if NBPFILTER > 0
     97  1.1  dyoung #include <net/bpf.h>
     98  1.2  dyoung #endif
     99  1.1  dyoung 
    100  1.1  dyoung #ifdef INET
    101  1.1  dyoung #include <netinet/in.h>
    102  1.1  dyoung #endif
    103  1.1  dyoung 
    104  1.2  dyoung #include <dev/ic/athcompat.h>
    105  1.2  dyoung 
    106  1.1  dyoung #define	AR_DEBUG
    107  1.2  dyoung #ifdef __FreeBSD__
    108  1.1  dyoung #include <dev/ath/if_athvar.h>
    109  1.1  dyoung #include <contrib/dev/ath/ah_desc.h>
    110  1.2  dyoung #else
    111  1.2  dyoung #include <dev/ic/athvar.h>
    112  1.2  dyoung #include <../contrib/sys/dev/ic/athhal_desc.h>
    113  1.2  dyoung #endif
    114  1.1  dyoung 
    115  1.1  dyoung /* unalligned little endian access */
    116  1.1  dyoung #define LE_READ_2(p)							\
    117  1.1  dyoung 	((u_int16_t)							\
    118  1.1  dyoung 	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8)))
    119  1.1  dyoung #define LE_READ_4(p)							\
    120  1.1  dyoung 	((u_int32_t)							\
    121  1.1  dyoung 	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8) |	\
    122  1.1  dyoung 	  (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
    123  1.1  dyoung 
    124  1.2  dyoung #ifdef __FreeBSD__
    125  1.1  dyoung static void	ath_init(void *);
    126  1.2  dyoung #else
    127  1.2  dyoung static int	ath_init(struct ifnet *);
    128  1.2  dyoung #endif
    129  1.2  dyoung static int	ath_init1(struct ath_softc *);
    130  1.2  dyoung static int	ath_intr1(struct ath_softc *);
    131  1.1  dyoung static void	ath_stop(struct ifnet *);
    132  1.1  dyoung static void	ath_start(struct ifnet *);
    133  1.1  dyoung static void	ath_reset(struct ath_softc *);
    134  1.1  dyoung static int	ath_media_change(struct ifnet *);
    135  1.1  dyoung static void	ath_watchdog(struct ifnet *);
    136  1.1  dyoung static int	ath_ioctl(struct ifnet *, u_long, caddr_t);
    137  1.1  dyoung static void	ath_fatal_proc(void *, int);
    138  1.1  dyoung static void	ath_rxorn_proc(void *, int);
    139  1.1  dyoung static void	ath_bmiss_proc(void *, int);
    140  1.1  dyoung static void	ath_initkeytable(struct ath_softc *);
    141  1.1  dyoung static void	ath_mode_init(struct ath_softc *);
    142  1.1  dyoung static int	ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
    143  1.1  dyoung static void	ath_beacon_proc(void *, int);
    144  1.1  dyoung static void	ath_beacon_free(struct ath_softc *);
    145  1.1  dyoung static void	ath_beacon_config(struct ath_softc *);
    146  1.1  dyoung static int	ath_desc_alloc(struct ath_softc *);
    147  1.1  dyoung static void	ath_desc_free(struct ath_softc *);
    148  1.1  dyoung static struct ieee80211_node *ath_node_alloc(struct ieee80211com *);
    149  1.1  dyoung static void	ath_node_free(struct ieee80211com *, struct ieee80211_node *);
    150  1.1  dyoung static void	ath_node_copy(struct ieee80211com *,
    151  1.1  dyoung 			struct ieee80211_node *, const struct ieee80211_node *);
    152  1.1  dyoung static int	ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
    153  1.1  dyoung static void	ath_rx_proc(void *, int);
    154  1.1  dyoung static int	ath_tx_start(struct ath_softc *, struct ieee80211_node *,
    155  1.1  dyoung 			     struct ath_buf *, struct mbuf *);
    156  1.1  dyoung static void	ath_tx_proc(void *, int);
    157  1.1  dyoung static int	ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
    158  1.1  dyoung static void	ath_draintxq(struct ath_softc *);
    159  1.1  dyoung static void	ath_stoprecv(struct ath_softc *);
    160  1.1  dyoung static int	ath_startrecv(struct ath_softc *);
    161  1.1  dyoung static void	ath_next_scan(void *);
    162  1.1  dyoung static void	ath_calibrate(void *);
    163  1.1  dyoung static int	ath_newstate(struct ieee80211com *, enum ieee80211_state, int);
    164  1.1  dyoung static void	ath_newassoc(struct ieee80211com *,
    165  1.1  dyoung 			struct ieee80211_node *, int);
    166  1.1  dyoung static int	ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor);
    167  1.1  dyoung 
    168  1.1  dyoung static int	ath_rate_setup(struct ath_softc *sc, u_int mode);
    169  1.1  dyoung static void	ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
    170  1.1  dyoung static void	ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state);
    171  1.1  dyoung static void	ath_rate_ctl(void *, struct ieee80211_node *);
    172  1.1  dyoung 
    173  1.3  ichiro #ifdef __NetBSD__
    174  1.3  ichiro int	ath_enable(struct ath_softc *);
    175  1.3  ichiro void	ath_disable(struct ath_softc *);
    176  1.3  ichiro void	ath_power(int, void *);
    177  1.3  ichiro #endif
    178  1.3  ichiro 
    179  1.2  dyoung #ifdef __FreeBSD__
    180  1.1  dyoung SYSCTL_DECL(_hw_ath);
    181  1.1  dyoung /* XXX validate sysctl values */
    182  1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime,
    183  1.1  dyoung 	    0, "channel dwell time (ms) for AP/station scanning");
    184  1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval,
    185  1.1  dyoung 	    0, "chip calibration interval (secs)");
    186  1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor,
    187  1.1  dyoung 	    0, "enable/disable outdoor operation");
    188  1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode,
    189  1.1  dyoung 	    0, "country code");
    190  1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain,
    191  1.1  dyoung 	    0, "regulatory domain");
    192  1.2  dyoung #endif /* __FreeBSD__ */
    193  1.2  dyoung 
    194  1.2  dyoung static	int ath_dwelltime = 200;		/* 5 channels/second */
    195  1.2  dyoung static	int ath_calinterval = 30;		/* calibrate every 30 secs */
    196  1.2  dyoung static	int ath_outdoor = AH_TRUE;		/* outdoor operation */
    197  1.2  dyoung static	int ath_countrycode = CTRY_DEFAULT;	/* country code */
    198  1.2  dyoung static	int ath_regdomain = 0;			/* regulatory domain */
    199  1.1  dyoung 
    200  1.1  dyoung #ifdef AR_DEBUG
    201  1.1  dyoung int	ath_debug = 0;
    202  1.2  dyoung #ifdef __FreeBSD__
    203  1.1  dyoung SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
    204  1.1  dyoung 	    0, "control debugging printfs");
    205  1.2  dyoung #endif /* __FreeBSD__ */
    206  1.1  dyoung #define	IFF_DUMPPKTS(_ifp) \
    207  1.1  dyoung 	(ath_debug || \
    208  1.1  dyoung 	    ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
    209  1.1  dyoung static	void ath_printrxbuf(struct ath_buf *bf, int);
    210  1.1  dyoung static	void ath_printtxbuf(struct ath_buf *bf, int);
    211  1.1  dyoung #define	DPRINTF(X)	if (ath_debug) printf X
    212  1.1  dyoung #define	DPRINTF2(X)	if (ath_debug > 1) printf X
    213  1.1  dyoung #else
    214  1.1  dyoung #define	IFF_DUMPPKTS(_ifp) \
    215  1.1  dyoung 	(((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
    216  1.1  dyoung #define	DPRINTF(X)
    217  1.1  dyoung #define	DPRINTF2(X)
    218  1.1  dyoung #endif
    219  1.1  dyoung 
    220  1.3  ichiro #ifdef __NetBSD__
    221  1.3  ichiro int
    222  1.3  ichiro ath_activate(struct device *self, enum devact act)
    223  1.3  ichiro {
    224  1.3  ichiro 	struct ath_softc *sc = (struct ath_softc *)self;
    225  1.3  ichiro 	int rv = 0, s;
    226  1.3  ichiro 
    227  1.3  ichiro 	s = splnet();
    228  1.3  ichiro 	switch (act) {
    229  1.3  ichiro 	case DVACT_ACTIVATE:
    230  1.3  ichiro 		rv = EOPNOTSUPP;
    231  1.3  ichiro 		break;
    232  1.3  ichiro 	case DVACT_DEACTIVATE:
    233  1.3  ichiro 		if_deactivate(&sc->sc_ic.ic_if);
    234  1.3  ichiro 		break;
    235  1.3  ichiro 	}
    236  1.3  ichiro 	splx(s);
    237  1.3  ichiro 	return rv;
    238  1.3  ichiro }
    239  1.3  ichiro 
    240  1.3  ichiro int
    241  1.3  ichiro ath_enable(struct ath_softc *sc)
    242  1.3  ichiro {
    243  1.3  ichiro 	if (ATH_IS_ENABLED(sc) == 0) {
    244  1.3  ichiro 		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
    245  1.3  ichiro 			printf("%s: device enable failed\n",
    246  1.3  ichiro 				sc->sc_dev.dv_xname);
    247  1.3  ichiro 			return (EIO);
    248  1.3  ichiro 		}
    249  1.3  ichiro 		sc->sc_flags |= ATH_ENABLED;
    250  1.3  ichiro 	}
    251  1.3  ichiro 	return (0);
    252  1.3  ichiro }
    253  1.3  ichiro 
    254  1.3  ichiro void
    255  1.3  ichiro ath_disable(struct ath_softc *sc)
    256  1.3  ichiro {
    257  1.3  ichiro 	if (!ATH_IS_ENABLED(sc))
    258  1.3  ichiro 		return;
    259  1.3  ichiro 	if (sc->sc_disable != NULL)
    260  1.3  ichiro 		(*sc->sc_disable)(sc);
    261  1.3  ichiro 	sc->sc_flags &= ~ATH_ENABLED;
    262  1.3  ichiro }
    263  1.3  ichiro #endif	/* #ifdef __NetBSD__ */
    264  1.3  ichiro 
    265  1.1  dyoung int
    266  1.1  dyoung ath_attach(u_int16_t devid, struct ath_softc *sc)
    267  1.1  dyoung {
    268  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    269  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
    270  1.1  dyoung 	struct ath_hal *ah;
    271  1.1  dyoung 	HAL_STATUS status;
    272  1.1  dyoung 	int error = 0;
    273  1.1  dyoung 
    274  1.1  dyoung 	DPRINTF(("ath_attach: devid 0x%x\n", devid));
    275  1.1  dyoung 
    276  1.2  dyoung #ifdef __FreeBSD__
    277  1.1  dyoung 	/* set these up early for if_printf use */
    278  1.1  dyoung 	ifp->if_unit = device_get_unit(sc->sc_dev);
    279  1.1  dyoung 	ifp->if_name = "ath";
    280  1.2  dyoung #else
    281  1.2  dyoung 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
    282  1.2  dyoung #endif
    283  1.1  dyoung 
    284  1.1  dyoung 	ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
    285  1.1  dyoung 	if (ah == NULL) {
    286  1.1  dyoung 		if_printf(ifp, "unable to attach hardware; HAL status %u\n",
    287  1.1  dyoung 			status);
    288  1.1  dyoung 		error = ENXIO;
    289  1.1  dyoung 		goto bad;
    290  1.1  dyoung 	}
    291  1.1  dyoung 	sc->sc_ah = ah;
    292  1.1  dyoung 	sc->sc_invalid = 0;	/* ready to go, enable interrupt handling */
    293  1.1  dyoung 
    294  1.1  dyoung 	/*
    295  1.1  dyoung 	 * Collect the channel list using the default country
    296  1.1  dyoung 	 * code and including outdoor channels.  The 802.11 layer
    297  1.1  dyoung 	 * is resposible for filtering this list based on settings
    298  1.1  dyoung 	 * like the phy mode.
    299  1.1  dyoung 	 */
    300  1.1  dyoung 	error = ath_getchannels(sc, ath_countrycode, ath_outdoor);
    301  1.1  dyoung 	if (error != 0)
    302  1.1  dyoung 		goto bad;
    303  1.1  dyoung 	/*
    304  1.1  dyoung 	 * Copy these back; they are set as a side effect
    305  1.1  dyoung 	 * of constructing the channel list.
    306  1.1  dyoung 	 */
    307  1.1  dyoung 	ath_regdomain = ath_hal_getregdomain(ah);
    308  1.1  dyoung 	ath_countrycode = ath_hal_getcountrycode(ah);
    309  1.1  dyoung 
    310  1.1  dyoung 	/*
    311  1.1  dyoung 	 * Setup rate tables for all potential media types.
    312  1.1  dyoung 	 */
    313  1.1  dyoung 	ath_rate_setup(sc, IEEE80211_MODE_11A);
    314  1.1  dyoung 	ath_rate_setup(sc, IEEE80211_MODE_11B);
    315  1.1  dyoung 	ath_rate_setup(sc, IEEE80211_MODE_11G);
    316  1.1  dyoung 	ath_rate_setup(sc, IEEE80211_MODE_TURBO);
    317  1.1  dyoung 
    318  1.1  dyoung 	error = ath_desc_alloc(sc);
    319  1.1  dyoung 	if (error != 0) {
    320  1.1  dyoung 		if_printf(ifp, "failed to allocate descriptors: %d\n", error);
    321  1.1  dyoung 		goto bad;
    322  1.1  dyoung 	}
    323  1.2  dyoung 	ATH_CALLOUT_INIT(&sc->sc_scan_ch);
    324  1.2  dyoung 	ATH_CALLOUT_INIT(&sc->sc_cal_ch);
    325  1.1  dyoung 
    326  1.2  dyoung #ifdef __FreeBSD__
    327  1.1  dyoung 	mtx_init(&sc->sc_txbuflock,
    328  1.1  dyoung 		device_get_nameunit(sc->sc_dev), "xmit buf q", MTX_DEF);
    329  1.1  dyoung 	mtx_init(&sc->sc_txqlock,
    330  1.1  dyoung 		device_get_nameunit(sc->sc_dev), "xmit q", MTX_DEF);
    331  1.2  dyoung #endif
    332  1.1  dyoung 
    333  1.2  dyoung 	ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc);
    334  1.2  dyoung 	ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc);
    335  1.2  dyoung 	ATH_TASK_INIT(&sc->sc_swbatask, ath_beacon_proc, sc);
    336  1.2  dyoung 	ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc);
    337  1.2  dyoung 	ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc);
    338  1.2  dyoung 	ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc);
    339  1.1  dyoung 
    340  1.1  dyoung 	/*
    341  1.1  dyoung 	 * For now just pre-allocate one data queue and one
    342  1.1  dyoung 	 * beacon queue.  Note that the HAL handles resetting
    343  1.1  dyoung 	 * them at the needed time.  Eventually we'll want to
    344  1.1  dyoung 	 * allocate more tx queues for splitting management
    345  1.1  dyoung 	 * frames and for QOS support.
    346  1.1  dyoung 	 */
    347  1.1  dyoung 	sc->sc_txhalq = ath_hal_setuptxqueue(ah,
    348  1.1  dyoung 		HAL_TX_QUEUE_DATA,
    349  1.1  dyoung 		AH_TRUE			/* enable interrupts */
    350  1.1  dyoung 	);
    351  1.1  dyoung 	if (sc->sc_txhalq == (u_int) -1) {
    352  1.1  dyoung 		if_printf(ifp, "unable to setup a data xmit queue!\n");
    353  1.1  dyoung 		goto bad;
    354  1.1  dyoung 	}
    355  1.1  dyoung 	sc->sc_bhalq = ath_hal_setuptxqueue(ah,
    356  1.1  dyoung 		HAL_TX_QUEUE_BEACON,
    357  1.1  dyoung 		AH_TRUE			/* enable interrupts */
    358  1.1  dyoung 	);
    359  1.1  dyoung 	if (sc->sc_bhalq == (u_int) -1) {
    360  1.1  dyoung 		if_printf(ifp, "unable to setup a beacon xmit queue!\n");
    361  1.1  dyoung 		goto bad;
    362  1.1  dyoung 	}
    363  1.1  dyoung 
    364  1.1  dyoung 	ifp->if_softc = sc;
    365  1.1  dyoung 	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
    366  1.1  dyoung 	ifp->if_start = ath_start;
    367  1.1  dyoung 	ifp->if_watchdog = ath_watchdog;
    368  1.1  dyoung 	ifp->if_ioctl = ath_ioctl;
    369  1.1  dyoung 	ifp->if_init = ath_init;
    370  1.2  dyoung #ifdef __FreeBSD__
    371  1.1  dyoung 	ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
    372  1.2  dyoung #else
    373  1.2  dyoung #if 0
    374  1.2  dyoung 	ifp->if_stop = ath_stop;		/* XXX */
    375  1.2  dyoung #endif
    376  1.2  dyoung 	IFQ_SET_READY(&ifp->if_snd);
    377  1.2  dyoung #endif
    378  1.1  dyoung 
    379  1.1  dyoung 	ic->ic_softc = sc;
    380  1.1  dyoung 	ic->ic_newassoc = ath_newassoc;
    381  1.1  dyoung 	/* XXX not right but it's not used anywhere important */
    382  1.1  dyoung 	ic->ic_phytype = IEEE80211_T_OFDM;
    383  1.1  dyoung 	ic->ic_opmode = IEEE80211_M_STA;
    384  1.1  dyoung 	ic->ic_caps = IEEE80211_C_WEP | IEEE80211_C_IBSS | IEEE80211_C_HOSTAP
    385  1.1  dyoung 		| IEEE80211_C_MONITOR;
    386  1.1  dyoung 	/* NB: 11g support is identified when we fetch the channel set */
    387  1.1  dyoung 	if (sc->sc_have11g)
    388  1.1  dyoung 		ic->ic_caps |= IEEE80211_C_SHPREAMBLE;
    389  1.1  dyoung 
    390  1.1  dyoung 	/* get mac address from hardware */
    391  1.1  dyoung 	ath_hal_getmac(ah, ic->ic_myaddr);
    392  1.1  dyoung 
    393  1.2  dyoung #ifdef __NetBSD__
    394  1.2  dyoung 	if_attach(ifp);
    395  1.2  dyoung #endif
    396  1.1  dyoung 	/* call MI attach routine. */
    397  1.1  dyoung 	ieee80211_ifattach(ifp);
    398  1.1  dyoung 	/* override default methods */
    399  1.1  dyoung 	ic->ic_node_alloc = ath_node_alloc;
    400  1.1  dyoung 	ic->ic_node_free = ath_node_free;
    401  1.1  dyoung 	ic->ic_node_copy = ath_node_copy;
    402  1.1  dyoung 	sc->sc_newstate = ic->ic_newstate;
    403  1.1  dyoung 	ic->ic_newstate = ath_newstate;
    404  1.1  dyoung 	/* complete initialization */
    405  1.1  dyoung 	ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status);
    406  1.1  dyoung 
    407  1.2  dyoung #if NBPFILTER > 0
    408  1.1  dyoung 	bpfattach2(ifp, DLT_IEEE802_11_RADIO,
    409  1.1  dyoung 		sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
    410  1.1  dyoung 		&sc->sc_drvbpf);
    411  1.2  dyoung #endif
    412  1.1  dyoung 	/*
    413  1.1  dyoung 	 * Initialize constant fields.
    414  1.1  dyoung 	 *
    415  1.1  dyoung 	 * NB: the channel is setup each time we transition to the
    416  1.1  dyoung 	 *     RUN state to avoid filling it in for each frame.
    417  1.1  dyoung 	 */
    418  1.1  dyoung 	sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th);
    419  1.1  dyoung 	sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT;
    420  1.1  dyoung 
    421  1.1  dyoung 	sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th);
    422  1.1  dyoung 	sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT;
    423  1.1  dyoung 
    424  1.1  dyoung 	if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr));
    425  1.1  dyoung 
    426  1.3  ichiro #ifdef __NetBSD__
    427  1.3  ichiro 	sc->sc_flags |= ATH_ATTACHED;
    428  1.3  ichiro 	/*
    429  1.3  ichiro 	 * Make sure the interface is shutdown during reboot.
    430  1.3  ichiro 	 */
    431  1.3  ichiro #if 0
    432  1.3  ichiro 	sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc);
    433  1.3  ichiro 	if (sc->sc_sdhook == NULL)
    434  1.3  ichiro 		printf("%s: WARNING: unable to establish shutdown hook\n",
    435  1.3  ichiro 			sc->sc_dev.dv_xname);
    436  1.3  ichiro #endif
    437  1.3  ichiro 	sc->sc_powerhook = powerhook_establish(ath_power, sc);
    438  1.3  ichiro 	if (sc->sc_powerhook == NULL)
    439  1.3  ichiro 		printf("%s: WARNING: unable to establish power hook\n",
    440  1.3  ichiro 			sc->sc_dev.dv_xname);
    441  1.3  ichiro #endif
    442  1.1  dyoung 	return 0;
    443  1.1  dyoung bad:
    444  1.1  dyoung 	if (ah)
    445  1.1  dyoung 		ath_hal_detach(ah);
    446  1.1  dyoung 	sc->sc_invalid = 1;
    447  1.1  dyoung 	return error;
    448  1.1  dyoung }
    449  1.1  dyoung 
    450  1.1  dyoung int
    451  1.1  dyoung ath_detach(struct ath_softc *sc)
    452  1.1  dyoung {
    453  1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    454  1.2  dyoung 	ath_softc_critsect_decl(s);
    455  1.1  dyoung 
    456  1.1  dyoung 	DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags));
    457  1.3  ichiro 	if ((sc->sc_flags & ATH_ATTACHED) == 0)
    458  1.3  ichiro 		return (0);
    459  1.1  dyoung 
    460  1.2  dyoung 	ath_softc_critsect_begin(sc, s);
    461  1.1  dyoung 	ath_stop(ifp);
    462  1.2  dyoung #if NBPFILTER > 0
    463  1.1  dyoung 	bpfdetach(ifp);
    464  1.2  dyoung #endif
    465  1.1  dyoung 	ath_desc_free(sc);
    466  1.1  dyoung 	ath_hal_detach(sc->sc_ah);
    467  1.1  dyoung 	ieee80211_ifdetach(ifp);
    468  1.2  dyoung #ifdef __NetBSD__
    469  1.2  dyoung 	if_detach(ifp);
    470  1.2  dyoung #endif
    471  1.2  dyoung 	ath_softc_critsect_end(sc, s);
    472  1.1  dyoung 	return 0;
    473  1.1  dyoung }
    474  1.1  dyoung 
    475  1.1  dyoung void
    476  1.3  ichiro ath_power(int why, void *arg)
    477  1.3  ichiro {
    478  1.3  ichiro 	struct ath_softc *sc = arg;
    479  1.3  ichiro 	int s;
    480  1.3  ichiro 
    481  1.3  ichiro 	DPRINTF(("ath_power(%d)\n", why));
    482  1.3  ichiro 
    483  1.3  ichiro 	s = splnet();
    484  1.3  ichiro 	switch (why) {
    485  1.3  ichiro 	case PWR_SUSPEND:
    486  1.3  ichiro 	case PWR_STANDBY:
    487  1.3  ichiro 		ath_suspend(sc, why);
    488  1.3  ichiro 		break;
    489  1.3  ichiro 	case PWR_RESUME:
    490  1.3  ichiro 		ath_resume(sc, why);
    491  1.3  ichiro 		break;
    492  1.3  ichiro 	case PWR_SOFTSUSPEND:
    493  1.3  ichiro 	case PWR_SOFTSTANDBY:
    494  1.3  ichiro 	case PWR_SOFTRESUME:
    495  1.3  ichiro 		break;
    496  1.3  ichiro 	}
    497  1.3  ichiro 	splx(s);
    498  1.3  ichiro }
    499  1.3  ichiro 
    500  1.3  ichiro void
    501  1.3  ichiro ath_suspend(struct ath_softc *sc, int why)
    502  1.1  dyoung {
    503  1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    504  1.1  dyoung 
    505  1.1  dyoung 	DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags));
    506  1.1  dyoung 
    507  1.1  dyoung 	ath_stop(ifp);
    508  1.3  ichiro 	if (sc->sc_power != NULL)
    509  1.3  ichiro 		(*sc->sc_power)(sc, why);
    510  1.1  dyoung }
    511  1.1  dyoung 
    512  1.1  dyoung void
    513  1.3  ichiro ath_resume(struct ath_softc *sc, int why)
    514  1.1  dyoung {
    515  1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    516  1.1  dyoung 
    517  1.1  dyoung 	DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags));
    518  1.1  dyoung 
    519  1.1  dyoung 	if (ifp->if_flags & IFF_UP) {
    520  1.1  dyoung 		ath_init(ifp);
    521  1.3  ichiro #if 0
    522  1.3  ichiro 		(void)ath_intr(sc);
    523  1.3  ichiro #endif
    524  1.3  ichiro 		if (sc->sc_power != NULL)
    525  1.3  ichiro 			(*sc->sc_power)(sc, why);
    526  1.1  dyoung 		if (ifp->if_flags & IFF_RUNNING)
    527  1.1  dyoung 			ath_start(ifp);
    528  1.1  dyoung 	}
    529  1.1  dyoung }
    530  1.1  dyoung 
    531  1.1  dyoung void
    532  1.1  dyoung ath_shutdown(struct ath_softc *sc)
    533  1.1  dyoung {
    534  1.2  dyoung #if 1
    535  1.2  dyoung 	return;
    536  1.2  dyoung #else
    537  1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    538  1.1  dyoung 
    539  1.1  dyoung 	DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags));
    540  1.1  dyoung 
    541  1.1  dyoung 	ath_stop(ifp);
    542  1.2  dyoung #endif
    543  1.1  dyoung }
    544  1.1  dyoung 
    545  1.2  dyoung #ifdef __NetBSD__
    546  1.2  dyoung int
    547  1.2  dyoung ath_intr(void *arg)
    548  1.2  dyoung {
    549  1.2  dyoung 	return ath_intr1((struct ath_softc *)arg);
    550  1.2  dyoung }
    551  1.2  dyoung #else
    552  1.1  dyoung void
    553  1.1  dyoung ath_intr(void *arg)
    554  1.1  dyoung {
    555  1.2  dyoung 	(void)ath_intr1((struct ath_softc *)arg);
    556  1.2  dyoung }
    557  1.2  dyoung #endif
    558  1.2  dyoung 
    559  1.2  dyoung static int
    560  1.2  dyoung ath_intr1(struct ath_softc *sc)
    561  1.2  dyoung {
    562  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    563  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
    564  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    565  1.1  dyoung 	HAL_INT status;
    566  1.1  dyoung 
    567  1.1  dyoung 	if (sc->sc_invalid) {
    568  1.1  dyoung 		/*
    569  1.1  dyoung 		 * The hardware is not ready/present, don't touch anything.
    570  1.1  dyoung 		 * Note this can happen early on if the IRQ is shared.
    571  1.1  dyoung 		 */
    572  1.1  dyoung 		DPRINTF(("ath_intr: invalid; ignored\n"));
    573  1.2  dyoung 		return 0;
    574  1.1  dyoung 	}
    575  1.1  dyoung 	if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
    576  1.1  dyoung 		DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags));
    577  1.1  dyoung 		ath_hal_getisr(ah, &status);	/* clear ISR */
    578  1.1  dyoung 		ath_hal_intrset(ah, 0);		/* disable further intr's */
    579  1.2  dyoung 		return 1; /* XXX */
    580  1.1  dyoung 	}
    581  1.1  dyoung 	ath_hal_getisr(ah, &status);		/* NB: clears ISR too */
    582  1.1  dyoung 	DPRINTF2(("ath_intr: status 0x%x\n", status));
    583  1.1  dyoung #ifdef AR_DEBUG
    584  1.1  dyoung 	if (ath_debug &&
    585  1.1  dyoung 	    (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) {
    586  1.1  dyoung 		if_printf(ifp, "ath_intr: status 0x%x\n", status);
    587  1.1  dyoung 		ath_hal_dumpstate(ah);
    588  1.1  dyoung 	}
    589  1.1  dyoung #endif /* AR_DEBUG */
    590  1.1  dyoung 	if (status & HAL_INT_FATAL) {
    591  1.1  dyoung 		sc->sc_stats.ast_hardware++;
    592  1.1  dyoung 		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
    593  1.2  dyoung 		ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask);
    594  1.1  dyoung 	} else if (status & HAL_INT_RXORN) {
    595  1.1  dyoung 		sc->sc_stats.ast_rxorn++;
    596  1.1  dyoung 		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
    597  1.2  dyoung 		ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask);
    598  1.1  dyoung 	} else {
    599  1.1  dyoung 		if (status & HAL_INT_RXEOL) {
    600  1.1  dyoung 			/*
    601  1.1  dyoung 			 * NB: the hardware should re-read the link when
    602  1.1  dyoung 			 *     RXE bit is written, but it doesn't work at
    603  1.1  dyoung 			 *     least on older hardware revs.
    604  1.1  dyoung 			 */
    605  1.1  dyoung 			sc->sc_stats.ast_rxeol++;
    606  1.1  dyoung 			sc->sc_rxlink = NULL;
    607  1.1  dyoung 		}
    608  1.1  dyoung 		if (status & HAL_INT_TXURN) {
    609  1.1  dyoung 			sc->sc_stats.ast_txurn++;
    610  1.1  dyoung 			/* bump tx trigger level */
    611  1.1  dyoung 			ath_hal_updatetxtriglevel(ah, AH_TRUE);
    612  1.1  dyoung 		}
    613  1.1  dyoung 		if (status & HAL_INT_RX)
    614  1.2  dyoung 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask);
    615  1.1  dyoung 		if (status & HAL_INT_TX)
    616  1.2  dyoung 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask);
    617  1.1  dyoung 		if (status & HAL_INT_SWBA)
    618  1.2  dyoung 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_swbatask);
    619  1.1  dyoung 		if (status & HAL_INT_BMISS) {
    620  1.1  dyoung 			sc->sc_stats.ast_bmiss++;
    621  1.2  dyoung 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask);
    622  1.1  dyoung 		}
    623  1.1  dyoung 	}
    624  1.2  dyoung 	return 1;
    625  1.1  dyoung }
    626  1.1  dyoung 
    627  1.1  dyoung static void
    628  1.1  dyoung ath_fatal_proc(void *arg, int pending)
    629  1.1  dyoung {
    630  1.1  dyoung 	struct ath_softc *sc = arg;
    631  1.1  dyoung 
    632  1.1  dyoung 	device_printf(sc->sc_dev, "hardware error; resetting\n");
    633  1.1  dyoung 	ath_reset(sc);
    634  1.1  dyoung }
    635  1.1  dyoung 
    636  1.1  dyoung static void
    637  1.1  dyoung ath_rxorn_proc(void *arg, int pending)
    638  1.1  dyoung {
    639  1.1  dyoung 	struct ath_softc *sc = arg;
    640  1.1  dyoung 
    641  1.1  dyoung 	device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n");
    642  1.1  dyoung 	ath_reset(sc);
    643  1.1  dyoung }
    644  1.1  dyoung 
    645  1.1  dyoung static void
    646  1.1  dyoung ath_bmiss_proc(void *arg, int pending)
    647  1.1  dyoung {
    648  1.1  dyoung 	struct ath_softc *sc = arg;
    649  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    650  1.1  dyoung 
    651  1.1  dyoung 	DPRINTF(("ath_bmiss_proc: pending %u\n", pending));
    652  1.1  dyoung 	KASSERT(ic->ic_opmode == IEEE80211_M_STA,
    653  1.1  dyoung 		("unexpect operating mode %u", ic->ic_opmode));
    654  1.1  dyoung 	if (ic->ic_state == IEEE80211_S_RUN)
    655  1.1  dyoung 		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
    656  1.1  dyoung }
    657  1.1  dyoung 
    658  1.1  dyoung static u_int
    659  1.1  dyoung ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan)
    660  1.1  dyoung {
    661  1.4  dyoung 	enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan);
    662  1.4  dyoung 
    663  1.4  dyoung 	switch (mode) {
    664  1.4  dyoung 	case IEEE80211_MODE_AUTO:
    665  1.4  dyoung 		return 0;
    666  1.4  dyoung 	case IEEE80211_MODE_11A:
    667  1.4  dyoung 		return CHANNEL_A;
    668  1.4  dyoung 	case IEEE80211_MODE_11B:
    669  1.4  dyoung 		return CHANNEL_B;
    670  1.4  dyoung 	case IEEE80211_MODE_11G:
    671  1.4  dyoung 		return CHANNEL_PUREG;
    672  1.4  dyoung 	case IEEE80211_MODE_TURBO:
    673  1.4  dyoung 		return CHANNEL_T;
    674  1.4  dyoung 	default:
    675  1.4  dyoung 		panic("%s: unsupported mode %d\n", __func__, mode);
    676  1.4  dyoung 		return 0;
    677  1.4  dyoung 	}
    678  1.1  dyoung }
    679  1.1  dyoung 
    680  1.2  dyoung #ifdef __NetBSD__
    681  1.2  dyoung static int
    682  1.2  dyoung ath_init(struct ifnet *ifp)
    683  1.2  dyoung {
    684  1.2  dyoung 	return ath_init1((struct ath_softc *)ifp->if_softc);
    685  1.2  dyoung }
    686  1.2  dyoung #else
    687  1.1  dyoung static void
    688  1.1  dyoung ath_init(void *arg)
    689  1.1  dyoung {
    690  1.2  dyoung 	(void)ath_init1((struct ath_softc *)arg);
    691  1.2  dyoung }
    692  1.2  dyoung #endif
    693  1.2  dyoung 
    694  1.2  dyoung static int
    695  1.2  dyoung ath_init1(struct ath_softc *sc)
    696  1.2  dyoung {
    697  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    698  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
    699  1.1  dyoung 	struct ieee80211_node *ni;
    700  1.1  dyoung 	enum ieee80211_phymode mode;
    701  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    702  1.1  dyoung 	HAL_STATUS status;
    703  1.1  dyoung 	HAL_CHANNEL hchan;
    704  1.2  dyoung 	int error = 0;
    705  1.2  dyoung 	ath_softc_critsect_decl(s);
    706  1.1  dyoung 
    707  1.1  dyoung 	DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags));
    708  1.1  dyoung 
    709  1.3  ichiro #ifdef __NetBSD__
    710  1.3  ichiro 	if ((error = ath_enable(sc)) != 0)
    711  1.3  ichiro 		return error;
    712  1.3  ichiro #endif
    713  1.3  ichiro 
    714  1.2  dyoung 	ath_softc_critsect_begin(sc, s);
    715  1.1  dyoung 	/*
    716  1.1  dyoung 	 * Stop anything previously setup.  This is safe
    717  1.1  dyoung 	 * whether this is the first time through or not.
    718  1.1  dyoung 	 */
    719  1.1  dyoung 	ath_stop(ifp);
    720  1.1  dyoung 
    721  1.1  dyoung 	/*
    722  1.1  dyoung 	 * The basic interface to setting the hardware in a good
    723  1.1  dyoung 	 * state is ``reset''.  On return the hardware is known to
    724  1.1  dyoung 	 * be powered up and with interrupts disabled.  This must
    725  1.1  dyoung 	 * be followed by initialization of the appropriate bits
    726  1.1  dyoung 	 * and then setup of the interrupt mask.
    727  1.1  dyoung 	 */
    728  1.1  dyoung 	hchan.channel = ic->ic_ibss_chan->ic_freq;
    729  1.1  dyoung 	hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan);
    730  1.1  dyoung 	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) {
    731  1.1  dyoung 		if_printf(ifp, "unable to reset hardware; hal status %u\n",
    732  1.1  dyoung 			status);
    733  1.2  dyoung 		error = -1;
    734  1.1  dyoung 		goto done;
    735  1.1  dyoung 	}
    736  1.1  dyoung 
    737  1.1  dyoung 	/*
    738  1.1  dyoung 	 * Setup the hardware after reset: the key cache
    739  1.1  dyoung 	 * is filled as needed and the receive engine is
    740  1.1  dyoung 	 * set going.  Frame transmit is handled entirely
    741  1.1  dyoung 	 * in the frame output path; there's nothing to do
    742  1.1  dyoung 	 * here except setup the interrupt mask.
    743  1.1  dyoung 	 */
    744  1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_WEPON)
    745  1.1  dyoung 		ath_initkeytable(sc);
    746  1.2  dyoung 	if ((error = ath_startrecv(sc)) != 0) {
    747  1.1  dyoung 		if_printf(ifp, "unable to start recv logic\n");
    748  1.1  dyoung 		goto done;
    749  1.1  dyoung 	}
    750  1.1  dyoung 
    751  1.1  dyoung 	/*
    752  1.1  dyoung 	 * Enable interrupts.
    753  1.1  dyoung 	 */
    754  1.1  dyoung 	sc->sc_imask = HAL_INT_RX | HAL_INT_TX
    755  1.1  dyoung 		  | HAL_INT_RXEOL | HAL_INT_RXORN
    756  1.1  dyoung 		  | HAL_INT_FATAL | HAL_INT_GLOBAL;
    757  1.1  dyoung 	ath_hal_intrset(ah, sc->sc_imask);
    758  1.1  dyoung 
    759  1.1  dyoung 	ifp->if_flags |= IFF_RUNNING;
    760  1.1  dyoung 	ic->ic_state = IEEE80211_S_INIT;
    761  1.1  dyoung 
    762  1.1  dyoung 	/*
    763  1.1  dyoung 	 * The hardware should be ready to go now so it's safe
    764  1.1  dyoung 	 * to kick the 802.11 state machine as it's likely to
    765  1.1  dyoung 	 * immediately call back to us to send mgmt frames.
    766  1.1  dyoung 	 */
    767  1.1  dyoung 	ni = ic->ic_bss;
    768  1.1  dyoung 	ni->ni_chan = ic->ic_ibss_chan;
    769  1.1  dyoung 	mode = ieee80211_chan2mode(ic, ni->ni_chan);
    770  1.1  dyoung 	if (mode != sc->sc_curmode)
    771  1.1  dyoung 		ath_setcurmode(sc, mode);
    772  1.1  dyoung 	if (ic->ic_opmode != IEEE80211_M_MONITOR)
    773  1.1  dyoung 		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
    774  1.1  dyoung 	else
    775  1.1  dyoung 		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
    776  1.1  dyoung done:
    777  1.2  dyoung 	ath_softc_critsect_end(sc, s);
    778  1.2  dyoung 	return error;
    779  1.1  dyoung }
    780  1.1  dyoung 
    781  1.1  dyoung static void
    782  1.1  dyoung ath_stop(struct ifnet *ifp)
    783  1.1  dyoung {
    784  1.1  dyoung 	struct ieee80211com *ic = (struct ieee80211com *) ifp;
    785  1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
    786  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    787  1.2  dyoung 	ath_softc_critsect_decl(s);
    788  1.1  dyoung 
    789  1.1  dyoung 	DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n",
    790  1.1  dyoung 		sc->sc_invalid, ifp->if_flags));
    791  1.1  dyoung 
    792  1.2  dyoung 	ath_softc_critsect_begin(sc, s);
    793  1.1  dyoung 	if (ifp->if_flags & IFF_RUNNING) {
    794  1.1  dyoung 		/*
    795  1.1  dyoung 		 * Shutdown the hardware and driver:
    796  1.1  dyoung 		 *    disable interrupts
    797  1.1  dyoung 		 *    turn off timers
    798  1.1  dyoung 		 *    clear transmit machinery
    799  1.1  dyoung 		 *    clear receive machinery
    800  1.1  dyoung 		 *    drain and release tx queues
    801  1.1  dyoung 		 *    reclaim beacon resources
    802  1.1  dyoung 		 *    reset 802.11 state machine
    803  1.1  dyoung 		 *    power down hardware
    804  1.1  dyoung 		 *
    805  1.1  dyoung 		 * Note that some of this work is not possible if the
    806  1.1  dyoung 		 * hardware is gone (invalid).
    807  1.1  dyoung 		 */
    808  1.1  dyoung 		ifp->if_flags &= ~IFF_RUNNING;
    809  1.1  dyoung 		ifp->if_timer = 0;
    810  1.1  dyoung 		if (!sc->sc_invalid)
    811  1.1  dyoung 			ath_hal_intrset(ah, 0);
    812  1.1  dyoung 		ath_draintxq(sc);
    813  1.1  dyoung 		if (!sc->sc_invalid)
    814  1.1  dyoung 			ath_stoprecv(sc);
    815  1.1  dyoung 		else
    816  1.1  dyoung 			sc->sc_rxlink = NULL;
    817  1.2  dyoung #ifdef __FreeBSD__
    818  1.1  dyoung 		IF_DRAIN(&ifp->if_snd);
    819  1.2  dyoung #else
    820  1.2  dyoung 		IF_PURGE(&ifp->if_snd);
    821  1.2  dyoung #endif
    822  1.1  dyoung 		ath_beacon_free(sc);
    823  1.1  dyoung 		ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
    824  1.3  ichiro 		if (!sc->sc_invalid) {
    825  1.1  dyoung 			ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0);
    826  1.3  ichiro 		}
    827  1.3  ichiro #ifdef __NetBSD__
    828  1.3  ichiro 		ath_disable(sc);
    829  1.3  ichiro #endif
    830  1.1  dyoung 	}
    831  1.2  dyoung 	ath_softc_critsect_end(sc, s);
    832  1.1  dyoung }
    833  1.1  dyoung 
    834  1.1  dyoung /*
    835  1.1  dyoung  * Reset the hardware w/o losing operational state.  This is
    836  1.1  dyoung  * basically a more efficient way of doing ath_stop, ath_init,
    837  1.1  dyoung  * followed by state transitions to the current 802.11
    838  1.1  dyoung  * operational state.  Used to recover from errors rx overrun
    839  1.1  dyoung  * and to reset the hardware when rf gain settings must be reset.
    840  1.1  dyoung  */
    841  1.1  dyoung static void
    842  1.1  dyoung ath_reset(struct ath_softc *sc)
    843  1.1  dyoung {
    844  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    845  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
    846  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    847  1.1  dyoung 	struct ieee80211_channel *c;
    848  1.1  dyoung 	HAL_STATUS status;
    849  1.1  dyoung 	HAL_CHANNEL hchan;
    850  1.1  dyoung 
    851  1.1  dyoung 	/*
    852  1.1  dyoung 	 * Convert to a HAL channel description with the flags
    853  1.1  dyoung 	 * constrained to reflect the current operating mode.
    854  1.1  dyoung 	 */
    855  1.1  dyoung 	c = ic->ic_ibss_chan;
    856  1.1  dyoung 	hchan.channel = c->ic_freq;
    857  1.1  dyoung 	hchan.channelFlags = ath_chan2flags(ic, c);
    858  1.1  dyoung 
    859  1.1  dyoung 	ath_hal_intrset(ah, 0);		/* disable interrupts */
    860  1.1  dyoung 	ath_draintxq(sc);		/* stop xmit side */
    861  1.1  dyoung 	ath_stoprecv(sc);		/* stop recv side */
    862  1.1  dyoung 	/* NB: indicate channel change so we do a full reset */
    863  1.1  dyoung 	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status))
    864  1.1  dyoung 		if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
    865  1.1  dyoung 			__func__, status);
    866  1.1  dyoung 	ath_hal_intrset(ah, sc->sc_imask);
    867  1.1  dyoung 	if (ath_startrecv(sc) != 0)	/* restart recv */
    868  1.1  dyoung 		if_printf(ifp, "%s: unable to start recv logic\n", __func__);
    869  1.1  dyoung 	ath_start(ifp);			/* restart xmit */
    870  1.1  dyoung 	if (ic->ic_state == IEEE80211_S_RUN)
    871  1.1  dyoung 		ath_beacon_config(sc);	/* restart beacons */
    872  1.1  dyoung }
    873  1.1  dyoung 
    874  1.1  dyoung static void
    875  1.1  dyoung ath_start(struct ifnet *ifp)
    876  1.1  dyoung {
    877  1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
    878  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
    879  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
    880  1.1  dyoung 	struct ieee80211_node *ni;
    881  1.1  dyoung 	struct ath_buf *bf;
    882  1.1  dyoung 	struct mbuf *m;
    883  1.1  dyoung 	struct ieee80211_frame *wh;
    884  1.2  dyoung 	ath_txbuf_critsect_decl(s);
    885  1.1  dyoung 
    886  1.1  dyoung 	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
    887  1.1  dyoung 		return;
    888  1.1  dyoung 	for (;;) {
    889  1.1  dyoung 		/*
    890  1.1  dyoung 		 * Grab a TX buffer and associated resources.
    891  1.1  dyoung 		 */
    892  1.2  dyoung 		ath_txbuf_critsect_begin(sc, s);
    893  1.1  dyoung 		bf = TAILQ_FIRST(&sc->sc_txbuf);
    894  1.1  dyoung 		if (bf != NULL)
    895  1.1  dyoung 			TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
    896  1.2  dyoung 		ath_txbuf_critsect_end(sc, s);
    897  1.1  dyoung 		if (bf == NULL) {
    898  1.1  dyoung 			DPRINTF(("ath_start: out of xmit buffers\n"));
    899  1.1  dyoung 			sc->sc_stats.ast_tx_qstop++;
    900  1.1  dyoung 			ifp->if_flags |= IFF_OACTIVE;
    901  1.1  dyoung 			break;
    902  1.1  dyoung 		}
    903  1.1  dyoung 		/*
    904  1.1  dyoung 		 * Poll the management queue for frames; they
    905  1.1  dyoung 		 * have priority over normal data frames.
    906  1.1  dyoung 		 */
    907  1.1  dyoung 		IF_DEQUEUE(&ic->ic_mgtq, m);
    908  1.1  dyoung 		if (m == NULL) {
    909  1.1  dyoung 			/*
    910  1.1  dyoung 			 * No data frames go out unless we're associated.
    911  1.1  dyoung 			 */
    912  1.1  dyoung 			if (ic->ic_state != IEEE80211_S_RUN) {
    913  1.1  dyoung 				DPRINTF(("ath_start: ignore data packet, "
    914  1.1  dyoung 					"state %u\n", ic->ic_state));
    915  1.1  dyoung 				sc->sc_stats.ast_tx_discard++;
    916  1.2  dyoung 				ath_txbuf_critsect_begin(sc, s);
    917  1.1  dyoung 				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
    918  1.2  dyoung 				ath_txbuf_critsect_end(sc, s);
    919  1.1  dyoung 				break;
    920  1.1  dyoung 			}
    921  1.1  dyoung 			IF_DEQUEUE(&ifp->if_snd, m);
    922  1.1  dyoung 			if (m == NULL) {
    923  1.2  dyoung 				ath_txbuf_critsect_begin(sc, s);
    924  1.1  dyoung 				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
    925  1.2  dyoung 				ath_txbuf_critsect_end(sc, s);
    926  1.1  dyoung 				break;
    927  1.1  dyoung 			}
    928  1.1  dyoung 			ifp->if_opackets++;
    929  1.2  dyoung 
    930  1.2  dyoung #ifdef __NetBSD__
    931  1.2  dyoung #if NBPFILTER > 0
    932  1.2  dyoung 			if (ifp->if_bpf)
    933  1.2  dyoung 				bpf_mtap(ifp->if_bpf, m);
    934  1.2  dyoung #endif
    935  1.2  dyoung #endif
    936  1.2  dyoung #ifdef __FreeBSD__
    937  1.1  dyoung 			BPF_MTAP(ifp, m);
    938  1.2  dyoung #endif
    939  1.1  dyoung 			/*
    940  1.1  dyoung 			 * Encapsulate the packet in prep for transmission.
    941  1.1  dyoung 			 */
    942  1.1  dyoung 			m = ieee80211_encap(ifp, m, &ni);
    943  1.1  dyoung 			if (m == NULL) {
    944  1.1  dyoung 				DPRINTF(("ath_start: encapsulation failure\n"));
    945  1.1  dyoung 				sc->sc_stats.ast_tx_encap++;
    946  1.1  dyoung 				goto bad;
    947  1.1  dyoung 			}
    948  1.1  dyoung 			wh = mtod(m, struct ieee80211_frame *);
    949  1.1  dyoung 			if (ic->ic_flags & IEEE80211_F_WEPON)
    950  1.1  dyoung 				wh->i_fc[1] |= IEEE80211_FC1_WEP;
    951  1.1  dyoung 		} else {
    952  1.1  dyoung 			/*
    953  1.1  dyoung 			 * Hack!  The referenced node pointer is in the
    954  1.1  dyoung 			 * rcvif field of the packet header.  This is
    955  1.1  dyoung 			 * placed there by ieee80211_mgmt_output because
    956  1.1  dyoung 			 * we need to hold the reference with the frame
    957  1.1  dyoung 			 * and there's no other way (other than packet
    958  1.1  dyoung 			 * tags which we consider too expensive to use)
    959  1.1  dyoung 			 * to pass it along.
    960  1.1  dyoung 			 */
    961  1.1  dyoung 			ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
    962  1.1  dyoung 			m->m_pkthdr.rcvif = NULL;
    963  1.1  dyoung 
    964  1.1  dyoung 			wh = mtod(m, struct ieee80211_frame *);
    965  1.1  dyoung 			if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
    966  1.1  dyoung 			    IEEE80211_FC0_SUBTYPE_PROBE_RESP) {
    967  1.1  dyoung 				/* fill time stamp */
    968  1.1  dyoung 				u_int64_t tsf;
    969  1.1  dyoung 				u_int32_t *tstamp;
    970  1.1  dyoung 
    971  1.1  dyoung 				tsf = ath_hal_gettsf64(ah);
    972  1.1  dyoung 				/* XXX: adjust 100us delay to xmit */
    973  1.1  dyoung 				tsf += 100;
    974  1.1  dyoung 				tstamp = (u_int32_t *)&wh[1];
    975  1.1  dyoung 				tstamp[0] = htole32(tsf & 0xffffffff);
    976  1.1  dyoung 				tstamp[1] = htole32(tsf >> 32);
    977  1.1  dyoung 			}
    978  1.1  dyoung 			sc->sc_stats.ast_tx_mgmt++;
    979  1.1  dyoung 		}
    980  1.2  dyoung #if NBPFILTER > 0
    981  1.1  dyoung 		if (ic->ic_rawbpf)
    982  1.1  dyoung 			bpf_mtap(ic->ic_rawbpf, m);
    983  1.2  dyoung #endif
    984  1.1  dyoung 
    985  1.2  dyoung #if NBPFILTER > 0
    986  1.1  dyoung 		if (sc->sc_drvbpf) {
    987  1.2  dyoung #ifdef __FreeBSD__
    988  1.1  dyoung 			struct mbuf *mb;
    989  1.1  dyoung 
    990  1.1  dyoung 			MGETHDR(mb, M_DONTWAIT, m->m_type);
    991  1.1  dyoung 			if (mb != NULL) {
    992  1.1  dyoung 				sc->sc_tx_th.wt_rate =
    993  1.1  dyoung 					ni->ni_rates.rs_rates[ni->ni_txrate];
    994  1.1  dyoung 
    995  1.1  dyoung 				mb->m_next = m;
    996  1.1  dyoung 				mb->m_data = (caddr_t)&sc->sc_tx_th;
    997  1.1  dyoung 				mb->m_len = sizeof(sc->sc_tx_th);
    998  1.1  dyoung 				mb->m_pkthdr.len += mb->m_len;
    999  1.1  dyoung 				bpf_mtap(sc->sc_drvbpf, mb);
   1000  1.1  dyoung 				m_free(mb);
   1001  1.1  dyoung 			}
   1002  1.2  dyoung #else
   1003  1.2  dyoung 			struct mbuf mb;
   1004  1.2  dyoung 
   1005  1.2  dyoung 			M_COPY_PKTHDR(&mb, m);
   1006  1.2  dyoung 			sc->sc_tx_th.wt_rate =
   1007  1.2  dyoung 				ni->ni_rates.rs_rates[ni->ni_txrate];
   1008  1.2  dyoung 
   1009  1.2  dyoung 			mb.m_next = m;
   1010  1.2  dyoung 			mb.m_data = (caddr_t)&sc->sc_tx_th;
   1011  1.2  dyoung 			mb.m_len = sizeof(sc->sc_tx_th);
   1012  1.2  dyoung 			mb.m_pkthdr.len += mb.m_len;
   1013  1.2  dyoung 			bpf_mtap(sc->sc_drvbpf, &mb);
   1014  1.2  dyoung #endif
   1015  1.1  dyoung 		}
   1016  1.2  dyoung #endif
   1017  1.1  dyoung 
   1018  1.1  dyoung 		/*
   1019  1.1  dyoung 		 * TODO:
   1020  1.1  dyoung 		 * The duration field of 802.11 header should be filled.
   1021  1.1  dyoung 		 * XXX This may be done in the ieee80211 layer, but the upper
   1022  1.1  dyoung 		 *     doesn't know the detail of parameters such as IFS
   1023  1.1  dyoung 		 *     for now..
   1024  1.1  dyoung 		 */
   1025  1.1  dyoung 		if (ath_tx_start(sc, ni, bf, m)) {
   1026  1.1  dyoung 	bad:
   1027  1.2  dyoung 			ath_txbuf_critsect_begin(sc, s);
   1028  1.1  dyoung 			TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1029  1.2  dyoung 			ath_txbuf_critsect_end(sc, s);
   1030  1.1  dyoung 			ifp->if_oerrors++;
   1031  1.1  dyoung 			if (ni && ni != ic->ic_bss)
   1032  1.1  dyoung 				ieee80211_free_node(ic, ni);
   1033  1.1  dyoung 			continue;
   1034  1.1  dyoung 		}
   1035  1.1  dyoung 
   1036  1.1  dyoung 		sc->sc_tx_timer = 5;
   1037  1.1  dyoung 		ifp->if_timer = 1;
   1038  1.1  dyoung 	}
   1039  1.1  dyoung }
   1040  1.1  dyoung 
   1041  1.1  dyoung static int
   1042  1.1  dyoung ath_media_change(struct ifnet *ifp)
   1043  1.1  dyoung {
   1044  1.1  dyoung 	int error;
   1045  1.1  dyoung 
   1046  1.1  dyoung 	error = ieee80211_media_change(ifp);
   1047  1.1  dyoung 	if (error == ENETRESET) {
   1048  1.1  dyoung 		if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
   1049  1.1  dyoung 		    (IFF_RUNNING|IFF_UP))
   1050  1.1  dyoung 			ath_init(ifp);		/* XXX lose error */
   1051  1.1  dyoung 		error = 0;
   1052  1.1  dyoung 	}
   1053  1.1  dyoung 	return error;
   1054  1.1  dyoung }
   1055  1.1  dyoung 
   1056  1.1  dyoung static void
   1057  1.1  dyoung ath_watchdog(struct ifnet *ifp)
   1058  1.1  dyoung {
   1059  1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
   1060  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1061  1.1  dyoung 
   1062  1.1  dyoung 	ifp->if_timer = 0;
   1063  1.1  dyoung 	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
   1064  1.1  dyoung 		return;
   1065  1.1  dyoung 	if (sc->sc_tx_timer) {
   1066  1.1  dyoung 		if (--sc->sc_tx_timer == 0) {
   1067  1.1  dyoung 			if_printf(ifp, "device timeout\n");
   1068  1.1  dyoung #ifdef AR_DEBUG
   1069  1.1  dyoung 			if (ath_debug)
   1070  1.1  dyoung 				ath_hal_dumpstate(sc->sc_ah);
   1071  1.1  dyoung #endif /* AR_DEBUG */
   1072  1.1  dyoung 			ath_init(ifp);		/* XXX ath_reset??? */
   1073  1.1  dyoung 			ifp->if_oerrors++;
   1074  1.1  dyoung 			sc->sc_stats.ast_watchdog++;
   1075  1.1  dyoung 			return;
   1076  1.1  dyoung 		}
   1077  1.1  dyoung 		ifp->if_timer = 1;
   1078  1.1  dyoung 	}
   1079  1.1  dyoung 	if (ic->ic_fixed_rate == -1) {
   1080  1.1  dyoung 		/*
   1081  1.1  dyoung 		 * Run the rate control algorithm if we're not
   1082  1.1  dyoung 		 * locked at a fixed rate.
   1083  1.1  dyoung 		 */
   1084  1.1  dyoung 		if (ic->ic_opmode == IEEE80211_M_STA)
   1085  1.1  dyoung 			ath_rate_ctl(sc, ic->ic_bss);
   1086  1.1  dyoung 		else
   1087  1.1  dyoung 			ieee80211_iterate_nodes(ic, ath_rate_ctl, sc);
   1088  1.1  dyoung 	}
   1089  1.1  dyoung 	ieee80211_watchdog(ifp);
   1090  1.1  dyoung }
   1091  1.1  dyoung 
   1092  1.1  dyoung static int
   1093  1.1  dyoung ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
   1094  1.1  dyoung {
   1095  1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
   1096  1.1  dyoung 	struct ifreq *ifr = (struct ifreq *)data;
   1097  1.1  dyoung 	int error = 0;
   1098  1.2  dyoung 	ath_softc_critsect_decl(s);
   1099  1.1  dyoung 
   1100  1.2  dyoung 	ath_softc_critsect_begin(sc, s);
   1101  1.1  dyoung 	switch (cmd) {
   1102  1.1  dyoung 	case SIOCSIFFLAGS:
   1103  1.1  dyoung 		if (ifp->if_flags & IFF_UP) {
   1104  1.1  dyoung 			if (ifp->if_flags & IFF_RUNNING) {
   1105  1.1  dyoung 				/*
   1106  1.1  dyoung 				 * To avoid rescanning another access point,
   1107  1.1  dyoung 				 * do not call ath_init() here.  Instead,
   1108  1.1  dyoung 				 * only reflect promisc mode settings.
   1109  1.1  dyoung 				 */
   1110  1.1  dyoung 				ath_mode_init(sc);
   1111  1.1  dyoung 			} else
   1112  1.1  dyoung 				ath_init(ifp);		/* XXX lose error */
   1113  1.1  dyoung 		} else
   1114  1.1  dyoung 			ath_stop(ifp);
   1115  1.1  dyoung 		break;
   1116  1.1  dyoung 	case SIOCADDMULTI:
   1117  1.1  dyoung 	case SIOCDELMULTI:
   1118  1.5   enami #ifdef __FreeBSD__
   1119  1.1  dyoung 		/*
   1120  1.1  dyoung 		 * The upper layer has already installed/removed
   1121  1.1  dyoung 		 * the multicast address(es), just recalculate the
   1122  1.1  dyoung 		 * multicast filter for the card.
   1123  1.1  dyoung 		 */
   1124  1.1  dyoung 		if (ifp->if_flags & IFF_RUNNING)
   1125  1.1  dyoung 			ath_mode_init(sc);
   1126  1.5   enami #endif
   1127  1.5   enami #ifdef __NetBSD__
   1128  1.5   enami 		error = (cmd == SIOCADDMULTI) ?
   1129  1.5   enami 		    ether_addmulti(ifr, &sc->sc_ic.ic_ec) :
   1130  1.5   enami 		    ether_delmulti(ifr, &sc->sc_ic.ic_ec);
   1131  1.5   enami 		if (error == ENETRESET) {
   1132  1.5   enami 			if (ifp->if_flags & IFF_RUNNING)
   1133  1.5   enami 				ath_mode_init(sc);
   1134  1.5   enami 		}
   1135  1.5   enami #endif
   1136  1.1  dyoung 		break;
   1137  1.1  dyoung 	case SIOCGATHSTATS:
   1138  1.1  dyoung 		copyout(&sc->sc_stats, ifr->ifr_data, sizeof (sc->sc_stats));
   1139  1.1  dyoung 		break;
   1140  1.1  dyoung 	default:
   1141  1.1  dyoung 		error = ieee80211_ioctl(ifp, cmd, data);
   1142  1.1  dyoung 		if (error == ENETRESET) {
   1143  1.1  dyoung 			if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
   1144  1.1  dyoung 			    (IFF_RUNNING|IFF_UP))
   1145  1.1  dyoung 				ath_init(ifp);		/* XXX lose error */
   1146  1.1  dyoung 			error = 0;
   1147  1.1  dyoung 		}
   1148  1.1  dyoung 		break;
   1149  1.1  dyoung 	}
   1150  1.2  dyoung 	ath_softc_critsect_end(sc, s);
   1151  1.1  dyoung 	return error;
   1152  1.1  dyoung }
   1153  1.1  dyoung 
   1154  1.1  dyoung /*
   1155  1.1  dyoung  * Fill the hardware key cache with key entries.
   1156  1.1  dyoung  */
   1157  1.1  dyoung static void
   1158  1.1  dyoung ath_initkeytable(struct ath_softc *sc)
   1159  1.1  dyoung {
   1160  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1161  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1162  1.1  dyoung 	int i;
   1163  1.1  dyoung 
   1164  1.1  dyoung 	for (i = 0; i < IEEE80211_WEP_NKID; i++) {
   1165  1.1  dyoung 		struct ieee80211_wepkey *k = &ic->ic_nw_keys[i];
   1166  1.1  dyoung 		if (k->wk_len == 0)
   1167  1.1  dyoung 			ath_hal_keyreset(ah, i);
   1168  1.1  dyoung 		else
   1169  1.1  dyoung 			/* XXX return value */
   1170  1.1  dyoung 			/* NB: this uses HAL_KEYVAL == ieee80211_wepkey */
   1171  1.1  dyoung 			ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k);
   1172  1.1  dyoung 	}
   1173  1.1  dyoung }
   1174  1.1  dyoung 
   1175  1.1  dyoung static void
   1176  1.2  dyoung ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2])
   1177  1.2  dyoung {
   1178  1.2  dyoung 	u_int32_t val;
   1179  1.2  dyoung 	u_int8_t pos;
   1180  1.2  dyoung 
   1181  1.2  dyoung 	val = LE_READ_4(dl + 0);
   1182  1.2  dyoung 	pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
   1183  1.2  dyoung 	val = LE_READ_4(dl + 3);
   1184  1.2  dyoung 	pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
   1185  1.2  dyoung 	pos &= 0x3f;
   1186  1.2  dyoung 	(*mfilt)[pos / 32] |= (1 << (pos % 32));
   1187  1.2  dyoung }
   1188  1.2  dyoung 
   1189  1.2  dyoung #ifdef __FreeBSD__
   1190  1.2  dyoung static void
   1191  1.2  dyoung ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
   1192  1.2  dyoung {
   1193  1.2  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1194  1.2  dyoung 	struct ifnet *ifp = &ic->ic_if;
   1195  1.2  dyoung 	struct ifmultiaddr *ifma;
   1196  1.2  dyoung 
   1197  1.2  dyoung 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
   1198  1.2  dyoung 		caddr_t dl;
   1199  1.2  dyoung 
   1200  1.2  dyoung 		/* calculate XOR of eight 6bit values */
   1201  1.2  dyoung 		dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
   1202  1.2  dyoung 		ath_mcastfilter_accum(dl, &mfilt);
   1203  1.2  dyoung 	}
   1204  1.2  dyoung }
   1205  1.2  dyoung #else
   1206  1.2  dyoung static void
   1207  1.2  dyoung ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
   1208  1.2  dyoung {
   1209  1.5   enami 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1210  1.2  dyoung 	struct ether_multi *enm;
   1211  1.2  dyoung 	struct ether_multistep estep;
   1212  1.2  dyoung 
   1213  1.2  dyoung 	ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm);
   1214  1.2  dyoung 	while (enm != NULL) {
   1215  1.2  dyoung 		/* XXX Punt on ranges. */
   1216  1.2  dyoung 		if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) {
   1217  1.2  dyoung 			(*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0);
   1218  1.5   enami 			ifp->if_flags |= IFF_ALLMULTI;
   1219  1.5   enami 			return;
   1220  1.2  dyoung 		}
   1221  1.2  dyoung 		ath_mcastfilter_accum(enm->enm_addrlo, mfilt);
   1222  1.2  dyoung 		ETHER_NEXT_MULTI(estep, enm);
   1223  1.2  dyoung 	}
   1224  1.5   enami 	ifp->if_flags &= ~IFF_ALLMULTI;
   1225  1.2  dyoung }
   1226  1.2  dyoung #endif
   1227  1.2  dyoung 
   1228  1.2  dyoung static void
   1229  1.1  dyoung ath_mode_init(struct ath_softc *sc)
   1230  1.1  dyoung {
   1231  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1232  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1233  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   1234  1.2  dyoung 	u_int32_t rfilt, mfilt[2];
   1235  1.1  dyoung 
   1236  1.1  dyoung 	/* configure operational mode */
   1237  1.1  dyoung 	ath_hal_setopmode(ah, ic->ic_opmode);
   1238  1.1  dyoung 
   1239  1.1  dyoung 	/* receive filter */
   1240  1.1  dyoung 	rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
   1241  1.1  dyoung 	      | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
   1242  1.1  dyoung 	if (ic->ic_opmode != IEEE80211_M_STA)
   1243  1.1  dyoung 		rfilt |= HAL_RX_FILTER_PROBEREQ;
   1244  1.1  dyoung 	if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
   1245  1.1  dyoung 	    (ifp->if_flags & IFF_PROMISC))
   1246  1.1  dyoung 		rfilt |= HAL_RX_FILTER_PROM;
   1247  1.1  dyoung 	if (ic->ic_state == IEEE80211_S_SCAN)
   1248  1.1  dyoung 		rfilt |= HAL_RX_FILTER_BEACON;
   1249  1.1  dyoung 	ath_hal_setrxfilter(ah, rfilt);
   1250  1.1  dyoung 
   1251  1.1  dyoung 	/* calculate and install multicast filter */
   1252  1.5   enami #ifdef __FreeBSD__
   1253  1.1  dyoung 	if ((ifp->if_flags & IFF_ALLMULTI) == 0) {
   1254  1.1  dyoung 		mfilt[0] = mfilt[1] = 0;
   1255  1.2  dyoung 		ath_mcastfilter_compute(sc, &mfilt);
   1256  1.1  dyoung 	} else {
   1257  1.1  dyoung 		mfilt[0] = mfilt[1] = ~0;
   1258  1.1  dyoung 	}
   1259  1.5   enami #endif
   1260  1.5   enami #ifdef __NetBSD__
   1261  1.5   enami 	mfilt[0] = mfilt[1] = 0;
   1262  1.5   enami 	ath_mcastfilter_compute(sc, &mfilt);
   1263  1.5   enami #endif
   1264  1.1  dyoung 	ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
   1265  1.1  dyoung 	DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n",
   1266  1.1  dyoung 		rfilt, mfilt[0], mfilt[1]));
   1267  1.1  dyoung }
   1268  1.1  dyoung 
   1269  1.2  dyoung #ifdef __FreeBSD__
   1270  1.1  dyoung static void
   1271  1.1  dyoung ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error)
   1272  1.1  dyoung {
   1273  1.1  dyoung 	struct ath_buf *bf = arg;
   1274  1.1  dyoung 
   1275  1.1  dyoung 	KASSERT(nseg <= ATH_MAX_SCATTER,
   1276  1.1  dyoung 		("ath_mbuf_load_cb: too many DMA segments %u", nseg));
   1277  1.1  dyoung 	bf->bf_mapsize = mapsize;
   1278  1.1  dyoung 	bf->bf_nseg = nseg;
   1279  1.1  dyoung 	bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0]));
   1280  1.1  dyoung }
   1281  1.2  dyoung #endif /* __FreeBSD__ */
   1282  1.2  dyoung 
   1283  1.2  dyoung static struct mbuf *
   1284  1.2  dyoung ath_getmbuf(int flags, int type, u_int pktlen)
   1285  1.2  dyoung {
   1286  1.2  dyoung 	struct mbuf *m;
   1287  1.2  dyoung 
   1288  1.2  dyoung 	KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen));
   1289  1.2  dyoung #ifdef __FreeBSD__
   1290  1.2  dyoung 	if (pktlen <= MHLEN)
   1291  1.2  dyoung 		MGETHDR(m, flags, type);
   1292  1.2  dyoung 	else
   1293  1.2  dyoung 		m = m_getcl(flags, type, M_PKTHDR);
   1294  1.2  dyoung #else
   1295  1.2  dyoung 	MGETHDR(m, flags, type);
   1296  1.2  dyoung 	if (m != NULL && pktlen > MHLEN)
   1297  1.2  dyoung 		MCLGET(m, flags);
   1298  1.2  dyoung #endif
   1299  1.2  dyoung 	return m;
   1300  1.2  dyoung }
   1301  1.1  dyoung 
   1302  1.1  dyoung static int
   1303  1.1  dyoung ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
   1304  1.1  dyoung {
   1305  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1306  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   1307  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1308  1.1  dyoung 	struct ieee80211_frame *wh;
   1309  1.1  dyoung 	struct ath_buf *bf;
   1310  1.1  dyoung 	struct ath_desc *ds;
   1311  1.1  dyoung 	struct mbuf *m;
   1312  1.1  dyoung 	int error, pktlen;
   1313  1.1  dyoung 	u_int8_t *frm, rate;
   1314  1.1  dyoung 	u_int16_t capinfo;
   1315  1.1  dyoung 	struct ieee80211_rateset *rs;
   1316  1.1  dyoung 	const HAL_RATE_TABLE *rt;
   1317  1.1  dyoung 
   1318  1.1  dyoung 	bf = sc->sc_bcbuf;
   1319  1.1  dyoung 	if (bf->bf_m != NULL) {
   1320  1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1321  1.1  dyoung 		m_freem(bf->bf_m);
   1322  1.1  dyoung 		bf->bf_m = NULL;
   1323  1.1  dyoung 		bf->bf_node = NULL;
   1324  1.1  dyoung 	}
   1325  1.1  dyoung 	/*
   1326  1.1  dyoung 	 * NB: the beacon data buffer must be 32-bit aligned;
   1327  1.1  dyoung 	 * we assume the mbuf routines will return us something
   1328  1.1  dyoung 	 * with this alignment (perhaps should assert).
   1329  1.1  dyoung 	 */
   1330  1.1  dyoung 	rs = &ni->ni_rates;
   1331  1.1  dyoung 	pktlen = sizeof (struct ieee80211_frame)
   1332  1.1  dyoung 	       + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 6;
   1333  1.1  dyoung 	if (rs->rs_nrates > IEEE80211_RATE_SIZE)
   1334  1.1  dyoung 		pktlen += 2;
   1335  1.2  dyoung 	m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen);
   1336  1.1  dyoung 	if (m == NULL) {
   1337  1.1  dyoung 		DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n",
   1338  1.1  dyoung 			pktlen));
   1339  1.1  dyoung 		sc->sc_stats.ast_be_nombuf++;
   1340  1.1  dyoung 		return ENOMEM;
   1341  1.1  dyoung 	}
   1342  1.1  dyoung 
   1343  1.1  dyoung 	wh = mtod(m, struct ieee80211_frame *);
   1344  1.1  dyoung 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
   1345  1.1  dyoung 	    IEEE80211_FC0_SUBTYPE_BEACON;
   1346  1.1  dyoung 	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
   1347  1.1  dyoung 	*(u_int16_t *)wh->i_dur = 0;
   1348  1.1  dyoung 	memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
   1349  1.1  dyoung 	memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
   1350  1.1  dyoung 	memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
   1351  1.1  dyoung 	*(u_int16_t *)wh->i_seq = 0;
   1352  1.1  dyoung 
   1353  1.1  dyoung 	/*
   1354  1.1  dyoung 	 * beacon frame format
   1355  1.1  dyoung 	 *	[8] time stamp
   1356  1.1  dyoung 	 *	[2] beacon interval
   1357  1.1  dyoung 	 *	[2] cabability information
   1358  1.1  dyoung 	 *	[tlv] ssid
   1359  1.1  dyoung 	 *	[tlv] supported rates
   1360  1.1  dyoung 	 *	[tlv] parameter set (IBSS)
   1361  1.1  dyoung 	 *	[tlv] extended supported rates
   1362  1.1  dyoung 	 */
   1363  1.1  dyoung 	frm = (u_int8_t *)&wh[1];
   1364  1.1  dyoung 	memset(frm, 0, 8);	/* timestamp is set by hardware */
   1365  1.1  dyoung 	frm += 8;
   1366  1.1  dyoung 	*(u_int16_t *)frm = htole16(ni->ni_intval);
   1367  1.1  dyoung 	frm += 2;
   1368  1.1  dyoung 	if (ic->ic_opmode == IEEE80211_M_IBSS)
   1369  1.1  dyoung 		capinfo = IEEE80211_CAPINFO_IBSS;
   1370  1.1  dyoung 	else
   1371  1.1  dyoung 		capinfo = IEEE80211_CAPINFO_ESS;
   1372  1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_WEPON)
   1373  1.1  dyoung 		capinfo |= IEEE80211_CAPINFO_PRIVACY;
   1374  1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
   1375  1.1  dyoung 		capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
   1376  1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_SHSLOT)
   1377  1.1  dyoung 		capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
   1378  1.1  dyoung 	*(u_int16_t *)frm = htole16(capinfo);
   1379  1.1  dyoung 	frm += 2;
   1380  1.1  dyoung 	*frm++ = IEEE80211_ELEMID_SSID;
   1381  1.1  dyoung 	*frm++ = ni->ni_esslen;
   1382  1.1  dyoung 	memcpy(frm, ni->ni_essid, ni->ni_esslen);
   1383  1.1  dyoung 	frm += ni->ni_esslen;
   1384  1.1  dyoung 	frm = ieee80211_add_rates(frm, rs);
   1385  1.1  dyoung 	if (ic->ic_opmode == IEEE80211_M_IBSS) {
   1386  1.1  dyoung 		*frm++ = IEEE80211_ELEMID_IBSSPARMS;
   1387  1.1  dyoung 		*frm++ = 2;
   1388  1.1  dyoung 		*frm++ = 0; *frm++ = 0;		/* TODO: ATIM window */
   1389  1.1  dyoung 	} else {
   1390  1.1  dyoung 		/* TODO: TIM */
   1391  1.1  dyoung 		*frm++ = IEEE80211_ELEMID_TIM;
   1392  1.1  dyoung 		*frm++ = 4;	/* length */
   1393  1.1  dyoung 		*frm++ = 0;	/* DTIM count */
   1394  1.1  dyoung 		*frm++ = 1;	/* DTIM period */
   1395  1.1  dyoung 		*frm++ = 0;	/* bitmap control */
   1396  1.1  dyoung 		*frm++ = 0;	/* Partial Virtual Bitmap (variable length) */
   1397  1.1  dyoung 	}
   1398  1.1  dyoung 	frm = ieee80211_add_xrates(frm, rs);
   1399  1.1  dyoung 	m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
   1400  1.1  dyoung 	KASSERT(m->m_pkthdr.len <= pktlen,
   1401  1.1  dyoung 		("beacon bigger than expected, len %u calculated %u",
   1402  1.1  dyoung 		m->m_pkthdr.len, pktlen));
   1403  1.1  dyoung 
   1404  1.1  dyoung 	DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len));
   1405  1.2  dyoung 	error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT);
   1406  1.1  dyoung 	if (error != 0) {
   1407  1.1  dyoung 		m_freem(m);
   1408  1.1  dyoung 		return error;
   1409  1.1  dyoung 	}
   1410  1.1  dyoung 	KASSERT(bf->bf_nseg == 1,
   1411  1.1  dyoung 		("ath_beacon_alloc: multi-segment packet; nseg %u",
   1412  1.1  dyoung 		bf->bf_nseg));
   1413  1.1  dyoung 	bf->bf_m = m;
   1414  1.1  dyoung 
   1415  1.1  dyoung 	/* setup descriptors */
   1416  1.1  dyoung 	ds = bf->bf_desc;
   1417  1.1  dyoung 
   1418  1.1  dyoung 	ds->ds_link = 0;
   1419  1.1  dyoung 	ds->ds_data = bf->bf_segs[0].ds_addr;
   1420  1.2  dyoung 
   1421  1.2  dyoung 	DPRINTF2(("%s: segaddr %p seglen %u\n", __func__,
   1422  1.2  dyoung 	    (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len));
   1423  1.2  dyoung 
   1424  1.1  dyoung 	/*
   1425  1.1  dyoung 	 * Calculate rate code.
   1426  1.1  dyoung 	 * XXX everything at min xmit rate
   1427  1.1  dyoung 	 */
   1428  1.1  dyoung 	rt = sc->sc_currates;
   1429  1.1  dyoung 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
   1430  1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
   1431  1.1  dyoung 		rate = rt->info[0].rateCode | rt->info[0].shortPreamble;
   1432  1.1  dyoung 	else
   1433  1.1  dyoung 		rate = rt->info[0].rateCode;
   1434  1.2  dyoung 	if (!ath_hal_setuptxdesc(ah, ds
   1435  1.1  dyoung 		, m->m_pkthdr.len + IEEE80211_CRC_LEN	/* packet length */
   1436  1.1  dyoung 		, sizeof(struct ieee80211_frame)	/* header length */
   1437  1.1  dyoung 		, HAL_PKT_TYPE_BEACON		/* Atheros packet type */
   1438  1.1  dyoung 		, 0x20				/* txpower XXX */
   1439  1.1  dyoung 		, rate, 1			/* series 0 rate/tries */
   1440  1.1  dyoung 		, HAL_TXKEYIX_INVALID		/* no encryption */
   1441  1.1  dyoung 		, 0				/* antenna mode */
   1442  1.1  dyoung 		, HAL_TXDESC_NOACK		/* no ack for beacons */
   1443  1.1  dyoung 		, 0				/* rts/cts rate */
   1444  1.1  dyoung 		, 0				/* rts/cts duration */
   1445  1.2  dyoung 	)) {
   1446  1.2  dyoung 		printf("%s: ath_hal_setuptxdesc failed\n", __func__);
   1447  1.2  dyoung 		return -1;
   1448  1.2  dyoung 	}
   1449  1.1  dyoung 	/* NB: beacon's BufLen must be a multiple of 4 bytes */
   1450  1.1  dyoung 	/* XXX verify mbuf data area covers this roundup */
   1451  1.2  dyoung 	if (!ath_hal_filltxdesc(ah, ds
   1452  1.1  dyoung 		, roundup(bf->bf_segs[0].ds_len, 4)	/* buffer length */
   1453  1.1  dyoung 		, AH_TRUE				/* first segment */
   1454  1.1  dyoung 		, AH_TRUE				/* last segment */
   1455  1.2  dyoung 	)) {
   1456  1.2  dyoung 		printf("%s: ath_hal_filltxdesc failed\n", __func__);
   1457  1.2  dyoung 		return -1;
   1458  1.2  dyoung 	}
   1459  1.2  dyoung 
   1460  1.2  dyoung 	/* XXX it is not appropriate to bus_dmamap_sync? -dcy */
   1461  1.1  dyoung 
   1462  1.1  dyoung 	return 0;
   1463  1.1  dyoung }
   1464  1.1  dyoung 
   1465  1.1  dyoung static void
   1466  1.1  dyoung ath_beacon_proc(void *arg, int pending)
   1467  1.1  dyoung {
   1468  1.1  dyoung 	struct ath_softc *sc = arg;
   1469  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1470  1.1  dyoung 	struct ath_buf *bf = sc->sc_bcbuf;
   1471  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1472  1.1  dyoung 
   1473  1.1  dyoung 	DPRINTF2(("%s: pending %u\n", __func__, pending));
   1474  1.1  dyoung 	if (ic->ic_opmode == IEEE80211_M_STA ||
   1475  1.1  dyoung 	    bf == NULL || bf->bf_m == NULL) {
   1476  1.1  dyoung 		DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n",
   1477  1.1  dyoung 			__func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL));
   1478  1.1  dyoung 		return;
   1479  1.1  dyoung 	}
   1480  1.1  dyoung 	/* TODO: update beacon to reflect PS poll state */
   1481  1.1  dyoung 	if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
   1482  1.1  dyoung 		DPRINTF(("%s: beacon queue %u did not stop?",
   1483  1.1  dyoung 			__func__, sc->sc_bhalq));
   1484  1.1  dyoung 		return;			/* busy, XXX is this right? */
   1485  1.1  dyoung 	}
   1486  1.2  dyoung 	ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
   1487  1.1  dyoung 
   1488  1.1  dyoung 	ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
   1489  1.1  dyoung 	ath_hal_txstart(ah, sc->sc_bhalq);
   1490  1.2  dyoung 	DPRINTF2(("%s: BCDP%u = %p (%p)\n", __func__,
   1491  1.1  dyoung 		sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
   1492  1.1  dyoung }
   1493  1.1  dyoung 
   1494  1.1  dyoung static void
   1495  1.1  dyoung ath_beacon_free(struct ath_softc *sc)
   1496  1.1  dyoung {
   1497  1.1  dyoung 	struct ath_buf *bf = sc->sc_bcbuf;
   1498  1.1  dyoung 
   1499  1.1  dyoung 	if (bf->bf_m != NULL) {
   1500  1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1501  1.1  dyoung 		m_freem(bf->bf_m);
   1502  1.1  dyoung 		bf->bf_m = NULL;
   1503  1.1  dyoung 		bf->bf_node = NULL;
   1504  1.1  dyoung 	}
   1505  1.1  dyoung }
   1506  1.1  dyoung 
   1507  1.1  dyoung /*
   1508  1.1  dyoung  * Configure the beacon and sleep timers.
   1509  1.1  dyoung  *
   1510  1.1  dyoung  * When operating as an AP this resets the TSF and sets
   1511  1.1  dyoung  * up the hardware to notify us when we need to issue beacons.
   1512  1.1  dyoung  *
   1513  1.1  dyoung  * When operating in station mode this sets up the beacon
   1514  1.1  dyoung  * timers according to the timestamp of the last received
   1515  1.1  dyoung  * beacon and the current TSF, configures PCF and DTIM
   1516  1.1  dyoung  * handling, programs the sleep registers so the hardware
   1517  1.1  dyoung  * will wakeup in time to receive beacons, and configures
   1518  1.1  dyoung  * the beacon miss handling so we'll receive a BMISS
   1519  1.1  dyoung  * interrupt when we stop seeing beacons from the AP
   1520  1.1  dyoung  * we've associated with.
   1521  1.1  dyoung  */
   1522  1.1  dyoung static void
   1523  1.1  dyoung ath_beacon_config(struct ath_softc *sc)
   1524  1.1  dyoung {
   1525  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1526  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1527  1.1  dyoung 	struct ieee80211_node *ni = ic->ic_bss;
   1528  1.1  dyoung 	u_int32_t nexttbtt;
   1529  1.1  dyoung 
   1530  1.1  dyoung 	nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) |
   1531  1.1  dyoung 	    (LE_READ_4(ni->ni_tstamp) >> 10);
   1532  1.1  dyoung 	DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt));
   1533  1.1  dyoung 	nexttbtt += ni->ni_intval;
   1534  1.1  dyoung 	if (ic->ic_opmode == IEEE80211_M_STA) {
   1535  1.1  dyoung 		HAL_BEACON_STATE bs;
   1536  1.1  dyoung 		u_int32_t bmisstime;
   1537  1.1  dyoung 
   1538  1.1  dyoung 		/* NB: no PCF support right now */
   1539  1.1  dyoung 		memset(&bs, 0, sizeof(bs));
   1540  1.1  dyoung 		bs.bs_intval = ni->ni_intval;
   1541  1.1  dyoung 		bs.bs_nexttbtt = nexttbtt;
   1542  1.1  dyoung 		bs.bs_dtimperiod = bs.bs_intval;
   1543  1.1  dyoung 		bs.bs_nextdtim = nexttbtt;
   1544  1.1  dyoung 		/*
   1545  1.1  dyoung 		 * Calculate the number of consecutive beacons to miss
   1546  1.1  dyoung 		 * before taking a BMISS interrupt.  The configuration
   1547  1.1  dyoung 		 * is specified in ms, so we need to convert that to
   1548  1.1  dyoung 		 * TU's and then calculate based on the beacon interval.
   1549  1.1  dyoung 		 * Note that we clamp the result to at most 10 beacons.
   1550  1.1  dyoung 		 */
   1551  1.1  dyoung 		bmisstime = (ic->ic_bmisstimeout * 1000) / 1024;
   1552  1.1  dyoung 		bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval);
   1553  1.1  dyoung 		if (bs.bs_bmissthreshold > 10)
   1554  1.1  dyoung 			bs.bs_bmissthreshold = 10;
   1555  1.1  dyoung 		else if (bs.bs_bmissthreshold <= 0)
   1556  1.1  dyoung 			bs.bs_bmissthreshold = 1;
   1557  1.1  dyoung 
   1558  1.1  dyoung 		/*
   1559  1.1  dyoung 		 * Calculate sleep duration.  The configuration is
   1560  1.1  dyoung 		 * given in ms.  We insure a multiple of the beacon
   1561  1.1  dyoung 		 * period is used.  Also, if the sleep duration is
   1562  1.1  dyoung 		 * greater than the DTIM period then it makes senses
   1563  1.1  dyoung 		 * to make it a multiple of that.
   1564  1.1  dyoung 		 *
   1565  1.1  dyoung 		 * XXX fixed at 100ms
   1566  1.1  dyoung 		 */
   1567  1.1  dyoung 		bs.bs_sleepduration =
   1568  1.1  dyoung 			roundup((100 * 1000) / 1024, bs.bs_intval);
   1569  1.1  dyoung 		if (bs.bs_sleepduration > bs.bs_dtimperiod)
   1570  1.1  dyoung 			bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
   1571  1.1  dyoung 
   1572  1.1  dyoung 		DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n"
   1573  1.1  dyoung 			, __func__
   1574  1.1  dyoung 			, bs.bs_intval
   1575  1.1  dyoung 			, bs.bs_nexttbtt
   1576  1.1  dyoung 			, bs.bs_dtimperiod
   1577  1.1  dyoung 			, bs.bs_nextdtim
   1578  1.1  dyoung 			, bs.bs_bmissthreshold
   1579  1.1  dyoung 			, bs.bs_sleepduration
   1580  1.1  dyoung 		));
   1581  1.1  dyoung 		ath_hal_intrset(ah, 0);
   1582  1.1  dyoung 		/*
   1583  1.1  dyoung 		 * Reset our tsf so the hardware will update the
   1584  1.1  dyoung 		 * tsf register to reflect timestamps found in
   1585  1.1  dyoung 		 * received beacons.
   1586  1.1  dyoung 		 */
   1587  1.1  dyoung 		ath_hal_resettsf(ah);
   1588  1.1  dyoung 		ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0);
   1589  1.1  dyoung 		sc->sc_imask |= HAL_INT_BMISS;
   1590  1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   1591  1.1  dyoung 	} else {
   1592  1.1  dyoung 		DPRINTF(("%s: intval %u nexttbtt %u\n",
   1593  1.1  dyoung 			__func__, ni->ni_intval, nexttbtt));
   1594  1.1  dyoung 		ath_hal_intrset(ah, 0);
   1595  1.1  dyoung 		ath_hal_beaconinit(ah, ic->ic_opmode,
   1596  1.1  dyoung 			nexttbtt, ni->ni_intval);
   1597  1.1  dyoung 		if (ic->ic_opmode != IEEE80211_M_MONITOR)
   1598  1.1  dyoung 			sc->sc_imask |= HAL_INT_SWBA;	/* beacon prepare */
   1599  1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   1600  1.1  dyoung 	}
   1601  1.1  dyoung }
   1602  1.1  dyoung 
   1603  1.2  dyoung #ifdef __FreeBSD__
   1604  1.1  dyoung static void
   1605  1.1  dyoung ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
   1606  1.1  dyoung {
   1607  1.1  dyoung 	bus_addr_t *paddr = (bus_addr_t*) arg;
   1608  1.1  dyoung 	*paddr = segs->ds_addr;
   1609  1.1  dyoung }
   1610  1.2  dyoung #endif
   1611  1.1  dyoung 
   1612  1.2  dyoung #ifdef __FreeBSD__
   1613  1.1  dyoung static int
   1614  1.1  dyoung ath_desc_alloc(struct ath_softc *sc)
   1615  1.1  dyoung {
   1616  1.1  dyoung 	int i, bsize, error;
   1617  1.1  dyoung 	struct ath_desc *ds;
   1618  1.1  dyoung 	struct ath_buf *bf;
   1619  1.1  dyoung 
   1620  1.1  dyoung 	/* allocate descriptors */
   1621  1.1  dyoung 	sc->sc_desc_len = sizeof(struct ath_desc) *
   1622  1.1  dyoung 				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
   1623  1.1  dyoung 	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap);
   1624  1.1  dyoung 	if (error != 0)
   1625  1.1  dyoung 		return error;
   1626  1.1  dyoung 
   1627  1.1  dyoung 	error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc,
   1628  1.1  dyoung 				 BUS_DMA_NOWAIT, &sc->sc_ddmamap);
   1629  1.2  dyoung 
   1630  1.1  dyoung 	if (error != 0)
   1631  1.1  dyoung 		goto fail0;
   1632  1.1  dyoung 
   1633  1.1  dyoung 	error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap,
   1634  1.1  dyoung 				sc->sc_desc, sc->sc_desc_len,
   1635  1.1  dyoung 				ath_load_cb, &sc->sc_desc_paddr,
   1636  1.1  dyoung 				BUS_DMA_NOWAIT);
   1637  1.1  dyoung 	if (error != 0)
   1638  1.1  dyoung 		goto fail1;
   1639  1.1  dyoung 
   1640  1.1  dyoung 	ds = sc->sc_desc;
   1641  1.1  dyoung 	DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n",
   1642  1.1  dyoung 	    ds, sc->sc_desc_len,
   1643  1.1  dyoung 	    (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
   1644  1.1  dyoung 
   1645  1.1  dyoung 	/* allocate buffers */
   1646  1.1  dyoung 	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
   1647  1.1  dyoung 	bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
   1648  1.2  dyoung 	if (bf == NULL) {
   1649  1.2  dyoung 		printf("%s: unable to allocate Tx/Rx buffers\n",
   1650  1.2  dyoung 		    sc->sc_dev.dv_xname);
   1651  1.2  dyoung 		error = -1;
   1652  1.1  dyoung 		goto fail2;
   1653  1.2  dyoung 	}
   1654  1.1  dyoung 	sc->sc_bufptr = bf;
   1655  1.1  dyoung 
   1656  1.1  dyoung 	TAILQ_INIT(&sc->sc_rxbuf);
   1657  1.1  dyoung 	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
   1658  1.1  dyoung 		bf->bf_desc = ds;
   1659  1.1  dyoung 		bf->bf_daddr = sc->sc_desc_paddr +
   1660  1.1  dyoung 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1661  1.1  dyoung 		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
   1662  1.1  dyoung 					  &bf->bf_dmamap);
   1663  1.1  dyoung 		if (error != 0)
   1664  1.1  dyoung 			break;
   1665  1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   1666  1.1  dyoung 	}
   1667  1.1  dyoung 
   1668  1.1  dyoung 	TAILQ_INIT(&sc->sc_txbuf);
   1669  1.1  dyoung 	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
   1670  1.1  dyoung 		bf->bf_desc = ds;
   1671  1.1  dyoung 		bf->bf_daddr = sc->sc_desc_paddr +
   1672  1.1  dyoung 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1673  1.1  dyoung 		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
   1674  1.1  dyoung 					  &bf->bf_dmamap);
   1675  1.1  dyoung 		if (error != 0)
   1676  1.1  dyoung 			break;
   1677  1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1678  1.1  dyoung 	}
   1679  1.1  dyoung 	TAILQ_INIT(&sc->sc_txq);
   1680  1.1  dyoung 
   1681  1.1  dyoung 	/* beacon buffer */
   1682  1.1  dyoung 	bf->bf_desc = ds;
   1683  1.1  dyoung 	bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1684  1.1  dyoung 	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap);
   1685  1.1  dyoung 	if (error != 0)
   1686  1.1  dyoung 		return error;
   1687  1.1  dyoung 	sc->sc_bcbuf = bf;
   1688  1.1  dyoung 	return 0;
   1689  1.1  dyoung 
   1690  1.1  dyoung fail2:
   1691  1.1  dyoung 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   1692  1.1  dyoung fail1:
   1693  1.1  dyoung 	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
   1694  1.1  dyoung fail0:
   1695  1.1  dyoung 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   1696  1.1  dyoung 	sc->sc_ddmamap = NULL;
   1697  1.1  dyoung 	return error;
   1698  1.1  dyoung }
   1699  1.2  dyoung #else
   1700  1.2  dyoung static int
   1701  1.2  dyoung ath_desc_alloc(struct ath_softc *sc)
   1702  1.2  dyoung {
   1703  1.2  dyoung 	int i, bsize, error = -1;
   1704  1.2  dyoung 	struct ath_desc *ds;
   1705  1.2  dyoung 	struct ath_buf *bf;
   1706  1.2  dyoung 
   1707  1.2  dyoung 	/* allocate descriptors */
   1708  1.2  dyoung 	sc->sc_desc_len = sizeof(struct ath_desc) *
   1709  1.2  dyoung 				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
   1710  1.2  dyoung 	if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE,
   1711  1.2  dyoung 	    0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) {
   1712  1.2  dyoung 		printf("%s: unable to allocate control data, error = %d\n",
   1713  1.2  dyoung 		    sc->sc_dev.dv_xname, error);
   1714  1.2  dyoung 		goto fail0;
   1715  1.2  dyoung 	}
   1716  1.2  dyoung 
   1717  1.2  dyoung 	if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg,
   1718  1.2  dyoung 	    sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) {
   1719  1.2  dyoung 		printf("%s: unable to map control data, error = %d\n",
   1720  1.2  dyoung 		    sc->sc_dev.dv_xname, error);
   1721  1.2  dyoung 		goto fail1;
   1722  1.2  dyoung 	}
   1723  1.2  dyoung 
   1724  1.2  dyoung 	if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1,
   1725  1.2  dyoung 	    sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) {
   1726  1.2  dyoung 		printf("%s: unable to create control data DMA map, "
   1727  1.2  dyoung 		    "error = %d\n", sc->sc_dev.dv_xname, error);
   1728  1.2  dyoung 		goto fail2;
   1729  1.2  dyoung 	}
   1730  1.2  dyoung 
   1731  1.2  dyoung 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc,
   1732  1.2  dyoung 	    sc->sc_desc_len, NULL, 0)) != 0) {
   1733  1.2  dyoung 		printf("%s: unable to load control data DMA map, error = %d\n",
   1734  1.2  dyoung 		    sc->sc_dev.dv_xname, error);
   1735  1.2  dyoung 		goto fail3;
   1736  1.2  dyoung 	}
   1737  1.2  dyoung 
   1738  1.2  dyoung 	ds = sc->sc_desc;
   1739  1.2  dyoung 	sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr;
   1740  1.2  dyoung 
   1741  1.2  dyoung 	DPRINTF(("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n",
   1742  1.2  dyoung 	    ds, (u_long)sc->sc_desc_len,
   1743  1.2  dyoung 	    (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
   1744  1.2  dyoung 
   1745  1.2  dyoung 	/* allocate buffers */
   1746  1.2  dyoung 	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
   1747  1.2  dyoung 	bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
   1748  1.2  dyoung 	if (bf == NULL) {
   1749  1.2  dyoung 		printf("%s: unable to allocate Tx/Rx buffers\n",
   1750  1.2  dyoung 		    sc->sc_dev.dv_xname);
   1751  1.2  dyoung 		error = ENOMEM;
   1752  1.2  dyoung 		goto fail3;
   1753  1.2  dyoung 	}
   1754  1.2  dyoung 	sc->sc_bufptr = bf;
   1755  1.2  dyoung 
   1756  1.2  dyoung 	TAILQ_INIT(&sc->sc_rxbuf);
   1757  1.2  dyoung 	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
   1758  1.2  dyoung 		bf->bf_desc = ds;
   1759  1.2  dyoung 		bf->bf_daddr = sc->sc_desc_paddr +
   1760  1.2  dyoung 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1761  1.2  dyoung 		if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
   1762  1.2  dyoung 		    MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
   1763  1.2  dyoung 			printf("%s: unable to create Rx dmamap, error = %d\n",
   1764  1.2  dyoung 			    sc->sc_dev.dv_xname, error);
   1765  1.2  dyoung 			goto fail4;
   1766  1.2  dyoung 		}
   1767  1.2  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   1768  1.2  dyoung 	}
   1769  1.2  dyoung 
   1770  1.2  dyoung 	TAILQ_INIT(&sc->sc_txbuf);
   1771  1.2  dyoung 	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
   1772  1.2  dyoung 		bf->bf_desc = ds;
   1773  1.2  dyoung 		bf->bf_daddr = sc->sc_desc_paddr +
   1774  1.2  dyoung 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1775  1.2  dyoung 		if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
   1776  1.2  dyoung 		    ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
   1777  1.2  dyoung 			printf("%s: unable to create Tx dmamap, error = %d\n",
   1778  1.2  dyoung 			    sc->sc_dev.dv_xname, error);
   1779  1.2  dyoung 			goto fail5;
   1780  1.2  dyoung 		}
   1781  1.2  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1782  1.2  dyoung 	}
   1783  1.2  dyoung 	TAILQ_INIT(&sc->sc_txq);
   1784  1.2  dyoung 
   1785  1.2  dyoung 	/* beacon buffer */
   1786  1.2  dyoung 	bf->bf_desc = ds;
   1787  1.2  dyoung 	bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1788  1.2  dyoung 	if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
   1789  1.2  dyoung 	    &bf->bf_dmamap)) != 0) {
   1790  1.2  dyoung 		printf("%s: unable to create beacon dmamap, error = %d\n",
   1791  1.2  dyoung 		    sc->sc_dev.dv_xname, error);
   1792  1.2  dyoung 		goto fail5;
   1793  1.2  dyoung 	}
   1794  1.2  dyoung 	sc->sc_bcbuf = bf;
   1795  1.2  dyoung 	return 0;
   1796  1.2  dyoung 
   1797  1.2  dyoung fail5:
   1798  1.2  dyoung 	for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) {
   1799  1.2  dyoung 		if (sc->sc_bufptr[i].bf_dmamap == NULL)
   1800  1.2  dyoung 			continue;
   1801  1.2  dyoung 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
   1802  1.2  dyoung 	}
   1803  1.2  dyoung fail4:
   1804  1.2  dyoung 	for (i = 0; i < ATH_RXBUF; i++) {
   1805  1.2  dyoung 		if (sc->sc_bufptr[i].bf_dmamap == NULL)
   1806  1.2  dyoung 			continue;
   1807  1.2  dyoung 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
   1808  1.2  dyoung 	}
   1809  1.2  dyoung fail3:
   1810  1.2  dyoung 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   1811  1.2  dyoung fail2:
   1812  1.2  dyoung 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   1813  1.2  dyoung 	sc->sc_ddmamap = NULL;
   1814  1.2  dyoung fail1:
   1815  1.2  dyoung 	bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len);
   1816  1.2  dyoung fail0:
   1817  1.2  dyoung 	bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
   1818  1.2  dyoung 	return error;
   1819  1.2  dyoung }
   1820  1.2  dyoung #endif
   1821  1.1  dyoung 
   1822  1.1  dyoung static void
   1823  1.1  dyoung ath_desc_free(struct ath_softc *sc)
   1824  1.1  dyoung {
   1825  1.1  dyoung 	struct ath_buf *bf;
   1826  1.1  dyoung 
   1827  1.2  dyoung #ifdef __FreeBSD__
   1828  1.1  dyoung 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   1829  1.1  dyoung 	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
   1830  1.1  dyoung 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   1831  1.2  dyoung #else
   1832  1.2  dyoung 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   1833  1.2  dyoung 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   1834  1.2  dyoung 	bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
   1835  1.2  dyoung #endif
   1836  1.1  dyoung 
   1837  1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
   1838  1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1839  1.1  dyoung 		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   1840  1.1  dyoung 		m_freem(bf->bf_m);
   1841  1.1  dyoung 	}
   1842  1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list)
   1843  1.1  dyoung 		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   1844  1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   1845  1.1  dyoung 		if (bf->bf_m) {
   1846  1.1  dyoung 			bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1847  1.1  dyoung 			bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   1848  1.1  dyoung 			m_freem(bf->bf_m);
   1849  1.1  dyoung 			bf->bf_m = NULL;
   1850  1.1  dyoung 		}
   1851  1.1  dyoung 	}
   1852  1.1  dyoung 	if (sc->sc_bcbuf != NULL) {
   1853  1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
   1854  1.1  dyoung 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
   1855  1.1  dyoung 		sc->sc_bcbuf = NULL;
   1856  1.1  dyoung 	}
   1857  1.1  dyoung 
   1858  1.1  dyoung 	TAILQ_INIT(&sc->sc_rxbuf);
   1859  1.1  dyoung 	TAILQ_INIT(&sc->sc_txbuf);
   1860  1.1  dyoung 	TAILQ_INIT(&sc->sc_txq);
   1861  1.1  dyoung 	free(sc->sc_bufptr, M_DEVBUF);
   1862  1.1  dyoung 	sc->sc_bufptr = NULL;
   1863  1.1  dyoung }
   1864  1.1  dyoung 
   1865  1.1  dyoung static struct ieee80211_node *
   1866  1.1  dyoung ath_node_alloc(struct ieee80211com *ic)
   1867  1.1  dyoung {
   1868  1.1  dyoung 	struct ath_node *an =
   1869  1.1  dyoung 		malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO);
   1870  1.1  dyoung 	return an ? &an->an_node : NULL;
   1871  1.1  dyoung }
   1872  1.1  dyoung 
   1873  1.1  dyoung static void
   1874  1.1  dyoung ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
   1875  1.1  dyoung {
   1876  1.2  dyoung 	struct ath_softc *sc = ic->ic_if.if_softc;
   1877  1.1  dyoung 	struct ath_buf *bf;
   1878  1.1  dyoung 
   1879  1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
   1880  1.1  dyoung 		if (bf->bf_node == ni)
   1881  1.1  dyoung 			bf->bf_node = NULL;
   1882  1.1  dyoung 	}
   1883  1.1  dyoung 	free(ni, M_DEVBUF);
   1884  1.1  dyoung }
   1885  1.1  dyoung 
   1886  1.1  dyoung static void
   1887  1.1  dyoung ath_node_copy(struct ieee80211com *ic,
   1888  1.1  dyoung 	struct ieee80211_node *dst, const struct ieee80211_node *src)
   1889  1.1  dyoung {
   1890  1.1  dyoung 	*(struct ath_node *)dst = *(const struct ath_node *)src;
   1891  1.1  dyoung }
   1892  1.1  dyoung 
   1893  1.1  dyoung static int
   1894  1.1  dyoung ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
   1895  1.1  dyoung {
   1896  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1897  1.1  dyoung 	int error;
   1898  1.1  dyoung 	struct mbuf *m;
   1899  1.1  dyoung 	struct ath_desc *ds;
   1900  1.1  dyoung 
   1901  1.1  dyoung 	m = bf->bf_m;
   1902  1.1  dyoung 	if (m == NULL) {
   1903  1.1  dyoung 		/*
   1904  1.1  dyoung 		 * NB: by assigning a page to the rx dma buffer we
   1905  1.1  dyoung 		 * implicitly satisfy the Atheros requirement that
   1906  1.1  dyoung 		 * this buffer be cache-line-aligned and sized to be
   1907  1.1  dyoung 		 * multiple of the cache line size.  Not doing this
   1908  1.1  dyoung 		 * causes weird stuff to happen (for the 5210 at least).
   1909  1.1  dyoung 		 */
   1910  1.2  dyoung 		m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES);
   1911  1.1  dyoung 		if (m == NULL) {
   1912  1.1  dyoung 			DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n"));
   1913  1.1  dyoung 			sc->sc_stats.ast_rx_nombuf++;
   1914  1.1  dyoung 			return ENOMEM;
   1915  1.1  dyoung 		}
   1916  1.1  dyoung 		bf->bf_m = m;
   1917  1.1  dyoung 		m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
   1918  1.1  dyoung 
   1919  1.2  dyoung 		error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m,
   1920  1.2  dyoung 		                                 BUS_DMA_NOWAIT);
   1921  1.1  dyoung 		if (error != 0) {
   1922  1.2  dyoung 			DPRINTF(("ath_rxbuf_init: ath_buf_dmamap_load_mbuf failed;"
   1923  1.1  dyoung 				" error %d\n", error));
   1924  1.1  dyoung 			sc->sc_stats.ast_rx_busdma++;
   1925  1.1  dyoung 			return error;
   1926  1.1  dyoung 		}
   1927  1.1  dyoung 		KASSERT(bf->bf_nseg == 1,
   1928  1.1  dyoung 			("ath_rxbuf_init: multi-segment packet; nseg %u",
   1929  1.1  dyoung 			bf->bf_nseg));
   1930  1.1  dyoung 	}
   1931  1.2  dyoung 	ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD);
   1932  1.1  dyoung 
   1933  1.1  dyoung 	/* setup descriptors */
   1934  1.1  dyoung 	ds = bf->bf_desc;
   1935  1.1  dyoung 	ds->ds_link = 0;
   1936  1.1  dyoung 	ds->ds_data = bf->bf_segs[0].ds_addr;
   1937  1.1  dyoung 	ath_hal_setuprxdesc(ah, ds
   1938  1.1  dyoung 		, m->m_len		/* buffer size */
   1939  1.1  dyoung 		, 0
   1940  1.1  dyoung 	);
   1941  1.1  dyoung 
   1942  1.1  dyoung 	if (sc->sc_rxlink != NULL)
   1943  1.1  dyoung 		*sc->sc_rxlink = bf->bf_daddr;
   1944  1.1  dyoung 	sc->sc_rxlink = &ds->ds_link;
   1945  1.1  dyoung 	return 0;
   1946  1.1  dyoung }
   1947  1.1  dyoung 
   1948  1.1  dyoung static void
   1949  1.1  dyoung ath_rx_proc(void *arg, int npending)
   1950  1.1  dyoung {
   1951  1.1  dyoung 	struct ath_softc *sc = arg;
   1952  1.1  dyoung 	struct ath_buf *bf;
   1953  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   1954  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   1955  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   1956  1.1  dyoung 	struct ath_desc *ds;
   1957  1.1  dyoung 	struct mbuf *m;
   1958  1.1  dyoung 	struct ieee80211_frame *wh, whbuf;
   1959  1.1  dyoung 	struct ieee80211_node *ni;
   1960  1.1  dyoung 	int len;
   1961  1.1  dyoung 	u_int phyerr;
   1962  1.1  dyoung 	HAL_STATUS status;
   1963  1.1  dyoung 
   1964  1.1  dyoung 	DPRINTF2(("ath_rx_proc: pending %u\n", npending));
   1965  1.1  dyoung 	do {
   1966  1.1  dyoung 		bf = TAILQ_FIRST(&sc->sc_rxbuf);
   1967  1.1  dyoung 		if (bf == NULL) {		/* NB: shouldn't happen */
   1968  1.1  dyoung 			if_printf(ifp, "ath_rx_proc: no buffer!\n");
   1969  1.1  dyoung 			break;
   1970  1.1  dyoung 		}
   1971  1.1  dyoung 		m = bf->bf_m;
   1972  1.1  dyoung 		if (m == NULL) {		/* NB: shouldn't happen */
   1973  1.1  dyoung 			if_printf(ifp, "ath_rx_proc: no mbuf!\n");
   1974  1.1  dyoung 			continue;
   1975  1.1  dyoung 		}
   1976  1.1  dyoung 		ds = bf->bf_desc;
   1977  1.1  dyoung 		status = ath_hal_rxprocdesc(ah, ds);
   1978  1.1  dyoung #ifdef AR_DEBUG
   1979  1.1  dyoung 		if (ath_debug > 1)
   1980  1.1  dyoung 			ath_printrxbuf(bf, status == HAL_OK);
   1981  1.1  dyoung #endif
   1982  1.1  dyoung 		if (status == HAL_EINPROGRESS)
   1983  1.1  dyoung 			break;
   1984  1.1  dyoung 		TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
   1985  1.1  dyoung 		if (ds->ds_rxstat.rs_status != 0) {
   1986  1.1  dyoung 			ifp->if_ierrors++;
   1987  1.1  dyoung 			if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC)
   1988  1.1  dyoung 				sc->sc_stats.ast_rx_crcerr++;
   1989  1.1  dyoung 			if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO)
   1990  1.1  dyoung 				sc->sc_stats.ast_rx_fifoerr++;
   1991  1.1  dyoung 			if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT)
   1992  1.1  dyoung 				sc->sc_stats.ast_rx_badcrypt++;
   1993  1.1  dyoung 			if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) {
   1994  1.1  dyoung 				sc->sc_stats.ast_rx_phyerr++;
   1995  1.1  dyoung 				phyerr = ds->ds_rxstat.rs_phyerr & 0x1f;
   1996  1.1  dyoung 				sc->sc_stats.ast_rx_phy[phyerr]++;
   1997  1.1  dyoung 			}
   1998  1.1  dyoung 			goto rx_next;
   1999  1.1  dyoung 		}
   2000  1.1  dyoung 
   2001  1.1  dyoung 		len = ds->ds_rxstat.rs_datalen;
   2002  1.1  dyoung 		if (len < sizeof(struct ieee80211_frame)) {
   2003  1.1  dyoung 			DPRINTF(("ath_rx_proc: short packet %d\n", len));
   2004  1.1  dyoung 			sc->sc_stats.ast_rx_tooshort++;
   2005  1.1  dyoung 			goto rx_next;
   2006  1.1  dyoung 		}
   2007  1.1  dyoung 
   2008  1.2  dyoung 		ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD);
   2009  1.1  dyoung 
   2010  1.1  dyoung 		wh = mtod(m, struct ieee80211_frame *);
   2011  1.1  dyoung 		if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
   2012  1.1  dyoung 		    IEEE80211_FC0_TYPE_CTL &&
   2013  1.1  dyoung 		    ic->ic_opmode != IEEE80211_M_MONITOR) {
   2014  1.1  dyoung 			/*
   2015  1.1  dyoung 			 * Discard control frame when not in monitor mode.
   2016  1.1  dyoung 			 */
   2017  1.1  dyoung 			DPRINTF(("ath_rx_proc: control frame\n"));
   2018  1.1  dyoung 			sc->sc_stats.ast_rx_ctl++;
   2019  1.1  dyoung 			goto rx_next;
   2020  1.1  dyoung 		}
   2021  1.1  dyoung 
   2022  1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2023  1.1  dyoung 		bf->bf_m = NULL;
   2024  1.1  dyoung 		m->m_pkthdr.rcvif = ifp;
   2025  1.1  dyoung 		m->m_pkthdr.len = m->m_len = len;
   2026  1.1  dyoung 
   2027  1.2  dyoung #if NBPFILTER > 0
   2028  1.1  dyoung 		if (sc->sc_drvbpf) {
   2029  1.2  dyoung #ifdef __FreeBSD__
   2030  1.1  dyoung 			struct mbuf *mb;
   2031  1.1  dyoung 
   2032  1.1  dyoung 			/* XXX pre-allocate space when setting up recv's */
   2033  1.1  dyoung 			MGETHDR(mb, M_DONTWAIT, m->m_type);
   2034  1.1  dyoung 			if (mb != NULL) {
   2035  1.1  dyoung 				sc->sc_rx_th.wr_rate =
   2036  1.1  dyoung 					sc->sc_hwmap[ds->ds_rxstat.rs_rate];
   2037  1.1  dyoung 				sc->sc_rx_th.wr_antsignal =
   2038  1.1  dyoung 					ds->ds_rxstat.rs_rssi;
   2039  1.1  dyoung 				sc->sc_rx_th.wr_antenna =
   2040  1.1  dyoung 					ds->ds_rxstat.rs_antenna;
   2041  1.1  dyoung 				/* XXX TSF */
   2042  1.1  dyoung 
   2043  1.1  dyoung 				(void) m_dup_pkthdr(mb, m, M_DONTWAIT);
   2044  1.1  dyoung 				mb->m_next = m;
   2045  1.1  dyoung 				mb->m_data = (caddr_t)&sc->sc_rx_th;
   2046  1.1  dyoung 				mb->m_len = sizeof(sc->sc_rx_th);
   2047  1.1  dyoung 				mb->m_pkthdr.len += mb->m_len;
   2048  1.1  dyoung 				bpf_mtap(sc->sc_drvbpf, mb);
   2049  1.1  dyoung 				m_free(mb);
   2050  1.1  dyoung 			}
   2051  1.2  dyoung #else
   2052  1.2  dyoung 			/* XXX pre-allocate space when setting up recv's */
   2053  1.2  dyoung 			struct mbuf mb;
   2054  1.2  dyoung 
   2055  1.2  dyoung 			sc->sc_rx_th.wr_rate =
   2056  1.2  dyoung 				sc->sc_hwmap[ds->ds_rxstat.rs_rate];
   2057  1.2  dyoung 			sc->sc_rx_th.wr_antsignal =
   2058  1.2  dyoung 				ds->ds_rxstat.rs_rssi;
   2059  1.2  dyoung 			sc->sc_rx_th.wr_antenna =
   2060  1.2  dyoung 				ds->ds_rxstat.rs_antenna;
   2061  1.2  dyoung 			/* XXX TSF */
   2062  1.2  dyoung 
   2063  1.2  dyoung 			M_COPY_PKTHDR(&mb, m);
   2064  1.2  dyoung 			mb.m_next = m;
   2065  1.2  dyoung 			mb.m_data = (caddr_t)&sc->sc_rx_th;
   2066  1.2  dyoung 			mb.m_len = sizeof(sc->sc_rx_th);
   2067  1.2  dyoung 			mb.m_pkthdr.len += mb.m_len;
   2068  1.2  dyoung 			bpf_mtap(sc->sc_drvbpf, &mb);
   2069  1.2  dyoung #endif
   2070  1.1  dyoung 		}
   2071  1.2  dyoung #endif
   2072  1.1  dyoung 
   2073  1.1  dyoung 		m_adj(m, -IEEE80211_CRC_LEN);
   2074  1.1  dyoung 		if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
   2075  1.1  dyoung 			/*
   2076  1.1  dyoung 			 * WEP is decrypted by hardware. Clear WEP bit
   2077  1.1  dyoung 			 * and trim WEP header for ieee80211_input().
   2078  1.1  dyoung 			 */
   2079  1.1  dyoung 			wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
   2080  1.1  dyoung 			memcpy(&whbuf, wh, sizeof(whbuf));
   2081  1.1  dyoung 			m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN);
   2082  1.1  dyoung 			memcpy(mtod(m, caddr_t), &whbuf, sizeof(whbuf));
   2083  1.1  dyoung 			/*
   2084  1.1  dyoung 			 * Also trim WEP ICV from the tail.
   2085  1.1  dyoung 			 */
   2086  1.1  dyoung 			m_adj(m, -IEEE80211_WEP_CRCLEN);
   2087  1.6  dyoung 			/*
   2088  1.6  dyoung 			 * The header has probably moved.
   2089  1.6  dyoung 			 */
   2090  1.6  dyoung 			wh = mtod(m, struct ieee80211_frame *);
   2091  1.1  dyoung 		}
   2092  1.1  dyoung 
   2093  1.1  dyoung 		/*
   2094  1.1  dyoung 		 * Locate the node for sender, track state, and
   2095  1.1  dyoung 		 * then pass this node (referenced) up to the 802.11
   2096  1.1  dyoung 		 * layer for its use.  We are required to pass
   2097  1.1  dyoung 		 * something so we fall back to ic_bss when this frame
   2098  1.1  dyoung 		 * is from an unknown sender.
   2099  1.1  dyoung 		 */
   2100  1.1  dyoung 		if (ic->ic_opmode != IEEE80211_M_STA) {
   2101  1.1  dyoung 			ni = ieee80211_find_node(ic, wh->i_addr2);
   2102  1.1  dyoung 			if (ni == NULL)
   2103  1.1  dyoung 				ni = ieee80211_ref_node(ic->ic_bss);
   2104  1.1  dyoung 		} else
   2105  1.1  dyoung 			ni = ieee80211_ref_node(ic->ic_bss);
   2106  1.1  dyoung 		ATH_NODE(ni)->an_rx_antenna = ds->ds_rxstat.rs_antenna;
   2107  1.1  dyoung 		/*
   2108  1.1  dyoung 		 * Send frame up for processing.
   2109  1.1  dyoung 		 */
   2110  1.1  dyoung 		ieee80211_input(ifp, m, ni,
   2111  1.1  dyoung 			ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp);
   2112  1.1  dyoung 		/*
   2113  1.1  dyoung 		 * The frame may have caused the node to be marked for
   2114  1.1  dyoung 		 * reclamation (e.g. in response to a DEAUTH message)
   2115  1.1  dyoung 		 * so use free_node here instead of unref_node.
   2116  1.1  dyoung 		 */
   2117  1.1  dyoung 		if (ni == ic->ic_bss)
   2118  1.1  dyoung 			ieee80211_unref_node(&ni);
   2119  1.1  dyoung 		else
   2120  1.1  dyoung 			ieee80211_free_node(ic, ni);
   2121  1.1  dyoung   rx_next:
   2122  1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   2123  1.1  dyoung 	} while (ath_rxbuf_init(sc, bf) == 0);
   2124  1.1  dyoung 
   2125  1.1  dyoung 	ath_hal_rxmonitor(ah);			/* rx signal state monitoring */
   2126  1.1  dyoung 	ath_hal_rxena(ah);			/* in case of RXEOL */
   2127  1.1  dyoung }
   2128  1.1  dyoung 
   2129  1.1  dyoung /*
   2130  1.1  dyoung  * XXX Size of an ACK control frame in bytes.
   2131  1.1  dyoung  */
   2132  1.1  dyoung #define	IEEE80211_ACK_SIZE	(2+2+IEEE80211_ADDR_LEN+4)
   2133  1.1  dyoung 
   2134  1.1  dyoung static int
   2135  1.1  dyoung ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
   2136  1.1  dyoung     struct mbuf *m0)
   2137  1.1  dyoung {
   2138  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2139  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2140  1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   2141  1.1  dyoung 	int i, error, iswep, hdrlen, pktlen;
   2142  1.1  dyoung 	u_int8_t rix, cix, txrate, ctsrate;
   2143  1.1  dyoung 	struct ath_desc *ds;
   2144  1.1  dyoung 	struct mbuf *m;
   2145  1.1  dyoung 	struct ieee80211_frame *wh;
   2146  1.1  dyoung 	u_int32_t iv;
   2147  1.1  dyoung 	u_int8_t *ivp;
   2148  1.1  dyoung 	u_int8_t hdrbuf[sizeof(struct ieee80211_frame) +
   2149  1.1  dyoung 	    IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN];
   2150  1.1  dyoung 	u_int subtype, flags, ctsduration, antenna;
   2151  1.1  dyoung 	HAL_PKT_TYPE atype;
   2152  1.1  dyoung 	const HAL_RATE_TABLE *rt;
   2153  1.1  dyoung 	HAL_BOOL shortPreamble;
   2154  1.1  dyoung 	struct ath_node *an;
   2155  1.2  dyoung 	ath_txq_critsect_decl(s);
   2156  1.1  dyoung 
   2157  1.1  dyoung 	wh = mtod(m0, struct ieee80211_frame *);
   2158  1.1  dyoung 	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
   2159  1.1  dyoung 	hdrlen = sizeof(struct ieee80211_frame);
   2160  1.1  dyoung 	pktlen = m0->m_pkthdr.len;
   2161  1.1  dyoung 
   2162  1.1  dyoung 	if (iswep) {
   2163  1.1  dyoung 		memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen);
   2164  1.1  dyoung 		m_adj(m0, hdrlen);
   2165  1.1  dyoung 		M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT);
   2166  1.1  dyoung 		if (m0 == NULL) {
   2167  1.1  dyoung 			sc->sc_stats.ast_tx_nombuf++;
   2168  1.1  dyoung 			return ENOMEM;
   2169  1.1  dyoung 		}
   2170  1.1  dyoung 		ivp = hdrbuf + hdrlen;
   2171  1.1  dyoung 		/*
   2172  1.1  dyoung 		 * XXX
   2173  1.1  dyoung 		 * IV must not duplicate during the lifetime of the key.
   2174  1.1  dyoung 		 * But no mechanism to renew keys is defined in IEEE 802.11
   2175  1.1  dyoung 		 * WEP.  And IV may be duplicated between other stations
   2176  1.1  dyoung 		 * because of the session key itself is shared.
   2177  1.1  dyoung 		 * So we use pseudo random IV for now, though it is not the
   2178  1.1  dyoung 		 * right way.
   2179  1.1  dyoung 		 */
   2180  1.1  dyoung 		iv = arc4random();
   2181  1.1  dyoung 		for (i = 0; i < IEEE80211_WEP_IVLEN; i++) {
   2182  1.1  dyoung 			ivp[i] = iv;
   2183  1.1  dyoung 			iv >>= 8;
   2184  1.1  dyoung 		}
   2185  1.1  dyoung 		ivp[i] = sc->sc_ic.ic_wep_txkey << 6;	/* Key ID and pad */
   2186  1.1  dyoung 		memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf));
   2187  1.1  dyoung 		/*
   2188  1.1  dyoung 		 * The ICV length must be included into hdrlen and pktlen.
   2189  1.1  dyoung 		 */
   2190  1.1  dyoung 		hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN;
   2191  1.1  dyoung 		pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN;
   2192  1.1  dyoung 	}
   2193  1.1  dyoung 	pktlen += IEEE80211_CRC_LEN;
   2194  1.1  dyoung 
   2195  1.1  dyoung 	/*
   2196  1.1  dyoung 	 * Load the DMA map so any coalescing is done.  This
   2197  1.1  dyoung 	 * also calculates the number of descriptors we need.
   2198  1.1  dyoung 	 */
   2199  1.2  dyoung 	error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT);
   2200  1.1  dyoung 	if (error != 0) {
   2201  1.1  dyoung 		sc->sc_stats.ast_tx_busdma++;
   2202  1.1  dyoung 		m_freem(m0);
   2203  1.1  dyoung 		return error;
   2204  1.1  dyoung 	}
   2205  1.1  dyoung 	/*
   2206  1.1  dyoung 	 * Discard null packets and check for packets that
   2207  1.1  dyoung 	 * require too many TX descriptors.  We try to convert
   2208  1.1  dyoung 	 * the latter to a cluster.
   2209  1.1  dyoung 	 */
   2210  1.1  dyoung 	if (bf->bf_nseg > ATH_TXDESC) {		/* too many desc's, linearize */
   2211  1.1  dyoung 		sc->sc_stats.ast_tx_linear++;
   2212  1.1  dyoung 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   2213  1.1  dyoung 		if (m == NULL) {
   2214  1.1  dyoung 			sc->sc_stats.ast_tx_nombuf++;
   2215  1.1  dyoung 			m_freem(m0);
   2216  1.1  dyoung 			return ENOMEM;
   2217  1.1  dyoung 		}
   2218  1.2  dyoung #ifdef __FreeBSD__
   2219  1.1  dyoung 		M_MOVE_PKTHDR(m, m0);
   2220  1.2  dyoung #else
   2221  1.2  dyoung 		M_COPY_PKTHDR(m, m0);
   2222  1.2  dyoung #endif
   2223  1.1  dyoung 		MCLGET(m, M_DONTWAIT);
   2224  1.1  dyoung 		if ((m->m_flags & M_EXT) == 0) {
   2225  1.1  dyoung 			sc->sc_stats.ast_tx_nomcl++;
   2226  1.1  dyoung 			m_freem(m0);
   2227  1.1  dyoung 			m_free(m);
   2228  1.1  dyoung 			return ENOMEM;
   2229  1.1  dyoung 		}
   2230  1.1  dyoung 		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
   2231  1.1  dyoung 		m_freem(m0);
   2232  1.1  dyoung 		m->m_len = m->m_pkthdr.len;
   2233  1.1  dyoung 		m0 = m;
   2234  1.2  dyoung 		error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0,
   2235  1.2  dyoung 					         BUS_DMA_NOWAIT);
   2236  1.1  dyoung 		if (error != 0) {
   2237  1.1  dyoung 			sc->sc_stats.ast_tx_busdma++;
   2238  1.1  dyoung 			m_freem(m0);
   2239  1.1  dyoung 			return error;
   2240  1.1  dyoung 		}
   2241  1.1  dyoung 		KASSERT(bf->bf_nseg == 1,
   2242  1.1  dyoung 			("ath_tx_start: packet not one segment; nseg %u",
   2243  1.1  dyoung 			bf->bf_nseg));
   2244  1.1  dyoung 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
   2245  1.1  dyoung 		sc->sc_stats.ast_tx_nodata++;
   2246  1.1  dyoung 		m_freem(m0);
   2247  1.1  dyoung 		return EIO;
   2248  1.1  dyoung 	}
   2249  1.1  dyoung 	DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen));
   2250  1.2  dyoung 	ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
   2251  1.1  dyoung 	bf->bf_m = m0;
   2252  1.1  dyoung 	bf->bf_node = ni;			/* NB: held reference */
   2253  1.1  dyoung 
   2254  1.1  dyoung 	/* setup descriptors */
   2255  1.1  dyoung 	ds = bf->bf_desc;
   2256  1.1  dyoung 	rt = sc->sc_currates;
   2257  1.1  dyoung 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
   2258  1.1  dyoung 
   2259  1.1  dyoung 	/*
   2260  1.1  dyoung 	 * Calculate Atheros packet type from IEEE80211 packet header
   2261  1.1  dyoung 	 * and setup for rate calculations.
   2262  1.1  dyoung 	 */
   2263  1.1  dyoung 	atype = HAL_PKT_TYPE_NORMAL;			/* default */
   2264  1.1  dyoung 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
   2265  1.1  dyoung 	case IEEE80211_FC0_TYPE_MGT:
   2266  1.1  dyoung 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
   2267  1.1  dyoung 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
   2268  1.1  dyoung 			atype = HAL_PKT_TYPE_BEACON;
   2269  1.1  dyoung 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
   2270  1.1  dyoung 			atype = HAL_PKT_TYPE_PROBE_RESP;
   2271  1.1  dyoung 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
   2272  1.1  dyoung 			atype = HAL_PKT_TYPE_ATIM;
   2273  1.1  dyoung 		rix = 0;			/* XXX lowest rate */
   2274  1.1  dyoung 		break;
   2275  1.1  dyoung 	case IEEE80211_FC0_TYPE_CTL:
   2276  1.1  dyoung 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
   2277  1.1  dyoung 		if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL)
   2278  1.1  dyoung 			atype = HAL_PKT_TYPE_PSPOLL;
   2279  1.1  dyoung 		rix = 0;			/* XXX lowest rate */
   2280  1.1  dyoung 		break;
   2281  1.1  dyoung 	default:
   2282  1.1  dyoung 		rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] &
   2283  1.1  dyoung 				IEEE80211_RATE_VAL];
   2284  1.1  dyoung 		if (rix == 0xff) {
   2285  1.1  dyoung 			if_printf(ifp, "bogus xmit rate 0x%x\n",
   2286  1.1  dyoung 				ni->ni_rates.rs_rates[ni->ni_txrate]);
   2287  1.1  dyoung 			sc->sc_stats.ast_tx_badrate++;
   2288  1.1  dyoung 			m_freem(m0);
   2289  1.1  dyoung 			return EIO;
   2290  1.1  dyoung 		}
   2291  1.1  dyoung 		break;
   2292  1.1  dyoung 	}
   2293  1.1  dyoung 	/*
   2294  1.1  dyoung 	 * NB: the 802.11 layer marks whether or not we should
   2295  1.1  dyoung 	 * use short preamble based on the current mode and
   2296  1.1  dyoung 	 * negotiated parameters.
   2297  1.1  dyoung 	 */
   2298  1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) {
   2299  1.1  dyoung 		txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble;
   2300  1.1  dyoung 		shortPreamble = AH_TRUE;
   2301  1.1  dyoung 		sc->sc_stats.ast_tx_shortpre++;
   2302  1.1  dyoung 	} else {
   2303  1.1  dyoung 		txrate = rt->info[rix].rateCode;
   2304  1.1  dyoung 		shortPreamble = AH_FALSE;
   2305  1.1  dyoung 	}
   2306  1.1  dyoung 
   2307  1.1  dyoung 	/*
   2308  1.1  dyoung 	 * Calculate miscellaneous flags.
   2309  1.1  dyoung 	 */
   2310  1.1  dyoung 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for wep errors */
   2311  1.1  dyoung 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
   2312  1.1  dyoung 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
   2313  1.1  dyoung 		sc->sc_stats.ast_tx_noack++;
   2314  1.1  dyoung 	} else if (pktlen > ic->ic_rtsthreshold) {
   2315  1.1  dyoung 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
   2316  1.1  dyoung 		sc->sc_stats.ast_tx_rts++;
   2317  1.1  dyoung 	}
   2318  1.1  dyoung 
   2319  1.1  dyoung 	/*
   2320  1.1  dyoung 	 * Calculate RTS/CTS rate and duration if needed.
   2321  1.1  dyoung 	 */
   2322  1.1  dyoung 	ctsduration = 0;
   2323  1.1  dyoung 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
   2324  1.1  dyoung 		/*
   2325  1.1  dyoung 		 * CTS transmit rate is derived from the transmit rate
   2326  1.1  dyoung 		 * by looking in the h/w rate table.  We must also factor
   2327  1.1  dyoung 		 * in whether or not a short preamble is to be used.
   2328  1.1  dyoung 		 */
   2329  1.1  dyoung 		cix = rt->info[rix].controlRate;
   2330  1.1  dyoung 		ctsrate = rt->info[cix].rateCode;
   2331  1.1  dyoung 		if (shortPreamble)
   2332  1.1  dyoung 			ctsrate |= rt->info[cix].shortPreamble;
   2333  1.1  dyoung 		/*
   2334  1.1  dyoung 		 * Compute the transmit duration based on the size
   2335  1.1  dyoung 		 * of an ACK frame.  We call into the HAL to do the
   2336  1.1  dyoung 		 * computation since it depends on the characteristics
   2337  1.1  dyoung 		 * of the actual PHY being used.
   2338  1.1  dyoung 		 */
   2339  1.1  dyoung 		if (flags & HAL_TXDESC_RTSENA) {	/* SIFS + CTS */
   2340  1.1  dyoung 			ctsduration += ath_hal_computetxtime(ah,
   2341  1.1  dyoung 				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
   2342  1.1  dyoung 		}
   2343  1.1  dyoung 		/* SIFS + data */
   2344  1.1  dyoung 		ctsduration += ath_hal_computetxtime(ah,
   2345  1.1  dyoung 			rt, pktlen, rix, shortPreamble);
   2346  1.1  dyoung 		if ((flags & HAL_TXDESC_NOACK) == 0) {	/* SIFS + ACK */
   2347  1.1  dyoung 			ctsduration += ath_hal_computetxtime(ah,
   2348  1.1  dyoung 				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
   2349  1.1  dyoung 		}
   2350  1.1  dyoung 	} else
   2351  1.1  dyoung 		ctsrate = 0;
   2352  1.1  dyoung 
   2353  1.1  dyoung 	/*
   2354  1.1  dyoung 	 * For now use the antenna on which the last good
   2355  1.1  dyoung 	 * frame was received on.  We assume this field is
   2356  1.1  dyoung 	 * initialized to 0 which gives us ``auto'' or the
   2357  1.1  dyoung 	 * ``default'' antenna.
   2358  1.1  dyoung 	 */
   2359  1.1  dyoung 	an = (struct ath_node *) ni;
   2360  1.1  dyoung 	if (an->an_tx_antenna)
   2361  1.1  dyoung 		antenna = an->an_tx_antenna;
   2362  1.1  dyoung 	else
   2363  1.1  dyoung 		antenna = an->an_rx_antenna;
   2364  1.1  dyoung 
   2365  1.1  dyoung 	/*
   2366  1.1  dyoung 	 * Formulate first tx descriptor with tx controls.
   2367  1.1  dyoung 	 */
   2368  1.1  dyoung 	/* XXX check return value? */
   2369  1.1  dyoung 	ath_hal_setuptxdesc(ah, ds
   2370  1.1  dyoung 		, pktlen		/* packet length */
   2371  1.1  dyoung 		, hdrlen		/* header length */
   2372  1.1  dyoung 		, atype			/* Atheros packet type */
   2373  1.1  dyoung 		, 60			/* txpower XXX */
   2374  1.1  dyoung 		, txrate, 1+10		/* series 0 rate/tries */
   2375  1.1  dyoung 		, iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID
   2376  1.1  dyoung 		, antenna		/* antenna mode */
   2377  1.1  dyoung 		, flags			/* flags */
   2378  1.1  dyoung 		, ctsrate		/* rts/cts rate */
   2379  1.1  dyoung 		, ctsduration		/* rts/cts duration */
   2380  1.1  dyoung 	);
   2381  1.1  dyoung #ifdef notyet
   2382  1.1  dyoung 	ath_hal_setupxtxdesc(ah, ds
   2383  1.1  dyoung 		, AH_FALSE		/* short preamble */
   2384  1.1  dyoung 		, 0, 0			/* series 1 rate/tries */
   2385  1.1  dyoung 		, 0, 0			/* series 2 rate/tries */
   2386  1.1  dyoung 		, 0, 0			/* series 3 rate/tries */
   2387  1.1  dyoung 	);
   2388  1.1  dyoung #endif
   2389  1.1  dyoung 	/*
   2390  1.1  dyoung 	 * Fillin the remainder of the descriptor info.
   2391  1.1  dyoung 	 */
   2392  1.1  dyoung 	for (i = 0; i < bf->bf_nseg; i++, ds++) {
   2393  1.1  dyoung 		ds->ds_data = bf->bf_segs[i].ds_addr;
   2394  1.1  dyoung 		if (i == bf->bf_nseg - 1)
   2395  1.1  dyoung 			ds->ds_link = 0;
   2396  1.1  dyoung 		else
   2397  1.1  dyoung 			ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
   2398  1.1  dyoung 		ath_hal_filltxdesc(ah, ds
   2399  1.1  dyoung 			, bf->bf_segs[i].ds_len	/* segment length */
   2400  1.1  dyoung 			, i == 0		/* first segment */
   2401  1.1  dyoung 			, i == bf->bf_nseg - 1	/* last segment */
   2402  1.1  dyoung 		);
   2403  1.1  dyoung 		DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n",
   2404  1.1  dyoung 		    i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1,
   2405  1.1  dyoung 		    ds->ds_hw[0], ds->ds_hw[1]));
   2406  1.1  dyoung 	}
   2407  1.1  dyoung 
   2408  1.1  dyoung 	/*
   2409  1.1  dyoung 	 * Insert the frame on the outbound list and
   2410  1.1  dyoung 	 * pass it on to the hardware.
   2411  1.1  dyoung 	 */
   2412  1.2  dyoung 	ath_txq_critsect_begin(sc, s);
   2413  1.1  dyoung 	TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
   2414  1.1  dyoung 	if (sc->sc_txlink == NULL) {
   2415  1.1  dyoung 		ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr);
   2416  1.1  dyoung 		DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n",
   2417  1.1  dyoung 		    (caddr_t)bf->bf_daddr, bf->bf_desc));
   2418  1.1  dyoung 	} else {
   2419  1.1  dyoung 		*sc->sc_txlink = bf->bf_daddr;
   2420  1.1  dyoung 		DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n",
   2421  1.1  dyoung 		    sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc));
   2422  1.1  dyoung 	}
   2423  1.1  dyoung 	sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
   2424  1.2  dyoung 	ath_txq_critsect_end(sc, s);
   2425  1.1  dyoung 
   2426  1.1  dyoung 	ath_hal_txstart(ah, sc->sc_txhalq);
   2427  1.1  dyoung 	return 0;
   2428  1.1  dyoung }
   2429  1.1  dyoung 
   2430  1.1  dyoung static void
   2431  1.1  dyoung ath_tx_proc(void *arg, int npending)
   2432  1.1  dyoung {
   2433  1.1  dyoung 	struct ath_softc *sc = arg;
   2434  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2435  1.1  dyoung 	struct ath_buf *bf;
   2436  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2437  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   2438  1.1  dyoung 	struct ath_desc *ds;
   2439  1.1  dyoung 	struct ieee80211_node *ni;
   2440  1.1  dyoung 	struct ath_node *an;
   2441  1.1  dyoung 	int sr, lr;
   2442  1.1  dyoung 	HAL_STATUS status;
   2443  1.2  dyoung 	ath_txq_critsect_decl(s);
   2444  1.2  dyoung 	ath_txbuf_critsect_decl(s2);
   2445  1.1  dyoung 
   2446  1.1  dyoung 	DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n",
   2447  1.1  dyoung 		npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq),
   2448  1.1  dyoung 		sc->sc_txlink));
   2449  1.1  dyoung 	for (;;) {
   2450  1.2  dyoung 		ath_txq_critsect_begin(sc, s);
   2451  1.1  dyoung 		bf = TAILQ_FIRST(&sc->sc_txq);
   2452  1.1  dyoung 		if (bf == NULL) {
   2453  1.1  dyoung 			sc->sc_txlink = NULL;
   2454  1.2  dyoung 			ath_txq_critsect_end(sc, s);
   2455  1.1  dyoung 			break;
   2456  1.1  dyoung 		}
   2457  1.1  dyoung 		/* only the last descriptor is needed */
   2458  1.1  dyoung 		ds = &bf->bf_desc[bf->bf_nseg - 1];
   2459  1.1  dyoung 		status = ath_hal_txprocdesc(ah, ds);
   2460  1.1  dyoung #ifdef AR_DEBUG
   2461  1.1  dyoung 		if (ath_debug > 1)
   2462  1.1  dyoung 			ath_printtxbuf(bf, status == HAL_OK);
   2463  1.1  dyoung #endif
   2464  1.1  dyoung 		if (status == HAL_EINPROGRESS) {
   2465  1.2  dyoung 			ath_txq_critsect_end(sc, s);
   2466  1.1  dyoung 			break;
   2467  1.1  dyoung 		}
   2468  1.1  dyoung 		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
   2469  1.2  dyoung 		ath_txq_critsect_end(sc, s);
   2470  1.1  dyoung 
   2471  1.1  dyoung 		ni = bf->bf_node;
   2472  1.1  dyoung 		if (ni != NULL) {
   2473  1.1  dyoung 			an = (struct ath_node *) ni;
   2474  1.1  dyoung 			if (ds->ds_txstat.ts_status == 0) {
   2475  1.1  dyoung 				an->an_tx_ok++;
   2476  1.1  dyoung 				an->an_tx_antenna = ds->ds_txstat.ts_antenna;
   2477  1.1  dyoung 			} else {
   2478  1.1  dyoung 				an->an_tx_err++;
   2479  1.1  dyoung 				ifp->if_oerrors++;
   2480  1.1  dyoung 				if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY)
   2481  1.1  dyoung 					sc->sc_stats.ast_tx_xretries++;
   2482  1.1  dyoung 				if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO)
   2483  1.1  dyoung 					sc->sc_stats.ast_tx_fifoerr++;
   2484  1.1  dyoung 				if (ds->ds_txstat.ts_status & HAL_TXERR_FILT)
   2485  1.1  dyoung 					sc->sc_stats.ast_tx_filtered++;
   2486  1.1  dyoung 				an->an_tx_antenna = 0;	/* invalidate */
   2487  1.1  dyoung 			}
   2488  1.1  dyoung 			sr = ds->ds_txstat.ts_shortretry;
   2489  1.1  dyoung 			lr = ds->ds_txstat.ts_longretry;
   2490  1.1  dyoung 			sc->sc_stats.ast_tx_shortretry += sr;
   2491  1.1  dyoung 			sc->sc_stats.ast_tx_longretry += lr;
   2492  1.1  dyoung 			if (sr + lr)
   2493  1.1  dyoung 				an->an_tx_retr++;
   2494  1.1  dyoung 			/*
   2495  1.1  dyoung 			 * Reclaim reference to node.
   2496  1.1  dyoung 			 *
   2497  1.1  dyoung 			 * NB: the node may be reclaimed here if, for example
   2498  1.1  dyoung 			 *     this is a DEAUTH message that was sent and the
   2499  1.1  dyoung 			 *     node was timed out due to inactivity.
   2500  1.1  dyoung 			 */
   2501  1.1  dyoung 			if (ni != ic->ic_bss)
   2502  1.1  dyoung 				ieee80211_free_node(ic, ni);
   2503  1.1  dyoung 		}
   2504  1.2  dyoung 		ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE);
   2505  1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2506  1.1  dyoung 		m_freem(bf->bf_m);
   2507  1.1  dyoung 		bf->bf_m = NULL;
   2508  1.1  dyoung 		bf->bf_node = NULL;
   2509  1.1  dyoung 
   2510  1.2  dyoung 		ath_txbuf_critsect_begin(sc, s2);
   2511  1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2512  1.2  dyoung 		ath_txbuf_critsect_end(sc, s2);
   2513  1.1  dyoung 	}
   2514  1.1  dyoung 	ifp->if_flags &= ~IFF_OACTIVE;
   2515  1.1  dyoung 	sc->sc_tx_timer = 0;
   2516  1.1  dyoung 
   2517  1.1  dyoung 	ath_start(ifp);
   2518  1.1  dyoung }
   2519  1.1  dyoung 
   2520  1.1  dyoung /*
   2521  1.1  dyoung  * Drain the transmit queue and reclaim resources.
   2522  1.1  dyoung  */
   2523  1.1  dyoung static void
   2524  1.1  dyoung ath_draintxq(struct ath_softc *sc)
   2525  1.1  dyoung {
   2526  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2527  1.1  dyoung 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   2528  1.1  dyoung 	struct ath_buf *bf;
   2529  1.2  dyoung 	ath_txq_critsect_decl(s);
   2530  1.2  dyoung 	ath_txbuf_critsect_decl(s2);
   2531  1.1  dyoung 
   2532  1.1  dyoung 	/* XXX return value */
   2533  1.1  dyoung 	if (!sc->sc_invalid) {
   2534  1.1  dyoung 		/* don't touch the hardware if marked invalid */
   2535  1.1  dyoung 		(void) ath_hal_stoptxdma(ah, sc->sc_txhalq);
   2536  1.1  dyoung 		DPRINTF(("ath_draintxq: tx queue %p, link %p\n",
   2537  1.1  dyoung 		    (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq),
   2538  1.1  dyoung 		    sc->sc_txlink));
   2539  1.1  dyoung 		(void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
   2540  1.1  dyoung 		DPRINTF(("ath_draintxq: beacon queue %p\n",
   2541  1.1  dyoung 		    (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq)));
   2542  1.1  dyoung 	}
   2543  1.1  dyoung 	for (;;) {
   2544  1.2  dyoung 		ath_txq_critsect_begin(sc, s);
   2545  1.1  dyoung 		bf = TAILQ_FIRST(&sc->sc_txq);
   2546  1.1  dyoung 		if (bf == NULL) {
   2547  1.1  dyoung 			sc->sc_txlink = NULL;
   2548  1.2  dyoung 			ath_txq_critsect_end(sc, s);
   2549  1.1  dyoung 			break;
   2550  1.1  dyoung 		}
   2551  1.1  dyoung 		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
   2552  1.2  dyoung 		ath_txq_critsect_end(sc, s);
   2553  1.1  dyoung #ifdef AR_DEBUG
   2554  1.1  dyoung 		if (ath_debug)
   2555  1.1  dyoung 			ath_printtxbuf(bf,
   2556  1.1  dyoung 				ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK);
   2557  1.1  dyoung #endif /* AR_DEBUG */
   2558  1.1  dyoung 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2559  1.1  dyoung 		m_freem(bf->bf_m);
   2560  1.1  dyoung 		bf->bf_m = NULL;
   2561  1.1  dyoung 		bf->bf_node = NULL;
   2562  1.2  dyoung 		ath_txbuf_critsect_begin(sc, s2);
   2563  1.1  dyoung 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2564  1.2  dyoung 		ath_txbuf_critsect_end(sc, s2);
   2565  1.1  dyoung 	}
   2566  1.1  dyoung 	ifp->if_flags &= ~IFF_OACTIVE;
   2567  1.1  dyoung 	sc->sc_tx_timer = 0;
   2568  1.1  dyoung }
   2569  1.1  dyoung 
   2570  1.1  dyoung /*
   2571  1.1  dyoung  * Disable the receive h/w in preparation for a reset.
   2572  1.1  dyoung  */
   2573  1.1  dyoung static void
   2574  1.1  dyoung ath_stoprecv(struct ath_softc *sc)
   2575  1.1  dyoung {
   2576  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2577  1.1  dyoung 
   2578  1.1  dyoung 	ath_hal_stoppcurecv(ah);	/* disable PCU */
   2579  1.1  dyoung 	ath_hal_setrxfilter(ah, 0);	/* clear recv filter */
   2580  1.1  dyoung 	ath_hal_stopdmarecv(ah);	/* disable DMA engine */
   2581  1.1  dyoung 	DELAY(3000);			/* long enough for 1 frame */
   2582  1.1  dyoung #ifdef AR_DEBUG
   2583  1.1  dyoung 	if (ath_debug) {
   2584  1.1  dyoung 		struct ath_buf *bf;
   2585  1.1  dyoung 
   2586  1.1  dyoung 		DPRINTF(("ath_stoprecv: rx queue %p, link %p\n",
   2587  1.1  dyoung 		    (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink));
   2588  1.1  dyoung 		TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   2589  1.1  dyoung 			if (ath_hal_rxprocdesc(ah, bf->bf_desc) == HAL_OK)
   2590  1.1  dyoung 				ath_printrxbuf(bf, 1);
   2591  1.1  dyoung 		}
   2592  1.1  dyoung 	}
   2593  1.1  dyoung #endif
   2594  1.1  dyoung 	sc->sc_rxlink = NULL;		/* just in case */
   2595  1.1  dyoung }
   2596  1.1  dyoung 
   2597  1.1  dyoung /*
   2598  1.1  dyoung  * Enable the receive h/w following a reset.
   2599  1.1  dyoung  */
   2600  1.1  dyoung static int
   2601  1.1  dyoung ath_startrecv(struct ath_softc *sc)
   2602  1.1  dyoung {
   2603  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2604  1.1  dyoung 	struct ath_buf *bf;
   2605  1.1  dyoung 
   2606  1.1  dyoung 	sc->sc_rxlink = NULL;
   2607  1.1  dyoung 	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   2608  1.1  dyoung 		int error = ath_rxbuf_init(sc, bf);
   2609  1.1  dyoung 		if (error != 0) {
   2610  1.1  dyoung 			DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n",
   2611  1.1  dyoung 				error));
   2612  1.1  dyoung 			return error;
   2613  1.1  dyoung 		}
   2614  1.1  dyoung 	}
   2615  1.1  dyoung 
   2616  1.1  dyoung 	bf = TAILQ_FIRST(&sc->sc_rxbuf);
   2617  1.1  dyoung 	ath_hal_putrxbuf(ah, bf->bf_daddr);
   2618  1.1  dyoung 	ath_hal_rxena(ah);		/* enable recv descriptors */
   2619  1.1  dyoung 	ath_mode_init(sc);		/* set filters, etc. */
   2620  1.1  dyoung 	ath_hal_startpcurecv(ah);	/* re-enable PCU/DMA engine */
   2621  1.1  dyoung 	return 0;
   2622  1.1  dyoung }
   2623  1.1  dyoung 
   2624  1.1  dyoung /*
   2625  1.1  dyoung  * Set/change channels.  If the channel is really being changed,
   2626  1.1  dyoung  * it's done by resetting the chip.  To accomplish this we must
   2627  1.1  dyoung  * first cleanup any pending DMA, then restart stuff after a la
   2628  1.1  dyoung  * ath_init.
   2629  1.1  dyoung  */
   2630  1.1  dyoung static int
   2631  1.1  dyoung ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
   2632  1.1  dyoung {
   2633  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2634  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2635  1.1  dyoung 
   2636  1.1  dyoung 	DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n",
   2637  1.1  dyoung 	    ieee80211_chan2ieee(ic, ic->ic_ibss_chan),
   2638  1.1  dyoung 		ic->ic_ibss_chan->ic_freq,
   2639  1.1  dyoung 	    ieee80211_chan2ieee(ic, chan), chan->ic_freq));
   2640  1.1  dyoung 	if (chan != ic->ic_ibss_chan) {
   2641  1.1  dyoung 		HAL_STATUS status;
   2642  1.1  dyoung 		HAL_CHANNEL hchan;
   2643  1.1  dyoung 		enum ieee80211_phymode mode;
   2644  1.1  dyoung 
   2645  1.1  dyoung 		/*
   2646  1.1  dyoung 		 * To switch channels clear any pending DMA operations;
   2647  1.1  dyoung 		 * wait long enough for the RX fifo to drain, reset the
   2648  1.1  dyoung 		 * hardware at the new frequency, and then re-enable
   2649  1.1  dyoung 		 * the relevant bits of the h/w.
   2650  1.1  dyoung 		 */
   2651  1.1  dyoung 		ath_hal_intrset(ah, 0);		/* disable interrupts */
   2652  1.1  dyoung 		ath_draintxq(sc);		/* clear pending tx frames */
   2653  1.1  dyoung 		ath_stoprecv(sc);		/* turn off frame recv */
   2654  1.1  dyoung 		/*
   2655  1.1  dyoung 		 * Convert to a HAL channel description with
   2656  1.1  dyoung 		 * the flags constrained to reflect the current
   2657  1.1  dyoung 		 * operating mode.
   2658  1.1  dyoung 		 */
   2659  1.1  dyoung 		hchan.channel = chan->ic_freq;
   2660  1.1  dyoung 		hchan.channelFlags = ath_chan2flags(ic, chan);
   2661  1.1  dyoung 		if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) {
   2662  1.1  dyoung 			if_printf(&ic->ic_if, "ath_chan_set: unable to reset "
   2663  1.1  dyoung 				"channel %u (%u Mhz)\n",
   2664  1.1  dyoung 				ieee80211_chan2ieee(ic, chan), chan->ic_freq);
   2665  1.1  dyoung 			return EIO;
   2666  1.1  dyoung 		}
   2667  1.1  dyoung 		/*
   2668  1.1  dyoung 		 * Re-enable rx framework.
   2669  1.1  dyoung 		 */
   2670  1.1  dyoung 		if (ath_startrecv(sc) != 0) {
   2671  1.1  dyoung 			if_printf(&ic->ic_if,
   2672  1.1  dyoung 				"ath_chan_set: unable to restart recv logic\n");
   2673  1.1  dyoung 			return EIO;
   2674  1.1  dyoung 		}
   2675  1.1  dyoung 
   2676  1.1  dyoung 		/*
   2677  1.1  dyoung 		 * Update BPF state.
   2678  1.1  dyoung 		 */
   2679  1.1  dyoung 		sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
   2680  1.1  dyoung 			htole16(chan->ic_freq);
   2681  1.1  dyoung 		sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
   2682  1.1  dyoung 			htole16(chan->ic_flags);
   2683  1.1  dyoung 
   2684  1.1  dyoung 		/*
   2685  1.1  dyoung 		 * Change channels and update the h/w rate map
   2686  1.1  dyoung 		 * if we're switching; e.g. 11a to 11b/g.
   2687  1.1  dyoung 		 */
   2688  1.1  dyoung 		ic->ic_ibss_chan = chan;
   2689  1.1  dyoung 		mode = ieee80211_chan2mode(ic, chan);
   2690  1.1  dyoung 		if (mode != sc->sc_curmode)
   2691  1.1  dyoung 			ath_setcurmode(sc, mode);
   2692  1.1  dyoung 
   2693  1.1  dyoung 		/*
   2694  1.1  dyoung 		 * Re-enable interrupts.
   2695  1.1  dyoung 		 */
   2696  1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   2697  1.1  dyoung 	}
   2698  1.1  dyoung 	return 0;
   2699  1.1  dyoung }
   2700  1.1  dyoung 
   2701  1.1  dyoung static void
   2702  1.1  dyoung ath_next_scan(void *arg)
   2703  1.1  dyoung {
   2704  1.1  dyoung 	struct ath_softc *sc = arg;
   2705  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2706  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   2707  1.2  dyoung 	int s;
   2708  1.2  dyoung 
   2709  1.2  dyoung 	/* don't call ath_start w/o network interrupts blocked */
   2710  1.2  dyoung 	s = splnet();
   2711  1.1  dyoung 
   2712  1.1  dyoung 	if (ic->ic_state == IEEE80211_S_SCAN)
   2713  1.1  dyoung 		ieee80211_next_scan(ifp);
   2714  1.2  dyoung 	splx(s);
   2715  1.1  dyoung }
   2716  1.1  dyoung 
   2717  1.1  dyoung /*
   2718  1.1  dyoung  * Periodically recalibrate the PHY to account
   2719  1.1  dyoung  * for temperature/environment changes.
   2720  1.1  dyoung  */
   2721  1.1  dyoung static void
   2722  1.1  dyoung ath_calibrate(void *arg)
   2723  1.1  dyoung {
   2724  1.1  dyoung 	struct ath_softc *sc = arg;
   2725  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2726  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2727  1.1  dyoung 	struct ieee80211_channel *c;
   2728  1.1  dyoung 	HAL_CHANNEL hchan;
   2729  1.1  dyoung 
   2730  1.1  dyoung 	sc->sc_stats.ast_per_cal++;
   2731  1.1  dyoung 
   2732  1.1  dyoung 	/*
   2733  1.1  dyoung 	 * Convert to a HAL channel description with the flags
   2734  1.1  dyoung 	 * constrained to reflect the current operating mode.
   2735  1.1  dyoung 	 */
   2736  1.1  dyoung 	c = ic->ic_ibss_chan;
   2737  1.1  dyoung 	hchan.channel = c->ic_freq;
   2738  1.1  dyoung 	hchan.channelFlags = ath_chan2flags(ic, c);
   2739  1.1  dyoung 
   2740  1.1  dyoung 	DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags));
   2741  1.1  dyoung 
   2742  1.1  dyoung 	if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
   2743  1.1  dyoung 		/*
   2744  1.1  dyoung 		 * Rfgain is out of bounds, reset the chip
   2745  1.1  dyoung 		 * to load new gain values.
   2746  1.1  dyoung 		 */
   2747  1.1  dyoung 		sc->sc_stats.ast_per_rfgain++;
   2748  1.1  dyoung 		ath_reset(sc);
   2749  1.1  dyoung 	}
   2750  1.1  dyoung 	if (!ath_hal_calibrate(ah, &hchan)) {
   2751  1.1  dyoung 		DPRINTF(("%s: calibration of channel %u failed\n",
   2752  1.1  dyoung 			__func__, c->ic_freq));
   2753  1.1  dyoung 		sc->sc_stats.ast_per_calfail++;
   2754  1.1  dyoung 	}
   2755  1.1  dyoung 	callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc);
   2756  1.1  dyoung }
   2757  1.1  dyoung 
   2758  1.4  dyoung static HAL_LED_STATE
   2759  1.4  dyoung ath_state_to_led(enum ieee80211_state state)
   2760  1.4  dyoung {
   2761  1.4  dyoung 	switch (state) {
   2762  1.4  dyoung 	case IEEE80211_S_INIT:
   2763  1.4  dyoung 		return HAL_LED_INIT;
   2764  1.4  dyoung 	case IEEE80211_S_SCAN:
   2765  1.4  dyoung 		return HAL_LED_SCAN;
   2766  1.4  dyoung 	case IEEE80211_S_AUTH:
   2767  1.4  dyoung 		return HAL_LED_AUTH;
   2768  1.4  dyoung 	case IEEE80211_S_ASSOC:
   2769  1.4  dyoung 		return HAL_LED_ASSOC;
   2770  1.4  dyoung 	case IEEE80211_S_RUN:
   2771  1.4  dyoung 		return HAL_LED_RUN;
   2772  1.4  dyoung 	default:
   2773  1.4  dyoung 		panic("%s: unknown 802.11 state %d\n", __func__, state);
   2774  1.4  dyoung 		return HAL_LED_INIT;
   2775  1.4  dyoung 	}
   2776  1.4  dyoung }
   2777  1.4  dyoung 
   2778  1.1  dyoung static int
   2779  1.1  dyoung ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
   2780  1.1  dyoung {
   2781  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   2782  1.1  dyoung 	struct ath_softc *sc = ifp->if_softc;
   2783  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2784  1.1  dyoung 	struct ieee80211_node *ni;
   2785  1.1  dyoung 	int i, error;
   2786  1.1  dyoung 	u_int8_t *bssid;
   2787  1.1  dyoung 	u_int32_t rfilt;
   2788  1.1  dyoung 
   2789  1.1  dyoung 	DPRINTF(("%s: %s -> %s\n", __func__,
   2790  1.1  dyoung 		ieee80211_state_name[ic->ic_state],
   2791  1.1  dyoung 		ieee80211_state_name[nstate]));
   2792  1.1  dyoung 
   2793  1.4  dyoung 	ath_hal_setledstate(ah, ath_state_to_led(nstate));	/* set LED */
   2794  1.1  dyoung 
   2795  1.1  dyoung 	if (nstate == IEEE80211_S_INIT) {
   2796  1.1  dyoung 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
   2797  1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   2798  1.1  dyoung 		callout_stop(&sc->sc_scan_ch);
   2799  1.1  dyoung 		callout_stop(&sc->sc_cal_ch);
   2800  1.1  dyoung 		return (*sc->sc_newstate)(ic, nstate, arg);
   2801  1.1  dyoung 	}
   2802  1.1  dyoung 	ni = ic->ic_bss;
   2803  1.1  dyoung 	error = ath_chan_set(sc, ni->ni_chan);
   2804  1.1  dyoung 	if (error != 0)
   2805  1.1  dyoung 		goto bad;
   2806  1.1  dyoung 	rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
   2807  1.1  dyoung 	      | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
   2808  1.1  dyoung 	if (ic->ic_opmode != IEEE80211_M_STA)
   2809  1.1  dyoung 		rfilt |= HAL_RX_FILTER_PROBEREQ;
   2810  1.1  dyoung 	if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
   2811  1.1  dyoung 	    (ifp->if_flags & IFF_PROMISC))
   2812  1.1  dyoung 		rfilt |= HAL_RX_FILTER_PROM;
   2813  1.1  dyoung 	if (nstate == IEEE80211_S_SCAN) {
   2814  1.1  dyoung 		callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000,
   2815  1.1  dyoung 			ath_next_scan, sc);
   2816  1.1  dyoung 		bssid = ifp->if_broadcastaddr;
   2817  1.1  dyoung 		rfilt |= HAL_RX_FILTER_BEACON;
   2818  1.1  dyoung 	} else {
   2819  1.1  dyoung 		callout_stop(&sc->sc_scan_ch);
   2820  1.1  dyoung 		bssid = ni->ni_bssid;
   2821  1.1  dyoung 	}
   2822  1.1  dyoung 	ath_hal_setrxfilter(ah, rfilt);
   2823  1.1  dyoung 	DPRINTF(("%s: RX filter 0x%x bssid %s\n",
   2824  1.1  dyoung 		 __func__, rfilt, ether_sprintf(bssid)));
   2825  1.1  dyoung 
   2826  1.1  dyoung 	if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA)
   2827  1.1  dyoung 		ath_hal_setassocid(ah, bssid, ni->ni_associd);
   2828  1.1  dyoung 	else
   2829  1.1  dyoung 		ath_hal_setassocid(ah, bssid, 0);
   2830  1.1  dyoung 	if (ic->ic_flags & IEEE80211_F_WEPON) {
   2831  1.1  dyoung 		for (i = 0; i < IEEE80211_WEP_NKID; i++)
   2832  1.1  dyoung 			if (ath_hal_keyisvalid(ah, i))
   2833  1.1  dyoung 				ath_hal_keysetmac(ah, i, bssid);
   2834  1.1  dyoung 	}
   2835  1.1  dyoung 
   2836  1.1  dyoung 	if (nstate == IEEE80211_S_RUN) {
   2837  1.1  dyoung 		DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s "
   2838  1.1  dyoung 			"capinfo=0x%04x chan=%d\n"
   2839  1.1  dyoung 			 , __func__
   2840  1.1  dyoung 			 , ic->ic_flags
   2841  1.1  dyoung 			 , ni->ni_intval
   2842  1.1  dyoung 			 , ether_sprintf(ni->ni_bssid)
   2843  1.1  dyoung 			 , ni->ni_capinfo
   2844  1.1  dyoung 			 , ieee80211_chan2ieee(ic, ni->ni_chan)));
   2845  1.1  dyoung 
   2846  1.1  dyoung 		/*
   2847  1.1  dyoung 		 * Allocate and setup the beacon frame for AP or adhoc mode.
   2848  1.1  dyoung 		 */
   2849  1.1  dyoung 		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
   2850  1.1  dyoung 		    ic->ic_opmode == IEEE80211_M_IBSS) {
   2851  1.1  dyoung 			error = ath_beacon_alloc(sc, ni);
   2852  1.1  dyoung 			if (error != 0)
   2853  1.1  dyoung 				goto bad;
   2854  1.1  dyoung 		}
   2855  1.1  dyoung 
   2856  1.1  dyoung 		/*
   2857  1.1  dyoung 		 * Configure the beacon and sleep timers.
   2858  1.1  dyoung 		 */
   2859  1.1  dyoung 		ath_beacon_config(sc);
   2860  1.1  dyoung 
   2861  1.1  dyoung 		/* start periodic recalibration timer */
   2862  1.1  dyoung 		callout_reset(&sc->sc_cal_ch, hz * ath_calinterval,
   2863  1.1  dyoung 			ath_calibrate, sc);
   2864  1.1  dyoung 	} else {
   2865  1.1  dyoung 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
   2866  1.1  dyoung 		ath_hal_intrset(ah, sc->sc_imask);
   2867  1.1  dyoung 		callout_stop(&sc->sc_cal_ch);		/* no calibration */
   2868  1.1  dyoung 	}
   2869  1.1  dyoung 	/*
   2870  1.1  dyoung 	 * Reset the rate control state.
   2871  1.1  dyoung 	 */
   2872  1.1  dyoung 	ath_rate_ctl_reset(sc, nstate);
   2873  1.1  dyoung 	/*
   2874  1.1  dyoung 	 * Invoke the parent method to complete the work.
   2875  1.1  dyoung 	 */
   2876  1.1  dyoung 	return (*sc->sc_newstate)(ic, nstate, arg);
   2877  1.1  dyoung bad:
   2878  1.1  dyoung 	callout_stop(&sc->sc_scan_ch);
   2879  1.1  dyoung 	callout_stop(&sc->sc_cal_ch);
   2880  1.1  dyoung 	/* NB: do not invoke the parent */
   2881  1.1  dyoung 	return error;
   2882  1.1  dyoung }
   2883  1.1  dyoung 
   2884  1.1  dyoung /*
   2885  1.1  dyoung  * Setup driver-specific state for a newly associated node.
   2886  1.1  dyoung  * Note that we're called also on a re-associate, the isnew
   2887  1.1  dyoung  * param tells us if this is the first time or not.
   2888  1.1  dyoung  */
   2889  1.1  dyoung static void
   2890  1.1  dyoung ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
   2891  1.1  dyoung {
   2892  1.1  dyoung 	if (isnew) {
   2893  1.1  dyoung 		struct ath_node *an = (struct ath_node *) ni;
   2894  1.1  dyoung 
   2895  1.1  dyoung 		an->an_tx_ok = an->an_tx_err =
   2896  1.1  dyoung 			an->an_tx_retr = an->an_tx_upper = 0;
   2897  1.1  dyoung 		/* start with highest negotiated rate */
   2898  1.1  dyoung 		/*
   2899  1.1  dyoung 		 * XXX should do otherwise but only when
   2900  1.1  dyoung 		 * the rate control algorithm is better.
   2901  1.1  dyoung 		 */
   2902  1.1  dyoung 		KASSERT(ni->ni_rates.rs_nrates > 0,
   2903  1.1  dyoung 			("new association w/ no rates!"));
   2904  1.1  dyoung 		ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
   2905  1.1  dyoung 	}
   2906  1.1  dyoung }
   2907  1.1  dyoung 
   2908  1.1  dyoung static int
   2909  1.1  dyoung ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor)
   2910  1.1  dyoung {
   2911  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2912  1.1  dyoung 	struct ifnet *ifp = &ic->ic_if;
   2913  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2914  1.1  dyoung 	HAL_CHANNEL *chans;
   2915  1.1  dyoung 	int i, ix, nchan;
   2916  1.1  dyoung 
   2917  1.1  dyoung 	sc->sc_have11g = 0;
   2918  1.1  dyoung 	chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL),
   2919  1.1  dyoung 			M_TEMP, M_NOWAIT);
   2920  1.1  dyoung 	if (chans == NULL) {
   2921  1.1  dyoung 		if_printf(ifp, "unable to allocate channel table\n");
   2922  1.1  dyoung 		return ENOMEM;
   2923  1.1  dyoung 	}
   2924  1.1  dyoung 	if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
   2925  1.1  dyoung 	    cc, HAL_MODE_ALL, outdoor)) {
   2926  1.1  dyoung 		if_printf(ifp, "unable to collect channel list from hal\n");
   2927  1.1  dyoung 		free(chans, M_TEMP);
   2928  1.1  dyoung 		return EINVAL;
   2929  1.1  dyoung 	}
   2930  1.1  dyoung 
   2931  1.1  dyoung 	/*
   2932  1.1  dyoung 	 * Convert HAL channels to ieee80211 ones and insert
   2933  1.1  dyoung 	 * them in the table according to their channel number.
   2934  1.1  dyoung 	 */
   2935  1.1  dyoung 	for (i = 0; i < nchan; i++) {
   2936  1.1  dyoung 		HAL_CHANNEL *c = &chans[i];
   2937  1.1  dyoung 		ix = ath_hal_mhz2ieee(c->channel, c->channelFlags);
   2938  1.1  dyoung 		if (ix > IEEE80211_CHAN_MAX) {
   2939  1.1  dyoung 			if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n",
   2940  1.1  dyoung 				ix, c->channel, c->channelFlags);
   2941  1.1  dyoung 			continue;
   2942  1.1  dyoung 		}
   2943  1.1  dyoung 		/* NB: flags are known to be compatible */
   2944  1.1  dyoung 		if (ic->ic_channels[ix].ic_freq == 0) {
   2945  1.1  dyoung 			ic->ic_channels[ix].ic_freq = c->channel;
   2946  1.1  dyoung 			ic->ic_channels[ix].ic_flags = c->channelFlags;
   2947  1.1  dyoung 		} else {
   2948  1.1  dyoung 			/* channels overlap; e.g. 11g and 11b */
   2949  1.1  dyoung 			ic->ic_channels[ix].ic_flags |= c->channelFlags;
   2950  1.1  dyoung 		}
   2951  1.1  dyoung 		if ((c->channelFlags & CHANNEL_G) == CHANNEL_G)
   2952  1.1  dyoung 			sc->sc_have11g = 1;
   2953  1.1  dyoung 	}
   2954  1.1  dyoung 	free(chans, M_TEMP);
   2955  1.1  dyoung 	return 0;
   2956  1.1  dyoung }
   2957  1.1  dyoung 
   2958  1.1  dyoung static int
   2959  1.1  dyoung ath_rate_setup(struct ath_softc *sc, u_int mode)
   2960  1.1  dyoung {
   2961  1.1  dyoung 	struct ath_hal *ah = sc->sc_ah;
   2962  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   2963  1.1  dyoung 	const HAL_RATE_TABLE *rt;
   2964  1.1  dyoung 	struct ieee80211_rateset *rs;
   2965  1.1  dyoung 	int i, maxrates;
   2966  1.1  dyoung 
   2967  1.1  dyoung 	switch (mode) {
   2968  1.1  dyoung 	case IEEE80211_MODE_11A:
   2969  1.1  dyoung 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A);
   2970  1.1  dyoung 		break;
   2971  1.1  dyoung 	case IEEE80211_MODE_11B:
   2972  1.1  dyoung 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B);
   2973  1.1  dyoung 		break;
   2974  1.1  dyoung 	case IEEE80211_MODE_11G:
   2975  1.1  dyoung 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G);
   2976  1.1  dyoung 		break;
   2977  1.1  dyoung 	case IEEE80211_MODE_TURBO:
   2978  1.1  dyoung 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO);
   2979  1.1  dyoung 		break;
   2980  1.1  dyoung 	default:
   2981  1.1  dyoung 		DPRINTF(("%s: invalid mode %u\n", __func__, mode));
   2982  1.1  dyoung 		return 0;
   2983  1.1  dyoung 	}
   2984  1.1  dyoung 	rt = sc->sc_rates[mode];
   2985  1.1  dyoung 	if (rt == NULL)
   2986  1.1  dyoung 		return 0;
   2987  1.1  dyoung 	if (rt->rateCount > IEEE80211_RATE_MAXSIZE) {
   2988  1.1  dyoung 		DPRINTF(("%s: rate table too small (%u > %u)\n",
   2989  1.1  dyoung 			__func__, rt->rateCount, IEEE80211_RATE_MAXSIZE));
   2990  1.1  dyoung 		maxrates = IEEE80211_RATE_MAXSIZE;
   2991  1.1  dyoung 	} else
   2992  1.1  dyoung 		maxrates = rt->rateCount;
   2993  1.1  dyoung 	rs = &ic->ic_sup_rates[mode];
   2994  1.1  dyoung 	for (i = 0; i < maxrates; i++)
   2995  1.1  dyoung 		rs->rs_rates[i] = rt->info[i].dot11Rate;
   2996  1.1  dyoung 	rs->rs_nrates = maxrates;
   2997  1.1  dyoung 	return 1;
   2998  1.1  dyoung }
   2999  1.1  dyoung 
   3000  1.1  dyoung static void
   3001  1.1  dyoung ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
   3002  1.1  dyoung {
   3003  1.1  dyoung 	const HAL_RATE_TABLE *rt;
   3004  1.1  dyoung 	int i;
   3005  1.1  dyoung 
   3006  1.1  dyoung 	memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
   3007  1.1  dyoung 	rt = sc->sc_rates[mode];
   3008  1.1  dyoung 	KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
   3009  1.1  dyoung 	for (i = 0; i < rt->rateCount; i++)
   3010  1.1  dyoung 		sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i;
   3011  1.1  dyoung 	memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
   3012  1.1  dyoung 	for (i = 0; i < 32; i++)
   3013  1.1  dyoung 		sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate;
   3014  1.1  dyoung 	sc->sc_currates = rt;
   3015  1.1  dyoung 	sc->sc_curmode = mode;
   3016  1.1  dyoung }
   3017  1.1  dyoung 
   3018  1.1  dyoung /*
   3019  1.1  dyoung  * Reset the rate control state for each 802.11 state transition.
   3020  1.1  dyoung  */
   3021  1.1  dyoung static void
   3022  1.1  dyoung ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state)
   3023  1.1  dyoung {
   3024  1.1  dyoung 	struct ieee80211com *ic = &sc->sc_ic;
   3025  1.1  dyoung 	struct ieee80211_node *ni;
   3026  1.1  dyoung 	struct ath_node *an;
   3027  1.1  dyoung 
   3028  1.1  dyoung 	an = (struct ath_node *) ic->ic_bss;
   3029  1.1  dyoung 	an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0;
   3030  1.1  dyoung 	if (ic->ic_opmode == IEEE80211_M_STA) {
   3031  1.1  dyoung 		ni = ic->ic_bss;
   3032  1.1  dyoung 		if (state == IEEE80211_S_RUN) {
   3033  1.1  dyoung 			/* start with highest negotiated rate */
   3034  1.1  dyoung 			KASSERT(ni->ni_rates.rs_nrates > 0,
   3035  1.1  dyoung 				("transition to RUN state w/ no rates!"));
   3036  1.1  dyoung 			ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
   3037  1.1  dyoung 		} else {
   3038  1.1  dyoung 			/* use lowest rate */
   3039  1.1  dyoung 			ni->ni_txrate = 0;
   3040  1.1  dyoung 		}
   3041  1.1  dyoung 	} else {
   3042  1.1  dyoung 		TAILQ_FOREACH(ni, &ic->ic_node, ni_list) {
   3043  1.1  dyoung 			ni->ni_txrate = 0;		/* use lowest rate */
   3044  1.1  dyoung 			an = (struct ath_node *) ni;
   3045  1.1  dyoung 			an->an_tx_ok = an->an_tx_err = an->an_tx_retr =
   3046  1.1  dyoung 			    an->an_tx_upper = 0;
   3047  1.1  dyoung 		}
   3048  1.1  dyoung 	}
   3049  1.1  dyoung }
   3050  1.1  dyoung 
   3051  1.1  dyoung /*
   3052  1.1  dyoung  * Examine and potentially adjust the transmit rate.
   3053  1.1  dyoung  */
   3054  1.1  dyoung static void
   3055  1.1  dyoung ath_rate_ctl(void *arg, struct ieee80211_node *ni)
   3056  1.1  dyoung {
   3057  1.1  dyoung 	struct ath_softc *sc = arg;
   3058  1.1  dyoung 	struct ath_node *an = (struct ath_node *) ni;
   3059  1.1  dyoung 	struct ieee80211_rateset *rs = &ni->ni_rates;
   3060  1.1  dyoung 	int mod = 0, orate, enough;
   3061  1.1  dyoung 
   3062  1.1  dyoung 	/*
   3063  1.1  dyoung 	 * Rate control
   3064  1.1  dyoung 	 * XXX: very primitive version.
   3065  1.1  dyoung 	 */
   3066  1.1  dyoung 	sc->sc_stats.ast_rate_calls++;
   3067  1.1  dyoung 
   3068  1.1  dyoung 	enough = (an->an_tx_ok + an->an_tx_err >= 10);
   3069  1.1  dyoung 
   3070  1.1  dyoung 	/* no packet reached -> down */
   3071  1.1  dyoung 	if (an->an_tx_err > 0 && an->an_tx_ok == 0)
   3072  1.1  dyoung 		mod = -1;
   3073  1.1  dyoung 
   3074  1.1  dyoung 	/* all packets needs retry in average -> down */
   3075  1.1  dyoung 	if (enough && an->an_tx_ok < an->an_tx_retr)
   3076  1.1  dyoung 		mod = -1;
   3077  1.1  dyoung 
   3078  1.1  dyoung 	/* no error and less than 10% of packets needs retry -> up */
   3079  1.1  dyoung 	if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10)
   3080  1.1  dyoung 		mod = 1;
   3081  1.1  dyoung 
   3082  1.1  dyoung 	orate = ni->ni_txrate;
   3083  1.1  dyoung 	switch (mod) {
   3084  1.1  dyoung 	case 0:
   3085  1.1  dyoung 		if (enough && an->an_tx_upper > 0)
   3086  1.1  dyoung 			an->an_tx_upper--;
   3087  1.1  dyoung 		break;
   3088  1.1  dyoung 	case -1:
   3089  1.1  dyoung 		if (ni->ni_txrate > 0) {
   3090  1.1  dyoung 			ni->ni_txrate--;
   3091  1.1  dyoung 			sc->sc_stats.ast_rate_drop++;
   3092  1.1  dyoung 		}
   3093  1.1  dyoung 		an->an_tx_upper = 0;
   3094  1.1  dyoung 		break;
   3095  1.1  dyoung 	case 1:
   3096  1.1  dyoung 		if (++an->an_tx_upper < 2)
   3097  1.1  dyoung 			break;
   3098  1.1  dyoung 		an->an_tx_upper = 0;
   3099  1.1  dyoung 		if (ni->ni_txrate + 1 < rs->rs_nrates) {
   3100  1.1  dyoung 			ni->ni_txrate++;
   3101  1.1  dyoung 			sc->sc_stats.ast_rate_raise++;
   3102  1.1  dyoung 		}
   3103  1.1  dyoung 		break;
   3104  1.1  dyoung 	}
   3105  1.1  dyoung 
   3106  1.1  dyoung 	if (ni->ni_txrate != orate) {
   3107  1.7  itojun 		DPRINTF(("%s: %dM -> %dM (%d ok, %d err, %d retr)\n",
   3108  1.1  dyoung 		    __func__,
   3109  1.1  dyoung 		    (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2,
   3110  1.1  dyoung 		    (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2,
   3111  1.7  itojun 		    an->an_tx_ok, an->an_tx_err, an->an_tx_retr));
   3112  1.1  dyoung 	}
   3113  1.1  dyoung 	if (ni->ni_txrate != orate || enough)
   3114  1.1  dyoung 		an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0;
   3115  1.1  dyoung }
   3116  1.1  dyoung 
   3117  1.1  dyoung #ifdef AR_DEBUG
   3118  1.2  dyoung #ifdef __FreeBSD__
   3119  1.1  dyoung static int
   3120  1.1  dyoung sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
   3121  1.1  dyoung {
   3122  1.1  dyoung 	char dmode[64];
   3123  1.1  dyoung 	int error;
   3124  1.1  dyoung 
   3125  1.1  dyoung 	strncpy(dmode, "", sizeof(dmode) - 1);
   3126  1.1  dyoung 	dmode[sizeof(dmode) - 1] = '\0';
   3127  1.1  dyoung 	error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
   3128  1.1  dyoung 
   3129  1.1  dyoung 	if (error == 0 && req->newptr != NULL) {
   3130  1.1  dyoung 		struct ifnet *ifp;
   3131  1.1  dyoung 		struct ath_softc *sc;
   3132  1.1  dyoung 
   3133  1.1  dyoung 		ifp = ifunit("ath0");		/* XXX */
   3134  1.1  dyoung 		if (!ifp)
   3135  1.1  dyoung 			return EINVAL;
   3136  1.1  dyoung 		sc = ifp->if_softc;
   3137  1.1  dyoung 		if (strcmp(dmode, "hal") == 0)
   3138  1.1  dyoung 			ath_hal_dumpstate(sc->sc_ah);
   3139  1.1  dyoung 		else if (strcmp(dmode, "eeprom") == 0)
   3140  1.1  dyoung 			ath_hal_dumpeeprom(sc->sc_ah);
   3141  1.1  dyoung 		else if (strcmp(dmode, "rfgain") == 0)
   3142  1.1  dyoung 			ath_hal_dumprfgain(sc->sc_ah);
   3143  1.1  dyoung 		else if (strcmp(dmode, "ani") == 0)
   3144  1.1  dyoung 			ath_hal_dumpani(sc->sc_ah);
   3145  1.1  dyoung 		else
   3146  1.1  dyoung 			return EINVAL;
   3147  1.1  dyoung 	}
   3148  1.1  dyoung 	return error;
   3149  1.1  dyoung }
   3150  1.1  dyoung SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
   3151  1.1  dyoung 	0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
   3152  1.2  dyoung #endif /* __FreeBSD__ */
   3153  1.1  dyoung 
   3154  1.1  dyoung static void
   3155  1.1  dyoung ath_printrxbuf(struct ath_buf *bf, int done)
   3156  1.1  dyoung {
   3157  1.1  dyoung 	struct ath_desc *ds;
   3158  1.1  dyoung 	int i;
   3159  1.1  dyoung 
   3160  1.1  dyoung 	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
   3161  1.1  dyoung 		printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n",
   3162  1.1  dyoung 		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
   3163  1.1  dyoung 		    ds->ds_link, ds->ds_data,
   3164  1.1  dyoung 		    ds->ds_ctl0, ds->ds_ctl1,
   3165  1.1  dyoung 		    ds->ds_hw[0], ds->ds_hw[1],
   3166  1.1  dyoung 		    !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!');
   3167  1.1  dyoung 	}
   3168  1.1  dyoung }
   3169  1.1  dyoung 
   3170  1.1  dyoung static void
   3171  1.1  dyoung ath_printtxbuf(struct ath_buf *bf, int done)
   3172  1.1  dyoung {
   3173  1.1  dyoung 	struct ath_desc *ds;
   3174  1.1  dyoung 	int i;
   3175  1.1  dyoung 
   3176  1.1  dyoung 	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
   3177  1.1  dyoung 		printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n",
   3178  1.1  dyoung 		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
   3179  1.1  dyoung 		    ds->ds_link, ds->ds_data,
   3180  1.1  dyoung 		    ds->ds_ctl0, ds->ds_ctl1,
   3181  1.1  dyoung 		    ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3],
   3182  1.1  dyoung 		    !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!');
   3183  1.1  dyoung 	}
   3184  1.1  dyoung }
   3185  1.1  dyoung #endif /* AR_DEBUG */
   3186