ath.c revision 1.17
1 /* $NetBSD: ath.c,v 1.17 2003/12/07 05:09:02 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.14 2003/09/05 22:22:49 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.17 2003/12/07 05:09:02 dyoung Exp $"); 45 #endif 46 47 /* 48 * Driver for the Atheros Wireless LAN controller. 49 * 50 * This software is derived from work of Atsushi Onoe; his contribution 51 * is greatly appreciated. 52 */ 53 54 #include "opt_inet.h" 55 56 #ifdef __NetBSD__ 57 #include "bpfilter.h" 58 #endif /* __NetBSD__ */ 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/types.h> 63 #include <sys/sysctl.h> 64 #include <sys/mbuf.h> 65 #include <sys/malloc.h> 66 #include <sys/lock.h> 67 #ifdef __FreeBSD__ 68 #include <sys/mutex.h> 69 #endif 70 #include <sys/kernel.h> 71 #include <sys/socket.h> 72 #include <sys/sockio.h> 73 #include <sys/errno.h> 74 #include <sys/callout.h> 75 #ifdef __FreeBSD__ 76 #include <sys/bus.h> 77 #else 78 #include <machine/bus.h> 79 #endif 80 #include <sys/endian.h> 81 82 #include <machine/bus.h> 83 84 #include <net/if.h> 85 #include <net/if_dl.h> 86 #include <net/if_media.h> 87 #include <net/if_arp.h> 88 #ifdef __FreeBSD__ 89 #include <net/ethernet.h> 90 #else 91 #include <net/if_ether.h> 92 #endif 93 #include <net/if_llc.h> 94 95 #include <net80211/ieee80211_var.h> 96 #include <net80211/ieee80211_compat.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #endif 101 102 #ifdef INET 103 #include <netinet/in.h> 104 #endif 105 106 #include <dev/ic/athcompat.h> 107 108 #define AR_DEBUG 109 #ifdef __FreeBSD__ 110 #include <dev/ath/if_athvar.h> 111 #include <contrib/dev/ath/ah_desc.h> 112 #else 113 #include <dev/ic/athvar.h> 114 #include <../contrib/sys/dev/ic/athhal_desc.h> 115 #endif 116 117 /* unaligned little endian access */ 118 #define LE_READ_2(p) \ 119 ((u_int16_t) \ 120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 121 #define LE_READ_4(p) \ 122 ((u_int32_t) \ 123 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 124 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 125 126 #ifdef __FreeBSD__ 127 static void ath_init(void *); 128 #else 129 static int ath_init(struct ifnet *); 130 #endif 131 static int ath_init1(struct ath_softc *); 132 static int ath_intr1(struct ath_softc *); 133 static void ath_stop(struct ifnet *); 134 static void ath_start(struct ifnet *); 135 static void ath_reset(struct ath_softc *); 136 static int ath_media_change(struct ifnet *); 137 static void ath_watchdog(struct ifnet *); 138 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 139 static void ath_fatal_proc(void *, int); 140 static void ath_rxorn_proc(void *, int); 141 static void ath_bmiss_proc(void *, int); 142 static void ath_initkeytable(struct ath_softc *); 143 static void ath_mode_init(struct ath_softc *); 144 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 145 static void ath_beacon_proc(void *, int); 146 static void ath_beacon_free(struct ath_softc *); 147 static void ath_beacon_config(struct ath_softc *); 148 static int ath_desc_alloc(struct ath_softc *); 149 static void ath_desc_free(struct ath_softc *); 150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 151 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 152 static void ath_node_copy(struct ieee80211com *, 153 struct ieee80211_node *, const struct ieee80211_node *); 154 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 155 static void ath_rx_proc(void *, int); 156 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 157 struct ath_buf *, struct mbuf *); 158 static void ath_tx_proc(void *, int); 159 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 160 static void ath_draintxq(struct ath_softc *); 161 static void ath_stoprecv(struct ath_softc *); 162 static int ath_startrecv(struct ath_softc *); 163 static void ath_next_scan(void *); 164 static void ath_calibrate(void *); 165 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 166 static void ath_newassoc(struct ieee80211com *, 167 struct ieee80211_node *, int); 168 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor); 169 170 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 171 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 172 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 173 static void ath_rate_ctl(void *, struct ieee80211_node *); 174 175 #ifdef __NetBSD__ 176 int ath_enable(struct ath_softc *); 177 void ath_disable(struct ath_softc *); 178 void ath_power(int, void *); 179 #endif 180 181 #ifdef __FreeBSD__ 182 SYSCTL_DECL(_hw_ath); 183 /* XXX validate sysctl values */ 184 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 185 0, "channel dwell time (ms) for AP/station scanning"); 186 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 187 0, "chip calibration interval (secs)"); 188 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 189 0, "enable/disable outdoor operation"); 190 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 191 0, "country code"); 192 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 193 0, "regulatory domain"); 194 #endif /* __FreeBSD__ */ 195 196 static int ath_dwelltime = 200; /* 5 channels/second */ 197 static int ath_calinterval = 30; /* calibrate every 30 secs */ 198 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 199 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 200 static int ath_regdomain = 0; /* regulatory domain */ 201 202 #ifdef AR_DEBUG 203 int ath_debug = 0; 204 #ifdef __FreeBSD__ 205 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 206 0, "control debugging printfs"); 207 #endif /* __FreeBSD__ */ 208 #define IFF_DUMPPKTS(_ifp) \ 209 (ath_debug || \ 210 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 211 static void ath_printrxbuf(struct ath_buf *bf, int); 212 static void ath_printtxbuf(struct ath_buf *bf, int); 213 #define DPRINTF(X) if (ath_debug) printf X 214 #define DPRINTF2(X) if (ath_debug > 1) printf X 215 #else 216 #define IFF_DUMPPKTS(_ifp) \ 217 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 218 #define DPRINTF(X) 219 #define DPRINTF2(X) 220 #endif 221 222 #ifdef __NetBSD__ 223 int 224 ath_activate(struct device *self, enum devact act) 225 { 226 struct ath_softc *sc = (struct ath_softc *)self; 227 int rv = 0, s; 228 229 s = splnet(); 230 switch (act) { 231 case DVACT_ACTIVATE: 232 rv = EOPNOTSUPP; 233 break; 234 case DVACT_DEACTIVATE: 235 if_deactivate(&sc->sc_ic.ic_if); 236 break; 237 } 238 splx(s); 239 return rv; 240 } 241 242 int 243 ath_enable(struct ath_softc *sc) 244 { 245 if (ATH_IS_ENABLED(sc) == 0) { 246 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 247 printf("%s: device enable failed\n", 248 sc->sc_dev.dv_xname); 249 return (EIO); 250 } 251 sc->sc_flags |= ATH_ENABLED; 252 } 253 return (0); 254 } 255 256 void 257 ath_disable(struct ath_softc *sc) 258 { 259 if (!ATH_IS_ENABLED(sc)) 260 return; 261 if (sc->sc_disable != NULL) 262 (*sc->sc_disable)(sc); 263 sc->sc_flags &= ~ATH_ENABLED; 264 } 265 #endif /* #ifdef __NetBSD__ */ 266 267 int 268 ath_attach(u_int16_t devid, struct ath_softc *sc) 269 { 270 struct ieee80211com *ic = &sc->sc_ic; 271 struct ifnet *ifp = &ic->ic_if; 272 struct ath_hal *ah; 273 HAL_STATUS status; 274 int error = 0; 275 276 DPRINTF(("ath_attach: devid 0x%x\n", devid)); 277 278 #ifdef __FreeBSD__ 279 /* set these up early for if_printf use */ 280 ifp->if_unit = device_get_unit(sc->sc_dev); 281 ifp->if_name = "ath"; 282 #else 283 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 284 #endif 285 286 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 287 if (ah == NULL) { 288 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 289 status); 290 error = ENXIO; 291 goto bad; 292 } 293 sc->sc_ah = ah; 294 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 295 296 /* 297 * Collect the channel list using the default country 298 * code and including outdoor channels. The 802.11 layer 299 * is resposible for filtering this list based on settings 300 * like the phy mode. 301 */ 302 error = ath_getchannels(sc, ath_countrycode, ath_outdoor); 303 if (error != 0) 304 goto bad; 305 /* 306 * Copy these back; they are set as a side effect 307 * of constructing the channel list. 308 */ 309 ath_regdomain = ath_hal_getregdomain(ah); 310 ath_countrycode = ath_hal_getcountrycode(ah); 311 312 /* 313 * Setup rate tables for all potential media types. 314 */ 315 ath_rate_setup(sc, IEEE80211_MODE_11A); 316 ath_rate_setup(sc, IEEE80211_MODE_11B); 317 ath_rate_setup(sc, IEEE80211_MODE_11G); 318 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 319 320 error = ath_desc_alloc(sc); 321 if (error != 0) { 322 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 323 goto bad; 324 } 325 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 326 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 327 328 #ifdef __FreeBSD__ 329 mtx_init(&sc->sc_txbuflock, 330 device_get_nameunit(sc->sc_dev), "xmit buf q", MTX_DEF); 331 mtx_init(&sc->sc_txqlock, 332 device_get_nameunit(sc->sc_dev), "xmit q", MTX_DEF); 333 #endif 334 335 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 336 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 337 ATH_TASK_INIT(&sc->sc_swbatask, ath_beacon_proc, sc); 338 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 339 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 340 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 341 342 /* 343 * For now just pre-allocate one data queue and one 344 * beacon queue. Note that the HAL handles resetting 345 * them at the needed time. Eventually we'll want to 346 * allocate more tx queues for splitting management 347 * frames and for QOS support. 348 */ 349 sc->sc_txhalq = ath_hal_setuptxqueue(ah, 350 HAL_TX_QUEUE_DATA, 351 AH_TRUE /* enable interrupts */ 352 ); 353 if (sc->sc_txhalq == (u_int) -1) { 354 if_printf(ifp, "unable to setup a data xmit queue!\n"); 355 goto bad; 356 } 357 sc->sc_bhalq = ath_hal_setuptxqueue(ah, 358 HAL_TX_QUEUE_BEACON, 359 AH_TRUE /* enable interrupts */ 360 ); 361 if (sc->sc_bhalq == (u_int) -1) { 362 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 363 goto bad; 364 } 365 366 ifp->if_softc = sc; 367 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 368 ifp->if_start = ath_start; 369 ifp->if_watchdog = ath_watchdog; 370 ifp->if_ioctl = ath_ioctl; 371 ifp->if_init = ath_init; 372 #ifdef __FreeBSD__ 373 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 374 #else 375 #if 0 376 ifp->if_stop = ath_stop; /* XXX */ 377 #endif 378 IFQ_SET_READY(&ifp->if_snd); 379 #endif 380 381 ic->ic_softc = sc; 382 ic->ic_newassoc = ath_newassoc; 383 /* XXX not right but it's not used anywhere important */ 384 ic->ic_phytype = IEEE80211_T_OFDM; 385 ic->ic_opmode = IEEE80211_M_STA; 386 ic->ic_caps = IEEE80211_C_WEP | IEEE80211_C_IBSS | IEEE80211_C_HOSTAP 387 | IEEE80211_C_MONITOR; 388 /* NB: 11g support is identified when we fetch the channel set */ 389 if (sc->sc_have11g) 390 ic->ic_caps |= IEEE80211_C_SHPREAMBLE; 391 392 /* get mac address from hardware */ 393 ath_hal_getmac(ah, ic->ic_myaddr); 394 395 #ifdef __NetBSD__ 396 if_attach(ifp); 397 #endif 398 /* call MI attach routine. */ 399 ieee80211_ifattach(ifp); 400 /* override default methods */ 401 ic->ic_node_alloc = ath_node_alloc; 402 ic->ic_node_free = ath_node_free; 403 ic->ic_node_copy = ath_node_copy; 404 sc->sc_newstate = ic->ic_newstate; 405 ic->ic_newstate = ath_newstate; 406 /* complete initialization */ 407 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 408 409 #if NBPFILTER > 0 410 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 411 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 412 &sc->sc_drvbpf); 413 #endif 414 /* 415 * Initialize constant fields. 416 * 417 * NB: the channel is setup each time we transition to the 418 * RUN state to avoid filling it in for each frame. 419 */ 420 sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th); 421 sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT; 422 423 sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th); 424 sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT; 425 426 if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr)); 427 428 #ifdef __NetBSD__ 429 sc->sc_flags |= ATH_ATTACHED; 430 /* 431 * Make sure the interface is shutdown during reboot. 432 */ 433 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 434 if (sc->sc_sdhook == NULL) 435 printf("%s: WARNING: unable to establish shutdown hook\n", 436 sc->sc_dev.dv_xname); 437 sc->sc_powerhook = powerhook_establish(ath_power, sc); 438 if (sc->sc_powerhook == NULL) 439 printf("%s: WARNING: unable to establish power hook\n", 440 sc->sc_dev.dv_xname); 441 #endif 442 return 0; 443 bad: 444 if (ah) 445 ath_hal_detach(ah); 446 sc->sc_invalid = 1; 447 return error; 448 } 449 450 int 451 ath_detach(struct ath_softc *sc) 452 { 453 struct ifnet *ifp = &sc->sc_ic.ic_if; 454 ath_softc_critsect_decl(s); 455 456 DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags)); 457 if ((sc->sc_flags & ATH_ATTACHED) == 0) 458 return (0); 459 460 ath_softc_critsect_begin(sc, s); 461 ath_stop(ifp); 462 #if NBPFILTER > 0 463 bpfdetach(ifp); 464 #endif 465 ath_desc_free(sc); 466 ath_hal_detach(sc->sc_ah); 467 ieee80211_ifdetach(ifp); 468 #ifdef __NetBSD__ 469 if_detach(ifp); 470 #endif 471 ath_softc_critsect_end(sc, s); 472 #ifdef __NetBSD__ 473 powerhook_disestablish(sc->sc_powerhook); 474 shutdownhook_disestablish(sc->sc_sdhook); 475 #endif 476 return 0; 477 } 478 479 #ifdef __NetBSD__ 480 void 481 ath_power(int why, void *arg) 482 { 483 struct ath_softc *sc = arg; 484 int s; 485 486 DPRINTF(("ath_power(%d)\n", why)); 487 488 s = splnet(); 489 switch (why) { 490 case PWR_SUSPEND: 491 case PWR_STANDBY: 492 ath_suspend(sc, why); 493 break; 494 case PWR_RESUME: 495 ath_resume(sc, why); 496 break; 497 case PWR_SOFTSUSPEND: 498 case PWR_SOFTSTANDBY: 499 case PWR_SOFTRESUME: 500 break; 501 } 502 splx(s); 503 } 504 #endif 505 506 void 507 ath_suspend(struct ath_softc *sc, int why) 508 { 509 struct ifnet *ifp = &sc->sc_ic.ic_if; 510 511 DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags)); 512 513 ath_stop(ifp); 514 if (sc->sc_power != NULL) 515 (*sc->sc_power)(sc, why); 516 } 517 518 void 519 ath_resume(struct ath_softc *sc, int why) 520 { 521 struct ifnet *ifp = &sc->sc_ic.ic_if; 522 523 DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags)); 524 525 if (ifp->if_flags & IFF_UP) { 526 ath_init(ifp); 527 #if 0 528 (void)ath_intr(sc); 529 #endif 530 if (sc->sc_power != NULL) 531 (*sc->sc_power)(sc, why); 532 if (ifp->if_flags & IFF_RUNNING) 533 ath_start(ifp); 534 } 535 } 536 537 #ifdef __NetBSD__ 538 void 539 ath_shutdown(void *arg) 540 { 541 struct ath_softc *sc = arg; 542 543 ath_stop(&sc->sc_ic.ic_if); 544 } 545 #else 546 void 547 ath_shutdown(struct ath_softc *sc) 548 { 549 #if 1 550 return; 551 #else 552 struct ifnet *ifp = &sc->sc_ic.ic_if; 553 554 DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags)); 555 556 ath_stop(ifp); 557 #endif 558 } 559 #endif 560 561 #ifdef __NetBSD__ 562 int 563 ath_intr(void *arg) 564 { 565 return ath_intr1((struct ath_softc *)arg); 566 } 567 #else 568 void 569 ath_intr(void *arg) 570 { 571 (void)ath_intr1((struct ath_softc *)arg); 572 } 573 #endif 574 575 static int 576 ath_intr1(struct ath_softc *sc) 577 { 578 struct ieee80211com *ic = &sc->sc_ic; 579 struct ifnet *ifp = &ic->ic_if; 580 struct ath_hal *ah = sc->sc_ah; 581 HAL_INT status; 582 583 if (sc->sc_invalid) { 584 /* 585 * The hardware is not ready/present, don't touch anything. 586 * Note this can happen early on if the IRQ is shared. 587 */ 588 DPRINTF(("ath_intr: invalid; ignored\n")); 589 return 0; 590 } 591 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 592 DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags)); 593 ath_hal_getisr(ah, &status); /* clear ISR */ 594 ath_hal_intrset(ah, 0); /* disable further intr's */ 595 return 1; /* XXX */ 596 } 597 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 598 DPRINTF2(("ath_intr: status 0x%x\n", status)); 599 #ifdef AR_DEBUG 600 if (ath_debug && 601 (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) { 602 if_printf(ifp, "ath_intr: status 0x%x\n", status); 603 ath_hal_dumpstate(ah); 604 } 605 #endif /* AR_DEBUG */ 606 if (status & HAL_INT_FATAL) { 607 sc->sc_stats.ast_hardware++; 608 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 609 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 610 } else if (status & HAL_INT_RXORN) { 611 sc->sc_stats.ast_rxorn++; 612 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 613 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 614 } else { 615 if (status & HAL_INT_RXEOL) { 616 /* 617 * NB: the hardware should re-read the link when 618 * RXE bit is written, but it doesn't work at 619 * least on older hardware revs. 620 */ 621 sc->sc_stats.ast_rxeol++; 622 sc->sc_rxlink = NULL; 623 } 624 if (status & HAL_INT_TXURN) { 625 sc->sc_stats.ast_txurn++; 626 /* bump tx trigger level */ 627 ath_hal_updatetxtriglevel(ah, AH_TRUE); 628 } 629 if (status & HAL_INT_RX) 630 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 631 if (status & HAL_INT_TX) 632 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 633 if (status & HAL_INT_SWBA) 634 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_swbatask); 635 if (status & HAL_INT_BMISS) { 636 sc->sc_stats.ast_bmiss++; 637 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 638 } 639 } 640 return 1; 641 } 642 643 static void 644 ath_fatal_proc(void *arg, int pending) 645 { 646 struct ath_softc *sc = arg; 647 648 device_printf(sc->sc_dev, "hardware error; resetting\n"); 649 ath_reset(sc); 650 } 651 652 static void 653 ath_rxorn_proc(void *arg, int pending) 654 { 655 struct ath_softc *sc = arg; 656 657 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 658 ath_reset(sc); 659 } 660 661 static void 662 ath_bmiss_proc(void *arg, int pending) 663 { 664 struct ath_softc *sc = arg; 665 struct ieee80211com *ic = &sc->sc_ic; 666 667 DPRINTF(("ath_bmiss_proc: pending %u\n", pending)); 668 if (ic->ic_opmode != IEEE80211_M_STA) 669 return; 670 if (ic->ic_state == IEEE80211_S_RUN) 671 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 672 } 673 674 static u_int 675 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 676 { 677 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 678 679 switch (mode) { 680 case IEEE80211_MODE_AUTO: 681 return 0; 682 case IEEE80211_MODE_11A: 683 return CHANNEL_A; 684 case IEEE80211_MODE_11B: 685 return CHANNEL_B; 686 case IEEE80211_MODE_11G: 687 return CHANNEL_PUREG; 688 case IEEE80211_MODE_TURBO: 689 return CHANNEL_T; 690 default: 691 panic("%s: unsupported mode %d\n", __func__, mode); 692 return 0; 693 } 694 } 695 696 #ifdef __NetBSD__ 697 static int 698 ath_init(struct ifnet *ifp) 699 { 700 return ath_init1((struct ath_softc *)ifp->if_softc); 701 } 702 #else 703 static void 704 ath_init(void *arg) 705 { 706 (void)ath_init1((struct ath_softc *)arg); 707 } 708 #endif 709 710 static int 711 ath_init1(struct ath_softc *sc) 712 { 713 struct ieee80211com *ic = &sc->sc_ic; 714 struct ifnet *ifp = &ic->ic_if; 715 struct ieee80211_node *ni; 716 enum ieee80211_phymode mode; 717 struct ath_hal *ah = sc->sc_ah; 718 HAL_STATUS status; 719 HAL_CHANNEL hchan; 720 int error = 0; 721 ath_softc_critsect_decl(s); 722 723 DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags)); 724 725 #ifdef __NetBSD__ 726 if ((error = ath_enable(sc)) != 0) 727 return error; 728 #endif 729 730 ath_softc_critsect_begin(sc, s); 731 /* 732 * Stop anything previously setup. This is safe 733 * whether this is the first time through or not. 734 */ 735 ath_stop(ifp); 736 737 /* 738 * The basic interface to setting the hardware in a good 739 * state is ``reset''. On return the hardware is known to 740 * be powered up and with interrupts disabled. This must 741 * be followed by initialization of the appropriate bits 742 * and then setup of the interrupt mask. 743 */ 744 hchan.channel = ic->ic_ibss_chan->ic_freq; 745 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 746 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 747 if_printf(ifp, "unable to reset hardware; hal status %u\n", 748 status); 749 error = -1; 750 goto done; 751 } 752 753 /* 754 * Setup the hardware after reset: the key cache 755 * is filled as needed and the receive engine is 756 * set going. Frame transmit is handled entirely 757 * in the frame output path; there's nothing to do 758 * here except setup the interrupt mask. 759 */ 760 if (ic->ic_flags & IEEE80211_F_WEPON) 761 ath_initkeytable(sc); 762 if ((error = ath_startrecv(sc)) != 0) { 763 if_printf(ifp, "unable to start recv logic\n"); 764 goto done; 765 } 766 767 /* 768 * Enable interrupts. 769 */ 770 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 771 | HAL_INT_RXEOL | HAL_INT_RXORN 772 | HAL_INT_FATAL | HAL_INT_GLOBAL; 773 ath_hal_intrset(ah, sc->sc_imask); 774 775 ifp->if_flags |= IFF_RUNNING; 776 ic->ic_state = IEEE80211_S_INIT; 777 778 /* 779 * The hardware should be ready to go now so it's safe 780 * to kick the 802.11 state machine as it's likely to 781 * immediately call back to us to send mgmt frames. 782 */ 783 ni = ic->ic_bss; 784 ni->ni_chan = ic->ic_ibss_chan; 785 mode = ieee80211_chan2mode(ic, ni->ni_chan); 786 if (mode != sc->sc_curmode) 787 ath_setcurmode(sc, mode); 788 if (ic->ic_opmode != IEEE80211_M_MONITOR) 789 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 790 else 791 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 792 done: 793 ath_softc_critsect_end(sc, s); 794 return error; 795 } 796 797 static void 798 ath_stop(struct ifnet *ifp) 799 { 800 struct ieee80211com *ic = (struct ieee80211com *) ifp; 801 struct ath_softc *sc = ifp->if_softc; 802 struct ath_hal *ah = sc->sc_ah; 803 ath_softc_critsect_decl(s); 804 805 DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n", 806 sc->sc_invalid, ifp->if_flags)); 807 808 ath_softc_critsect_begin(sc, s); 809 if (ifp->if_flags & IFF_RUNNING) { 810 /* 811 * Shutdown the hardware and driver: 812 * disable interrupts 813 * turn off timers 814 * clear transmit machinery 815 * clear receive machinery 816 * drain and release tx queues 817 * reclaim beacon resources 818 * reset 802.11 state machine 819 * power down hardware 820 * 821 * Note that some of this work is not possible if the 822 * hardware is gone (invalid). 823 */ 824 ifp->if_flags &= ~IFF_RUNNING; 825 ifp->if_timer = 0; 826 if (!sc->sc_invalid) 827 ath_hal_intrset(ah, 0); 828 ath_draintxq(sc); 829 if (!sc->sc_invalid) 830 ath_stoprecv(sc); 831 else 832 sc->sc_rxlink = NULL; 833 #ifdef __FreeBSD__ 834 IF_DRAIN(&ifp->if_snd); 835 #else 836 IF_PURGE(&ifp->if_snd); 837 #endif 838 ath_beacon_free(sc); 839 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 840 if (!sc->sc_invalid) { 841 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 842 } 843 #ifdef __NetBSD__ 844 ath_disable(sc); 845 #endif 846 } 847 ath_softc_critsect_end(sc, s); 848 } 849 850 /* 851 * Reset the hardware w/o losing operational state. This is 852 * basically a more efficient way of doing ath_stop, ath_init, 853 * followed by state transitions to the current 802.11 854 * operational state. Used to recover from errors rx overrun 855 * and to reset the hardware when rf gain settings must be reset. 856 */ 857 static void 858 ath_reset(struct ath_softc *sc) 859 { 860 struct ieee80211com *ic = &sc->sc_ic; 861 struct ifnet *ifp = &ic->ic_if; 862 struct ath_hal *ah = sc->sc_ah; 863 struct ieee80211_channel *c; 864 HAL_STATUS status; 865 HAL_CHANNEL hchan; 866 867 /* 868 * Convert to a HAL channel description with the flags 869 * constrained to reflect the current operating mode. 870 */ 871 c = ic->ic_ibss_chan; 872 hchan.channel = c->ic_freq; 873 hchan.channelFlags = ath_chan2flags(ic, c); 874 875 ath_hal_intrset(ah, 0); /* disable interrupts */ 876 ath_draintxq(sc); /* stop xmit side */ 877 ath_stoprecv(sc); /* stop recv side */ 878 /* NB: indicate channel change so we do a full reset */ 879 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 880 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 881 __func__, status); 882 ath_hal_intrset(ah, sc->sc_imask); 883 if (ath_startrecv(sc) != 0) /* restart recv */ 884 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 885 ath_start(ifp); /* restart xmit */ 886 if (ic->ic_state == IEEE80211_S_RUN) 887 ath_beacon_config(sc); /* restart beacons */ 888 } 889 890 static void 891 ath_start(struct ifnet *ifp) 892 { 893 struct ath_softc *sc = ifp->if_softc; 894 struct ath_hal *ah = sc->sc_ah; 895 struct ieee80211com *ic = &sc->sc_ic; 896 struct ieee80211_node *ni; 897 struct ath_buf *bf; 898 struct mbuf *m; 899 struct ieee80211_frame *wh; 900 ath_txbuf_critsect_decl(s); 901 902 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 903 return; 904 for (;;) { 905 /* 906 * Grab a TX buffer and associated resources. 907 */ 908 ath_txbuf_critsect_begin(sc, s); 909 bf = TAILQ_FIRST(&sc->sc_txbuf); 910 if (bf != NULL) 911 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 912 ath_txbuf_critsect_end(sc, s); 913 if (bf == NULL) { 914 DPRINTF(("ath_start: out of xmit buffers\n")); 915 sc->sc_stats.ast_tx_qstop++; 916 ifp->if_flags |= IFF_OACTIVE; 917 break; 918 } 919 /* 920 * Poll the management queue for frames; they 921 * have priority over normal data frames. 922 */ 923 IF_DEQUEUE(&ic->ic_mgtq, m); 924 if (m == NULL) { 925 /* 926 * No data frames go out unless we're associated. 927 */ 928 if (ic->ic_state != IEEE80211_S_RUN) { 929 DPRINTF(("ath_start: ignore data packet, " 930 "state %u\n", ic->ic_state)); 931 sc->sc_stats.ast_tx_discard++; 932 ath_txbuf_critsect_begin(sc, s); 933 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 934 ath_txbuf_critsect_end(sc, s); 935 break; 936 } 937 IF_DEQUEUE(&ifp->if_snd, m); 938 if (m == NULL) { 939 ath_txbuf_critsect_begin(sc, s); 940 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 941 ath_txbuf_critsect_end(sc, s); 942 break; 943 } 944 ifp->if_opackets++; 945 946 #ifdef __NetBSD__ 947 #if NBPFILTER > 0 948 if (ifp->if_bpf) 949 bpf_mtap(ifp->if_bpf, m); 950 #endif 951 #endif 952 #ifdef __FreeBSD__ 953 BPF_MTAP(ifp, m); 954 #endif 955 /* 956 * Encapsulate the packet in prep for transmission. 957 */ 958 m = ieee80211_encap(ifp, m, &ni); 959 if (m == NULL) { 960 DPRINTF(("ath_start: encapsulation failure\n")); 961 sc->sc_stats.ast_tx_encap++; 962 goto bad; 963 } 964 wh = mtod(m, struct ieee80211_frame *); 965 if (ic->ic_flags & IEEE80211_F_WEPON) 966 wh->i_fc[1] |= IEEE80211_FC1_WEP; 967 } else { 968 /* 969 * Hack! The referenced node pointer is in the 970 * rcvif field of the packet header. This is 971 * placed there by ieee80211_mgmt_output because 972 * we need to hold the reference with the frame 973 * and there's no other way (other than packet 974 * tags which we consider too expensive to use) 975 * to pass it along. 976 */ 977 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 978 m->m_pkthdr.rcvif = NULL; 979 980 wh = mtod(m, struct ieee80211_frame *); 981 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 982 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 983 /* fill time stamp */ 984 u_int64_t tsf; 985 u_int32_t *tstamp; 986 987 tsf = ath_hal_gettsf64(ah); 988 /* XXX: adjust 100us delay to xmit */ 989 tsf += 100; 990 tstamp = (u_int32_t *)&wh[1]; 991 tstamp[0] = htole32(tsf & 0xffffffff); 992 tstamp[1] = htole32(tsf >> 32); 993 } 994 sc->sc_stats.ast_tx_mgmt++; 995 } 996 #if NBPFILTER > 0 997 if (ic->ic_rawbpf) 998 bpf_mtap(ic->ic_rawbpf, m); 999 #endif 1000 1001 #if NBPFILTER > 0 1002 if (sc->sc_drvbpf) { 1003 #ifdef __FreeBSD__ 1004 struct mbuf *mb; 1005 1006 MGETHDR(mb, M_DONTWAIT, m->m_type); 1007 if (mb != NULL) { 1008 sc->sc_tx_th.wt_rate = 1009 ni->ni_rates.rs_rates[ni->ni_txrate]; 1010 1011 mb->m_next = m; 1012 mb->m_data = (caddr_t)&sc->sc_tx_th; 1013 mb->m_len = sizeof(sc->sc_tx_th); 1014 mb->m_pkthdr.len += mb->m_len; 1015 bpf_mtap(sc->sc_drvbpf, mb); 1016 m_free(mb); 1017 } 1018 #else 1019 struct mbuf mb; 1020 1021 M_COPY_PKTHDR(&mb, m); 1022 sc->sc_tx_th.wt_rate = 1023 ni->ni_rates.rs_rates[ni->ni_txrate]; 1024 1025 mb.m_next = m; 1026 mb.m_data = (caddr_t)&sc->sc_tx_th; 1027 mb.m_len = sizeof(sc->sc_tx_th); 1028 mb.m_pkthdr.len += mb.m_len; 1029 bpf_mtap(sc->sc_drvbpf, &mb); 1030 #endif 1031 } 1032 #endif 1033 1034 /* 1035 * TODO: 1036 * The duration field of 802.11 header should be filled. 1037 * XXX This may be done in the ieee80211 layer, but the upper 1038 * doesn't know the detail of parameters such as IFS 1039 * for now.. 1040 */ 1041 if (ath_tx_start(sc, ni, bf, m)) { 1042 bad: 1043 ath_txbuf_critsect_begin(sc, s); 1044 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1045 ath_txbuf_critsect_end(sc, s); 1046 ifp->if_oerrors++; 1047 if (ni && ni != ic->ic_bss) 1048 ieee80211_free_node(ic, ni); 1049 continue; 1050 } 1051 1052 sc->sc_tx_timer = 5; 1053 ifp->if_timer = 1; 1054 } 1055 } 1056 1057 static int 1058 ath_media_change(struct ifnet *ifp) 1059 { 1060 int error; 1061 1062 error = ieee80211_media_change(ifp); 1063 if (error == ENETRESET) { 1064 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1065 (IFF_RUNNING|IFF_UP)) 1066 ath_init(ifp); /* XXX lose error */ 1067 error = 0; 1068 } 1069 return error; 1070 } 1071 1072 static void 1073 ath_watchdog(struct ifnet *ifp) 1074 { 1075 struct ath_softc *sc = ifp->if_softc; 1076 struct ieee80211com *ic = &sc->sc_ic; 1077 1078 ifp->if_timer = 0; 1079 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1080 return; 1081 if (sc->sc_tx_timer) { 1082 if (--sc->sc_tx_timer == 0) { 1083 if_printf(ifp, "device timeout\n"); 1084 #ifdef AR_DEBUG 1085 if (ath_debug) 1086 ath_hal_dumpstate(sc->sc_ah); 1087 #endif /* AR_DEBUG */ 1088 ath_init(ifp); /* XXX ath_reset??? */ 1089 ifp->if_oerrors++; 1090 sc->sc_stats.ast_watchdog++; 1091 return; 1092 } 1093 ifp->if_timer = 1; 1094 } 1095 if (ic->ic_fixed_rate == -1) { 1096 /* 1097 * Run the rate control algorithm if we're not 1098 * locked at a fixed rate. 1099 */ 1100 if (ic->ic_opmode == IEEE80211_M_STA) 1101 ath_rate_ctl(sc, ic->ic_bss); 1102 else 1103 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1104 } 1105 ieee80211_watchdog(ifp); 1106 } 1107 1108 static int 1109 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1110 { 1111 struct ath_softc *sc = ifp->if_softc; 1112 struct ifreq *ifr = (struct ifreq *)data; 1113 int error = 0; 1114 ath_softc_critsect_decl(s); 1115 1116 ath_softc_critsect_begin(sc, s); 1117 switch (cmd) { 1118 case SIOCSIFFLAGS: 1119 if (ifp->if_flags & IFF_UP) { 1120 if (ifp->if_flags & IFF_RUNNING) { 1121 /* 1122 * To avoid rescanning another access point, 1123 * do not call ath_init() here. Instead, 1124 * only reflect promisc mode settings. 1125 */ 1126 ath_mode_init(sc); 1127 } else 1128 ath_init(ifp); /* XXX lose error */ 1129 } else 1130 ath_stop(ifp); 1131 break; 1132 case SIOCADDMULTI: 1133 case SIOCDELMULTI: 1134 #ifdef __FreeBSD__ 1135 /* 1136 * The upper layer has already installed/removed 1137 * the multicast address(es), just recalculate the 1138 * multicast filter for the card. 1139 */ 1140 if (ifp->if_flags & IFF_RUNNING) 1141 ath_mode_init(sc); 1142 #endif 1143 #ifdef __NetBSD__ 1144 error = (cmd == SIOCADDMULTI) ? 1145 ether_addmulti(ifr, &sc->sc_ic.ic_ec) : 1146 ether_delmulti(ifr, &sc->sc_ic.ic_ec); 1147 if (error == ENETRESET) { 1148 if (ifp->if_flags & IFF_RUNNING) 1149 ath_mode_init(sc); 1150 error = 0; 1151 } 1152 #endif 1153 break; 1154 case SIOCGATHSTATS: 1155 copyout(&sc->sc_stats, ifr->ifr_data, sizeof (sc->sc_stats)); 1156 break; 1157 default: 1158 error = ieee80211_ioctl(ifp, cmd, data); 1159 if (error == ENETRESET) { 1160 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1161 (IFF_RUNNING|IFF_UP)) 1162 ath_init(ifp); /* XXX lose error */ 1163 error = 0; 1164 } 1165 break; 1166 } 1167 ath_softc_critsect_end(sc, s); 1168 return error; 1169 } 1170 1171 /* 1172 * Fill the hardware key cache with key entries. 1173 */ 1174 static void 1175 ath_initkeytable(struct ath_softc *sc) 1176 { 1177 struct ieee80211com *ic = &sc->sc_ic; 1178 struct ath_hal *ah = sc->sc_ah; 1179 int i; 1180 1181 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1182 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1183 if (k->wk_len == 0) 1184 ath_hal_keyreset(ah, i); 1185 else 1186 /* XXX return value */ 1187 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 1188 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 1189 } 1190 } 1191 1192 static void 1193 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1194 { 1195 u_int32_t val; 1196 u_int8_t pos; 1197 1198 val = LE_READ_4(dl + 0); 1199 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1200 val = LE_READ_4(dl + 3); 1201 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1202 pos &= 0x3f; 1203 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1204 } 1205 1206 #ifdef __FreeBSD__ 1207 static void 1208 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1209 { 1210 struct ieee80211com *ic = &sc->sc_ic; 1211 struct ifnet *ifp = &ic->ic_if; 1212 struct ifmultiaddr *ifma; 1213 1214 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1215 caddr_t dl; 1216 1217 /* calculate XOR of eight 6bit values */ 1218 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1219 ath_mcastfilter_accum(dl, &mfilt); 1220 } 1221 } 1222 #else 1223 static void 1224 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1225 { 1226 struct ifnet *ifp = &sc->sc_ic.ic_if; 1227 struct ether_multi *enm; 1228 struct ether_multistep estep; 1229 1230 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1231 while (enm != NULL) { 1232 /* XXX Punt on ranges. */ 1233 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1234 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1235 ifp->if_flags |= IFF_ALLMULTI; 1236 return; 1237 } 1238 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1239 ETHER_NEXT_MULTI(estep, enm); 1240 } 1241 ifp->if_flags &= ~IFF_ALLMULTI; 1242 } 1243 #endif 1244 1245 static void 1246 ath_mode_init(struct ath_softc *sc) 1247 { 1248 struct ieee80211com *ic = &sc->sc_ic; 1249 struct ath_hal *ah = sc->sc_ah; 1250 struct ifnet *ifp = &ic->ic_if; 1251 u_int32_t rfilt, mfilt[2]; 1252 1253 /* configure operational mode */ 1254 ath_hal_setopmode(ah, ic->ic_opmode); 1255 1256 /* receive filter */ 1257 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1258 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1259 if (ic->ic_opmode != IEEE80211_M_STA) 1260 rfilt |= HAL_RX_FILTER_PROBEREQ; 1261 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 1262 (ifp->if_flags & IFF_PROMISC)) 1263 rfilt |= HAL_RX_FILTER_PROM; 1264 if (ic->ic_state == IEEE80211_S_SCAN) 1265 rfilt |= HAL_RX_FILTER_BEACON; 1266 ath_hal_setrxfilter(ah, rfilt); 1267 1268 /* calculate and install multicast filter */ 1269 #ifdef __FreeBSD__ 1270 if ((ifp->if_flags & IFF_ALLMULTI) == 0) { 1271 mfilt[0] = mfilt[1] = 0; 1272 ath_mcastfilter_compute(sc, &mfilt); 1273 } else { 1274 mfilt[0] = mfilt[1] = ~0; 1275 } 1276 #endif 1277 #ifdef __NetBSD__ 1278 mfilt[0] = mfilt[1] = 0; 1279 ath_mcastfilter_compute(sc, &mfilt); 1280 #endif 1281 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1282 DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n", 1283 rfilt, mfilt[0], mfilt[1])); 1284 } 1285 1286 #ifdef __FreeBSD__ 1287 static void 1288 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1289 { 1290 struct ath_buf *bf = arg; 1291 1292 KASSERT(nseg <= ATH_MAX_SCATTER, 1293 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1294 bf->bf_mapsize = mapsize; 1295 bf->bf_nseg = nseg; 1296 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1297 } 1298 #endif /* __FreeBSD__ */ 1299 1300 static struct mbuf * 1301 ath_getmbuf(int flags, int type, u_int pktlen) 1302 { 1303 struct mbuf *m; 1304 1305 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1306 #ifdef __FreeBSD__ 1307 if (pktlen <= MHLEN) 1308 MGETHDR(m, flags, type); 1309 else 1310 m = m_getcl(flags, type, M_PKTHDR); 1311 #else 1312 MGETHDR(m, flags, type); 1313 if (m != NULL && pktlen > MHLEN) 1314 MCLGET(m, flags); 1315 #endif 1316 return m; 1317 } 1318 1319 static int 1320 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1321 { 1322 struct ieee80211com *ic = &sc->sc_ic; 1323 struct ifnet *ifp = &ic->ic_if; 1324 struct ath_hal *ah = sc->sc_ah; 1325 struct ieee80211_frame *wh; 1326 struct ath_buf *bf; 1327 struct ath_desc *ds; 1328 struct mbuf *m; 1329 int error, pktlen; 1330 u_int8_t *frm, rate; 1331 u_int16_t capinfo; 1332 struct ieee80211_rateset *rs; 1333 const HAL_RATE_TABLE *rt; 1334 1335 bf = sc->sc_bcbuf; 1336 if (bf->bf_m != NULL) { 1337 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1338 m_freem(bf->bf_m); 1339 bf->bf_m = NULL; 1340 bf->bf_node = NULL; 1341 } 1342 /* 1343 * NB: the beacon data buffer must be 32-bit aligned; 1344 * we assume the mbuf routines will return us something 1345 * with this alignment (perhaps should assert). 1346 */ 1347 rs = &ni->ni_rates; 1348 pktlen = sizeof (struct ieee80211_frame) 1349 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 6; 1350 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1351 pktlen += 2; 1352 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1353 if (m == NULL) { 1354 DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n", 1355 pktlen)); 1356 sc->sc_stats.ast_be_nombuf++; 1357 return ENOMEM; 1358 } 1359 1360 wh = mtod(m, struct ieee80211_frame *); 1361 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1362 IEEE80211_FC0_SUBTYPE_BEACON; 1363 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1364 *(u_int16_t *)wh->i_dur = 0; 1365 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1366 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1367 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1368 *(u_int16_t *)wh->i_seq = 0; 1369 1370 /* 1371 * beacon frame format 1372 * [8] time stamp 1373 * [2] beacon interval 1374 * [2] cabability information 1375 * [tlv] ssid 1376 * [tlv] supported rates 1377 * [tlv] parameter set (IBSS) 1378 * [tlv] extended supported rates 1379 */ 1380 frm = (u_int8_t *)&wh[1]; 1381 memset(frm, 0, 8); /* timestamp is set by hardware */ 1382 frm += 8; 1383 *(u_int16_t *)frm = htole16(ni->ni_intval); 1384 frm += 2; 1385 if (ic->ic_opmode == IEEE80211_M_IBSS) 1386 capinfo = IEEE80211_CAPINFO_IBSS; 1387 else 1388 capinfo = IEEE80211_CAPINFO_ESS; 1389 if (ic->ic_flags & IEEE80211_F_WEPON) 1390 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1391 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1392 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1393 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1394 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1395 *(u_int16_t *)frm = htole16(capinfo); 1396 frm += 2; 1397 *frm++ = IEEE80211_ELEMID_SSID; 1398 *frm++ = ni->ni_esslen; 1399 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1400 frm += ni->ni_esslen; 1401 frm = ieee80211_add_rates(frm, rs); 1402 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1403 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1404 *frm++ = 2; 1405 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1406 } else { 1407 /* TODO: TIM */ 1408 *frm++ = IEEE80211_ELEMID_TIM; 1409 *frm++ = 4; /* length */ 1410 *frm++ = 0; /* DTIM count */ 1411 *frm++ = 1; /* DTIM period */ 1412 *frm++ = 0; /* bitmap control */ 1413 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1414 } 1415 frm = ieee80211_add_xrates(frm, rs); 1416 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1417 KASSERT(m->m_pkthdr.len <= pktlen, 1418 ("beacon bigger than expected, len %u calculated %u", 1419 m->m_pkthdr.len, pktlen)); 1420 1421 DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len)); 1422 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1423 if (error != 0) { 1424 m_freem(m); 1425 return error; 1426 } 1427 KASSERT(bf->bf_nseg == 1, 1428 ("ath_beacon_alloc: multi-segment packet; nseg %u", 1429 bf->bf_nseg)); 1430 bf->bf_m = m; 1431 1432 /* setup descriptors */ 1433 ds = bf->bf_desc; 1434 1435 ds->ds_link = 0; 1436 ds->ds_data = bf->bf_segs[0].ds_addr; 1437 1438 DPRINTF2(("%s: segaddr %p seglen %u\n", __func__, 1439 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1440 1441 /* 1442 * Calculate rate code. 1443 * XXX everything at min xmit rate 1444 */ 1445 rt = sc->sc_currates; 1446 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1447 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1448 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1449 else 1450 rate = rt->info[0].rateCode; 1451 if (!ath_hal_setuptxdesc(ah, ds 1452 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1453 , sizeof(struct ieee80211_frame) /* header length */ 1454 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1455 , 0x20 /* txpower XXX */ 1456 , rate, 1 /* series 0 rate/tries */ 1457 , HAL_TXKEYIX_INVALID /* no encryption */ 1458 , 0 /* antenna mode */ 1459 , HAL_TXDESC_NOACK /* no ack for beacons */ 1460 , 0 /* rts/cts rate */ 1461 , 0 /* rts/cts duration */ 1462 )) { 1463 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1464 return -1; 1465 } 1466 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1467 /* XXX verify mbuf data area covers this roundup */ 1468 if (!ath_hal_filltxdesc(ah, ds 1469 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1470 , AH_TRUE /* first segment */ 1471 , AH_TRUE /* last segment */ 1472 )) { 1473 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1474 return -1; 1475 } 1476 1477 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1478 1479 return 0; 1480 } 1481 1482 static void 1483 ath_beacon_proc(void *arg, int pending) 1484 { 1485 struct ath_softc *sc = arg; 1486 struct ieee80211com *ic = &sc->sc_ic; 1487 struct ath_buf *bf = sc->sc_bcbuf; 1488 struct ath_hal *ah = sc->sc_ah; 1489 1490 DPRINTF2(("%s: pending %u\n", __func__, pending)); 1491 if (ic->ic_opmode == IEEE80211_M_STA || 1492 bf == NULL || bf->bf_m == NULL) { 1493 DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n", 1494 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1495 return; 1496 } 1497 /* TODO: update beacon to reflect PS poll state */ 1498 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1499 DPRINTF(("%s: beacon queue %u did not stop?", 1500 __func__, sc->sc_bhalq)); 1501 return; /* busy, XXX is this right? */ 1502 } 1503 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1504 1505 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1506 ath_hal_txstart(ah, sc->sc_bhalq); 1507 DPRINTF2(("%s: BCDP%u = %p (%p)\n", __func__, 1508 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1509 } 1510 1511 static void 1512 ath_beacon_free(struct ath_softc *sc) 1513 { 1514 struct ath_buf *bf = sc->sc_bcbuf; 1515 1516 if (bf->bf_m != NULL) { 1517 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1518 m_freem(bf->bf_m); 1519 bf->bf_m = NULL; 1520 bf->bf_node = NULL; 1521 } 1522 } 1523 1524 /* 1525 * Configure the beacon and sleep timers. 1526 * 1527 * When operating as an AP this resets the TSF and sets 1528 * up the hardware to notify us when we need to issue beacons. 1529 * 1530 * When operating in station mode this sets up the beacon 1531 * timers according to the timestamp of the last received 1532 * beacon and the current TSF, configures PCF and DTIM 1533 * handling, programs the sleep registers so the hardware 1534 * will wakeup in time to receive beacons, and configures 1535 * the beacon miss handling so we'll receive a BMISS 1536 * interrupt when we stop seeing beacons from the AP 1537 * we've associated with. 1538 */ 1539 static void 1540 ath_beacon_config(struct ath_softc *sc) 1541 { 1542 struct ath_hal *ah = sc->sc_ah; 1543 struct ieee80211com *ic = &sc->sc_ic; 1544 struct ieee80211_node *ni = ic->ic_bss; 1545 u_int32_t nexttbtt; 1546 1547 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1548 (LE_READ_4(ni->ni_tstamp) >> 10); 1549 DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1550 nexttbtt += ni->ni_intval; 1551 if (ic->ic_opmode == IEEE80211_M_STA) { 1552 HAL_BEACON_STATE bs; 1553 u_int32_t bmisstime; 1554 1555 /* NB: no PCF support right now */ 1556 memset(&bs, 0, sizeof(bs)); 1557 bs.bs_intval = ni->ni_intval; 1558 bs.bs_nexttbtt = nexttbtt; 1559 bs.bs_dtimperiod = bs.bs_intval; 1560 bs.bs_nextdtim = nexttbtt; 1561 /* 1562 * Calculate the number of consecutive beacons to miss 1563 * before taking a BMISS interrupt. The configuration 1564 * is specified in ms, so we need to convert that to 1565 * TU's and then calculate based on the beacon interval. 1566 * Note that we clamp the result to at most 10 beacons. 1567 */ 1568 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1569 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1570 if (bs.bs_bmissthreshold > 10) 1571 bs.bs_bmissthreshold = 10; 1572 else if (bs.bs_bmissthreshold <= 0) 1573 bs.bs_bmissthreshold = 1; 1574 1575 /* 1576 * Calculate sleep duration. The configuration is 1577 * given in ms. We insure a multiple of the beacon 1578 * period is used. Also, if the sleep duration is 1579 * greater than the DTIM period then it makes senses 1580 * to make it a multiple of that. 1581 * 1582 * XXX fixed at 100ms 1583 */ 1584 bs.bs_sleepduration = 1585 roundup((100 * 1000) / 1024, bs.bs_intval); 1586 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1587 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1588 1589 DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1590 , __func__ 1591 , bs.bs_intval 1592 , bs.bs_nexttbtt 1593 , bs.bs_dtimperiod 1594 , bs.bs_nextdtim 1595 , bs.bs_bmissthreshold 1596 , bs.bs_sleepduration 1597 )); 1598 ath_hal_intrset(ah, 0); 1599 /* 1600 * Reset our tsf so the hardware will update the 1601 * tsf register to reflect timestamps found in 1602 * received beacons. 1603 */ 1604 ath_hal_resettsf(ah); 1605 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1606 sc->sc_imask |= HAL_INT_BMISS; 1607 ath_hal_intrset(ah, sc->sc_imask); 1608 } else { 1609 DPRINTF(("%s: intval %u nexttbtt %u\n", 1610 __func__, ni->ni_intval, nexttbtt)); 1611 ath_hal_intrset(ah, 0); 1612 ath_hal_beaconinit(ah, ic->ic_opmode, 1613 nexttbtt, ni->ni_intval); 1614 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1615 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1616 ath_hal_intrset(ah, sc->sc_imask); 1617 } 1618 } 1619 1620 #ifdef __FreeBSD__ 1621 static void 1622 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1623 { 1624 bus_addr_t *paddr = (bus_addr_t*) arg; 1625 *paddr = segs->ds_addr; 1626 } 1627 #endif 1628 1629 #ifdef __FreeBSD__ 1630 static int 1631 ath_desc_alloc(struct ath_softc *sc) 1632 { 1633 int i, bsize, error; 1634 struct ath_desc *ds; 1635 struct ath_buf *bf; 1636 1637 /* allocate descriptors */ 1638 sc->sc_desc_len = sizeof(struct ath_desc) * 1639 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1640 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1641 if (error != 0) 1642 return error; 1643 1644 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1645 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1646 1647 if (error != 0) 1648 goto fail0; 1649 1650 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1651 sc->sc_desc, sc->sc_desc_len, 1652 ath_load_cb, &sc->sc_desc_paddr, 1653 BUS_DMA_NOWAIT); 1654 if (error != 0) 1655 goto fail1; 1656 1657 ds = sc->sc_desc; 1658 DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n", 1659 ds, sc->sc_desc_len, 1660 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1661 1662 /* allocate buffers */ 1663 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1664 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1665 if (bf == NULL) { 1666 printf("%s: unable to allocate Tx/Rx buffers\n", 1667 sc->sc_dev.dv_xname); 1668 error = -1; 1669 goto fail2; 1670 } 1671 sc->sc_bufptr = bf; 1672 1673 TAILQ_INIT(&sc->sc_rxbuf); 1674 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1675 bf->bf_desc = ds; 1676 bf->bf_daddr = sc->sc_desc_paddr + 1677 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1678 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1679 &bf->bf_dmamap); 1680 if (error != 0) 1681 break; 1682 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1683 } 1684 1685 TAILQ_INIT(&sc->sc_txbuf); 1686 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1687 bf->bf_desc = ds; 1688 bf->bf_daddr = sc->sc_desc_paddr + 1689 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1690 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1691 &bf->bf_dmamap); 1692 if (error != 0) 1693 break; 1694 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1695 } 1696 TAILQ_INIT(&sc->sc_txq); 1697 1698 /* beacon buffer */ 1699 bf->bf_desc = ds; 1700 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1701 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1702 if (error != 0) 1703 return error; 1704 sc->sc_bcbuf = bf; 1705 return 0; 1706 1707 fail2: 1708 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1709 fail1: 1710 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1711 fail0: 1712 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1713 sc->sc_ddmamap = NULL; 1714 return error; 1715 } 1716 #else 1717 static int 1718 ath_desc_alloc(struct ath_softc *sc) 1719 { 1720 int i, bsize, error = -1; 1721 struct ath_desc *ds; 1722 struct ath_buf *bf; 1723 1724 /* allocate descriptors */ 1725 sc->sc_desc_len = sizeof(struct ath_desc) * 1726 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1727 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1728 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1729 printf("%s: unable to allocate control data, error = %d\n", 1730 sc->sc_dev.dv_xname, error); 1731 goto fail0; 1732 } 1733 1734 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1735 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1736 printf("%s: unable to map control data, error = %d\n", 1737 sc->sc_dev.dv_xname, error); 1738 goto fail1; 1739 } 1740 1741 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1742 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 1743 printf("%s: unable to create control data DMA map, " 1744 "error = %d\n", sc->sc_dev.dv_xname, error); 1745 goto fail2; 1746 } 1747 1748 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 1749 sc->sc_desc_len, NULL, 0)) != 0) { 1750 printf("%s: unable to load control data DMA map, error = %d\n", 1751 sc->sc_dev.dv_xname, error); 1752 goto fail3; 1753 } 1754 1755 ds = sc->sc_desc; 1756 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 1757 1758 DPRINTF(("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 1759 ds, (u_long)sc->sc_desc_len, 1760 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1761 1762 /* allocate buffers */ 1763 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1764 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1765 if (bf == NULL) { 1766 printf("%s: unable to allocate Tx/Rx buffers\n", 1767 sc->sc_dev.dv_xname); 1768 error = ENOMEM; 1769 goto fail3; 1770 } 1771 sc->sc_bufptr = bf; 1772 1773 TAILQ_INIT(&sc->sc_rxbuf); 1774 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1775 bf->bf_desc = ds; 1776 bf->bf_daddr = sc->sc_desc_paddr + 1777 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1778 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 1779 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1780 printf("%s: unable to create Rx dmamap, error = %d\n", 1781 sc->sc_dev.dv_xname, error); 1782 goto fail4; 1783 } 1784 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1785 } 1786 1787 TAILQ_INIT(&sc->sc_txbuf); 1788 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1789 bf->bf_desc = ds; 1790 bf->bf_daddr = sc->sc_desc_paddr + 1791 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1792 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1793 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1794 printf("%s: unable to create Tx dmamap, error = %d\n", 1795 sc->sc_dev.dv_xname, error); 1796 goto fail5; 1797 } 1798 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1799 } 1800 TAILQ_INIT(&sc->sc_txq); 1801 1802 /* beacon buffer */ 1803 bf->bf_desc = ds; 1804 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1805 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 1806 &bf->bf_dmamap)) != 0) { 1807 printf("%s: unable to create beacon dmamap, error = %d\n", 1808 sc->sc_dev.dv_xname, error); 1809 goto fail5; 1810 } 1811 sc->sc_bcbuf = bf; 1812 return 0; 1813 1814 fail5: 1815 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 1816 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1817 continue; 1818 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1819 } 1820 fail4: 1821 for (i = 0; i < ATH_RXBUF; i++) { 1822 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1823 continue; 1824 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1825 } 1826 fail3: 1827 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1828 fail2: 1829 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1830 sc->sc_ddmamap = NULL; 1831 fail1: 1832 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 1833 fail0: 1834 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1835 return error; 1836 } 1837 #endif 1838 1839 static void 1840 ath_desc_free(struct ath_softc *sc) 1841 { 1842 struct ath_buf *bf; 1843 1844 #ifdef __FreeBSD__ 1845 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1846 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1847 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1848 #else 1849 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1850 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1851 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1852 #endif 1853 1854 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1855 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1856 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1857 m_freem(bf->bf_m); 1858 } 1859 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 1860 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1861 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 1862 if (bf->bf_m) { 1863 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1864 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1865 m_freem(bf->bf_m); 1866 bf->bf_m = NULL; 1867 } 1868 } 1869 if (sc->sc_bcbuf != NULL) { 1870 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1871 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1872 sc->sc_bcbuf = NULL; 1873 } 1874 1875 TAILQ_INIT(&sc->sc_rxbuf); 1876 TAILQ_INIT(&sc->sc_txbuf); 1877 TAILQ_INIT(&sc->sc_txq); 1878 free(sc->sc_bufptr, M_DEVBUF); 1879 sc->sc_bufptr = NULL; 1880 } 1881 1882 static struct ieee80211_node * 1883 ath_node_alloc(struct ieee80211com *ic) 1884 { 1885 struct ath_node *an = 1886 malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1887 return an ? &an->an_node : NULL; 1888 } 1889 1890 static void 1891 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 1892 { 1893 struct ath_softc *sc = ic->ic_if.if_softc; 1894 struct ath_buf *bf; 1895 1896 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1897 if (bf->bf_node == ni) 1898 bf->bf_node = NULL; 1899 } 1900 free(ni, M_DEVBUF); 1901 } 1902 1903 static void 1904 ath_node_copy(struct ieee80211com *ic, 1905 struct ieee80211_node *dst, const struct ieee80211_node *src) 1906 { 1907 *(struct ath_node *)dst = *(const struct ath_node *)src; 1908 } 1909 1910 static int 1911 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 1912 { 1913 struct ath_hal *ah = sc->sc_ah; 1914 int error; 1915 struct mbuf *m; 1916 struct ath_desc *ds; 1917 1918 m = bf->bf_m; 1919 if (m == NULL) { 1920 /* 1921 * NB: by assigning a page to the rx dma buffer we 1922 * implicitly satisfy the Atheros requirement that 1923 * this buffer be cache-line-aligned and sized to be 1924 * multiple of the cache line size. Not doing this 1925 * causes weird stuff to happen (for the 5210 at least). 1926 */ 1927 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 1928 if (m == NULL) { 1929 DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n")); 1930 sc->sc_stats.ast_rx_nombuf++; 1931 return ENOMEM; 1932 } 1933 bf->bf_m = m; 1934 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 1935 1936 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 1937 BUS_DMA_NOWAIT); 1938 if (error != 0) { 1939 DPRINTF(("ath_rxbuf_init: ath_buf_dmamap_load_mbuf failed;" 1940 " error %d\n", error)); 1941 sc->sc_stats.ast_rx_busdma++; 1942 return error; 1943 } 1944 KASSERT(bf->bf_nseg == 1, 1945 ("ath_rxbuf_init: multi-segment packet; nseg %u", 1946 bf->bf_nseg)); 1947 } 1948 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 1949 1950 /* setup descriptors */ 1951 ds = bf->bf_desc; 1952 ds->ds_link = 0; 1953 ds->ds_data = bf->bf_segs[0].ds_addr; 1954 ath_hal_setuprxdesc(ah, ds 1955 , m->m_len /* buffer size */ 1956 , 0 1957 ); 1958 1959 if (sc->sc_rxlink != NULL) 1960 *sc->sc_rxlink = bf->bf_daddr; 1961 sc->sc_rxlink = &ds->ds_link; 1962 return 0; 1963 } 1964 1965 static void 1966 ath_rx_proc(void *arg, int npending) 1967 { 1968 struct ath_softc *sc = arg; 1969 struct ath_buf *bf; 1970 struct ieee80211com *ic = &sc->sc_ic; 1971 struct ifnet *ifp = &ic->ic_if; 1972 struct ath_hal *ah = sc->sc_ah; 1973 struct ath_desc *ds; 1974 struct mbuf *m; 1975 struct ieee80211_frame *wh, whbuf; 1976 struct ieee80211_node *ni; 1977 int len; 1978 u_int phyerr; 1979 HAL_STATUS status; 1980 1981 DPRINTF2(("ath_rx_proc: pending %u\n", npending)); 1982 do { 1983 bf = TAILQ_FIRST(&sc->sc_rxbuf); 1984 if (bf == NULL) { /* NB: shouldn't happen */ 1985 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 1986 break; 1987 } 1988 m = bf->bf_m; 1989 if (m == NULL) { /* NB: shouldn't happen */ 1990 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 1991 continue; 1992 } 1993 ds = bf->bf_desc; 1994 status = ath_hal_rxprocdesc(ah, ds); 1995 #ifdef AR_DEBUG 1996 if (ath_debug > 1) 1997 ath_printrxbuf(bf, status == HAL_OK); 1998 #endif 1999 if (status == HAL_EINPROGRESS) 2000 break; 2001 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 2002 if (ds->ds_rxstat.rs_status != 0) { 2003 ifp->if_ierrors++; 2004 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 2005 sc->sc_stats.ast_rx_crcerr++; 2006 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 2007 sc->sc_stats.ast_rx_fifoerr++; 2008 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 2009 sc->sc_stats.ast_rx_badcrypt++; 2010 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 2011 sc->sc_stats.ast_rx_phyerr++; 2012 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 2013 sc->sc_stats.ast_rx_phy[phyerr]++; 2014 } 2015 goto rx_next; 2016 } 2017 2018 len = ds->ds_rxstat.rs_datalen; 2019 if (len < sizeof(struct ieee80211_frame)) { 2020 DPRINTF(("ath_rx_proc: short packet %d\n", len)); 2021 sc->sc_stats.ast_rx_tooshort++; 2022 goto rx_next; 2023 } 2024 2025 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 2026 2027 wh = mtod(m, struct ieee80211_frame *); 2028 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 2029 IEEE80211_FC0_TYPE_CTL && 2030 ic->ic_opmode != IEEE80211_M_MONITOR) { 2031 /* 2032 * Discard control frame when not in monitor mode. 2033 */ 2034 DPRINTF(("ath_rx_proc: control frame\n")); 2035 sc->sc_stats.ast_rx_ctl++; 2036 goto rx_next; 2037 } 2038 2039 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2040 bf->bf_m = NULL; 2041 m->m_pkthdr.rcvif = ifp; 2042 m->m_pkthdr.len = m->m_len = len; 2043 2044 #if NBPFILTER > 0 2045 if (sc->sc_drvbpf) { 2046 #ifdef __FreeBSD__ 2047 struct mbuf *mb; 2048 2049 /* XXX pre-allocate space when setting up recv's */ 2050 MGETHDR(mb, M_DONTWAIT, m->m_type); 2051 if (mb != NULL) { 2052 sc->sc_rx_th.wr_rate = 2053 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2054 sc->sc_rx_th.wr_antsignal = 2055 ds->ds_rxstat.rs_rssi; 2056 sc->sc_rx_th.wr_antenna = 2057 ds->ds_rxstat.rs_antenna; 2058 /* XXX TSF */ 2059 2060 (void) m_dup_pkthdr(mb, m, M_DONTWAIT); 2061 mb->m_next = m; 2062 mb->m_data = (caddr_t)&sc->sc_rx_th; 2063 mb->m_len = sizeof(sc->sc_rx_th); 2064 mb->m_pkthdr.len += mb->m_len; 2065 bpf_mtap(sc->sc_drvbpf, mb); 2066 m_free(mb); 2067 } 2068 #else 2069 /* XXX pre-allocate space when setting up recv's */ 2070 struct mbuf mb; 2071 2072 sc->sc_rx_th.wr_rate = 2073 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2074 sc->sc_rx_th.wr_antsignal = 2075 ds->ds_rxstat.rs_rssi; 2076 sc->sc_rx_th.wr_antenna = 2077 ds->ds_rxstat.rs_antenna; 2078 /* XXX TSF */ 2079 2080 M_COPY_PKTHDR(&mb, m); 2081 mb.m_next = m; 2082 mb.m_data = (caddr_t)&sc->sc_rx_th; 2083 mb.m_len = sizeof(sc->sc_rx_th); 2084 mb.m_pkthdr.len += mb.m_len; 2085 bpf_mtap(sc->sc_drvbpf, &mb); 2086 #endif 2087 } 2088 #endif 2089 2090 m_adj(m, -IEEE80211_CRC_LEN); 2091 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2092 /* 2093 * WEP is decrypted by hardware. Clear WEP bit 2094 * and trim WEP header for ieee80211_input(). 2095 */ 2096 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2097 memcpy(&whbuf, wh, sizeof(whbuf)); 2098 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2099 memcpy(mtod(m, caddr_t), &whbuf, sizeof(whbuf)); 2100 /* 2101 * Also trim WEP ICV from the tail. 2102 */ 2103 m_adj(m, -IEEE80211_WEP_CRCLEN); 2104 /* 2105 * The header has probably moved. 2106 */ 2107 wh = mtod(m, struct ieee80211_frame *); 2108 } 2109 2110 /* 2111 * Locate the node for sender, track state, and 2112 * then pass this node (referenced) up to the 802.11 2113 * layer for its use. We are required to pass 2114 * something so we fall back to ic_bss when this frame 2115 * is from an unknown sender. 2116 */ 2117 ni = ieee80211_find_rxnode(ic, wh); 2118 ATH_NODE(ni)->an_rx_antenna = ds->ds_rxstat.rs_antenna; 2119 /* 2120 * Send frame up for processing. 2121 */ 2122 ieee80211_input(ifp, m, ni, 2123 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2124 /* 2125 * The frame may have caused the node to be marked for 2126 * reclamation (e.g. in response to a DEAUTH message) 2127 * so use free_node here instead of unref_node. 2128 */ 2129 if (ni == ic->ic_bss) 2130 ieee80211_unref_node(&ni); 2131 else 2132 ieee80211_free_node(ic, ni); 2133 rx_next: 2134 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2135 } while (ath_rxbuf_init(sc, bf) == 0); 2136 2137 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2138 ath_hal_rxena(ah); /* in case of RXEOL */ 2139 2140 if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd)) 2141 ath_start(ifp); 2142 } 2143 2144 /* 2145 * XXX Size of an ACK control frame in bytes. 2146 */ 2147 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2148 2149 static int 2150 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2151 struct mbuf *m0) 2152 { 2153 struct ieee80211com *ic = &sc->sc_ic; 2154 struct ath_hal *ah = sc->sc_ah; 2155 struct ifnet *ifp = &sc->sc_ic.ic_if; 2156 int i, error, iswep, hdrlen, pktlen; 2157 u_int8_t rix, cix, txrate, ctsrate; 2158 struct ath_desc *ds; 2159 struct mbuf *m; 2160 struct ieee80211_frame *wh; 2161 u_int32_t iv; 2162 u_int8_t *ivp; 2163 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2164 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2165 u_int subtype, flags, ctsduration, antenna; 2166 HAL_PKT_TYPE atype; 2167 const HAL_RATE_TABLE *rt; 2168 HAL_BOOL shortPreamble; 2169 struct ath_node *an; 2170 ath_txq_critsect_decl(s); 2171 2172 wh = mtod(m0, struct ieee80211_frame *); 2173 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2174 hdrlen = sizeof(struct ieee80211_frame); 2175 pktlen = m0->m_pkthdr.len; 2176 2177 if (iswep) { 2178 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2179 m_adj(m0, hdrlen); 2180 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2181 if (m0 == NULL) { 2182 sc->sc_stats.ast_tx_nombuf++; 2183 return ENOMEM; 2184 } 2185 ivp = hdrbuf + hdrlen; 2186 wh = mtod(m0, struct ieee80211_frame *); 2187 /* 2188 * XXX 2189 * IV must not duplicate during the lifetime of the key. 2190 * But no mechanism to renew keys is defined in IEEE 802.11 2191 * WEP. And IV may be duplicated between other stations 2192 * because of the session key itself is shared. 2193 * So we use pseudo random IV for now, though it is not the 2194 * right way. 2195 */ 2196 iv = arc4random(); 2197 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 2198 ivp[i] = iv; 2199 iv >>= 8; 2200 } 2201 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 2202 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2203 /* 2204 * The ICV length must be included into hdrlen and pktlen. 2205 */ 2206 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2207 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2208 } 2209 pktlen += IEEE80211_CRC_LEN; 2210 2211 /* 2212 * Load the DMA map so any coalescing is done. This 2213 * also calculates the number of descriptors we need. 2214 */ 2215 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2216 /* 2217 * Discard null packets and check for packets that 2218 * require too many TX descriptors. We try to convert 2219 * the latter to a cluster. 2220 */ 2221 if (error == EFBIG) { /* too many desc's, linearize */ 2222 sc->sc_stats.ast_tx_linear++; 2223 MGETHDR(m, M_DONTWAIT, MT_DATA); 2224 if (m == NULL) { 2225 sc->sc_stats.ast_tx_nombuf++; 2226 m_freem(m0); 2227 return ENOMEM; 2228 } 2229 #ifdef __FreeBSD__ 2230 M_MOVE_PKTHDR(m, m0); 2231 #else 2232 M_COPY_PKTHDR(m, m0); 2233 #endif 2234 MCLGET(m, M_DONTWAIT); 2235 if ((m->m_flags & M_EXT) == 0) { 2236 sc->sc_stats.ast_tx_nomcl++; 2237 m_freem(m0); 2238 m_free(m); 2239 return ENOMEM; 2240 } 2241 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2242 m_freem(m0); 2243 m->m_len = m->m_pkthdr.len; 2244 m0 = m; 2245 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2246 BUS_DMA_NOWAIT); 2247 if (error != 0) { 2248 sc->sc_stats.ast_tx_busdma++; 2249 m_freem(m0); 2250 return error; 2251 } 2252 KASSERT(bf->bf_nseg == 1, 2253 ("ath_tx_start: packet not one segment; nseg %u", 2254 bf->bf_nseg)); 2255 } else if (error != 0) { 2256 sc->sc_stats.ast_tx_busdma++; 2257 m_freem(m0); 2258 return error; 2259 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2260 sc->sc_stats.ast_tx_nodata++; 2261 m_freem(m0); 2262 return EIO; 2263 } 2264 DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen)); 2265 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2266 bf->bf_m = m0; 2267 bf->bf_node = ni; /* NB: held reference */ 2268 2269 /* setup descriptors */ 2270 ds = bf->bf_desc; 2271 rt = sc->sc_currates; 2272 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2273 2274 /* 2275 * Calculate Atheros packet type from IEEE80211 packet header 2276 * and setup for rate calculations. 2277 */ 2278 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2279 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2280 case IEEE80211_FC0_TYPE_MGT: 2281 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2282 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2283 atype = HAL_PKT_TYPE_BEACON; 2284 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2285 atype = HAL_PKT_TYPE_PROBE_RESP; 2286 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2287 atype = HAL_PKT_TYPE_ATIM; 2288 rix = 0; /* XXX lowest rate */ 2289 break; 2290 case IEEE80211_FC0_TYPE_CTL: 2291 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2292 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2293 atype = HAL_PKT_TYPE_PSPOLL; 2294 rix = 0; /* XXX lowest rate */ 2295 break; 2296 default: 2297 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2298 IEEE80211_RATE_VAL]; 2299 if (rix == 0xff) { 2300 if_printf(ifp, "bogus xmit rate 0x%x\n", 2301 ni->ni_rates.rs_rates[ni->ni_txrate]); 2302 sc->sc_stats.ast_tx_badrate++; 2303 m_freem(m0); 2304 return EIO; 2305 } 2306 break; 2307 } 2308 /* 2309 * NB: the 802.11 layer marks whether or not we should 2310 * use short preamble based on the current mode and 2311 * negotiated parameters. 2312 */ 2313 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) { 2314 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2315 shortPreamble = AH_TRUE; 2316 sc->sc_stats.ast_tx_shortpre++; 2317 } else { 2318 txrate = rt->info[rix].rateCode; 2319 shortPreamble = AH_FALSE; 2320 } 2321 2322 /* 2323 * Calculate miscellaneous flags. 2324 */ 2325 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2326 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2327 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2328 sc->sc_stats.ast_tx_noack++; 2329 } else if (pktlen > ic->ic_rtsthreshold) { 2330 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2331 sc->sc_stats.ast_tx_rts++; 2332 } 2333 2334 /* 2335 * Calculate RTS/CTS rate and duration if needed. 2336 */ 2337 ctsduration = 0; 2338 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2339 /* 2340 * CTS transmit rate is derived from the transmit rate 2341 * by looking in the h/w rate table. We must also factor 2342 * in whether or not a short preamble is to be used. 2343 */ 2344 cix = rt->info[rix].controlRate; 2345 ctsrate = rt->info[cix].rateCode; 2346 if (shortPreamble) 2347 ctsrate |= rt->info[cix].shortPreamble; 2348 /* 2349 * Compute the transmit duration based on the size 2350 * of an ACK frame. We call into the HAL to do the 2351 * computation since it depends on the characteristics 2352 * of the actual PHY being used. 2353 */ 2354 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2355 ctsduration += ath_hal_computetxtime(ah, 2356 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2357 } 2358 /* SIFS + data */ 2359 ctsduration += ath_hal_computetxtime(ah, 2360 rt, pktlen, rix, shortPreamble); 2361 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2362 ctsduration += ath_hal_computetxtime(ah, 2363 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2364 } 2365 } else 2366 ctsrate = 0; 2367 2368 /* 2369 * For now use the antenna on which the last good 2370 * frame was received on. We assume this field is 2371 * initialized to 0 which gives us ``auto'' or the 2372 * ``default'' antenna. 2373 */ 2374 an = (struct ath_node *) ni; 2375 if (an->an_tx_antenna) 2376 antenna = an->an_tx_antenna; 2377 else 2378 antenna = an->an_rx_antenna; 2379 2380 /* 2381 * Formulate first tx descriptor with tx controls. 2382 */ 2383 /* XXX check return value? */ 2384 ath_hal_setuptxdesc(ah, ds 2385 , pktlen /* packet length */ 2386 , hdrlen /* header length */ 2387 , atype /* Atheros packet type */ 2388 , 60 /* txpower XXX */ 2389 , txrate, 1+10 /* series 0 rate/tries */ 2390 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2391 , antenna /* antenna mode */ 2392 , flags /* flags */ 2393 , ctsrate /* rts/cts rate */ 2394 , ctsduration /* rts/cts duration */ 2395 ); 2396 #ifdef notyet 2397 ath_hal_setupxtxdesc(ah, ds 2398 , AH_FALSE /* short preamble */ 2399 , 0, 0 /* series 1 rate/tries */ 2400 , 0, 0 /* series 2 rate/tries */ 2401 , 0, 0 /* series 3 rate/tries */ 2402 ); 2403 #endif 2404 /* 2405 * Fillin the remainder of the descriptor info. 2406 */ 2407 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2408 ds->ds_data = bf->bf_segs[i].ds_addr; 2409 if (i == bf->bf_nseg - 1) 2410 ds->ds_link = 0; 2411 else 2412 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2413 ath_hal_filltxdesc(ah, ds 2414 , bf->bf_segs[i].ds_len /* segment length */ 2415 , i == 0 /* first segment */ 2416 , i == bf->bf_nseg - 1 /* last segment */ 2417 ); 2418 DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n", 2419 i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1, 2420 ds->ds_hw[0], ds->ds_hw[1])); 2421 } 2422 2423 /* 2424 * Insert the frame on the outbound list and 2425 * pass it on to the hardware. 2426 */ 2427 ath_txq_critsect_begin(sc, s); 2428 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2429 if (sc->sc_txlink == NULL) { 2430 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2431 DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n", 2432 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2433 } else { 2434 *sc->sc_txlink = bf->bf_daddr; 2435 DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n", 2436 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2437 } 2438 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2439 ath_txq_critsect_end(sc, s); 2440 2441 ath_hal_txstart(ah, sc->sc_txhalq); 2442 return 0; 2443 } 2444 2445 static void 2446 ath_tx_proc(void *arg, int npending) 2447 { 2448 struct ath_softc *sc = arg; 2449 struct ath_hal *ah = sc->sc_ah; 2450 struct ath_buf *bf; 2451 struct ieee80211com *ic = &sc->sc_ic; 2452 struct ifnet *ifp = &ic->ic_if; 2453 struct ath_desc *ds; 2454 struct ieee80211_node *ni; 2455 struct ath_node *an; 2456 int sr, lr; 2457 HAL_STATUS status; 2458 ath_txq_critsect_decl(s); 2459 ath_txbuf_critsect_decl(s2); 2460 2461 DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n", 2462 npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2463 sc->sc_txlink)); 2464 for (;;) { 2465 ath_txq_critsect_begin(sc, s); 2466 bf = TAILQ_FIRST(&sc->sc_txq); 2467 if (bf == NULL) { 2468 sc->sc_txlink = NULL; 2469 ath_txq_critsect_end(sc, s); 2470 break; 2471 } 2472 /* only the last descriptor is needed */ 2473 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2474 status = ath_hal_txprocdesc(ah, ds); 2475 #ifdef AR_DEBUG 2476 if (ath_debug > 1) 2477 ath_printtxbuf(bf, status == HAL_OK); 2478 #endif 2479 if (status == HAL_EINPROGRESS) { 2480 ath_txq_critsect_end(sc, s); 2481 break; 2482 } 2483 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2484 ath_txq_critsect_end(sc, s); 2485 2486 ni = bf->bf_node; 2487 if (ni != NULL) { 2488 an = (struct ath_node *) ni; 2489 if (ds->ds_txstat.ts_status == 0) { 2490 an->an_tx_ok++; 2491 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2492 } else { 2493 an->an_tx_err++; 2494 ifp->if_oerrors++; 2495 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2496 sc->sc_stats.ast_tx_xretries++; 2497 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2498 sc->sc_stats.ast_tx_fifoerr++; 2499 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2500 sc->sc_stats.ast_tx_filtered++; 2501 an->an_tx_antenna = 0; /* invalidate */ 2502 } 2503 sr = ds->ds_txstat.ts_shortretry; 2504 lr = ds->ds_txstat.ts_longretry; 2505 sc->sc_stats.ast_tx_shortretry += sr; 2506 sc->sc_stats.ast_tx_longretry += lr; 2507 if (sr + lr) 2508 an->an_tx_retr++; 2509 /* 2510 * Reclaim reference to node. 2511 * 2512 * NB: the node may be reclaimed here if, for example 2513 * this is a DEAUTH message that was sent and the 2514 * node was timed out due to inactivity. 2515 */ 2516 if (ni != ic->ic_bss) 2517 ieee80211_free_node(ic, ni); 2518 } 2519 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2520 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2521 m_freem(bf->bf_m); 2522 bf->bf_m = NULL; 2523 bf->bf_node = NULL; 2524 2525 ath_txbuf_critsect_begin(sc, s2); 2526 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2527 ath_txbuf_critsect_end(sc, s2); 2528 } 2529 ifp->if_flags &= ~IFF_OACTIVE; 2530 sc->sc_tx_timer = 0; 2531 2532 ath_start(ifp); 2533 } 2534 2535 /* 2536 * Drain the transmit queue and reclaim resources. 2537 */ 2538 static void 2539 ath_draintxq(struct ath_softc *sc) 2540 { 2541 struct ath_hal *ah = sc->sc_ah; 2542 struct ifnet *ifp = &sc->sc_ic.ic_if; 2543 struct ath_buf *bf; 2544 ath_txq_critsect_decl(s); 2545 ath_txbuf_critsect_decl(s2); 2546 2547 /* XXX return value */ 2548 if (!sc->sc_invalid) { 2549 /* don't touch the hardware if marked invalid */ 2550 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2551 DPRINTF(("ath_draintxq: tx queue %p, link %p\n", 2552 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2553 sc->sc_txlink)); 2554 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2555 DPRINTF(("ath_draintxq: beacon queue %p\n", 2556 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2557 } 2558 for (;;) { 2559 ath_txq_critsect_begin(sc, s); 2560 bf = TAILQ_FIRST(&sc->sc_txq); 2561 if (bf == NULL) { 2562 sc->sc_txlink = NULL; 2563 ath_txq_critsect_end(sc, s); 2564 break; 2565 } 2566 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2567 ath_txq_critsect_end(sc, s); 2568 #ifdef AR_DEBUG 2569 if (ath_debug) 2570 ath_printtxbuf(bf, 2571 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2572 #endif /* AR_DEBUG */ 2573 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2574 m_freem(bf->bf_m); 2575 bf->bf_m = NULL; 2576 bf->bf_node = NULL; 2577 ath_txbuf_critsect_begin(sc, s2); 2578 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2579 ath_txbuf_critsect_end(sc, s2); 2580 } 2581 ifp->if_flags &= ~IFF_OACTIVE; 2582 sc->sc_tx_timer = 0; 2583 } 2584 2585 /* 2586 * Disable the receive h/w in preparation for a reset. 2587 */ 2588 static void 2589 ath_stoprecv(struct ath_softc *sc) 2590 { 2591 struct ath_hal *ah = sc->sc_ah; 2592 2593 ath_hal_stoppcurecv(ah); /* disable PCU */ 2594 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2595 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2596 DELAY(3000); /* long enough for 1 frame */ 2597 #ifdef AR_DEBUG 2598 if (ath_debug) { 2599 struct ath_buf *bf; 2600 2601 DPRINTF(("ath_stoprecv: rx queue %p, link %p\n", 2602 (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink)); 2603 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2604 if (ath_hal_rxprocdesc(ah, bf->bf_desc) == HAL_OK) 2605 ath_printrxbuf(bf, 1); 2606 } 2607 } 2608 #endif 2609 sc->sc_rxlink = NULL; /* just in case */ 2610 } 2611 2612 /* 2613 * Enable the receive h/w following a reset. 2614 */ 2615 static int 2616 ath_startrecv(struct ath_softc *sc) 2617 { 2618 struct ath_hal *ah = sc->sc_ah; 2619 struct ath_buf *bf; 2620 2621 sc->sc_rxlink = NULL; 2622 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2623 int error = ath_rxbuf_init(sc, bf); 2624 if (error != 0) { 2625 DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n", 2626 error)); 2627 return error; 2628 } 2629 } 2630 2631 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2632 ath_hal_putrxbuf(ah, bf->bf_daddr); 2633 ath_hal_rxena(ah); /* enable recv descriptors */ 2634 ath_mode_init(sc); /* set filters, etc. */ 2635 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2636 return 0; 2637 } 2638 2639 /* 2640 * Set/change channels. If the channel is really being changed, 2641 * it's done by resetting the chip. To accomplish this we must 2642 * first cleanup any pending DMA, then restart stuff after a la 2643 * ath_init. 2644 */ 2645 static int 2646 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 2647 { 2648 struct ath_hal *ah = sc->sc_ah; 2649 struct ieee80211com *ic = &sc->sc_ic; 2650 2651 DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n", 2652 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 2653 ic->ic_ibss_chan->ic_freq, 2654 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 2655 if (chan != ic->ic_ibss_chan) { 2656 HAL_STATUS status; 2657 HAL_CHANNEL hchan; 2658 enum ieee80211_phymode mode; 2659 2660 /* 2661 * To switch channels clear any pending DMA operations; 2662 * wait long enough for the RX fifo to drain, reset the 2663 * hardware at the new frequency, and then re-enable 2664 * the relevant bits of the h/w. 2665 */ 2666 ath_hal_intrset(ah, 0); /* disable interrupts */ 2667 ath_draintxq(sc); /* clear pending tx frames */ 2668 ath_stoprecv(sc); /* turn off frame recv */ 2669 /* 2670 * Convert to a HAL channel description with 2671 * the flags constrained to reflect the current 2672 * operating mode. 2673 */ 2674 hchan.channel = chan->ic_freq; 2675 hchan.channelFlags = ath_chan2flags(ic, chan); 2676 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 2677 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 2678 "channel %u (%u Mhz)\n", 2679 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 2680 return EIO; 2681 } 2682 /* 2683 * Re-enable rx framework. 2684 */ 2685 if (ath_startrecv(sc) != 0) { 2686 if_printf(&ic->ic_if, 2687 "ath_chan_set: unable to restart recv logic\n"); 2688 return EIO; 2689 } 2690 2691 /* 2692 * Update BPF state. 2693 */ 2694 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 2695 htole16(chan->ic_freq); 2696 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 2697 htole16(chan->ic_flags); 2698 2699 /* 2700 * Change channels and update the h/w rate map 2701 * if we're switching; e.g. 11a to 11b/g. 2702 */ 2703 ic->ic_ibss_chan = chan; 2704 mode = ieee80211_chan2mode(ic, chan); 2705 if (mode != sc->sc_curmode) 2706 ath_setcurmode(sc, mode); 2707 2708 /* 2709 * Re-enable interrupts. 2710 */ 2711 ath_hal_intrset(ah, sc->sc_imask); 2712 } 2713 return 0; 2714 } 2715 2716 static void 2717 ath_next_scan(void *arg) 2718 { 2719 struct ath_softc *sc = arg; 2720 struct ieee80211com *ic = &sc->sc_ic; 2721 struct ifnet *ifp = &ic->ic_if; 2722 int s; 2723 2724 /* don't call ath_start w/o network interrupts blocked */ 2725 s = splnet(); 2726 2727 if (ic->ic_state == IEEE80211_S_SCAN) 2728 ieee80211_next_scan(ifp); 2729 splx(s); 2730 } 2731 2732 /* 2733 * Periodically recalibrate the PHY to account 2734 * for temperature/environment changes. 2735 */ 2736 static void 2737 ath_calibrate(void *arg) 2738 { 2739 struct ath_softc *sc = arg; 2740 struct ath_hal *ah = sc->sc_ah; 2741 struct ieee80211com *ic = &sc->sc_ic; 2742 struct ieee80211_channel *c; 2743 HAL_CHANNEL hchan; 2744 2745 sc->sc_stats.ast_per_cal++; 2746 2747 /* 2748 * Convert to a HAL channel description with the flags 2749 * constrained to reflect the current operating mode. 2750 */ 2751 c = ic->ic_ibss_chan; 2752 hchan.channel = c->ic_freq; 2753 hchan.channelFlags = ath_chan2flags(ic, c); 2754 2755 DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 2756 2757 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 2758 /* 2759 * Rfgain is out of bounds, reset the chip 2760 * to load new gain values. 2761 */ 2762 sc->sc_stats.ast_per_rfgain++; 2763 ath_reset(sc); 2764 } 2765 if (!ath_hal_calibrate(ah, &hchan)) { 2766 DPRINTF(("%s: calibration of channel %u failed\n", 2767 __func__, c->ic_freq)); 2768 sc->sc_stats.ast_per_calfail++; 2769 } 2770 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 2771 } 2772 2773 static HAL_LED_STATE 2774 ath_state_to_led(enum ieee80211_state state) 2775 { 2776 switch (state) { 2777 case IEEE80211_S_INIT: 2778 return HAL_LED_INIT; 2779 case IEEE80211_S_SCAN: 2780 return HAL_LED_SCAN; 2781 case IEEE80211_S_AUTH: 2782 return HAL_LED_AUTH; 2783 case IEEE80211_S_ASSOC: 2784 return HAL_LED_ASSOC; 2785 case IEEE80211_S_RUN: 2786 return HAL_LED_RUN; 2787 default: 2788 panic("%s: unknown 802.11 state %d\n", __func__, state); 2789 return HAL_LED_INIT; 2790 } 2791 } 2792 2793 static int 2794 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 2795 { 2796 struct ifnet *ifp = &ic->ic_if; 2797 struct ath_softc *sc = ifp->if_softc; 2798 struct ath_hal *ah = sc->sc_ah; 2799 struct ieee80211_node *ni; 2800 int i, error; 2801 u_int8_t *bssid; 2802 u_int32_t rfilt; 2803 2804 DPRINTF(("%s: %s -> %s\n", __func__, 2805 ieee80211_state_name[ic->ic_state], 2806 ieee80211_state_name[nstate])); 2807 2808 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 2809 2810 if (nstate == IEEE80211_S_INIT) { 2811 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2812 ath_hal_intrset(ah, sc->sc_imask); 2813 callout_stop(&sc->sc_scan_ch); 2814 callout_stop(&sc->sc_cal_ch); 2815 return (*sc->sc_newstate)(ic, nstate, arg); 2816 } 2817 ni = ic->ic_bss; 2818 error = ath_chan_set(sc, ni->ni_chan); 2819 if (error != 0) 2820 goto bad; 2821 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 2822 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 2823 if (ic->ic_opmode != IEEE80211_M_STA) 2824 rfilt |= HAL_RX_FILTER_PROBEREQ; 2825 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2826 (ifp->if_flags & IFF_PROMISC)) 2827 rfilt |= HAL_RX_FILTER_PROM; 2828 if (nstate == IEEE80211_S_SCAN) { 2829 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 2830 ath_next_scan, sc); 2831 bssid = ifp->if_broadcastaddr; 2832 rfilt |= HAL_RX_FILTER_BEACON; 2833 } else { 2834 callout_stop(&sc->sc_scan_ch); 2835 bssid = ni->ni_bssid; 2836 } 2837 ath_hal_setrxfilter(ah, rfilt); 2838 DPRINTF(("%s: RX filter 0x%x bssid %s\n", 2839 __func__, rfilt, ether_sprintf(bssid))); 2840 2841 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 2842 ath_hal_setassocid(ah, bssid, ni->ni_associd); 2843 else 2844 ath_hal_setassocid(ah, bssid, 0); 2845 if (ic->ic_flags & IEEE80211_F_WEPON) { 2846 for (i = 0; i < IEEE80211_WEP_NKID; i++) 2847 if (ath_hal_keyisvalid(ah, i)) 2848 ath_hal_keysetmac(ah, i, bssid); 2849 } 2850 2851 if (nstate == IEEE80211_S_RUN) { 2852 DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 2853 "capinfo=0x%04x chan=%d\n" 2854 , __func__ 2855 , ic->ic_flags 2856 , ni->ni_intval 2857 , ether_sprintf(ni->ni_bssid) 2858 , ni->ni_capinfo 2859 , ieee80211_chan2ieee(ic, ni->ni_chan))); 2860 2861 /* 2862 * Allocate and setup the beacon frame for AP or adhoc mode. 2863 */ 2864 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 2865 ic->ic_opmode == IEEE80211_M_IBSS) { 2866 error = ath_beacon_alloc(sc, ni); 2867 if (error != 0) 2868 goto bad; 2869 } 2870 2871 /* 2872 * Configure the beacon and sleep timers. 2873 */ 2874 ath_beacon_config(sc); 2875 2876 /* start periodic recalibration timer */ 2877 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 2878 ath_calibrate, sc); 2879 } else { 2880 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2881 ath_hal_intrset(ah, sc->sc_imask); 2882 callout_stop(&sc->sc_cal_ch); /* no calibration */ 2883 } 2884 /* 2885 * Reset the rate control state. 2886 */ 2887 ath_rate_ctl_reset(sc, nstate); 2888 /* 2889 * Invoke the parent method to complete the work. 2890 */ 2891 return (*sc->sc_newstate)(ic, nstate, arg); 2892 bad: 2893 callout_stop(&sc->sc_scan_ch); 2894 callout_stop(&sc->sc_cal_ch); 2895 /* NB: do not invoke the parent */ 2896 return error; 2897 } 2898 2899 /* 2900 * Setup driver-specific state for a newly associated node. 2901 * Note that we're called also on a re-associate, the isnew 2902 * param tells us if this is the first time or not. 2903 */ 2904 static void 2905 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 2906 { 2907 if (isnew) { 2908 struct ath_node *an = (struct ath_node *) ni; 2909 2910 an->an_tx_ok = an->an_tx_err = 2911 an->an_tx_retr = an->an_tx_upper = 0; 2912 /* start with highest negotiated rate */ 2913 /* 2914 * XXX should do otherwise but only when 2915 * the rate control algorithm is better. 2916 */ 2917 KASSERT(ni->ni_rates.rs_nrates > 0, 2918 ("new association w/ no rates!")); 2919 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 2920 } 2921 } 2922 2923 static int 2924 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor) 2925 { 2926 struct ieee80211com *ic = &sc->sc_ic; 2927 struct ifnet *ifp = &ic->ic_if; 2928 struct ath_hal *ah = sc->sc_ah; 2929 HAL_CHANNEL *chans; 2930 int i, ix, nchan; 2931 2932 sc->sc_have11g = 0; 2933 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 2934 M_TEMP, M_NOWAIT); 2935 if (chans == NULL) { 2936 if_printf(ifp, "unable to allocate channel table\n"); 2937 return ENOMEM; 2938 } 2939 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 2940 cc, HAL_MODE_ALL, outdoor)) { 2941 if_printf(ifp, "unable to collect channel list from hal\n"); 2942 free(chans, M_TEMP); 2943 return EINVAL; 2944 } 2945 2946 /* 2947 * Convert HAL channels to ieee80211 ones and insert 2948 * them in the table according to their channel number. 2949 */ 2950 for (i = 0; i < nchan; i++) { 2951 HAL_CHANNEL *c = &chans[i]; 2952 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 2953 if (ix > IEEE80211_CHAN_MAX) { 2954 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 2955 ix, c->channel, c->channelFlags); 2956 continue; 2957 } 2958 /* NB: flags are known to be compatible */ 2959 if (ic->ic_channels[ix].ic_freq == 0) { 2960 ic->ic_channels[ix].ic_freq = c->channel; 2961 ic->ic_channels[ix].ic_flags = c->channelFlags; 2962 } else { 2963 /* channels overlap; e.g. 11g and 11b */ 2964 ic->ic_channels[ix].ic_flags |= c->channelFlags; 2965 } 2966 if ((c->channelFlags & CHANNEL_G) == CHANNEL_G) 2967 sc->sc_have11g = 1; 2968 } 2969 free(chans, M_TEMP); 2970 return 0; 2971 } 2972 2973 static int 2974 ath_rate_setup(struct ath_softc *sc, u_int mode) 2975 { 2976 struct ath_hal *ah = sc->sc_ah; 2977 struct ieee80211com *ic = &sc->sc_ic; 2978 const HAL_RATE_TABLE *rt; 2979 struct ieee80211_rateset *rs; 2980 int i, maxrates; 2981 2982 switch (mode) { 2983 case IEEE80211_MODE_11A: 2984 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 2985 break; 2986 case IEEE80211_MODE_11B: 2987 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 2988 break; 2989 case IEEE80211_MODE_11G: 2990 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 2991 break; 2992 case IEEE80211_MODE_TURBO: 2993 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 2994 break; 2995 default: 2996 DPRINTF(("%s: invalid mode %u\n", __func__, mode)); 2997 return 0; 2998 } 2999 rt = sc->sc_rates[mode]; 3000 if (rt == NULL) 3001 return 0; 3002 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 3003 DPRINTF(("%s: rate table too small (%u > %u)\n", 3004 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 3005 maxrates = IEEE80211_RATE_MAXSIZE; 3006 } else 3007 maxrates = rt->rateCount; 3008 rs = &ic->ic_sup_rates[mode]; 3009 for (i = 0; i < maxrates; i++) 3010 rs->rs_rates[i] = rt->info[i].dot11Rate; 3011 rs->rs_nrates = maxrates; 3012 return 1; 3013 } 3014 3015 static void 3016 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 3017 { 3018 const HAL_RATE_TABLE *rt; 3019 int i; 3020 3021 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 3022 rt = sc->sc_rates[mode]; 3023 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 3024 for (i = 0; i < rt->rateCount; i++) 3025 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 3026 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 3027 for (i = 0; i < 32; i++) 3028 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 3029 sc->sc_currates = rt; 3030 sc->sc_curmode = mode; 3031 } 3032 3033 /* 3034 * Reset the rate control state for each 802.11 state transition. 3035 */ 3036 static void 3037 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 3038 { 3039 struct ieee80211com *ic = &sc->sc_ic; 3040 struct ieee80211_node *ni; 3041 struct ath_node *an; 3042 3043 an = (struct ath_node *) ic->ic_bss; 3044 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3045 if (ic->ic_opmode == IEEE80211_M_STA) { 3046 ni = ic->ic_bss; 3047 if (state == IEEE80211_S_RUN) { 3048 /* start with highest negotiated rate */ 3049 KASSERT(ni->ni_rates.rs_nrates > 0, 3050 ("transition to RUN state w/ no rates!")); 3051 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3052 } else { 3053 /* use lowest rate */ 3054 ni->ni_txrate = 0; 3055 } 3056 } else { 3057 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3058 ni->ni_txrate = 0; /* use lowest rate */ 3059 an = (struct ath_node *) ni; 3060 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3061 an->an_tx_upper = 0; 3062 } 3063 } 3064 } 3065 3066 /* 3067 * Examine and potentially adjust the transmit rate. 3068 */ 3069 static void 3070 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3071 { 3072 struct ath_softc *sc = arg; 3073 struct ath_node *an = (struct ath_node *) ni; 3074 struct ieee80211_rateset *rs = &ni->ni_rates; 3075 int mod = 0, orate, enough; 3076 3077 /* 3078 * Rate control 3079 * XXX: very primitive version. 3080 */ 3081 sc->sc_stats.ast_rate_calls++; 3082 3083 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3084 3085 /* no packet reached -> down */ 3086 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3087 mod = -1; 3088 3089 /* all packets needs retry in average -> down */ 3090 if (enough && an->an_tx_ok < an->an_tx_retr) 3091 mod = -1; 3092 3093 /* no error and less than 10% of packets needs retry -> up */ 3094 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3095 mod = 1; 3096 3097 orate = ni->ni_txrate; 3098 switch (mod) { 3099 case 0: 3100 if (enough && an->an_tx_upper > 0) 3101 an->an_tx_upper--; 3102 break; 3103 case -1: 3104 if (ni->ni_txrate > 0) { 3105 ni->ni_txrate--; 3106 sc->sc_stats.ast_rate_drop++; 3107 } 3108 an->an_tx_upper = 0; 3109 break; 3110 case 1: 3111 if (++an->an_tx_upper < 2) 3112 break; 3113 an->an_tx_upper = 0; 3114 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3115 ni->ni_txrate++; 3116 sc->sc_stats.ast_rate_raise++; 3117 } 3118 break; 3119 } 3120 3121 if (ni->ni_txrate != orate) { 3122 DPRINTF(("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3123 __func__, 3124 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3125 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3126 an->an_tx_ok, an->an_tx_err, an->an_tx_retr)); 3127 } 3128 if (ni->ni_txrate != orate || enough) 3129 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3130 } 3131 3132 #ifdef AR_DEBUG 3133 #ifdef __FreeBSD__ 3134 static int 3135 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3136 { 3137 char dmode[64]; 3138 int error; 3139 3140 strncpy(dmode, "", sizeof(dmode) - 1); 3141 dmode[sizeof(dmode) - 1] = '\0'; 3142 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3143 3144 if (error == 0 && req->newptr != NULL) { 3145 struct ifnet *ifp; 3146 struct ath_softc *sc; 3147 3148 ifp = ifunit("ath0"); /* XXX */ 3149 if (!ifp) 3150 return EINVAL; 3151 sc = ifp->if_softc; 3152 if (strcmp(dmode, "hal") == 0) 3153 ath_hal_dumpstate(sc->sc_ah); 3154 else if (strcmp(dmode, "eeprom") == 0) 3155 ath_hal_dumpeeprom(sc->sc_ah); 3156 else if (strcmp(dmode, "rfgain") == 0) 3157 ath_hal_dumprfgain(sc->sc_ah); 3158 else if (strcmp(dmode, "ani") == 0) 3159 ath_hal_dumpani(sc->sc_ah); 3160 else 3161 return EINVAL; 3162 } 3163 return error; 3164 } 3165 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3166 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3167 #endif /* __FreeBSD__ */ 3168 3169 static void 3170 ath_printrxbuf(struct ath_buf *bf, int done) 3171 { 3172 struct ath_desc *ds; 3173 int i; 3174 3175 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3176 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3177 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3178 ds->ds_link, ds->ds_data, 3179 ds->ds_ctl0, ds->ds_ctl1, 3180 ds->ds_hw[0], ds->ds_hw[1], 3181 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3182 } 3183 } 3184 3185 static void 3186 ath_printtxbuf(struct ath_buf *bf, int done) 3187 { 3188 struct ath_desc *ds; 3189 int i; 3190 3191 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3192 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3193 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3194 ds->ds_link, ds->ds_data, 3195 ds->ds_ctl0, ds->ds_ctl1, 3196 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3197 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3198 } 3199 } 3200 #endif /* AR_DEBUG */ 3201
Indexes created Thu Oct 02 07:10:07 GMT 2025