ath.c revision 1.18
1 /* $NetBSD: ath.c,v 1.18 2003/12/16 06:48:09 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.36 2003/11/29 01:23:59 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.18 2003/12/16 06:48:09 dyoung Exp $"); 45 #endif 46 47 /* 48 * Driver for the Atheros Wireless LAN controller. 49 * 50 * This software is derived from work of Atsushi Onoe; his contribution 51 * is greatly appreciated. 52 */ 53 54 #include "opt_inet.h" 55 56 #ifdef __NetBSD__ 57 #include "bpfilter.h" 58 #endif /* __NetBSD__ */ 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/types.h> 63 #include <sys/sysctl.h> 64 #include <sys/mbuf.h> 65 #include <sys/malloc.h> 66 #include <sys/lock.h> 67 #ifdef __FreeBSD__ 68 #include <sys/mutex.h> 69 #endif 70 #include <sys/kernel.h> 71 #include <sys/socket.h> 72 #include <sys/sockio.h> 73 #include <sys/errno.h> 74 #include <sys/callout.h> 75 #ifdef __FreeBSD__ 76 #include <sys/bus.h> 77 #else 78 #include <machine/bus.h> 79 #endif 80 #include <sys/endian.h> 81 82 #include <machine/bus.h> 83 84 #include <net/if.h> 85 #include <net/if_dl.h> 86 #include <net/if_media.h> 87 #include <net/if_arp.h> 88 #ifdef __FreeBSD__ 89 #include <net/ethernet.h> 90 #else 91 #include <net/if_ether.h> 92 #endif 93 #include <net/if_llc.h> 94 95 #include <net80211/ieee80211_var.h> 96 #include <net80211/ieee80211_compat.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #endif 101 102 #ifdef INET 103 #include <netinet/in.h> 104 #endif 105 106 #include <dev/ic/athcompat.h> 107 108 #define AR_DEBUG 109 #ifdef __FreeBSD__ 110 #include <dev/ath/if_athvar.h> 111 #include <contrib/dev/ath/ah_desc.h> 112 #else 113 #include <dev/ic/athvar.h> 114 #include <../contrib/sys/dev/ic/athhal_desc.h> 115 #endif 116 117 /* unaligned little endian access */ 118 #define LE_READ_2(p) \ 119 ((u_int16_t) \ 120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 121 #define LE_READ_4(p) \ 122 ((u_int32_t) \ 123 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 124 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 125 126 #ifdef __FreeBSD__ 127 static void ath_init(void *); 128 #else 129 static int ath_init(struct ifnet *); 130 #endif 131 static int ath_init1(struct ath_softc *); 132 static int ath_intr1(struct ath_softc *); 133 static void ath_stop(struct ifnet *); 134 static void ath_start(struct ifnet *); 135 static void ath_reset(struct ath_softc *); 136 static int ath_media_change(struct ifnet *); 137 static void ath_watchdog(struct ifnet *); 138 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 139 static void ath_fatal_proc(void *, int); 140 static void ath_rxorn_proc(void *, int); 141 static void ath_bmiss_proc(void *, int); 142 static void ath_initkeytable(struct ath_softc *); 143 static void ath_mode_init(struct ath_softc *); 144 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 145 static void ath_beacon_proc(void *, int); 146 static void ath_beacon_free(struct ath_softc *); 147 static void ath_beacon_config(struct ath_softc *); 148 static int ath_desc_alloc(struct ath_softc *); 149 static void ath_desc_free(struct ath_softc *); 150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 151 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 152 static void ath_node_copy(struct ieee80211com *, 153 struct ieee80211_node *, const struct ieee80211_node *); 154 static u_int8_t ath_node_getrssi(struct ieee80211com *, 155 struct ieee80211_node *); 156 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 157 static void ath_rx_proc(void *, int); 158 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 159 struct ath_buf *, struct mbuf *); 160 static void ath_tx_proc(void *, int); 161 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 162 static void ath_draintxq(struct ath_softc *); 163 static void ath_stoprecv(struct ath_softc *); 164 static int ath_startrecv(struct ath_softc *); 165 static void ath_next_scan(void *); 166 static void ath_calibrate(void *); 167 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 168 static void ath_newassoc(struct ieee80211com *, 169 struct ieee80211_node *, int); 170 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor); 171 172 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 173 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 174 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 175 static void ath_rate_ctl(void *, struct ieee80211_node *); 176 177 #ifdef __NetBSD__ 178 int ath_enable(struct ath_softc *); 179 void ath_disable(struct ath_softc *); 180 void ath_power(int, void *); 181 #endif 182 183 #ifdef __FreeBSD__ 184 SYSCTL_DECL(_hw_ath); 185 /* XXX validate sysctl values */ 186 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 187 0, "channel dwell time (ms) for AP/station scanning"); 188 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 189 0, "chip calibration interval (secs)"); 190 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 191 0, "enable/disable outdoor operation"); 192 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 193 0, "country code"); 194 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 195 0, "regulatory domain"); 196 #endif /* __FreeBSD__ */ 197 198 static int ath_dwelltime = 200; /* 5 channels/second */ 199 static int ath_calinterval = 30; /* calibrate every 30 secs */ 200 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 201 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 202 static int ath_regdomain = 0; /* regulatory domain */ 203 204 #ifdef AR_DEBUG 205 int ath_debug = 0; 206 #ifdef __FreeBSD__ 207 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 208 0, "control debugging printfs"); 209 #endif /* __FreeBSD__ */ 210 #define IFF_DUMPPKTS(_ifp) \ 211 (ath_debug || \ 212 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 213 static void ath_printrxbuf(struct ath_buf *bf, int); 214 static void ath_printtxbuf(struct ath_buf *bf, int); 215 #define DPRINTF(X) if (ath_debug) printf X 216 #define DPRINTF2(X) if (ath_debug > 1) printf X 217 #else 218 #define IFF_DUMPPKTS(_ifp) \ 219 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 220 #define DPRINTF(X) 221 #define DPRINTF2(X) 222 #endif 223 224 #ifdef __NetBSD__ 225 int 226 ath_activate(struct device *self, enum devact act) 227 { 228 struct ath_softc *sc = (struct ath_softc *)self; 229 int rv = 0, s; 230 231 s = splnet(); 232 switch (act) { 233 case DVACT_ACTIVATE: 234 rv = EOPNOTSUPP; 235 break; 236 case DVACT_DEACTIVATE: 237 if_deactivate(&sc->sc_ic.ic_if); 238 break; 239 } 240 splx(s); 241 return rv; 242 } 243 244 int 245 ath_enable(struct ath_softc *sc) 246 { 247 if (ATH_IS_ENABLED(sc) == 0) { 248 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 249 printf("%s: device enable failed\n", 250 sc->sc_dev.dv_xname); 251 return (EIO); 252 } 253 sc->sc_flags |= ATH_ENABLED; 254 } 255 return (0); 256 } 257 258 void 259 ath_disable(struct ath_softc *sc) 260 { 261 if (!ATH_IS_ENABLED(sc)) 262 return; 263 if (sc->sc_disable != NULL) 264 (*sc->sc_disable)(sc); 265 sc->sc_flags &= ~ATH_ENABLED; 266 } 267 #endif /* #ifdef __NetBSD__ */ 268 269 int 270 ath_attach(u_int16_t devid, struct ath_softc *sc) 271 { 272 struct ieee80211com *ic = &sc->sc_ic; 273 struct ifnet *ifp = &ic->ic_if; 274 struct ath_hal *ah; 275 HAL_STATUS status; 276 int error = 0; 277 278 DPRINTF(("ath_attach: devid 0x%x\n", devid)); 279 280 #ifdef __FreeBSD__ 281 /* set these up early for if_printf use */ 282 if_initname(ifp, device_get_name(sc->sc_dev), 283 device_get_unit(sc->sc_dev)); 284 #else 285 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 286 #endif 287 288 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 289 if (ah == NULL) { 290 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 291 status); 292 error = ENXIO; 293 goto bad; 294 } 295 if (ah->ah_abi != HAL_ABI_VERSION) { 296 if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n", 297 ah->ah_abi, HAL_ABI_VERSION); 298 error = ENXIO; 299 goto bad; 300 } 301 if_printf(ifp, "mac %d.%d phy %d.%d", 302 ah->ah_macVersion, ah->ah_macRev, 303 ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf); 304 if (ah->ah_analog5GhzRev) 305 printf(" 5ghz radio %d.%d", 306 ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf); 307 if (ah->ah_analog2GhzRev) 308 printf(" 2ghz radio %d.%d", 309 ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf); 310 printf("\n"); 311 sc->sc_ah = ah; 312 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 313 314 /* 315 * Collect the channel list using the default country 316 * code and including outdoor channels. The 802.11 layer 317 * is resposible for filtering this list based on settings 318 * like the phy mode. 319 */ 320 error = ath_getchannels(sc, ath_countrycode, ath_outdoor); 321 if (error != 0) 322 goto bad; 323 /* 324 * Copy these back; they are set as a side effect 325 * of constructing the channel list. 326 */ 327 ath_regdomain = ath_hal_getregdomain(ah); 328 ath_countrycode = ath_hal_getcountrycode(ah); 329 330 /* 331 * Setup rate tables for all potential media types. 332 */ 333 ath_rate_setup(sc, IEEE80211_MODE_11A); 334 ath_rate_setup(sc, IEEE80211_MODE_11B); 335 ath_rate_setup(sc, IEEE80211_MODE_11G); 336 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 337 338 error = ath_desc_alloc(sc); 339 if (error != 0) { 340 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 341 goto bad; 342 } 343 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 344 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 345 346 #ifdef __FreeBSD__ 347 ATH_TXBUF_LOCK_INIT(sc); 348 ATH_TXQ_LOCK_INIT(sc); 349 #endif 350 351 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 352 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 353 ATH_TASK_INIT(&sc->sc_swbatask, ath_beacon_proc, sc); 354 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 355 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 356 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 357 358 /* 359 * For now just pre-allocate one data queue and one 360 * beacon queue. Note that the HAL handles resetting 361 * them at the needed time. Eventually we'll want to 362 * allocate more tx queues for splitting management 363 * frames and for QOS support. 364 */ 365 sc->sc_txhalq = ath_hal_setuptxqueue(ah, 366 HAL_TX_QUEUE_DATA, 367 AH_TRUE /* enable interrupts */ 368 ); 369 if (sc->sc_txhalq == (u_int) -1) { 370 if_printf(ifp, "unable to setup a data xmit queue!\n"); 371 goto bad; 372 } 373 sc->sc_bhalq = ath_hal_setuptxqueue(ah, 374 HAL_TX_QUEUE_BEACON, 375 AH_TRUE /* enable interrupts */ 376 ); 377 if (sc->sc_bhalq == (u_int) -1) { 378 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 379 goto bad; 380 } 381 382 ifp->if_softc = sc; 383 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 384 ifp->if_start = ath_start; 385 ifp->if_watchdog = ath_watchdog; 386 ifp->if_ioctl = ath_ioctl; 387 ifp->if_init = ath_init; 388 #ifdef __FreeBSD__ 389 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 390 #else 391 #if 0 392 ifp->if_stop = ath_stop; /* XXX */ 393 #endif 394 IFQ_SET_READY(&ifp->if_snd); 395 #endif 396 397 ic->ic_softc = sc; 398 ic->ic_newassoc = ath_newassoc; 399 /* XXX not right but it's not used anywhere important */ 400 ic->ic_phytype = IEEE80211_T_OFDM; 401 ic->ic_opmode = IEEE80211_M_STA; 402 ic->ic_caps = IEEE80211_C_WEP /* wep supported */ 403 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 404 | IEEE80211_C_HOSTAP /* hostap mode */ 405 | IEEE80211_C_MONITOR /* monitor mode */ 406 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 407 | IEEE80211_C_RCVMGT; /* recv management frames */ 408 409 /* get mac address from hardware */ 410 ath_hal_getmac(ah, ic->ic_myaddr); 411 412 #ifdef __NetBSD__ 413 if_attach(ifp); 414 #endif 415 /* call MI attach routine. */ 416 ieee80211_ifattach(ifp); 417 /* override default methods */ 418 ic->ic_node_alloc = ath_node_alloc; 419 ic->ic_node_free = ath_node_free; 420 ic->ic_node_copy = ath_node_copy; 421 ic->ic_node_getrssi = ath_node_getrssi; 422 sc->sc_newstate = ic->ic_newstate; 423 ic->ic_newstate = ath_newstate; 424 /* complete initialization */ 425 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 426 427 #if NBPFILTER > 0 428 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 429 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 430 &sc->sc_drvbpf); 431 #endif 432 /* 433 * Initialize constant fields. 434 * 435 * NB: the channel is setup each time we transition to the 436 * RUN state to avoid filling it in for each frame. 437 */ 438 sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th); 439 sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT; 440 441 sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th); 442 sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT; 443 444 if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr)); 445 446 #ifdef __NetBSD__ 447 sc->sc_flags |= ATH_ATTACHED; 448 /* 449 * Make sure the interface is shutdown during reboot. 450 */ 451 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 452 if (sc->sc_sdhook == NULL) 453 printf("%s: WARNING: unable to establish shutdown hook\n", 454 sc->sc_dev.dv_xname); 455 sc->sc_powerhook = powerhook_establish(ath_power, sc); 456 if (sc->sc_powerhook == NULL) 457 printf("%s: WARNING: unable to establish power hook\n", 458 sc->sc_dev.dv_xname); 459 #endif 460 return 0; 461 bad: 462 if (ah) 463 ath_hal_detach(ah); 464 sc->sc_invalid = 1; 465 return error; 466 } 467 468 int 469 ath_detach(struct ath_softc *sc) 470 { 471 struct ifnet *ifp = &sc->sc_ic.ic_if; 472 ath_softc_critsect_decl(s); 473 474 DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags)); 475 if ((sc->sc_flags & ATH_ATTACHED) == 0) 476 return (0); 477 478 ath_softc_critsect_begin(sc, s); 479 ath_stop(ifp); 480 #if NBPFILTER > 0 481 bpfdetach(ifp); 482 #endif 483 ath_desc_free(sc); 484 ath_hal_detach(sc->sc_ah); 485 ieee80211_ifdetach(ifp); 486 #ifdef __NetBSD__ 487 if_detach(ifp); 488 #endif /* __NetBSD__ */ 489 ath_softc_critsect_end(sc, s); 490 #ifdef __NetBSD__ 491 powerhook_disestablish(sc->sc_powerhook); 492 shutdownhook_disestablish(sc->sc_sdhook); 493 #endif /* __NetBSD__ */ 494 #ifdef __FreeBSD__ 495 496 ATH_TXBUF_LOCK_DESTROY(sc); 497 ATH_TXQ_LOCK_DESTROY(sc); 498 499 #endif /* __FreeBSD__ */ 500 return 0; 501 } 502 503 #ifdef __NetBSD__ 504 void 505 ath_power(int why, void *arg) 506 { 507 struct ath_softc *sc = arg; 508 int s; 509 510 DPRINTF(("ath_power(%d)\n", why)); 511 512 s = splnet(); 513 switch (why) { 514 case PWR_SUSPEND: 515 case PWR_STANDBY: 516 ath_suspend(sc, why); 517 break; 518 case PWR_RESUME: 519 ath_resume(sc, why); 520 break; 521 case PWR_SOFTSUSPEND: 522 case PWR_SOFTSTANDBY: 523 case PWR_SOFTRESUME: 524 break; 525 } 526 splx(s); 527 } 528 #endif 529 530 void 531 ath_suspend(struct ath_softc *sc, int why) 532 { 533 struct ifnet *ifp = &sc->sc_ic.ic_if; 534 535 DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags)); 536 537 ath_stop(ifp); 538 if (sc->sc_power != NULL) 539 (*sc->sc_power)(sc, why); 540 } 541 542 void 543 ath_resume(struct ath_softc *sc, int why) 544 { 545 struct ifnet *ifp = &sc->sc_ic.ic_if; 546 547 DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags)); 548 549 if (ifp->if_flags & IFF_UP) { 550 ath_init(ifp); 551 #if 0 552 (void)ath_intr(sc); 553 #endif 554 if (sc->sc_power != NULL) 555 (*sc->sc_power)(sc, why); 556 if (ifp->if_flags & IFF_RUNNING) 557 ath_start(ifp); 558 } 559 } 560 561 #ifdef __NetBSD__ 562 void 563 ath_shutdown(void *arg) 564 { 565 struct ath_softc *sc = arg; 566 567 ath_stop(&sc->sc_ic.ic_if); 568 } 569 #else 570 void 571 ath_shutdown(struct ath_softc *sc) 572 { 573 #if 1 574 return; 575 #else 576 struct ifnet *ifp = &sc->sc_ic.ic_if; 577 578 DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags)); 579 580 ath_stop(ifp); 581 #endif 582 } 583 #endif 584 585 #ifdef __NetBSD__ 586 int 587 ath_intr(void *arg) 588 { 589 return ath_intr1((struct ath_softc *)arg); 590 } 591 #else 592 void 593 ath_intr(void *arg) 594 { 595 (void)ath_intr1((struct ath_softc *)arg); 596 } 597 #endif 598 599 static int 600 ath_intr1(struct ath_softc *sc) 601 { 602 struct ieee80211com *ic = &sc->sc_ic; 603 struct ifnet *ifp = &ic->ic_if; 604 struct ath_hal *ah = sc->sc_ah; 605 HAL_INT status; 606 607 if (sc->sc_invalid) { 608 /* 609 * The hardware is not ready/present, don't touch anything. 610 * Note this can happen early on if the IRQ is shared. 611 */ 612 DPRINTF(("ath_intr: invalid; ignored\n")); 613 return 0; 614 } 615 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 616 DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags)); 617 ath_hal_getisr(ah, &status); /* clear ISR */ 618 ath_hal_intrset(ah, 0); /* disable further intr's */ 619 return 1; /* XXX */ 620 } 621 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 622 DPRINTF2(("ath_intr: status 0x%x\n", status)); 623 #ifdef AR_DEBUG 624 if (ath_debug && 625 (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) { 626 if_printf(ifp, "ath_intr: status 0x%x\n", status); 627 ath_hal_dumpstate(ah); 628 } 629 #endif /* AR_DEBUG */ 630 status &= sc->sc_imask; /* discard unasked for bits */ 631 if (status & HAL_INT_FATAL) { 632 sc->sc_stats.ast_hardware++; 633 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 634 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 635 } else if (status & HAL_INT_RXORN) { 636 sc->sc_stats.ast_rxorn++; 637 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 638 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 639 } else { 640 if (status & HAL_INT_RXEOL) { 641 /* 642 * NB: the hardware should re-read the link when 643 * RXE bit is written, but it doesn't work at 644 * least on older hardware revs. 645 */ 646 sc->sc_stats.ast_rxeol++; 647 sc->sc_rxlink = NULL; 648 } 649 if (status & HAL_INT_TXURN) { 650 sc->sc_stats.ast_txurn++; 651 /* bump tx trigger level */ 652 ath_hal_updatetxtriglevel(ah, AH_TRUE); 653 } 654 if (status & HAL_INT_RX) 655 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 656 if (status & HAL_INT_TX) 657 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 658 if (status & HAL_INT_SWBA) 659 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_swbatask); 660 if (status & HAL_INT_BMISS) { 661 sc->sc_stats.ast_bmiss++; 662 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 663 } 664 } 665 return 1; 666 } 667 668 static void 669 ath_fatal_proc(void *arg, int pending) 670 { 671 struct ath_softc *sc = arg; 672 673 device_printf(sc->sc_dev, "hardware error; resetting\n"); 674 ath_reset(sc); 675 } 676 677 static void 678 ath_rxorn_proc(void *arg, int pending) 679 { 680 struct ath_softc *sc = arg; 681 682 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 683 ath_reset(sc); 684 } 685 686 static void 687 ath_bmiss_proc(void *arg, int pending) 688 { 689 struct ath_softc *sc = arg; 690 struct ieee80211com *ic = &sc->sc_ic; 691 692 DPRINTF(("ath_bmiss_proc: pending %u\n", pending)); 693 if (ic->ic_opmode != IEEE80211_M_STA) 694 return; 695 if (ic->ic_state == IEEE80211_S_RUN) { 696 /* 697 * Rather than go directly to scan state, try to 698 * reassociate first. If that fails then the state 699 * machine will drop us into scanning after timing 700 * out waiting for a probe response. 701 */ 702 ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1); 703 } 704 } 705 706 static u_int 707 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 708 { 709 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 710 711 switch (mode) { 712 case IEEE80211_MODE_AUTO: 713 return 0; 714 case IEEE80211_MODE_11A: 715 return CHANNEL_A; 716 case IEEE80211_MODE_11B: 717 return CHANNEL_B; 718 case IEEE80211_MODE_11G: 719 return CHANNEL_PUREG; 720 case IEEE80211_MODE_TURBO: 721 return CHANNEL_T; 722 default: 723 panic("%s: unsupported mode %d\n", __func__, mode); 724 return 0; 725 } 726 } 727 728 #ifdef __NetBSD__ 729 static int 730 ath_init(struct ifnet *ifp) 731 { 732 return ath_init1((struct ath_softc *)ifp->if_softc); 733 } 734 #else 735 static void 736 ath_init(void *arg) 737 { 738 (void)ath_init1((struct ath_softc *)arg); 739 } 740 #endif 741 742 static int 743 ath_init1(struct ath_softc *sc) 744 { 745 struct ieee80211com *ic = &sc->sc_ic; 746 struct ifnet *ifp = &ic->ic_if; 747 struct ieee80211_node *ni; 748 enum ieee80211_phymode mode; 749 struct ath_hal *ah = sc->sc_ah; 750 HAL_STATUS status; 751 HAL_CHANNEL hchan; 752 int error = 0; 753 ath_softc_critsect_decl(s); 754 755 DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags)); 756 757 #ifdef __NetBSD__ 758 if ((error = ath_enable(sc)) != 0) 759 return error; 760 #endif 761 762 ath_softc_critsect_begin(sc, s); 763 /* 764 * Stop anything previously setup. This is safe 765 * whether this is the first time through or not. 766 */ 767 ath_stop(ifp); 768 769 /* 770 * The basic interface to setting the hardware in a good 771 * state is ``reset''. On return the hardware is known to 772 * be powered up and with interrupts disabled. This must 773 * be followed by initialization of the appropriate bits 774 * and then setup of the interrupt mask. 775 */ 776 hchan.channel = ic->ic_ibss_chan->ic_freq; 777 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 778 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 779 if_printf(ifp, "unable to reset hardware; hal status %u\n", 780 status); 781 error = -1; 782 goto done; 783 } 784 785 /* 786 * Setup the hardware after reset: the key cache 787 * is filled as needed and the receive engine is 788 * set going. Frame transmit is handled entirely 789 * in the frame output path; there's nothing to do 790 * here except setup the interrupt mask. 791 */ 792 if (ic->ic_flags & IEEE80211_F_WEPON) 793 ath_initkeytable(sc); 794 if ((error = ath_startrecv(sc)) != 0) { 795 if_printf(ifp, "unable to start recv logic\n"); 796 goto done; 797 } 798 799 /* 800 * Enable interrupts. 801 */ 802 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 803 | HAL_INT_RXEOL | HAL_INT_RXORN 804 | HAL_INT_FATAL | HAL_INT_GLOBAL; 805 ath_hal_intrset(ah, sc->sc_imask); 806 807 ifp->if_flags |= IFF_RUNNING; 808 ic->ic_state = IEEE80211_S_INIT; 809 810 /* 811 * The hardware should be ready to go now so it's safe 812 * to kick the 802.11 state machine as it's likely to 813 * immediately call back to us to send mgmt frames. 814 */ 815 ni = ic->ic_bss; 816 ni->ni_chan = ic->ic_ibss_chan; 817 mode = ieee80211_chan2mode(ic, ni->ni_chan); 818 if (mode != sc->sc_curmode) 819 ath_setcurmode(sc, mode); 820 if (ic->ic_opmode != IEEE80211_M_MONITOR) 821 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 822 else 823 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 824 done: 825 ath_softc_critsect_end(sc, s); 826 return error; 827 } 828 829 static void 830 ath_stop(struct ifnet *ifp) 831 { 832 struct ieee80211com *ic = (struct ieee80211com *) ifp; 833 struct ath_softc *sc = ifp->if_softc; 834 struct ath_hal *ah = sc->sc_ah; 835 ath_softc_critsect_decl(s); 836 837 DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n", 838 sc->sc_invalid, ifp->if_flags)); 839 840 ath_softc_critsect_begin(sc, s); 841 if (ifp->if_flags & IFF_RUNNING) { 842 /* 843 * Shutdown the hardware and driver: 844 * disable interrupts 845 * turn off timers 846 * clear transmit machinery 847 * clear receive machinery 848 * drain and release tx queues 849 * reclaim beacon resources 850 * reset 802.11 state machine 851 * power down hardware 852 * 853 * Note that some of this work is not possible if the 854 * hardware is gone (invalid). 855 */ 856 ifp->if_flags &= ~IFF_RUNNING; 857 ifp->if_timer = 0; 858 if (!sc->sc_invalid) 859 ath_hal_intrset(ah, 0); 860 ath_draintxq(sc); 861 if (!sc->sc_invalid) 862 ath_stoprecv(sc); 863 else 864 sc->sc_rxlink = NULL; 865 #ifdef __FreeBSD__ 866 IF_DRAIN(&ifp->if_snd); 867 #else 868 IF_PURGE(&ifp->if_snd); 869 #endif 870 ath_beacon_free(sc); 871 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 872 if (!sc->sc_invalid) { 873 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 874 } 875 #ifdef __NetBSD__ 876 ath_disable(sc); 877 #endif 878 } 879 ath_softc_critsect_end(sc, s); 880 } 881 882 /* 883 * Reset the hardware w/o losing operational state. This is 884 * basically a more efficient way of doing ath_stop, ath_init, 885 * followed by state transitions to the current 802.11 886 * operational state. Used to recover from errors rx overrun 887 * and to reset the hardware when rf gain settings must be reset. 888 */ 889 static void 890 ath_reset(struct ath_softc *sc) 891 { 892 struct ieee80211com *ic = &sc->sc_ic; 893 struct ifnet *ifp = &ic->ic_if; 894 struct ath_hal *ah = sc->sc_ah; 895 struct ieee80211_channel *c; 896 HAL_STATUS status; 897 HAL_CHANNEL hchan; 898 899 /* 900 * Convert to a HAL channel description with the flags 901 * constrained to reflect the current operating mode. 902 */ 903 c = ic->ic_ibss_chan; 904 hchan.channel = c->ic_freq; 905 hchan.channelFlags = ath_chan2flags(ic, c); 906 907 ath_hal_intrset(ah, 0); /* disable interrupts */ 908 ath_draintxq(sc); /* stop xmit side */ 909 ath_stoprecv(sc); /* stop recv side */ 910 /* NB: indicate channel change so we do a full reset */ 911 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 912 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 913 __func__, status); 914 ath_hal_intrset(ah, sc->sc_imask); 915 if (ath_startrecv(sc) != 0) /* restart recv */ 916 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 917 ath_start(ifp); /* restart xmit */ 918 if (ic->ic_state == IEEE80211_S_RUN) 919 ath_beacon_config(sc); /* restart beacons */ 920 } 921 922 static void 923 ath_start(struct ifnet *ifp) 924 { 925 struct ath_softc *sc = ifp->if_softc; 926 struct ath_hal *ah = sc->sc_ah; 927 struct ieee80211com *ic = &sc->sc_ic; 928 struct ieee80211_node *ni; 929 struct ath_buf *bf; 930 struct mbuf *m; 931 struct ieee80211_frame *wh; 932 ath_txbuf_critsect_decl(s); 933 934 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 935 return; 936 for (;;) { 937 /* 938 * Grab a TX buffer and associated resources. 939 */ 940 ath_txbuf_critsect_begin(sc, s); 941 bf = TAILQ_FIRST(&sc->sc_txbuf); 942 if (bf != NULL) 943 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 944 ath_txbuf_critsect_end(sc, s); 945 if (bf == NULL) { 946 DPRINTF(("ath_start: out of xmit buffers\n")); 947 sc->sc_stats.ast_tx_qstop++; 948 ifp->if_flags |= IFF_OACTIVE; 949 break; 950 } 951 /* 952 * Poll the management queue for frames; they 953 * have priority over normal data frames. 954 */ 955 IF_DEQUEUE(&ic->ic_mgtq, m); 956 if (m == NULL) { 957 /* 958 * No data frames go out unless we're associated. 959 */ 960 if (ic->ic_state != IEEE80211_S_RUN) { 961 DPRINTF(("ath_start: ignore data packet, " 962 "state %u\n", ic->ic_state)); 963 sc->sc_stats.ast_tx_discard++; 964 ath_txbuf_critsect_begin(sc, s); 965 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 966 ath_txbuf_critsect_end(sc, s); 967 break; 968 } 969 IF_DEQUEUE(&ifp->if_snd, m); 970 if (m == NULL) { 971 ath_txbuf_critsect_begin(sc, s); 972 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 973 ath_txbuf_critsect_end(sc, s); 974 break; 975 } 976 ifp->if_opackets++; 977 978 #ifdef __NetBSD__ 979 #if NBPFILTER > 0 980 if (ifp->if_bpf) 981 bpf_mtap(ifp->if_bpf, m); 982 #endif 983 #endif 984 #ifdef __FreeBSD__ 985 BPF_MTAP(ifp, m); 986 #endif 987 /* 988 * Encapsulate the packet in prep for transmission. 989 */ 990 m = ieee80211_encap(ifp, m, &ni); 991 if (m == NULL) { 992 DPRINTF(("ath_start: encapsulation failure\n")); 993 sc->sc_stats.ast_tx_encap++; 994 goto bad; 995 } 996 wh = mtod(m, struct ieee80211_frame *); 997 if (ic->ic_flags & IEEE80211_F_WEPON) 998 wh->i_fc[1] |= IEEE80211_FC1_WEP; 999 } else { 1000 /* 1001 * Hack! The referenced node pointer is in the 1002 * rcvif field of the packet header. This is 1003 * placed there by ieee80211_mgmt_output because 1004 * we need to hold the reference with the frame 1005 * and there's no other way (other than packet 1006 * tags which we consider too expensive to use) 1007 * to pass it along. 1008 */ 1009 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1010 m->m_pkthdr.rcvif = NULL; 1011 1012 wh = mtod(m, struct ieee80211_frame *); 1013 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1014 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 1015 /* fill time stamp */ 1016 u_int64_t tsf; 1017 u_int32_t *tstamp; 1018 1019 tsf = ath_hal_gettsf64(ah); 1020 /* XXX: adjust 100us delay to xmit */ 1021 tsf += 100; 1022 tstamp = (u_int32_t *)&wh[1]; 1023 tstamp[0] = htole32(tsf & 0xffffffff); 1024 tstamp[1] = htole32(tsf >> 32); 1025 } 1026 sc->sc_stats.ast_tx_mgmt++; 1027 } 1028 #if NBPFILTER > 0 1029 if (ic->ic_rawbpf) 1030 bpf_mtap(ic->ic_rawbpf, m); 1031 #endif 1032 1033 #if NBPFILTER > 0 1034 if (sc->sc_drvbpf) { 1035 #ifdef __FreeBSD__ 1036 struct mbuf *mb; 1037 1038 MGETHDR(mb, M_DONTWAIT, m->m_type); 1039 if (mb != NULL) { 1040 sc->sc_tx_th.wt_rate = 1041 ni->ni_rates.rs_rates[ni->ni_txrate]; 1042 1043 mb->m_next = m; 1044 mb->m_data = (caddr_t)&sc->sc_tx_th; 1045 mb->m_len = sizeof(sc->sc_tx_th); 1046 mb->m_pkthdr.len += mb->m_len; 1047 bpf_mtap(sc->sc_drvbpf, mb); 1048 m_free(mb); 1049 } 1050 #else 1051 struct mbuf mb; 1052 1053 M_COPY_PKTHDR(&mb, m); 1054 sc->sc_tx_th.wt_rate = 1055 ni->ni_rates.rs_rates[ni->ni_txrate]; 1056 1057 mb.m_next = m; 1058 mb.m_data = (caddr_t)&sc->sc_tx_th; 1059 mb.m_len = sizeof(sc->sc_tx_th); 1060 mb.m_pkthdr.len += mb.m_len; 1061 bpf_mtap(sc->sc_drvbpf, &mb); 1062 #endif 1063 } 1064 #endif 1065 1066 if (ath_tx_start(sc, ni, bf, m)) { 1067 bad: 1068 ath_txbuf_critsect_begin(sc, s); 1069 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1070 ath_txbuf_critsect_end(sc, s); 1071 ifp->if_oerrors++; 1072 if (ni && ni != ic->ic_bss) 1073 ieee80211_free_node(ic, ni); 1074 continue; 1075 } 1076 1077 sc->sc_tx_timer = 5; 1078 ifp->if_timer = 1; 1079 } 1080 } 1081 1082 static int 1083 ath_media_change(struct ifnet *ifp) 1084 { 1085 int error; 1086 1087 error = ieee80211_media_change(ifp); 1088 if (error == ENETRESET) { 1089 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1090 (IFF_RUNNING|IFF_UP)) 1091 ath_init(ifp); /* XXX lose error */ 1092 error = 0; 1093 } 1094 return error; 1095 } 1096 1097 static void 1098 ath_watchdog(struct ifnet *ifp) 1099 { 1100 struct ath_softc *sc = ifp->if_softc; 1101 struct ieee80211com *ic = &sc->sc_ic; 1102 1103 ifp->if_timer = 0; 1104 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1105 return; 1106 if (sc->sc_tx_timer) { 1107 if (--sc->sc_tx_timer == 0) { 1108 if_printf(ifp, "device timeout\n"); 1109 #ifdef AR_DEBUG 1110 if (ath_debug) 1111 ath_hal_dumpstate(sc->sc_ah); 1112 #endif /* AR_DEBUG */ 1113 ath_init(ifp); /* XXX ath_reset??? */ 1114 ifp->if_oerrors++; 1115 sc->sc_stats.ast_watchdog++; 1116 return; 1117 } 1118 ifp->if_timer = 1; 1119 } 1120 if (ic->ic_fixed_rate == -1) { 1121 /* 1122 * Run the rate control algorithm if we're not 1123 * locked at a fixed rate. 1124 */ 1125 if (ic->ic_opmode == IEEE80211_M_STA) 1126 ath_rate_ctl(sc, ic->ic_bss); 1127 else 1128 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1129 } 1130 ieee80211_watchdog(ifp); 1131 } 1132 1133 static int 1134 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1135 { 1136 struct ath_softc *sc = ifp->if_softc; 1137 struct ifreq *ifr = (struct ifreq *)data; 1138 int error = 0; 1139 ath_softc_critsect_decl(s); 1140 1141 ath_softc_critsect_begin(sc, s); 1142 switch (cmd) { 1143 case SIOCSIFFLAGS: 1144 if (ifp->if_flags & IFF_UP) { 1145 if (ifp->if_flags & IFF_RUNNING) { 1146 /* 1147 * To avoid rescanning another access point, 1148 * do not call ath_init() here. Instead, 1149 * only reflect promisc mode settings. 1150 */ 1151 ath_mode_init(sc); 1152 } else { 1153 /* 1154 * Beware of being called during detach to 1155 * reset promiscuous mode. In that case we 1156 * will still be marked UP but not RUNNING. 1157 * However trying to re-init the interface 1158 * is the wrong thing to do as we've already 1159 * torn down much of our state. There's 1160 * probably a better way to deal with this. 1161 */ 1162 if (!sc->sc_invalid) 1163 ath_init(ifp); /* XXX lose error */ 1164 } 1165 } else 1166 ath_stop(ifp); 1167 break; 1168 case SIOCADDMULTI: 1169 case SIOCDELMULTI: 1170 #ifdef __FreeBSD__ 1171 /* 1172 * The upper layer has already installed/removed 1173 * the multicast address(es), just recalculate the 1174 * multicast filter for the card. 1175 */ 1176 if (ifp->if_flags & IFF_RUNNING) 1177 ath_mode_init(sc); 1178 #endif 1179 #ifdef __NetBSD__ 1180 error = (cmd == SIOCADDMULTI) ? 1181 ether_addmulti(ifr, &sc->sc_ic.ic_ec) : 1182 ether_delmulti(ifr, &sc->sc_ic.ic_ec); 1183 if (error == ENETRESET) { 1184 if (ifp->if_flags & IFF_RUNNING) 1185 ath_mode_init(sc); 1186 error = 0; 1187 } 1188 #endif 1189 break; 1190 case SIOCGATHSTATS: 1191 error = copyout(&sc->sc_stats, 1192 ifr->ifr_data, sizeof (sc->sc_stats)); 1193 break; 1194 case SIOCGATHDIAG: { 1195 struct ath_diag *ad = (struct ath_diag *)data; 1196 struct ath_hal *ah = sc->sc_ah; 1197 void *data; 1198 u_int size; 1199 1200 if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) { 1201 if (size < ad->ad_size) 1202 ad->ad_size = size; 1203 if (data) 1204 error = copyout(data, ad->ad_data, ad->ad_size); 1205 } else 1206 error = EINVAL; 1207 break; 1208 } 1209 default: 1210 error = ieee80211_ioctl(ifp, cmd, data); 1211 if (error == ENETRESET) { 1212 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1213 (IFF_RUNNING|IFF_UP)) 1214 ath_init(ifp); /* XXX lose error */ 1215 error = 0; 1216 } 1217 break; 1218 } 1219 ath_softc_critsect_end(sc, s); 1220 return error; 1221 } 1222 1223 /* 1224 * Fill the hardware key cache with key entries. 1225 */ 1226 static void 1227 ath_initkeytable(struct ath_softc *sc) 1228 { 1229 struct ieee80211com *ic = &sc->sc_ic; 1230 struct ath_hal *ah = sc->sc_ah; 1231 int i; 1232 1233 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1234 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1235 if (k->wk_len == 0) 1236 ath_hal_keyreset(ah, i); 1237 else 1238 /* XXX return value */ 1239 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 1240 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 1241 } 1242 } 1243 1244 static void 1245 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1246 { 1247 u_int32_t val; 1248 u_int8_t pos; 1249 1250 val = LE_READ_4(dl + 0); 1251 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1252 val = LE_READ_4(dl + 3); 1253 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1254 pos &= 0x3f; 1255 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1256 } 1257 1258 #ifdef __FreeBSD__ 1259 static void 1260 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1261 { 1262 struct ieee80211com *ic = &sc->sc_ic; 1263 struct ifnet *ifp = &ic->ic_if; 1264 struct ifmultiaddr *ifma; 1265 1266 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1267 caddr_t dl; 1268 1269 /* calculate XOR of eight 6bit values */ 1270 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1271 ath_mcastfilter_accum(dl, &mfilt); 1272 } 1273 } 1274 #else 1275 static void 1276 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1277 { 1278 struct ifnet *ifp = &sc->sc_ic.ic_if; 1279 struct ether_multi *enm; 1280 struct ether_multistep estep; 1281 1282 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1283 while (enm != NULL) { 1284 /* XXX Punt on ranges. */ 1285 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1286 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1287 ifp->if_flags |= IFF_ALLMULTI; 1288 return; 1289 } 1290 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1291 ETHER_NEXT_MULTI(estep, enm); 1292 } 1293 ifp->if_flags &= ~IFF_ALLMULTI; 1294 } 1295 #endif 1296 1297 /* 1298 * Calculate the receive filter according to the 1299 * operating mode and state: 1300 * 1301 * o always accept unicast, broadcast, and multicast traffic 1302 * o maintain current state of phy error reception 1303 * o probe request frames are accepted only when operating in 1304 * hostap, adhoc, or monitor modes 1305 * o enable promiscuous mode according to the interface state 1306 * o accept beacons: 1307 * - when operating in adhoc mode so the 802.11 layer creates 1308 * node table entries for peers, 1309 * - when operating in station mode for collecting rssi data when 1310 * the station is otherwise quiet, or 1311 * - when scanning 1312 */ 1313 static u_int32_t 1314 ath_calcrxfilter(struct ath_softc *sc) 1315 { 1316 struct ieee80211com *ic = &sc->sc_ic; 1317 struct ath_hal *ah = sc->sc_ah; 1318 struct ifnet *ifp = &ic->ic_if; 1319 u_int32_t rfilt; 1320 1321 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1322 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1323 if (ic->ic_opmode != IEEE80211_M_STA) 1324 rfilt |= HAL_RX_FILTER_PROBEREQ; 1325 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 1326 (ifp->if_flags & IFF_PROMISC)) 1327 rfilt |= HAL_RX_FILTER_PROM; 1328 if (ic->ic_opmode == IEEE80211_M_STA || 1329 ic->ic_opmode == IEEE80211_M_IBSS || 1330 ic->ic_state == IEEE80211_S_SCAN) 1331 rfilt |= HAL_RX_FILTER_BEACON; 1332 return rfilt; 1333 } 1334 1335 static void 1336 ath_mode_init(struct ath_softc *sc) 1337 { 1338 struct ieee80211com *ic = &sc->sc_ic; 1339 struct ath_hal *ah = sc->sc_ah; 1340 u_int32_t rfilt, mfilt[2]; 1341 1342 /* configure rx filter */ 1343 rfilt = ath_calcrxfilter(sc); 1344 ath_hal_setrxfilter(ah, rfilt); 1345 1346 /* configure operational mode */ 1347 ath_hal_setopmode(ah, ic->ic_opmode); 1348 1349 /* calculate and install multicast filter */ 1350 #ifdef __FreeBSD__ 1351 if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) { 1352 mfilt[0] = mfilt[1] = 0; 1353 ath_mcastfilter_compute(sc, &mfilt); 1354 } else { 1355 mfilt[0] = mfilt[1] = ~0; 1356 } 1357 #endif 1358 #ifdef __NetBSD__ 1359 mfilt[0] = mfilt[1] = 0; 1360 ath_mcastfilter_compute(sc, &mfilt); 1361 #endif 1362 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1363 DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n", 1364 rfilt, mfilt[0], mfilt[1])); 1365 } 1366 1367 #ifdef __FreeBSD__ 1368 static void 1369 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1370 { 1371 struct ath_buf *bf = arg; 1372 1373 KASSERT(nseg <= ATH_MAX_SCATTER, 1374 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1375 bf->bf_mapsize = mapsize; 1376 bf->bf_nseg = nseg; 1377 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1378 } 1379 #endif /* __FreeBSD__ */ 1380 1381 static struct mbuf * 1382 ath_getmbuf(int flags, int type, u_int pktlen) 1383 { 1384 struct mbuf *m; 1385 1386 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1387 #ifdef __FreeBSD__ 1388 if (pktlen <= MHLEN) 1389 MGETHDR(m, flags, type); 1390 else 1391 m = m_getcl(flags, type, M_PKTHDR); 1392 #else 1393 MGETHDR(m, flags, type); 1394 if (m != NULL && pktlen > MHLEN) 1395 MCLGET(m, flags); 1396 #endif 1397 return m; 1398 } 1399 1400 static int 1401 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1402 { 1403 struct ieee80211com *ic = &sc->sc_ic; 1404 struct ifnet *ifp = &ic->ic_if; 1405 struct ath_hal *ah = sc->sc_ah; 1406 struct ieee80211_frame *wh; 1407 struct ath_buf *bf; 1408 struct ath_desc *ds; 1409 struct mbuf *m; 1410 int error, pktlen; 1411 u_int8_t *frm, rate; 1412 u_int16_t capinfo; 1413 struct ieee80211_rateset *rs; 1414 const HAL_RATE_TABLE *rt; 1415 1416 bf = sc->sc_bcbuf; 1417 if (bf->bf_m != NULL) { 1418 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1419 m_freem(bf->bf_m); 1420 bf->bf_m = NULL; 1421 bf->bf_node = NULL; 1422 } 1423 /* 1424 * NB: the beacon data buffer must be 32-bit aligned; 1425 * we assume the mbuf routines will return us something 1426 * with this alignment (perhaps should assert). 1427 */ 1428 rs = &ni->ni_rates; 1429 pktlen = sizeof (struct ieee80211_frame) 1430 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6; 1431 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1432 pktlen += 2; 1433 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1434 if (m == NULL) { 1435 DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n", 1436 pktlen)); 1437 sc->sc_stats.ast_be_nombuf++; 1438 return ENOMEM; 1439 } 1440 1441 wh = mtod(m, struct ieee80211_frame *); 1442 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1443 IEEE80211_FC0_SUBTYPE_BEACON; 1444 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1445 *(u_int16_t *)wh->i_dur = 0; 1446 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1447 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1448 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1449 *(u_int16_t *)wh->i_seq = 0; 1450 1451 /* 1452 * beacon frame format 1453 * [8] time stamp 1454 * [2] beacon interval 1455 * [2] cabability information 1456 * [tlv] ssid 1457 * [tlv] supported rates 1458 * [tlv] parameter set (IBSS) 1459 * [tlv] extended supported rates 1460 */ 1461 frm = (u_int8_t *)&wh[1]; 1462 memset(frm, 0, 8); /* timestamp is set by hardware */ 1463 frm += 8; 1464 *(u_int16_t *)frm = htole16(ni->ni_intval); 1465 frm += 2; 1466 if (ic->ic_opmode == IEEE80211_M_IBSS) 1467 capinfo = IEEE80211_CAPINFO_IBSS; 1468 else 1469 capinfo = IEEE80211_CAPINFO_ESS; 1470 if (ic->ic_flags & IEEE80211_F_WEPON) 1471 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1472 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1473 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 1474 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1475 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1476 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1477 *(u_int16_t *)frm = htole16(capinfo); 1478 frm += 2; 1479 *frm++ = IEEE80211_ELEMID_SSID; 1480 *frm++ = ni->ni_esslen; 1481 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1482 frm += ni->ni_esslen; 1483 frm = ieee80211_add_rates(frm, rs); 1484 *frm++ = IEEE80211_ELEMID_DSPARMS; 1485 *frm++ = 1; 1486 *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan); 1487 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1488 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1489 *frm++ = 2; 1490 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1491 } else { 1492 /* TODO: TIM */ 1493 *frm++ = IEEE80211_ELEMID_TIM; 1494 *frm++ = 4; /* length */ 1495 *frm++ = 0; /* DTIM count */ 1496 *frm++ = 1; /* DTIM period */ 1497 *frm++ = 0; /* bitmap control */ 1498 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1499 } 1500 frm = ieee80211_add_xrates(frm, rs); 1501 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1502 KASSERT(m->m_pkthdr.len <= pktlen, 1503 ("beacon bigger than expected, len %u calculated %u", 1504 m->m_pkthdr.len, pktlen)); 1505 1506 DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len)); 1507 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1508 if (error != 0) { 1509 m_freem(m); 1510 return error; 1511 } 1512 KASSERT(bf->bf_nseg == 1, 1513 ("ath_beacon_alloc: multi-segment packet; nseg %u", 1514 bf->bf_nseg)); 1515 bf->bf_m = m; 1516 1517 /* setup descriptors */ 1518 ds = bf->bf_desc; 1519 1520 ds->ds_link = 0; 1521 ds->ds_data = bf->bf_segs[0].ds_addr; 1522 1523 DPRINTF2(("%s: segaddr %p seglen %u\n", __func__, 1524 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1525 1526 /* 1527 * Calculate rate code. 1528 * XXX everything at min xmit rate 1529 */ 1530 rt = sc->sc_currates; 1531 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1532 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1533 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1534 else 1535 rate = rt->info[0].rateCode; 1536 if (!ath_hal_setuptxdesc(ah, ds 1537 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1538 , sizeof(struct ieee80211_frame) /* header length */ 1539 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1540 , 0x20 /* txpower XXX */ 1541 , rate, 1 /* series 0 rate/tries */ 1542 , HAL_TXKEYIX_INVALID /* no encryption */ 1543 , 0 /* antenna mode */ 1544 , HAL_TXDESC_NOACK /* no ack for beacons */ 1545 , 0 /* rts/cts rate */ 1546 , 0 /* rts/cts duration */ 1547 )) { 1548 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1549 return -1; 1550 } 1551 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1552 /* XXX verify mbuf data area covers this roundup */ 1553 if (!ath_hal_filltxdesc(ah, ds 1554 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1555 , AH_TRUE /* first segment */ 1556 , AH_TRUE /* last segment */ 1557 )) { 1558 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1559 return -1; 1560 } 1561 1562 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1563 1564 return 0; 1565 } 1566 1567 static void 1568 ath_beacon_proc(void *arg, int pending) 1569 { 1570 struct ath_softc *sc = arg; 1571 struct ieee80211com *ic = &sc->sc_ic; 1572 struct ath_buf *bf = sc->sc_bcbuf; 1573 struct ath_hal *ah = sc->sc_ah; 1574 1575 DPRINTF2(("%s: pending %u\n", __func__, pending)); 1576 if (ic->ic_opmode == IEEE80211_M_STA || 1577 bf == NULL || bf->bf_m == NULL) { 1578 DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n", 1579 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1580 return; 1581 } 1582 /* TODO: update beacon to reflect PS poll state */ 1583 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1584 DPRINTF(("%s: beacon queue %u did not stop?", 1585 __func__, sc->sc_bhalq)); 1586 return; /* busy, XXX is this right? */ 1587 } 1588 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1589 1590 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1591 ath_hal_txstart(ah, sc->sc_bhalq); 1592 DPRINTF2(("%s: BCDP%u = %p (%p)\n", __func__, 1593 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1594 } 1595 1596 static void 1597 ath_beacon_free(struct ath_softc *sc) 1598 { 1599 struct ath_buf *bf = sc->sc_bcbuf; 1600 1601 if (bf->bf_m != NULL) { 1602 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1603 m_freem(bf->bf_m); 1604 bf->bf_m = NULL; 1605 bf->bf_node = NULL; 1606 } 1607 } 1608 1609 /* 1610 * Configure the beacon and sleep timers. 1611 * 1612 * When operating as an AP this resets the TSF and sets 1613 * up the hardware to notify us when we need to issue beacons. 1614 * 1615 * When operating in station mode this sets up the beacon 1616 * timers according to the timestamp of the last received 1617 * beacon and the current TSF, configures PCF and DTIM 1618 * handling, programs the sleep registers so the hardware 1619 * will wakeup in time to receive beacons, and configures 1620 * the beacon miss handling so we'll receive a BMISS 1621 * interrupt when we stop seeing beacons from the AP 1622 * we've associated with. 1623 */ 1624 static void 1625 ath_beacon_config(struct ath_softc *sc) 1626 { 1627 struct ath_hal *ah = sc->sc_ah; 1628 struct ieee80211com *ic = &sc->sc_ic; 1629 struct ieee80211_node *ni = ic->ic_bss; 1630 u_int32_t nexttbtt; 1631 1632 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1633 (LE_READ_4(ni->ni_tstamp) >> 10); 1634 DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1635 nexttbtt += ni->ni_intval; 1636 if (ic->ic_opmode == IEEE80211_M_STA) { 1637 HAL_BEACON_STATE bs; 1638 u_int32_t bmisstime; 1639 1640 /* NB: no PCF support right now */ 1641 memset(&bs, 0, sizeof(bs)); 1642 bs.bs_intval = ni->ni_intval; 1643 bs.bs_nexttbtt = nexttbtt; 1644 bs.bs_dtimperiod = bs.bs_intval; 1645 bs.bs_nextdtim = nexttbtt; 1646 /* 1647 * Calculate the number of consecutive beacons to miss 1648 * before taking a BMISS interrupt. The configuration 1649 * is specified in ms, so we need to convert that to 1650 * TU's and then calculate based on the beacon interval. 1651 * Note that we clamp the result to at most 10 beacons. 1652 */ 1653 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1654 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1655 if (bs.bs_bmissthreshold > 10) 1656 bs.bs_bmissthreshold = 10; 1657 else if (bs.bs_bmissthreshold <= 0) 1658 bs.bs_bmissthreshold = 1; 1659 1660 /* 1661 * Calculate sleep duration. The configuration is 1662 * given in ms. We insure a multiple of the beacon 1663 * period is used. Also, if the sleep duration is 1664 * greater than the DTIM period then it makes senses 1665 * to make it a multiple of that. 1666 * 1667 * XXX fixed at 100ms 1668 */ 1669 bs.bs_sleepduration = 1670 roundup((100 * 1000) / 1024, bs.bs_intval); 1671 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1672 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1673 1674 DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1675 , __func__ 1676 , bs.bs_intval 1677 , bs.bs_nexttbtt 1678 , bs.bs_dtimperiod 1679 , bs.bs_nextdtim 1680 , bs.bs_bmissthreshold 1681 , bs.bs_sleepduration 1682 )); 1683 ath_hal_intrset(ah, 0); 1684 /* 1685 * Reset our tsf so the hardware will update the 1686 * tsf register to reflect timestamps found in 1687 * received beacons. 1688 */ 1689 ath_hal_resettsf(ah); 1690 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1691 sc->sc_imask |= HAL_INT_BMISS; 1692 ath_hal_intrset(ah, sc->sc_imask); 1693 } else { 1694 DPRINTF(("%s: intval %u nexttbtt %u\n", 1695 __func__, ni->ni_intval, nexttbtt)); 1696 ath_hal_intrset(ah, 0); 1697 ath_hal_beaconinit(ah, ic->ic_opmode, 1698 nexttbtt, ni->ni_intval); 1699 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1700 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1701 ath_hal_intrset(ah, sc->sc_imask); 1702 } 1703 } 1704 1705 #ifdef __FreeBSD__ 1706 static void 1707 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1708 { 1709 bus_addr_t *paddr = (bus_addr_t*) arg; 1710 *paddr = segs->ds_addr; 1711 } 1712 #endif 1713 1714 #ifdef __FreeBSD__ 1715 static int 1716 ath_desc_alloc(struct ath_softc *sc) 1717 { 1718 int i, bsize, error; 1719 struct ath_desc *ds; 1720 struct ath_buf *bf; 1721 1722 /* allocate descriptors */ 1723 sc->sc_desc_len = sizeof(struct ath_desc) * 1724 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1725 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1726 if (error != 0) 1727 return error; 1728 1729 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1730 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1731 1732 if (error != 0) 1733 goto fail0; 1734 1735 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1736 sc->sc_desc, sc->sc_desc_len, 1737 ath_load_cb, &sc->sc_desc_paddr, 1738 BUS_DMA_NOWAIT); 1739 if (error != 0) 1740 goto fail1; 1741 1742 ds = sc->sc_desc; 1743 DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n", 1744 ds, sc->sc_desc_len, 1745 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1746 1747 /* allocate buffers */ 1748 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1749 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1750 if (bf == NULL) { 1751 printf("%s: unable to allocate Tx/Rx buffers\n", 1752 sc->sc_dev.dv_xname); 1753 error = -1; 1754 goto fail2; 1755 } 1756 sc->sc_bufptr = bf; 1757 1758 TAILQ_INIT(&sc->sc_rxbuf); 1759 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1760 bf->bf_desc = ds; 1761 bf->bf_daddr = sc->sc_desc_paddr + 1762 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1763 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1764 &bf->bf_dmamap); 1765 if (error != 0) 1766 break; 1767 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1768 } 1769 1770 TAILQ_INIT(&sc->sc_txbuf); 1771 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1772 bf->bf_desc = ds; 1773 bf->bf_daddr = sc->sc_desc_paddr + 1774 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1775 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1776 &bf->bf_dmamap); 1777 if (error != 0) 1778 break; 1779 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1780 } 1781 TAILQ_INIT(&sc->sc_txq); 1782 1783 /* beacon buffer */ 1784 bf->bf_desc = ds; 1785 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1786 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1787 if (error != 0) 1788 return error; 1789 sc->sc_bcbuf = bf; 1790 return 0; 1791 1792 fail2: 1793 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1794 fail1: 1795 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1796 fail0: 1797 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1798 sc->sc_ddmamap = NULL; 1799 return error; 1800 } 1801 #else 1802 static int 1803 ath_desc_alloc(struct ath_softc *sc) 1804 { 1805 int i, bsize, error = -1; 1806 struct ath_desc *ds; 1807 struct ath_buf *bf; 1808 1809 /* allocate descriptors */ 1810 sc->sc_desc_len = sizeof(struct ath_desc) * 1811 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1812 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1813 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1814 printf("%s: unable to allocate control data, error = %d\n", 1815 sc->sc_dev.dv_xname, error); 1816 goto fail0; 1817 } 1818 1819 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1820 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1821 printf("%s: unable to map control data, error = %d\n", 1822 sc->sc_dev.dv_xname, error); 1823 goto fail1; 1824 } 1825 1826 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1827 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 1828 printf("%s: unable to create control data DMA map, " 1829 "error = %d\n", sc->sc_dev.dv_xname, error); 1830 goto fail2; 1831 } 1832 1833 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 1834 sc->sc_desc_len, NULL, 0)) != 0) { 1835 printf("%s: unable to load control data DMA map, error = %d\n", 1836 sc->sc_dev.dv_xname, error); 1837 goto fail3; 1838 } 1839 1840 ds = sc->sc_desc; 1841 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 1842 1843 DPRINTF(("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 1844 ds, (u_long)sc->sc_desc_len, 1845 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1846 1847 /* allocate buffers */ 1848 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1849 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1850 if (bf == NULL) { 1851 printf("%s: unable to allocate Tx/Rx buffers\n", 1852 sc->sc_dev.dv_xname); 1853 error = ENOMEM; 1854 goto fail3; 1855 } 1856 sc->sc_bufptr = bf; 1857 1858 TAILQ_INIT(&sc->sc_rxbuf); 1859 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1860 bf->bf_desc = ds; 1861 bf->bf_daddr = sc->sc_desc_paddr + 1862 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1863 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 1864 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1865 printf("%s: unable to create Rx dmamap, error = %d\n", 1866 sc->sc_dev.dv_xname, error); 1867 goto fail4; 1868 } 1869 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1870 } 1871 1872 TAILQ_INIT(&sc->sc_txbuf); 1873 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1874 bf->bf_desc = ds; 1875 bf->bf_daddr = sc->sc_desc_paddr + 1876 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1877 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1878 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1879 printf("%s: unable to create Tx dmamap, error = %d\n", 1880 sc->sc_dev.dv_xname, error); 1881 goto fail5; 1882 } 1883 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1884 } 1885 TAILQ_INIT(&sc->sc_txq); 1886 1887 /* beacon buffer */ 1888 bf->bf_desc = ds; 1889 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1890 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 1891 &bf->bf_dmamap)) != 0) { 1892 printf("%s: unable to create beacon dmamap, error = %d\n", 1893 sc->sc_dev.dv_xname, error); 1894 goto fail5; 1895 } 1896 sc->sc_bcbuf = bf; 1897 return 0; 1898 1899 fail5: 1900 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 1901 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1902 continue; 1903 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1904 } 1905 fail4: 1906 for (i = 0; i < ATH_RXBUF; i++) { 1907 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1908 continue; 1909 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1910 } 1911 fail3: 1912 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1913 fail2: 1914 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1915 sc->sc_ddmamap = NULL; 1916 fail1: 1917 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 1918 fail0: 1919 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1920 return error; 1921 } 1922 #endif 1923 1924 static void 1925 ath_desc_free(struct ath_softc *sc) 1926 { 1927 struct ath_buf *bf; 1928 1929 #ifdef __FreeBSD__ 1930 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1931 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1932 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1933 #else 1934 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1935 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1936 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1937 #endif 1938 1939 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1940 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1941 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1942 m_freem(bf->bf_m); 1943 } 1944 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 1945 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1946 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 1947 if (bf->bf_m) { 1948 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1949 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1950 m_freem(bf->bf_m); 1951 bf->bf_m = NULL; 1952 } 1953 } 1954 if (sc->sc_bcbuf != NULL) { 1955 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1956 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1957 sc->sc_bcbuf = NULL; 1958 } 1959 1960 TAILQ_INIT(&sc->sc_rxbuf); 1961 TAILQ_INIT(&sc->sc_txbuf); 1962 TAILQ_INIT(&sc->sc_txq); 1963 free(sc->sc_bufptr, M_DEVBUF); 1964 sc->sc_bufptr = NULL; 1965 } 1966 1967 static struct ieee80211_node * 1968 ath_node_alloc(struct ieee80211com *ic) 1969 { 1970 struct ath_node *an = 1971 malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1972 if (an) { 1973 int i; 1974 for (i = 0; i < ATH_RHIST_SIZE; i++) 1975 an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME; 1976 an->an_rx_hist_next = ATH_RHIST_SIZE-1; 1977 return &an->an_node; 1978 } else 1979 return NULL; 1980 } 1981 1982 static void 1983 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 1984 { 1985 struct ath_softc *sc = ic->ic_if.if_softc; 1986 struct ath_buf *bf; 1987 1988 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1989 if (bf->bf_node == ni) 1990 bf->bf_node = NULL; 1991 } 1992 free(ni, M_DEVBUF); 1993 } 1994 1995 static void 1996 ath_node_copy(struct ieee80211com *ic, 1997 struct ieee80211_node *dst, const struct ieee80211_node *src) 1998 { 1999 *(struct ath_node *)dst = *(const struct ath_node *)src; 2000 } 2001 2002 static u_int8_t 2003 ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni) 2004 { 2005 struct ath_node *an = ATH_NODE(ni); 2006 int i, now, nsamples, rssi; 2007 2008 /* 2009 * Calculate the average over the last second of sampled data. 2010 */ 2011 now = ATH_TICKS(); 2012 nsamples = 0; 2013 rssi = 0; 2014 i = an->an_rx_hist_next; 2015 do { 2016 struct ath_recv_hist *rh = &an->an_rx_hist[i]; 2017 if (rh->arh_ticks == ATH_RHIST_NOTIME) 2018 goto done; 2019 if (now - rh->arh_ticks > hz) 2020 goto done; 2021 rssi += rh->arh_rssi; 2022 nsamples++; 2023 if (i == 0) 2024 i = ATH_RHIST_SIZE-1; 2025 else 2026 i--; 2027 } while (i != an->an_rx_hist_next); 2028 done: 2029 /* 2030 * Return either the average or the last known 2031 * value if there is no recent data. 2032 */ 2033 return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi); 2034 } 2035 2036 static int 2037 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 2038 { 2039 struct ath_hal *ah = sc->sc_ah; 2040 int error; 2041 struct mbuf *m; 2042 struct ath_desc *ds; 2043 2044 m = bf->bf_m; 2045 if (m == NULL) { 2046 /* 2047 * NB: by assigning a page to the rx dma buffer we 2048 * implicitly satisfy the Atheros requirement that 2049 * this buffer be cache-line-aligned and sized to be 2050 * multiple of the cache line size. Not doing this 2051 * causes weird stuff to happen (for the 5210 at least). 2052 */ 2053 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 2054 if (m == NULL) { 2055 DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n")); 2056 sc->sc_stats.ast_rx_nombuf++; 2057 return ENOMEM; 2058 } 2059 bf->bf_m = m; 2060 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 2061 2062 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 2063 BUS_DMA_NOWAIT); 2064 if (error != 0) { 2065 DPRINTF(("ath_rxbuf_init: ath_buf_dmamap_load_mbuf failed;" 2066 " error %d\n", error)); 2067 sc->sc_stats.ast_rx_busdma++; 2068 return error; 2069 } 2070 KASSERT(bf->bf_nseg == 1, 2071 ("ath_rxbuf_init: multi-segment packet; nseg %u", 2072 bf->bf_nseg)); 2073 } 2074 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 2075 2076 /* 2077 * Setup descriptors. For receive we always terminate 2078 * the descriptor list with a self-linked entry so we'll 2079 * not get overrun under high load (as can happen with a 2080 * 5212 when ANI processing enables PHY errors). 2081 * 2082 * To insure the last descriptor is self-linked we create 2083 * each descriptor as self-linked and add it to the end. As 2084 * each additional descriptor is added the previous self-linked 2085 * entry is ``fixed'' naturally. This should be safe even 2086 * if DMA is happening. When processing RX interrupts we 2087 * never remove/process the last, self-linked, entry on the 2088 * descriptor list. This insures the hardware always has 2089 * someplace to write a new frame. 2090 */ 2091 ds = bf->bf_desc; 2092 ds->ds_link = bf->bf_daddr; /* link to self */ 2093 ds->ds_data = bf->bf_segs[0].ds_addr; 2094 ath_hal_setuprxdesc(ah, ds 2095 , m->m_len /* buffer size */ 2096 , 0 2097 ); 2098 2099 if (sc->sc_rxlink != NULL) 2100 *sc->sc_rxlink = bf->bf_daddr; 2101 sc->sc_rxlink = &ds->ds_link; 2102 return 0; 2103 } 2104 2105 static void 2106 ath_rx_proc(void *arg, int npending) 2107 { 2108 #define PA2DESC(_sc, _pa) \ 2109 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2110 ((_pa) - (_sc)->sc_desc_paddr))) 2111 struct ath_softc *sc = arg; 2112 struct ath_buf *bf; 2113 struct ieee80211com *ic = &sc->sc_ic; 2114 struct ifnet *ifp = &ic->ic_if; 2115 struct ath_hal *ah = sc->sc_ah; 2116 struct ath_desc *ds; 2117 struct mbuf *m; 2118 struct ieee80211_frame *wh, whbuf; 2119 struct ieee80211_node *ni; 2120 struct ath_node *an; 2121 struct ath_recv_hist *rh; 2122 int len; 2123 u_int phyerr; 2124 HAL_STATUS status; 2125 2126 DPRINTF2(("ath_rx_proc: pending %u\n", npending)); 2127 do { 2128 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2129 if (bf == NULL) { /* NB: shouldn't happen */ 2130 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 2131 break; 2132 } 2133 ds = bf->bf_desc; 2134 if (ds->ds_link == bf->bf_daddr) { 2135 /* NB: never process the self-linked entry at the end */ 2136 break; 2137 } 2138 m = bf->bf_m; 2139 if (m == NULL) { /* NB: shouldn't happen */ 2140 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 2141 continue; 2142 } 2143 /* XXX sync descriptor memory */ 2144 /* 2145 * Must provide the virtual address of the current 2146 * descriptor, the physical address, and the virtual 2147 * address of the next descriptor in the h/w chain. 2148 * This allows the HAL to look ahead to see if the 2149 * hardware is done with a descriptor by checking the 2150 * done bit in the following descriptor and the address 2151 * of the current descriptor the DMA engine is working 2152 * on. All this is necessary because of our use of 2153 * a self-linked list to avoid rx overruns. 2154 */ 2155 status = ath_hal_rxprocdesc(ah, ds, 2156 bf->bf_daddr, PA2DESC(sc, ds->ds_link)); 2157 #ifdef AR_DEBUG 2158 if (ath_debug > 1) 2159 ath_printrxbuf(bf, status == HAL_OK); 2160 #endif 2161 if (status == HAL_EINPROGRESS) 2162 break; 2163 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 2164 if (ds->ds_rxstat.rs_status != 0) { 2165 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 2166 sc->sc_stats.ast_rx_crcerr++; 2167 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 2168 sc->sc_stats.ast_rx_fifoerr++; 2169 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 2170 sc->sc_stats.ast_rx_badcrypt++; 2171 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 2172 sc->sc_stats.ast_rx_phyerr++; 2173 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 2174 sc->sc_stats.ast_rx_phy[phyerr]++; 2175 } else { 2176 /* 2177 * NB: don't count PHY errors as input errors; 2178 * we enable them on the 5212 to collect info 2179 * about environmental noise and, in that 2180 * setting, they don't really reflect tx/rx 2181 * errors. 2182 */ 2183 ifp->if_ierrors++; 2184 } 2185 goto rx_next; 2186 } 2187 2188 len = ds->ds_rxstat.rs_datalen; 2189 if (len < IEEE80211_MIN_LEN) { 2190 DPRINTF(("ath_rx_proc: short packet %d\n", len)); 2191 sc->sc_stats.ast_rx_tooshort++; 2192 goto rx_next; 2193 } 2194 2195 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 2196 2197 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2198 bf->bf_m = NULL; 2199 m->m_pkthdr.rcvif = ifp; 2200 m->m_pkthdr.len = m->m_len = len; 2201 2202 #if NBPFILTER > 0 2203 if (sc->sc_drvbpf) { 2204 #ifdef __FreeBSD__ 2205 struct mbuf *mb; 2206 2207 /* XXX pre-allocate space when setting up recv's */ 2208 MGETHDR(mb, M_DONTWAIT, m->m_type); 2209 if (mb != NULL) { 2210 sc->sc_rx_th.wr_rate = 2211 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2212 sc->sc_rx_th.wr_antsignal = 2213 ds->ds_rxstat.rs_rssi; 2214 sc->sc_rx_th.wr_antenna = 2215 ds->ds_rxstat.rs_antenna; 2216 /* XXX TSF */ 2217 2218 (void) m_dup_pkthdr(mb, m, M_DONTWAIT); 2219 mb->m_next = m; 2220 mb->m_data = (caddr_t)&sc->sc_rx_th; 2221 mb->m_len = sizeof(sc->sc_rx_th); 2222 mb->m_pkthdr.len += mb->m_len; 2223 bpf_mtap(sc->sc_drvbpf, mb); 2224 m_free(mb); 2225 } 2226 #else 2227 /* XXX pre-allocate space when setting up recv's */ 2228 struct mbuf mb; 2229 2230 sc->sc_rx_th.wr_rate = 2231 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2232 sc->sc_rx_th.wr_antsignal = 2233 ds->ds_rxstat.rs_rssi; 2234 sc->sc_rx_th.wr_antenna = 2235 ds->ds_rxstat.rs_antenna; 2236 /* XXX TSF */ 2237 2238 M_COPY_PKTHDR(&mb, m); 2239 mb.m_next = m; 2240 mb.m_data = (caddr_t)&sc->sc_rx_th; 2241 mb.m_len = sizeof(sc->sc_rx_th); 2242 mb.m_pkthdr.len += mb.m_len; 2243 bpf_mtap(sc->sc_drvbpf, &mb); 2244 #endif 2245 } 2246 #endif 2247 2248 m_adj(m, -IEEE80211_CRC_LEN); 2249 wh = mtod(m, struct ieee80211_frame *); 2250 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2251 /* 2252 * WEP is decrypted by hardware. Clear WEP bit 2253 * and trim WEP header for ieee80211_input(). 2254 */ 2255 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2256 memcpy(&whbuf, wh, sizeof(whbuf)); 2257 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2258 wh = mtod(m, struct ieee80211_frame *); 2259 memcpy(wh, &whbuf, sizeof(whbuf)); 2260 /* 2261 * Also trim WEP ICV from the tail. 2262 */ 2263 m_adj(m, -IEEE80211_WEP_CRCLEN); 2264 /* 2265 * The header has probably moved. 2266 */ 2267 wh = mtod(m, struct ieee80211_frame *); 2268 } 2269 2270 /* 2271 * Locate the node for sender, track state, and 2272 * then pass this node (referenced) up to the 802.11 2273 * layer for its use. We are required to pass 2274 * something so we fall back to ic_bss when this frame 2275 * is from an unknown sender. 2276 */ 2277 ni = ieee80211_find_rxnode(ic, wh); 2278 2279 /* 2280 * Record driver-specific state. 2281 */ 2282 an = ATH_NODE(ni); 2283 if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE) 2284 an->an_rx_hist_next = 0; 2285 rh = &an->an_rx_hist[an->an_rx_hist_next]; 2286 rh->arh_ticks = ATH_TICKS(); 2287 rh->arh_rssi = ds->ds_rxstat.rs_rssi; 2288 rh->arh_antenna = ds->ds_rxstat.rs_antenna; 2289 2290 /* 2291 * Send frame up for processing. 2292 */ 2293 ieee80211_input(ifp, m, ni, 2294 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2295 2296 /* 2297 * The frame may have caused the node to be marked for 2298 * reclamation (e.g. in response to a DEAUTH message) 2299 * so use free_node here instead of unref_node. 2300 */ 2301 if (ni == ic->ic_bss) 2302 ieee80211_unref_node(&ni); 2303 else 2304 ieee80211_free_node(ic, ni); 2305 rx_next: 2306 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2307 } while (ath_rxbuf_init(sc, bf) == 0); 2308 2309 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2310 ath_hal_rxena(ah); /* in case of RXEOL */ 2311 2312 #ifdef __NetBSD__ 2313 if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd)) 2314 ath_start(ifp); 2315 #endif /* __NetBSD__ */ 2316 #undef PA2DESC 2317 } 2318 2319 /* 2320 * XXX Size of an ACK control frame in bytes. 2321 */ 2322 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2323 2324 static int 2325 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2326 struct mbuf *m0) 2327 { 2328 struct ieee80211com *ic = &sc->sc_ic; 2329 struct ath_hal *ah = sc->sc_ah; 2330 struct ifnet *ifp = &sc->sc_ic.ic_if; 2331 int i, error, iswep, hdrlen, pktlen; 2332 u_int8_t rix, cix, txrate, ctsrate; 2333 struct ath_desc *ds; 2334 struct mbuf *m; 2335 struct ieee80211_frame *wh; 2336 u_int32_t iv; 2337 u_int8_t *ivp; 2338 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2339 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2340 u_int subtype, flags, ctsduration, antenna; 2341 HAL_PKT_TYPE atype; 2342 const HAL_RATE_TABLE *rt; 2343 HAL_BOOL shortPreamble; 2344 struct ath_node *an; 2345 ath_txq_critsect_decl(s); 2346 2347 wh = mtod(m0, struct ieee80211_frame *); 2348 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2349 hdrlen = sizeof(struct ieee80211_frame); 2350 pktlen = m0->m_pkthdr.len; 2351 2352 if (iswep) { 2353 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2354 m_adj(m0, hdrlen); 2355 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2356 if (m0 == NULL) { 2357 sc->sc_stats.ast_tx_nombuf++; 2358 return ENOMEM; 2359 } 2360 ivp = hdrbuf + hdrlen; 2361 wh = mtod(m0, struct ieee80211_frame *); 2362 /* 2363 * XXX 2364 * IV must not duplicate during the lifetime of the key. 2365 * But no mechanism to renew keys is defined in IEEE 802.11 2366 * WEP. And IV may be duplicated between other stations 2367 * because of the session key itself is shared. 2368 * So we use pseudo random IV for now, though it is not the 2369 * right way. 2370 */ 2371 iv = ic->ic_iv; 2372 /* 2373 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir: 2374 * (B, 255, N) with 3 <= B < 8 2375 */ 2376 if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00) 2377 iv += 0x000100; 2378 ic->ic_iv = iv + 1; 2379 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 2380 ivp[i] = iv; 2381 iv >>= 8; 2382 } 2383 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 2384 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2385 /* 2386 * The ICV length must be included into hdrlen and pktlen. 2387 */ 2388 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2389 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2390 } 2391 pktlen += IEEE80211_CRC_LEN; 2392 2393 /* 2394 * Load the DMA map so any coalescing is done. This 2395 * also calculates the number of descriptors we need. 2396 */ 2397 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2398 /* 2399 * Discard null packets and check for packets that 2400 * require too many TX descriptors. We try to convert 2401 * the latter to a cluster. 2402 */ 2403 if (error == EFBIG) { /* too many desc's, linearize */ 2404 sc->sc_stats.ast_tx_linear++; 2405 MGETHDR(m, M_DONTWAIT, MT_DATA); 2406 if (m == NULL) { 2407 sc->sc_stats.ast_tx_nombuf++; 2408 m_freem(m0); 2409 return ENOMEM; 2410 } 2411 #ifdef __FreeBSD__ 2412 M_MOVE_PKTHDR(m, m0); 2413 #else 2414 M_COPY_PKTHDR(m, m0); 2415 #endif 2416 MCLGET(m, M_DONTWAIT); 2417 if ((m->m_flags & M_EXT) == 0) { 2418 sc->sc_stats.ast_tx_nomcl++; 2419 m_freem(m0); 2420 m_free(m); 2421 return ENOMEM; 2422 } 2423 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2424 m_freem(m0); 2425 m->m_len = m->m_pkthdr.len; 2426 m0 = m; 2427 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2428 BUS_DMA_NOWAIT); 2429 if (error != 0) { 2430 sc->sc_stats.ast_tx_busdma++; 2431 m_freem(m0); 2432 return error; 2433 } 2434 KASSERT(bf->bf_nseg == 1, 2435 ("ath_tx_start: packet not one segment; nseg %u", 2436 bf->bf_nseg)); 2437 } else if (error != 0) { 2438 sc->sc_stats.ast_tx_busdma++; 2439 m_freem(m0); 2440 return error; 2441 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2442 sc->sc_stats.ast_tx_nodata++; 2443 m_freem(m0); 2444 return EIO; 2445 } 2446 DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen)); 2447 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2448 bf->bf_m = m0; 2449 bf->bf_node = ni; /* NB: held reference */ 2450 2451 /* setup descriptors */ 2452 ds = bf->bf_desc; 2453 rt = sc->sc_currates; 2454 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2455 2456 /* 2457 * Calculate Atheros packet type from IEEE80211 packet header 2458 * and setup for rate calculations. 2459 */ 2460 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2461 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2462 case IEEE80211_FC0_TYPE_MGT: 2463 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2464 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2465 atype = HAL_PKT_TYPE_BEACON; 2466 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2467 atype = HAL_PKT_TYPE_PROBE_RESP; 2468 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2469 atype = HAL_PKT_TYPE_ATIM; 2470 rix = 0; /* XXX lowest rate */ 2471 break; 2472 case IEEE80211_FC0_TYPE_CTL: 2473 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2474 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2475 atype = HAL_PKT_TYPE_PSPOLL; 2476 rix = 0; /* XXX lowest rate */ 2477 break; 2478 default: 2479 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2480 IEEE80211_RATE_VAL]; 2481 if (rix == 0xff) { 2482 if_printf(ifp, "bogus xmit rate 0x%x\n", 2483 ni->ni_rates.rs_rates[ni->ni_txrate]); 2484 sc->sc_stats.ast_tx_badrate++; 2485 m_freem(m0); 2486 return EIO; 2487 } 2488 break; 2489 } 2490 /* 2491 * NB: the 802.11 layer marks whether or not we should 2492 * use short preamble based on the current mode and 2493 * negotiated parameters. 2494 */ 2495 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 2496 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 2497 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2498 shortPreamble = AH_TRUE; 2499 sc->sc_stats.ast_tx_shortpre++; 2500 } else { 2501 txrate = rt->info[rix].rateCode; 2502 shortPreamble = AH_FALSE; 2503 } 2504 2505 /* 2506 * Calculate miscellaneous flags. 2507 */ 2508 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2509 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2510 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2511 sc->sc_stats.ast_tx_noack++; 2512 } else if (pktlen > ic->ic_rtsthreshold) { 2513 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2514 sc->sc_stats.ast_tx_rts++; 2515 } 2516 2517 /* 2518 * Calculate duration. This logically belongs in the 802.11 2519 * layer but it lacks sufficient information to calculate it. 2520 */ 2521 if ((flags & HAL_TXDESC_NOACK) == 0 && 2522 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 2523 u_int16_t dur; 2524 /* 2525 * XXX not right with fragmentation. 2526 */ 2527 dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE, 2528 rix, shortPreamble); 2529 *((u_int16_t*) wh->i_dur) = htole16(dur); 2530 } 2531 2532 /* 2533 * Calculate RTS/CTS rate and duration if needed. 2534 */ 2535 ctsduration = 0; 2536 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2537 /* 2538 * CTS transmit rate is derived from the transmit rate 2539 * by looking in the h/w rate table. We must also factor 2540 * in whether or not a short preamble is to be used. 2541 */ 2542 cix = rt->info[rix].controlRate; 2543 ctsrate = rt->info[cix].rateCode; 2544 if (shortPreamble) 2545 ctsrate |= rt->info[cix].shortPreamble; 2546 /* 2547 * Compute the transmit duration based on the size 2548 * of an ACK frame. We call into the HAL to do the 2549 * computation since it depends on the characteristics 2550 * of the actual PHY being used. 2551 */ 2552 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2553 ctsduration += ath_hal_computetxtime(ah, 2554 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2555 } 2556 /* SIFS + data */ 2557 ctsduration += ath_hal_computetxtime(ah, 2558 rt, pktlen, rix, shortPreamble); 2559 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2560 ctsduration += ath_hal_computetxtime(ah, 2561 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2562 } 2563 } else 2564 ctsrate = 0; 2565 2566 /* 2567 * For now use the antenna on which the last good 2568 * frame was received on. We assume this field is 2569 * initialized to 0 which gives us ``auto'' or the 2570 * ``default'' antenna. 2571 */ 2572 an = (struct ath_node *) ni; 2573 if (an->an_tx_antenna) 2574 antenna = an->an_tx_antenna; 2575 else 2576 antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna; 2577 2578 /* 2579 * Formulate first tx descriptor with tx controls. 2580 */ 2581 /* XXX check return value? */ 2582 ath_hal_setuptxdesc(ah, ds 2583 , pktlen /* packet length */ 2584 , hdrlen /* header length */ 2585 , atype /* Atheros packet type */ 2586 , 60 /* txpower XXX */ 2587 , txrate, 1+10 /* series 0 rate/tries */ 2588 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2589 , antenna /* antenna mode */ 2590 , flags /* flags */ 2591 , ctsrate /* rts/cts rate */ 2592 , ctsduration /* rts/cts duration */ 2593 ); 2594 #ifdef notyet 2595 ath_hal_setupxtxdesc(ah, ds 2596 , AH_FALSE /* short preamble */ 2597 , 0, 0 /* series 1 rate/tries */ 2598 , 0, 0 /* series 2 rate/tries */ 2599 , 0, 0 /* series 3 rate/tries */ 2600 ); 2601 #endif 2602 /* 2603 * Fillin the remainder of the descriptor info. 2604 */ 2605 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2606 ds->ds_data = bf->bf_segs[i].ds_addr; 2607 if (i == bf->bf_nseg - 1) 2608 ds->ds_link = 0; 2609 else 2610 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2611 ath_hal_filltxdesc(ah, ds 2612 , bf->bf_segs[i].ds_len /* segment length */ 2613 , i == 0 /* first segment */ 2614 , i == bf->bf_nseg - 1 /* last segment */ 2615 ); 2616 DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n", 2617 i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1, 2618 ds->ds_hw[0], ds->ds_hw[1])); 2619 } 2620 2621 /* 2622 * Insert the frame on the outbound list and 2623 * pass it on to the hardware. 2624 */ 2625 ath_txq_critsect_begin(sc, s); 2626 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2627 if (sc->sc_txlink == NULL) { 2628 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2629 DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n", 2630 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2631 } else { 2632 *sc->sc_txlink = bf->bf_daddr; 2633 DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n", 2634 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2635 } 2636 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2637 ath_txq_critsect_end(sc, s); 2638 2639 ath_hal_txstart(ah, sc->sc_txhalq); 2640 return 0; 2641 } 2642 2643 static void 2644 ath_tx_proc(void *arg, int npending) 2645 { 2646 struct ath_softc *sc = arg; 2647 struct ath_hal *ah = sc->sc_ah; 2648 struct ath_buf *bf; 2649 struct ieee80211com *ic = &sc->sc_ic; 2650 struct ifnet *ifp = &ic->ic_if; 2651 struct ath_desc *ds; 2652 struct ieee80211_node *ni; 2653 struct ath_node *an; 2654 int sr, lr; 2655 HAL_STATUS status; 2656 ath_txq_critsect_decl(s); 2657 ath_txbuf_critsect_decl(s2); 2658 2659 DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n", 2660 npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2661 sc->sc_txlink)); 2662 for (;;) { 2663 ath_txq_critsect_begin(sc, s); 2664 bf = TAILQ_FIRST(&sc->sc_txq); 2665 if (bf == NULL) { 2666 sc->sc_txlink = NULL; 2667 ath_txq_critsect_end(sc, s); 2668 break; 2669 } 2670 /* only the last descriptor is needed */ 2671 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2672 status = ath_hal_txprocdesc(ah, ds); 2673 #ifdef AR_DEBUG 2674 if (ath_debug > 1) 2675 ath_printtxbuf(bf, status == HAL_OK); 2676 #endif 2677 if (status == HAL_EINPROGRESS) { 2678 ath_txq_critsect_end(sc, s); 2679 break; 2680 } 2681 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2682 ath_txq_critsect_end(sc, s); 2683 2684 ni = bf->bf_node; 2685 if (ni != NULL) { 2686 an = (struct ath_node *) ni; 2687 if (ds->ds_txstat.ts_status == 0) { 2688 an->an_tx_ok++; 2689 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2690 } else { 2691 an->an_tx_err++; 2692 ifp->if_oerrors++; 2693 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2694 sc->sc_stats.ast_tx_xretries++; 2695 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2696 sc->sc_stats.ast_tx_fifoerr++; 2697 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2698 sc->sc_stats.ast_tx_filtered++; 2699 an->an_tx_antenna = 0; /* invalidate */ 2700 } 2701 sr = ds->ds_txstat.ts_shortretry; 2702 lr = ds->ds_txstat.ts_longretry; 2703 sc->sc_stats.ast_tx_shortretry += sr; 2704 sc->sc_stats.ast_tx_longretry += lr; 2705 if (sr + lr) 2706 an->an_tx_retr++; 2707 /* 2708 * Reclaim reference to node. 2709 * 2710 * NB: the node may be reclaimed here if, for example 2711 * this is a DEAUTH message that was sent and the 2712 * node was timed out due to inactivity. 2713 */ 2714 if (ni != ic->ic_bss) 2715 ieee80211_free_node(ic, ni); 2716 } 2717 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2718 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2719 m_freem(bf->bf_m); 2720 bf->bf_m = NULL; 2721 bf->bf_node = NULL; 2722 2723 ath_txbuf_critsect_begin(sc, s2); 2724 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2725 ath_txbuf_critsect_end(sc, s2); 2726 } 2727 ifp->if_flags &= ~IFF_OACTIVE; 2728 sc->sc_tx_timer = 0; 2729 2730 ath_start(ifp); 2731 } 2732 2733 /* 2734 * Drain the transmit queue and reclaim resources. 2735 */ 2736 static void 2737 ath_draintxq(struct ath_softc *sc) 2738 { 2739 struct ath_hal *ah = sc->sc_ah; 2740 struct ifnet *ifp = &sc->sc_ic.ic_if; 2741 struct ath_buf *bf; 2742 ath_txq_critsect_decl(s); 2743 ath_txbuf_critsect_decl(s2); 2744 2745 /* XXX return value */ 2746 if (!sc->sc_invalid) { 2747 /* don't touch the hardware if marked invalid */ 2748 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2749 DPRINTF(("ath_draintxq: tx queue %p, link %p\n", 2750 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2751 sc->sc_txlink)); 2752 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2753 DPRINTF(("ath_draintxq: beacon queue %p\n", 2754 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2755 } 2756 for (;;) { 2757 ath_txq_critsect_begin(sc, s); 2758 bf = TAILQ_FIRST(&sc->sc_txq); 2759 if (bf == NULL) { 2760 sc->sc_txlink = NULL; 2761 ath_txq_critsect_end(sc, s); 2762 break; 2763 } 2764 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2765 ath_txq_critsect_end(sc, s); 2766 #ifdef AR_DEBUG 2767 if (ath_debug) 2768 ath_printtxbuf(bf, 2769 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2770 #endif /* AR_DEBUG */ 2771 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2772 m_freem(bf->bf_m); 2773 bf->bf_m = NULL; 2774 bf->bf_node = NULL; 2775 ath_txbuf_critsect_begin(sc, s2); 2776 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2777 ath_txbuf_critsect_end(sc, s2); 2778 } 2779 ifp->if_flags &= ~IFF_OACTIVE; 2780 sc->sc_tx_timer = 0; 2781 } 2782 2783 /* 2784 * Disable the receive h/w in preparation for a reset. 2785 */ 2786 static void 2787 ath_stoprecv(struct ath_softc *sc) 2788 { 2789 #define PA2DESC(_sc, _pa) \ 2790 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2791 ((_pa) - (_sc)->sc_desc_paddr))) 2792 struct ath_hal *ah = sc->sc_ah; 2793 2794 ath_hal_stoppcurecv(ah); /* disable PCU */ 2795 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2796 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2797 DELAY(3000); /* long enough for 1 frame */ 2798 #ifdef AR_DEBUG 2799 if (ath_debug) { 2800 struct ath_buf *bf; 2801 2802 DPRINTF(("ath_stoprecv: rx queue %p, link %p\n", 2803 (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink)); 2804 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2805 struct ath_desc *ds = bf->bf_desc; 2806 if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr, 2807 PA2DESC(sc, ds->ds_link)) == HAL_OK) 2808 ath_printrxbuf(bf, 1); 2809 } 2810 } 2811 #endif 2812 sc->sc_rxlink = NULL; /* just in case */ 2813 #undef PA2DESC 2814 } 2815 2816 /* 2817 * Enable the receive h/w following a reset. 2818 */ 2819 static int 2820 ath_startrecv(struct ath_softc *sc) 2821 { 2822 struct ath_hal *ah = sc->sc_ah; 2823 struct ath_buf *bf; 2824 2825 sc->sc_rxlink = NULL; 2826 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2827 int error = ath_rxbuf_init(sc, bf); 2828 if (error != 0) { 2829 DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n", 2830 error)); 2831 return error; 2832 } 2833 } 2834 2835 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2836 ath_hal_putrxbuf(ah, bf->bf_daddr); 2837 ath_hal_rxena(ah); /* enable recv descriptors */ 2838 ath_mode_init(sc); /* set filters, etc. */ 2839 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2840 return 0; 2841 } 2842 2843 /* 2844 * Set/change channels. If the channel is really being changed, 2845 * it's done by resetting the chip. To accomplish this we must 2846 * first cleanup any pending DMA, then restart stuff after a la 2847 * ath_init. 2848 */ 2849 static int 2850 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 2851 { 2852 struct ath_hal *ah = sc->sc_ah; 2853 struct ieee80211com *ic = &sc->sc_ic; 2854 2855 DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n", 2856 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 2857 ic->ic_ibss_chan->ic_freq, 2858 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 2859 if (chan != ic->ic_ibss_chan) { 2860 HAL_STATUS status; 2861 HAL_CHANNEL hchan; 2862 enum ieee80211_phymode mode; 2863 2864 /* 2865 * To switch channels clear any pending DMA operations; 2866 * wait long enough for the RX fifo to drain, reset the 2867 * hardware at the new frequency, and then re-enable 2868 * the relevant bits of the h/w. 2869 */ 2870 ath_hal_intrset(ah, 0); /* disable interrupts */ 2871 ath_draintxq(sc); /* clear pending tx frames */ 2872 ath_stoprecv(sc); /* turn off frame recv */ 2873 /* 2874 * Convert to a HAL channel description with 2875 * the flags constrained to reflect the current 2876 * operating mode. 2877 */ 2878 hchan.channel = chan->ic_freq; 2879 hchan.channelFlags = ath_chan2flags(ic, chan); 2880 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 2881 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 2882 "channel %u (%u Mhz)\n", 2883 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 2884 return EIO; 2885 } 2886 /* 2887 * Re-enable rx framework. 2888 */ 2889 if (ath_startrecv(sc) != 0) { 2890 if_printf(&ic->ic_if, 2891 "ath_chan_set: unable to restart recv logic\n"); 2892 return EIO; 2893 } 2894 2895 /* 2896 * Update BPF state. 2897 */ 2898 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 2899 htole16(chan->ic_freq); 2900 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 2901 htole16(chan->ic_flags); 2902 2903 /* 2904 * Change channels and update the h/w rate map 2905 * if we're switching; e.g. 11a to 11b/g. 2906 */ 2907 ic->ic_ibss_chan = chan; 2908 mode = ieee80211_chan2mode(ic, chan); 2909 if (mode != sc->sc_curmode) 2910 ath_setcurmode(sc, mode); 2911 2912 /* 2913 * Re-enable interrupts. 2914 */ 2915 ath_hal_intrset(ah, sc->sc_imask); 2916 } 2917 return 0; 2918 } 2919 2920 static void 2921 ath_next_scan(void *arg) 2922 { 2923 struct ath_softc *sc = arg; 2924 struct ieee80211com *ic = &sc->sc_ic; 2925 struct ifnet *ifp = &ic->ic_if; 2926 int s; 2927 2928 /* don't call ath_start w/o network interrupts blocked */ 2929 s = splnet(); 2930 2931 if (ic->ic_state == IEEE80211_S_SCAN) 2932 ieee80211_next_scan(ifp); 2933 splx(s); 2934 } 2935 2936 /* 2937 * Periodically recalibrate the PHY to account 2938 * for temperature/environment changes. 2939 */ 2940 static void 2941 ath_calibrate(void *arg) 2942 { 2943 struct ath_softc *sc = arg; 2944 struct ath_hal *ah = sc->sc_ah; 2945 struct ieee80211com *ic = &sc->sc_ic; 2946 struct ieee80211_channel *c; 2947 HAL_CHANNEL hchan; 2948 2949 sc->sc_stats.ast_per_cal++; 2950 2951 /* 2952 * Convert to a HAL channel description with the flags 2953 * constrained to reflect the current operating mode. 2954 */ 2955 c = ic->ic_ibss_chan; 2956 hchan.channel = c->ic_freq; 2957 hchan.channelFlags = ath_chan2flags(ic, c); 2958 2959 DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 2960 2961 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 2962 /* 2963 * Rfgain is out of bounds, reset the chip 2964 * to load new gain values. 2965 */ 2966 sc->sc_stats.ast_per_rfgain++; 2967 ath_reset(sc); 2968 } 2969 if (!ath_hal_calibrate(ah, &hchan)) { 2970 DPRINTF(("%s: calibration of channel %u failed\n", 2971 __func__, c->ic_freq)); 2972 sc->sc_stats.ast_per_calfail++; 2973 } 2974 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 2975 } 2976 2977 static HAL_LED_STATE 2978 ath_state_to_led(enum ieee80211_state state) 2979 { 2980 switch (state) { 2981 case IEEE80211_S_INIT: 2982 return HAL_LED_INIT; 2983 case IEEE80211_S_SCAN: 2984 return HAL_LED_SCAN; 2985 case IEEE80211_S_AUTH: 2986 return HAL_LED_AUTH; 2987 case IEEE80211_S_ASSOC: 2988 return HAL_LED_ASSOC; 2989 case IEEE80211_S_RUN: 2990 return HAL_LED_RUN; 2991 default: 2992 panic("%s: unknown 802.11 state %d\n", __func__, state); 2993 return HAL_LED_INIT; 2994 } 2995 } 2996 2997 static int 2998 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 2999 { 3000 struct ifnet *ifp = &ic->ic_if; 3001 struct ath_softc *sc = ifp->if_softc; 3002 struct ath_hal *ah = sc->sc_ah; 3003 struct ieee80211_node *ni; 3004 int i, error; 3005 const u_int8_t *bssid; 3006 u_int32_t rfilt; 3007 3008 DPRINTF(("%s: %s -> %s\n", __func__, 3009 ieee80211_state_name[ic->ic_state], 3010 ieee80211_state_name[nstate])); 3011 3012 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 3013 3014 if (nstate == IEEE80211_S_INIT) { 3015 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3016 ath_hal_intrset(ah, sc->sc_imask); 3017 callout_stop(&sc->sc_scan_ch); 3018 callout_stop(&sc->sc_cal_ch); 3019 return (*sc->sc_newstate)(ic, nstate, arg); 3020 } 3021 ni = ic->ic_bss; 3022 error = ath_chan_set(sc, ni->ni_chan); 3023 if (error != 0) 3024 goto bad; 3025 rfilt = ath_calcrxfilter(sc); 3026 if (nstate == IEEE80211_S_SCAN) { 3027 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 3028 ath_next_scan, sc); 3029 bssid = ifp->if_broadcastaddr; 3030 } else { 3031 callout_stop(&sc->sc_scan_ch); 3032 bssid = ni->ni_bssid; 3033 } 3034 ath_hal_setrxfilter(ah, rfilt); 3035 DPRINTF(("%s: RX filter 0x%x bssid %s\n", 3036 __func__, rfilt, ether_sprintf(bssid))); 3037 3038 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 3039 ath_hal_setassocid(ah, bssid, ni->ni_associd); 3040 else 3041 ath_hal_setassocid(ah, bssid, 0); 3042 if (ic->ic_flags & IEEE80211_F_WEPON) { 3043 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3044 if (ath_hal_keyisvalid(ah, i)) 3045 ath_hal_keysetmac(ah, i, bssid); 3046 } 3047 3048 if (nstate == IEEE80211_S_RUN) { 3049 DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 3050 "capinfo=0x%04x chan=%d\n" 3051 , __func__ 3052 , ic->ic_flags 3053 , ni->ni_intval 3054 , ether_sprintf(ni->ni_bssid) 3055 , ni->ni_capinfo 3056 , ieee80211_chan2ieee(ic, ni->ni_chan))); 3057 3058 /* 3059 * Allocate and setup the beacon frame for AP or adhoc mode. 3060 */ 3061 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 3062 ic->ic_opmode == IEEE80211_M_IBSS) { 3063 error = ath_beacon_alloc(sc, ni); 3064 if (error != 0) 3065 goto bad; 3066 } 3067 3068 /* 3069 * Configure the beacon and sleep timers. 3070 */ 3071 ath_beacon_config(sc); 3072 3073 /* start periodic recalibration timer */ 3074 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 3075 ath_calibrate, sc); 3076 } else { 3077 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3078 ath_hal_intrset(ah, sc->sc_imask); 3079 callout_stop(&sc->sc_cal_ch); /* no calibration */ 3080 } 3081 /* 3082 * Reset the rate control state. 3083 */ 3084 ath_rate_ctl_reset(sc, nstate); 3085 /* 3086 * Invoke the parent method to complete the work. 3087 */ 3088 return (*sc->sc_newstate)(ic, nstate, arg); 3089 bad: 3090 callout_stop(&sc->sc_scan_ch); 3091 callout_stop(&sc->sc_cal_ch); 3092 /* NB: do not invoke the parent */ 3093 return error; 3094 } 3095 3096 /* 3097 * Setup driver-specific state for a newly associated node. 3098 * Note that we're called also on a re-associate, the isnew 3099 * param tells us if this is the first time or not. 3100 */ 3101 static void 3102 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 3103 { 3104 if (isnew) { 3105 struct ath_node *an = (struct ath_node *) ni; 3106 3107 an->an_tx_ok = an->an_tx_err = 3108 an->an_tx_retr = an->an_tx_upper = 0; 3109 /* start with highest negotiated rate */ 3110 /* 3111 * XXX should do otherwise but only when 3112 * the rate control algorithm is better. 3113 */ 3114 KASSERT(ni->ni_rates.rs_nrates > 0, 3115 ("new association w/ no rates!")); 3116 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3117 } 3118 } 3119 3120 static int 3121 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor) 3122 { 3123 struct ieee80211com *ic = &sc->sc_ic; 3124 struct ifnet *ifp = &ic->ic_if; 3125 struct ath_hal *ah = sc->sc_ah; 3126 HAL_CHANNEL *chans; 3127 int i, ix, nchan; 3128 3129 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 3130 M_TEMP, M_NOWAIT); 3131 if (chans == NULL) { 3132 if_printf(ifp, "unable to allocate channel table\n"); 3133 return ENOMEM; 3134 } 3135 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 3136 cc, HAL_MODE_ALL, outdoor)) { 3137 if_printf(ifp, "unable to collect channel list from hal\n"); 3138 free(chans, M_TEMP); 3139 return EINVAL; 3140 } 3141 3142 /* 3143 * Convert HAL channels to ieee80211 ones and insert 3144 * them in the table according to their channel number. 3145 */ 3146 for (i = 0; i < nchan; i++) { 3147 HAL_CHANNEL *c = &chans[i]; 3148 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 3149 if (ix > IEEE80211_CHAN_MAX) { 3150 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 3151 ix, c->channel, c->channelFlags); 3152 continue; 3153 } 3154 /* NB: flags are known to be compatible */ 3155 if (ic->ic_channels[ix].ic_freq == 0) { 3156 ic->ic_channels[ix].ic_freq = c->channel; 3157 ic->ic_channels[ix].ic_flags = c->channelFlags; 3158 } else { 3159 /* channels overlap; e.g. 11g and 11b */ 3160 ic->ic_channels[ix].ic_flags |= c->channelFlags; 3161 } 3162 } 3163 free(chans, M_TEMP); 3164 return 0; 3165 } 3166 3167 static int 3168 ath_rate_setup(struct ath_softc *sc, u_int mode) 3169 { 3170 struct ath_hal *ah = sc->sc_ah; 3171 struct ieee80211com *ic = &sc->sc_ic; 3172 const HAL_RATE_TABLE *rt; 3173 struct ieee80211_rateset *rs; 3174 int i, maxrates; 3175 3176 switch (mode) { 3177 case IEEE80211_MODE_11A: 3178 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 3179 break; 3180 case IEEE80211_MODE_11B: 3181 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 3182 break; 3183 case IEEE80211_MODE_11G: 3184 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 3185 break; 3186 case IEEE80211_MODE_TURBO: 3187 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 3188 break; 3189 default: 3190 DPRINTF(("%s: invalid mode %u\n", __func__, mode)); 3191 return 0; 3192 } 3193 rt = sc->sc_rates[mode]; 3194 if (rt == NULL) 3195 return 0; 3196 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 3197 DPRINTF(("%s: rate table too small (%u > %u)\n", 3198 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 3199 maxrates = IEEE80211_RATE_MAXSIZE; 3200 } else 3201 maxrates = rt->rateCount; 3202 rs = &ic->ic_sup_rates[mode]; 3203 for (i = 0; i < maxrates; i++) 3204 rs->rs_rates[i] = rt->info[i].dot11Rate; 3205 rs->rs_nrates = maxrates; 3206 return 1; 3207 } 3208 3209 static void 3210 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 3211 { 3212 const HAL_RATE_TABLE *rt; 3213 int i; 3214 3215 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 3216 rt = sc->sc_rates[mode]; 3217 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 3218 for (i = 0; i < rt->rateCount; i++) 3219 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 3220 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 3221 for (i = 0; i < 32; i++) 3222 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 3223 sc->sc_currates = rt; 3224 sc->sc_curmode = mode; 3225 } 3226 3227 /* 3228 * Reset the rate control state for each 802.11 state transition. 3229 */ 3230 static void 3231 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 3232 { 3233 struct ieee80211com *ic = &sc->sc_ic; 3234 struct ieee80211_node *ni; 3235 struct ath_node *an; 3236 3237 if (ic->ic_opmode != IEEE80211_M_STA) { 3238 /* 3239 * When operating as a station the node table holds 3240 * the AP's that were discovered during scanning. 3241 * For any other operating mode we want to reset the 3242 * tx rate state of each node. 3243 */ 3244 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3245 ni->ni_txrate = 0; /* use lowest rate */ 3246 an = (struct ath_node *) ni; 3247 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3248 an->an_tx_upper = 0; 3249 } 3250 } 3251 /* 3252 * Reset local xmit state; this is really only meaningful 3253 * when operating in station or adhoc mode. 3254 */ 3255 ni = ic->ic_bss; 3256 an = (struct ath_node *) ni; 3257 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3258 if (state == IEEE80211_S_RUN) { 3259 /* start with highest negotiated rate */ 3260 KASSERT(ni->ni_rates.rs_nrates > 0, 3261 ("transition to RUN state w/ no rates!")); 3262 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3263 } else { 3264 /* use lowest rate */ 3265 ni->ni_txrate = 0; 3266 } 3267 } 3268 3269 /* 3270 * Examine and potentially adjust the transmit rate. 3271 */ 3272 static void 3273 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3274 { 3275 struct ath_softc *sc = arg; 3276 struct ath_node *an = (struct ath_node *) ni; 3277 struct ieee80211_rateset *rs = &ni->ni_rates; 3278 int mod = 0, orate, enough; 3279 3280 /* 3281 * Rate control 3282 * XXX: very primitive version. 3283 */ 3284 sc->sc_stats.ast_rate_calls++; 3285 3286 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3287 3288 /* no packet reached -> down */ 3289 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3290 mod = -1; 3291 3292 /* all packets needs retry in average -> down */ 3293 if (enough && an->an_tx_ok < an->an_tx_retr) 3294 mod = -1; 3295 3296 /* no error and less than 10% of packets needs retry -> up */ 3297 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3298 mod = 1; 3299 3300 orate = ni->ni_txrate; 3301 switch (mod) { 3302 case 0: 3303 if (enough && an->an_tx_upper > 0) 3304 an->an_tx_upper--; 3305 break; 3306 case -1: 3307 if (ni->ni_txrate > 0) { 3308 ni->ni_txrate--; 3309 sc->sc_stats.ast_rate_drop++; 3310 } 3311 an->an_tx_upper = 0; 3312 break; 3313 case 1: 3314 if (++an->an_tx_upper < 2) 3315 break; 3316 an->an_tx_upper = 0; 3317 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3318 ni->ni_txrate++; 3319 sc->sc_stats.ast_rate_raise++; 3320 } 3321 break; 3322 } 3323 3324 if (ni->ni_txrate != orate) { 3325 DPRINTF(("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3326 __func__, 3327 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3328 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3329 an->an_tx_ok, an->an_tx_err, an->an_tx_retr)); 3330 } 3331 if (ni->ni_txrate != orate || enough) 3332 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3333 } 3334 3335 #ifdef AR_DEBUG 3336 #ifdef __FreeBSD__ 3337 static int 3338 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3339 { 3340 char dmode[64]; 3341 int error; 3342 3343 strncpy(dmode, "", sizeof(dmode) - 1); 3344 dmode[sizeof(dmode) - 1] = '\0'; 3345 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3346 3347 if (error == 0 && req->newptr != NULL) { 3348 struct ifnet *ifp; 3349 struct ath_softc *sc; 3350 3351 ifp = ifunit("ath0"); /* XXX */ 3352 if (!ifp) 3353 return EINVAL; 3354 sc = ifp->if_softc; 3355 if (strcmp(dmode, "hal") == 0) 3356 ath_hal_dumpstate(sc->sc_ah); 3357 else 3358 return EINVAL; 3359 } 3360 return error; 3361 } 3362 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3363 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3364 #endif /* __FreeBSD__ */ 3365 3366 static void 3367 ath_printrxbuf(struct ath_buf *bf, int done) 3368 { 3369 struct ath_desc *ds; 3370 int i; 3371 3372 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3373 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3374 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3375 ds->ds_link, ds->ds_data, 3376 ds->ds_ctl0, ds->ds_ctl1, 3377 ds->ds_hw[0], ds->ds_hw[1], 3378 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3379 } 3380 } 3381 3382 static void 3383 ath_printtxbuf(struct ath_buf *bf, int done) 3384 { 3385 struct ath_desc *ds; 3386 int i; 3387 3388 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3389 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3390 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3391 ds->ds_link, ds->ds_data, 3392 ds->ds_ctl0, ds->ds_ctl1, 3393 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3394 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3395 } 3396 } 3397 #endif /* AR_DEBUG */ 3398
Indexes created Thu Oct 02 07:10:07 GMT 2025