ath.c revision 1.22
1 /* $NetBSD: ath.c,v 1.22 2004/03/15 03:26:04 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.36 2003/11/29 01:23:59 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.22 2004/03/15 03:26:04 dyoung Exp $"); 45 #endif 46 47 /* 48 * Driver for the Atheros Wireless LAN controller. 49 * 50 * This software is derived from work of Atsushi Onoe; his contribution 51 * is greatly appreciated. 52 */ 53 54 #include "opt_inet.h" 55 56 #ifdef __NetBSD__ 57 #include "bpfilter.h" 58 #endif /* __NetBSD__ */ 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/types.h> 63 #include <sys/sysctl.h> 64 #include <sys/mbuf.h> 65 #include <sys/malloc.h> 66 #include <sys/lock.h> 67 #ifdef __FreeBSD__ 68 #include <sys/mutex.h> 69 #endif 70 #include <sys/kernel.h> 71 #include <sys/socket.h> 72 #include <sys/sockio.h> 73 #include <sys/errno.h> 74 #include <sys/callout.h> 75 #ifdef __FreeBSD__ 76 #include <sys/bus.h> 77 #else 78 #include <machine/bus.h> 79 #endif 80 #include <sys/endian.h> 81 82 #include <machine/bus.h> 83 84 #include <net/if.h> 85 #include <net/if_dl.h> 86 #include <net/if_media.h> 87 #include <net/if_arp.h> 88 #ifdef __FreeBSD__ 89 #include <net/ethernet.h> 90 #else 91 #include <net/if_ether.h> 92 #endif 93 #include <net/if_llc.h> 94 95 #include <net80211/ieee80211_var.h> 96 #include <net80211/ieee80211_compat.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #endif 101 102 #ifdef INET 103 #include <netinet/in.h> 104 #endif 105 106 #include <dev/ic/athcompat.h> 107 108 #define AR_DEBUG 109 #ifdef __FreeBSD__ 110 #include <dev/ath/if_athvar.h> 111 #include <contrib/dev/ath/ah_desc.h> 112 #else 113 #include <dev/ic/athvar.h> 114 #include <../contrib/sys/dev/ic/athhal_desc.h> 115 #endif 116 117 /* unaligned little endian access */ 118 #define LE_READ_2(p) \ 119 ((u_int16_t) \ 120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 121 #define LE_READ_4(p) \ 122 ((u_int32_t) \ 123 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 124 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 125 126 #ifdef __FreeBSD__ 127 static void ath_init(void *); 128 #else 129 static int ath_init(struct ifnet *); 130 #endif 131 static int ath_init1(struct ath_softc *); 132 static int ath_intr1(struct ath_softc *); 133 static void ath_stop(struct ifnet *); 134 static void ath_start(struct ifnet *); 135 static void ath_reset(struct ath_softc *); 136 static int ath_media_change(struct ifnet *); 137 static void ath_watchdog(struct ifnet *); 138 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 139 static void ath_fatal_proc(void *, int); 140 static void ath_rxorn_proc(void *, int); 141 static void ath_bmiss_proc(void *, int); 142 static void ath_initkeytable(struct ath_softc *); 143 static void ath_mode_init(struct ath_softc *); 144 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 145 static void ath_beacon_proc(void *, int); 146 static void ath_beacon_free(struct ath_softc *); 147 static void ath_beacon_config(struct ath_softc *); 148 static int ath_desc_alloc(struct ath_softc *); 149 static void ath_desc_free(struct ath_softc *); 150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 151 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 152 static void ath_node_copy(struct ieee80211com *, 153 struct ieee80211_node *, const struct ieee80211_node *); 154 static u_int8_t ath_node_getrssi(struct ieee80211com *, 155 struct ieee80211_node *); 156 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 157 static void ath_rx_proc(void *, int); 158 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 159 struct ath_buf *, struct mbuf *); 160 static void ath_tx_proc(void *, int); 161 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 162 static void ath_draintxq(struct ath_softc *); 163 static void ath_stoprecv(struct ath_softc *); 164 static int ath_startrecv(struct ath_softc *); 165 static void ath_next_scan(void *); 166 static void ath_calibrate(void *); 167 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 168 static void ath_newassoc(struct ieee80211com *, 169 struct ieee80211_node *, int); 170 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor, 171 HAL_BOOL xchanmode); 172 173 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 174 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 175 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 176 static void ath_rate_ctl(void *, struct ieee80211_node *); 177 178 #ifdef __NetBSD__ 179 int ath_enable(struct ath_softc *); 180 void ath_disable(struct ath_softc *); 181 void ath_power(int, void *); 182 #endif 183 184 #ifdef __FreeBSD__ 185 SYSCTL_DECL(_hw_ath); 186 /* XXX validate sysctl values */ 187 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 188 0, "channel dwell time (ms) for AP/station scanning"); 189 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 190 0, "chip calibration interval (secs)"); 191 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 192 0, "enable/disable outdoor operation"); 193 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 194 0, "country code"); 195 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 196 0, "regulatory domain"); 197 #endif /* __FreeBSD__ */ 198 199 #ifdef __NetBSD__ 200 static struct sysctlnode *ath_node_root; 201 static int ath_dwelltime_nodenum, ath_calibrate_nodenum, ath_outdoor_nodenum, 202 ath_countrycode_nodenum, ath_regdomain_nodenum, ath_debug_nodenum; 203 #endif /* __NetBSD__ */ 204 205 static int ath_dwelltime = 200; /* 5 channels/second */ 206 static int ath_calinterval = 30; /* calibrate every 30 secs */ 207 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 208 static int ath_xchanmode = AH_TRUE; /* enable extended channels */ 209 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 210 static int ath_regdomain = 0; /* regulatory domain */ 211 212 #ifdef AR_DEBUG 213 int ath_debug = 0; 214 #ifdef __FreeBSD__ 215 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 216 0, "control debugging printfs"); 217 #endif /* __FreeBSD__ */ 218 #define IFF_DUMPPKTS(_ifp) \ 219 (ath_debug || \ 220 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 221 static void ath_printrxbuf(struct ath_buf *bf, int); 222 static void ath_printtxbuf(struct ath_buf *bf, int); 223 #define DPRINTF(X) if (ath_debug) printf X 224 #define DPRINTF2(X) if (ath_debug > 1) printf X 225 #else 226 #define IFF_DUMPPKTS(_ifp) \ 227 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 228 #define DPRINTF(X) 229 #define DPRINTF2(X) 230 #endif 231 232 #ifdef __NetBSD__ 233 int 234 ath_activate(struct device *self, enum devact act) 235 { 236 struct ath_softc *sc = (struct ath_softc *)self; 237 int rv = 0, s; 238 239 s = splnet(); 240 switch (act) { 241 case DVACT_ACTIVATE: 242 rv = EOPNOTSUPP; 243 break; 244 case DVACT_DEACTIVATE: 245 if_deactivate(&sc->sc_ic.ic_if); 246 break; 247 } 248 splx(s); 249 return rv; 250 } 251 252 int 253 ath_enable(struct ath_softc *sc) 254 { 255 if (ATH_IS_ENABLED(sc) == 0) { 256 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 257 printf("%s: device enable failed\n", 258 sc->sc_dev.dv_xname); 259 return (EIO); 260 } 261 sc->sc_flags |= ATH_ENABLED; 262 } 263 return (0); 264 } 265 266 void 267 ath_disable(struct ath_softc *sc) 268 { 269 if (!ATH_IS_ENABLED(sc)) 270 return; 271 if (sc->sc_disable != NULL) 272 (*sc->sc_disable)(sc); 273 sc->sc_flags &= ~ATH_ENABLED; 274 } 275 276 static int 277 sysctl_ath_verify(SYSCTLFN_ARGS) 278 { 279 int error, t; 280 struct sysctlnode node; 281 282 node = *rnode; 283 t = *(int*)rnode->sysctl_data; 284 node.sysctl_data = &t; 285 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 286 if (error || newp == NULL) 287 return (error); 288 289 DPRINTF2(("%s: t = %d, nodenum = %d, rnodenum = %d\n", __func__, t, 290 node.sysctl_num, rnode->sysctl_num)); 291 292 if (node.sysctl_num == ath_dwelltime_nodenum) { 293 if (t <= 0) 294 return (EINVAL); 295 } else if (node.sysctl_num == ath_calibrate_nodenum) { 296 if (t <= 0) 297 return (EINVAL); 298 #ifdef AR_DEBUG 299 } else if (node.sysctl_num == ath_debug_nodenum) { 300 if (t < 0 || t > 2) 301 return (EINVAL); 302 #endif /* AR_DEBUG */ 303 } else 304 return (EINVAL); 305 306 *(int*)rnode->sysctl_data = t; 307 308 return (0); 309 } 310 311 /* 312 * Setup sysctl(3) MIB, ath.*. 313 * 314 * TBD condition SYSCTL_PERMANENT on being an LKM or not 315 */ 316 SYSCTL_SETUP(sysctl_ath, "sysctl ath subtree setup") 317 { 318 int rc; 319 struct sysctlnode *node = NULL; 320 321 if ((rc = sysctl_createv(SYSCTL_PERMANENT, CTLTYPE_NODE, "hw", 322 &node, NULL, 0, NULL, 0, 323 CTL_HW, CTL_EOL)) != 0) 324 goto err; 325 326 node = NULL; 327 328 if ((rc = sysctl_createv(SYSCTL_PERMANENT, CTLTYPE_NODE, "ath", 329 &node, NULL, 0, NULL, 0, 330 CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 331 goto err; 332 333 ath_node_root = node; 334 node = NULL; 335 336 /* channel dwell time (ms) for AP/station scanning */ 337 if ((rc = sysctl_createv(SYSCTL_PERMANENT|SYSCTL_READWRITE, 338 CTLTYPE_INT, "dwell", &node, sysctl_ath_verify, 0, &ath_dwelltime, 339 0, CTL_HW, ath_node_root->sysctl_num, CTL_CREATE, 340 CTL_EOL)) != 0) 341 goto err; 342 343 ath_dwelltime_nodenum = node->sysctl_num; 344 node = NULL; 345 346 /* chip calibration interval (secs) */ 347 if ((rc = sysctl_createv(SYSCTL_PERMANENT|SYSCTL_READWRITE, 348 CTLTYPE_INT, "calibrate", &node, sysctl_ath_verify, 349 0, &ath_calinterval, 0, CTL_HW, 350 ath_node_root->sysctl_num, CTL_CREATE, CTL_EOL)) != 0) 351 goto err; 352 353 ath_calibrate_nodenum = node->sysctl_num; 354 node = NULL; 355 356 /* enable/disable outdoor operation */ 357 if ((rc = sysctl_createv(SYSCTL_PERMANENT|SYSCTL_READONLY, CTLTYPE_INT, 358 "outdoor", &node, NULL, 0, &ath_outdoor, 0, 359 CTL_HW, ath_node_root->sysctl_num, CTL_CREATE, 360 CTL_EOL)) != 0) 361 goto err; 362 363 ath_outdoor_nodenum = node->sysctl_num; 364 node = NULL; 365 366 /* country code */ 367 if ((rc = sysctl_createv(SYSCTL_PERMANENT|SYSCTL_READONLY, CTLTYPE_INT, 368 "countrycode", &node, NULL, 0, &ath_countrycode, 0, 369 CTL_HW, ath_node_root->sysctl_num, CTL_CREATE, 370 CTL_EOL)) != 0) 371 goto err; 372 373 ath_countrycode_nodenum = node->sysctl_num; 374 node = NULL; 375 376 /* regulatory domain */ 377 if ((rc = sysctl_createv(SYSCTL_PERMANENT|SYSCTL_READONLY, CTLTYPE_INT, 378 "regdomain", &node, NULL, 0, &ath_regdomain, 0, 379 CTL_HW, ath_node_root->sysctl_num, CTL_CREATE, 380 CTL_EOL)) != 0) 381 goto err; 382 383 ath_regdomain_nodenum = node->sysctl_num; 384 385 #ifdef AR_DEBUG 386 node = NULL; 387 388 /* control debugging printfs */ 389 if ((rc = sysctl_createv(SYSCTL_PERMANENT|SYSCTL_READWRITE, CTLTYPE_INT, 390 "debug", &node, sysctl_ath_verify, 0, &ath_debug, 0, 391 CTL_HW, ath_node_root->sysctl_num, CTL_CREATE, 392 CTL_EOL)) != 0) 393 goto err; 394 395 ath_debug_nodenum = node->sysctl_num; 396 397 #endif /* AR_DEBUG */ 398 return; 399 err: 400 printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 401 } 402 #endif /* __NetBSD__ */ 403 404 int 405 ath_attach(u_int16_t devid, struct ath_softc *sc) 406 { 407 struct ieee80211com *ic = &sc->sc_ic; 408 struct ifnet *ifp = &ic->ic_if; 409 struct ath_hal *ah; 410 HAL_STATUS status; 411 int error = 0; 412 413 DPRINTF(("ath_attach: devid 0x%x\n", devid)); 414 415 #ifdef __FreeBSD__ 416 /* set these up early for if_printf use */ 417 if_initname(ifp, device_get_name(sc->sc_dev), 418 device_get_unit(sc->sc_dev)); 419 #else 420 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 421 #endif 422 423 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 424 if (ah == NULL) { 425 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 426 status); 427 error = ENXIO; 428 goto bad; 429 } 430 if (ah->ah_abi != HAL_ABI_VERSION) { 431 if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n", 432 ah->ah_abi, HAL_ABI_VERSION); 433 error = ENXIO; 434 goto bad; 435 } 436 if_printf(ifp, "mac %d.%d phy %d.%d", 437 ah->ah_macVersion, ah->ah_macRev, 438 ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf); 439 if (ah->ah_analog5GhzRev) 440 printf(" 5ghz radio %d.%d", 441 ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf); 442 if (ah->ah_analog2GhzRev) 443 printf(" 2ghz radio %d.%d", 444 ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf); 445 printf("\n"); 446 sc->sc_ah = ah; 447 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 448 449 /* 450 * Collect the channel list using the default country 451 * code and including outdoor channels. The 802.11 layer 452 * is resposible for filtering this list based on settings 453 * like the phy mode. 454 */ 455 error = ath_getchannels(sc, ath_countrycode, ath_outdoor, 456 ath_xchanmode); 457 if (error != 0) 458 goto bad; 459 /* 460 * Copy these back; they are set as a side effect 461 * of constructing the channel list. 462 */ 463 ath_regdomain = ath_hal_getregdomain(ah); 464 ath_countrycode = ath_hal_getcountrycode(ah); 465 466 /* 467 * Setup rate tables for all potential media types. 468 */ 469 ath_rate_setup(sc, IEEE80211_MODE_11A); 470 ath_rate_setup(sc, IEEE80211_MODE_11B); 471 ath_rate_setup(sc, IEEE80211_MODE_11G); 472 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 473 474 error = ath_desc_alloc(sc); 475 if (error != 0) { 476 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 477 goto bad; 478 } 479 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 480 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 481 482 #ifdef __FreeBSD__ 483 ATH_TXBUF_LOCK_INIT(sc); 484 ATH_TXQ_LOCK_INIT(sc); 485 #endif 486 487 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 488 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 489 ATH_TASK_INIT(&sc->sc_swbatask, ath_beacon_proc, sc); 490 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 491 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 492 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 493 494 /* 495 * For now just pre-allocate one data queue and one 496 * beacon queue. Note that the HAL handles resetting 497 * them at the needed time. Eventually we'll want to 498 * allocate more tx queues for splitting management 499 * frames and for QOS support. 500 */ 501 sc->sc_txhalq = ath_hal_setuptxqueue(ah, 502 HAL_TX_QUEUE_DATA, 503 AH_TRUE /* enable interrupts */ 504 ); 505 if (sc->sc_txhalq == (u_int) -1) { 506 if_printf(ifp, "unable to setup a data xmit queue!\n"); 507 goto bad; 508 } 509 sc->sc_bhalq = ath_hal_setuptxqueue(ah, 510 HAL_TX_QUEUE_BEACON, 511 AH_TRUE /* enable interrupts */ 512 ); 513 if (sc->sc_bhalq == (u_int) -1) { 514 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 515 goto bad; 516 } 517 518 ifp->if_softc = sc; 519 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 520 ifp->if_start = ath_start; 521 ifp->if_watchdog = ath_watchdog; 522 ifp->if_ioctl = ath_ioctl; 523 ifp->if_init = ath_init; 524 #ifdef __FreeBSD__ 525 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 526 #else 527 #if 0 528 ifp->if_stop = ath_stop; /* XXX */ 529 #endif 530 IFQ_SET_READY(&ifp->if_snd); 531 #endif 532 533 ic->ic_softc = sc; 534 ic->ic_newassoc = ath_newassoc; 535 /* XXX not right but it's not used anywhere important */ 536 ic->ic_phytype = IEEE80211_T_OFDM; 537 ic->ic_opmode = IEEE80211_M_STA; 538 ic->ic_caps = IEEE80211_C_WEP /* wep supported */ 539 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 540 | IEEE80211_C_HOSTAP /* hostap mode */ 541 | IEEE80211_C_MONITOR /* monitor mode */ 542 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 543 | IEEE80211_C_RCVMGT; /* recv management frames */ 544 545 /* get mac address from hardware */ 546 ath_hal_getmac(ah, ic->ic_myaddr); 547 548 #ifdef __NetBSD__ 549 if_attach(ifp); 550 #endif 551 /* call MI attach routine. */ 552 ieee80211_ifattach(ifp); 553 /* override default methods */ 554 ic->ic_node_alloc = ath_node_alloc; 555 ic->ic_node_free = ath_node_free; 556 ic->ic_node_copy = ath_node_copy; 557 ic->ic_node_getrssi = ath_node_getrssi; 558 sc->sc_newstate = ic->ic_newstate; 559 ic->ic_newstate = ath_newstate; 560 /* complete initialization */ 561 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 562 563 #if NBPFILTER > 0 564 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 565 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 566 &sc->sc_drvbpf); 567 #endif 568 /* 569 * Initialize constant fields. 570 * 571 * NB: the channel is setup each time we transition to the 572 * RUN state to avoid filling it in for each frame. 573 */ 574 sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th); 575 sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT; 576 577 sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th); 578 sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT; 579 580 if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr)); 581 582 #ifdef __NetBSD__ 583 sc->sc_flags |= ATH_ATTACHED; 584 /* 585 * Make sure the interface is shutdown during reboot. 586 */ 587 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 588 if (sc->sc_sdhook == NULL) 589 printf("%s: WARNING: unable to establish shutdown hook\n", 590 sc->sc_dev.dv_xname); 591 sc->sc_powerhook = powerhook_establish(ath_power, sc); 592 if (sc->sc_powerhook == NULL) 593 printf("%s: WARNING: unable to establish power hook\n", 594 sc->sc_dev.dv_xname); 595 #endif 596 return 0; 597 bad: 598 if (ah) 599 ath_hal_detach(ah); 600 sc->sc_invalid = 1; 601 return error; 602 } 603 604 int 605 ath_detach(struct ath_softc *sc) 606 { 607 struct ifnet *ifp = &sc->sc_ic.ic_if; 608 ath_softc_critsect_decl(s); 609 610 DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags)); 611 if ((sc->sc_flags & ATH_ATTACHED) == 0) 612 return (0); 613 614 ath_softc_critsect_begin(sc, s); 615 ath_stop(ifp); 616 #if NBPFILTER > 0 617 bpfdetach(ifp); 618 #endif 619 ath_desc_free(sc); 620 ath_hal_detach(sc->sc_ah); 621 ieee80211_ifdetach(ifp); 622 #ifdef __NetBSD__ 623 if_detach(ifp); 624 #endif /* __NetBSD__ */ 625 ath_softc_critsect_end(sc, s); 626 #ifdef __NetBSD__ 627 powerhook_disestablish(sc->sc_powerhook); 628 shutdownhook_disestablish(sc->sc_sdhook); 629 #endif /* __NetBSD__ */ 630 #ifdef __FreeBSD__ 631 632 ATH_TXBUF_LOCK_DESTROY(sc); 633 ATH_TXQ_LOCK_DESTROY(sc); 634 635 #endif /* __FreeBSD__ */ 636 return 0; 637 } 638 639 #ifdef __NetBSD__ 640 void 641 ath_power(int why, void *arg) 642 { 643 struct ath_softc *sc = arg; 644 int s; 645 646 DPRINTF(("ath_power(%d)\n", why)); 647 648 s = splnet(); 649 switch (why) { 650 case PWR_SUSPEND: 651 case PWR_STANDBY: 652 ath_suspend(sc, why); 653 break; 654 case PWR_RESUME: 655 ath_resume(sc, why); 656 break; 657 case PWR_SOFTSUSPEND: 658 case PWR_SOFTSTANDBY: 659 case PWR_SOFTRESUME: 660 break; 661 } 662 splx(s); 663 } 664 #endif 665 666 void 667 ath_suspend(struct ath_softc *sc, int why) 668 { 669 struct ifnet *ifp = &sc->sc_ic.ic_if; 670 671 DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags)); 672 673 ath_stop(ifp); 674 if (sc->sc_power != NULL) 675 (*sc->sc_power)(sc, why); 676 } 677 678 void 679 ath_resume(struct ath_softc *sc, int why) 680 { 681 struct ifnet *ifp = &sc->sc_ic.ic_if; 682 683 DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags)); 684 685 if (ifp->if_flags & IFF_UP) { 686 ath_init(ifp); 687 #if 0 688 (void)ath_intr(sc); 689 #endif 690 if (sc->sc_power != NULL) 691 (*sc->sc_power)(sc, why); 692 if (ifp->if_flags & IFF_RUNNING) 693 ath_start(ifp); 694 } 695 } 696 697 #ifdef __NetBSD__ 698 void 699 ath_shutdown(void *arg) 700 { 701 struct ath_softc *sc = arg; 702 703 ath_stop(&sc->sc_ic.ic_if); 704 } 705 #else 706 void 707 ath_shutdown(struct ath_softc *sc) 708 { 709 #if 1 710 return; 711 #else 712 struct ifnet *ifp = &sc->sc_ic.ic_if; 713 714 DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags)); 715 716 ath_stop(ifp); 717 #endif 718 } 719 #endif 720 721 #ifdef __NetBSD__ 722 int 723 ath_intr(void *arg) 724 { 725 return ath_intr1((struct ath_softc *)arg); 726 } 727 #else 728 void 729 ath_intr(void *arg) 730 { 731 (void)ath_intr1((struct ath_softc *)arg); 732 } 733 #endif 734 735 static int 736 ath_intr1(struct ath_softc *sc) 737 { 738 struct ieee80211com *ic = &sc->sc_ic; 739 struct ifnet *ifp = &ic->ic_if; 740 struct ath_hal *ah = sc->sc_ah; 741 HAL_INT status; 742 743 if (sc->sc_invalid) { 744 /* 745 * The hardware is not ready/present, don't touch anything. 746 * Note this can happen early on if the IRQ is shared. 747 */ 748 DPRINTF(("ath_intr: invalid; ignored\n")); 749 return 0; 750 } 751 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 752 DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags)); 753 ath_hal_getisr(ah, &status); /* clear ISR */ 754 ath_hal_intrset(ah, 0); /* disable further intr's */ 755 return 1; /* XXX */ 756 } 757 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 758 DPRINTF2(("ath_intr: status 0x%x\n", status)); 759 #ifdef AR_DEBUG 760 if (ath_debug && 761 (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) { 762 if_printf(ifp, "ath_intr: status 0x%x\n", status); 763 ath_hal_dumpstate(ah); 764 } 765 #endif /* AR_DEBUG */ 766 status &= sc->sc_imask; /* discard unasked for bits */ 767 if (status & HAL_INT_FATAL) { 768 sc->sc_stats.ast_hardware++; 769 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 770 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 771 } else if (status & HAL_INT_RXORN) { 772 sc->sc_stats.ast_rxorn++; 773 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 774 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 775 } else { 776 if (status & HAL_INT_RXEOL) { 777 /* 778 * NB: the hardware should re-read the link when 779 * RXE bit is written, but it doesn't work at 780 * least on older hardware revs. 781 */ 782 sc->sc_stats.ast_rxeol++; 783 sc->sc_rxlink = NULL; 784 } 785 if (status & HAL_INT_TXURN) { 786 sc->sc_stats.ast_txurn++; 787 /* bump tx trigger level */ 788 ath_hal_updatetxtriglevel(ah, AH_TRUE); 789 } 790 if (status & HAL_INT_RX) 791 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 792 if (status & HAL_INT_TX) 793 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 794 if (status & HAL_INT_SWBA) 795 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_swbatask); 796 if (status & HAL_INT_BMISS) { 797 sc->sc_stats.ast_bmiss++; 798 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 799 } 800 } 801 return 1; 802 } 803 804 static void 805 ath_fatal_proc(void *arg, int pending) 806 { 807 struct ath_softc *sc = arg; 808 809 device_printf(sc->sc_dev, "hardware error; resetting\n"); 810 ath_reset(sc); 811 } 812 813 static void 814 ath_rxorn_proc(void *arg, int pending) 815 { 816 struct ath_softc *sc = arg; 817 818 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 819 ath_reset(sc); 820 } 821 822 static void 823 ath_bmiss_proc(void *arg, int pending) 824 { 825 struct ath_softc *sc = arg; 826 struct ieee80211com *ic = &sc->sc_ic; 827 828 DPRINTF(("ath_bmiss_proc: pending %u\n", pending)); 829 if (ic->ic_opmode != IEEE80211_M_STA) 830 return; 831 if (ic->ic_state == IEEE80211_S_RUN) { 832 /* 833 * Rather than go directly to scan state, try to 834 * reassociate first. If that fails then the state 835 * machine will drop us into scanning after timing 836 * out waiting for a probe response. 837 */ 838 ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1); 839 } 840 } 841 842 static u_int 843 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 844 { 845 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 846 847 switch (mode) { 848 case IEEE80211_MODE_AUTO: 849 return 0; 850 case IEEE80211_MODE_11A: 851 return CHANNEL_A; 852 case IEEE80211_MODE_11B: 853 return CHANNEL_B; 854 case IEEE80211_MODE_11G: 855 return CHANNEL_PUREG; 856 case IEEE80211_MODE_TURBO: 857 return CHANNEL_T; 858 default: 859 panic("%s: unsupported mode %d\n", __func__, mode); 860 return 0; 861 } 862 } 863 864 #ifdef __NetBSD__ 865 static int 866 ath_init(struct ifnet *ifp) 867 { 868 return ath_init1((struct ath_softc *)ifp->if_softc); 869 } 870 #else 871 static void 872 ath_init(void *arg) 873 { 874 (void)ath_init1((struct ath_softc *)arg); 875 } 876 #endif 877 878 static int 879 ath_init1(struct ath_softc *sc) 880 { 881 struct ieee80211com *ic = &sc->sc_ic; 882 struct ifnet *ifp = &ic->ic_if; 883 struct ieee80211_node *ni; 884 enum ieee80211_phymode mode; 885 struct ath_hal *ah = sc->sc_ah; 886 HAL_STATUS status; 887 HAL_CHANNEL hchan; 888 int error = 0; 889 ath_softc_critsect_decl(s); 890 891 DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags)); 892 893 #ifdef __NetBSD__ 894 if ((error = ath_enable(sc)) != 0) 895 return error; 896 #endif 897 898 ath_softc_critsect_begin(sc, s); 899 /* 900 * Stop anything previously setup. This is safe 901 * whether this is the first time through or not. 902 */ 903 ath_stop(ifp); 904 905 /* 906 * The basic interface to setting the hardware in a good 907 * state is ``reset''. On return the hardware is known to 908 * be powered up and with interrupts disabled. This must 909 * be followed by initialization of the appropriate bits 910 * and then setup of the interrupt mask. 911 */ 912 hchan.channel = ic->ic_ibss_chan->ic_freq; 913 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 914 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 915 if_printf(ifp, "unable to reset hardware; hal status %u\n", 916 status); 917 error = -1; 918 goto done; 919 } 920 921 /* 922 * Setup the hardware after reset: the key cache 923 * is filled as needed and the receive engine is 924 * set going. Frame transmit is handled entirely 925 * in the frame output path; there's nothing to do 926 * here except setup the interrupt mask. 927 */ 928 if (ic->ic_flags & IEEE80211_F_WEPON) 929 ath_initkeytable(sc); 930 if ((error = ath_startrecv(sc)) != 0) { 931 if_printf(ifp, "unable to start recv logic\n"); 932 goto done; 933 } 934 935 /* 936 * Enable interrupts. 937 */ 938 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 939 | HAL_INT_RXEOL | HAL_INT_RXORN 940 | HAL_INT_FATAL | HAL_INT_GLOBAL; 941 ath_hal_intrset(ah, sc->sc_imask); 942 943 ifp->if_flags |= IFF_RUNNING; 944 ic->ic_state = IEEE80211_S_INIT; 945 946 /* 947 * The hardware should be ready to go now so it's safe 948 * to kick the 802.11 state machine as it's likely to 949 * immediately call back to us to send mgmt frames. 950 */ 951 ni = ic->ic_bss; 952 ni->ni_chan = ic->ic_ibss_chan; 953 mode = ieee80211_chan2mode(ic, ni->ni_chan); 954 if (mode != sc->sc_curmode) 955 ath_setcurmode(sc, mode); 956 if (ic->ic_opmode != IEEE80211_M_MONITOR) 957 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 958 else 959 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 960 done: 961 ath_softc_critsect_end(sc, s); 962 return error; 963 } 964 965 static void 966 ath_stop(struct ifnet *ifp) 967 { 968 struct ieee80211com *ic = (struct ieee80211com *) ifp; 969 struct ath_softc *sc = ifp->if_softc; 970 struct ath_hal *ah = sc->sc_ah; 971 ath_softc_critsect_decl(s); 972 973 DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n", 974 sc->sc_invalid, ifp->if_flags)); 975 976 ath_softc_critsect_begin(sc, s); 977 if (ifp->if_flags & IFF_RUNNING) { 978 /* 979 * Shutdown the hardware and driver: 980 * disable interrupts 981 * turn off timers 982 * clear transmit machinery 983 * clear receive machinery 984 * drain and release tx queues 985 * reclaim beacon resources 986 * reset 802.11 state machine 987 * power down hardware 988 * 989 * Note that some of this work is not possible if the 990 * hardware is gone (invalid). 991 */ 992 ifp->if_flags &= ~IFF_RUNNING; 993 ifp->if_timer = 0; 994 if (!sc->sc_invalid) 995 ath_hal_intrset(ah, 0); 996 ath_draintxq(sc); 997 if (!sc->sc_invalid) 998 ath_stoprecv(sc); 999 else 1000 sc->sc_rxlink = NULL; 1001 #ifdef __FreeBSD__ 1002 IF_DRAIN(&ifp->if_snd); 1003 #else 1004 IF_PURGE(&ifp->if_snd); 1005 #endif 1006 ath_beacon_free(sc); 1007 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 1008 if (!sc->sc_invalid) { 1009 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 1010 } 1011 #ifdef __NetBSD__ 1012 ath_disable(sc); 1013 #endif 1014 } 1015 ath_softc_critsect_end(sc, s); 1016 } 1017 1018 /* 1019 * Reset the hardware w/o losing operational state. This is 1020 * basically a more efficient way of doing ath_stop, ath_init, 1021 * followed by state transitions to the current 802.11 1022 * operational state. Used to recover from errors rx overrun 1023 * and to reset the hardware when rf gain settings must be reset. 1024 */ 1025 static void 1026 ath_reset(struct ath_softc *sc) 1027 { 1028 struct ieee80211com *ic = &sc->sc_ic; 1029 struct ifnet *ifp = &ic->ic_if; 1030 struct ath_hal *ah = sc->sc_ah; 1031 struct ieee80211_channel *c; 1032 HAL_STATUS status; 1033 HAL_CHANNEL hchan; 1034 1035 /* 1036 * Convert to a HAL channel description with the flags 1037 * constrained to reflect the current operating mode. 1038 */ 1039 c = ic->ic_ibss_chan; 1040 hchan.channel = c->ic_freq; 1041 hchan.channelFlags = ath_chan2flags(ic, c); 1042 1043 ath_hal_intrset(ah, 0); /* disable interrupts */ 1044 ath_draintxq(sc); /* stop xmit side */ 1045 ath_stoprecv(sc); /* stop recv side */ 1046 /* NB: indicate channel change so we do a full reset */ 1047 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 1048 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 1049 __func__, status); 1050 ath_hal_intrset(ah, sc->sc_imask); 1051 if (ath_startrecv(sc) != 0) /* restart recv */ 1052 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 1053 ath_start(ifp); /* restart xmit */ 1054 if (ic->ic_state == IEEE80211_S_RUN) 1055 ath_beacon_config(sc); /* restart beacons */ 1056 } 1057 1058 static void 1059 ath_start(struct ifnet *ifp) 1060 { 1061 struct ath_softc *sc = ifp->if_softc; 1062 struct ath_hal *ah = sc->sc_ah; 1063 struct ieee80211com *ic = &sc->sc_ic; 1064 struct ieee80211_node *ni; 1065 struct ath_buf *bf; 1066 struct mbuf *m; 1067 struct ieee80211_frame *wh; 1068 ath_txbuf_critsect_decl(s); 1069 1070 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1071 return; 1072 for (;;) { 1073 /* 1074 * Grab a TX buffer and associated resources. 1075 */ 1076 ath_txbuf_critsect_begin(sc, s); 1077 bf = TAILQ_FIRST(&sc->sc_txbuf); 1078 if (bf != NULL) 1079 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 1080 ath_txbuf_critsect_end(sc, s); 1081 if (bf == NULL) { 1082 DPRINTF(("ath_start: out of xmit buffers\n")); 1083 sc->sc_stats.ast_tx_qstop++; 1084 ifp->if_flags |= IFF_OACTIVE; 1085 break; 1086 } 1087 /* 1088 * Poll the management queue for frames; they 1089 * have priority over normal data frames. 1090 */ 1091 IF_DEQUEUE(&ic->ic_mgtq, m); 1092 if (m == NULL) { 1093 /* 1094 * No data frames go out unless we're associated. 1095 */ 1096 if (ic->ic_state != IEEE80211_S_RUN) { 1097 DPRINTF(("ath_start: ignore data packet, " 1098 "state %u\n", ic->ic_state)); 1099 sc->sc_stats.ast_tx_discard++; 1100 ath_txbuf_critsect_begin(sc, s); 1101 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1102 ath_txbuf_critsect_end(sc, s); 1103 break; 1104 } 1105 IF_DEQUEUE(&ifp->if_snd, m); 1106 if (m == NULL) { 1107 ath_txbuf_critsect_begin(sc, s); 1108 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1109 ath_txbuf_critsect_end(sc, s); 1110 break; 1111 } 1112 ifp->if_opackets++; 1113 1114 #ifdef __NetBSD__ 1115 #if NBPFILTER > 0 1116 if (ifp->if_bpf) 1117 bpf_mtap(ifp->if_bpf, m); 1118 #endif 1119 #endif 1120 #ifdef __FreeBSD__ 1121 BPF_MTAP(ifp, m); 1122 #endif 1123 /* 1124 * Encapsulate the packet in prep for transmission. 1125 */ 1126 m = ieee80211_encap(ifp, m, &ni); 1127 if (m == NULL) { 1128 DPRINTF(("ath_start: encapsulation failure\n")); 1129 sc->sc_stats.ast_tx_encap++; 1130 goto bad; 1131 } 1132 wh = mtod(m, struct ieee80211_frame *); 1133 if (ic->ic_flags & IEEE80211_F_WEPON) 1134 wh->i_fc[1] |= IEEE80211_FC1_WEP; 1135 } else { 1136 /* 1137 * Hack! The referenced node pointer is in the 1138 * rcvif field of the packet header. This is 1139 * placed there by ieee80211_mgmt_output because 1140 * we need to hold the reference with the frame 1141 * and there's no other way (other than packet 1142 * tags which we consider too expensive to use) 1143 * to pass it along. 1144 */ 1145 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1146 m->m_pkthdr.rcvif = NULL; 1147 1148 wh = mtod(m, struct ieee80211_frame *); 1149 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1150 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 1151 /* fill time stamp */ 1152 u_int64_t tsf; 1153 u_int32_t *tstamp; 1154 1155 tsf = ath_hal_gettsf64(ah); 1156 /* XXX: adjust 100us delay to xmit */ 1157 tsf += 100; 1158 tstamp = (u_int32_t *)&wh[1]; 1159 tstamp[0] = htole32(tsf & 0xffffffff); 1160 tstamp[1] = htole32(tsf >> 32); 1161 } 1162 sc->sc_stats.ast_tx_mgmt++; 1163 } 1164 #if NBPFILTER > 0 1165 if (ic->ic_rawbpf) 1166 bpf_mtap(ic->ic_rawbpf, m); 1167 #endif 1168 1169 #if NBPFILTER > 0 1170 if (sc->sc_drvbpf) { 1171 #ifdef __FreeBSD__ 1172 struct mbuf *mb; 1173 1174 MGETHDR(mb, M_DONTWAIT, m->m_type); 1175 if (mb != NULL) { 1176 sc->sc_tx_th.wt_rate = 1177 ni->ni_rates.rs_rates[ni->ni_txrate]; 1178 1179 mb->m_next = m; 1180 mb->m_data = (caddr_t)&sc->sc_tx_th; 1181 mb->m_len = sizeof(sc->sc_tx_th); 1182 mb->m_pkthdr.len += mb->m_len; 1183 bpf_mtap(sc->sc_drvbpf, mb); 1184 m_free(mb); 1185 } 1186 #else 1187 struct mbuf mb; 1188 1189 M_COPY_PKTHDR(&mb, m); 1190 sc->sc_tx_th.wt_rate = 1191 ni->ni_rates.rs_rates[ni->ni_txrate]; 1192 1193 mb.m_next = m; 1194 mb.m_data = (caddr_t)&sc->sc_tx_th; 1195 mb.m_len = sizeof(sc->sc_tx_th); 1196 mb.m_pkthdr.len += mb.m_len; 1197 bpf_mtap(sc->sc_drvbpf, &mb); 1198 #endif 1199 } 1200 #endif 1201 1202 if (ath_tx_start(sc, ni, bf, m)) { 1203 bad: 1204 ath_txbuf_critsect_begin(sc, s); 1205 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1206 ath_txbuf_critsect_end(sc, s); 1207 ifp->if_oerrors++; 1208 if (ni && ni != ic->ic_bss) 1209 ieee80211_free_node(ic, ni); 1210 continue; 1211 } 1212 1213 sc->sc_tx_timer = 5; 1214 ifp->if_timer = 1; 1215 } 1216 } 1217 1218 static int 1219 ath_media_change(struct ifnet *ifp) 1220 { 1221 int error; 1222 1223 error = ieee80211_media_change(ifp); 1224 if (error == ENETRESET) { 1225 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1226 (IFF_RUNNING|IFF_UP)) 1227 ath_init(ifp); /* XXX lose error */ 1228 error = 0; 1229 } 1230 return error; 1231 } 1232 1233 static void 1234 ath_watchdog(struct ifnet *ifp) 1235 { 1236 struct ath_softc *sc = ifp->if_softc; 1237 struct ieee80211com *ic = &sc->sc_ic; 1238 1239 ifp->if_timer = 0; 1240 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1241 return; 1242 if (sc->sc_tx_timer) { 1243 if (--sc->sc_tx_timer == 0) { 1244 if_printf(ifp, "device timeout\n"); 1245 #ifdef AR_DEBUG 1246 if (ath_debug) 1247 ath_hal_dumpstate(sc->sc_ah); 1248 #endif /* AR_DEBUG */ 1249 ath_init(ifp); /* XXX ath_reset??? */ 1250 ifp->if_oerrors++; 1251 sc->sc_stats.ast_watchdog++; 1252 return; 1253 } 1254 ifp->if_timer = 1; 1255 } 1256 if (ic->ic_fixed_rate == -1) { 1257 /* 1258 * Run the rate control algorithm if we're not 1259 * locked at a fixed rate. 1260 */ 1261 if (ic->ic_opmode == IEEE80211_M_STA) 1262 ath_rate_ctl(sc, ic->ic_bss); 1263 else 1264 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1265 } 1266 ieee80211_watchdog(ifp); 1267 } 1268 1269 static int 1270 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1271 { 1272 struct ath_softc *sc = ifp->if_softc; 1273 struct ifreq *ifr = (struct ifreq *)data; 1274 int error = 0; 1275 ath_softc_critsect_decl(s); 1276 1277 ath_softc_critsect_begin(sc, s); 1278 switch (cmd) { 1279 case SIOCSIFFLAGS: 1280 if (ifp->if_flags & IFF_UP) { 1281 if (ifp->if_flags & IFF_RUNNING) { 1282 /* 1283 * To avoid rescanning another access point, 1284 * do not call ath_init() here. Instead, 1285 * only reflect promisc mode settings. 1286 */ 1287 ath_mode_init(sc); 1288 } else { 1289 /* 1290 * Beware of being called during detach to 1291 * reset promiscuous mode. In that case we 1292 * will still be marked UP but not RUNNING. 1293 * However trying to re-init the interface 1294 * is the wrong thing to do as we've already 1295 * torn down much of our state. There's 1296 * probably a better way to deal with this. 1297 */ 1298 if (!sc->sc_invalid) 1299 ath_init(ifp); /* XXX lose error */ 1300 } 1301 } else 1302 ath_stop(ifp); 1303 break; 1304 case SIOCADDMULTI: 1305 case SIOCDELMULTI: 1306 #ifdef __FreeBSD__ 1307 /* 1308 * The upper layer has already installed/removed 1309 * the multicast address(es), just recalculate the 1310 * multicast filter for the card. 1311 */ 1312 if (ifp->if_flags & IFF_RUNNING) 1313 ath_mode_init(sc); 1314 #endif 1315 #ifdef __NetBSD__ 1316 error = (cmd == SIOCADDMULTI) ? 1317 ether_addmulti(ifr, &sc->sc_ic.ic_ec) : 1318 ether_delmulti(ifr, &sc->sc_ic.ic_ec); 1319 if (error == ENETRESET) { 1320 if (ifp->if_flags & IFF_RUNNING) 1321 ath_mode_init(sc); 1322 error = 0; 1323 } 1324 #endif 1325 break; 1326 case SIOCGATHSTATS: 1327 error = copyout(&sc->sc_stats, 1328 ifr->ifr_data, sizeof (sc->sc_stats)); 1329 break; 1330 case SIOCGATHDIAG: { 1331 struct ath_diag *ad = (struct ath_diag *)data; 1332 struct ath_hal *ah = sc->sc_ah; 1333 void *data; 1334 u_int size; 1335 1336 if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) { 1337 if (size < ad->ad_size) 1338 ad->ad_size = size; 1339 if (data) 1340 error = copyout(data, ad->ad_data, ad->ad_size); 1341 } else 1342 error = EINVAL; 1343 break; 1344 } 1345 default: 1346 error = ieee80211_ioctl(ifp, cmd, data); 1347 if (error == ENETRESET) { 1348 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1349 (IFF_RUNNING|IFF_UP)) 1350 ath_init(ifp); /* XXX lose error */ 1351 error = 0; 1352 } 1353 break; 1354 } 1355 ath_softc_critsect_end(sc, s); 1356 return error; 1357 } 1358 1359 /* 1360 * Fill the hardware key cache with key entries. 1361 */ 1362 static void 1363 ath_initkeytable(struct ath_softc *sc) 1364 { 1365 struct ieee80211com *ic = &sc->sc_ic; 1366 struct ath_hal *ah = sc->sc_ah; 1367 int i; 1368 1369 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1370 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1371 if (k->wk_len == 0) 1372 ath_hal_keyreset(ah, i); 1373 else 1374 /* XXX return value */ 1375 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 1376 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 1377 } 1378 } 1379 1380 static void 1381 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1382 { 1383 u_int32_t val; 1384 u_int8_t pos; 1385 1386 val = LE_READ_4(dl + 0); 1387 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1388 val = LE_READ_4(dl + 3); 1389 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1390 pos &= 0x3f; 1391 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1392 } 1393 1394 #ifdef __FreeBSD__ 1395 static void 1396 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1397 { 1398 struct ieee80211com *ic = &sc->sc_ic; 1399 struct ifnet *ifp = &ic->ic_if; 1400 struct ifmultiaddr *ifma; 1401 1402 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1403 caddr_t dl; 1404 1405 /* calculate XOR of eight 6bit values */ 1406 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1407 ath_mcastfilter_accum(dl, &mfilt); 1408 } 1409 } 1410 #else 1411 static void 1412 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1413 { 1414 struct ifnet *ifp = &sc->sc_ic.ic_if; 1415 struct ether_multi *enm; 1416 struct ether_multistep estep; 1417 1418 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1419 while (enm != NULL) { 1420 /* XXX Punt on ranges. */ 1421 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1422 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1423 ifp->if_flags |= IFF_ALLMULTI; 1424 return; 1425 } 1426 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1427 ETHER_NEXT_MULTI(estep, enm); 1428 } 1429 ifp->if_flags &= ~IFF_ALLMULTI; 1430 } 1431 #endif 1432 1433 /* 1434 * Calculate the receive filter according to the 1435 * operating mode and state: 1436 * 1437 * o always accept unicast, broadcast, and multicast traffic 1438 * o maintain current state of phy error reception 1439 * o probe request frames are accepted only when operating in 1440 * hostap, adhoc, or monitor modes 1441 * o enable promiscuous mode according to the interface state 1442 * o accept beacons: 1443 * - when operating in adhoc mode so the 802.11 layer creates 1444 * node table entries for peers, 1445 * - when operating in station mode for collecting rssi data when 1446 * the station is otherwise quiet, or 1447 * - when scanning 1448 */ 1449 static u_int32_t 1450 ath_calcrxfilter(struct ath_softc *sc) 1451 { 1452 struct ieee80211com *ic = &sc->sc_ic; 1453 struct ath_hal *ah = sc->sc_ah; 1454 struct ifnet *ifp = &ic->ic_if; 1455 u_int32_t rfilt; 1456 1457 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1458 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1459 if (ic->ic_opmode != IEEE80211_M_STA) 1460 rfilt |= HAL_RX_FILTER_PROBEREQ; 1461 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 1462 (ifp->if_flags & IFF_PROMISC)) 1463 rfilt |= HAL_RX_FILTER_PROM; 1464 if (ic->ic_opmode == IEEE80211_M_STA || 1465 ic->ic_opmode == IEEE80211_M_IBSS || 1466 ic->ic_state == IEEE80211_S_SCAN) 1467 rfilt |= HAL_RX_FILTER_BEACON; 1468 return rfilt; 1469 } 1470 1471 static void 1472 ath_mode_init(struct ath_softc *sc) 1473 { 1474 #ifdef __FreeBSD__ 1475 struct ieee80211com *ic = &sc->sc_ic; 1476 #endif 1477 struct ath_hal *ah = sc->sc_ah; 1478 u_int32_t rfilt, mfilt[2]; 1479 1480 /* configure rx filter */ 1481 rfilt = ath_calcrxfilter(sc); 1482 ath_hal_setrxfilter(ah, rfilt); 1483 1484 /* configure operational mode */ 1485 ath_hal_setopmode(ah); 1486 1487 /* calculate and install multicast filter */ 1488 #ifdef __FreeBSD__ 1489 if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) { 1490 mfilt[0] = mfilt[1] = 0; 1491 ath_mcastfilter_compute(sc, &mfilt); 1492 } else { 1493 mfilt[0] = mfilt[1] = ~0; 1494 } 1495 #endif 1496 #ifdef __NetBSD__ 1497 mfilt[0] = mfilt[1] = 0; 1498 ath_mcastfilter_compute(sc, &mfilt); 1499 #endif 1500 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1501 DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n", 1502 rfilt, mfilt[0], mfilt[1])); 1503 } 1504 1505 #ifdef __FreeBSD__ 1506 static void 1507 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1508 { 1509 struct ath_buf *bf = arg; 1510 1511 KASSERT(nseg <= ATH_MAX_SCATTER, 1512 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1513 bf->bf_mapsize = mapsize; 1514 bf->bf_nseg = nseg; 1515 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1516 } 1517 #endif /* __FreeBSD__ */ 1518 1519 static struct mbuf * 1520 ath_getmbuf(int flags, int type, u_int pktlen) 1521 { 1522 struct mbuf *m; 1523 1524 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1525 #ifdef __FreeBSD__ 1526 if (pktlen <= MHLEN) 1527 MGETHDR(m, flags, type); 1528 else 1529 m = m_getcl(flags, type, M_PKTHDR); 1530 #else 1531 MGETHDR(m, flags, type); 1532 if (m != NULL && pktlen > MHLEN) 1533 MCLGET(m, flags); 1534 #endif 1535 return m; 1536 } 1537 1538 static int 1539 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1540 { 1541 struct ieee80211com *ic = &sc->sc_ic; 1542 struct ifnet *ifp = &ic->ic_if; 1543 struct ath_hal *ah = sc->sc_ah; 1544 struct ieee80211_frame *wh; 1545 struct ath_buf *bf; 1546 struct ath_desc *ds; 1547 struct mbuf *m; 1548 int error, pktlen; 1549 u_int8_t *frm, rate; 1550 u_int16_t capinfo; 1551 struct ieee80211_rateset *rs; 1552 const HAL_RATE_TABLE *rt; 1553 1554 bf = sc->sc_bcbuf; 1555 if (bf->bf_m != NULL) { 1556 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1557 m_freem(bf->bf_m); 1558 bf->bf_m = NULL; 1559 bf->bf_node = NULL; 1560 } 1561 /* 1562 * NB: the beacon data buffer must be 32-bit aligned; 1563 * we assume the mbuf routines will return us something 1564 * with this alignment (perhaps should assert). 1565 */ 1566 rs = &ni->ni_rates; 1567 pktlen = sizeof (struct ieee80211_frame) 1568 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6; 1569 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1570 pktlen += 2; 1571 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1572 if (m == NULL) { 1573 DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n", 1574 pktlen)); 1575 sc->sc_stats.ast_be_nombuf++; 1576 return ENOMEM; 1577 } 1578 1579 wh = mtod(m, struct ieee80211_frame *); 1580 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1581 IEEE80211_FC0_SUBTYPE_BEACON; 1582 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1583 *(u_int16_t *)wh->i_dur = 0; 1584 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1585 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1586 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1587 *(u_int16_t *)wh->i_seq = 0; 1588 1589 /* 1590 * beacon frame format 1591 * [8] time stamp 1592 * [2] beacon interval 1593 * [2] cabability information 1594 * [tlv] ssid 1595 * [tlv] supported rates 1596 * [tlv] parameter set (IBSS) 1597 * [tlv] extended supported rates 1598 */ 1599 frm = (u_int8_t *)&wh[1]; 1600 memset(frm, 0, 8); /* timestamp is set by hardware */ 1601 frm += 8; 1602 *(u_int16_t *)frm = htole16(ni->ni_intval); 1603 frm += 2; 1604 if (ic->ic_opmode == IEEE80211_M_IBSS) 1605 capinfo = IEEE80211_CAPINFO_IBSS; 1606 else 1607 capinfo = IEEE80211_CAPINFO_ESS; 1608 if (ic->ic_flags & IEEE80211_F_WEPON) 1609 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1610 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1611 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 1612 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1613 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1614 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1615 *(u_int16_t *)frm = htole16(capinfo); 1616 frm += 2; 1617 *frm++ = IEEE80211_ELEMID_SSID; 1618 *frm++ = ni->ni_esslen; 1619 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1620 frm += ni->ni_esslen; 1621 frm = ieee80211_add_rates(frm, rs); 1622 *frm++ = IEEE80211_ELEMID_DSPARMS; 1623 *frm++ = 1; 1624 *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan); 1625 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1626 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1627 *frm++ = 2; 1628 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1629 } else { 1630 /* TODO: TIM */ 1631 *frm++ = IEEE80211_ELEMID_TIM; 1632 *frm++ = 4; /* length */ 1633 *frm++ = 0; /* DTIM count */ 1634 *frm++ = 1; /* DTIM period */ 1635 *frm++ = 0; /* bitmap control */ 1636 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1637 } 1638 frm = ieee80211_add_xrates(frm, rs); 1639 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1640 KASSERT(m->m_pkthdr.len <= pktlen, 1641 ("beacon bigger than expected, len %u calculated %u", 1642 m->m_pkthdr.len, pktlen)); 1643 1644 DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len)); 1645 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1646 if (error != 0) { 1647 m_freem(m); 1648 return error; 1649 } 1650 KASSERT(bf->bf_nseg == 1, 1651 ("ath_beacon_alloc: multi-segment packet; nseg %u", 1652 bf->bf_nseg)); 1653 bf->bf_m = m; 1654 1655 /* setup descriptors */ 1656 ds = bf->bf_desc; 1657 1658 ds->ds_link = 0; 1659 ds->ds_data = bf->bf_segs[0].ds_addr; 1660 1661 DPRINTF2(("%s: segaddr %p seglen %u\n", __func__, 1662 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1663 1664 /* 1665 * Calculate rate code. 1666 * XXX everything at min xmit rate 1667 */ 1668 rt = sc->sc_currates; 1669 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1670 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1671 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1672 else 1673 rate = rt->info[0].rateCode; 1674 if (!ath_hal_setuptxdesc(ah, ds 1675 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1676 , sizeof(struct ieee80211_frame) /* header length */ 1677 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1678 , 0x20 /* txpower XXX */ 1679 , rate, 1 /* series 0 rate/tries */ 1680 , HAL_TXKEYIX_INVALID /* no encryption */ 1681 , 0 /* antenna mode */ 1682 , HAL_TXDESC_NOACK /* no ack for beacons */ 1683 , 0 /* rts/cts rate */ 1684 , 0 /* rts/cts duration */ 1685 )) { 1686 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1687 return -1; 1688 } 1689 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1690 /* XXX verify mbuf data area covers this roundup */ 1691 if (!ath_hal_filltxdesc(ah, ds 1692 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1693 , AH_TRUE /* first segment */ 1694 , AH_TRUE /* last segment */ 1695 )) { 1696 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1697 return -1; 1698 } 1699 1700 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1701 1702 return 0; 1703 } 1704 1705 static void 1706 ath_beacon_proc(void *arg, int pending) 1707 { 1708 struct ath_softc *sc = arg; 1709 struct ieee80211com *ic = &sc->sc_ic; 1710 struct ath_buf *bf = sc->sc_bcbuf; 1711 struct ath_hal *ah = sc->sc_ah; 1712 1713 DPRINTF2(("%s: pending %u\n", __func__, pending)); 1714 if (ic->ic_opmode == IEEE80211_M_STA || 1715 bf == NULL || bf->bf_m == NULL) { 1716 DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n", 1717 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1718 return; 1719 } 1720 /* TODO: update beacon to reflect PS poll state */ 1721 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1722 DPRINTF(("%s: beacon queue %u did not stop?", 1723 __func__, sc->sc_bhalq)); 1724 return; /* busy, XXX is this right? */ 1725 } 1726 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1727 1728 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1729 ath_hal_txstart(ah, sc->sc_bhalq); 1730 DPRINTF2(("%s: BCDP%u = %p (%p)\n", __func__, 1731 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1732 } 1733 1734 static void 1735 ath_beacon_free(struct ath_softc *sc) 1736 { 1737 struct ath_buf *bf = sc->sc_bcbuf; 1738 1739 if (bf->bf_m != NULL) { 1740 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1741 m_freem(bf->bf_m); 1742 bf->bf_m = NULL; 1743 bf->bf_node = NULL; 1744 } 1745 } 1746 1747 /* 1748 * Configure the beacon and sleep timers. 1749 * 1750 * When operating as an AP this resets the TSF and sets 1751 * up the hardware to notify us when we need to issue beacons. 1752 * 1753 * When operating in station mode this sets up the beacon 1754 * timers according to the timestamp of the last received 1755 * beacon and the current TSF, configures PCF and DTIM 1756 * handling, programs the sleep registers so the hardware 1757 * will wakeup in time to receive beacons, and configures 1758 * the beacon miss handling so we'll receive a BMISS 1759 * interrupt when we stop seeing beacons from the AP 1760 * we've associated with. 1761 */ 1762 static void 1763 ath_beacon_config(struct ath_softc *sc) 1764 { 1765 struct ath_hal *ah = sc->sc_ah; 1766 struct ieee80211com *ic = &sc->sc_ic; 1767 struct ieee80211_node *ni = ic->ic_bss; 1768 u_int32_t nexttbtt; 1769 1770 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1771 (LE_READ_4(ni->ni_tstamp) >> 10); 1772 DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1773 nexttbtt += ni->ni_intval; 1774 if (ic->ic_opmode == IEEE80211_M_STA) { 1775 HAL_BEACON_STATE bs; 1776 u_int32_t bmisstime; 1777 1778 /* NB: no PCF support right now */ 1779 memset(&bs, 0, sizeof(bs)); 1780 bs.bs_intval = ni->ni_intval; 1781 bs.bs_nexttbtt = nexttbtt; 1782 bs.bs_dtimperiod = bs.bs_intval; 1783 bs.bs_nextdtim = nexttbtt; 1784 /* 1785 * Calculate the number of consecutive beacons to miss 1786 * before taking a BMISS interrupt. The configuration 1787 * is specified in ms, so we need to convert that to 1788 * TU's and then calculate based on the beacon interval. 1789 * Note that we clamp the result to at most 10 beacons. 1790 */ 1791 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1792 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1793 if (bs.bs_bmissthreshold > 10) 1794 bs.bs_bmissthreshold = 10; 1795 else if (bs.bs_bmissthreshold <= 0) 1796 bs.bs_bmissthreshold = 1; 1797 1798 /* 1799 * Calculate sleep duration. The configuration is 1800 * given in ms. We insure a multiple of the beacon 1801 * period is used. Also, if the sleep duration is 1802 * greater than the DTIM period then it makes senses 1803 * to make it a multiple of that. 1804 * 1805 * XXX fixed at 100ms 1806 */ 1807 bs.bs_sleepduration = 1808 roundup((100 * 1000) / 1024, bs.bs_intval); 1809 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1810 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1811 1812 DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1813 , __func__ 1814 , bs.bs_intval 1815 , bs.bs_nexttbtt 1816 , bs.bs_dtimperiod 1817 , bs.bs_nextdtim 1818 , bs.bs_bmissthreshold 1819 , bs.bs_sleepduration 1820 )); 1821 ath_hal_intrset(ah, 0); 1822 /* 1823 * Reset our tsf so the hardware will update the 1824 * tsf register to reflect timestamps found in 1825 * received beacons. 1826 */ 1827 ath_hal_resettsf(ah); 1828 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1829 sc->sc_imask |= HAL_INT_BMISS; 1830 ath_hal_intrset(ah, sc->sc_imask); 1831 } else { 1832 DPRINTF(("%s: intval %u nexttbtt %u\n", 1833 __func__, ni->ni_intval, nexttbtt)); 1834 ath_hal_intrset(ah, 0); 1835 ath_hal_beaconinit(ah, nexttbtt, ni->ni_intval); 1836 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1837 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1838 ath_hal_intrset(ah, sc->sc_imask); 1839 } 1840 } 1841 1842 #ifdef __FreeBSD__ 1843 static void 1844 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1845 { 1846 bus_addr_t *paddr = (bus_addr_t*) arg; 1847 *paddr = segs->ds_addr; 1848 } 1849 #endif 1850 1851 #ifdef __FreeBSD__ 1852 static int 1853 ath_desc_alloc(struct ath_softc *sc) 1854 { 1855 int i, bsize, error; 1856 struct ath_desc *ds; 1857 struct ath_buf *bf; 1858 1859 /* allocate descriptors */ 1860 sc->sc_desc_len = sizeof(struct ath_desc) * 1861 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1862 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1863 if (error != 0) 1864 return error; 1865 1866 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1867 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1868 1869 if (error != 0) 1870 goto fail0; 1871 1872 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1873 sc->sc_desc, sc->sc_desc_len, 1874 ath_load_cb, &sc->sc_desc_paddr, 1875 BUS_DMA_NOWAIT); 1876 if (error != 0) 1877 goto fail1; 1878 1879 ds = sc->sc_desc; 1880 DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n", 1881 ds, sc->sc_desc_len, 1882 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1883 1884 /* allocate buffers */ 1885 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1886 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1887 if (bf == NULL) { 1888 printf("%s: unable to allocate Tx/Rx buffers\n", 1889 sc->sc_dev.dv_xname); 1890 error = -1; 1891 goto fail2; 1892 } 1893 sc->sc_bufptr = bf; 1894 1895 TAILQ_INIT(&sc->sc_rxbuf); 1896 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1897 bf->bf_desc = ds; 1898 bf->bf_daddr = sc->sc_desc_paddr + 1899 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1900 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1901 &bf->bf_dmamap); 1902 if (error != 0) 1903 break; 1904 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1905 } 1906 1907 TAILQ_INIT(&sc->sc_txbuf); 1908 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1909 bf->bf_desc = ds; 1910 bf->bf_daddr = sc->sc_desc_paddr + 1911 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1912 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1913 &bf->bf_dmamap); 1914 if (error != 0) 1915 break; 1916 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1917 } 1918 TAILQ_INIT(&sc->sc_txq); 1919 1920 /* beacon buffer */ 1921 bf->bf_desc = ds; 1922 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1923 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1924 if (error != 0) 1925 return error; 1926 sc->sc_bcbuf = bf; 1927 return 0; 1928 1929 fail2: 1930 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1931 fail1: 1932 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1933 fail0: 1934 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1935 sc->sc_ddmamap = NULL; 1936 return error; 1937 } 1938 #else 1939 static int 1940 ath_desc_alloc(struct ath_softc *sc) 1941 { 1942 int i, bsize, error = -1; 1943 struct ath_desc *ds; 1944 struct ath_buf *bf; 1945 1946 /* allocate descriptors */ 1947 sc->sc_desc_len = sizeof(struct ath_desc) * 1948 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1949 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1950 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1951 printf("%s: unable to allocate control data, error = %d\n", 1952 sc->sc_dev.dv_xname, error); 1953 goto fail0; 1954 } 1955 1956 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1957 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1958 printf("%s: unable to map control data, error = %d\n", 1959 sc->sc_dev.dv_xname, error); 1960 goto fail1; 1961 } 1962 1963 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1964 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 1965 printf("%s: unable to create control data DMA map, " 1966 "error = %d\n", sc->sc_dev.dv_xname, error); 1967 goto fail2; 1968 } 1969 1970 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 1971 sc->sc_desc_len, NULL, 0)) != 0) { 1972 printf("%s: unable to load control data DMA map, error = %d\n", 1973 sc->sc_dev.dv_xname, error); 1974 goto fail3; 1975 } 1976 1977 ds = sc->sc_desc; 1978 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 1979 1980 DPRINTF(("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 1981 ds, (u_long)sc->sc_desc_len, 1982 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1983 1984 /* allocate buffers */ 1985 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1986 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1987 if (bf == NULL) { 1988 printf("%s: unable to allocate Tx/Rx buffers\n", 1989 sc->sc_dev.dv_xname); 1990 error = ENOMEM; 1991 goto fail3; 1992 } 1993 sc->sc_bufptr = bf; 1994 1995 TAILQ_INIT(&sc->sc_rxbuf); 1996 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1997 bf->bf_desc = ds; 1998 bf->bf_daddr = sc->sc_desc_paddr + 1999 ((caddr_t)ds - (caddr_t)sc->sc_desc); 2000 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 2001 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 2002 printf("%s: unable to create Rx dmamap, error = %d\n", 2003 sc->sc_dev.dv_xname, error); 2004 goto fail4; 2005 } 2006 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2007 } 2008 2009 TAILQ_INIT(&sc->sc_txbuf); 2010 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 2011 bf->bf_desc = ds; 2012 bf->bf_daddr = sc->sc_desc_paddr + 2013 ((caddr_t)ds - (caddr_t)sc->sc_desc); 2014 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 2015 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 2016 printf("%s: unable to create Tx dmamap, error = %d\n", 2017 sc->sc_dev.dv_xname, error); 2018 goto fail5; 2019 } 2020 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2021 } 2022 TAILQ_INIT(&sc->sc_txq); 2023 2024 /* beacon buffer */ 2025 bf->bf_desc = ds; 2026 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 2027 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 2028 &bf->bf_dmamap)) != 0) { 2029 printf("%s: unable to create beacon dmamap, error = %d\n", 2030 sc->sc_dev.dv_xname, error); 2031 goto fail5; 2032 } 2033 sc->sc_bcbuf = bf; 2034 return 0; 2035 2036 fail5: 2037 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 2038 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2039 continue; 2040 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2041 } 2042 fail4: 2043 for (i = 0; i < ATH_RXBUF; i++) { 2044 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2045 continue; 2046 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2047 } 2048 fail3: 2049 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2050 fail2: 2051 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2052 sc->sc_ddmamap = NULL; 2053 fail1: 2054 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 2055 fail0: 2056 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2057 return error; 2058 } 2059 #endif 2060 2061 static void 2062 ath_desc_free(struct ath_softc *sc) 2063 { 2064 struct ath_buf *bf; 2065 2066 #ifdef __FreeBSD__ 2067 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2068 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 2069 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2070 #else 2071 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2072 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2073 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2074 #endif 2075 2076 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2077 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2078 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2079 m_freem(bf->bf_m); 2080 } 2081 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 2082 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2083 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2084 if (bf->bf_m) { 2085 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2086 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2087 m_freem(bf->bf_m); 2088 bf->bf_m = NULL; 2089 } 2090 } 2091 if (sc->sc_bcbuf != NULL) { 2092 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2093 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2094 sc->sc_bcbuf = NULL; 2095 } 2096 2097 TAILQ_INIT(&sc->sc_rxbuf); 2098 TAILQ_INIT(&sc->sc_txbuf); 2099 TAILQ_INIT(&sc->sc_txq); 2100 free(sc->sc_bufptr, M_DEVBUF); 2101 sc->sc_bufptr = NULL; 2102 } 2103 2104 static struct ieee80211_node * 2105 ath_node_alloc(struct ieee80211com *ic) 2106 { 2107 struct ath_node *an = 2108 malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO); 2109 if (an) { 2110 int i; 2111 for (i = 0; i < ATH_RHIST_SIZE; i++) 2112 an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME; 2113 an->an_rx_hist_next = ATH_RHIST_SIZE-1; 2114 return &an->an_node; 2115 } else 2116 return NULL; 2117 } 2118 2119 static void 2120 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 2121 { 2122 struct ath_softc *sc = ic->ic_if.if_softc; 2123 struct ath_buf *bf; 2124 2125 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2126 if (bf->bf_node == ni) 2127 bf->bf_node = NULL; 2128 } 2129 free(ni, M_DEVBUF); 2130 } 2131 2132 static void 2133 ath_node_copy(struct ieee80211com *ic, 2134 struct ieee80211_node *dst, const struct ieee80211_node *src) 2135 { 2136 *(struct ath_node *)dst = *(const struct ath_node *)src; 2137 } 2138 2139 static u_int8_t 2140 ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni) 2141 { 2142 struct ath_node *an = ATH_NODE(ni); 2143 int i, now, nsamples, rssi; 2144 2145 /* 2146 * Calculate the average over the last second of sampled data. 2147 */ 2148 now = ATH_TICKS(); 2149 nsamples = 0; 2150 rssi = 0; 2151 i = an->an_rx_hist_next; 2152 do { 2153 struct ath_recv_hist *rh = &an->an_rx_hist[i]; 2154 if (rh->arh_ticks == ATH_RHIST_NOTIME) 2155 goto done; 2156 if (now - rh->arh_ticks > hz) 2157 goto done; 2158 rssi += rh->arh_rssi; 2159 nsamples++; 2160 if (i == 0) 2161 i = ATH_RHIST_SIZE-1; 2162 else 2163 i--; 2164 } while (i != an->an_rx_hist_next); 2165 done: 2166 /* 2167 * Return either the average or the last known 2168 * value if there is no recent data. 2169 */ 2170 return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi); 2171 } 2172 2173 static int 2174 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 2175 { 2176 struct ath_hal *ah = sc->sc_ah; 2177 int error; 2178 struct mbuf *m; 2179 struct ath_desc *ds; 2180 2181 m = bf->bf_m; 2182 if (m == NULL) { 2183 /* 2184 * NB: by assigning a page to the rx dma buffer we 2185 * implicitly satisfy the Atheros requirement that 2186 * this buffer be cache-line-aligned and sized to be 2187 * multiple of the cache line size. Not doing this 2188 * causes weird stuff to happen (for the 5210 at least). 2189 */ 2190 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 2191 if (m == NULL) { 2192 DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n")); 2193 sc->sc_stats.ast_rx_nombuf++; 2194 return ENOMEM; 2195 } 2196 bf->bf_m = m; 2197 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 2198 2199 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 2200 BUS_DMA_NOWAIT); 2201 if (error != 0) { 2202 DPRINTF(("ath_rxbuf_init: ath_buf_dmamap_load_mbuf failed;" 2203 " error %d\n", error)); 2204 sc->sc_stats.ast_rx_busdma++; 2205 return error; 2206 } 2207 KASSERT(bf->bf_nseg == 1, 2208 ("ath_rxbuf_init: multi-segment packet; nseg %u", 2209 bf->bf_nseg)); 2210 } 2211 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 2212 2213 /* 2214 * Setup descriptors. For receive we always terminate 2215 * the descriptor list with a self-linked entry so we'll 2216 * not get overrun under high load (as can happen with a 2217 * 5212 when ANI processing enables PHY errors). 2218 * 2219 * To insure the last descriptor is self-linked we create 2220 * each descriptor as self-linked and add it to the end. As 2221 * each additional descriptor is added the previous self-linked 2222 * entry is ``fixed'' naturally. This should be safe even 2223 * if DMA is happening. When processing RX interrupts we 2224 * never remove/process the last, self-linked, entry on the 2225 * descriptor list. This insures the hardware always has 2226 * someplace to write a new frame. 2227 */ 2228 ds = bf->bf_desc; 2229 ds->ds_link = bf->bf_daddr; /* link to self */ 2230 ds->ds_data = bf->bf_segs[0].ds_addr; 2231 ath_hal_setuprxdesc(ah, ds 2232 , m->m_len /* buffer size */ 2233 , 0 2234 ); 2235 2236 if (sc->sc_rxlink != NULL) 2237 *sc->sc_rxlink = bf->bf_daddr; 2238 sc->sc_rxlink = &ds->ds_link; 2239 return 0; 2240 } 2241 2242 static void 2243 ath_rx_proc(void *arg, int npending) 2244 { 2245 #define PA2DESC(_sc, _pa) \ 2246 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2247 ((_pa) - (_sc)->sc_desc_paddr))) 2248 struct ath_softc *sc = arg; 2249 struct ath_buf *bf; 2250 struct ieee80211com *ic = &sc->sc_ic; 2251 struct ifnet *ifp = &ic->ic_if; 2252 struct ath_hal *ah = sc->sc_ah; 2253 struct ath_desc *ds; 2254 struct mbuf *m; 2255 struct ieee80211_frame *wh, whbuf; 2256 struct ieee80211_node *ni; 2257 struct ath_node *an; 2258 struct ath_recv_hist *rh; 2259 int len; 2260 u_int phyerr; 2261 HAL_STATUS status; 2262 2263 DPRINTF2(("ath_rx_proc: pending %u\n", npending)); 2264 do { 2265 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2266 if (bf == NULL) { /* NB: shouldn't happen */ 2267 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 2268 break; 2269 } 2270 ds = bf->bf_desc; 2271 if (ds->ds_link == bf->bf_daddr) { 2272 /* NB: never process the self-linked entry at the end */ 2273 break; 2274 } 2275 m = bf->bf_m; 2276 if (m == NULL) { /* NB: shouldn't happen */ 2277 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 2278 continue; 2279 } 2280 /* XXX sync descriptor memory */ 2281 /* 2282 * Must provide the virtual address of the current 2283 * descriptor, the physical address, and the virtual 2284 * address of the next descriptor in the h/w chain. 2285 * This allows the HAL to look ahead to see if the 2286 * hardware is done with a descriptor by checking the 2287 * done bit in the following descriptor and the address 2288 * of the current descriptor the DMA engine is working 2289 * on. All this is necessary because of our use of 2290 * a self-linked list to avoid rx overruns. 2291 */ 2292 status = ath_hal_rxprocdesc(ah, ds, 2293 bf->bf_daddr, PA2DESC(sc, ds->ds_link)); 2294 #ifdef AR_DEBUG 2295 if (ath_debug > 1) 2296 ath_printrxbuf(bf, status == HAL_OK); 2297 #endif 2298 if (status == HAL_EINPROGRESS) 2299 break; 2300 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 2301 if (ds->ds_rxstat.rs_status != 0) { 2302 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 2303 sc->sc_stats.ast_rx_crcerr++; 2304 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 2305 sc->sc_stats.ast_rx_fifoerr++; 2306 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 2307 sc->sc_stats.ast_rx_badcrypt++; 2308 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 2309 sc->sc_stats.ast_rx_phyerr++; 2310 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 2311 sc->sc_stats.ast_rx_phy[phyerr]++; 2312 } else { 2313 /* 2314 * NB: don't count PHY errors as input errors; 2315 * we enable them on the 5212 to collect info 2316 * about environmental noise and, in that 2317 * setting, they don't really reflect tx/rx 2318 * errors. 2319 */ 2320 ifp->if_ierrors++; 2321 } 2322 goto rx_next; 2323 } 2324 2325 len = ds->ds_rxstat.rs_datalen; 2326 if (len < IEEE80211_MIN_LEN) { 2327 DPRINTF(("ath_rx_proc: short packet %d\n", len)); 2328 sc->sc_stats.ast_rx_tooshort++; 2329 goto rx_next; 2330 } 2331 2332 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 2333 2334 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2335 bf->bf_m = NULL; 2336 m->m_pkthdr.rcvif = ifp; 2337 m->m_pkthdr.len = m->m_len = len; 2338 2339 #if NBPFILTER > 0 2340 if (sc->sc_drvbpf) { 2341 #ifdef __FreeBSD__ 2342 struct mbuf *mb; 2343 2344 /* XXX pre-allocate space when setting up recv's */ 2345 MGETHDR(mb, M_DONTWAIT, m->m_type); 2346 if (mb != NULL) { 2347 sc->sc_rx_th.wr_rate = 2348 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2349 sc->sc_rx_th.wr_antsignal = 2350 ds->ds_rxstat.rs_rssi; 2351 sc->sc_rx_th.wr_antenna = 2352 ds->ds_rxstat.rs_antenna; 2353 /* XXX TSF */ 2354 2355 (void) m_dup_pkthdr(mb, m, M_DONTWAIT); 2356 mb->m_next = m; 2357 mb->m_data = (caddr_t)&sc->sc_rx_th; 2358 mb->m_len = sizeof(sc->sc_rx_th); 2359 mb->m_pkthdr.len += mb->m_len; 2360 bpf_mtap(sc->sc_drvbpf, mb); 2361 m_free(mb); 2362 } 2363 #else 2364 /* XXX pre-allocate space when setting up recv's */ 2365 struct mbuf mb; 2366 2367 sc->sc_rx_th.wr_rate = 2368 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2369 sc->sc_rx_th.wr_antsignal = 2370 ds->ds_rxstat.rs_rssi; 2371 sc->sc_rx_th.wr_antenna = 2372 ds->ds_rxstat.rs_antenna; 2373 /* XXX TSF */ 2374 2375 M_COPY_PKTHDR(&mb, m); 2376 mb.m_next = m; 2377 mb.m_data = (caddr_t)&sc->sc_rx_th; 2378 mb.m_len = sizeof(sc->sc_rx_th); 2379 mb.m_pkthdr.len += mb.m_len; 2380 bpf_mtap(sc->sc_drvbpf, &mb); 2381 #endif 2382 } 2383 #endif 2384 2385 m_adj(m, -IEEE80211_CRC_LEN); 2386 wh = mtod(m, struct ieee80211_frame *); 2387 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2388 /* 2389 * WEP is decrypted by hardware. Clear WEP bit 2390 * and trim WEP header for ieee80211_input(). 2391 */ 2392 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2393 memcpy(&whbuf, wh, sizeof(whbuf)); 2394 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2395 wh = mtod(m, struct ieee80211_frame *); 2396 memcpy(wh, &whbuf, sizeof(whbuf)); 2397 /* 2398 * Also trim WEP ICV from the tail. 2399 */ 2400 m_adj(m, -IEEE80211_WEP_CRCLEN); 2401 /* 2402 * The header has probably moved. 2403 */ 2404 wh = mtod(m, struct ieee80211_frame *); 2405 } 2406 2407 /* 2408 * Locate the node for sender, track state, and 2409 * then pass this node (referenced) up to the 802.11 2410 * layer for its use. We are required to pass 2411 * something so we fall back to ic_bss when this frame 2412 * is from an unknown sender. 2413 */ 2414 ni = ieee80211_find_rxnode(ic, wh); 2415 2416 /* 2417 * Record driver-specific state. 2418 */ 2419 an = ATH_NODE(ni); 2420 if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE) 2421 an->an_rx_hist_next = 0; 2422 rh = &an->an_rx_hist[an->an_rx_hist_next]; 2423 rh->arh_ticks = ATH_TICKS(); 2424 rh->arh_rssi = ds->ds_rxstat.rs_rssi; 2425 rh->arh_antenna = ds->ds_rxstat.rs_antenna; 2426 2427 /* 2428 * Send frame up for processing. 2429 */ 2430 ieee80211_input(ifp, m, ni, 2431 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2432 2433 /* 2434 * The frame may have caused the node to be marked for 2435 * reclamation (e.g. in response to a DEAUTH message) 2436 * so use free_node here instead of unref_node. 2437 */ 2438 if (ni == ic->ic_bss) 2439 ieee80211_unref_node(&ni); 2440 else 2441 ieee80211_free_node(ic, ni); 2442 rx_next: 2443 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2444 } while (ath_rxbuf_init(sc, bf) == 0); 2445 2446 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2447 ath_hal_rxena(ah); /* in case of RXEOL */ 2448 2449 #ifdef __NetBSD__ 2450 if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd)) 2451 ath_start(ifp); 2452 #endif /* __NetBSD__ */ 2453 #undef PA2DESC 2454 } 2455 2456 /* 2457 * XXX Size of an ACK control frame in bytes. 2458 */ 2459 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2460 2461 static int 2462 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2463 struct mbuf *m0) 2464 { 2465 struct ieee80211com *ic = &sc->sc_ic; 2466 struct ath_hal *ah = sc->sc_ah; 2467 struct ifnet *ifp = &sc->sc_ic.ic_if; 2468 int i, error, iswep, hdrlen, pktlen; 2469 u_int8_t rix, cix, txrate, ctsrate; 2470 struct ath_desc *ds; 2471 struct mbuf *m; 2472 struct ieee80211_frame *wh; 2473 u_int32_t iv; 2474 u_int8_t *ivp; 2475 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2476 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2477 u_int subtype, flags, ctsduration, antenna; 2478 HAL_PKT_TYPE atype; 2479 const HAL_RATE_TABLE *rt; 2480 HAL_BOOL shortPreamble; 2481 struct ath_node *an; 2482 ath_txq_critsect_decl(s); 2483 2484 wh = mtod(m0, struct ieee80211_frame *); 2485 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2486 hdrlen = sizeof(struct ieee80211_frame); 2487 pktlen = m0->m_pkthdr.len; 2488 2489 if (iswep) { 2490 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2491 m_adj(m0, hdrlen); 2492 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2493 if (m0 == NULL) { 2494 sc->sc_stats.ast_tx_nombuf++; 2495 return ENOMEM; 2496 } 2497 ivp = hdrbuf + hdrlen; 2498 wh = mtod(m0, struct ieee80211_frame *); 2499 /* 2500 * XXX 2501 * IV must not duplicate during the lifetime of the key. 2502 * But no mechanism to renew keys is defined in IEEE 802.11 2503 * WEP. And IV may be duplicated between other stations 2504 * because of the session key itself is shared. 2505 * So we use pseudo random IV for now, though it is not the 2506 * right way. 2507 */ 2508 iv = ic->ic_iv; 2509 /* 2510 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir: 2511 * (B, 255, N) with 3 <= B < 8 2512 */ 2513 if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00) 2514 iv += 0x000100; 2515 ic->ic_iv = iv + 1; 2516 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 2517 ivp[i] = iv; 2518 iv >>= 8; 2519 } 2520 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 2521 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2522 /* 2523 * The ICV length must be included into hdrlen and pktlen. 2524 */ 2525 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2526 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2527 } 2528 pktlen += IEEE80211_CRC_LEN; 2529 2530 /* 2531 * Load the DMA map so any coalescing is done. This 2532 * also calculates the number of descriptors we need. 2533 */ 2534 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2535 /* 2536 * Discard null packets and check for packets that 2537 * require too many TX descriptors. We try to convert 2538 * the latter to a cluster. 2539 */ 2540 if (error == EFBIG) { /* too many desc's, linearize */ 2541 sc->sc_stats.ast_tx_linear++; 2542 MGETHDR(m, M_DONTWAIT, MT_DATA); 2543 if (m == NULL) { 2544 sc->sc_stats.ast_tx_nombuf++; 2545 m_freem(m0); 2546 return ENOMEM; 2547 } 2548 #ifdef __FreeBSD__ 2549 M_MOVE_PKTHDR(m, m0); 2550 #else 2551 M_COPY_PKTHDR(m, m0); 2552 #endif 2553 MCLGET(m, M_DONTWAIT); 2554 if ((m->m_flags & M_EXT) == 0) { 2555 sc->sc_stats.ast_tx_nomcl++; 2556 m_freem(m0); 2557 m_free(m); 2558 return ENOMEM; 2559 } 2560 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2561 m_freem(m0); 2562 m->m_len = m->m_pkthdr.len; 2563 m0 = m; 2564 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2565 BUS_DMA_NOWAIT); 2566 if (error != 0) { 2567 sc->sc_stats.ast_tx_busdma++; 2568 m_freem(m0); 2569 return error; 2570 } 2571 KASSERT(bf->bf_nseg == 1, 2572 ("ath_tx_start: packet not one segment; nseg %u", 2573 bf->bf_nseg)); 2574 } else if (error != 0) { 2575 sc->sc_stats.ast_tx_busdma++; 2576 m_freem(m0); 2577 return error; 2578 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2579 sc->sc_stats.ast_tx_nodata++; 2580 m_freem(m0); 2581 return EIO; 2582 } 2583 DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen)); 2584 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2585 bf->bf_m = m0; 2586 bf->bf_node = ni; /* NB: held reference */ 2587 2588 /* setup descriptors */ 2589 ds = bf->bf_desc; 2590 rt = sc->sc_currates; 2591 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2592 2593 /* 2594 * Calculate Atheros packet type from IEEE80211 packet header 2595 * and setup for rate calculations. 2596 */ 2597 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2598 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2599 case IEEE80211_FC0_TYPE_MGT: 2600 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2601 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2602 atype = HAL_PKT_TYPE_BEACON; 2603 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2604 atype = HAL_PKT_TYPE_PROBE_RESP; 2605 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2606 atype = HAL_PKT_TYPE_ATIM; 2607 rix = 0; /* XXX lowest rate */ 2608 break; 2609 case IEEE80211_FC0_TYPE_CTL: 2610 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2611 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2612 atype = HAL_PKT_TYPE_PSPOLL; 2613 rix = 0; /* XXX lowest rate */ 2614 break; 2615 default: 2616 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2617 IEEE80211_RATE_VAL]; 2618 if (rix == 0xff) { 2619 if_printf(ifp, "bogus xmit rate 0x%x\n", 2620 ni->ni_rates.rs_rates[ni->ni_txrate]); 2621 sc->sc_stats.ast_tx_badrate++; 2622 m_freem(m0); 2623 return EIO; 2624 } 2625 break; 2626 } 2627 /* 2628 * NB: the 802.11 layer marks whether or not we should 2629 * use short preamble based on the current mode and 2630 * negotiated parameters. 2631 */ 2632 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 2633 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 2634 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2635 shortPreamble = AH_TRUE; 2636 sc->sc_stats.ast_tx_shortpre++; 2637 } else { 2638 txrate = rt->info[rix].rateCode; 2639 shortPreamble = AH_FALSE; 2640 } 2641 2642 /* 2643 * Calculate miscellaneous flags. 2644 */ 2645 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2646 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2647 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2648 sc->sc_stats.ast_tx_noack++; 2649 } else if (pktlen > ic->ic_rtsthreshold) { 2650 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2651 sc->sc_stats.ast_tx_rts++; 2652 } 2653 2654 /* 2655 * Calculate duration. This logically belongs in the 802.11 2656 * layer but it lacks sufficient information to calculate it. 2657 */ 2658 if ((flags & HAL_TXDESC_NOACK) == 0 && 2659 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 2660 u_int16_t dur; 2661 /* 2662 * XXX not right with fragmentation. 2663 */ 2664 dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE, 2665 rix, shortPreamble); 2666 *((u_int16_t*) wh->i_dur) = htole16(dur); 2667 } 2668 2669 /* 2670 * Calculate RTS/CTS rate and duration if needed. 2671 */ 2672 ctsduration = 0; 2673 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2674 /* 2675 * CTS transmit rate is derived from the transmit rate 2676 * by looking in the h/w rate table. We must also factor 2677 * in whether or not a short preamble is to be used. 2678 */ 2679 cix = rt->info[rix].controlRate; 2680 ctsrate = rt->info[cix].rateCode; 2681 if (shortPreamble) 2682 ctsrate |= rt->info[cix].shortPreamble; 2683 /* 2684 * Compute the transmit duration based on the size 2685 * of an ACK frame. We call into the HAL to do the 2686 * computation since it depends on the characteristics 2687 * of the actual PHY being used. 2688 */ 2689 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2690 ctsduration += ath_hal_computetxtime(ah, 2691 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2692 } 2693 /* SIFS + data */ 2694 ctsduration += ath_hal_computetxtime(ah, 2695 rt, pktlen, rix, shortPreamble); 2696 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2697 ctsduration += ath_hal_computetxtime(ah, 2698 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2699 } 2700 } else 2701 ctsrate = 0; 2702 2703 /* 2704 * For now use the antenna on which the last good 2705 * frame was received on. We assume this field is 2706 * initialized to 0 which gives us ``auto'' or the 2707 * ``default'' antenna. 2708 */ 2709 an = (struct ath_node *) ni; 2710 if (an->an_tx_antenna) 2711 antenna = an->an_tx_antenna; 2712 else 2713 antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna; 2714 2715 /* 2716 * Formulate first tx descriptor with tx controls. 2717 */ 2718 /* XXX check return value? */ 2719 ath_hal_setuptxdesc(ah, ds 2720 , pktlen /* packet length */ 2721 , hdrlen /* header length */ 2722 , atype /* Atheros packet type */ 2723 , 60 /* txpower XXX */ 2724 , txrate, 1+10 /* series 0 rate/tries */ 2725 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2726 , antenna /* antenna mode */ 2727 , flags /* flags */ 2728 , ctsrate /* rts/cts rate */ 2729 , ctsduration /* rts/cts duration */ 2730 ); 2731 #ifdef notyet 2732 ath_hal_setupxtxdesc(ah, ds 2733 , AH_FALSE /* short preamble */ 2734 , 0, 0 /* series 1 rate/tries */ 2735 , 0, 0 /* series 2 rate/tries */ 2736 , 0, 0 /* series 3 rate/tries */ 2737 ); 2738 #endif 2739 /* 2740 * Fillin the remainder of the descriptor info. 2741 */ 2742 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2743 ds->ds_data = bf->bf_segs[i].ds_addr; 2744 if (i == bf->bf_nseg - 1) 2745 ds->ds_link = 0; 2746 else 2747 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2748 ath_hal_filltxdesc(ah, ds 2749 , bf->bf_segs[i].ds_len /* segment length */ 2750 , i == 0 /* first segment */ 2751 , i == bf->bf_nseg - 1 /* last segment */ 2752 ); 2753 DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n", 2754 i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1, 2755 ds->ds_hw[0], ds->ds_hw[1])); 2756 } 2757 2758 /* 2759 * Insert the frame on the outbound list and 2760 * pass it on to the hardware. 2761 */ 2762 ath_txq_critsect_begin(sc, s); 2763 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2764 if (sc->sc_txlink == NULL) { 2765 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2766 DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n", 2767 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2768 } else { 2769 *sc->sc_txlink = bf->bf_daddr; 2770 DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n", 2771 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2772 } 2773 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2774 ath_txq_critsect_end(sc, s); 2775 2776 ath_hal_txstart(ah, sc->sc_txhalq); 2777 return 0; 2778 } 2779 2780 static void 2781 ath_tx_proc(void *arg, int npending) 2782 { 2783 struct ath_softc *sc = arg; 2784 struct ath_hal *ah = sc->sc_ah; 2785 struct ath_buf *bf; 2786 struct ieee80211com *ic = &sc->sc_ic; 2787 struct ifnet *ifp = &ic->ic_if; 2788 struct ath_desc *ds; 2789 struct ieee80211_node *ni; 2790 struct ath_node *an; 2791 int sr, lr; 2792 HAL_STATUS status; 2793 ath_txq_critsect_decl(s); 2794 ath_txbuf_critsect_decl(s2); 2795 2796 DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n", 2797 npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2798 sc->sc_txlink)); 2799 for (;;) { 2800 ath_txq_critsect_begin(sc, s); 2801 bf = TAILQ_FIRST(&sc->sc_txq); 2802 if (bf == NULL) { 2803 sc->sc_txlink = NULL; 2804 ath_txq_critsect_end(sc, s); 2805 break; 2806 } 2807 /* only the last descriptor is needed */ 2808 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2809 status = ath_hal_txprocdesc(ah, ds); 2810 #ifdef AR_DEBUG 2811 if (ath_debug > 1) 2812 ath_printtxbuf(bf, status == HAL_OK); 2813 #endif 2814 if (status == HAL_EINPROGRESS) { 2815 ath_txq_critsect_end(sc, s); 2816 break; 2817 } 2818 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2819 ath_txq_critsect_end(sc, s); 2820 2821 ni = bf->bf_node; 2822 if (ni != NULL) { 2823 an = (struct ath_node *) ni; 2824 if (ds->ds_txstat.ts_status == 0) { 2825 an->an_tx_ok++; 2826 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2827 } else { 2828 an->an_tx_err++; 2829 ifp->if_oerrors++; 2830 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2831 sc->sc_stats.ast_tx_xretries++; 2832 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2833 sc->sc_stats.ast_tx_fifoerr++; 2834 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2835 sc->sc_stats.ast_tx_filtered++; 2836 an->an_tx_antenna = 0; /* invalidate */ 2837 } 2838 sr = ds->ds_txstat.ts_shortretry; 2839 lr = ds->ds_txstat.ts_longretry; 2840 sc->sc_stats.ast_tx_shortretry += sr; 2841 sc->sc_stats.ast_tx_longretry += lr; 2842 if (sr + lr) 2843 an->an_tx_retr++; 2844 /* 2845 * Reclaim reference to node. 2846 * 2847 * NB: the node may be reclaimed here if, for example 2848 * this is a DEAUTH message that was sent and the 2849 * node was timed out due to inactivity. 2850 */ 2851 if (ni != ic->ic_bss) 2852 ieee80211_free_node(ic, ni); 2853 } 2854 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2855 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2856 m_freem(bf->bf_m); 2857 bf->bf_m = NULL; 2858 bf->bf_node = NULL; 2859 2860 ath_txbuf_critsect_begin(sc, s2); 2861 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2862 ath_txbuf_critsect_end(sc, s2); 2863 } 2864 ifp->if_flags &= ~IFF_OACTIVE; 2865 sc->sc_tx_timer = 0; 2866 2867 ath_start(ifp); 2868 } 2869 2870 /* 2871 * Drain the transmit queue and reclaim resources. 2872 */ 2873 static void 2874 ath_draintxq(struct ath_softc *sc) 2875 { 2876 struct ath_hal *ah = sc->sc_ah; 2877 struct ifnet *ifp = &sc->sc_ic.ic_if; 2878 struct ath_buf *bf; 2879 ath_txq_critsect_decl(s); 2880 ath_txbuf_critsect_decl(s2); 2881 2882 /* XXX return value */ 2883 if (!sc->sc_invalid) { 2884 /* don't touch the hardware if marked invalid */ 2885 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2886 DPRINTF(("ath_draintxq: tx queue %p, link %p\n", 2887 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2888 sc->sc_txlink)); 2889 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2890 DPRINTF(("ath_draintxq: beacon queue %p\n", 2891 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2892 } 2893 for (;;) { 2894 ath_txq_critsect_begin(sc, s); 2895 bf = TAILQ_FIRST(&sc->sc_txq); 2896 if (bf == NULL) { 2897 sc->sc_txlink = NULL; 2898 ath_txq_critsect_end(sc, s); 2899 break; 2900 } 2901 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2902 ath_txq_critsect_end(sc, s); 2903 #ifdef AR_DEBUG 2904 if (ath_debug) 2905 ath_printtxbuf(bf, 2906 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2907 #endif /* AR_DEBUG */ 2908 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2909 m_freem(bf->bf_m); 2910 bf->bf_m = NULL; 2911 bf->bf_node = NULL; 2912 ath_txbuf_critsect_begin(sc, s2); 2913 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2914 ath_txbuf_critsect_end(sc, s2); 2915 } 2916 ifp->if_flags &= ~IFF_OACTIVE; 2917 sc->sc_tx_timer = 0; 2918 } 2919 2920 /* 2921 * Disable the receive h/w in preparation for a reset. 2922 */ 2923 static void 2924 ath_stoprecv(struct ath_softc *sc) 2925 { 2926 #define PA2DESC(_sc, _pa) \ 2927 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2928 ((_pa) - (_sc)->sc_desc_paddr))) 2929 struct ath_hal *ah = sc->sc_ah; 2930 2931 ath_hal_stoppcurecv(ah); /* disable PCU */ 2932 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2933 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2934 DELAY(3000); /* long enough for 1 frame */ 2935 #ifdef AR_DEBUG 2936 if (ath_debug) { 2937 struct ath_buf *bf; 2938 2939 DPRINTF(("ath_stoprecv: rx queue %p, link %p\n", 2940 (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink)); 2941 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2942 struct ath_desc *ds = bf->bf_desc; 2943 if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr, 2944 PA2DESC(sc, ds->ds_link)) == HAL_OK) 2945 ath_printrxbuf(bf, 1); 2946 } 2947 } 2948 #endif 2949 sc->sc_rxlink = NULL; /* just in case */ 2950 #undef PA2DESC 2951 } 2952 2953 /* 2954 * Enable the receive h/w following a reset. 2955 */ 2956 static int 2957 ath_startrecv(struct ath_softc *sc) 2958 { 2959 struct ath_hal *ah = sc->sc_ah; 2960 struct ath_buf *bf; 2961 2962 sc->sc_rxlink = NULL; 2963 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2964 int error = ath_rxbuf_init(sc, bf); 2965 if (error != 0) { 2966 DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n", 2967 error)); 2968 return error; 2969 } 2970 } 2971 2972 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2973 ath_hal_putrxbuf(ah, bf->bf_daddr); 2974 ath_hal_rxena(ah); /* enable recv descriptors */ 2975 ath_mode_init(sc); /* set filters, etc. */ 2976 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2977 return 0; 2978 } 2979 2980 /* 2981 * Set/change channels. If the channel is really being changed, 2982 * it's done by resetting the chip. To accomplish this we must 2983 * first cleanup any pending DMA, then restart stuff after a la 2984 * ath_init. 2985 */ 2986 static int 2987 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 2988 { 2989 struct ath_hal *ah = sc->sc_ah; 2990 struct ieee80211com *ic = &sc->sc_ic; 2991 2992 DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n", 2993 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 2994 ic->ic_ibss_chan->ic_freq, 2995 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 2996 if (chan != ic->ic_ibss_chan) { 2997 HAL_STATUS status; 2998 HAL_CHANNEL hchan; 2999 enum ieee80211_phymode mode; 3000 3001 /* 3002 * To switch channels clear any pending DMA operations; 3003 * wait long enough for the RX fifo to drain, reset the 3004 * hardware at the new frequency, and then re-enable 3005 * the relevant bits of the h/w. 3006 */ 3007 ath_hal_intrset(ah, 0); /* disable interrupts */ 3008 ath_draintxq(sc); /* clear pending tx frames */ 3009 ath_stoprecv(sc); /* turn off frame recv */ 3010 /* 3011 * Convert to a HAL channel description with 3012 * the flags constrained to reflect the current 3013 * operating mode. 3014 */ 3015 hchan.channel = chan->ic_freq; 3016 hchan.channelFlags = ath_chan2flags(ic, chan); 3017 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 3018 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 3019 "channel %u (%u Mhz)\n", 3020 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 3021 return EIO; 3022 } 3023 /* 3024 * Re-enable rx framework. 3025 */ 3026 if (ath_startrecv(sc) != 0) { 3027 if_printf(&ic->ic_if, 3028 "ath_chan_set: unable to restart recv logic\n"); 3029 return EIO; 3030 } 3031 3032 /* 3033 * Update BPF state. 3034 */ 3035 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 3036 htole16(chan->ic_freq); 3037 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 3038 htole16(chan->ic_flags); 3039 3040 /* 3041 * Change channels and update the h/w rate map 3042 * if we're switching; e.g. 11a to 11b/g. 3043 */ 3044 ic->ic_ibss_chan = chan; 3045 mode = ieee80211_chan2mode(ic, chan); 3046 if (mode != sc->sc_curmode) 3047 ath_setcurmode(sc, mode); 3048 3049 /* 3050 * Re-enable interrupts. 3051 */ 3052 ath_hal_intrset(ah, sc->sc_imask); 3053 } 3054 return 0; 3055 } 3056 3057 static void 3058 ath_next_scan(void *arg) 3059 { 3060 struct ath_softc *sc = arg; 3061 struct ieee80211com *ic = &sc->sc_ic; 3062 struct ifnet *ifp = &ic->ic_if; 3063 int s; 3064 3065 /* don't call ath_start w/o network interrupts blocked */ 3066 s = splnet(); 3067 3068 if (ic->ic_state == IEEE80211_S_SCAN) 3069 ieee80211_next_scan(ifp); 3070 splx(s); 3071 } 3072 3073 /* 3074 * Periodically recalibrate the PHY to account 3075 * for temperature/environment changes. 3076 */ 3077 static void 3078 ath_calibrate(void *arg) 3079 { 3080 struct ath_softc *sc = arg; 3081 struct ath_hal *ah = sc->sc_ah; 3082 struct ieee80211com *ic = &sc->sc_ic; 3083 struct ieee80211_channel *c; 3084 HAL_CHANNEL hchan; 3085 3086 sc->sc_stats.ast_per_cal++; 3087 3088 /* 3089 * Convert to a HAL channel description with the flags 3090 * constrained to reflect the current operating mode. 3091 */ 3092 c = ic->ic_ibss_chan; 3093 hchan.channel = c->ic_freq; 3094 hchan.channelFlags = ath_chan2flags(ic, c); 3095 3096 DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 3097 3098 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 3099 /* 3100 * Rfgain is out of bounds, reset the chip 3101 * to load new gain values. 3102 */ 3103 sc->sc_stats.ast_per_rfgain++; 3104 ath_reset(sc); 3105 } 3106 if (!ath_hal_calibrate(ah, &hchan)) { 3107 DPRINTF(("%s: calibration of channel %u failed\n", 3108 __func__, c->ic_freq)); 3109 sc->sc_stats.ast_per_calfail++; 3110 } 3111 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 3112 } 3113 3114 static HAL_LED_STATE 3115 ath_state_to_led(enum ieee80211_state state) 3116 { 3117 switch (state) { 3118 case IEEE80211_S_INIT: 3119 return HAL_LED_INIT; 3120 case IEEE80211_S_SCAN: 3121 return HAL_LED_SCAN; 3122 case IEEE80211_S_AUTH: 3123 return HAL_LED_AUTH; 3124 case IEEE80211_S_ASSOC: 3125 return HAL_LED_ASSOC; 3126 case IEEE80211_S_RUN: 3127 return HAL_LED_RUN; 3128 default: 3129 panic("%s: unknown 802.11 state %d\n", __func__, state); 3130 return HAL_LED_INIT; 3131 } 3132 } 3133 3134 static int 3135 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 3136 { 3137 struct ifnet *ifp = &ic->ic_if; 3138 struct ath_softc *sc = ifp->if_softc; 3139 struct ath_hal *ah = sc->sc_ah; 3140 struct ieee80211_node *ni; 3141 int i, error; 3142 const u_int8_t *bssid; 3143 u_int32_t rfilt; 3144 3145 DPRINTF(("%s: %s -> %s\n", __func__, 3146 ieee80211_state_name[ic->ic_state], 3147 ieee80211_state_name[nstate])); 3148 3149 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 3150 3151 if (nstate == IEEE80211_S_INIT) { 3152 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3153 ath_hal_intrset(ah, sc->sc_imask); 3154 callout_stop(&sc->sc_scan_ch); 3155 callout_stop(&sc->sc_cal_ch); 3156 return (*sc->sc_newstate)(ic, nstate, arg); 3157 } 3158 ni = ic->ic_bss; 3159 error = ath_chan_set(sc, ni->ni_chan); 3160 if (error != 0) 3161 goto bad; 3162 rfilt = ath_calcrxfilter(sc); 3163 if (nstate == IEEE80211_S_SCAN) { 3164 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 3165 ath_next_scan, sc); 3166 bssid = ifp->if_broadcastaddr; 3167 } else { 3168 callout_stop(&sc->sc_scan_ch); 3169 bssid = ni->ni_bssid; 3170 } 3171 ath_hal_setrxfilter(ah, rfilt); 3172 DPRINTF(("%s: RX filter 0x%x bssid %s\n", 3173 __func__, rfilt, ether_sprintf(bssid))); 3174 3175 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 3176 ath_hal_setassocid(ah, bssid, ni->ni_associd); 3177 else 3178 ath_hal_setassocid(ah, bssid, 0); 3179 if (ic->ic_flags & IEEE80211_F_WEPON) { 3180 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3181 if (ath_hal_keyisvalid(ah, i)) 3182 ath_hal_keysetmac(ah, i, bssid); 3183 } 3184 3185 if (nstate == IEEE80211_S_RUN) { 3186 DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 3187 "capinfo=0x%04x chan=%d\n" 3188 , __func__ 3189 , ic->ic_flags 3190 , ni->ni_intval 3191 , ether_sprintf(ni->ni_bssid) 3192 , ni->ni_capinfo 3193 , ieee80211_chan2ieee(ic, ni->ni_chan))); 3194 3195 /* 3196 * Allocate and setup the beacon frame for AP or adhoc mode. 3197 */ 3198 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 3199 ic->ic_opmode == IEEE80211_M_IBSS) { 3200 error = ath_beacon_alloc(sc, ni); 3201 if (error != 0) 3202 goto bad; 3203 } 3204 3205 /* 3206 * Configure the beacon and sleep timers. 3207 */ 3208 ath_beacon_config(sc); 3209 3210 /* start periodic recalibration timer */ 3211 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 3212 ath_calibrate, sc); 3213 } else { 3214 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3215 ath_hal_intrset(ah, sc->sc_imask); 3216 callout_stop(&sc->sc_cal_ch); /* no calibration */ 3217 } 3218 /* 3219 * Reset the rate control state. 3220 */ 3221 ath_rate_ctl_reset(sc, nstate); 3222 /* 3223 * Invoke the parent method to complete the work. 3224 */ 3225 return (*sc->sc_newstate)(ic, nstate, arg); 3226 bad: 3227 callout_stop(&sc->sc_scan_ch); 3228 callout_stop(&sc->sc_cal_ch); 3229 /* NB: do not invoke the parent */ 3230 return error; 3231 } 3232 3233 /* 3234 * Setup driver-specific state for a newly associated node. 3235 * Note that we're called also on a re-associate, the isnew 3236 * param tells us if this is the first time or not. 3237 */ 3238 static void 3239 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 3240 { 3241 if (isnew) { 3242 struct ath_node *an = (struct ath_node *) ni; 3243 3244 an->an_tx_ok = an->an_tx_err = 3245 an->an_tx_retr = an->an_tx_upper = 0; 3246 /* start with highest negotiated rate */ 3247 /* 3248 * XXX should do otherwise but only when 3249 * the rate control algorithm is better. 3250 */ 3251 KASSERT(ni->ni_rates.rs_nrates > 0, 3252 ("new association w/ no rates!")); 3253 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3254 } 3255 } 3256 3257 static int 3258 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor, 3259 HAL_BOOL xchanmode) 3260 { 3261 struct ieee80211com *ic = &sc->sc_ic; 3262 struct ifnet *ifp = &ic->ic_if; 3263 struct ath_hal *ah = sc->sc_ah; 3264 HAL_CHANNEL *chans; 3265 int i, ix, nchan; 3266 3267 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 3268 M_TEMP, M_NOWAIT); 3269 if (chans == NULL) { 3270 if_printf(ifp, "unable to allocate channel table\n"); 3271 return ENOMEM; 3272 } 3273 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 3274 cc, HAL_MODE_ALL, outdoor, xchanmode)) { 3275 if_printf(ifp, "unable to collect channel list from hal\n"); 3276 free(chans, M_TEMP); 3277 return EINVAL; 3278 } 3279 3280 /* 3281 * Convert HAL channels to ieee80211 ones and insert 3282 * them in the table according to their channel number. 3283 */ 3284 for (i = 0; i < nchan; i++) { 3285 HAL_CHANNEL *c = &chans[i]; 3286 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 3287 if (ix > IEEE80211_CHAN_MAX) { 3288 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 3289 ix, c->channel, c->channelFlags); 3290 continue; 3291 } 3292 DPRINTF(("%s: HAL channel %d/%d freq %d flags %#04x idx %d\n", 3293 sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags, 3294 ix)); 3295 /* NB: flags are known to be compatible */ 3296 if (ic->ic_channels[ix].ic_freq == 0) { 3297 ic->ic_channels[ix].ic_freq = c->channel; 3298 ic->ic_channels[ix].ic_flags = c->channelFlags; 3299 } else { 3300 /* channels overlap; e.g. 11g and 11b */ 3301 ic->ic_channels[ix].ic_flags |= c->channelFlags; 3302 } 3303 } 3304 free(chans, M_TEMP); 3305 return 0; 3306 } 3307 3308 static int 3309 ath_rate_setup(struct ath_softc *sc, u_int mode) 3310 { 3311 struct ath_hal *ah = sc->sc_ah; 3312 struct ieee80211com *ic = &sc->sc_ic; 3313 const HAL_RATE_TABLE *rt; 3314 struct ieee80211_rateset *rs; 3315 int i, maxrates; 3316 3317 switch (mode) { 3318 case IEEE80211_MODE_11A: 3319 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 3320 break; 3321 case IEEE80211_MODE_11B: 3322 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 3323 break; 3324 case IEEE80211_MODE_11G: 3325 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 3326 break; 3327 case IEEE80211_MODE_TURBO: 3328 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 3329 break; 3330 default: 3331 DPRINTF(("%s: invalid mode %u\n", __func__, mode)); 3332 return 0; 3333 } 3334 rt = sc->sc_rates[mode]; 3335 if (rt == NULL) 3336 return 0; 3337 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 3338 DPRINTF(("%s: rate table too small (%u > %u)\n", 3339 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 3340 maxrates = IEEE80211_RATE_MAXSIZE; 3341 } else 3342 maxrates = rt->rateCount; 3343 rs = &ic->ic_sup_rates[mode]; 3344 for (i = 0; i < maxrates; i++) 3345 rs->rs_rates[i] = rt->info[i].dot11Rate; 3346 rs->rs_nrates = maxrates; 3347 return 1; 3348 } 3349 3350 static void 3351 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 3352 { 3353 const HAL_RATE_TABLE *rt; 3354 int i; 3355 3356 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 3357 rt = sc->sc_rates[mode]; 3358 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 3359 for (i = 0; i < rt->rateCount; i++) 3360 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 3361 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 3362 for (i = 0; i < 32; i++) 3363 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 3364 sc->sc_currates = rt; 3365 sc->sc_curmode = mode; 3366 } 3367 3368 /* 3369 * Reset the rate control state for each 802.11 state transition. 3370 */ 3371 static void 3372 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 3373 { 3374 struct ieee80211com *ic = &sc->sc_ic; 3375 struct ieee80211_node *ni; 3376 struct ath_node *an; 3377 3378 if (ic->ic_opmode != IEEE80211_M_STA) { 3379 /* 3380 * When operating as a station the node table holds 3381 * the AP's that were discovered during scanning. 3382 * For any other operating mode we want to reset the 3383 * tx rate state of each node. 3384 */ 3385 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3386 ni->ni_txrate = 0; /* use lowest rate */ 3387 an = (struct ath_node *) ni; 3388 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3389 an->an_tx_upper = 0; 3390 } 3391 } 3392 /* 3393 * Reset local xmit state; this is really only meaningful 3394 * when operating in station or adhoc mode. 3395 */ 3396 ni = ic->ic_bss; 3397 an = (struct ath_node *) ni; 3398 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3399 if (state == IEEE80211_S_RUN) { 3400 /* start with highest negotiated rate */ 3401 KASSERT(ni->ni_rates.rs_nrates > 0, 3402 ("transition to RUN state w/ no rates!")); 3403 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3404 } else { 3405 /* use lowest rate */ 3406 ni->ni_txrate = 0; 3407 } 3408 } 3409 3410 /* 3411 * Examine and potentially adjust the transmit rate. 3412 */ 3413 static void 3414 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3415 { 3416 struct ath_softc *sc = arg; 3417 struct ath_node *an = (struct ath_node *) ni; 3418 struct ieee80211_rateset *rs = &ni->ni_rates; 3419 int mod = 0, orate, enough; 3420 3421 /* 3422 * Rate control 3423 * XXX: very primitive version. 3424 */ 3425 sc->sc_stats.ast_rate_calls++; 3426 3427 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3428 3429 /* no packet reached -> down */ 3430 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3431 mod = -1; 3432 3433 /* all packets needs retry in average -> down */ 3434 if (enough && an->an_tx_ok < an->an_tx_retr) 3435 mod = -1; 3436 3437 /* no error and less than 10% of packets needs retry -> up */ 3438 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3439 mod = 1; 3440 3441 orate = ni->ni_txrate; 3442 switch (mod) { 3443 case 0: 3444 if (enough && an->an_tx_upper > 0) 3445 an->an_tx_upper--; 3446 break; 3447 case -1: 3448 if (ni->ni_txrate > 0) { 3449 ni->ni_txrate--; 3450 sc->sc_stats.ast_rate_drop++; 3451 } 3452 an->an_tx_upper = 0; 3453 break; 3454 case 1: 3455 if (++an->an_tx_upper < 2) 3456 break; 3457 an->an_tx_upper = 0; 3458 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3459 ni->ni_txrate++; 3460 sc->sc_stats.ast_rate_raise++; 3461 } 3462 break; 3463 } 3464 3465 if (ni->ni_txrate != orate) { 3466 DPRINTF(("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3467 __func__, 3468 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3469 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3470 an->an_tx_ok, an->an_tx_err, an->an_tx_retr)); 3471 } 3472 if (ni->ni_txrate != orate || enough) 3473 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3474 } 3475 3476 #ifdef AR_DEBUG 3477 #ifdef __FreeBSD__ 3478 static int 3479 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3480 { 3481 char dmode[64]; 3482 int error; 3483 3484 strncpy(dmode, "", sizeof(dmode) - 1); 3485 dmode[sizeof(dmode) - 1] = '\0'; 3486 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3487 3488 if (error == 0 && req->newptr != NULL) { 3489 struct ifnet *ifp; 3490 struct ath_softc *sc; 3491 3492 ifp = ifunit("ath0"); /* XXX */ 3493 if (!ifp) 3494 return EINVAL; 3495 sc = ifp->if_softc; 3496 if (strcmp(dmode, "hal") == 0) 3497 ath_hal_dumpstate(sc->sc_ah); 3498 else 3499 return EINVAL; 3500 } 3501 return error; 3502 } 3503 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3504 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3505 #endif /* __FreeBSD__ */ 3506 3507 #if 0 /* #ifdef __NetBSD__ */ 3508 static int 3509 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3510 { 3511 char dmode[64]; 3512 int error; 3513 3514 strncpy(dmode, "", sizeof(dmode) - 1); 3515 dmode[sizeof(dmode) - 1] = '\0'; 3516 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3517 3518 if (error == 0 && req->newptr != NULL) { 3519 struct ifnet *ifp; 3520 struct ath_softc *sc; 3521 3522 ifp = ifunit("ath0"); /* XXX */ 3523 if (!ifp) 3524 return EINVAL; 3525 sc = ifp->if_softc; 3526 if (strcmp(dmode, "hal") == 0) 3527 ath_hal_dumpstate(sc->sc_ah); 3528 else 3529 return EINVAL; 3530 } 3531 return error; 3532 } 3533 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3534 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3535 #endif /* __NetBSD__ */ 3536 3537 static void 3538 ath_printrxbuf(struct ath_buf *bf, int done) 3539 { 3540 struct ath_desc *ds; 3541 int i; 3542 3543 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3544 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3545 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3546 ds->ds_link, ds->ds_data, 3547 ds->ds_ctl0, ds->ds_ctl1, 3548 ds->ds_hw[0], ds->ds_hw[1], 3549 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3550 } 3551 } 3552 3553 static void 3554 ath_printtxbuf(struct ath_buf *bf, int done) 3555 { 3556 struct ath_desc *ds; 3557 int i; 3558 3559 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3560 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3561 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3562 ds->ds_link, ds->ds_data, 3563 ds->ds_ctl0, ds->ds_ctl1, 3564 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3565 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3566 } 3567 } 3568 #endif /* AR_DEBUG */ 3569
Indexes created Thu Oct 02 07:10:07 GMT 2025