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ath.c revision 1.25
      1 /*	$NetBSD: ath.c,v 1.25 2004/04/30 23:59:48 dyoung Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer,
     12  *    without modification.
     13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
     14  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
     15  *    redistribution must be conditioned upon including a substantially
     16  *    similar Disclaimer requirement for further binary redistribution.
     17  * 3. Neither the names of the above-listed copyright holders nor the names
     18  *    of any contributors may be used to endorse or promote products derived
     19  *    from this software without specific prior written permission.
     20  *
     21  * Alternatively, this software may be distributed under the terms of the
     22  * GNU General Public License ("GPL") version 2 as published by the Free
     23  * Software Foundation.
     24  *
     25  * NO WARRANTY
     26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     28  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
     29  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
     30  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
     31  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
     34  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     36  * THE POSSIBILITY OF SUCH DAMAGES.
     37  */
     38 
     39 #include <sys/cdefs.h>
     40 #ifdef __FreeBSD__
     41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.54 2004/04/05 04:42:42 sam Exp $");
     42 #endif
     43 #ifdef __NetBSD__
     44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.25 2004/04/30 23:59:48 dyoung Exp $");
     45 #endif
     46 
     47 /*
     48  * Driver for the Atheros Wireless LAN controller.
     49  *
     50  * This software is derived from work of Atsushi Onoe; his contribution
     51  * is greatly appreciated.
     52  */
     53 
     54 #include "opt_inet.h"
     55 
     56 #ifdef __NetBSD__
     57 #include "bpfilter.h"
     58 #endif /* __NetBSD__ */
     59 
     60 #include <sys/param.h>
     61 #include <sys/systm.h>
     62 #include <sys/types.h>
     63 #include <sys/sysctl.h>
     64 #include <sys/mbuf.h>
     65 #include <sys/malloc.h>
     66 #include <sys/lock.h>
     67 #ifdef __FreeBSD__
     68 #include <sys/mutex.h>
     69 #endif
     70 #include <sys/kernel.h>
     71 #include <sys/socket.h>
     72 #include <sys/sockio.h>
     73 #include <sys/errno.h>
     74 #include <sys/callout.h>
     75 #ifdef __FreeBSD__
     76 #include <sys/bus.h>
     77 #else
     78 #include <machine/bus.h>
     79 #endif
     80 #include <sys/endian.h>
     81 
     82 #include <machine/bus.h>
     83 
     84 #include <net/if.h>
     85 #include <net/if_dl.h>
     86 #include <net/if_media.h>
     87 #include <net/if_arp.h>
     88 #ifdef __FreeBSD__
     89 #include <net/ethernet.h>
     90 #else
     91 #include <net/if_ether.h>
     92 #endif
     93 #include <net/if_llc.h>
     94 
     95 #include <net80211/ieee80211_var.h>
     96 #include <net80211/ieee80211_compat.h>
     97 
     98 #if NBPFILTER > 0
     99 #include <net/bpf.h>
    100 #endif
    101 
    102 #ifdef INET
    103 #include <netinet/in.h>
    104 #endif
    105 
    106 #include <dev/ic/athcompat.h>
    107 
    108 #define	AR_DEBUG
    109 #ifdef __FreeBSD__
    110 #include <dev/ath/if_athvar.h>
    111 #include <contrib/dev/ath/ah_desc.h>
    112 #else
    113 #include <dev/ic/athvar.h>
    114 #include <../contrib/sys/dev/ic/athhal_desc.h>
    115 #endif
    116 
    117 /* unaligned little endian access */
    118 #define LE_READ_2(p)							\
    119 	((u_int16_t)							\
    120 	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8)))
    121 #define LE_READ_4(p)							\
    122 	((u_int32_t)							\
    123 	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8) |	\
    124 	  (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
    125 
    126 #ifdef __FreeBSD__
    127 static void	ath_init(void *);
    128 #else
    129 static int	ath_init(struct ifnet *);
    130 #endif
    131 static int	ath_init1(struct ath_softc *);
    132 static int	ath_intr1(struct ath_softc *);
    133 static void	ath_stop(struct ifnet *);
    134 static void	ath_start(struct ifnet *);
    135 static void	ath_reset(struct ath_softc *);
    136 static int	ath_media_change(struct ifnet *);
    137 static void	ath_watchdog(struct ifnet *);
    138 static int	ath_ioctl(struct ifnet *, u_long, caddr_t);
    139 static void	ath_fatal_proc(void *, int);
    140 static void	ath_rxorn_proc(void *, int);
    141 static void	ath_bmiss_proc(void *, int);
    142 static void	ath_initkeytable(struct ath_softc *);
    143 static void	ath_mode_init(struct ath_softc *);
    144 static int	ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
    145 static void	ath_beacon_proc(void *, int);
    146 static void	ath_beacon_free(struct ath_softc *);
    147 static void	ath_beacon_config(struct ath_softc *);
    148 static int	ath_desc_alloc(struct ath_softc *);
    149 static void	ath_desc_free(struct ath_softc *);
    150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *);
    151 static void	ath_node_free(struct ieee80211com *, struct ieee80211_node *);
    152 static void	ath_node_copy(struct ieee80211com *,
    153 			struct ieee80211_node *, const struct ieee80211_node *);
    154 static u_int8_t	ath_node_getrssi(struct ieee80211com *,
    155 			struct ieee80211_node *);
    156 static int	ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
    157 static void	ath_rx_proc(void *, int);
    158 static int	ath_tx_start(struct ath_softc *, struct ieee80211_node *,
    159 			     struct ath_buf *, struct mbuf *);
    160 static void	ath_tx_proc(void *, int);
    161 static int	ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
    162 static void	ath_draintxq(struct ath_softc *);
    163 static void	ath_stoprecv(struct ath_softc *);
    164 static int	ath_startrecv(struct ath_softc *);
    165 static void	ath_next_scan(void *);
    166 static void	ath_calibrate(void *);
    167 static int	ath_newstate(struct ieee80211com *, enum ieee80211_state, int);
    168 static void	ath_newassoc(struct ieee80211com *,
    169 			struct ieee80211_node *, int);
    170 static int	ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor,
    171 			HAL_BOOL xchanmode);
    172 
    173 static int	ath_rate_setup(struct ath_softc *sc, u_int mode);
    174 static void	ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
    175 static void	ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state);
    176 static void	ath_rate_ctl(void *, struct ieee80211_node *);
    177 
    178 #ifdef __NetBSD__
    179 int	ath_enable(struct ath_softc *);
    180 void	ath_disable(struct ath_softc *);
    181 void	ath_power(int, void *);
    182 #endif
    183 
    184 #ifdef __FreeBSD__
    185 SYSCTL_DECL(_hw_ath);
    186 /* XXX validate sysctl values */
    187 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime,
    188 	    0, "channel dwell time (ms) for AP/station scanning");
    189 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval,
    190 	    0, "chip calibration interval (secs)");
    191 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor,
    192 	    0, "enable/disable outdoor operation");
    193 TUNABLE_INT("hw.ath.outdoor", &ath_outdoor);
    194 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode,
    195 	    0, "country code");
    196 TUNABLE_INT("hw.ath.countrycode", &ath_countrycode);
    197 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain,
    198 	    0, "regulatory domain");
    199 #endif /* __FreeBSD__ */
    200 
    201 #ifdef __NetBSD__
    202 static int ath_dwelltime_nodenum, ath_calibrate_nodenum, ath_outdoor_nodenum,
    203            ath_countrycode_nodenum, ath_regdomain_nodenum, ath_debug_nodenum;
    204 #endif /* __NetBSD__ */
    205 
    206 static	int ath_dwelltime = 200;		/* 5 channels/second */
    207 static	int ath_calinterval = 30;		/* calibrate every 30 secs */
    208 static	int ath_outdoor = AH_TRUE;		/* outdoor operation */
    209 static	int ath_xchanmode = AH_TRUE;		/* enable extended channels */
    210 static	int ath_countrycode = CTRY_DEFAULT;	/* country code */
    211 static	int ath_regdomain = 0;			/* regulatory domain */
    212 
    213 #ifdef AR_DEBUG
    214 int	ath_debug = 0;
    215 #ifdef __FreeBSD__
    216 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
    217 	    0, "control debugging printfs");
    218 TUNABLE_INT("hw.ath.debug", &ath_debug);
    219 #endif /* __FreeBSD__ */
    220 #define	IFF_DUMPPKTS(_ifp, _m) \
    221 	((ath_debug & _m) || \
    222 	    ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
    223 static	void ath_printrxbuf(struct ath_buf *bf, int);
    224 static	void ath_printtxbuf(struct ath_buf *bf, int);
    225 enum {
    226 	ATH_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
    227 	ATH_DEBUG_XMIT_DESC	= 0x00000002,	/* xmit descriptors */
    228 	ATH_DEBUG_RECV		= 0x00000004,	/* basic recv operation */
    229 	ATH_DEBUG_RECV_DESC	= 0x00000008,	/* recv descriptors */
    230 	ATH_DEBUG_RATE		= 0x00000010,	/* rate control */
    231 	ATH_DEBUG_RESET		= 0x00000020,	/* reset processing */
    232 	ATH_DEBUG_MODE		= 0x00000040,	/* mode init/setup */
    233 	ATH_DEBUG_BEACON 	= 0x00000080,	/* beacon handling */
    234 	ATH_DEBUG_WATCHDOG 	= 0x00000100,	/* watchdog timeout */
    235 	ATH_DEBUG_INTR		= 0x00001000,	/* ISR */
    236 	ATH_DEBUG_TX_PROC	= 0x00002000,	/* tx ISR proc */
    237 	ATH_DEBUG_RX_PROC	= 0x00004000,	/* rx ISR proc */
    238 	ATH_DEBUG_BEACON_PROC	= 0x00008000,	/* beacon ISR proc */
    239 	ATH_DEBUG_CALIBRATE	= 0x00010000,	/* periodic calibration */
    240 	ATH_DEBUG_ANY		= 0xffffffff
    241 };
    242 #define	DPRINTF(_m,X)	if (ath_debug & (_m)) printf X
    243 #else
    244 #define	IFF_DUMPPKTS(_ifp, _m) \
    245 	(((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
    246 #define	DPRINTF(_m, X)
    247 #endif
    248 
    249 #ifdef __NetBSD__
    250 int
    251 ath_activate(struct device *self, enum devact act)
    252 {
    253 	struct ath_softc *sc = (struct ath_softc *)self;
    254 	int rv = 0, s;
    255 
    256 	s = splnet();
    257 	switch (act) {
    258 	case DVACT_ACTIVATE:
    259 		rv = EOPNOTSUPP;
    260 		break;
    261 	case DVACT_DEACTIVATE:
    262 		if_deactivate(&sc->sc_ic.ic_if);
    263 		break;
    264 	}
    265 	splx(s);
    266 	return rv;
    267 }
    268 
    269 int
    270 ath_enable(struct ath_softc *sc)
    271 {
    272 	if (ATH_IS_ENABLED(sc) == 0) {
    273 		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
    274 			printf("%s: device enable failed\n",
    275 				sc->sc_dev.dv_xname);
    276 			return (EIO);
    277 		}
    278 		sc->sc_flags |= ATH_ENABLED;
    279 	}
    280 	return (0);
    281 }
    282 
    283 void
    284 ath_disable(struct ath_softc *sc)
    285 {
    286 	if (!ATH_IS_ENABLED(sc))
    287 		return;
    288 	if (sc->sc_disable != NULL)
    289 		(*sc->sc_disable)(sc);
    290 	sc->sc_flags &= ~ATH_ENABLED;
    291 }
    292 
    293 static int
    294 sysctl_ath_verify(SYSCTLFN_ARGS)
    295 {
    296 	int error, t;
    297 	struct sysctlnode node;
    298 
    299 	node = *rnode;
    300 	t = *(int*)rnode->sysctl_data;
    301 	node.sysctl_data = &t;
    302 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
    303 	if (error || newp == NULL)
    304 		return (error);
    305 
    306 	DPRINTF(ATH_DEBUG_ANY, ("%s: t = %d, nodenum = %d, rnodenum = %d\n",
    307 	    __func__, t, node.sysctl_num, rnode->sysctl_num));
    308 
    309 	if (node.sysctl_num == ath_dwelltime_nodenum) {
    310 		if (t <= 0)
    311 			return (EINVAL);
    312 	} else if (node.sysctl_num == ath_calibrate_nodenum) {
    313 		if (t <= 0)
    314 			return (EINVAL);
    315 #ifdef AR_DEBUG
    316 	} else if (node.sysctl_num == ath_debug_nodenum) {
    317 		if (t < 0 || t > 2)
    318 			return (EINVAL);
    319 #endif /* AR_DEBUG */
    320 	} else
    321 		return (EINVAL);
    322 
    323 	*(int*)rnode->sysctl_data = t;
    324 
    325 	return (0);
    326 }
    327 
    328 /*
    329  * Setup sysctl(3) MIB, ath.*.
    330  *
    331  * TBD condition CTLFLAG_PERMANENT on being an LKM or not
    332  */
    333 SYSCTL_SETUP(sysctl_ath, "sysctl ath subtree setup")
    334 {
    335 	int rc, ath_node_num;
    336 	struct sysctlnode *node;
    337 
    338 	if ((rc = sysctl_createv(clog, 0, NULL, NULL,
    339 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL,
    340 	    NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0)
    341 		goto err;
    342 
    343 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    344 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "ath", NULL,
    345 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
    346 		goto err;
    347 
    348 	ath_node_num = node->sysctl_num;
    349 
    350 	/* channel dwell time (ms) for AP/station scanning */
    351 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    352 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
    353 	    CTLTYPE_INT, "dwell", NULL, sysctl_ath_verify, 0, &ath_dwelltime,
    354 	    0, CTL_HW, ath_node_num, CTL_CREATE,
    355 	    CTL_EOL)) != 0)
    356 		goto err;
    357 
    358 	ath_dwelltime_nodenum = node->sysctl_num;
    359 
    360 	/* chip calibration interval (secs) */
    361 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    362 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
    363 	    CTLTYPE_INT, "calibrate", NULL, sysctl_ath_verify,
    364 	    0, &ath_calinterval, 0, CTL_HW,
    365 	    ath_node_num, CTL_CREATE, CTL_EOL)) != 0)
    366 		goto err;
    367 
    368 	ath_calibrate_nodenum = node->sysctl_num;
    369 
    370 	/* enable/disable outdoor operation */
    371 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    372 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
    373 	    "outdoor", NULL, NULL, 0, &ath_outdoor, 0,
    374 	    CTL_HW, ath_node_num, CTL_CREATE,
    375 	    CTL_EOL)) != 0)
    376 		goto err;
    377 
    378 	ath_outdoor_nodenum = node->sysctl_num;
    379 
    380 	/* country code */
    381 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    382 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
    383 	    "countrycode", NULL, NULL, 0, &ath_countrycode, 0,
    384 	    CTL_HW, ath_node_num, CTL_CREATE,
    385 	    CTL_EOL)) != 0)
    386 		goto err;
    387 
    388 	ath_countrycode_nodenum = node->sysctl_num;
    389 
    390 	/* regulatory domain */
    391 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    392 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
    393 	    "regdomain", NULL, NULL, 0, &ath_regdomain, 0,
    394 	    CTL_HW, ath_node_num, CTL_CREATE,
    395 	    CTL_EOL)) != 0)
    396 		goto err;
    397 
    398 	ath_regdomain_nodenum = node->sysctl_num;
    399 
    400 #ifdef AR_DEBUG
    401 
    402 	/* control debugging printfs */
    403 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    404 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    405 	    "debug", NULL, sysctl_ath_verify, 0, &ath_debug, 0,
    406 	    CTL_HW, ath_node_num, CTL_CREATE,
    407 	    CTL_EOL)) != 0)
    408 		goto err;
    409 
    410 	ath_debug_nodenum = node->sysctl_num;
    411 
    412 #endif /* AR_DEBUG */
    413 	return;
    414 err:
    415 	printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc);
    416 }
    417 #endif /* __NetBSD__ */
    418 
    419 int
    420 ath_attach(u_int16_t devid, struct ath_softc *sc)
    421 {
    422 	struct ieee80211com *ic = &sc->sc_ic;
    423 	struct ifnet *ifp = &ic->ic_if;
    424 	struct ath_hal *ah;
    425 	HAL_STATUS status;
    426 	int error = 0;
    427 
    428 	DPRINTF(ATH_DEBUG_ANY, ("%s: devid 0x%x\n", __func__, devid));
    429 
    430 #ifdef __FreeBSD__
    431 	/* set these up early for if_printf use */
    432 	if_initname(ifp, device_get_name(sc->sc_dev),
    433 	    device_get_unit(sc->sc_dev));
    434 #else
    435 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
    436 #endif
    437 
    438 	ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
    439 	if (ah == NULL) {
    440 		if_printf(ifp, "unable to attach hardware; HAL status %u\n",
    441 			status);
    442 		error = ENXIO;
    443 		goto bad;
    444 	}
    445 	if (ah->ah_abi != HAL_ABI_VERSION) {
    446 		if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n",
    447 			ah->ah_abi, HAL_ABI_VERSION);
    448 		error = ENXIO;
    449 		goto bad;
    450 	}
    451 	if_printf(ifp, "mac %d.%d phy %d.%d",
    452 		ah->ah_macVersion, ah->ah_macRev,
    453 		ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf);
    454 	if (ah->ah_analog5GhzRev)
    455 		printf(" 5ghz radio %d.%d",
    456 			ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf);
    457 	if (ah->ah_analog2GhzRev)
    458 		printf(" 2ghz radio %d.%d",
    459 			ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf);
    460 	printf("\n");
    461 	sc->sc_ah = ah;
    462 	sc->sc_invalid = 0;	/* ready to go, enable interrupt handling */
    463 
    464 	/*
    465 	 * Collect the channel list using the default country
    466 	 * code and including outdoor channels.  The 802.11 layer
    467 	 * is resposible for filtering this list based on settings
    468 	 * like the phy mode.
    469 	 */
    470 	error = ath_getchannels(sc, ath_countrycode, ath_outdoor,
    471 	    ath_xchanmode);
    472 	if (error != 0)
    473 		goto bad;
    474 	/*
    475 	 * Copy these back; they are set as a side effect
    476 	 * of constructing the channel list.
    477 	 */
    478 	ath_regdomain = ath_hal_getregdomain(ah);
    479 	ath_countrycode = ath_hal_getcountrycode(ah);
    480 
    481 	/*
    482 	 * Setup rate tables for all potential media types.
    483 	 */
    484 	ath_rate_setup(sc, IEEE80211_MODE_11A);
    485 	ath_rate_setup(sc, IEEE80211_MODE_11B);
    486 	ath_rate_setup(sc, IEEE80211_MODE_11G);
    487 	ath_rate_setup(sc, IEEE80211_MODE_TURBO);
    488 
    489 	error = ath_desc_alloc(sc);
    490 	if (error != 0) {
    491 		if_printf(ifp, "failed to allocate descriptors: %d\n", error);
    492 		goto bad;
    493 	}
    494 	ATH_CALLOUT_INIT(&sc->sc_scan_ch);
    495 	ATH_CALLOUT_INIT(&sc->sc_cal_ch);
    496 
    497 #ifdef __FreeBSD__
    498 	ATH_TXBUF_LOCK_INIT(sc);
    499 	ATH_TXQ_LOCK_INIT(sc);
    500 #endif
    501 
    502 	ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc);
    503 	ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc);
    504 	ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc);
    505 	ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc);
    506 	ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc);
    507 
    508 	/*
    509 	 * For now just pre-allocate one data queue and one
    510 	 * beacon queue.  Note that the HAL handles resetting
    511 	 * them at the needed time.  Eventually we'll want to
    512 	 * allocate more tx queues for splitting management
    513 	 * frames and for QOS support.
    514 	 */
    515 	sc->sc_txhalq = ath_hal_setuptxqueue(ah,
    516 		HAL_TX_QUEUE_DATA,
    517 		AH_TRUE			/* enable interrupts */
    518 	);
    519 	if (sc->sc_txhalq == (u_int) -1) {
    520 		if_printf(ifp, "unable to setup a data xmit queue!\n");
    521 		goto bad2;
    522 	}
    523 	sc->sc_bhalq = ath_hal_setuptxqueue(ah,
    524 		HAL_TX_QUEUE_BEACON,
    525 		AH_TRUE			/* enable interrupts */
    526 	);
    527 	if (sc->sc_bhalq == (u_int) -1) {
    528 		if_printf(ifp, "unable to setup a beacon xmit queue!\n");
    529 		goto bad2;
    530 	}
    531 
    532 	ifp->if_softc = sc;
    533 	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
    534 	ifp->if_start = ath_start;
    535 	ifp->if_watchdog = ath_watchdog;
    536 	ifp->if_ioctl = ath_ioctl;
    537 	ifp->if_init = ath_init;
    538 #ifdef __FreeBSD__
    539 	ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
    540 #else
    541 #if 0
    542 	ifp->if_stop = ath_stop;		/* XXX */
    543 #endif
    544 	IFQ_SET_READY(&ifp->if_snd);
    545 #endif
    546 
    547 	ic->ic_softc = sc;
    548 	ic->ic_newassoc = ath_newassoc;
    549 	/* XXX not right but it's not used anywhere important */
    550 	ic->ic_phytype = IEEE80211_T_OFDM;
    551 	ic->ic_opmode = IEEE80211_M_STA;
    552 	ic->ic_caps = IEEE80211_C_WEP		/* wep supported */
    553 		| IEEE80211_C_IBSS		/* ibss, nee adhoc, mode */
    554 		| IEEE80211_C_HOSTAP		/* hostap mode */
    555 		| IEEE80211_C_MONITOR		/* monitor mode */
    556 		| IEEE80211_C_SHPREAMBLE	/* short preamble supported */
    557 		;
    558 
    559 	/* get mac address from hardware */
    560 	ath_hal_getmac(ah, ic->ic_myaddr);
    561 
    562 #ifdef __NetBSD__
    563 	if_attach(ifp);
    564 #endif
    565 	/* call MI attach routine. */
    566 	ieee80211_ifattach(ifp);
    567 	/* override default methods */
    568 	ic->ic_node_alloc = ath_node_alloc;
    569 	sc->sc_node_free = ic->ic_node_free;
    570 	ic->ic_node_free = ath_node_free;
    571 	sc->sc_node_copy = ic->ic_node_copy;
    572 	ic->ic_node_copy = ath_node_copy;
    573 	ic->ic_node_getrssi = ath_node_getrssi;
    574 	sc->sc_newstate = ic->ic_newstate;
    575 	ic->ic_newstate = ath_newstate;
    576 	/* complete initialization */
    577 	ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status);
    578 
    579 #if NBPFILTER > 0
    580 	bpfattach2(ifp, DLT_IEEE802_11_RADIO,
    581 		sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
    582 		&sc->sc_drvbpf);
    583 #endif
    584 	/*
    585 	 * Initialize constant fields.
    586 	 * XXX make header lengths a multiple of 32-bits so subsequent
    587 	 *     headers are properly aligned; this is a kludge to keep
    588 	 *     certain applications happy.
    589 	 *
    590 	 * NB: the channel is setup each time we transition to the
    591 	 *     RUN state to avoid filling it in for each frame.
    592 	 */
    593 	sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(u_int32_t));
    594 	sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len);
    595 	sc->sc_tx_th.wt_ihdr.it_present = htole32(ATH_TX_RADIOTAP_PRESENT);
    596 
    597 	sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(u_int32_t));
    598 	sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len);
    599 	sc->sc_rx_th.wr_ihdr.it_present = htole32(ATH_RX_RADIOTAP_PRESENT);
    600 
    601 #ifdef __NetBSD__
    602 	sc->sc_flags |= ATH_ATTACHED;
    603 	/*
    604 	 * Make sure the interface is shutdown during reboot.
    605 	 */
    606 	sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc);
    607 	if (sc->sc_sdhook == NULL)
    608 		printf("%s: WARNING: unable to establish shutdown hook\n",
    609 			sc->sc_dev.dv_xname);
    610 	sc->sc_powerhook = powerhook_establish(ath_power, sc);
    611 	if (sc->sc_powerhook == NULL)
    612 		printf("%s: WARNING: unable to establish power hook\n",
    613 			sc->sc_dev.dv_xname);
    614 #endif
    615 	return 0;
    616 bad2:
    617 	ath_desc_free(sc);
    618 bad:
    619 	if (ah)
    620 		ath_hal_detach(ah);
    621 	sc->sc_invalid = 1;
    622 	return error;
    623 }
    624 
    625 int
    626 ath_detach(struct ath_softc *sc)
    627 {
    628 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    629 	ath_softc_critsect_decl(s);
    630 
    631 	if ((sc->sc_flags & ATH_ATTACHED) == 0)
    632 		return (0);
    633 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
    634 
    635 	ath_softc_critsect_begin(sc, s);
    636 	ath_stop(ifp);
    637 #if NBPFILTER > 0
    638 	bpfdetach(ifp);
    639 #endif
    640 	ath_desc_free(sc);
    641 	ath_hal_detach(sc->sc_ah);
    642 	ieee80211_ifdetach(ifp);
    643 #ifdef __NetBSD__
    644 	if_detach(ifp);
    645 #endif /* __NetBSD__ */
    646 	ath_softc_critsect_end(sc, s);
    647 #ifdef __NetBSD__
    648 	powerhook_disestablish(sc->sc_powerhook);
    649 	shutdownhook_disestablish(sc->sc_sdhook);
    650 #endif /* __NetBSD__ */
    651 #ifdef __FreeBSD__
    652 
    653 	ATH_TXBUF_LOCK_DESTROY(sc);
    654 	ATH_TXQ_LOCK_DESTROY(sc);
    655 
    656 #endif /* __FreeBSD__ */
    657 	return 0;
    658 }
    659 
    660 #ifdef __NetBSD__
    661 void
    662 ath_power(int why, void *arg)
    663 {
    664 	struct ath_softc *sc = arg;
    665 	int s;
    666 
    667 	DPRINTF(ATH_DEBUG_ANY, ("ath_power(%d)\n", why));
    668 
    669 	s = splnet();
    670 	switch (why) {
    671 	case PWR_SUSPEND:
    672 	case PWR_STANDBY:
    673 		ath_suspend(sc, why);
    674 		break;
    675 	case PWR_RESUME:
    676 		ath_resume(sc, why);
    677 		break;
    678 	case PWR_SOFTSUSPEND:
    679 	case PWR_SOFTSTANDBY:
    680 	case PWR_SOFTRESUME:
    681 		break;
    682 	}
    683 	splx(s);
    684 }
    685 #endif
    686 
    687 void
    688 ath_suspend(struct ath_softc *sc, int why)
    689 {
    690 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    691 
    692 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
    693 
    694 	ath_stop(ifp);
    695 	if (sc->sc_power != NULL)
    696 		(*sc->sc_power)(sc, why);
    697 }
    698 
    699 void
    700 ath_resume(struct ath_softc *sc, int why)
    701 {
    702 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    703 
    704 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
    705 
    706 	if (ifp->if_flags & IFF_UP) {
    707 		ath_init(ifp);
    708 #if 0
    709 		(void)ath_intr(sc);
    710 #endif
    711 		if (sc->sc_power != NULL)
    712 			(*sc->sc_power)(sc, why);
    713 		if (ifp->if_flags & IFF_RUNNING)
    714 			ath_start(ifp);
    715 	}
    716 }
    717 
    718 #ifdef __NetBSD__
    719 void
    720 ath_shutdown(void *arg)
    721 {
    722 	struct ath_softc *sc = arg;
    723 
    724 	ath_stop(&sc->sc_ic.ic_if);
    725 }
    726 #else
    727 void
    728 ath_shutdown(struct ath_softc *sc)
    729 {
    730 #if 1
    731 	return;
    732 #else
    733 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    734 
    735 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
    736 
    737 	ath_stop(ifp);
    738 #endif
    739 }
    740 #endif
    741 
    742 #ifdef __NetBSD__
    743 int
    744 ath_intr(void *arg)
    745 {
    746 	return ath_intr1((struct ath_softc *)arg);
    747 }
    748 #else
    749 void
    750 ath_intr(void *arg)
    751 {
    752 	(void)ath_intr1((struct ath_softc *)arg);
    753 }
    754 #endif
    755 
    756 static int
    757 ath_intr1(struct ath_softc *sc)
    758 {
    759 	struct ieee80211com *ic = &sc->sc_ic;
    760 	struct ifnet *ifp = &ic->ic_if;
    761 	struct ath_hal *ah = sc->sc_ah;
    762 	HAL_INT status;
    763 
    764 	if (sc->sc_invalid) {
    765 		/*
    766 		 * The hardware is not ready/present, don't touch anything.
    767 		 * Note this can happen early on if the IRQ is shared.
    768 		 */
    769 		DPRINTF(ATH_DEBUG_ANY, ("%s: invalid; ignored\n", __func__));
    770 		return 0;
    771 	}
    772 	if (!ath_hal_intrpend(ah))		/* shared irq, not for us */
    773 		return 0;
    774 	if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
    775 		DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n",
    776 			__func__, ifp->if_flags));
    777 		ath_hal_getisr(ah, &status);	/* clear ISR */
    778 		ath_hal_intrset(ah, 0);		/* disable further intr's */
    779 		return 1; /* XXX */
    780 	}
    781 	ath_hal_getisr(ah, &status);		/* NB: clears ISR too */
    782 	DPRINTF(ATH_DEBUG_INTR, ("%s: status 0x%x\n", __func__, status));
    783 #ifdef AR_DEBUG
    784 	if (ath_debug &&
    785 	    (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) {
    786 		if_printf(ifp, "ath_intr: status 0x%x\n", status);
    787 		ath_hal_dumpstate(ah);
    788 	}
    789 #endif /* AR_DEBUG */
    790 	status &= sc->sc_imask;			/* discard unasked for bits */
    791 	if (status & HAL_INT_FATAL) {
    792 		sc->sc_stats.ast_hardware++;
    793 		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
    794 		ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask);
    795 	} else if (status & HAL_INT_RXORN) {
    796 		sc->sc_stats.ast_rxorn++;
    797 		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
    798 		ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask);
    799 	} else {
    800 		if (status & HAL_INT_RXEOL) {
    801 			/*
    802 			 * NB: the hardware should re-read the link when
    803 			 *     RXE bit is written, but it doesn't work at
    804 			 *     least on older hardware revs.
    805 			 */
    806 			sc->sc_stats.ast_rxeol++;
    807 			sc->sc_rxlink = NULL;
    808 		}
    809 		if (status & HAL_INT_TXURN) {
    810 			sc->sc_stats.ast_txurn++;
    811 			/* bump tx trigger level */
    812 			ath_hal_updatetxtriglevel(ah, AH_TRUE);
    813 		}
    814 		if (status & HAL_INT_RX)
    815 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask);
    816 		if (status & HAL_INT_TX)
    817 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask);
    818 		if (status & HAL_INT_SWBA) {
    819 			/*
    820 			 * Handle beacon transmission directly; deferring
    821 			 * this is too slow to meet timing constraints
    822 			 * under load.
    823 			 */
    824 			ath_beacon_proc(sc, 0);
    825 		}
    826 		if (status & HAL_INT_BMISS) {
    827 			sc->sc_stats.ast_bmiss++;
    828 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask);
    829 		}
    830 	}
    831 	return 1;
    832 }
    833 
    834 static void
    835 ath_fatal_proc(void *arg, int pending)
    836 {
    837 	struct ath_softc *sc = arg;
    838 
    839 	device_printf(sc->sc_dev, "hardware error; resetting\n");
    840 	ath_reset(sc);
    841 }
    842 
    843 static void
    844 ath_rxorn_proc(void *arg, int pending)
    845 {
    846 	struct ath_softc *sc = arg;
    847 
    848 	device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n");
    849 	ath_reset(sc);
    850 }
    851 
    852 static void
    853 ath_bmiss_proc(void *arg, int pending)
    854 {
    855 	struct ath_softc *sc = arg;
    856 	struct ieee80211com *ic = &sc->sc_ic;
    857 
    858 	DPRINTF(ATH_DEBUG_ANY, ("%s: pending %u\n", __func__, pending));
    859 	if (ic->ic_opmode != IEEE80211_M_STA)
    860 		return;
    861 	if (ic->ic_state == IEEE80211_S_RUN) {
    862 		/*
    863 		 * Rather than go directly to scan state, try to
    864 		 * reassociate first.  If that fails then the state
    865 		 * machine will drop us into scanning after timing
    866 		 * out waiting for a probe response.
    867 		 */
    868 		ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1);
    869 	}
    870 }
    871 
    872 static u_int
    873 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan)
    874 {
    875 	enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan);
    876 
    877 	switch (mode) {
    878 	case IEEE80211_MODE_AUTO:
    879 		return 0;
    880 	case IEEE80211_MODE_11A:
    881 		return CHANNEL_A;
    882 	case IEEE80211_MODE_11B:
    883 		return CHANNEL_B;
    884 	case IEEE80211_MODE_11G:
    885 		return CHANNEL_PUREG;
    886 	case IEEE80211_MODE_TURBO:
    887 		return CHANNEL_T;
    888 	default:
    889 		panic("%s: unsupported mode %d\n", __func__, mode);
    890 		return 0;
    891 	}
    892 }
    893 
    894 #ifdef __NetBSD__
    895 static int
    896 ath_init(struct ifnet *ifp)
    897 {
    898 	return ath_init1((struct ath_softc *)ifp->if_softc);
    899 }
    900 #else
    901 static void
    902 ath_init(void *arg)
    903 {
    904 	(void)ath_init1((struct ath_softc *)arg);
    905 }
    906 #endif
    907 
    908 static int
    909 ath_init1(struct ath_softc *sc)
    910 {
    911 	struct ieee80211com *ic = &sc->sc_ic;
    912 	struct ifnet *ifp = &ic->ic_if;
    913 	struct ieee80211_node *ni;
    914 	enum ieee80211_phymode mode;
    915 	struct ath_hal *ah = sc->sc_ah;
    916 	HAL_STATUS status;
    917 	HAL_CHANNEL hchan;
    918 	int error = 0;
    919 	ath_softc_critsect_decl(s);
    920 
    921 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n",
    922 		__func__, ifp->if_flags));
    923 
    924 #ifdef __NetBSD__
    925 	if ((error = ath_enable(sc)) != 0)
    926 		return error;
    927 #endif
    928 
    929 	ath_softc_critsect_begin(sc, s);
    930 	/*
    931 	 * Stop anything previously setup.  This is safe
    932 	 * whether this is the first time through or not.
    933 	 */
    934 	ath_stop(ifp);
    935 
    936 	/*
    937 	 * The basic interface to setting the hardware in a good
    938 	 * state is ``reset''.  On return the hardware is known to
    939 	 * be powered up and with interrupts disabled.  This must
    940 	 * be followed by initialization of the appropriate bits
    941 	 * and then setup of the interrupt mask.
    942 	 */
    943 	hchan.channel = ic->ic_ibss_chan->ic_freq;
    944 	hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan);
    945 	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) {
    946 		if_printf(ifp, "unable to reset hardware; hal status %u\n",
    947 			status);
    948 		error = -1;
    949 		goto done;
    950 	}
    951 
    952 	/*
    953 	 * Setup the hardware after reset: the key cache
    954 	 * is filled as needed and the receive engine is
    955 	 * set going.  Frame transmit is handled entirely
    956 	 * in the frame output path; there's nothing to do
    957 	 * here except setup the interrupt mask.
    958 	 */
    959 	if (ic->ic_flags & IEEE80211_F_WEPON)
    960 		ath_initkeytable(sc);
    961 	if ((error = ath_startrecv(sc)) != 0) {
    962 		if_printf(ifp, "unable to start recv logic\n");
    963 		goto done;
    964 	}
    965 
    966 	/*
    967 	 * Enable interrupts.
    968 	 */
    969 	sc->sc_imask = HAL_INT_RX | HAL_INT_TX
    970 		  | HAL_INT_RXEOL | HAL_INT_RXORN
    971 		  | HAL_INT_FATAL | HAL_INT_GLOBAL;
    972 	ath_hal_intrset(ah, sc->sc_imask);
    973 
    974 	ifp->if_flags |= IFF_RUNNING;
    975 	ic->ic_state = IEEE80211_S_INIT;
    976 
    977 	/*
    978 	 * The hardware should be ready to go now so it's safe
    979 	 * to kick the 802.11 state machine as it's likely to
    980 	 * immediately call back to us to send mgmt frames.
    981 	 */
    982 	ni = ic->ic_bss;
    983 	ni->ni_chan = ic->ic_ibss_chan;
    984 	mode = ieee80211_chan2mode(ic, ni->ni_chan);
    985 	if (mode != sc->sc_curmode)
    986 		ath_setcurmode(sc, mode);
    987 	if (ic->ic_opmode != IEEE80211_M_MONITOR)
    988 		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
    989 	else
    990 		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
    991 done:
    992 	ath_softc_critsect_end(sc, s);
    993 	return error;
    994 }
    995 
    996 static void
    997 ath_stop(struct ifnet *ifp)
    998 {
    999 	struct ieee80211com *ic = (struct ieee80211com *) ifp;
   1000 	struct ath_softc *sc = ifp->if_softc;
   1001 	struct ath_hal *ah = sc->sc_ah;
   1002 	ath_softc_critsect_decl(s);
   1003 
   1004 	DPRINTF(ATH_DEBUG_ANY, ("%s: invalid %u if_flags 0x%x\n",
   1005 		__func__, sc->sc_invalid, ifp->if_flags));
   1006 
   1007 	ath_softc_critsect_begin(sc, s);
   1008 	if (ifp->if_flags & IFF_RUNNING) {
   1009 		/*
   1010 		 * Shutdown the hardware and driver:
   1011 		 *    disable interrupts
   1012 		 *    turn off timers
   1013 		 *    clear transmit machinery
   1014 		 *    clear receive machinery
   1015 		 *    drain and release tx queues
   1016 		 *    reclaim beacon resources
   1017 		 *    reset 802.11 state machine
   1018 		 *    power down hardware
   1019 		 *
   1020 		 * Note that some of this work is not possible if the
   1021 		 * hardware is gone (invalid).
   1022 		 */
   1023 		ifp->if_flags &= ~IFF_RUNNING;
   1024 		ifp->if_timer = 0;
   1025 		if (!sc->sc_invalid)
   1026 			ath_hal_intrset(ah, 0);
   1027 		ath_draintxq(sc);
   1028 		if (!sc->sc_invalid)
   1029 			ath_stoprecv(sc);
   1030 		else
   1031 			sc->sc_rxlink = NULL;
   1032 #ifdef __FreeBSD__
   1033 		IF_DRAIN(&ifp->if_snd);
   1034 #else
   1035 		IF_PURGE(&ifp->if_snd);
   1036 #endif
   1037 		ath_beacon_free(sc);
   1038 		ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
   1039 		if (!sc->sc_invalid) {
   1040 			ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0);
   1041 		}
   1042 #ifdef __NetBSD__
   1043 		ath_disable(sc);
   1044 #endif
   1045 	}
   1046 	ath_softc_critsect_end(sc, s);
   1047 }
   1048 
   1049 /*
   1050  * Reset the hardware w/o losing operational state.  This is
   1051  * basically a more efficient way of doing ath_stop, ath_init,
   1052  * followed by state transitions to the current 802.11
   1053  * operational state.  Used to recover from errors rx overrun
   1054  * and to reset the hardware when rf gain settings must be reset.
   1055  */
   1056 static void
   1057 ath_reset(struct ath_softc *sc)
   1058 {
   1059 	struct ieee80211com *ic = &sc->sc_ic;
   1060 	struct ifnet *ifp = &ic->ic_if;
   1061 	struct ath_hal *ah = sc->sc_ah;
   1062 	struct ieee80211_channel *c;
   1063 	HAL_STATUS status;
   1064 	HAL_CHANNEL hchan;
   1065 
   1066 	/*
   1067 	 * Convert to a HAL channel description with the flags
   1068 	 * constrained to reflect the current operating mode.
   1069 	 */
   1070 	c = ic->ic_ibss_chan;
   1071 	hchan.channel = c->ic_freq;
   1072 	hchan.channelFlags = ath_chan2flags(ic, c);
   1073 
   1074 	ath_hal_intrset(ah, 0);		/* disable interrupts */
   1075 	ath_draintxq(sc);		/* stop xmit side */
   1076 	ath_stoprecv(sc);		/* stop recv side */
   1077 	/* NB: indicate channel change so we do a full reset */
   1078 	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status))
   1079 		if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
   1080 			__func__, status);
   1081 	ath_hal_intrset(ah, sc->sc_imask);
   1082 	if (ath_startrecv(sc) != 0)	/* restart recv */
   1083 		if_printf(ifp, "%s: unable to start recv logic\n", __func__);
   1084 	ath_start(ifp);			/* restart xmit */
   1085 	if (ic->ic_state == IEEE80211_S_RUN)
   1086 		ath_beacon_config(sc);	/* restart beacons */
   1087 }
   1088 
   1089 static void
   1090 ath_start(struct ifnet *ifp)
   1091 {
   1092 	struct ath_softc *sc = ifp->if_softc;
   1093 	struct ath_hal *ah = sc->sc_ah;
   1094 	struct ieee80211com *ic = &sc->sc_ic;
   1095 	struct ieee80211_node *ni;
   1096 	struct ath_buf *bf;
   1097 	struct mbuf *m;
   1098 	struct ieee80211_frame *wh;
   1099 	ath_txbuf_critsect_decl(s);
   1100 
   1101 	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
   1102 		return;
   1103 	for (;;) {
   1104 		/*
   1105 		 * Grab a TX buffer and associated resources.
   1106 		 */
   1107 		ath_txbuf_critsect_begin(sc, s);
   1108 		bf = TAILQ_FIRST(&sc->sc_txbuf);
   1109 		if (bf != NULL)
   1110 			TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
   1111 		ath_txbuf_critsect_end(sc, s);
   1112 		if (bf == NULL) {
   1113 			DPRINTF(ATH_DEBUG_ANY, ("%s: out of xmit buffers\n",
   1114 				__func__));
   1115 			sc->sc_stats.ast_tx_qstop++;
   1116 			ifp->if_flags |= IFF_OACTIVE;
   1117 			break;
   1118 		}
   1119 		/*
   1120 		 * Poll the management queue for frames; they
   1121 		 * have priority over normal data frames.
   1122 		 */
   1123 		IF_DEQUEUE(&ic->ic_mgtq, m);
   1124 		if (m == NULL) {
   1125 			/*
   1126 			 * No data frames go out unless we're associated.
   1127 			 */
   1128 			if (ic->ic_state != IEEE80211_S_RUN) {
   1129 				DPRINTF(ATH_DEBUG_ANY,
   1130 					("%s: ignore data packet, state %u\n",
   1131 					__func__, ic->ic_state));
   1132 				sc->sc_stats.ast_tx_discard++;
   1133 				ath_txbuf_critsect_begin(sc, s);
   1134 				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1135 				ath_txbuf_critsect_end(sc, s);
   1136 				break;
   1137 			}
   1138 			IF_DEQUEUE(&ifp->if_snd, m);
   1139 			if (m == NULL) {
   1140 				ath_txbuf_critsect_begin(sc, s);
   1141 				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1142 				ath_txbuf_critsect_end(sc, s);
   1143 				break;
   1144 			}
   1145 			ifp->if_opackets++;
   1146 
   1147 #ifdef __NetBSD__
   1148 #if NBPFILTER > 0
   1149 			if (ifp->if_bpf)
   1150 				bpf_mtap(ifp->if_bpf, m);
   1151 #endif
   1152 #endif
   1153 #ifdef __FreeBSD__
   1154 			BPF_MTAP(ifp, m);
   1155 #endif
   1156 			/*
   1157 			 * Encapsulate the packet in prep for transmission.
   1158 			 */
   1159 			m = ieee80211_encap(ifp, m, &ni);
   1160 			if (m == NULL) {
   1161 				DPRINTF(ATH_DEBUG_ANY,
   1162 					("%s: encapsulation failure\n",
   1163 					__func__));
   1164 				sc->sc_stats.ast_tx_encap++;
   1165 				goto bad;
   1166 			}
   1167 			wh = mtod(m, struct ieee80211_frame *);
   1168 			if (ic->ic_flags & IEEE80211_F_WEPON)
   1169 				wh->i_fc[1] |= IEEE80211_FC1_WEP;
   1170 		} else {
   1171 			/*
   1172 			 * Hack!  The referenced node pointer is in the
   1173 			 * rcvif field of the packet header.  This is
   1174 			 * placed there by ieee80211_mgmt_output because
   1175 			 * we need to hold the reference with the frame
   1176 			 * and there's no other way (other than packet
   1177 			 * tags which we consider too expensive to use)
   1178 			 * to pass it along.
   1179 			 */
   1180 			ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
   1181 			m->m_pkthdr.rcvif = NULL;
   1182 
   1183 			wh = mtod(m, struct ieee80211_frame *);
   1184 			if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
   1185 			    IEEE80211_FC0_SUBTYPE_PROBE_RESP) {
   1186 				/* fill time stamp */
   1187 				u_int64_t tsf;
   1188 				u_int32_t *tstamp;
   1189 
   1190 				tsf = ath_hal_gettsf64(ah);
   1191 				/* XXX: adjust 100us delay to xmit */
   1192 				tsf += 100;
   1193 				tstamp = (u_int32_t *)&wh[1];
   1194 				tstamp[0] = htole32(tsf & 0xffffffff);
   1195 				tstamp[1] = htole32(tsf >> 32);
   1196 			}
   1197 			sc->sc_stats.ast_tx_mgmt++;
   1198 		}
   1199 
   1200 		if (ath_tx_start(sc, ni, bf, m)) {
   1201 	bad:
   1202 			ath_txbuf_critsect_begin(sc, s);
   1203 			TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1204 			ath_txbuf_critsect_end(sc, s);
   1205 			ifp->if_oerrors++;
   1206 			if (ni && ni != ic->ic_bss)
   1207 				ieee80211_free_node(ic, ni);
   1208 			continue;
   1209 		}
   1210 
   1211 		sc->sc_tx_timer = 5;
   1212 		ifp->if_timer = 1;
   1213 	}
   1214 }
   1215 
   1216 static int
   1217 ath_media_change(struct ifnet *ifp)
   1218 {
   1219 	int error;
   1220 
   1221 	error = ieee80211_media_change(ifp);
   1222 	if (error == ENETRESET) {
   1223 		if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
   1224 		    (IFF_RUNNING|IFF_UP))
   1225 			ath_init(ifp);		/* XXX lose error */
   1226 		error = 0;
   1227 	}
   1228 	return error;
   1229 }
   1230 
   1231 static void
   1232 ath_watchdog(struct ifnet *ifp)
   1233 {
   1234 	struct ath_softc *sc = ifp->if_softc;
   1235 	struct ieee80211com *ic = &sc->sc_ic;
   1236 
   1237 	ifp->if_timer = 0;
   1238 	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
   1239 		return;
   1240 	if (sc->sc_tx_timer) {
   1241 		if (--sc->sc_tx_timer == 0) {
   1242 			if_printf(ifp, "device timeout\n");
   1243 #ifdef AR_DEBUG
   1244 			if (ath_debug & ATH_DEBUG_WATCHDOG)
   1245 				ath_hal_dumpstate(sc->sc_ah);
   1246 #endif /* AR_DEBUG */
   1247 			ath_reset(sc);
   1248 			ifp->if_oerrors++;
   1249 			sc->sc_stats.ast_watchdog++;
   1250 			return;
   1251 		}
   1252 		ifp->if_timer = 1;
   1253 	}
   1254 	if (ic->ic_fixed_rate == -1) {
   1255 		/*
   1256 		 * Run the rate control algorithm if we're not
   1257 		 * locked at a fixed rate.
   1258 		 */
   1259 		if (ic->ic_opmode == IEEE80211_M_STA)
   1260 			ath_rate_ctl(sc, ic->ic_bss);
   1261 		else
   1262 			ieee80211_iterate_nodes(ic, ath_rate_ctl, sc);
   1263 	}
   1264 	ieee80211_watchdog(ifp);
   1265 }
   1266 
   1267 static int
   1268 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
   1269 {
   1270 	struct ath_softc *sc = ifp->if_softc;
   1271 	struct ifreq *ifr = (struct ifreq *)data;
   1272 	int error = 0;
   1273 	ath_softc_critsect_decl(s);
   1274 
   1275 	ath_softc_critsect_begin(sc, s);
   1276 	switch (cmd) {
   1277 	case SIOCSIFFLAGS:
   1278 		if (ifp->if_flags & IFF_UP) {
   1279 			if (ifp->if_flags & IFF_RUNNING) {
   1280 				/*
   1281 				 * To avoid rescanning another access point,
   1282 				 * do not call ath_init() here.  Instead,
   1283 				 * only reflect promisc mode settings.
   1284 				 */
   1285 				ath_mode_init(sc);
   1286 			} else {
   1287 				/*
   1288 				 * Beware of being called during detach to
   1289 				 * reset promiscuous mode.  In that case we
   1290 				 * will still be marked UP but not RUNNING.
   1291 				 * However trying to re-init the interface
   1292 				 * is the wrong thing to do as we've already
   1293 				 * torn down much of our state.  There's
   1294 				 * probably a better way to deal with this.
   1295 				 */
   1296 				if (!sc->sc_invalid)
   1297 					ath_init(ifp);	/* XXX lose error */
   1298 			}
   1299 		} else
   1300 			ath_stop(ifp);
   1301 		break;
   1302 	case SIOCADDMULTI:
   1303 	case SIOCDELMULTI:
   1304 #ifdef __FreeBSD__
   1305 		/*
   1306 		 * The upper layer has already installed/removed
   1307 		 * the multicast address(es), just recalculate the
   1308 		 * multicast filter for the card.
   1309 		 */
   1310 		if (ifp->if_flags & IFF_RUNNING)
   1311 			ath_mode_init(sc);
   1312 #endif
   1313 #ifdef __NetBSD__
   1314 		error = (cmd == SIOCADDMULTI) ?
   1315 		    ether_addmulti(ifr, &sc->sc_ic.ic_ec) :
   1316 		    ether_delmulti(ifr, &sc->sc_ic.ic_ec);
   1317 		if (error == ENETRESET) {
   1318 			if (ifp->if_flags & IFF_RUNNING)
   1319 				ath_mode_init(sc);
   1320 			error = 0;
   1321 		}
   1322 #endif
   1323 		break;
   1324 	case SIOCGATHSTATS:
   1325 		error = copyout(&sc->sc_stats,
   1326 				ifr->ifr_data, sizeof (sc->sc_stats));
   1327 		break;
   1328 	case SIOCGATHDIAG: {
   1329 		struct ath_diag *ad = (struct ath_diag *)data;
   1330 		struct ath_hal *ah = sc->sc_ah;
   1331 		void *data;
   1332 		u_int size;
   1333 
   1334 		if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) {
   1335 			if (size < ad->ad_size)
   1336 				ad->ad_size = size;
   1337 			if (data)
   1338 				error = copyout(data, ad->ad_data, ad->ad_size);
   1339 		} else
   1340 			error = EINVAL;
   1341 		break;
   1342 	}
   1343 	default:
   1344 		error = ieee80211_ioctl(ifp, cmd, data);
   1345 		if (error == ENETRESET) {
   1346 			if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
   1347 			    (IFF_RUNNING|IFF_UP))
   1348 				ath_init(ifp);		/* XXX lose error */
   1349 			error = 0;
   1350 		}
   1351 		break;
   1352 	}
   1353 	ath_softc_critsect_end(sc, s);
   1354 	return error;
   1355 }
   1356 
   1357 /*
   1358  * Fill the hardware key cache with key entries.
   1359  */
   1360 static void
   1361 ath_initkeytable(struct ath_softc *sc)
   1362 {
   1363 	struct ieee80211com *ic = &sc->sc_ic;
   1364 	struct ath_hal *ah = sc->sc_ah;
   1365 	int i;
   1366 
   1367 	for (i = 0; i < IEEE80211_WEP_NKID; i++) {
   1368 		struct ieee80211_wepkey *k = &ic->ic_nw_keys[i];
   1369 		if (k->wk_len == 0)
   1370 			ath_hal_keyreset(ah, i);
   1371 		else
   1372 			/* XXX return value */
   1373 			/* NB: this uses HAL_KEYVAL == ieee80211_wepkey */
   1374 			ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k);
   1375 	}
   1376 }
   1377 
   1378 static void
   1379 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2])
   1380 {
   1381 	u_int32_t val;
   1382 	u_int8_t pos;
   1383 
   1384 	val = LE_READ_4(dl + 0);
   1385 	pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
   1386 	val = LE_READ_4(dl + 3);
   1387 	pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
   1388 	pos &= 0x3f;
   1389 	(*mfilt)[pos / 32] |= (1 << (pos % 32));
   1390 }
   1391 
   1392 #ifdef __FreeBSD__
   1393 static void
   1394 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
   1395 {
   1396 	struct ieee80211com *ic = &sc->sc_ic;
   1397 	struct ifnet *ifp = &ic->ic_if;
   1398 	struct ifmultiaddr *ifma;
   1399 
   1400 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
   1401 		caddr_t dl;
   1402 
   1403 		/* calculate XOR of eight 6bit values */
   1404 		dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
   1405 		ath_mcastfilter_accum(dl, &mfilt);
   1406 	}
   1407 }
   1408 #else
   1409 static void
   1410 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
   1411 {
   1412 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1413 	struct ether_multi *enm;
   1414 	struct ether_multistep estep;
   1415 
   1416 	ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm);
   1417 	while (enm != NULL) {
   1418 		/* XXX Punt on ranges. */
   1419 		if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) {
   1420 			(*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0);
   1421 			ifp->if_flags |= IFF_ALLMULTI;
   1422 			return;
   1423 		}
   1424 		ath_mcastfilter_accum(enm->enm_addrlo, mfilt);
   1425 		ETHER_NEXT_MULTI(estep, enm);
   1426 	}
   1427 	ifp->if_flags &= ~IFF_ALLMULTI;
   1428 }
   1429 #endif
   1430 
   1431 /*
   1432  * Calculate the receive filter according to the
   1433  * operating mode and state:
   1434  *
   1435  * o always accept unicast, broadcast, and multicast traffic
   1436  * o maintain current state of phy error reception
   1437  * o probe request frames are accepted only when operating in
   1438  *   hostap, adhoc, or monitor modes
   1439  * o enable promiscuous mode according to the interface state
   1440  * o accept beacons:
   1441  *   - when operating in adhoc mode so the 802.11 layer creates
   1442  *     node table entries for peers,
   1443  *   - when operating in station mode for collecting rssi data when
   1444  *     the station is otherwise quiet, or
   1445  *   - when scanning
   1446  */
   1447 static u_int32_t
   1448 ath_calcrxfilter(struct ath_softc *sc)
   1449 {
   1450 	struct ieee80211com *ic = &sc->sc_ic;
   1451 	struct ath_hal *ah = sc->sc_ah;
   1452 	struct ifnet *ifp = &ic->ic_if;
   1453 	u_int32_t rfilt;
   1454 
   1455 	rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
   1456 	      | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
   1457 	if (ic->ic_opmode != IEEE80211_M_STA)
   1458 		rfilt |= HAL_RX_FILTER_PROBEREQ;
   1459 	if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
   1460 	    (ifp->if_flags & IFF_PROMISC))
   1461 		rfilt |= HAL_RX_FILTER_PROM;
   1462 	if (ic->ic_opmode == IEEE80211_M_STA ||
   1463 	    ic->ic_opmode == IEEE80211_M_IBSS ||
   1464 	    ic->ic_state == IEEE80211_S_SCAN)
   1465 		rfilt |= HAL_RX_FILTER_BEACON;
   1466 	return rfilt;
   1467 }
   1468 
   1469 static void
   1470 ath_mode_init(struct ath_softc *sc)
   1471 {
   1472 #ifdef __FreeBSD__
   1473 	struct ieee80211com *ic = &sc->sc_ic;
   1474 #endif
   1475 	struct ath_hal *ah = sc->sc_ah;
   1476 	u_int32_t rfilt, mfilt[2];
   1477 
   1478 	/* configure rx filter */
   1479 	rfilt = ath_calcrxfilter(sc);
   1480 	ath_hal_setrxfilter(ah, rfilt);
   1481 
   1482 	/* configure operational mode */
   1483 	ath_hal_setopmode(ah);
   1484 
   1485 	/* calculate and install multicast filter */
   1486 #ifdef __FreeBSD__
   1487 	if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) {
   1488 		mfilt[0] = mfilt[1] = 0;
   1489 		ath_mcastfilter_compute(sc, &mfilt);
   1490 	} else {
   1491 		mfilt[0] = mfilt[1] = ~0;
   1492 	}
   1493 #endif
   1494 #ifdef __NetBSD__
   1495 	mfilt[0] = mfilt[1] = 0;
   1496 	ath_mcastfilter_compute(sc, &mfilt);
   1497 #endif
   1498 	ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
   1499 	DPRINTF(ATH_DEBUG_MODE, ("%s: RX filter 0x%x, MC filter %08x:%08x\n",
   1500 		__func__, rfilt, mfilt[0], mfilt[1]));
   1501 }
   1502 
   1503 #ifdef __FreeBSD__
   1504 static void
   1505 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error)
   1506 {
   1507 	struct ath_buf *bf = arg;
   1508 
   1509 	KASSERT(nseg <= ATH_MAX_SCATTER,
   1510 		("ath_mbuf_load_cb: too many DMA segments %u", nseg));
   1511 	bf->bf_mapsize = mapsize;
   1512 	bf->bf_nseg = nseg;
   1513 	bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0]));
   1514 }
   1515 #endif /* __FreeBSD__ */
   1516 
   1517 static struct mbuf *
   1518 ath_getmbuf(int flags, int type, u_int pktlen)
   1519 {
   1520 	struct mbuf *m;
   1521 
   1522 	KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen));
   1523 #ifdef __FreeBSD__
   1524 	if (pktlen <= MHLEN)
   1525 		MGETHDR(m, flags, type);
   1526 	else
   1527 		m = m_getcl(flags, type, M_PKTHDR);
   1528 #else
   1529 	MGETHDR(m, flags, type);
   1530 	if (m != NULL && pktlen > MHLEN)
   1531 		MCLGET(m, flags);
   1532 #endif
   1533 	return m;
   1534 }
   1535 
   1536 static int
   1537 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
   1538 {
   1539 	struct ieee80211com *ic = &sc->sc_ic;
   1540 	struct ifnet *ifp = &ic->ic_if;
   1541 	struct ath_hal *ah = sc->sc_ah;
   1542 	struct ieee80211_frame *wh;
   1543 	struct ath_buf *bf;
   1544 	struct ath_desc *ds;
   1545 	struct mbuf *m;
   1546 	int error, pktlen;
   1547 	u_int8_t *frm, rate;
   1548 	u_int16_t capinfo;
   1549 	struct ieee80211_rateset *rs;
   1550 	const HAL_RATE_TABLE *rt;
   1551 
   1552 	bf = sc->sc_bcbuf;
   1553 	if (bf->bf_m != NULL) {
   1554 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1555 		m_freem(bf->bf_m);
   1556 		bf->bf_m = NULL;
   1557 		bf->bf_node = NULL;
   1558 	}
   1559 	/*
   1560 	 * NB: the beacon data buffer must be 32-bit aligned;
   1561 	 * we assume the mbuf routines will return us something
   1562 	 * with this alignment (perhaps should assert).
   1563 	 */
   1564 	rs = &ni->ni_rates;
   1565 	pktlen = sizeof (struct ieee80211_frame)
   1566 	       + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6;
   1567 	if (rs->rs_nrates > IEEE80211_RATE_SIZE)
   1568 		pktlen += 2;
   1569 	m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen);
   1570 	if (m == NULL) {
   1571 		DPRINTF(ATH_DEBUG_BEACON,
   1572 			("%s: cannot get mbuf/cluster; size %u\n",
   1573 			__func__, pktlen));
   1574 		sc->sc_stats.ast_be_nombuf++;
   1575 		return ENOMEM;
   1576 	}
   1577 
   1578 	wh = mtod(m, struct ieee80211_frame *);
   1579 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
   1580 	    IEEE80211_FC0_SUBTYPE_BEACON;
   1581 	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
   1582 	*(u_int16_t *)wh->i_dur = 0;
   1583 	memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
   1584 	memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
   1585 	memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
   1586 	*(u_int16_t *)wh->i_seq = 0;
   1587 
   1588 	/*
   1589 	 * beacon frame format
   1590 	 *	[8] time stamp
   1591 	 *	[2] beacon interval
   1592 	 *	[2] cabability information
   1593 	 *	[tlv] ssid
   1594 	 *	[tlv] supported rates
   1595 	 *	[tlv] parameter set (IBSS)
   1596 	 *	[tlv] extended supported rates
   1597 	 */
   1598 	frm = (u_int8_t *)&wh[1];
   1599 	memset(frm, 0, 8);	/* timestamp is set by hardware */
   1600 	frm += 8;
   1601 	*(u_int16_t *)frm = htole16(ni->ni_intval);
   1602 	frm += 2;
   1603 	if (ic->ic_opmode == IEEE80211_M_IBSS)
   1604 		capinfo = IEEE80211_CAPINFO_IBSS;
   1605 	else
   1606 		capinfo = IEEE80211_CAPINFO_ESS;
   1607 	if (ic->ic_flags & IEEE80211_F_WEPON)
   1608 		capinfo |= IEEE80211_CAPINFO_PRIVACY;
   1609 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
   1610 	    IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
   1611 		capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
   1612 	if (ic->ic_flags & IEEE80211_F_SHSLOT)
   1613 		capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
   1614 	*(u_int16_t *)frm = htole16(capinfo);
   1615 	frm += 2;
   1616 	*frm++ = IEEE80211_ELEMID_SSID;
   1617 	*frm++ = ni->ni_esslen;
   1618 	memcpy(frm, ni->ni_essid, ni->ni_esslen);
   1619 	frm += ni->ni_esslen;
   1620 	frm = ieee80211_add_rates(frm, rs);
   1621 	*frm++ = IEEE80211_ELEMID_DSPARMS;
   1622 	*frm++ = 1;
   1623 	*frm++ = ieee80211_chan2ieee(ic, ni->ni_chan);
   1624 	if (ic->ic_opmode == IEEE80211_M_IBSS) {
   1625 		*frm++ = IEEE80211_ELEMID_IBSSPARMS;
   1626 		*frm++ = 2;
   1627 		*frm++ = 0; *frm++ = 0;		/* TODO: ATIM window */
   1628 	} else {
   1629 		/* TODO: TIM */
   1630 		*frm++ = IEEE80211_ELEMID_TIM;
   1631 		*frm++ = 4;	/* length */
   1632 		*frm++ = 0;	/* DTIM count */
   1633 		*frm++ = 1;	/* DTIM period */
   1634 		*frm++ = 0;	/* bitmap control */
   1635 		*frm++ = 0;	/* Partial Virtual Bitmap (variable length) */
   1636 	}
   1637 	frm = ieee80211_add_xrates(frm, rs);
   1638 	m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
   1639 	KASSERT(m->m_pkthdr.len <= pktlen,
   1640 		("beacon bigger than expected, len %u calculated %u",
   1641 		m->m_pkthdr.len, pktlen));
   1642 
   1643 	DPRINTF(ATH_DEBUG_BEACON, ("%s: m %p len %u\n", __func__, m, m->m_len));
   1644 	error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT);
   1645 	if (error != 0) {
   1646 		m_freem(m);
   1647 		return error;
   1648 	}
   1649 	KASSERT(bf->bf_nseg == 1,
   1650 		("%s: multi-segment packet; nseg %u", __func__, bf->bf_nseg));
   1651 	bf->bf_m = m;
   1652 
   1653 	/* setup descriptors */
   1654 	ds = bf->bf_desc;
   1655 
   1656 	ds->ds_link = 0;
   1657 	ds->ds_data = bf->bf_segs[0].ds_addr;
   1658 
   1659 	DPRINTF(ATH_DEBUG_ANY, ("%s: segaddr %p seglen %u\n", __func__,
   1660 	    (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len));
   1661 
   1662 	/*
   1663 	 * Calculate rate code.
   1664 	 * XXX everything at min xmit rate
   1665 	 */
   1666 	rt = sc->sc_currates;
   1667 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
   1668 	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
   1669 		rate = rt->info[0].rateCode | rt->info[0].shortPreamble;
   1670 	else
   1671 		rate = rt->info[0].rateCode;
   1672 	if (!ath_hal_setuptxdesc(ah, ds
   1673 		, m->m_pkthdr.len + IEEE80211_CRC_LEN	/* packet length */
   1674 		, sizeof(struct ieee80211_frame)	/* header length */
   1675 		, HAL_PKT_TYPE_BEACON		/* Atheros packet type */
   1676 		, 0x20				/* txpower XXX */
   1677 		, rate, 1			/* series 0 rate/tries */
   1678 		, HAL_TXKEYIX_INVALID		/* no encryption */
   1679 		, 0				/* antenna mode */
   1680 		, HAL_TXDESC_NOACK		/* no ack for beacons */
   1681 		, 0				/* rts/cts rate */
   1682 		, 0				/* rts/cts duration */
   1683 	)) {
   1684 		printf("%s: ath_hal_setuptxdesc failed\n", __func__);
   1685 		return -1;
   1686 	}
   1687 	/* NB: beacon's BufLen must be a multiple of 4 bytes */
   1688 	/* XXX verify mbuf data area covers this roundup */
   1689 	if (!ath_hal_filltxdesc(ah, ds
   1690 		, roundup(bf->bf_segs[0].ds_len, 4)	/* buffer length */
   1691 		, AH_TRUE				/* first segment */
   1692 		, AH_TRUE				/* last segment */
   1693 	)) {
   1694 		printf("%s: ath_hal_filltxdesc failed\n", __func__);
   1695 		return -1;
   1696 	}
   1697 
   1698 	/* XXX it is not appropriate to bus_dmamap_sync? -dcy */
   1699 
   1700 	return 0;
   1701 }
   1702 
   1703 static void
   1704 ath_beacon_proc(void *arg, int pending)
   1705 {
   1706 	struct ath_softc *sc = arg;
   1707 	struct ieee80211com *ic = &sc->sc_ic;
   1708 	struct ath_buf *bf = sc->sc_bcbuf;
   1709 	struct ath_hal *ah = sc->sc_ah;
   1710 
   1711 	DPRINTF(ATH_DEBUG_BEACON_PROC, ("%s: pending %u\n", __func__, pending));
   1712 	if (ic->ic_opmode == IEEE80211_M_STA ||
   1713 	    bf == NULL || bf->bf_m == NULL) {
   1714 		DPRINTF(ATH_DEBUG_ANY, ("%s: ic_flags=%x bf=%p bf_m=%p\n",
   1715 			__func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL));
   1716 		return;
   1717 	}
   1718 	/* TODO: update beacon to reflect PS poll state */
   1719 	if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
   1720 		DPRINTF(ATH_DEBUG_ANY, ("%s: beacon queue %u did not stop?\n",
   1721 			__func__, sc->sc_bhalq));
   1722 		/* NB: the HAL still stops DMA, so proceed */
   1723 	}
   1724 	ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
   1725 
   1726 	ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
   1727 	ath_hal_txstart(ah, sc->sc_bhalq);
   1728 	DPRINTF(ATH_DEBUG_BEACON_PROC,
   1729 		("%s: TXDP%u = %p (%p)\n", __func__,
   1730 		sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
   1731 }
   1732 
   1733 static void
   1734 ath_beacon_free(struct ath_softc *sc)
   1735 {
   1736 	struct ath_buf *bf = sc->sc_bcbuf;
   1737 
   1738 	if (bf->bf_m != NULL) {
   1739 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1740 		m_freem(bf->bf_m);
   1741 		bf->bf_m = NULL;
   1742 		bf->bf_node = NULL;
   1743 	}
   1744 }
   1745 
   1746 /*
   1747  * Configure the beacon and sleep timers.
   1748  *
   1749  * When operating as an AP this resets the TSF and sets
   1750  * up the hardware to notify us when we need to issue beacons.
   1751  *
   1752  * When operating in station mode this sets up the beacon
   1753  * timers according to the timestamp of the last received
   1754  * beacon and the current TSF, configures PCF and DTIM
   1755  * handling, programs the sleep registers so the hardware
   1756  * will wakeup in time to receive beacons, and configures
   1757  * the beacon miss handling so we'll receive a BMISS
   1758  * interrupt when we stop seeing beacons from the AP
   1759  * we've associated with.
   1760  */
   1761 static void
   1762 ath_beacon_config(struct ath_softc *sc)
   1763 {
   1764 	struct ath_hal *ah = sc->sc_ah;
   1765 	struct ieee80211com *ic = &sc->sc_ic;
   1766 	struct ieee80211_node *ni = ic->ic_bss;
   1767 	u_int32_t nexttbtt;
   1768 
   1769 	nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) |
   1770 	    (LE_READ_4(ni->ni_tstamp) >> 10);
   1771 	DPRINTF(ATH_DEBUG_BEACON, ("%s: nexttbtt=%u\n", __func__, nexttbtt));
   1772 	nexttbtt += ni->ni_intval;
   1773 	if (ic->ic_opmode == IEEE80211_M_STA) {
   1774 		HAL_BEACON_STATE bs;
   1775 		u_int32_t bmisstime;
   1776 
   1777 		/* NB: no PCF support right now */
   1778 		memset(&bs, 0, sizeof(bs));
   1779 		bs.bs_intval = ni->ni_intval;
   1780 		bs.bs_nexttbtt = nexttbtt;
   1781 		bs.bs_dtimperiod = bs.bs_intval;
   1782 		bs.bs_nextdtim = nexttbtt;
   1783 		/*
   1784 		 * Calculate the number of consecutive beacons to miss
   1785 		 * before taking a BMISS interrupt.  The configuration
   1786 		 * is specified in ms, so we need to convert that to
   1787 		 * TU's and then calculate based on the beacon interval.
   1788 		 * Note that we clamp the result to at most 10 beacons.
   1789 		 */
   1790 		bmisstime = (ic->ic_bmisstimeout * 1000) / 1024;
   1791 		bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval);
   1792 		if (bs.bs_bmissthreshold > 10)
   1793 			bs.bs_bmissthreshold = 10;
   1794 		else if (bs.bs_bmissthreshold <= 0)
   1795 			bs.bs_bmissthreshold = 1;
   1796 
   1797 		/*
   1798 		 * Calculate sleep duration.  The configuration is
   1799 		 * given in ms.  We insure a multiple of the beacon
   1800 		 * period is used.  Also, if the sleep duration is
   1801 		 * greater than the DTIM period then it makes senses
   1802 		 * to make it a multiple of that.
   1803 		 *
   1804 		 * XXX fixed at 100ms
   1805 		 */
   1806 		bs.bs_sleepduration =
   1807 			roundup((100 * 1000) / 1024, bs.bs_intval);
   1808 		if (bs.bs_sleepduration > bs.bs_dtimperiod)
   1809 			bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
   1810 
   1811 		DPRINTF(ATH_DEBUG_BEACON,
   1812 			("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n"
   1813 			, __func__
   1814 			, bs.bs_intval
   1815 			, bs.bs_nexttbtt
   1816 			, bs.bs_dtimperiod
   1817 			, bs.bs_nextdtim
   1818 			, bs.bs_bmissthreshold
   1819 			, bs.bs_sleepduration
   1820 		));
   1821 		ath_hal_intrset(ah, 0);
   1822 		/*
   1823 		 * Reset our tsf so the hardware will update the
   1824 		 * tsf register to reflect timestamps found in
   1825 		 * received beacons.
   1826 		 */
   1827 		ath_hal_resettsf(ah);
   1828 		ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0);
   1829 		sc->sc_imask |= HAL_INT_BMISS;
   1830 		ath_hal_intrset(ah, sc->sc_imask);
   1831 	} else {
   1832 		DPRINTF(ATH_DEBUG_BEACON, ("%s: intval %u nexttbtt %u\n",
   1833 			__func__, ni->ni_intval, nexttbtt));
   1834 		ath_hal_intrset(ah, 0);
   1835 		ath_hal_beaconinit(ah, nexttbtt, ni->ni_intval);
   1836 		if (ic->ic_opmode != IEEE80211_M_MONITOR)
   1837 			sc->sc_imask |= HAL_INT_SWBA;	/* beacon prepare */
   1838 		ath_hal_intrset(ah, sc->sc_imask);
   1839 	}
   1840 }
   1841 
   1842 #ifdef __FreeBSD__
   1843 static void
   1844 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
   1845 {
   1846 	bus_addr_t *paddr = (bus_addr_t*) arg;
   1847 	*paddr = segs->ds_addr;
   1848 }
   1849 #endif
   1850 
   1851 #ifdef __FreeBSD__
   1852 static int
   1853 ath_desc_alloc(struct ath_softc *sc)
   1854 {
   1855 	int i, bsize, error;
   1856 	struct ath_desc *ds;
   1857 	struct ath_buf *bf;
   1858 
   1859 	/* allocate descriptors */
   1860 	sc->sc_desc_len = sizeof(struct ath_desc) *
   1861 				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
   1862 	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap);
   1863 	if (error != 0)
   1864 		return error;
   1865 
   1866 	error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc,
   1867 				 BUS_DMA_NOWAIT, &sc->sc_ddmamap);
   1868 
   1869 	if (error != 0)
   1870 		goto fail0;
   1871 
   1872 	error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap,
   1873 				sc->sc_desc, sc->sc_desc_len,
   1874 				ath_load_cb, &sc->sc_desc_paddr,
   1875 				BUS_DMA_NOWAIT);
   1876 	if (error != 0)
   1877 		goto fail1;
   1878 
   1879 	ds = sc->sc_desc;
   1880 	DPRINTF(ATH_DEBUG_ANY, ("%s: DMA map: %p (%lu) -> %p (%lu)\n",
   1881 	    __func__, ds, (u_long) sc->sc_desc_len, (caddr_t) sc->sc_desc_paddr,
   1882 	    /*XXX*/ (u_long) sc->sc_desc_len));
   1883 
   1884 	/* allocate buffers */
   1885 	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
   1886 	bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
   1887 	if (bf == NULL) {
   1888 		printf("%s: unable to allocate Tx/Rx buffers\n",
   1889 		    sc->sc_dev.dv_xname);
   1890 		error = -1;
   1891 		goto fail2;
   1892 	}
   1893 	sc->sc_bufptr = bf;
   1894 
   1895 	TAILQ_INIT(&sc->sc_rxbuf);
   1896 	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
   1897 		bf->bf_desc = ds;
   1898 		bf->bf_daddr = sc->sc_desc_paddr +
   1899 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1900 		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
   1901 					  &bf->bf_dmamap);
   1902 		if (error != 0)
   1903 			break;
   1904 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   1905 	}
   1906 
   1907 	TAILQ_INIT(&sc->sc_txbuf);
   1908 	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
   1909 		bf->bf_desc = ds;
   1910 		bf->bf_daddr = sc->sc_desc_paddr +
   1911 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1912 		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
   1913 					  &bf->bf_dmamap);
   1914 		if (error != 0)
   1915 			break;
   1916 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1917 	}
   1918 	TAILQ_INIT(&sc->sc_txq);
   1919 
   1920 	/* beacon buffer */
   1921 	bf->bf_desc = ds;
   1922 	bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1923 	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap);
   1924 	if (error != 0)
   1925 		return error;
   1926 	sc->sc_bcbuf = bf;
   1927 	return 0;
   1928 
   1929 fail2:
   1930 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   1931 fail1:
   1932 	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
   1933 fail0:
   1934 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   1935 	sc->sc_ddmamap = NULL;
   1936 	return error;
   1937 }
   1938 #else
   1939 static int
   1940 ath_desc_alloc(struct ath_softc *sc)
   1941 {
   1942 	int i, bsize, error = -1;
   1943 	struct ath_desc *ds;
   1944 	struct ath_buf *bf;
   1945 
   1946 	/* allocate descriptors */
   1947 	sc->sc_desc_len = sizeof(struct ath_desc) *
   1948 				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
   1949 	if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE,
   1950 	    0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) {
   1951 		printf("%s: unable to allocate control data, error = %d\n",
   1952 		    sc->sc_dev.dv_xname, error);
   1953 		goto fail0;
   1954 	}
   1955 
   1956 	if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg,
   1957 	    sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) {
   1958 		printf("%s: unable to map control data, error = %d\n",
   1959 		    sc->sc_dev.dv_xname, error);
   1960 		goto fail1;
   1961 	}
   1962 
   1963 	if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1,
   1964 	    sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) {
   1965 		printf("%s: unable to create control data DMA map, "
   1966 		    "error = %d\n", sc->sc_dev.dv_xname, error);
   1967 		goto fail2;
   1968 	}
   1969 
   1970 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc,
   1971 	    sc->sc_desc_len, NULL, 0)) != 0) {
   1972 		printf("%s: unable to load control data DMA map, error = %d\n",
   1973 		    sc->sc_dev.dv_xname, error);
   1974 		goto fail3;
   1975 	}
   1976 
   1977 	ds = sc->sc_desc;
   1978 	sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr;
   1979 
   1980 	DPRINTF(ATH_DEBUG_XMIT_DESC|ATH_DEBUG_RECV_DESC,
   1981 	    ("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n",
   1982 	    ds, (u_long)sc->sc_desc_len,
   1983 	    (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
   1984 
   1985 	/* allocate buffers */
   1986 	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
   1987 	bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
   1988 	if (bf == NULL) {
   1989 		printf("%s: unable to allocate Tx/Rx buffers\n",
   1990 		    sc->sc_dev.dv_xname);
   1991 		error = ENOMEM;
   1992 		goto fail3;
   1993 	}
   1994 	sc->sc_bufptr = bf;
   1995 
   1996 	TAILQ_INIT(&sc->sc_rxbuf);
   1997 	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
   1998 		bf->bf_desc = ds;
   1999 		bf->bf_daddr = sc->sc_desc_paddr +
   2000 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   2001 		if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
   2002 		    MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
   2003 			printf("%s: unable to create Rx dmamap, error = %d\n",
   2004 			    sc->sc_dev.dv_xname, error);
   2005 			goto fail4;
   2006 		}
   2007 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   2008 	}
   2009 
   2010 	TAILQ_INIT(&sc->sc_txbuf);
   2011 	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
   2012 		bf->bf_desc = ds;
   2013 		bf->bf_daddr = sc->sc_desc_paddr +
   2014 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   2015 		if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
   2016 		    ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
   2017 			printf("%s: unable to create Tx dmamap, error = %d\n",
   2018 			    sc->sc_dev.dv_xname, error);
   2019 			goto fail5;
   2020 		}
   2021 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2022 	}
   2023 	TAILQ_INIT(&sc->sc_txq);
   2024 
   2025 	/* beacon buffer */
   2026 	bf->bf_desc = ds;
   2027 	bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
   2028 	if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
   2029 	    &bf->bf_dmamap)) != 0) {
   2030 		printf("%s: unable to create beacon dmamap, error = %d\n",
   2031 		    sc->sc_dev.dv_xname, error);
   2032 		goto fail5;
   2033 	}
   2034 	sc->sc_bcbuf = bf;
   2035 	return 0;
   2036 
   2037 fail5:
   2038 	for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) {
   2039 		if (sc->sc_bufptr[i].bf_dmamap == NULL)
   2040 			continue;
   2041 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
   2042 	}
   2043 fail4:
   2044 	for (i = 0; i < ATH_RXBUF; i++) {
   2045 		if (sc->sc_bufptr[i].bf_dmamap == NULL)
   2046 			continue;
   2047 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
   2048 	}
   2049 fail3:
   2050 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   2051 fail2:
   2052 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   2053 	sc->sc_ddmamap = NULL;
   2054 fail1:
   2055 	bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len);
   2056 fail0:
   2057 	bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
   2058 	return error;
   2059 }
   2060 #endif
   2061 
   2062 static void
   2063 ath_desc_free(struct ath_softc *sc)
   2064 {
   2065 	struct ath_buf *bf;
   2066 
   2067 #ifdef __FreeBSD__
   2068 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   2069 	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
   2070 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   2071 #else
   2072 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   2073 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   2074 	bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
   2075 #endif
   2076 
   2077 	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
   2078 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2079 		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   2080 		m_freem(bf->bf_m);
   2081 	}
   2082 	TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list)
   2083 		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   2084 	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   2085 		if (bf->bf_m) {
   2086 			bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2087 			bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   2088 			m_freem(bf->bf_m);
   2089 			bf->bf_m = NULL;
   2090 		}
   2091 	}
   2092 	if (sc->sc_bcbuf != NULL) {
   2093 		bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
   2094 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
   2095 		sc->sc_bcbuf = NULL;
   2096 	}
   2097 
   2098 	TAILQ_INIT(&sc->sc_rxbuf);
   2099 	TAILQ_INIT(&sc->sc_txbuf);
   2100 	TAILQ_INIT(&sc->sc_txq);
   2101 	free(sc->sc_bufptr, M_DEVBUF);
   2102 	sc->sc_bufptr = NULL;
   2103 }
   2104 
   2105 static struct ieee80211_node *
   2106 ath_node_alloc(struct ieee80211com *ic)
   2107 {
   2108 	struct ath_node *an =
   2109 		malloc(sizeof(struct ath_node), M_80211_NODE, M_NOWAIT|M_ZERO);
   2110 	if (an) {
   2111 		int i;
   2112 		for (i = 0; i < ATH_RHIST_SIZE; i++)
   2113 			an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME;
   2114 		an->an_rx_hist_next = ATH_RHIST_SIZE-1;
   2115 		return &an->an_node;
   2116 	} else
   2117 		return NULL;
   2118 }
   2119 
   2120 static void
   2121 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
   2122 {
   2123 	struct ath_softc *sc = ic->ic_if.if_softc;
   2124 	struct ath_buf *bf;
   2125 
   2126 	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
   2127 		if (bf->bf_node == ni)
   2128 			bf->bf_node = NULL;
   2129 	}
   2130 	(*sc->sc_node_free)(ic, ni);
   2131 }
   2132 
   2133 static void
   2134 ath_node_copy(struct ieee80211com *ic,
   2135 	struct ieee80211_node *dst, const struct ieee80211_node *src)
   2136 {
   2137         struct ath_softc *sc = ic->ic_if.if_softc;
   2138 
   2139 	memcpy(&dst[1], &src[1],
   2140 		sizeof(struct ath_node) - sizeof(struct ieee80211_node));
   2141 	(*sc->sc_node_copy)(ic, dst, src);
   2142 }
   2143 
   2144 static u_int8_t
   2145 ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni)
   2146 {
   2147 	struct ath_node *an = ATH_NODE(ni);
   2148 	int i, now, nsamples, rssi;
   2149 
   2150 	/*
   2151 	 * Calculate the average over the last second of sampled data.
   2152 	 */
   2153 	now = ATH_TICKS();
   2154 	nsamples = 0;
   2155 	rssi = 0;
   2156 	i = an->an_rx_hist_next;
   2157 	do {
   2158 		struct ath_recv_hist *rh = &an->an_rx_hist[i];
   2159 		if (rh->arh_ticks == ATH_RHIST_NOTIME)
   2160 			goto done;
   2161 		if (now - rh->arh_ticks > hz)
   2162 			goto done;
   2163 		rssi += rh->arh_rssi;
   2164 		nsamples++;
   2165 		if (i == 0)
   2166 			i = ATH_RHIST_SIZE-1;
   2167 		else
   2168 			i--;
   2169 	} while (i != an->an_rx_hist_next);
   2170 done:
   2171 	/*
   2172 	 * Return either the average or the last known
   2173 	 * value if there is no recent data.
   2174 	 */
   2175 	return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi);
   2176 }
   2177 
   2178 static int
   2179 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
   2180 {
   2181 	struct ath_hal *ah = sc->sc_ah;
   2182 	int error;
   2183 	struct mbuf *m;
   2184 	struct ath_desc *ds;
   2185 
   2186 	m = bf->bf_m;
   2187 	if (m == NULL) {
   2188 		/*
   2189 		 * NB: by assigning a page to the rx dma buffer we
   2190 		 * implicitly satisfy the Atheros requirement that
   2191 		 * this buffer be cache-line-aligned and sized to be
   2192 		 * multiple of the cache line size.  Not doing this
   2193 		 * causes weird stuff to happen (for the 5210 at least).
   2194 		 */
   2195 		m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES);
   2196 		if (m == NULL) {
   2197 			DPRINTF(ATH_DEBUG_ANY,
   2198 				("%s: no mbuf/cluster\n", __func__));
   2199 			sc->sc_stats.ast_rx_nombuf++;
   2200 			return ENOMEM;
   2201 		}
   2202 		bf->bf_m = m;
   2203 		m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
   2204 
   2205 		error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m,
   2206 		                                 BUS_DMA_NOWAIT);
   2207 		if (error != 0) {
   2208 			DPRINTF(ATH_DEBUG_ANY,
   2209 				("%s: ath_buf_dmamap_load_mbuf failed;"
   2210 				" error %d\n", __func__, error));
   2211 			sc->sc_stats.ast_rx_busdma++;
   2212 			return error;
   2213 		}
   2214 		KASSERT(bf->bf_nseg == 1,
   2215 			("ath_rxbuf_init: multi-segment packet; nseg %u",
   2216 			bf->bf_nseg));
   2217 	}
   2218 	ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD);
   2219 
   2220 	/*
   2221 	 * Setup descriptors.  For receive we always terminate
   2222 	 * the descriptor list with a self-linked entry so we'll
   2223 	 * not get overrun under high load (as can happen with a
   2224 	 * 5212 when ANI processing enables PHY errors).
   2225 	 *
   2226 	 * To insure the last descriptor is self-linked we create
   2227 	 * each descriptor as self-linked and add it to the end.  As
   2228 	 * each additional descriptor is added the previous self-linked
   2229 	 * entry is ``fixed'' naturally.  This should be safe even
   2230 	 * if DMA is happening.  When processing RX interrupts we
   2231 	 * never remove/process the last, self-linked, entry on the
   2232 	 * descriptor list.  This insures the hardware always has
   2233 	 * someplace to write a new frame.
   2234 	 */
   2235 	ds = bf->bf_desc;
   2236 	ds->ds_link = bf->bf_daddr;	/* link to self */
   2237 	ds->ds_data = bf->bf_segs[0].ds_addr;
   2238 	ath_hal_setuprxdesc(ah, ds
   2239 		, m->m_len		/* buffer size */
   2240 		, 0
   2241 	);
   2242 
   2243 	if (sc->sc_rxlink != NULL)
   2244 		*sc->sc_rxlink = bf->bf_daddr;
   2245 	sc->sc_rxlink = &ds->ds_link;
   2246 	return 0;
   2247 }
   2248 
   2249 static void
   2250 ath_rx_proc(void *arg, int npending)
   2251 {
   2252 #define	PA2DESC(_sc, _pa) \
   2253 	((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
   2254 		((_pa) - (_sc)->sc_desc_paddr)))
   2255 	struct ath_softc *sc = arg;
   2256 	struct ath_buf *bf;
   2257 	struct ieee80211com *ic = &sc->sc_ic;
   2258 	struct ifnet *ifp = &ic->ic_if;
   2259 	struct ath_hal *ah = sc->sc_ah;
   2260 	struct ath_desc *ds;
   2261 	struct mbuf *m;
   2262 	struct ieee80211_frame *wh, whbuf;
   2263 	struct ieee80211_node *ni;
   2264 	struct ath_node *an;
   2265 	struct ath_recv_hist *rh;
   2266 	int len;
   2267 	u_int phyerr;
   2268 	HAL_STATUS status;
   2269 
   2270 	DPRINTF(ATH_DEBUG_RX_PROC, ("%s: pending %u\n", __func__, npending));
   2271 	do {
   2272 		bf = TAILQ_FIRST(&sc->sc_rxbuf);
   2273 		if (bf == NULL) {		/* NB: shouldn't happen */
   2274 			if_printf(ifp, "ath_rx_proc: no buffer!\n");
   2275 			break;
   2276 		}
   2277 		ds = bf->bf_desc;
   2278 		if (ds->ds_link == bf->bf_daddr) {
   2279 			/* NB: never process the self-linked entry at the end */
   2280 			break;
   2281 		}
   2282 		m = bf->bf_m;
   2283 		if (m == NULL) {		/* NB: shouldn't happen */
   2284 			if_printf(ifp, "ath_rx_proc: no mbuf!\n");
   2285 			continue;
   2286 		}
   2287 		/* XXX sync descriptor memory */
   2288 		/*
   2289 		 * Must provide the virtual address of the current
   2290 		 * descriptor, the physical address, and the virtual
   2291 		 * address of the next descriptor in the h/w chain.
   2292 		 * This allows the HAL to look ahead to see if the
   2293 		 * hardware is done with a descriptor by checking the
   2294 		 * done bit in the following descriptor and the address
   2295 		 * of the current descriptor the DMA engine is working
   2296 		 * on.  All this is necessary because of our use of
   2297 		 * a self-linked list to avoid rx overruns.
   2298 		 */
   2299 		status = ath_hal_rxprocdesc(ah, ds,
   2300 				bf->bf_daddr, PA2DESC(sc, ds->ds_link));
   2301 #ifdef AR_DEBUG
   2302 		if (ath_debug & ATH_DEBUG_RECV_DESC)
   2303 			ath_printrxbuf(bf, status == HAL_OK);
   2304 #endif
   2305 		if (status == HAL_EINPROGRESS)
   2306 			break;
   2307 		TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
   2308 		if (ds->ds_rxstat.rs_status != 0) {
   2309 			if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC)
   2310 				sc->sc_stats.ast_rx_crcerr++;
   2311 			if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO)
   2312 				sc->sc_stats.ast_rx_fifoerr++;
   2313 			if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT)
   2314 				sc->sc_stats.ast_rx_badcrypt++;
   2315 			if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) {
   2316 				sc->sc_stats.ast_rx_phyerr++;
   2317 				phyerr = ds->ds_rxstat.rs_phyerr & 0x1f;
   2318 				sc->sc_stats.ast_rx_phy[phyerr]++;
   2319 			} else {
   2320 				/*
   2321 				 * NB: don't count PHY errors as input errors;
   2322 				 * we enable them on the 5212 to collect info
   2323 				 * about environmental noise and, in that
   2324 				 * setting, they don't really reflect tx/rx
   2325 				 * errors.
   2326 				 */
   2327 				ifp->if_ierrors++;
   2328 			}
   2329 			goto rx_next;
   2330 		}
   2331 
   2332 		len = ds->ds_rxstat.rs_datalen;
   2333 		if (len < IEEE80211_MIN_LEN) {
   2334 			DPRINTF(ATH_DEBUG_RECV, ("%s: short packet %d\n",
   2335 				__func__, len));
   2336 			sc->sc_stats.ast_rx_tooshort++;
   2337 			goto rx_next;
   2338 		}
   2339 
   2340 		ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD);
   2341 
   2342 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2343 		bf->bf_m = NULL;
   2344 		m->m_pkthdr.rcvif = ifp;
   2345 		m->m_pkthdr.len = m->m_len = len;
   2346 
   2347 #if NBPFILTER > 0
   2348 		if (sc->sc_drvbpf) {
   2349 			sc->sc_rx_th.wr_rate =
   2350 				sc->sc_hwmap[ds->ds_rxstat.rs_rate];
   2351 			sc->sc_rx_th.wr_antsignal = ds->ds_rxstat.rs_rssi;
   2352 			sc->sc_rx_th.wr_antenna = ds->ds_rxstat.rs_antenna;
   2353 			/* XXX TSF */
   2354 			bpf_mtap2(sc->sc_drvbpf,
   2355 				&sc->sc_rx_th, sc->sc_rx_th_len, m);
   2356 		}
   2357 #endif
   2358 
   2359 		m_adj(m, -IEEE80211_CRC_LEN);
   2360 		wh = mtod(m, struct ieee80211_frame *);
   2361 		if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
   2362 			/*
   2363 			 * WEP is decrypted by hardware. Clear WEP bit
   2364 			 * and trim WEP header for ieee80211_input().
   2365 			 */
   2366 			wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
   2367 			memcpy(&whbuf, wh, sizeof(whbuf));
   2368 			m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN);
   2369 			wh = mtod(m, struct ieee80211_frame *);
   2370 			memcpy(wh, &whbuf, sizeof(whbuf));
   2371 			/*
   2372 			 * Also trim WEP ICV from the tail.
   2373 			 */
   2374 			m_adj(m, -IEEE80211_WEP_CRCLEN);
   2375 			/*
   2376 			 * The header has probably moved.
   2377 			 */
   2378 			wh = mtod(m, struct ieee80211_frame *);
   2379 		}
   2380 
   2381 		/*
   2382 		 * Locate the node for sender, track state, and
   2383 		 * then pass this node (referenced) up to the 802.11
   2384 		 * layer for its use.  We are required to pass
   2385 		 * something so we fall back to ic_bss when this frame
   2386 		 * is from an unknown sender.
   2387 		 */
   2388 		ni = ieee80211_find_rxnode(ic, wh);
   2389 
   2390 		/*
   2391 		 * Record driver-specific state.
   2392 		 */
   2393 		an = ATH_NODE(ni);
   2394 		if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE)
   2395 			an->an_rx_hist_next = 0;
   2396 		rh = &an->an_rx_hist[an->an_rx_hist_next];
   2397 		rh->arh_ticks = ATH_TICKS();
   2398 		rh->arh_rssi = ds->ds_rxstat.rs_rssi;
   2399 		rh->arh_antenna = ds->ds_rxstat.rs_antenna;
   2400 
   2401 		/*
   2402 		 * Send frame up for processing.
   2403 		 */
   2404 		ieee80211_input(ifp, m, ni,
   2405 			ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp);
   2406 
   2407 		/*
   2408 		 * The frame may have caused the node to be marked for
   2409 		 * reclamation (e.g. in response to a DEAUTH message)
   2410 		 * so use free_node here instead of unref_node.
   2411 		 */
   2412 		if (ni == ic->ic_bss)
   2413 			ieee80211_unref_node(&ni);
   2414 		else
   2415 			ieee80211_free_node(ic, ni);
   2416   rx_next:
   2417 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   2418 	} while (ath_rxbuf_init(sc, bf) == 0);
   2419 
   2420 	ath_hal_rxmonitor(ah);			/* rx signal state monitoring */
   2421 	ath_hal_rxena(ah);			/* in case of RXEOL */
   2422 
   2423 #ifdef __NetBSD__
   2424 	if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd))
   2425 		ath_start(ifp);
   2426 #endif /* __NetBSD__ */
   2427 #undef PA2DESC
   2428 }
   2429 
   2430 /*
   2431  * XXX Size of an ACK control frame in bytes.
   2432  */
   2433 #define	IEEE80211_ACK_SIZE	(2+2+IEEE80211_ADDR_LEN+4)
   2434 
   2435 static int
   2436 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
   2437     struct mbuf *m0)
   2438 {
   2439 	struct ieee80211com *ic = &sc->sc_ic;
   2440 	struct ath_hal *ah = sc->sc_ah;
   2441 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   2442 	int i, error, iswep, hdrlen, pktlen;
   2443 	u_int8_t rix, cix, txrate, ctsrate;
   2444 	struct ath_desc *ds;
   2445 	struct mbuf *m;
   2446 	struct ieee80211_frame *wh;
   2447 	u_int32_t iv;
   2448 	u_int8_t *ivp;
   2449 	u_int8_t hdrbuf[sizeof(struct ieee80211_frame) +
   2450 	    IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN];
   2451 	u_int subtype, flags, ctsduration, antenna;
   2452 	HAL_PKT_TYPE atype;
   2453 	const HAL_RATE_TABLE *rt;
   2454 	HAL_BOOL shortPreamble;
   2455 	struct ath_node *an;
   2456 	ath_txq_critsect_decl(s);
   2457 
   2458 	wh = mtod(m0, struct ieee80211_frame *);
   2459 	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
   2460 	hdrlen = sizeof(struct ieee80211_frame);
   2461 	pktlen = m0->m_pkthdr.len;
   2462 
   2463 	if (iswep) {
   2464 		memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen);
   2465 		m_adj(m0, hdrlen);
   2466 		M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT);
   2467 		if (m0 == NULL) {
   2468 			sc->sc_stats.ast_tx_nombuf++;
   2469 			return ENOMEM;
   2470 		}
   2471 		ivp = hdrbuf + hdrlen;
   2472 		wh = mtod(m0, struct ieee80211_frame *);
   2473 		/*
   2474 		 * XXX
   2475 		 * IV must not duplicate during the lifetime of the key.
   2476 		 * But no mechanism to renew keys is defined in IEEE 802.11
   2477 		 * WEP.  And IV may be duplicated between other stations
   2478 		 * because of the session key itself is shared.
   2479 		 * So we use pseudo random IV for now, though it is not the
   2480 		 * right way.
   2481 		 */
   2482                 iv = ic->ic_iv;
   2483 		/*
   2484 		 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir:
   2485 		 * (B, 255, N) with 3 <= B < 8
   2486 		 */
   2487 		if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00)
   2488 			iv += 0x000100;
   2489 		ic->ic_iv = iv + 1;
   2490 		for (i = 0; i < IEEE80211_WEP_IVLEN; i++) {
   2491 			ivp[i] = iv;
   2492 			iv >>= 8;
   2493 		}
   2494 		ivp[i] = sc->sc_ic.ic_wep_txkey << 6;	/* Key ID and pad */
   2495 		memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf));
   2496 		/*
   2497 		 * The ICV length must be included into hdrlen and pktlen.
   2498 		 */
   2499 		hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN;
   2500 		pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN;
   2501 	}
   2502 	pktlen += IEEE80211_CRC_LEN;
   2503 
   2504 	/*
   2505 	 * Load the DMA map so any coalescing is done.  This
   2506 	 * also calculates the number of descriptors we need.
   2507 	 */
   2508 	error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT);
   2509 	/*
   2510 	 * Discard null packets and check for packets that
   2511 	 * require too many TX descriptors.  We try to convert
   2512 	 * the latter to a cluster.
   2513 	 */
   2514 	if (error == EFBIG) {		/* too many desc's, linearize */
   2515 		sc->sc_stats.ast_tx_linear++;
   2516 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   2517 		if (m == NULL) {
   2518 			sc->sc_stats.ast_tx_nombuf++;
   2519 			m_freem(m0);
   2520 			return ENOMEM;
   2521 		}
   2522 #ifdef __FreeBSD__
   2523 		M_MOVE_PKTHDR(m, m0);
   2524 #else
   2525 		M_COPY_PKTHDR(m, m0);
   2526 #endif
   2527 		MCLGET(m, M_DONTWAIT);
   2528 		if ((m->m_flags & M_EXT) == 0) {
   2529 			sc->sc_stats.ast_tx_nomcl++;
   2530 			m_freem(m0);
   2531 			m_free(m);
   2532 			return ENOMEM;
   2533 		}
   2534 		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
   2535 		m_freem(m0);
   2536 		m->m_len = m->m_pkthdr.len;
   2537 		m0 = m;
   2538 		error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0,
   2539 					         BUS_DMA_NOWAIT);
   2540 		if (error != 0) {
   2541 			sc->sc_stats.ast_tx_busdma++;
   2542 			m_freem(m0);
   2543 			return error;
   2544 		}
   2545 		KASSERT(bf->bf_nseg == 1,
   2546 			("ath_tx_start: packet not one segment; nseg %u",
   2547 			bf->bf_nseg));
   2548 	} else if (error != 0) {
   2549 		sc->sc_stats.ast_tx_busdma++;
   2550 		m_freem(m0);
   2551 		return error;
   2552 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
   2553 		sc->sc_stats.ast_tx_nodata++;
   2554 		m_freem(m0);
   2555 		return EIO;
   2556 	}
   2557 	DPRINTF(ATH_DEBUG_XMIT, ("%s: m %p len %u\n", __func__, m0, pktlen));
   2558 	ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
   2559 	bf->bf_m = m0;
   2560 	bf->bf_node = ni;			/* NB: held reference */
   2561 
   2562 	/* setup descriptors */
   2563 	ds = bf->bf_desc;
   2564 	rt = sc->sc_currates;
   2565 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
   2566 
   2567 	/*
   2568 	 * Calculate Atheros packet type from IEEE80211 packet header
   2569 	 * and setup for rate calculations.
   2570 	 */
   2571 	atype = HAL_PKT_TYPE_NORMAL;			/* default */
   2572 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
   2573 	case IEEE80211_FC0_TYPE_MGT:
   2574 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
   2575 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
   2576 			atype = HAL_PKT_TYPE_BEACON;
   2577 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
   2578 			atype = HAL_PKT_TYPE_PROBE_RESP;
   2579 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
   2580 			atype = HAL_PKT_TYPE_ATIM;
   2581 		rix = 0;			/* XXX lowest rate */
   2582 		break;
   2583 	case IEEE80211_FC0_TYPE_CTL:
   2584 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
   2585 		if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL)
   2586 			atype = HAL_PKT_TYPE_PSPOLL;
   2587 		rix = 0;			/* XXX lowest rate */
   2588 		break;
   2589 	default:
   2590 		rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] &
   2591 				IEEE80211_RATE_VAL];
   2592 		if (rix == 0xff) {
   2593 			if_printf(ifp, "bogus xmit rate 0x%x\n",
   2594 				ni->ni_rates.rs_rates[ni->ni_txrate]);
   2595 			sc->sc_stats.ast_tx_badrate++;
   2596 			m_freem(m0);
   2597 			return EIO;
   2598 		}
   2599 		break;
   2600 	}
   2601 	/*
   2602 	 * NB: the 802.11 layer marks whether or not we should
   2603 	 * use short preamble based on the current mode and
   2604 	 * negotiated parameters.
   2605 	 */
   2606 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
   2607 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
   2608 		txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble;
   2609 		shortPreamble = AH_TRUE;
   2610 		sc->sc_stats.ast_tx_shortpre++;
   2611 	} else {
   2612 		txrate = rt->info[rix].rateCode;
   2613 		shortPreamble = AH_FALSE;
   2614 	}
   2615 
   2616 	/*
   2617 	 * Calculate miscellaneous flags.
   2618 	 */
   2619 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for wep errors */
   2620 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
   2621 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
   2622 		sc->sc_stats.ast_tx_noack++;
   2623 	} else if (pktlen > ic->ic_rtsthreshold) {
   2624 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
   2625 		sc->sc_stats.ast_tx_rts++;
   2626 	}
   2627 
   2628 	/*
   2629 	 * Calculate duration.  This logically belongs in the 802.11
   2630 	 * layer but it lacks sufficient information to calculate it.
   2631 	 */
   2632 	if ((flags & HAL_TXDESC_NOACK) == 0 &&
   2633 	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
   2634 		u_int16_t dur;
   2635 		/*
   2636 		 * XXX not right with fragmentation.
   2637 		 */
   2638 		dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE,
   2639 				rix, shortPreamble);
   2640 		*((u_int16_t*) wh->i_dur) = htole16(dur);
   2641 	}
   2642 
   2643 	/*
   2644 	 * Calculate RTS/CTS rate and duration if needed.
   2645 	 */
   2646 	ctsduration = 0;
   2647 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
   2648 		/*
   2649 		 * CTS transmit rate is derived from the transmit rate
   2650 		 * by looking in the h/w rate table.  We must also factor
   2651 		 * in whether or not a short preamble is to be used.
   2652 		 */
   2653 		cix = rt->info[rix].controlRate;
   2654 		ctsrate = rt->info[cix].rateCode;
   2655 		if (shortPreamble)
   2656 			ctsrate |= rt->info[cix].shortPreamble;
   2657 		/*
   2658 		 * Compute the transmit duration based on the size
   2659 		 * of an ACK frame.  We call into the HAL to do the
   2660 		 * computation since it depends on the characteristics
   2661 		 * of the actual PHY being used.
   2662 		 */
   2663 		if (flags & HAL_TXDESC_RTSENA) {	/* SIFS + CTS */
   2664 			ctsduration += ath_hal_computetxtime(ah,
   2665 				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
   2666 		}
   2667 		/* SIFS + data */
   2668 		ctsduration += ath_hal_computetxtime(ah,
   2669 			rt, pktlen, rix, shortPreamble);
   2670 		if ((flags & HAL_TXDESC_NOACK) == 0) {	/* SIFS + ACK */
   2671 			ctsduration += ath_hal_computetxtime(ah,
   2672 				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
   2673 		}
   2674 	} else
   2675 		ctsrate = 0;
   2676 
   2677 	/*
   2678 	 * For now use the antenna on which the last good
   2679 	 * frame was received on.  We assume this field is
   2680 	 * initialized to 0 which gives us ``auto'' or the
   2681 	 * ``default'' antenna.
   2682 	 */
   2683 	an = (struct ath_node *) ni;
   2684 	if (an->an_tx_antenna)
   2685 		antenna = an->an_tx_antenna;
   2686 	else
   2687 		antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna;
   2688 
   2689 	if (ic->ic_rawbpf)
   2690 		bpf_mtap(ic->ic_rawbpf, m0);
   2691 	if (sc->sc_drvbpf) {
   2692 		sc->sc_tx_th.wt_flags = 0;
   2693 		if (shortPreamble)
   2694 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
   2695 		if (iswep)
   2696 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
   2697 		sc->sc_tx_th.wt_rate = ni->ni_rates.rs_rates[ni->ni_txrate];
   2698 		sc->sc_tx_th.wt_txpower = 60/2;		/* XXX */
   2699 		sc->sc_tx_th.wt_antenna = antenna;
   2700 
   2701 		bpf_mtap2(sc->sc_drvbpf,
   2702 			&sc->sc_tx_th, sc->sc_tx_th_len, m0);
   2703 	}
   2704 
   2705 	/*
   2706 	 * Formulate first tx descriptor with tx controls.
   2707 	 */
   2708 	/* XXX check return value? */
   2709 	ath_hal_setuptxdesc(ah, ds
   2710 		, pktlen		/* packet length */
   2711 		, hdrlen		/* header length */
   2712 		, atype			/* Atheros packet type */
   2713 		, 60			/* txpower XXX */
   2714 		, txrate, 1+10		/* series 0 rate/tries */
   2715 		, iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID
   2716 		, antenna		/* antenna mode */
   2717 		, flags			/* flags */
   2718 		, ctsrate		/* rts/cts rate */
   2719 		, ctsduration		/* rts/cts duration */
   2720 	);
   2721 #ifdef notyet
   2722 	ath_hal_setupxtxdesc(ah, ds
   2723 		, AH_FALSE		/* short preamble */
   2724 		, 0, 0			/* series 1 rate/tries */
   2725 		, 0, 0			/* series 2 rate/tries */
   2726 		, 0, 0			/* series 3 rate/tries */
   2727 	);
   2728 #endif
   2729 	/*
   2730 	 * Fillin the remainder of the descriptor info.
   2731 	 */
   2732 	for (i = 0; i < bf->bf_nseg; i++, ds++) {
   2733 		ds->ds_data = bf->bf_segs[i].ds_addr;
   2734 		if (i == bf->bf_nseg - 1)
   2735 			ds->ds_link = 0;
   2736 		else
   2737 			ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
   2738 		ath_hal_filltxdesc(ah, ds
   2739 			, bf->bf_segs[i].ds_len	/* segment length */
   2740 			, i == 0		/* first segment */
   2741 			, i == bf->bf_nseg - 1	/* last segment */
   2742 		);
   2743 		DPRINTF(ATH_DEBUG_XMIT,
   2744 			("%s: %d: %08x %08x %08x %08x %08x %08x\n",
   2745 			__func__, i, ds->ds_link, ds->ds_data,
   2746 			ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]));
   2747 	}
   2748 
   2749 	/*
   2750 	 * Insert the frame on the outbound list and
   2751 	 * pass it on to the hardware.
   2752 	 */
   2753 	ath_txq_critsect_begin(sc, s);
   2754 	TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
   2755 	if (sc->sc_txlink == NULL) {
   2756 		ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr);
   2757 		DPRINTF(ATH_DEBUG_XMIT, ("%s: TXDP0 = %p (%p)\n", __func__,
   2758 		    (caddr_t)bf->bf_daddr, bf->bf_desc));
   2759 	} else {
   2760 		*sc->sc_txlink = bf->bf_daddr;
   2761 		DPRINTF(ATH_DEBUG_XMIT, ("%s: link(%p)=%p (%p)\n", __func__,
   2762 		    sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc));
   2763 	}
   2764 	sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
   2765 	ath_txq_critsect_end(sc, s);
   2766 
   2767 	ath_hal_txstart(ah, sc->sc_txhalq);
   2768 	return 0;
   2769 }
   2770 
   2771 static void
   2772 ath_tx_proc(void *arg, int npending)
   2773 {
   2774 	struct ath_softc *sc = arg;
   2775 	struct ath_hal *ah = sc->sc_ah;
   2776 	struct ath_buf *bf;
   2777 	struct ieee80211com *ic = &sc->sc_ic;
   2778 	struct ifnet *ifp = &ic->ic_if;
   2779 	struct ath_desc *ds;
   2780 	struct ieee80211_node *ni;
   2781 	struct ath_node *an;
   2782 	int sr, lr;
   2783 	HAL_STATUS status;
   2784 	ath_txq_critsect_decl(s);
   2785 	ath_txbuf_critsect_decl(s2);
   2786 
   2787 	DPRINTF(ATH_DEBUG_TX_PROC, ("%s: pending %u tx queue %p, link %p\n",
   2788 		__func__, npending,
   2789 		(caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq),
   2790 		sc->sc_txlink));
   2791 	for (;;) {
   2792 		ath_txq_critsect_begin(sc, s);
   2793 		bf = TAILQ_FIRST(&sc->sc_txq);
   2794 		if (bf == NULL) {
   2795 			sc->sc_txlink = NULL;
   2796 			ath_txq_critsect_end(sc, s);
   2797 			break;
   2798 		}
   2799 		/* only the last descriptor is needed */
   2800 		ds = &bf->bf_desc[bf->bf_nseg - 1];
   2801 		status = ath_hal_txprocdesc(ah, ds);
   2802 #ifdef AR_DEBUG
   2803 		if (ath_debug & ATH_DEBUG_XMIT_DESC)
   2804 			ath_printtxbuf(bf, status == HAL_OK);
   2805 #endif
   2806 		if (status == HAL_EINPROGRESS) {
   2807 			ath_txq_critsect_end(sc, s);
   2808 			break;
   2809 		}
   2810 		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
   2811 		ath_txq_critsect_end(sc, s);
   2812 
   2813 		ni = bf->bf_node;
   2814 		if (ni != NULL) {
   2815 			an = (struct ath_node *) ni;
   2816 			if (ds->ds_txstat.ts_status == 0) {
   2817 				an->an_tx_ok++;
   2818 				an->an_tx_antenna = ds->ds_txstat.ts_antenna;
   2819 			} else {
   2820 				an->an_tx_err++;
   2821 				ifp->if_oerrors++;
   2822 				if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY)
   2823 					sc->sc_stats.ast_tx_xretries++;
   2824 				if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO)
   2825 					sc->sc_stats.ast_tx_fifoerr++;
   2826 				if (ds->ds_txstat.ts_status & HAL_TXERR_FILT)
   2827 					sc->sc_stats.ast_tx_filtered++;
   2828 				an->an_tx_antenna = 0;	/* invalidate */
   2829 			}
   2830 			sr = ds->ds_txstat.ts_shortretry;
   2831 			lr = ds->ds_txstat.ts_longretry;
   2832 			sc->sc_stats.ast_tx_shortretry += sr;
   2833 			sc->sc_stats.ast_tx_longretry += lr;
   2834 			if (sr + lr)
   2835 				an->an_tx_retr++;
   2836 			/*
   2837 			 * Reclaim reference to node.
   2838 			 *
   2839 			 * NB: the node may be reclaimed here if, for example
   2840 			 *     this is a DEAUTH message that was sent and the
   2841 			 *     node was timed out due to inactivity.
   2842 			 */
   2843 			if (ni != ic->ic_bss)
   2844 				ieee80211_free_node(ic, ni);
   2845 		}
   2846 		ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE);
   2847 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2848 		m_freem(bf->bf_m);
   2849 		bf->bf_m = NULL;
   2850 		bf->bf_node = NULL;
   2851 
   2852 		ath_txbuf_critsect_begin(sc, s2);
   2853 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2854 		ath_txbuf_critsect_end(sc, s2);
   2855 	}
   2856 	ifp->if_flags &= ~IFF_OACTIVE;
   2857 	sc->sc_tx_timer = 0;
   2858 
   2859 	ath_start(ifp);
   2860 }
   2861 
   2862 /*
   2863  * Drain the transmit queue and reclaim resources.
   2864  */
   2865 static void
   2866 ath_draintxq(struct ath_softc *sc)
   2867 {
   2868 	struct ath_hal *ah = sc->sc_ah;
   2869 	struct ieee80211com *ic = &sc->sc_ic;
   2870 	struct ifnet *ifp = &ic->ic_if;
   2871 	struct ieee80211_node *ni;
   2872 	struct ath_buf *bf;
   2873 	ath_txq_critsect_decl(s);
   2874 	ath_txbuf_critsect_decl(s2);
   2875 
   2876 	/* XXX return value */
   2877 	if (!sc->sc_invalid) {
   2878 		/* don't touch the hardware if marked invalid */
   2879 		(void) ath_hal_stoptxdma(ah, sc->sc_txhalq);
   2880 		DPRINTF(ATH_DEBUG_RESET,
   2881 		    ("%s: tx queue %p, link %p\n", __func__,
   2882 		    (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq),
   2883 		    sc->sc_txlink));
   2884 		(void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
   2885 		DPRINTF(ATH_DEBUG_RESET,
   2886 		    ("%s: beacon queue %p\n", __func__,
   2887 		    (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq)));
   2888 	}
   2889 	for (;;) {
   2890 		ath_txq_critsect_begin(sc, s);
   2891 		bf = TAILQ_FIRST(&sc->sc_txq);
   2892 		if (bf == NULL) {
   2893 			sc->sc_txlink = NULL;
   2894 			ath_txq_critsect_end(sc, s);
   2895 			break;
   2896 		}
   2897 		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
   2898 		ath_txq_critsect_end(sc, s);
   2899 #ifdef AR_DEBUG
   2900 		if (ath_debug & ATH_DEBUG_RESET)
   2901 			ath_printtxbuf(bf,
   2902 				ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK);
   2903 #endif /* AR_DEBUG */
   2904 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2905 		m_freem(bf->bf_m);
   2906 		bf->bf_m = NULL;
   2907 		ni = bf->bf_node;
   2908 		bf->bf_node = NULL;
   2909 		ath_txbuf_critsect_begin(sc, s2);
   2910 		if (ni != NULL && ni != ic->ic_bss) {
   2911 			/*
   2912 			 * Reclaim node reference.
   2913 			 */
   2914 			ieee80211_free_node(ic, ni);
   2915 		}
   2916 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2917 		ath_txbuf_critsect_end(sc, s2);
   2918 	}
   2919 	ifp->if_flags &= ~IFF_OACTIVE;
   2920 	sc->sc_tx_timer = 0;
   2921 }
   2922 
   2923 /*
   2924  * Disable the receive h/w in preparation for a reset.
   2925  */
   2926 static void
   2927 ath_stoprecv(struct ath_softc *sc)
   2928 {
   2929 #define	PA2DESC(_sc, _pa) \
   2930 	((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
   2931 		((_pa) - (_sc)->sc_desc_paddr)))
   2932 	struct ath_hal *ah = sc->sc_ah;
   2933 
   2934 	ath_hal_stoppcurecv(ah);	/* disable PCU */
   2935 	ath_hal_setrxfilter(ah, 0);	/* clear recv filter */
   2936 	ath_hal_stopdmarecv(ah);	/* disable DMA engine */
   2937 	DELAY(3000);			/* long enough for 1 frame */
   2938 #ifdef AR_DEBUG
   2939 	if (ath_debug & ATH_DEBUG_RESET) {
   2940 		struct ath_buf *bf;
   2941 
   2942 		printf("%s: rx queue %p, link %p\n", __func__,
   2943 			(caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
   2944 		TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   2945 			struct ath_desc *ds = bf->bf_desc;
   2946 			if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr,
   2947 			    PA2DESC(sc, ds->ds_link)) == HAL_OK)
   2948 				ath_printrxbuf(bf, 1);
   2949 		}
   2950 	}
   2951 #endif
   2952 	sc->sc_rxlink = NULL;		/* just in case */
   2953 #undef PA2DESC
   2954 }
   2955 
   2956 /*
   2957  * Enable the receive h/w following a reset.
   2958  */
   2959 static int
   2960 ath_startrecv(struct ath_softc *sc)
   2961 {
   2962 	struct ath_hal *ah = sc->sc_ah;
   2963 	struct ath_buf *bf;
   2964 
   2965 	sc->sc_rxlink = NULL;
   2966 	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   2967 		int error = ath_rxbuf_init(sc, bf);
   2968 		if (error != 0) {
   2969 			DPRINTF(ATH_DEBUG_RECV,
   2970 				("%s: ath_rxbuf_init failed %d\n",
   2971 				__func__, error));
   2972 			return error;
   2973 		}
   2974 	}
   2975 
   2976 	bf = TAILQ_FIRST(&sc->sc_rxbuf);
   2977 	ath_hal_putrxbuf(ah, bf->bf_daddr);
   2978 	ath_hal_rxena(ah);		/* enable recv descriptors */
   2979 	ath_mode_init(sc);		/* set filters, etc. */
   2980 	ath_hal_startpcurecv(ah);	/* re-enable PCU/DMA engine */
   2981 	return 0;
   2982 }
   2983 
   2984 /*
   2985  * Set/change channels.  If the channel is really being changed,
   2986  * it's done by resetting the chip.  To accomplish this we must
   2987  * first cleanup any pending DMA, then restart stuff after a la
   2988  * ath_init.
   2989  */
   2990 static int
   2991 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
   2992 {
   2993 	struct ath_hal *ah = sc->sc_ah;
   2994 	struct ieee80211com *ic = &sc->sc_ic;
   2995 
   2996 	DPRINTF(ATH_DEBUG_ANY, ("%s: %u (%u MHz) -> %u (%u MHz)\n", __func__,
   2997 	    ieee80211_chan2ieee(ic, ic->ic_ibss_chan),
   2998 		ic->ic_ibss_chan->ic_freq,
   2999 	    ieee80211_chan2ieee(ic, chan), chan->ic_freq));
   3000 	if (chan != ic->ic_ibss_chan) {
   3001 		HAL_STATUS status;
   3002 		HAL_CHANNEL hchan;
   3003 		enum ieee80211_phymode mode;
   3004 
   3005 		/*
   3006 		 * To switch channels clear any pending DMA operations;
   3007 		 * wait long enough for the RX fifo to drain, reset the
   3008 		 * hardware at the new frequency, and then re-enable
   3009 		 * the relevant bits of the h/w.
   3010 		 */
   3011 		ath_hal_intrset(ah, 0);		/* disable interrupts */
   3012 		ath_draintxq(sc);		/* clear pending tx frames */
   3013 		ath_stoprecv(sc);		/* turn off frame recv */
   3014 		/*
   3015 		 * Convert to a HAL channel description with
   3016 		 * the flags constrained to reflect the current
   3017 		 * operating mode.
   3018 		 */
   3019 		hchan.channel = chan->ic_freq;
   3020 		hchan.channelFlags = ath_chan2flags(ic, chan);
   3021 		if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) {
   3022 			if_printf(&ic->ic_if, "ath_chan_set: unable to reset "
   3023 				"channel %u (%u Mhz)\n",
   3024 				ieee80211_chan2ieee(ic, chan), chan->ic_freq);
   3025 			return EIO;
   3026 		}
   3027 		/*
   3028 		 * Re-enable rx framework.
   3029 		 */
   3030 		if (ath_startrecv(sc) != 0) {
   3031 			if_printf(&ic->ic_if,
   3032 				"ath_chan_set: unable to restart recv logic\n");
   3033 			return EIO;
   3034 		}
   3035 
   3036 		/*
   3037 		 * Update BPF state.
   3038 		 */
   3039 		sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
   3040 			htole16(chan->ic_freq);
   3041 		sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
   3042 			htole16(chan->ic_flags);
   3043 
   3044 		/*
   3045 		 * Change channels and update the h/w rate map
   3046 		 * if we're switching; e.g. 11a to 11b/g.
   3047 		 */
   3048 		ic->ic_ibss_chan = chan;
   3049 		mode = ieee80211_chan2mode(ic, chan);
   3050 		if (mode != sc->sc_curmode)
   3051 			ath_setcurmode(sc, mode);
   3052 
   3053 		/*
   3054 		 * Re-enable interrupts.
   3055 		 */
   3056 		ath_hal_intrset(ah, sc->sc_imask);
   3057 	}
   3058 	return 0;
   3059 }
   3060 
   3061 static void
   3062 ath_next_scan(void *arg)
   3063 {
   3064 	struct ath_softc *sc = arg;
   3065 	struct ieee80211com *ic = &sc->sc_ic;
   3066 	struct ifnet *ifp = &ic->ic_if;
   3067 	int s;
   3068 
   3069 	/* don't call ath_start w/o network interrupts blocked */
   3070 	s = splnet();
   3071 
   3072 	if (ic->ic_state == IEEE80211_S_SCAN)
   3073 		ieee80211_next_scan(ifp);
   3074 	splx(s);
   3075 }
   3076 
   3077 /*
   3078  * Periodically recalibrate the PHY to account
   3079  * for temperature/environment changes.
   3080  */
   3081 static void
   3082 ath_calibrate(void *arg)
   3083 {
   3084 	struct ath_softc *sc = arg;
   3085 	struct ath_hal *ah = sc->sc_ah;
   3086 	struct ieee80211com *ic = &sc->sc_ic;
   3087 	struct ieee80211_channel *c;
   3088 	HAL_CHANNEL hchan;
   3089 
   3090 	sc->sc_stats.ast_per_cal++;
   3091 
   3092 	/*
   3093 	 * Convert to a HAL channel description with the flags
   3094 	 * constrained to reflect the current operating mode.
   3095 	 */
   3096 	c = ic->ic_ibss_chan;
   3097 	hchan.channel = c->ic_freq;
   3098 	hchan.channelFlags = ath_chan2flags(ic, c);
   3099 
   3100 	DPRINTF(ATH_DEBUG_CALIBRATE,
   3101 		("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags));
   3102 
   3103 	if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
   3104 		/*
   3105 		 * Rfgain is out of bounds, reset the chip
   3106 		 * to load new gain values.
   3107 		 */
   3108 		sc->sc_stats.ast_per_rfgain++;
   3109 		ath_reset(sc);
   3110 	}
   3111 	if (!ath_hal_calibrate(ah, &hchan)) {
   3112 		DPRINTF(ATH_DEBUG_ANY,
   3113 			("%s: calibration of channel %u failed\n",
   3114 			__func__, c->ic_freq));
   3115 		sc->sc_stats.ast_per_calfail++;
   3116 	}
   3117 	callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc);
   3118 }
   3119 
   3120 static HAL_LED_STATE
   3121 ath_state_to_led(enum ieee80211_state state)
   3122 {
   3123 	switch (state) {
   3124 	case IEEE80211_S_INIT:
   3125 		return HAL_LED_INIT;
   3126 	case IEEE80211_S_SCAN:
   3127 		return HAL_LED_SCAN;
   3128 	case IEEE80211_S_AUTH:
   3129 		return HAL_LED_AUTH;
   3130 	case IEEE80211_S_ASSOC:
   3131 		return HAL_LED_ASSOC;
   3132 	case IEEE80211_S_RUN:
   3133 		return HAL_LED_RUN;
   3134 	default:
   3135 		panic("%s: unknown 802.11 state %d\n", __func__, state);
   3136 		return HAL_LED_INIT;
   3137 	}
   3138 }
   3139 
   3140 static int
   3141 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
   3142 {
   3143 	struct ifnet *ifp = &ic->ic_if;
   3144 	struct ath_softc *sc = ifp->if_softc;
   3145 	struct ath_hal *ah = sc->sc_ah;
   3146 	struct ieee80211_node *ni;
   3147 	int i, error;
   3148 	const u_int8_t *bssid;
   3149 	u_int32_t rfilt;
   3150 
   3151 	DPRINTF(ATH_DEBUG_ANY, ("%s: %s -> %s\n", __func__,
   3152 		ieee80211_state_name[ic->ic_state],
   3153 		ieee80211_state_name[nstate]));
   3154 
   3155 	ath_hal_setledstate(ah, ath_state_to_led(nstate));	/* set LED */
   3156 
   3157 	if (nstate == IEEE80211_S_INIT) {
   3158 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
   3159 		ath_hal_intrset(ah, sc->sc_imask);
   3160 		callout_stop(&sc->sc_scan_ch);
   3161 		callout_stop(&sc->sc_cal_ch);
   3162 		return (*sc->sc_newstate)(ic, nstate, arg);
   3163 	}
   3164 	ni = ic->ic_bss;
   3165 	error = ath_chan_set(sc, ni->ni_chan);
   3166 	if (error != 0)
   3167 		goto bad;
   3168 	rfilt = ath_calcrxfilter(sc);
   3169 	if (nstate == IEEE80211_S_SCAN) {
   3170 		callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000,
   3171 			ath_next_scan, sc);
   3172 		bssid = ifp->if_broadcastaddr;
   3173 	} else {
   3174 		callout_stop(&sc->sc_scan_ch);
   3175 		bssid = ni->ni_bssid;
   3176 	}
   3177 	ath_hal_setrxfilter(ah, rfilt);
   3178 	DPRINTF(ATH_DEBUG_ANY, ("%s: RX filter 0x%x bssid %s\n",
   3179 		 __func__, rfilt, ether_sprintf(bssid)));
   3180 
   3181 	if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA)
   3182 		ath_hal_setassocid(ah, bssid, ni->ni_associd);
   3183 	else
   3184 		ath_hal_setassocid(ah, bssid, 0);
   3185 	if (ic->ic_flags & IEEE80211_F_WEPON) {
   3186 		for (i = 0; i < IEEE80211_WEP_NKID; i++)
   3187 			if (ath_hal_keyisvalid(ah, i))
   3188 				ath_hal_keysetmac(ah, i, bssid);
   3189 	}
   3190 
   3191 	if (nstate == IEEE80211_S_RUN) {
   3192 		DPRINTF(ATH_DEBUG_ANY, ("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s "
   3193 			"capinfo=0x%04x chan=%d\n"
   3194 			 , __func__
   3195 			 , ic->ic_flags
   3196 			 , ni->ni_intval
   3197 			 , ether_sprintf(ni->ni_bssid)
   3198 			 , ni->ni_capinfo
   3199 			 , ieee80211_chan2ieee(ic, ni->ni_chan)));
   3200 
   3201 		/*
   3202 		 * Allocate and setup the beacon frame for AP or adhoc mode.
   3203 		 */
   3204 		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
   3205 		    ic->ic_opmode == IEEE80211_M_IBSS) {
   3206 			error = ath_beacon_alloc(sc, ni);
   3207 			if (error != 0)
   3208 				goto bad;
   3209 		}
   3210 
   3211 		/*
   3212 		 * Configure the beacon and sleep timers.
   3213 		 */
   3214 		ath_beacon_config(sc);
   3215 
   3216 		/* start periodic recalibration timer */
   3217 		callout_reset(&sc->sc_cal_ch, hz * ath_calinterval,
   3218 			ath_calibrate, sc);
   3219 	} else {
   3220 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
   3221 		ath_hal_intrset(ah, sc->sc_imask);
   3222 		callout_stop(&sc->sc_cal_ch);		/* no calibration */
   3223 	}
   3224 	/*
   3225 	 * Reset the rate control state.
   3226 	 */
   3227 	ath_rate_ctl_reset(sc, nstate);
   3228 	/*
   3229 	 * Invoke the parent method to complete the work.
   3230 	 */
   3231 	return (*sc->sc_newstate)(ic, nstate, arg);
   3232 bad:
   3233 	callout_stop(&sc->sc_scan_ch);
   3234 	callout_stop(&sc->sc_cal_ch);
   3235 	/* NB: do not invoke the parent */
   3236 	return error;
   3237 }
   3238 
   3239 /*
   3240  * Setup driver-specific state for a newly associated node.
   3241  * Note that we're called also on a re-associate, the isnew
   3242  * param tells us if this is the first time or not.
   3243  */
   3244 static void
   3245 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
   3246 {
   3247 	if (isnew) {
   3248 		struct ath_node *an = (struct ath_node *) ni;
   3249 
   3250 		an->an_tx_ok = an->an_tx_err =
   3251 			an->an_tx_retr = an->an_tx_upper = 0;
   3252 		/* start with highest negotiated rate */
   3253 		/*
   3254 		 * XXX should do otherwise but only when
   3255 		 * the rate control algorithm is better.
   3256 		 */
   3257 		KASSERT(ni->ni_rates.rs_nrates > 0,
   3258 			("new association w/ no rates!"));
   3259 		ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
   3260 	}
   3261 }
   3262 
   3263 static int
   3264 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor,
   3265     HAL_BOOL xchanmode)
   3266 {
   3267 	struct ieee80211com *ic = &sc->sc_ic;
   3268 	struct ifnet *ifp = &ic->ic_if;
   3269 	struct ath_hal *ah = sc->sc_ah;
   3270 	HAL_CHANNEL *chans;
   3271 	int i, ix, nchan;
   3272 
   3273 	chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL),
   3274 			M_TEMP, M_NOWAIT);
   3275 	if (chans == NULL) {
   3276 		if_printf(ifp, "unable to allocate channel table\n");
   3277 		return ENOMEM;
   3278 	}
   3279 	if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
   3280 	    cc, HAL_MODE_ALL, outdoor, xchanmode)) {
   3281 		if_printf(ifp, "unable to collect channel list from hal\n");
   3282 		free(chans, M_TEMP);
   3283 		return EINVAL;
   3284 	}
   3285 
   3286 	/*
   3287 	 * Convert HAL channels to ieee80211 ones and insert
   3288 	 * them in the table according to their channel number.
   3289 	 */
   3290 	for (i = 0; i < nchan; i++) {
   3291 		HAL_CHANNEL *c = &chans[i];
   3292 		ix = ath_hal_mhz2ieee(c->channel, c->channelFlags);
   3293 		if (ix > IEEE80211_CHAN_MAX) {
   3294 			if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n",
   3295 				ix, c->channel, c->channelFlags);
   3296 			continue;
   3297 		}
   3298 		DPRINTF(ATH_DEBUG_ANY,
   3299 		    ("%s: HAL channel %d/%d freq %d flags %#04x idx %d\n",
   3300 		    sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags,
   3301 		    ix));
   3302 		/* NB: flags are known to be compatible */
   3303 		if (ic->ic_channels[ix].ic_freq == 0) {
   3304 			ic->ic_channels[ix].ic_freq = c->channel;
   3305 			ic->ic_channels[ix].ic_flags = c->channelFlags;
   3306 		} else {
   3307 			/* channels overlap; e.g. 11g and 11b */
   3308 			ic->ic_channels[ix].ic_flags |= c->channelFlags;
   3309 		}
   3310 	}
   3311 	free(chans, M_TEMP);
   3312 	return 0;
   3313 }
   3314 
   3315 static int
   3316 ath_rate_setup(struct ath_softc *sc, u_int mode)
   3317 {
   3318 	struct ath_hal *ah = sc->sc_ah;
   3319 	struct ieee80211com *ic = &sc->sc_ic;
   3320 	const HAL_RATE_TABLE *rt;
   3321 	struct ieee80211_rateset *rs;
   3322 	int i, maxrates;
   3323 
   3324 	switch (mode) {
   3325 	case IEEE80211_MODE_11A:
   3326 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A);
   3327 		break;
   3328 	case IEEE80211_MODE_11B:
   3329 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B);
   3330 		break;
   3331 	case IEEE80211_MODE_11G:
   3332 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G);
   3333 		break;
   3334 	case IEEE80211_MODE_TURBO:
   3335 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO);
   3336 		break;
   3337 	default:
   3338 		DPRINTF(ATH_DEBUG_ANY,
   3339 			("%s: invalid mode %u\n", __func__, mode));
   3340 		return 0;
   3341 	}
   3342 	rt = sc->sc_rates[mode];
   3343 	if (rt == NULL)
   3344 		return 0;
   3345 	if (rt->rateCount > IEEE80211_RATE_MAXSIZE) {
   3346 		DPRINTF(ATH_DEBUG_ANY,
   3347 			("%s: rate table too small (%u > %u)\n",
   3348 			__func__, rt->rateCount, IEEE80211_RATE_MAXSIZE));
   3349 		maxrates = IEEE80211_RATE_MAXSIZE;
   3350 	} else
   3351 		maxrates = rt->rateCount;
   3352 	rs = &ic->ic_sup_rates[mode];
   3353 	for (i = 0; i < maxrates; i++)
   3354 		rs->rs_rates[i] = rt->info[i].dot11Rate;
   3355 	rs->rs_nrates = maxrates;
   3356 	return 1;
   3357 }
   3358 
   3359 static void
   3360 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
   3361 {
   3362 	const HAL_RATE_TABLE *rt;
   3363 	int i;
   3364 
   3365 	memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
   3366 	rt = sc->sc_rates[mode];
   3367 	KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
   3368 	for (i = 0; i < rt->rateCount; i++)
   3369 		sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i;
   3370 	memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
   3371 	for (i = 0; i < 32; i++)
   3372 		sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate;
   3373 	sc->sc_currates = rt;
   3374 	sc->sc_curmode = mode;
   3375 }
   3376 
   3377 /*
   3378  * Reset the rate control state for each 802.11 state transition.
   3379  */
   3380 static void
   3381 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state)
   3382 {
   3383 	struct ieee80211com *ic = &sc->sc_ic;
   3384 	struct ieee80211_node *ni;
   3385 	struct ath_node *an;
   3386 
   3387 	if (ic->ic_opmode != IEEE80211_M_STA) {
   3388 		/*
   3389 		 * When operating as a station the node table holds
   3390 		 * the AP's that were discovered during scanning.
   3391 		 * For any other operating mode we want to reset the
   3392 		 * tx rate state of each node.
   3393 		 */
   3394 		TAILQ_FOREACH(ni, &ic->ic_node, ni_list) {
   3395 			ni->ni_txrate = 0;		/* use lowest rate */
   3396 			an = (struct ath_node *) ni;
   3397 			an->an_tx_ok = an->an_tx_err = an->an_tx_retr =
   3398 			    an->an_tx_upper = 0;
   3399 		}
   3400 	}
   3401 	/*
   3402 	 * Reset local xmit state; this is really only meaningful
   3403 	 * when operating in station or adhoc mode.
   3404 	 */
   3405 	ni = ic->ic_bss;
   3406 	an = (struct ath_node *) ni;
   3407 	an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0;
   3408 	if (state == IEEE80211_S_RUN) {
   3409 		/* start with highest negotiated rate */
   3410 		KASSERT(ni->ni_rates.rs_nrates > 0,
   3411 			("transition to RUN state w/ no rates!"));
   3412 		ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
   3413 	} else {
   3414 		/* use lowest rate */
   3415 		ni->ni_txrate = 0;
   3416 	}
   3417 }
   3418 
   3419 /*
   3420  * Examine and potentially adjust the transmit rate.
   3421  */
   3422 static void
   3423 ath_rate_ctl(void *arg, struct ieee80211_node *ni)
   3424 {
   3425 	struct ath_softc *sc = arg;
   3426 	struct ath_node *an = (struct ath_node *) ni;
   3427 	struct ieee80211_rateset *rs = &ni->ni_rates;
   3428 	int mod = 0, orate, enough;
   3429 
   3430 	/*
   3431 	 * Rate control
   3432 	 * XXX: very primitive version.
   3433 	 */
   3434 	sc->sc_stats.ast_rate_calls++;
   3435 
   3436 	enough = (an->an_tx_ok + an->an_tx_err >= 10);
   3437 
   3438 	/* no packet reached -> down */
   3439 	if (an->an_tx_err > 0 && an->an_tx_ok == 0)
   3440 		mod = -1;
   3441 
   3442 	/* all packets needs retry in average -> down */
   3443 	if (enough && an->an_tx_ok < an->an_tx_retr)
   3444 		mod = -1;
   3445 
   3446 	/* no error and less than 10% of packets needs retry -> up */
   3447 	if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10)
   3448 		mod = 1;
   3449 
   3450 	orate = ni->ni_txrate;
   3451 	switch (mod) {
   3452 	case 0:
   3453 		if (enough && an->an_tx_upper > 0)
   3454 			an->an_tx_upper--;
   3455 		break;
   3456 	case -1:
   3457 		if (ni->ni_txrate > 0) {
   3458 			ni->ni_txrate--;
   3459 			sc->sc_stats.ast_rate_drop++;
   3460 		}
   3461 		an->an_tx_upper = 0;
   3462 		break;
   3463 	case 1:
   3464 		if (++an->an_tx_upper < 2)
   3465 			break;
   3466 		an->an_tx_upper = 0;
   3467 		if (ni->ni_txrate + 1 < rs->rs_nrates) {
   3468 			ni->ni_txrate++;
   3469 			sc->sc_stats.ast_rate_raise++;
   3470 		}
   3471 		break;
   3472 	}
   3473 
   3474 	if (ni->ni_txrate != orate) {
   3475 		DPRINTF(ATH_DEBUG_RATE,
   3476 		    ("%s: %dM -> %dM (%d ok, %d err, %d retr)\n",
   3477 		    __func__,
   3478 		    (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2,
   3479 		    (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2,
   3480 		    an->an_tx_ok, an->an_tx_err, an->an_tx_retr));
   3481 	}
   3482 	if (ni->ni_txrate != orate || enough)
   3483 		an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0;
   3484 }
   3485 
   3486 #ifdef AR_DEBUG
   3487 #ifdef __FreeBSD__
   3488 static int
   3489 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
   3490 {
   3491 	char dmode[64];
   3492 	int error;
   3493 
   3494 	strncpy(dmode, "", sizeof(dmode) - 1);
   3495 	dmode[sizeof(dmode) - 1] = '\0';
   3496 	error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
   3497 
   3498 	if (error == 0 && req->newptr != NULL) {
   3499 		struct ifnet *ifp;
   3500 		struct ath_softc *sc;
   3501 
   3502 		ifp = ifunit("ath0");		/* XXX */
   3503 		if (!ifp)
   3504 			return EINVAL;
   3505 		sc = ifp->if_softc;
   3506 		if (strcmp(dmode, "hal") == 0)
   3507 			ath_hal_dumpstate(sc->sc_ah);
   3508 		else
   3509 			return EINVAL;
   3510 	}
   3511 	return error;
   3512 }
   3513 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
   3514 	0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
   3515 #endif /* __FreeBSD__ */
   3516 
   3517 #if 0 /* #ifdef __NetBSD__ */
   3518 static int
   3519 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
   3520 {
   3521 	char dmode[64];
   3522 	int error;
   3523 
   3524 	strncpy(dmode, "", sizeof(dmode) - 1);
   3525 	dmode[sizeof(dmode) - 1] = '\0';
   3526 	error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
   3527 
   3528 	if (error == 0 && req->newptr != NULL) {
   3529 		struct ifnet *ifp;
   3530 		struct ath_softc *sc;
   3531 
   3532 		ifp = ifunit("ath0");		/* XXX */
   3533 		if (!ifp)
   3534 			return EINVAL;
   3535 		sc = ifp->if_softc;
   3536 		if (strcmp(dmode, "hal") == 0)
   3537 			ath_hal_dumpstate(sc->sc_ah);
   3538 		else
   3539 			return EINVAL;
   3540 	}
   3541 	return error;
   3542 }
   3543 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
   3544 	0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
   3545 #endif /* __NetBSD__ */
   3546 
   3547 static void
   3548 ath_printrxbuf(struct ath_buf *bf, int done)
   3549 {
   3550 	struct ath_desc *ds;
   3551 	int i;
   3552 
   3553 	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
   3554 		printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n",
   3555 		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
   3556 		    ds->ds_link, ds->ds_data,
   3557 		    ds->ds_ctl0, ds->ds_ctl1,
   3558 		    ds->ds_hw[0], ds->ds_hw[1],
   3559 		    !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!');
   3560 	}
   3561 }
   3562 
   3563 static void
   3564 ath_printtxbuf(struct ath_buf *bf, int done)
   3565 {
   3566 	struct ath_desc *ds;
   3567 	int i;
   3568 
   3569 	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
   3570 		printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n",
   3571 		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
   3572 		    ds->ds_link, ds->ds_data,
   3573 		    ds->ds_ctl0, ds->ds_ctl1,
   3574 		    ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3],
   3575 		    !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!');
   3576 	}
   3577 }
   3578 #endif /* AR_DEBUG */
   3579