ath.c revision 1.26
1 /* $NetBSD: ath.c,v 1.26 2004/05/25 04:38:36 atatat Exp $ */ 2 3 /*- 4 * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.54 2004/04/05 04:42:42 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.26 2004/05/25 04:38:36 atatat Exp $"); 45 #endif 46 47 /* 48 * Driver for the Atheros Wireless LAN controller. 49 * 50 * This software is derived from work of Atsushi Onoe; his contribution 51 * is greatly appreciated. 52 */ 53 54 #include "opt_inet.h" 55 56 #ifdef __NetBSD__ 57 #include "bpfilter.h" 58 #endif /* __NetBSD__ */ 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/types.h> 63 #include <sys/sysctl.h> 64 #include <sys/mbuf.h> 65 #include <sys/malloc.h> 66 #include <sys/lock.h> 67 #ifdef __FreeBSD__ 68 #include <sys/mutex.h> 69 #endif 70 #include <sys/kernel.h> 71 #include <sys/socket.h> 72 #include <sys/sockio.h> 73 #include <sys/errno.h> 74 #include <sys/callout.h> 75 #ifdef __FreeBSD__ 76 #include <sys/bus.h> 77 #else 78 #include <machine/bus.h> 79 #endif 80 #include <sys/endian.h> 81 82 #include <machine/bus.h> 83 84 #include <net/if.h> 85 #include <net/if_dl.h> 86 #include <net/if_media.h> 87 #include <net/if_arp.h> 88 #ifdef __FreeBSD__ 89 #include <net/ethernet.h> 90 #else 91 #include <net/if_ether.h> 92 #endif 93 #include <net/if_llc.h> 94 95 #include <net80211/ieee80211_var.h> 96 #include <net80211/ieee80211_compat.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #endif 101 102 #ifdef INET 103 #include <netinet/in.h> 104 #endif 105 106 #include <dev/ic/athcompat.h> 107 108 #define AR_DEBUG 109 #ifdef __FreeBSD__ 110 #include <dev/ath/if_athvar.h> 111 #include <contrib/dev/ath/ah_desc.h> 112 #else 113 #include <dev/ic/athvar.h> 114 #include <../contrib/sys/dev/ic/athhal_desc.h> 115 #endif 116 117 /* unaligned little endian access */ 118 #define LE_READ_2(p) \ 119 ((u_int16_t) \ 120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 121 #define LE_READ_4(p) \ 122 ((u_int32_t) \ 123 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 124 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 125 126 #ifdef __FreeBSD__ 127 static void ath_init(void *); 128 #else 129 static int ath_init(struct ifnet *); 130 #endif 131 static int ath_init1(struct ath_softc *); 132 static int ath_intr1(struct ath_softc *); 133 static void ath_stop(struct ifnet *); 134 static void ath_start(struct ifnet *); 135 static void ath_reset(struct ath_softc *); 136 static int ath_media_change(struct ifnet *); 137 static void ath_watchdog(struct ifnet *); 138 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 139 static void ath_fatal_proc(void *, int); 140 static void ath_rxorn_proc(void *, int); 141 static void ath_bmiss_proc(void *, int); 142 static void ath_initkeytable(struct ath_softc *); 143 static void ath_mode_init(struct ath_softc *); 144 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 145 static void ath_beacon_proc(void *, int); 146 static void ath_beacon_free(struct ath_softc *); 147 static void ath_beacon_config(struct ath_softc *); 148 static int ath_desc_alloc(struct ath_softc *); 149 static void ath_desc_free(struct ath_softc *); 150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 151 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 152 static void ath_node_copy(struct ieee80211com *, 153 struct ieee80211_node *, const struct ieee80211_node *); 154 static u_int8_t ath_node_getrssi(struct ieee80211com *, 155 struct ieee80211_node *); 156 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 157 static void ath_rx_proc(void *, int); 158 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 159 struct ath_buf *, struct mbuf *); 160 static void ath_tx_proc(void *, int); 161 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 162 static void ath_draintxq(struct ath_softc *); 163 static void ath_stoprecv(struct ath_softc *); 164 static int ath_startrecv(struct ath_softc *); 165 static void ath_next_scan(void *); 166 static void ath_calibrate(void *); 167 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 168 static void ath_newassoc(struct ieee80211com *, 169 struct ieee80211_node *, int); 170 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor, 171 HAL_BOOL xchanmode); 172 173 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 174 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 175 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 176 static void ath_rate_ctl(void *, struct ieee80211_node *); 177 178 #ifdef __NetBSD__ 179 int ath_enable(struct ath_softc *); 180 void ath_disable(struct ath_softc *); 181 void ath_power(int, void *); 182 #endif 183 184 #ifdef __FreeBSD__ 185 SYSCTL_DECL(_hw_ath); 186 /* XXX validate sysctl values */ 187 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 188 0, "channel dwell time (ms) for AP/station scanning"); 189 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 190 0, "chip calibration interval (secs)"); 191 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 192 0, "enable/disable outdoor operation"); 193 TUNABLE_INT("hw.ath.outdoor", &ath_outdoor); 194 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 195 0, "country code"); 196 TUNABLE_INT("hw.ath.countrycode", &ath_countrycode); 197 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 198 0, "regulatory domain"); 199 #endif /* __FreeBSD__ */ 200 201 #ifdef __NetBSD__ 202 static int ath_dwelltime_nodenum, ath_calibrate_nodenum, ath_outdoor_nodenum, 203 ath_countrycode_nodenum, ath_regdomain_nodenum, ath_debug_nodenum; 204 #endif /* __NetBSD__ */ 205 206 static int ath_dwelltime = 200; /* 5 channels/second */ 207 static int ath_calinterval = 30; /* calibrate every 30 secs */ 208 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 209 static int ath_xchanmode = AH_TRUE; /* enable extended channels */ 210 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 211 static int ath_regdomain = 0; /* regulatory domain */ 212 213 #ifdef AR_DEBUG 214 int ath_debug = 0; 215 #ifdef __FreeBSD__ 216 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 217 0, "control debugging printfs"); 218 TUNABLE_INT("hw.ath.debug", &ath_debug); 219 #endif /* __FreeBSD__ */ 220 #define IFF_DUMPPKTS(_ifp, _m) \ 221 ((ath_debug & _m) || \ 222 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 223 static void ath_printrxbuf(struct ath_buf *bf, int); 224 static void ath_printtxbuf(struct ath_buf *bf, int); 225 enum { 226 ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 227 ATH_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 228 ATH_DEBUG_RECV = 0x00000004, /* basic recv operation */ 229 ATH_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 230 ATH_DEBUG_RATE = 0x00000010, /* rate control */ 231 ATH_DEBUG_RESET = 0x00000020, /* reset processing */ 232 ATH_DEBUG_MODE = 0x00000040, /* mode init/setup */ 233 ATH_DEBUG_BEACON = 0x00000080, /* beacon handling */ 234 ATH_DEBUG_WATCHDOG = 0x00000100, /* watchdog timeout */ 235 ATH_DEBUG_INTR = 0x00001000, /* ISR */ 236 ATH_DEBUG_TX_PROC = 0x00002000, /* tx ISR proc */ 237 ATH_DEBUG_RX_PROC = 0x00004000, /* rx ISR proc */ 238 ATH_DEBUG_BEACON_PROC = 0x00008000, /* beacon ISR proc */ 239 ATH_DEBUG_CALIBRATE = 0x00010000, /* periodic calibration */ 240 ATH_DEBUG_ANY = 0xffffffff 241 }; 242 #define DPRINTF(_m,X) if (ath_debug & (_m)) printf X 243 #else 244 #define IFF_DUMPPKTS(_ifp, _m) \ 245 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 246 #define DPRINTF(_m, X) 247 #endif 248 249 #ifdef __NetBSD__ 250 int 251 ath_activate(struct device *self, enum devact act) 252 { 253 struct ath_softc *sc = (struct ath_softc *)self; 254 int rv = 0, s; 255 256 s = splnet(); 257 switch (act) { 258 case DVACT_ACTIVATE: 259 rv = EOPNOTSUPP; 260 break; 261 case DVACT_DEACTIVATE: 262 if_deactivate(&sc->sc_ic.ic_if); 263 break; 264 } 265 splx(s); 266 return rv; 267 } 268 269 int 270 ath_enable(struct ath_softc *sc) 271 { 272 if (ATH_IS_ENABLED(sc) == 0) { 273 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 274 printf("%s: device enable failed\n", 275 sc->sc_dev.dv_xname); 276 return (EIO); 277 } 278 sc->sc_flags |= ATH_ENABLED; 279 } 280 return (0); 281 } 282 283 void 284 ath_disable(struct ath_softc *sc) 285 { 286 if (!ATH_IS_ENABLED(sc)) 287 return; 288 if (sc->sc_disable != NULL) 289 (*sc->sc_disable)(sc); 290 sc->sc_flags &= ~ATH_ENABLED; 291 } 292 293 static int 294 sysctl_ath_verify(SYSCTLFN_ARGS) 295 { 296 int error, t; 297 struct sysctlnode node; 298 299 node = *rnode; 300 t = *(int*)rnode->sysctl_data; 301 node.sysctl_data = &t; 302 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 303 if (error || newp == NULL) 304 return (error); 305 306 DPRINTF(ATH_DEBUG_ANY, ("%s: t = %d, nodenum = %d, rnodenum = %d\n", 307 __func__, t, node.sysctl_num, rnode->sysctl_num)); 308 309 if (node.sysctl_num == ath_dwelltime_nodenum) { 310 if (t <= 0) 311 return (EINVAL); 312 } else if (node.sysctl_num == ath_calibrate_nodenum) { 313 if (t <= 0) 314 return (EINVAL); 315 #ifdef AR_DEBUG 316 } else if (node.sysctl_num == ath_debug_nodenum) { 317 if (t < 0 || t > 2) 318 return (EINVAL); 319 #endif /* AR_DEBUG */ 320 } else 321 return (EINVAL); 322 323 *(int*)rnode->sysctl_data = t; 324 325 return (0); 326 } 327 328 /* 329 * Setup sysctl(3) MIB, ath.*. 330 * 331 * TBD condition CTLFLAG_PERMANENT on being an LKM or not 332 */ 333 SYSCTL_SETUP(sysctl_ath, "sysctl ath subtree setup") 334 { 335 int rc, ath_node_num; 336 struct sysctlnode *node; 337 338 if ((rc = sysctl_createv(clog, 0, NULL, NULL, 339 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL, 340 NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) 341 goto err; 342 343 if ((rc = sysctl_createv(clog, 0, NULL, &node, 344 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ath", 345 SYSCTL_DESCR("ath information and options"), 346 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 347 goto err; 348 349 ath_node_num = node->sysctl_num; 350 351 /* channel dwell time (ms) for AP/station scanning */ 352 if ((rc = sysctl_createv(clog, 0, NULL, &node, 353 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 354 CTLTYPE_INT, "dwell", 355 SYSCTL_DESCR("Channel dwell time (ms) for AP/station scanning"), 356 sysctl_ath_verify, 0, &ath_dwelltime, 357 0, CTL_HW, ath_node_num, CTL_CREATE, 358 CTL_EOL)) != 0) 359 goto err; 360 361 ath_dwelltime_nodenum = node->sysctl_num; 362 363 /* chip calibration interval (secs) */ 364 if ((rc = sysctl_createv(clog, 0, NULL, &node, 365 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 366 CTLTYPE_INT, "calibrate", 367 SYSCTL_DESCR("Chip calibration interval (secs)"), sysctl_ath_verify, 368 0, &ath_calinterval, 0, CTL_HW, 369 ath_node_num, CTL_CREATE, CTL_EOL)) != 0) 370 goto err; 371 372 ath_calibrate_nodenum = node->sysctl_num; 373 374 /* enable/disable outdoor operation */ 375 if ((rc = sysctl_createv(clog, 0, NULL, &node, 376 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 377 "outdoor", SYSCTL_DESCR("Enable/disable outdoor operation"), 378 NULL, 0, &ath_outdoor, 0, 379 CTL_HW, ath_node_num, CTL_CREATE, 380 CTL_EOL)) != 0) 381 goto err; 382 383 ath_outdoor_nodenum = node->sysctl_num; 384 385 /* country code */ 386 if ((rc = sysctl_createv(clog, 0, NULL, &node, 387 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 388 "countrycode", SYSCTL_DESCR("Country code"), 389 NULL, 0, &ath_countrycode, 0, 390 CTL_HW, ath_node_num, CTL_CREATE, 391 CTL_EOL)) != 0) 392 goto err; 393 394 ath_countrycode_nodenum = node->sysctl_num; 395 396 /* regulatory domain */ 397 if ((rc = sysctl_createv(clog, 0, NULL, &node, 398 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 399 "regdomain", SYSCTL_DESCR("Regulatory domain"), 400 NULL, 0, &ath_regdomain, 0, 401 CTL_HW, ath_node_num, CTL_CREATE, 402 CTL_EOL)) != 0) 403 goto err; 404 405 ath_regdomain_nodenum = node->sysctl_num; 406 407 #ifdef AR_DEBUG 408 409 /* control debugging printfs */ 410 if ((rc = sysctl_createv(clog, 0, NULL, &node, 411 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 412 "debug", SYSCTL_DESCR("Enable/disable ath debugging output"), 413 sysctl_ath_verify, 0, &ath_debug, 0, 414 CTL_HW, ath_node_num, CTL_CREATE, 415 CTL_EOL)) != 0) 416 goto err; 417 418 ath_debug_nodenum = node->sysctl_num; 419 420 #endif /* AR_DEBUG */ 421 return; 422 err: 423 printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 424 } 425 #endif /* __NetBSD__ */ 426 427 int 428 ath_attach(u_int16_t devid, struct ath_softc *sc) 429 { 430 struct ieee80211com *ic = &sc->sc_ic; 431 struct ifnet *ifp = &ic->ic_if; 432 struct ath_hal *ah; 433 HAL_STATUS status; 434 int error = 0; 435 436 DPRINTF(ATH_DEBUG_ANY, ("%s: devid 0x%x\n", __func__, devid)); 437 438 #ifdef __FreeBSD__ 439 /* set these up early for if_printf use */ 440 if_initname(ifp, device_get_name(sc->sc_dev), 441 device_get_unit(sc->sc_dev)); 442 #else 443 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 444 #endif 445 446 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 447 if (ah == NULL) { 448 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 449 status); 450 error = ENXIO; 451 goto bad; 452 } 453 if (ah->ah_abi != HAL_ABI_VERSION) { 454 if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n", 455 ah->ah_abi, HAL_ABI_VERSION); 456 error = ENXIO; 457 goto bad; 458 } 459 if_printf(ifp, "mac %d.%d phy %d.%d", 460 ah->ah_macVersion, ah->ah_macRev, 461 ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf); 462 if (ah->ah_analog5GhzRev) 463 printf(" 5ghz radio %d.%d", 464 ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf); 465 if (ah->ah_analog2GhzRev) 466 printf(" 2ghz radio %d.%d", 467 ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf); 468 printf("\n"); 469 sc->sc_ah = ah; 470 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 471 472 /* 473 * Collect the channel list using the default country 474 * code and including outdoor channels. The 802.11 layer 475 * is resposible for filtering this list based on settings 476 * like the phy mode. 477 */ 478 error = ath_getchannels(sc, ath_countrycode, ath_outdoor, 479 ath_xchanmode); 480 if (error != 0) 481 goto bad; 482 /* 483 * Copy these back; they are set as a side effect 484 * of constructing the channel list. 485 */ 486 ath_regdomain = ath_hal_getregdomain(ah); 487 ath_countrycode = ath_hal_getcountrycode(ah); 488 489 /* 490 * Setup rate tables for all potential media types. 491 */ 492 ath_rate_setup(sc, IEEE80211_MODE_11A); 493 ath_rate_setup(sc, IEEE80211_MODE_11B); 494 ath_rate_setup(sc, IEEE80211_MODE_11G); 495 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 496 497 error = ath_desc_alloc(sc); 498 if (error != 0) { 499 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 500 goto bad; 501 } 502 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 503 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 504 505 #ifdef __FreeBSD__ 506 ATH_TXBUF_LOCK_INIT(sc); 507 ATH_TXQ_LOCK_INIT(sc); 508 #endif 509 510 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 511 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 512 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 513 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 514 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 515 516 /* 517 * For now just pre-allocate one data queue and one 518 * beacon queue. Note that the HAL handles resetting 519 * them at the needed time. Eventually we'll want to 520 * allocate more tx queues for splitting management 521 * frames and for QOS support. 522 */ 523 sc->sc_txhalq = ath_hal_setuptxqueue(ah, 524 HAL_TX_QUEUE_DATA, 525 AH_TRUE /* enable interrupts */ 526 ); 527 if (sc->sc_txhalq == (u_int) -1) { 528 if_printf(ifp, "unable to setup a data xmit queue!\n"); 529 goto bad2; 530 } 531 sc->sc_bhalq = ath_hal_setuptxqueue(ah, 532 HAL_TX_QUEUE_BEACON, 533 AH_TRUE /* enable interrupts */ 534 ); 535 if (sc->sc_bhalq == (u_int) -1) { 536 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 537 goto bad2; 538 } 539 540 ifp->if_softc = sc; 541 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 542 ifp->if_start = ath_start; 543 ifp->if_watchdog = ath_watchdog; 544 ifp->if_ioctl = ath_ioctl; 545 ifp->if_init = ath_init; 546 #ifdef __FreeBSD__ 547 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 548 #else 549 #if 0 550 ifp->if_stop = ath_stop; /* XXX */ 551 #endif 552 IFQ_SET_READY(&ifp->if_snd); 553 #endif 554 555 ic->ic_softc = sc; 556 ic->ic_newassoc = ath_newassoc; 557 /* XXX not right but it's not used anywhere important */ 558 ic->ic_phytype = IEEE80211_T_OFDM; 559 ic->ic_opmode = IEEE80211_M_STA; 560 ic->ic_caps = IEEE80211_C_WEP /* wep supported */ 561 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 562 | IEEE80211_C_HOSTAP /* hostap mode */ 563 | IEEE80211_C_MONITOR /* monitor mode */ 564 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 565 ; 566 567 /* get mac address from hardware */ 568 ath_hal_getmac(ah, ic->ic_myaddr); 569 570 #ifdef __NetBSD__ 571 if_attach(ifp); 572 #endif 573 /* call MI attach routine. */ 574 ieee80211_ifattach(ifp); 575 /* override default methods */ 576 ic->ic_node_alloc = ath_node_alloc; 577 sc->sc_node_free = ic->ic_node_free; 578 ic->ic_node_free = ath_node_free; 579 sc->sc_node_copy = ic->ic_node_copy; 580 ic->ic_node_copy = ath_node_copy; 581 ic->ic_node_getrssi = ath_node_getrssi; 582 sc->sc_newstate = ic->ic_newstate; 583 ic->ic_newstate = ath_newstate; 584 /* complete initialization */ 585 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 586 587 #if NBPFILTER > 0 588 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 589 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 590 &sc->sc_drvbpf); 591 #endif 592 /* 593 * Initialize constant fields. 594 * XXX make header lengths a multiple of 32-bits so subsequent 595 * headers are properly aligned; this is a kludge to keep 596 * certain applications happy. 597 * 598 * NB: the channel is setup each time we transition to the 599 * RUN state to avoid filling it in for each frame. 600 */ 601 sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(u_int32_t)); 602 sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len); 603 sc->sc_tx_th.wt_ihdr.it_present = htole32(ATH_TX_RADIOTAP_PRESENT); 604 605 sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(u_int32_t)); 606 sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len); 607 sc->sc_rx_th.wr_ihdr.it_present = htole32(ATH_RX_RADIOTAP_PRESENT); 608 609 #ifdef __NetBSD__ 610 sc->sc_flags |= ATH_ATTACHED; 611 /* 612 * Make sure the interface is shutdown during reboot. 613 */ 614 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 615 if (sc->sc_sdhook == NULL) 616 printf("%s: WARNING: unable to establish shutdown hook\n", 617 sc->sc_dev.dv_xname); 618 sc->sc_powerhook = powerhook_establish(ath_power, sc); 619 if (sc->sc_powerhook == NULL) 620 printf("%s: WARNING: unable to establish power hook\n", 621 sc->sc_dev.dv_xname); 622 #endif 623 return 0; 624 bad2: 625 ath_desc_free(sc); 626 bad: 627 if (ah) 628 ath_hal_detach(ah); 629 sc->sc_invalid = 1; 630 return error; 631 } 632 633 int 634 ath_detach(struct ath_softc *sc) 635 { 636 struct ifnet *ifp = &sc->sc_ic.ic_if; 637 ath_softc_critsect_decl(s); 638 639 if ((sc->sc_flags & ATH_ATTACHED) == 0) 640 return (0); 641 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 642 643 ath_softc_critsect_begin(sc, s); 644 ath_stop(ifp); 645 #if NBPFILTER > 0 646 bpfdetach(ifp); 647 #endif 648 ath_desc_free(sc); 649 ath_hal_detach(sc->sc_ah); 650 ieee80211_ifdetach(ifp); 651 #ifdef __NetBSD__ 652 if_detach(ifp); 653 #endif /* __NetBSD__ */ 654 ath_softc_critsect_end(sc, s); 655 #ifdef __NetBSD__ 656 powerhook_disestablish(sc->sc_powerhook); 657 shutdownhook_disestablish(sc->sc_sdhook); 658 #endif /* __NetBSD__ */ 659 #ifdef __FreeBSD__ 660 661 ATH_TXBUF_LOCK_DESTROY(sc); 662 ATH_TXQ_LOCK_DESTROY(sc); 663 664 #endif /* __FreeBSD__ */ 665 return 0; 666 } 667 668 #ifdef __NetBSD__ 669 void 670 ath_power(int why, void *arg) 671 { 672 struct ath_softc *sc = arg; 673 int s; 674 675 DPRINTF(ATH_DEBUG_ANY, ("ath_power(%d)\n", why)); 676 677 s = splnet(); 678 switch (why) { 679 case PWR_SUSPEND: 680 case PWR_STANDBY: 681 ath_suspend(sc, why); 682 break; 683 case PWR_RESUME: 684 ath_resume(sc, why); 685 break; 686 case PWR_SOFTSUSPEND: 687 case PWR_SOFTSTANDBY: 688 case PWR_SOFTRESUME: 689 break; 690 } 691 splx(s); 692 } 693 #endif 694 695 void 696 ath_suspend(struct ath_softc *sc, int why) 697 { 698 struct ifnet *ifp = &sc->sc_ic.ic_if; 699 700 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 701 702 ath_stop(ifp); 703 if (sc->sc_power != NULL) 704 (*sc->sc_power)(sc, why); 705 } 706 707 void 708 ath_resume(struct ath_softc *sc, int why) 709 { 710 struct ifnet *ifp = &sc->sc_ic.ic_if; 711 712 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 713 714 if (ifp->if_flags & IFF_UP) { 715 ath_init(ifp); 716 #if 0 717 (void)ath_intr(sc); 718 #endif 719 if (sc->sc_power != NULL) 720 (*sc->sc_power)(sc, why); 721 if (ifp->if_flags & IFF_RUNNING) 722 ath_start(ifp); 723 } 724 } 725 726 #ifdef __NetBSD__ 727 void 728 ath_shutdown(void *arg) 729 { 730 struct ath_softc *sc = arg; 731 732 ath_stop(&sc->sc_ic.ic_if); 733 } 734 #else 735 void 736 ath_shutdown(struct ath_softc *sc) 737 { 738 #if 1 739 return; 740 #else 741 struct ifnet *ifp = &sc->sc_ic.ic_if; 742 743 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 744 745 ath_stop(ifp); 746 #endif 747 } 748 #endif 749 750 #ifdef __NetBSD__ 751 int 752 ath_intr(void *arg) 753 { 754 return ath_intr1((struct ath_softc *)arg); 755 } 756 #else 757 void 758 ath_intr(void *arg) 759 { 760 (void)ath_intr1((struct ath_softc *)arg); 761 } 762 #endif 763 764 static int 765 ath_intr1(struct ath_softc *sc) 766 { 767 struct ieee80211com *ic = &sc->sc_ic; 768 struct ifnet *ifp = &ic->ic_if; 769 struct ath_hal *ah = sc->sc_ah; 770 HAL_INT status; 771 772 if (sc->sc_invalid) { 773 /* 774 * The hardware is not ready/present, don't touch anything. 775 * Note this can happen early on if the IRQ is shared. 776 */ 777 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid; ignored\n", __func__)); 778 return 0; 779 } 780 if (!ath_hal_intrpend(ah)) /* shared irq, not for us */ 781 return 0; 782 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 783 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n", 784 __func__, ifp->if_flags)); 785 ath_hal_getisr(ah, &status); /* clear ISR */ 786 ath_hal_intrset(ah, 0); /* disable further intr's */ 787 return 1; /* XXX */ 788 } 789 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 790 DPRINTF(ATH_DEBUG_INTR, ("%s: status 0x%x\n", __func__, status)); 791 #ifdef AR_DEBUG 792 if (ath_debug && 793 (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) { 794 if_printf(ifp, "ath_intr: status 0x%x\n", status); 795 ath_hal_dumpstate(ah); 796 } 797 #endif /* AR_DEBUG */ 798 status &= sc->sc_imask; /* discard unasked for bits */ 799 if (status & HAL_INT_FATAL) { 800 sc->sc_stats.ast_hardware++; 801 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 802 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 803 } else if (status & HAL_INT_RXORN) { 804 sc->sc_stats.ast_rxorn++; 805 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 806 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 807 } else { 808 if (status & HAL_INT_RXEOL) { 809 /* 810 * NB: the hardware should re-read the link when 811 * RXE bit is written, but it doesn't work at 812 * least on older hardware revs. 813 */ 814 sc->sc_stats.ast_rxeol++; 815 sc->sc_rxlink = NULL; 816 } 817 if (status & HAL_INT_TXURN) { 818 sc->sc_stats.ast_txurn++; 819 /* bump tx trigger level */ 820 ath_hal_updatetxtriglevel(ah, AH_TRUE); 821 } 822 if (status & HAL_INT_RX) 823 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 824 if (status & HAL_INT_TX) 825 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 826 if (status & HAL_INT_SWBA) { 827 /* 828 * Handle beacon transmission directly; deferring 829 * this is too slow to meet timing constraints 830 * under load. 831 */ 832 ath_beacon_proc(sc, 0); 833 } 834 if (status & HAL_INT_BMISS) { 835 sc->sc_stats.ast_bmiss++; 836 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 837 } 838 } 839 return 1; 840 } 841 842 static void 843 ath_fatal_proc(void *arg, int pending) 844 { 845 struct ath_softc *sc = arg; 846 847 device_printf(sc->sc_dev, "hardware error; resetting\n"); 848 ath_reset(sc); 849 } 850 851 static void 852 ath_rxorn_proc(void *arg, int pending) 853 { 854 struct ath_softc *sc = arg; 855 856 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 857 ath_reset(sc); 858 } 859 860 static void 861 ath_bmiss_proc(void *arg, int pending) 862 { 863 struct ath_softc *sc = arg; 864 struct ieee80211com *ic = &sc->sc_ic; 865 866 DPRINTF(ATH_DEBUG_ANY, ("%s: pending %u\n", __func__, pending)); 867 if (ic->ic_opmode != IEEE80211_M_STA) 868 return; 869 if (ic->ic_state == IEEE80211_S_RUN) { 870 /* 871 * Rather than go directly to scan state, try to 872 * reassociate first. If that fails then the state 873 * machine will drop us into scanning after timing 874 * out waiting for a probe response. 875 */ 876 ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1); 877 } 878 } 879 880 static u_int 881 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 882 { 883 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 884 885 switch (mode) { 886 case IEEE80211_MODE_AUTO: 887 return 0; 888 case IEEE80211_MODE_11A: 889 return CHANNEL_A; 890 case IEEE80211_MODE_11B: 891 return CHANNEL_B; 892 case IEEE80211_MODE_11G: 893 return CHANNEL_PUREG; 894 case IEEE80211_MODE_TURBO: 895 return CHANNEL_T; 896 default: 897 panic("%s: unsupported mode %d\n", __func__, mode); 898 return 0; 899 } 900 } 901 902 #ifdef __NetBSD__ 903 static int 904 ath_init(struct ifnet *ifp) 905 { 906 return ath_init1((struct ath_softc *)ifp->if_softc); 907 } 908 #else 909 static void 910 ath_init(void *arg) 911 { 912 (void)ath_init1((struct ath_softc *)arg); 913 } 914 #endif 915 916 static int 917 ath_init1(struct ath_softc *sc) 918 { 919 struct ieee80211com *ic = &sc->sc_ic; 920 struct ifnet *ifp = &ic->ic_if; 921 struct ieee80211_node *ni; 922 enum ieee80211_phymode mode; 923 struct ath_hal *ah = sc->sc_ah; 924 HAL_STATUS status; 925 HAL_CHANNEL hchan; 926 int error = 0; 927 ath_softc_critsect_decl(s); 928 929 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n", 930 __func__, ifp->if_flags)); 931 932 #ifdef __NetBSD__ 933 if ((error = ath_enable(sc)) != 0) 934 return error; 935 #endif 936 937 ath_softc_critsect_begin(sc, s); 938 /* 939 * Stop anything previously setup. This is safe 940 * whether this is the first time through or not. 941 */ 942 ath_stop(ifp); 943 944 /* 945 * The basic interface to setting the hardware in a good 946 * state is ``reset''. On return the hardware is known to 947 * be powered up and with interrupts disabled. This must 948 * be followed by initialization of the appropriate bits 949 * and then setup of the interrupt mask. 950 */ 951 hchan.channel = ic->ic_ibss_chan->ic_freq; 952 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 953 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 954 if_printf(ifp, "unable to reset hardware; hal status %u\n", 955 status); 956 error = -1; 957 goto done; 958 } 959 960 /* 961 * Setup the hardware after reset: the key cache 962 * is filled as needed and the receive engine is 963 * set going. Frame transmit is handled entirely 964 * in the frame output path; there's nothing to do 965 * here except setup the interrupt mask. 966 */ 967 if (ic->ic_flags & IEEE80211_F_WEPON) 968 ath_initkeytable(sc); 969 if ((error = ath_startrecv(sc)) != 0) { 970 if_printf(ifp, "unable to start recv logic\n"); 971 goto done; 972 } 973 974 /* 975 * Enable interrupts. 976 */ 977 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 978 | HAL_INT_RXEOL | HAL_INT_RXORN 979 | HAL_INT_FATAL | HAL_INT_GLOBAL; 980 ath_hal_intrset(ah, sc->sc_imask); 981 982 ifp->if_flags |= IFF_RUNNING; 983 ic->ic_state = IEEE80211_S_INIT; 984 985 /* 986 * The hardware should be ready to go now so it's safe 987 * to kick the 802.11 state machine as it's likely to 988 * immediately call back to us to send mgmt frames. 989 */ 990 ni = ic->ic_bss; 991 ni->ni_chan = ic->ic_ibss_chan; 992 mode = ieee80211_chan2mode(ic, ni->ni_chan); 993 if (mode != sc->sc_curmode) 994 ath_setcurmode(sc, mode); 995 if (ic->ic_opmode != IEEE80211_M_MONITOR) 996 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 997 else 998 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 999 done: 1000 ath_softc_critsect_end(sc, s); 1001 return error; 1002 } 1003 1004 static void 1005 ath_stop(struct ifnet *ifp) 1006 { 1007 struct ieee80211com *ic = (struct ieee80211com *) ifp; 1008 struct ath_softc *sc = ifp->if_softc; 1009 struct ath_hal *ah = sc->sc_ah; 1010 ath_softc_critsect_decl(s); 1011 1012 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid %u if_flags 0x%x\n", 1013 __func__, sc->sc_invalid, ifp->if_flags)); 1014 1015 ath_softc_critsect_begin(sc, s); 1016 if (ifp->if_flags & IFF_RUNNING) { 1017 /* 1018 * Shutdown the hardware and driver: 1019 * disable interrupts 1020 * turn off timers 1021 * clear transmit machinery 1022 * clear receive machinery 1023 * drain and release tx queues 1024 * reclaim beacon resources 1025 * reset 802.11 state machine 1026 * power down hardware 1027 * 1028 * Note that some of this work is not possible if the 1029 * hardware is gone (invalid). 1030 */ 1031 ifp->if_flags &= ~IFF_RUNNING; 1032 ifp->if_timer = 0; 1033 if (!sc->sc_invalid) 1034 ath_hal_intrset(ah, 0); 1035 ath_draintxq(sc); 1036 if (!sc->sc_invalid) 1037 ath_stoprecv(sc); 1038 else 1039 sc->sc_rxlink = NULL; 1040 #ifdef __FreeBSD__ 1041 IF_DRAIN(&ifp->if_snd); 1042 #else 1043 IF_PURGE(&ifp->if_snd); 1044 #endif 1045 ath_beacon_free(sc); 1046 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 1047 if (!sc->sc_invalid) { 1048 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 1049 } 1050 #ifdef __NetBSD__ 1051 ath_disable(sc); 1052 #endif 1053 } 1054 ath_softc_critsect_end(sc, s); 1055 } 1056 1057 /* 1058 * Reset the hardware w/o losing operational state. This is 1059 * basically a more efficient way of doing ath_stop, ath_init, 1060 * followed by state transitions to the current 802.11 1061 * operational state. Used to recover from errors rx overrun 1062 * and to reset the hardware when rf gain settings must be reset. 1063 */ 1064 static void 1065 ath_reset(struct ath_softc *sc) 1066 { 1067 struct ieee80211com *ic = &sc->sc_ic; 1068 struct ifnet *ifp = &ic->ic_if; 1069 struct ath_hal *ah = sc->sc_ah; 1070 struct ieee80211_channel *c; 1071 HAL_STATUS status; 1072 HAL_CHANNEL hchan; 1073 1074 /* 1075 * Convert to a HAL channel description with the flags 1076 * constrained to reflect the current operating mode. 1077 */ 1078 c = ic->ic_ibss_chan; 1079 hchan.channel = c->ic_freq; 1080 hchan.channelFlags = ath_chan2flags(ic, c); 1081 1082 ath_hal_intrset(ah, 0); /* disable interrupts */ 1083 ath_draintxq(sc); /* stop xmit side */ 1084 ath_stoprecv(sc); /* stop recv side */ 1085 /* NB: indicate channel change so we do a full reset */ 1086 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 1087 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 1088 __func__, status); 1089 ath_hal_intrset(ah, sc->sc_imask); 1090 if (ath_startrecv(sc) != 0) /* restart recv */ 1091 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 1092 ath_start(ifp); /* restart xmit */ 1093 if (ic->ic_state == IEEE80211_S_RUN) 1094 ath_beacon_config(sc); /* restart beacons */ 1095 } 1096 1097 static void 1098 ath_start(struct ifnet *ifp) 1099 { 1100 struct ath_softc *sc = ifp->if_softc; 1101 struct ath_hal *ah = sc->sc_ah; 1102 struct ieee80211com *ic = &sc->sc_ic; 1103 struct ieee80211_node *ni; 1104 struct ath_buf *bf; 1105 struct mbuf *m; 1106 struct ieee80211_frame *wh; 1107 ath_txbuf_critsect_decl(s); 1108 1109 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1110 return; 1111 for (;;) { 1112 /* 1113 * Grab a TX buffer and associated resources. 1114 */ 1115 ath_txbuf_critsect_begin(sc, s); 1116 bf = TAILQ_FIRST(&sc->sc_txbuf); 1117 if (bf != NULL) 1118 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 1119 ath_txbuf_critsect_end(sc, s); 1120 if (bf == NULL) { 1121 DPRINTF(ATH_DEBUG_ANY, ("%s: out of xmit buffers\n", 1122 __func__)); 1123 sc->sc_stats.ast_tx_qstop++; 1124 ifp->if_flags |= IFF_OACTIVE; 1125 break; 1126 } 1127 /* 1128 * Poll the management queue for frames; they 1129 * have priority over normal data frames. 1130 */ 1131 IF_DEQUEUE(&ic->ic_mgtq, m); 1132 if (m == NULL) { 1133 /* 1134 * No data frames go out unless we're associated. 1135 */ 1136 if (ic->ic_state != IEEE80211_S_RUN) { 1137 DPRINTF(ATH_DEBUG_ANY, 1138 ("%s: ignore data packet, state %u\n", 1139 __func__, ic->ic_state)); 1140 sc->sc_stats.ast_tx_discard++; 1141 ath_txbuf_critsect_begin(sc, s); 1142 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1143 ath_txbuf_critsect_end(sc, s); 1144 break; 1145 } 1146 IF_DEQUEUE(&ifp->if_snd, m); 1147 if (m == NULL) { 1148 ath_txbuf_critsect_begin(sc, s); 1149 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1150 ath_txbuf_critsect_end(sc, s); 1151 break; 1152 } 1153 ifp->if_opackets++; 1154 1155 #ifdef __NetBSD__ 1156 #if NBPFILTER > 0 1157 if (ifp->if_bpf) 1158 bpf_mtap(ifp->if_bpf, m); 1159 #endif 1160 #endif 1161 #ifdef __FreeBSD__ 1162 BPF_MTAP(ifp, m); 1163 #endif 1164 /* 1165 * Encapsulate the packet in prep for transmission. 1166 */ 1167 m = ieee80211_encap(ifp, m, &ni); 1168 if (m == NULL) { 1169 DPRINTF(ATH_DEBUG_ANY, 1170 ("%s: encapsulation failure\n", 1171 __func__)); 1172 sc->sc_stats.ast_tx_encap++; 1173 goto bad; 1174 } 1175 wh = mtod(m, struct ieee80211_frame *); 1176 if (ic->ic_flags & IEEE80211_F_WEPON) 1177 wh->i_fc[1] |= IEEE80211_FC1_WEP; 1178 } else { 1179 /* 1180 * Hack! The referenced node pointer is in the 1181 * rcvif field of the packet header. This is 1182 * placed there by ieee80211_mgmt_output because 1183 * we need to hold the reference with the frame 1184 * and there's no other way (other than packet 1185 * tags which we consider too expensive to use) 1186 * to pass it along. 1187 */ 1188 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1189 m->m_pkthdr.rcvif = NULL; 1190 1191 wh = mtod(m, struct ieee80211_frame *); 1192 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1193 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 1194 /* fill time stamp */ 1195 u_int64_t tsf; 1196 u_int32_t *tstamp; 1197 1198 tsf = ath_hal_gettsf64(ah); 1199 /* XXX: adjust 100us delay to xmit */ 1200 tsf += 100; 1201 tstamp = (u_int32_t *)&wh[1]; 1202 tstamp[0] = htole32(tsf & 0xffffffff); 1203 tstamp[1] = htole32(tsf >> 32); 1204 } 1205 sc->sc_stats.ast_tx_mgmt++; 1206 } 1207 1208 if (ath_tx_start(sc, ni, bf, m)) { 1209 bad: 1210 ath_txbuf_critsect_begin(sc, s); 1211 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1212 ath_txbuf_critsect_end(sc, s); 1213 ifp->if_oerrors++; 1214 if (ni && ni != ic->ic_bss) 1215 ieee80211_free_node(ic, ni); 1216 continue; 1217 } 1218 1219 sc->sc_tx_timer = 5; 1220 ifp->if_timer = 1; 1221 } 1222 } 1223 1224 static int 1225 ath_media_change(struct ifnet *ifp) 1226 { 1227 int error; 1228 1229 error = ieee80211_media_change(ifp); 1230 if (error == ENETRESET) { 1231 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1232 (IFF_RUNNING|IFF_UP)) 1233 ath_init(ifp); /* XXX lose error */ 1234 error = 0; 1235 } 1236 return error; 1237 } 1238 1239 static void 1240 ath_watchdog(struct ifnet *ifp) 1241 { 1242 struct ath_softc *sc = ifp->if_softc; 1243 struct ieee80211com *ic = &sc->sc_ic; 1244 1245 ifp->if_timer = 0; 1246 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1247 return; 1248 if (sc->sc_tx_timer) { 1249 if (--sc->sc_tx_timer == 0) { 1250 if_printf(ifp, "device timeout\n"); 1251 #ifdef AR_DEBUG 1252 if (ath_debug & ATH_DEBUG_WATCHDOG) 1253 ath_hal_dumpstate(sc->sc_ah); 1254 #endif /* AR_DEBUG */ 1255 ath_reset(sc); 1256 ifp->if_oerrors++; 1257 sc->sc_stats.ast_watchdog++; 1258 return; 1259 } 1260 ifp->if_timer = 1; 1261 } 1262 if (ic->ic_fixed_rate == -1) { 1263 /* 1264 * Run the rate control algorithm if we're not 1265 * locked at a fixed rate. 1266 */ 1267 if (ic->ic_opmode == IEEE80211_M_STA) 1268 ath_rate_ctl(sc, ic->ic_bss); 1269 else 1270 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1271 } 1272 ieee80211_watchdog(ifp); 1273 } 1274 1275 static int 1276 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1277 { 1278 struct ath_softc *sc = ifp->if_softc; 1279 struct ifreq *ifr = (struct ifreq *)data; 1280 int error = 0; 1281 ath_softc_critsect_decl(s); 1282 1283 ath_softc_critsect_begin(sc, s); 1284 switch (cmd) { 1285 case SIOCSIFFLAGS: 1286 if (ifp->if_flags & IFF_UP) { 1287 if (ifp->if_flags & IFF_RUNNING) { 1288 /* 1289 * To avoid rescanning another access point, 1290 * do not call ath_init() here. Instead, 1291 * only reflect promisc mode settings. 1292 */ 1293 ath_mode_init(sc); 1294 } else { 1295 /* 1296 * Beware of being called during detach to 1297 * reset promiscuous mode. In that case we 1298 * will still be marked UP but not RUNNING. 1299 * However trying to re-init the interface 1300 * is the wrong thing to do as we've already 1301 * torn down much of our state. There's 1302 * probably a better way to deal with this. 1303 */ 1304 if (!sc->sc_invalid) 1305 ath_init(ifp); /* XXX lose error */ 1306 } 1307 } else 1308 ath_stop(ifp); 1309 break; 1310 case SIOCADDMULTI: 1311 case SIOCDELMULTI: 1312 #ifdef __FreeBSD__ 1313 /* 1314 * The upper layer has already installed/removed 1315 * the multicast address(es), just recalculate the 1316 * multicast filter for the card. 1317 */ 1318 if (ifp->if_flags & IFF_RUNNING) 1319 ath_mode_init(sc); 1320 #endif 1321 #ifdef __NetBSD__ 1322 error = (cmd == SIOCADDMULTI) ? 1323 ether_addmulti(ifr, &sc->sc_ic.ic_ec) : 1324 ether_delmulti(ifr, &sc->sc_ic.ic_ec); 1325 if (error == ENETRESET) { 1326 if (ifp->if_flags & IFF_RUNNING) 1327 ath_mode_init(sc); 1328 error = 0; 1329 } 1330 #endif 1331 break; 1332 case SIOCGATHSTATS: 1333 error = copyout(&sc->sc_stats, 1334 ifr->ifr_data, sizeof (sc->sc_stats)); 1335 break; 1336 case SIOCGATHDIAG: { 1337 struct ath_diag *ad = (struct ath_diag *)data; 1338 struct ath_hal *ah = sc->sc_ah; 1339 void *data; 1340 u_int size; 1341 1342 if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) { 1343 if (size < ad->ad_size) 1344 ad->ad_size = size; 1345 if (data) 1346 error = copyout(data, ad->ad_data, ad->ad_size); 1347 } else 1348 error = EINVAL; 1349 break; 1350 } 1351 default: 1352 error = ieee80211_ioctl(ifp, cmd, data); 1353 if (error == ENETRESET) { 1354 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1355 (IFF_RUNNING|IFF_UP)) 1356 ath_init(ifp); /* XXX lose error */ 1357 error = 0; 1358 } 1359 break; 1360 } 1361 ath_softc_critsect_end(sc, s); 1362 return error; 1363 } 1364 1365 /* 1366 * Fill the hardware key cache with key entries. 1367 */ 1368 static void 1369 ath_initkeytable(struct ath_softc *sc) 1370 { 1371 struct ieee80211com *ic = &sc->sc_ic; 1372 struct ath_hal *ah = sc->sc_ah; 1373 int i; 1374 1375 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1376 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1377 if (k->wk_len == 0) 1378 ath_hal_keyreset(ah, i); 1379 else 1380 /* XXX return value */ 1381 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 1382 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 1383 } 1384 } 1385 1386 static void 1387 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1388 { 1389 u_int32_t val; 1390 u_int8_t pos; 1391 1392 val = LE_READ_4(dl + 0); 1393 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1394 val = LE_READ_4(dl + 3); 1395 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1396 pos &= 0x3f; 1397 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1398 } 1399 1400 #ifdef __FreeBSD__ 1401 static void 1402 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1403 { 1404 struct ieee80211com *ic = &sc->sc_ic; 1405 struct ifnet *ifp = &ic->ic_if; 1406 struct ifmultiaddr *ifma; 1407 1408 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1409 caddr_t dl; 1410 1411 /* calculate XOR of eight 6bit values */ 1412 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1413 ath_mcastfilter_accum(dl, &mfilt); 1414 } 1415 } 1416 #else 1417 static void 1418 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1419 { 1420 struct ifnet *ifp = &sc->sc_ic.ic_if; 1421 struct ether_multi *enm; 1422 struct ether_multistep estep; 1423 1424 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1425 while (enm != NULL) { 1426 /* XXX Punt on ranges. */ 1427 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1428 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1429 ifp->if_flags |= IFF_ALLMULTI; 1430 return; 1431 } 1432 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1433 ETHER_NEXT_MULTI(estep, enm); 1434 } 1435 ifp->if_flags &= ~IFF_ALLMULTI; 1436 } 1437 #endif 1438 1439 /* 1440 * Calculate the receive filter according to the 1441 * operating mode and state: 1442 * 1443 * o always accept unicast, broadcast, and multicast traffic 1444 * o maintain current state of phy error reception 1445 * o probe request frames are accepted only when operating in 1446 * hostap, adhoc, or monitor modes 1447 * o enable promiscuous mode according to the interface state 1448 * o accept beacons: 1449 * - when operating in adhoc mode so the 802.11 layer creates 1450 * node table entries for peers, 1451 * - when operating in station mode for collecting rssi data when 1452 * the station is otherwise quiet, or 1453 * - when scanning 1454 */ 1455 static u_int32_t 1456 ath_calcrxfilter(struct ath_softc *sc) 1457 { 1458 struct ieee80211com *ic = &sc->sc_ic; 1459 struct ath_hal *ah = sc->sc_ah; 1460 struct ifnet *ifp = &ic->ic_if; 1461 u_int32_t rfilt; 1462 1463 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1464 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1465 if (ic->ic_opmode != IEEE80211_M_STA) 1466 rfilt |= HAL_RX_FILTER_PROBEREQ; 1467 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 1468 (ifp->if_flags & IFF_PROMISC)) 1469 rfilt |= HAL_RX_FILTER_PROM; 1470 if (ic->ic_opmode == IEEE80211_M_STA || 1471 ic->ic_opmode == IEEE80211_M_IBSS || 1472 ic->ic_state == IEEE80211_S_SCAN) 1473 rfilt |= HAL_RX_FILTER_BEACON; 1474 return rfilt; 1475 } 1476 1477 static void 1478 ath_mode_init(struct ath_softc *sc) 1479 { 1480 #ifdef __FreeBSD__ 1481 struct ieee80211com *ic = &sc->sc_ic; 1482 #endif 1483 struct ath_hal *ah = sc->sc_ah; 1484 u_int32_t rfilt, mfilt[2]; 1485 1486 /* configure rx filter */ 1487 rfilt = ath_calcrxfilter(sc); 1488 ath_hal_setrxfilter(ah, rfilt); 1489 1490 /* configure operational mode */ 1491 ath_hal_setopmode(ah); 1492 1493 /* calculate and install multicast filter */ 1494 #ifdef __FreeBSD__ 1495 if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) { 1496 mfilt[0] = mfilt[1] = 0; 1497 ath_mcastfilter_compute(sc, &mfilt); 1498 } else { 1499 mfilt[0] = mfilt[1] = ~0; 1500 } 1501 #endif 1502 #ifdef __NetBSD__ 1503 mfilt[0] = mfilt[1] = 0; 1504 ath_mcastfilter_compute(sc, &mfilt); 1505 #endif 1506 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1507 DPRINTF(ATH_DEBUG_MODE, ("%s: RX filter 0x%x, MC filter %08x:%08x\n", 1508 __func__, rfilt, mfilt[0], mfilt[1])); 1509 } 1510 1511 #ifdef __FreeBSD__ 1512 static void 1513 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1514 { 1515 struct ath_buf *bf = arg; 1516 1517 KASSERT(nseg <= ATH_MAX_SCATTER, 1518 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1519 bf->bf_mapsize = mapsize; 1520 bf->bf_nseg = nseg; 1521 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1522 } 1523 #endif /* __FreeBSD__ */ 1524 1525 static struct mbuf * 1526 ath_getmbuf(int flags, int type, u_int pktlen) 1527 { 1528 struct mbuf *m; 1529 1530 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1531 #ifdef __FreeBSD__ 1532 if (pktlen <= MHLEN) 1533 MGETHDR(m, flags, type); 1534 else 1535 m = m_getcl(flags, type, M_PKTHDR); 1536 #else 1537 MGETHDR(m, flags, type); 1538 if (m != NULL && pktlen > MHLEN) 1539 MCLGET(m, flags); 1540 #endif 1541 return m; 1542 } 1543 1544 static int 1545 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1546 { 1547 struct ieee80211com *ic = &sc->sc_ic; 1548 struct ifnet *ifp = &ic->ic_if; 1549 struct ath_hal *ah = sc->sc_ah; 1550 struct ieee80211_frame *wh; 1551 struct ath_buf *bf; 1552 struct ath_desc *ds; 1553 struct mbuf *m; 1554 int error, pktlen; 1555 u_int8_t *frm, rate; 1556 u_int16_t capinfo; 1557 struct ieee80211_rateset *rs; 1558 const HAL_RATE_TABLE *rt; 1559 1560 bf = sc->sc_bcbuf; 1561 if (bf->bf_m != NULL) { 1562 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1563 m_freem(bf->bf_m); 1564 bf->bf_m = NULL; 1565 bf->bf_node = NULL; 1566 } 1567 /* 1568 * NB: the beacon data buffer must be 32-bit aligned; 1569 * we assume the mbuf routines will return us something 1570 * with this alignment (perhaps should assert). 1571 */ 1572 rs = &ni->ni_rates; 1573 pktlen = sizeof (struct ieee80211_frame) 1574 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6; 1575 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1576 pktlen += 2; 1577 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1578 if (m == NULL) { 1579 DPRINTF(ATH_DEBUG_BEACON, 1580 ("%s: cannot get mbuf/cluster; size %u\n", 1581 __func__, pktlen)); 1582 sc->sc_stats.ast_be_nombuf++; 1583 return ENOMEM; 1584 } 1585 1586 wh = mtod(m, struct ieee80211_frame *); 1587 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1588 IEEE80211_FC0_SUBTYPE_BEACON; 1589 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1590 *(u_int16_t *)wh->i_dur = 0; 1591 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1592 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1593 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1594 *(u_int16_t *)wh->i_seq = 0; 1595 1596 /* 1597 * beacon frame format 1598 * [8] time stamp 1599 * [2] beacon interval 1600 * [2] cabability information 1601 * [tlv] ssid 1602 * [tlv] supported rates 1603 * [tlv] parameter set (IBSS) 1604 * [tlv] extended supported rates 1605 */ 1606 frm = (u_int8_t *)&wh[1]; 1607 memset(frm, 0, 8); /* timestamp is set by hardware */ 1608 frm += 8; 1609 *(u_int16_t *)frm = htole16(ni->ni_intval); 1610 frm += 2; 1611 if (ic->ic_opmode == IEEE80211_M_IBSS) 1612 capinfo = IEEE80211_CAPINFO_IBSS; 1613 else 1614 capinfo = IEEE80211_CAPINFO_ESS; 1615 if (ic->ic_flags & IEEE80211_F_WEPON) 1616 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1617 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1618 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 1619 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1620 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1621 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1622 *(u_int16_t *)frm = htole16(capinfo); 1623 frm += 2; 1624 *frm++ = IEEE80211_ELEMID_SSID; 1625 *frm++ = ni->ni_esslen; 1626 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1627 frm += ni->ni_esslen; 1628 frm = ieee80211_add_rates(frm, rs); 1629 *frm++ = IEEE80211_ELEMID_DSPARMS; 1630 *frm++ = 1; 1631 *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan); 1632 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1633 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1634 *frm++ = 2; 1635 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1636 } else { 1637 /* TODO: TIM */ 1638 *frm++ = IEEE80211_ELEMID_TIM; 1639 *frm++ = 4; /* length */ 1640 *frm++ = 0; /* DTIM count */ 1641 *frm++ = 1; /* DTIM period */ 1642 *frm++ = 0; /* bitmap control */ 1643 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1644 } 1645 frm = ieee80211_add_xrates(frm, rs); 1646 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1647 KASSERT(m->m_pkthdr.len <= pktlen, 1648 ("beacon bigger than expected, len %u calculated %u", 1649 m->m_pkthdr.len, pktlen)); 1650 1651 DPRINTF(ATH_DEBUG_BEACON, ("%s: m %p len %u\n", __func__, m, m->m_len)); 1652 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1653 if (error != 0) { 1654 m_freem(m); 1655 return error; 1656 } 1657 KASSERT(bf->bf_nseg == 1, 1658 ("%s: multi-segment packet; nseg %u", __func__, bf->bf_nseg)); 1659 bf->bf_m = m; 1660 1661 /* setup descriptors */ 1662 ds = bf->bf_desc; 1663 1664 ds->ds_link = 0; 1665 ds->ds_data = bf->bf_segs[0].ds_addr; 1666 1667 DPRINTF(ATH_DEBUG_ANY, ("%s: segaddr %p seglen %u\n", __func__, 1668 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1669 1670 /* 1671 * Calculate rate code. 1672 * XXX everything at min xmit rate 1673 */ 1674 rt = sc->sc_currates; 1675 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1676 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1677 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1678 else 1679 rate = rt->info[0].rateCode; 1680 if (!ath_hal_setuptxdesc(ah, ds 1681 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1682 , sizeof(struct ieee80211_frame) /* header length */ 1683 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1684 , 0x20 /* txpower XXX */ 1685 , rate, 1 /* series 0 rate/tries */ 1686 , HAL_TXKEYIX_INVALID /* no encryption */ 1687 , 0 /* antenna mode */ 1688 , HAL_TXDESC_NOACK /* no ack for beacons */ 1689 , 0 /* rts/cts rate */ 1690 , 0 /* rts/cts duration */ 1691 )) { 1692 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1693 return -1; 1694 } 1695 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1696 /* XXX verify mbuf data area covers this roundup */ 1697 if (!ath_hal_filltxdesc(ah, ds 1698 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1699 , AH_TRUE /* first segment */ 1700 , AH_TRUE /* last segment */ 1701 )) { 1702 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1703 return -1; 1704 } 1705 1706 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1707 1708 return 0; 1709 } 1710 1711 static void 1712 ath_beacon_proc(void *arg, int pending) 1713 { 1714 struct ath_softc *sc = arg; 1715 struct ieee80211com *ic = &sc->sc_ic; 1716 struct ath_buf *bf = sc->sc_bcbuf; 1717 struct ath_hal *ah = sc->sc_ah; 1718 1719 DPRINTF(ATH_DEBUG_BEACON_PROC, ("%s: pending %u\n", __func__, pending)); 1720 if (ic->ic_opmode == IEEE80211_M_STA || 1721 bf == NULL || bf->bf_m == NULL) { 1722 DPRINTF(ATH_DEBUG_ANY, ("%s: ic_flags=%x bf=%p bf_m=%p\n", 1723 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1724 return; 1725 } 1726 /* TODO: update beacon to reflect PS poll state */ 1727 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1728 DPRINTF(ATH_DEBUG_ANY, ("%s: beacon queue %u did not stop?\n", 1729 __func__, sc->sc_bhalq)); 1730 /* NB: the HAL still stops DMA, so proceed */ 1731 } 1732 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1733 1734 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1735 ath_hal_txstart(ah, sc->sc_bhalq); 1736 DPRINTF(ATH_DEBUG_BEACON_PROC, 1737 ("%s: TXDP%u = %p (%p)\n", __func__, 1738 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1739 } 1740 1741 static void 1742 ath_beacon_free(struct ath_softc *sc) 1743 { 1744 struct ath_buf *bf = sc->sc_bcbuf; 1745 1746 if (bf->bf_m != NULL) { 1747 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1748 m_freem(bf->bf_m); 1749 bf->bf_m = NULL; 1750 bf->bf_node = NULL; 1751 } 1752 } 1753 1754 /* 1755 * Configure the beacon and sleep timers. 1756 * 1757 * When operating as an AP this resets the TSF and sets 1758 * up the hardware to notify us when we need to issue beacons. 1759 * 1760 * When operating in station mode this sets up the beacon 1761 * timers according to the timestamp of the last received 1762 * beacon and the current TSF, configures PCF and DTIM 1763 * handling, programs the sleep registers so the hardware 1764 * will wakeup in time to receive beacons, and configures 1765 * the beacon miss handling so we'll receive a BMISS 1766 * interrupt when we stop seeing beacons from the AP 1767 * we've associated with. 1768 */ 1769 static void 1770 ath_beacon_config(struct ath_softc *sc) 1771 { 1772 struct ath_hal *ah = sc->sc_ah; 1773 struct ieee80211com *ic = &sc->sc_ic; 1774 struct ieee80211_node *ni = ic->ic_bss; 1775 u_int32_t nexttbtt; 1776 1777 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1778 (LE_READ_4(ni->ni_tstamp) >> 10); 1779 DPRINTF(ATH_DEBUG_BEACON, ("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1780 nexttbtt += ni->ni_intval; 1781 if (ic->ic_opmode == IEEE80211_M_STA) { 1782 HAL_BEACON_STATE bs; 1783 u_int32_t bmisstime; 1784 1785 /* NB: no PCF support right now */ 1786 memset(&bs, 0, sizeof(bs)); 1787 bs.bs_intval = ni->ni_intval; 1788 bs.bs_nexttbtt = nexttbtt; 1789 bs.bs_dtimperiod = bs.bs_intval; 1790 bs.bs_nextdtim = nexttbtt; 1791 /* 1792 * Calculate the number of consecutive beacons to miss 1793 * before taking a BMISS interrupt. The configuration 1794 * is specified in ms, so we need to convert that to 1795 * TU's and then calculate based on the beacon interval. 1796 * Note that we clamp the result to at most 10 beacons. 1797 */ 1798 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1799 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1800 if (bs.bs_bmissthreshold > 10) 1801 bs.bs_bmissthreshold = 10; 1802 else if (bs.bs_bmissthreshold <= 0) 1803 bs.bs_bmissthreshold = 1; 1804 1805 /* 1806 * Calculate sleep duration. The configuration is 1807 * given in ms. We insure a multiple of the beacon 1808 * period is used. Also, if the sleep duration is 1809 * greater than the DTIM period then it makes senses 1810 * to make it a multiple of that. 1811 * 1812 * XXX fixed at 100ms 1813 */ 1814 bs.bs_sleepduration = 1815 roundup((100 * 1000) / 1024, bs.bs_intval); 1816 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1817 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1818 1819 DPRINTF(ATH_DEBUG_BEACON, 1820 ("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1821 , __func__ 1822 , bs.bs_intval 1823 , bs.bs_nexttbtt 1824 , bs.bs_dtimperiod 1825 , bs.bs_nextdtim 1826 , bs.bs_bmissthreshold 1827 , bs.bs_sleepduration 1828 )); 1829 ath_hal_intrset(ah, 0); 1830 /* 1831 * Reset our tsf so the hardware will update the 1832 * tsf register to reflect timestamps found in 1833 * received beacons. 1834 */ 1835 ath_hal_resettsf(ah); 1836 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1837 sc->sc_imask |= HAL_INT_BMISS; 1838 ath_hal_intrset(ah, sc->sc_imask); 1839 } else { 1840 DPRINTF(ATH_DEBUG_BEACON, ("%s: intval %u nexttbtt %u\n", 1841 __func__, ni->ni_intval, nexttbtt)); 1842 ath_hal_intrset(ah, 0); 1843 ath_hal_beaconinit(ah, nexttbtt, ni->ni_intval); 1844 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1845 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1846 ath_hal_intrset(ah, sc->sc_imask); 1847 } 1848 } 1849 1850 #ifdef __FreeBSD__ 1851 static void 1852 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1853 { 1854 bus_addr_t *paddr = (bus_addr_t*) arg; 1855 *paddr = segs->ds_addr; 1856 } 1857 #endif 1858 1859 #ifdef __FreeBSD__ 1860 static int 1861 ath_desc_alloc(struct ath_softc *sc) 1862 { 1863 int i, bsize, error; 1864 struct ath_desc *ds; 1865 struct ath_buf *bf; 1866 1867 /* allocate descriptors */ 1868 sc->sc_desc_len = sizeof(struct ath_desc) * 1869 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1870 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1871 if (error != 0) 1872 return error; 1873 1874 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1875 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1876 1877 if (error != 0) 1878 goto fail0; 1879 1880 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1881 sc->sc_desc, sc->sc_desc_len, 1882 ath_load_cb, &sc->sc_desc_paddr, 1883 BUS_DMA_NOWAIT); 1884 if (error != 0) 1885 goto fail1; 1886 1887 ds = sc->sc_desc; 1888 DPRINTF(ATH_DEBUG_ANY, ("%s: DMA map: %p (%lu) -> %p (%lu)\n", 1889 __func__, ds, (u_long) sc->sc_desc_len, (caddr_t) sc->sc_desc_paddr, 1890 /*XXX*/ (u_long) sc->sc_desc_len)); 1891 1892 /* allocate buffers */ 1893 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1894 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1895 if (bf == NULL) { 1896 printf("%s: unable to allocate Tx/Rx buffers\n", 1897 sc->sc_dev.dv_xname); 1898 error = -1; 1899 goto fail2; 1900 } 1901 sc->sc_bufptr = bf; 1902 1903 TAILQ_INIT(&sc->sc_rxbuf); 1904 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1905 bf->bf_desc = ds; 1906 bf->bf_daddr = sc->sc_desc_paddr + 1907 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1908 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1909 &bf->bf_dmamap); 1910 if (error != 0) 1911 break; 1912 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1913 } 1914 1915 TAILQ_INIT(&sc->sc_txbuf); 1916 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1917 bf->bf_desc = ds; 1918 bf->bf_daddr = sc->sc_desc_paddr + 1919 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1920 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1921 &bf->bf_dmamap); 1922 if (error != 0) 1923 break; 1924 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1925 } 1926 TAILQ_INIT(&sc->sc_txq); 1927 1928 /* beacon buffer */ 1929 bf->bf_desc = ds; 1930 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1931 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1932 if (error != 0) 1933 return error; 1934 sc->sc_bcbuf = bf; 1935 return 0; 1936 1937 fail2: 1938 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1939 fail1: 1940 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1941 fail0: 1942 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1943 sc->sc_ddmamap = NULL; 1944 return error; 1945 } 1946 #else 1947 static int 1948 ath_desc_alloc(struct ath_softc *sc) 1949 { 1950 int i, bsize, error = -1; 1951 struct ath_desc *ds; 1952 struct ath_buf *bf; 1953 1954 /* allocate descriptors */ 1955 sc->sc_desc_len = sizeof(struct ath_desc) * 1956 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1957 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1958 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1959 printf("%s: unable to allocate control data, error = %d\n", 1960 sc->sc_dev.dv_xname, error); 1961 goto fail0; 1962 } 1963 1964 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1965 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1966 printf("%s: unable to map control data, error = %d\n", 1967 sc->sc_dev.dv_xname, error); 1968 goto fail1; 1969 } 1970 1971 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1972 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 1973 printf("%s: unable to create control data DMA map, " 1974 "error = %d\n", sc->sc_dev.dv_xname, error); 1975 goto fail2; 1976 } 1977 1978 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 1979 sc->sc_desc_len, NULL, 0)) != 0) { 1980 printf("%s: unable to load control data DMA map, error = %d\n", 1981 sc->sc_dev.dv_xname, error); 1982 goto fail3; 1983 } 1984 1985 ds = sc->sc_desc; 1986 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 1987 1988 DPRINTF(ATH_DEBUG_XMIT_DESC|ATH_DEBUG_RECV_DESC, 1989 ("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 1990 ds, (u_long)sc->sc_desc_len, 1991 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1992 1993 /* allocate buffers */ 1994 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1995 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1996 if (bf == NULL) { 1997 printf("%s: unable to allocate Tx/Rx buffers\n", 1998 sc->sc_dev.dv_xname); 1999 error = ENOMEM; 2000 goto fail3; 2001 } 2002 sc->sc_bufptr = bf; 2003 2004 TAILQ_INIT(&sc->sc_rxbuf); 2005 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 2006 bf->bf_desc = ds; 2007 bf->bf_daddr = sc->sc_desc_paddr + 2008 ((caddr_t)ds - (caddr_t)sc->sc_desc); 2009 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 2010 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 2011 printf("%s: unable to create Rx dmamap, error = %d\n", 2012 sc->sc_dev.dv_xname, error); 2013 goto fail4; 2014 } 2015 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2016 } 2017 2018 TAILQ_INIT(&sc->sc_txbuf); 2019 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 2020 bf->bf_desc = ds; 2021 bf->bf_daddr = sc->sc_desc_paddr + 2022 ((caddr_t)ds - (caddr_t)sc->sc_desc); 2023 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 2024 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 2025 printf("%s: unable to create Tx dmamap, error = %d\n", 2026 sc->sc_dev.dv_xname, error); 2027 goto fail5; 2028 } 2029 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2030 } 2031 TAILQ_INIT(&sc->sc_txq); 2032 2033 /* beacon buffer */ 2034 bf->bf_desc = ds; 2035 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 2036 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 2037 &bf->bf_dmamap)) != 0) { 2038 printf("%s: unable to create beacon dmamap, error = %d\n", 2039 sc->sc_dev.dv_xname, error); 2040 goto fail5; 2041 } 2042 sc->sc_bcbuf = bf; 2043 return 0; 2044 2045 fail5: 2046 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 2047 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2048 continue; 2049 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2050 } 2051 fail4: 2052 for (i = 0; i < ATH_RXBUF; i++) { 2053 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2054 continue; 2055 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2056 } 2057 fail3: 2058 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2059 fail2: 2060 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2061 sc->sc_ddmamap = NULL; 2062 fail1: 2063 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 2064 fail0: 2065 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2066 return error; 2067 } 2068 #endif 2069 2070 static void 2071 ath_desc_free(struct ath_softc *sc) 2072 { 2073 struct ath_buf *bf; 2074 2075 #ifdef __FreeBSD__ 2076 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2077 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 2078 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2079 #else 2080 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2081 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2082 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2083 #endif 2084 2085 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2086 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2087 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2088 m_freem(bf->bf_m); 2089 } 2090 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 2091 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2092 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2093 if (bf->bf_m) { 2094 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2095 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2096 m_freem(bf->bf_m); 2097 bf->bf_m = NULL; 2098 } 2099 } 2100 if (sc->sc_bcbuf != NULL) { 2101 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2102 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2103 sc->sc_bcbuf = NULL; 2104 } 2105 2106 TAILQ_INIT(&sc->sc_rxbuf); 2107 TAILQ_INIT(&sc->sc_txbuf); 2108 TAILQ_INIT(&sc->sc_txq); 2109 free(sc->sc_bufptr, M_DEVBUF); 2110 sc->sc_bufptr = NULL; 2111 } 2112 2113 static struct ieee80211_node * 2114 ath_node_alloc(struct ieee80211com *ic) 2115 { 2116 struct ath_node *an = 2117 malloc(sizeof(struct ath_node), M_80211_NODE, M_NOWAIT|M_ZERO); 2118 if (an) { 2119 int i; 2120 for (i = 0; i < ATH_RHIST_SIZE; i++) 2121 an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME; 2122 an->an_rx_hist_next = ATH_RHIST_SIZE-1; 2123 return &an->an_node; 2124 } else 2125 return NULL; 2126 } 2127 2128 static void 2129 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 2130 { 2131 struct ath_softc *sc = ic->ic_if.if_softc; 2132 struct ath_buf *bf; 2133 2134 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2135 if (bf->bf_node == ni) 2136 bf->bf_node = NULL; 2137 } 2138 (*sc->sc_node_free)(ic, ni); 2139 } 2140 2141 static void 2142 ath_node_copy(struct ieee80211com *ic, 2143 struct ieee80211_node *dst, const struct ieee80211_node *src) 2144 { 2145 struct ath_softc *sc = ic->ic_if.if_softc; 2146 2147 memcpy(&dst[1], &src[1], 2148 sizeof(struct ath_node) - sizeof(struct ieee80211_node)); 2149 (*sc->sc_node_copy)(ic, dst, src); 2150 } 2151 2152 static u_int8_t 2153 ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni) 2154 { 2155 struct ath_node *an = ATH_NODE(ni); 2156 int i, now, nsamples, rssi; 2157 2158 /* 2159 * Calculate the average over the last second of sampled data. 2160 */ 2161 now = ATH_TICKS(); 2162 nsamples = 0; 2163 rssi = 0; 2164 i = an->an_rx_hist_next; 2165 do { 2166 struct ath_recv_hist *rh = &an->an_rx_hist[i]; 2167 if (rh->arh_ticks == ATH_RHIST_NOTIME) 2168 goto done; 2169 if (now - rh->arh_ticks > hz) 2170 goto done; 2171 rssi += rh->arh_rssi; 2172 nsamples++; 2173 if (i == 0) 2174 i = ATH_RHIST_SIZE-1; 2175 else 2176 i--; 2177 } while (i != an->an_rx_hist_next); 2178 done: 2179 /* 2180 * Return either the average or the last known 2181 * value if there is no recent data. 2182 */ 2183 return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi); 2184 } 2185 2186 static int 2187 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 2188 { 2189 struct ath_hal *ah = sc->sc_ah; 2190 int error; 2191 struct mbuf *m; 2192 struct ath_desc *ds; 2193 2194 m = bf->bf_m; 2195 if (m == NULL) { 2196 /* 2197 * NB: by assigning a page to the rx dma buffer we 2198 * implicitly satisfy the Atheros requirement that 2199 * this buffer be cache-line-aligned and sized to be 2200 * multiple of the cache line size. Not doing this 2201 * causes weird stuff to happen (for the 5210 at least). 2202 */ 2203 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 2204 if (m == NULL) { 2205 DPRINTF(ATH_DEBUG_ANY, 2206 ("%s: no mbuf/cluster\n", __func__)); 2207 sc->sc_stats.ast_rx_nombuf++; 2208 return ENOMEM; 2209 } 2210 bf->bf_m = m; 2211 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 2212 2213 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 2214 BUS_DMA_NOWAIT); 2215 if (error != 0) { 2216 DPRINTF(ATH_DEBUG_ANY, 2217 ("%s: ath_buf_dmamap_load_mbuf failed;" 2218 " error %d\n", __func__, error)); 2219 sc->sc_stats.ast_rx_busdma++; 2220 return error; 2221 } 2222 KASSERT(bf->bf_nseg == 1, 2223 ("ath_rxbuf_init: multi-segment packet; nseg %u", 2224 bf->bf_nseg)); 2225 } 2226 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 2227 2228 /* 2229 * Setup descriptors. For receive we always terminate 2230 * the descriptor list with a self-linked entry so we'll 2231 * not get overrun under high load (as can happen with a 2232 * 5212 when ANI processing enables PHY errors). 2233 * 2234 * To insure the last descriptor is self-linked we create 2235 * each descriptor as self-linked and add it to the end. As 2236 * each additional descriptor is added the previous self-linked 2237 * entry is ``fixed'' naturally. This should be safe even 2238 * if DMA is happening. When processing RX interrupts we 2239 * never remove/process the last, self-linked, entry on the 2240 * descriptor list. This insures the hardware always has 2241 * someplace to write a new frame. 2242 */ 2243 ds = bf->bf_desc; 2244 ds->ds_link = bf->bf_daddr; /* link to self */ 2245 ds->ds_data = bf->bf_segs[0].ds_addr; 2246 ath_hal_setuprxdesc(ah, ds 2247 , m->m_len /* buffer size */ 2248 , 0 2249 ); 2250 2251 if (sc->sc_rxlink != NULL) 2252 *sc->sc_rxlink = bf->bf_daddr; 2253 sc->sc_rxlink = &ds->ds_link; 2254 return 0; 2255 } 2256 2257 static void 2258 ath_rx_proc(void *arg, int npending) 2259 { 2260 #define PA2DESC(_sc, _pa) \ 2261 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2262 ((_pa) - (_sc)->sc_desc_paddr))) 2263 struct ath_softc *sc = arg; 2264 struct ath_buf *bf; 2265 struct ieee80211com *ic = &sc->sc_ic; 2266 struct ifnet *ifp = &ic->ic_if; 2267 struct ath_hal *ah = sc->sc_ah; 2268 struct ath_desc *ds; 2269 struct mbuf *m; 2270 struct ieee80211_frame *wh, whbuf; 2271 struct ieee80211_node *ni; 2272 struct ath_node *an; 2273 struct ath_recv_hist *rh; 2274 int len; 2275 u_int phyerr; 2276 HAL_STATUS status; 2277 2278 DPRINTF(ATH_DEBUG_RX_PROC, ("%s: pending %u\n", __func__, npending)); 2279 do { 2280 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2281 if (bf == NULL) { /* NB: shouldn't happen */ 2282 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 2283 break; 2284 } 2285 ds = bf->bf_desc; 2286 if (ds->ds_link == bf->bf_daddr) { 2287 /* NB: never process the self-linked entry at the end */ 2288 break; 2289 } 2290 m = bf->bf_m; 2291 if (m == NULL) { /* NB: shouldn't happen */ 2292 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 2293 continue; 2294 } 2295 /* XXX sync descriptor memory */ 2296 /* 2297 * Must provide the virtual address of the current 2298 * descriptor, the physical address, and the virtual 2299 * address of the next descriptor in the h/w chain. 2300 * This allows the HAL to look ahead to see if the 2301 * hardware is done with a descriptor by checking the 2302 * done bit in the following descriptor and the address 2303 * of the current descriptor the DMA engine is working 2304 * on. All this is necessary because of our use of 2305 * a self-linked list to avoid rx overruns. 2306 */ 2307 status = ath_hal_rxprocdesc(ah, ds, 2308 bf->bf_daddr, PA2DESC(sc, ds->ds_link)); 2309 #ifdef AR_DEBUG 2310 if (ath_debug & ATH_DEBUG_RECV_DESC) 2311 ath_printrxbuf(bf, status == HAL_OK); 2312 #endif 2313 if (status == HAL_EINPROGRESS) 2314 break; 2315 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 2316 if (ds->ds_rxstat.rs_status != 0) { 2317 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 2318 sc->sc_stats.ast_rx_crcerr++; 2319 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 2320 sc->sc_stats.ast_rx_fifoerr++; 2321 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 2322 sc->sc_stats.ast_rx_badcrypt++; 2323 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 2324 sc->sc_stats.ast_rx_phyerr++; 2325 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 2326 sc->sc_stats.ast_rx_phy[phyerr]++; 2327 } else { 2328 /* 2329 * NB: don't count PHY errors as input errors; 2330 * we enable them on the 5212 to collect info 2331 * about environmental noise and, in that 2332 * setting, they don't really reflect tx/rx 2333 * errors. 2334 */ 2335 ifp->if_ierrors++; 2336 } 2337 goto rx_next; 2338 } 2339 2340 len = ds->ds_rxstat.rs_datalen; 2341 if (len < IEEE80211_MIN_LEN) { 2342 DPRINTF(ATH_DEBUG_RECV, ("%s: short packet %d\n", 2343 __func__, len)); 2344 sc->sc_stats.ast_rx_tooshort++; 2345 goto rx_next; 2346 } 2347 2348 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 2349 2350 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2351 bf->bf_m = NULL; 2352 m->m_pkthdr.rcvif = ifp; 2353 m->m_pkthdr.len = m->m_len = len; 2354 2355 #if NBPFILTER > 0 2356 if (sc->sc_drvbpf) { 2357 sc->sc_rx_th.wr_rate = 2358 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2359 sc->sc_rx_th.wr_antsignal = ds->ds_rxstat.rs_rssi; 2360 sc->sc_rx_th.wr_antenna = ds->ds_rxstat.rs_antenna; 2361 /* XXX TSF */ 2362 bpf_mtap2(sc->sc_drvbpf, 2363 &sc->sc_rx_th, sc->sc_rx_th_len, m); 2364 } 2365 #endif 2366 2367 m_adj(m, -IEEE80211_CRC_LEN); 2368 wh = mtod(m, struct ieee80211_frame *); 2369 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2370 /* 2371 * WEP is decrypted by hardware. Clear WEP bit 2372 * and trim WEP header for ieee80211_input(). 2373 */ 2374 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2375 memcpy(&whbuf, wh, sizeof(whbuf)); 2376 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2377 wh = mtod(m, struct ieee80211_frame *); 2378 memcpy(wh, &whbuf, sizeof(whbuf)); 2379 /* 2380 * Also trim WEP ICV from the tail. 2381 */ 2382 m_adj(m, -IEEE80211_WEP_CRCLEN); 2383 /* 2384 * The header has probably moved. 2385 */ 2386 wh = mtod(m, struct ieee80211_frame *); 2387 } 2388 2389 /* 2390 * Locate the node for sender, track state, and 2391 * then pass this node (referenced) up to the 802.11 2392 * layer for its use. We are required to pass 2393 * something so we fall back to ic_bss when this frame 2394 * is from an unknown sender. 2395 */ 2396 ni = ieee80211_find_rxnode(ic, wh); 2397 2398 /* 2399 * Record driver-specific state. 2400 */ 2401 an = ATH_NODE(ni); 2402 if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE) 2403 an->an_rx_hist_next = 0; 2404 rh = &an->an_rx_hist[an->an_rx_hist_next]; 2405 rh->arh_ticks = ATH_TICKS(); 2406 rh->arh_rssi = ds->ds_rxstat.rs_rssi; 2407 rh->arh_antenna = ds->ds_rxstat.rs_antenna; 2408 2409 /* 2410 * Send frame up for processing. 2411 */ 2412 ieee80211_input(ifp, m, ni, 2413 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2414 2415 /* 2416 * The frame may have caused the node to be marked for 2417 * reclamation (e.g. in response to a DEAUTH message) 2418 * so use free_node here instead of unref_node. 2419 */ 2420 if (ni == ic->ic_bss) 2421 ieee80211_unref_node(&ni); 2422 else 2423 ieee80211_free_node(ic, ni); 2424 rx_next: 2425 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2426 } while (ath_rxbuf_init(sc, bf) == 0); 2427 2428 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2429 ath_hal_rxena(ah); /* in case of RXEOL */ 2430 2431 #ifdef __NetBSD__ 2432 if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd)) 2433 ath_start(ifp); 2434 #endif /* __NetBSD__ */ 2435 #undef PA2DESC 2436 } 2437 2438 /* 2439 * XXX Size of an ACK control frame in bytes. 2440 */ 2441 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2442 2443 static int 2444 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2445 struct mbuf *m0) 2446 { 2447 struct ieee80211com *ic = &sc->sc_ic; 2448 struct ath_hal *ah = sc->sc_ah; 2449 struct ifnet *ifp = &sc->sc_ic.ic_if; 2450 int i, error, iswep, hdrlen, pktlen; 2451 u_int8_t rix, cix, txrate, ctsrate; 2452 struct ath_desc *ds; 2453 struct mbuf *m; 2454 struct ieee80211_frame *wh; 2455 u_int32_t iv; 2456 u_int8_t *ivp; 2457 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2458 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2459 u_int subtype, flags, ctsduration, antenna; 2460 HAL_PKT_TYPE atype; 2461 const HAL_RATE_TABLE *rt; 2462 HAL_BOOL shortPreamble; 2463 struct ath_node *an; 2464 ath_txq_critsect_decl(s); 2465 2466 wh = mtod(m0, struct ieee80211_frame *); 2467 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2468 hdrlen = sizeof(struct ieee80211_frame); 2469 pktlen = m0->m_pkthdr.len; 2470 2471 if (iswep) { 2472 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2473 m_adj(m0, hdrlen); 2474 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2475 if (m0 == NULL) { 2476 sc->sc_stats.ast_tx_nombuf++; 2477 return ENOMEM; 2478 } 2479 ivp = hdrbuf + hdrlen; 2480 wh = mtod(m0, struct ieee80211_frame *); 2481 /* 2482 * XXX 2483 * IV must not duplicate during the lifetime of the key. 2484 * But no mechanism to renew keys is defined in IEEE 802.11 2485 * WEP. And IV may be duplicated between other stations 2486 * because of the session key itself is shared. 2487 * So we use pseudo random IV for now, though it is not the 2488 * right way. 2489 */ 2490 iv = ic->ic_iv; 2491 /* 2492 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir: 2493 * (B, 255, N) with 3 <= B < 8 2494 */ 2495 if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00) 2496 iv += 0x000100; 2497 ic->ic_iv = iv + 1; 2498 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 2499 ivp[i] = iv; 2500 iv >>= 8; 2501 } 2502 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 2503 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2504 /* 2505 * The ICV length must be included into hdrlen and pktlen. 2506 */ 2507 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2508 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2509 } 2510 pktlen += IEEE80211_CRC_LEN; 2511 2512 /* 2513 * Load the DMA map so any coalescing is done. This 2514 * also calculates the number of descriptors we need. 2515 */ 2516 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2517 /* 2518 * Discard null packets and check for packets that 2519 * require too many TX descriptors. We try to convert 2520 * the latter to a cluster. 2521 */ 2522 if (error == EFBIG) { /* too many desc's, linearize */ 2523 sc->sc_stats.ast_tx_linear++; 2524 MGETHDR(m, M_DONTWAIT, MT_DATA); 2525 if (m == NULL) { 2526 sc->sc_stats.ast_tx_nombuf++; 2527 m_freem(m0); 2528 return ENOMEM; 2529 } 2530 #ifdef __FreeBSD__ 2531 M_MOVE_PKTHDR(m, m0); 2532 #else 2533 M_COPY_PKTHDR(m, m0); 2534 #endif 2535 MCLGET(m, M_DONTWAIT); 2536 if ((m->m_flags & M_EXT) == 0) { 2537 sc->sc_stats.ast_tx_nomcl++; 2538 m_freem(m0); 2539 m_free(m); 2540 return ENOMEM; 2541 } 2542 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2543 m_freem(m0); 2544 m->m_len = m->m_pkthdr.len; 2545 m0 = m; 2546 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2547 BUS_DMA_NOWAIT); 2548 if (error != 0) { 2549 sc->sc_stats.ast_tx_busdma++; 2550 m_freem(m0); 2551 return error; 2552 } 2553 KASSERT(bf->bf_nseg == 1, 2554 ("ath_tx_start: packet not one segment; nseg %u", 2555 bf->bf_nseg)); 2556 } else if (error != 0) { 2557 sc->sc_stats.ast_tx_busdma++; 2558 m_freem(m0); 2559 return error; 2560 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2561 sc->sc_stats.ast_tx_nodata++; 2562 m_freem(m0); 2563 return EIO; 2564 } 2565 DPRINTF(ATH_DEBUG_XMIT, ("%s: m %p len %u\n", __func__, m0, pktlen)); 2566 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2567 bf->bf_m = m0; 2568 bf->bf_node = ni; /* NB: held reference */ 2569 2570 /* setup descriptors */ 2571 ds = bf->bf_desc; 2572 rt = sc->sc_currates; 2573 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2574 2575 /* 2576 * Calculate Atheros packet type from IEEE80211 packet header 2577 * and setup for rate calculations. 2578 */ 2579 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2580 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2581 case IEEE80211_FC0_TYPE_MGT: 2582 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2583 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2584 atype = HAL_PKT_TYPE_BEACON; 2585 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2586 atype = HAL_PKT_TYPE_PROBE_RESP; 2587 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2588 atype = HAL_PKT_TYPE_ATIM; 2589 rix = 0; /* XXX lowest rate */ 2590 break; 2591 case IEEE80211_FC0_TYPE_CTL: 2592 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2593 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2594 atype = HAL_PKT_TYPE_PSPOLL; 2595 rix = 0; /* XXX lowest rate */ 2596 break; 2597 default: 2598 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2599 IEEE80211_RATE_VAL]; 2600 if (rix == 0xff) { 2601 if_printf(ifp, "bogus xmit rate 0x%x\n", 2602 ni->ni_rates.rs_rates[ni->ni_txrate]); 2603 sc->sc_stats.ast_tx_badrate++; 2604 m_freem(m0); 2605 return EIO; 2606 } 2607 break; 2608 } 2609 /* 2610 * NB: the 802.11 layer marks whether or not we should 2611 * use short preamble based on the current mode and 2612 * negotiated parameters. 2613 */ 2614 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 2615 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 2616 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2617 shortPreamble = AH_TRUE; 2618 sc->sc_stats.ast_tx_shortpre++; 2619 } else { 2620 txrate = rt->info[rix].rateCode; 2621 shortPreamble = AH_FALSE; 2622 } 2623 2624 /* 2625 * Calculate miscellaneous flags. 2626 */ 2627 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2628 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2629 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2630 sc->sc_stats.ast_tx_noack++; 2631 } else if (pktlen > ic->ic_rtsthreshold) { 2632 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2633 sc->sc_stats.ast_tx_rts++; 2634 } 2635 2636 /* 2637 * Calculate duration. This logically belongs in the 802.11 2638 * layer but it lacks sufficient information to calculate it. 2639 */ 2640 if ((flags & HAL_TXDESC_NOACK) == 0 && 2641 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 2642 u_int16_t dur; 2643 /* 2644 * XXX not right with fragmentation. 2645 */ 2646 dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE, 2647 rix, shortPreamble); 2648 *((u_int16_t*) wh->i_dur) = htole16(dur); 2649 } 2650 2651 /* 2652 * Calculate RTS/CTS rate and duration if needed. 2653 */ 2654 ctsduration = 0; 2655 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2656 /* 2657 * CTS transmit rate is derived from the transmit rate 2658 * by looking in the h/w rate table. We must also factor 2659 * in whether or not a short preamble is to be used. 2660 */ 2661 cix = rt->info[rix].controlRate; 2662 ctsrate = rt->info[cix].rateCode; 2663 if (shortPreamble) 2664 ctsrate |= rt->info[cix].shortPreamble; 2665 /* 2666 * Compute the transmit duration based on the size 2667 * of an ACK frame. We call into the HAL to do the 2668 * computation since it depends on the characteristics 2669 * of the actual PHY being used. 2670 */ 2671 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2672 ctsduration += ath_hal_computetxtime(ah, 2673 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2674 } 2675 /* SIFS + data */ 2676 ctsduration += ath_hal_computetxtime(ah, 2677 rt, pktlen, rix, shortPreamble); 2678 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2679 ctsduration += ath_hal_computetxtime(ah, 2680 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2681 } 2682 } else 2683 ctsrate = 0; 2684 2685 /* 2686 * For now use the antenna on which the last good 2687 * frame was received on. We assume this field is 2688 * initialized to 0 which gives us ``auto'' or the 2689 * ``default'' antenna. 2690 */ 2691 an = (struct ath_node *) ni; 2692 if (an->an_tx_antenna) 2693 antenna = an->an_tx_antenna; 2694 else 2695 antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna; 2696 2697 if (ic->ic_rawbpf) 2698 bpf_mtap(ic->ic_rawbpf, m0); 2699 if (sc->sc_drvbpf) { 2700 sc->sc_tx_th.wt_flags = 0; 2701 if (shortPreamble) 2702 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2703 if (iswep) 2704 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2705 sc->sc_tx_th.wt_rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 2706 sc->sc_tx_th.wt_txpower = 60/2; /* XXX */ 2707 sc->sc_tx_th.wt_antenna = antenna; 2708 2709 bpf_mtap2(sc->sc_drvbpf, 2710 &sc->sc_tx_th, sc->sc_tx_th_len, m0); 2711 } 2712 2713 /* 2714 * Formulate first tx descriptor with tx controls. 2715 */ 2716 /* XXX check return value? */ 2717 ath_hal_setuptxdesc(ah, ds 2718 , pktlen /* packet length */ 2719 , hdrlen /* header length */ 2720 , atype /* Atheros packet type */ 2721 , 60 /* txpower XXX */ 2722 , txrate, 1+10 /* series 0 rate/tries */ 2723 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2724 , antenna /* antenna mode */ 2725 , flags /* flags */ 2726 , ctsrate /* rts/cts rate */ 2727 , ctsduration /* rts/cts duration */ 2728 ); 2729 #ifdef notyet 2730 ath_hal_setupxtxdesc(ah, ds 2731 , AH_FALSE /* short preamble */ 2732 , 0, 0 /* series 1 rate/tries */ 2733 , 0, 0 /* series 2 rate/tries */ 2734 , 0, 0 /* series 3 rate/tries */ 2735 ); 2736 #endif 2737 /* 2738 * Fillin the remainder of the descriptor info. 2739 */ 2740 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2741 ds->ds_data = bf->bf_segs[i].ds_addr; 2742 if (i == bf->bf_nseg - 1) 2743 ds->ds_link = 0; 2744 else 2745 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2746 ath_hal_filltxdesc(ah, ds 2747 , bf->bf_segs[i].ds_len /* segment length */ 2748 , i == 0 /* first segment */ 2749 , i == bf->bf_nseg - 1 /* last segment */ 2750 ); 2751 DPRINTF(ATH_DEBUG_XMIT, 2752 ("%s: %d: %08x %08x %08x %08x %08x %08x\n", 2753 __func__, i, ds->ds_link, ds->ds_data, 2754 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1])); 2755 } 2756 2757 /* 2758 * Insert the frame on the outbound list and 2759 * pass it on to the hardware. 2760 */ 2761 ath_txq_critsect_begin(sc, s); 2762 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2763 if (sc->sc_txlink == NULL) { 2764 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2765 DPRINTF(ATH_DEBUG_XMIT, ("%s: TXDP0 = %p (%p)\n", __func__, 2766 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2767 } else { 2768 *sc->sc_txlink = bf->bf_daddr; 2769 DPRINTF(ATH_DEBUG_XMIT, ("%s: link(%p)=%p (%p)\n", __func__, 2770 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2771 } 2772 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2773 ath_txq_critsect_end(sc, s); 2774 2775 ath_hal_txstart(ah, sc->sc_txhalq); 2776 return 0; 2777 } 2778 2779 static void 2780 ath_tx_proc(void *arg, int npending) 2781 { 2782 struct ath_softc *sc = arg; 2783 struct ath_hal *ah = sc->sc_ah; 2784 struct ath_buf *bf; 2785 struct ieee80211com *ic = &sc->sc_ic; 2786 struct ifnet *ifp = &ic->ic_if; 2787 struct ath_desc *ds; 2788 struct ieee80211_node *ni; 2789 struct ath_node *an; 2790 int sr, lr; 2791 HAL_STATUS status; 2792 ath_txq_critsect_decl(s); 2793 ath_txbuf_critsect_decl(s2); 2794 2795 DPRINTF(ATH_DEBUG_TX_PROC, ("%s: pending %u tx queue %p, link %p\n", 2796 __func__, npending, 2797 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2798 sc->sc_txlink)); 2799 for (;;) { 2800 ath_txq_critsect_begin(sc, s); 2801 bf = TAILQ_FIRST(&sc->sc_txq); 2802 if (bf == NULL) { 2803 sc->sc_txlink = NULL; 2804 ath_txq_critsect_end(sc, s); 2805 break; 2806 } 2807 /* only the last descriptor is needed */ 2808 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2809 status = ath_hal_txprocdesc(ah, ds); 2810 #ifdef AR_DEBUG 2811 if (ath_debug & ATH_DEBUG_XMIT_DESC) 2812 ath_printtxbuf(bf, status == HAL_OK); 2813 #endif 2814 if (status == HAL_EINPROGRESS) { 2815 ath_txq_critsect_end(sc, s); 2816 break; 2817 } 2818 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2819 ath_txq_critsect_end(sc, s); 2820 2821 ni = bf->bf_node; 2822 if (ni != NULL) { 2823 an = (struct ath_node *) ni; 2824 if (ds->ds_txstat.ts_status == 0) { 2825 an->an_tx_ok++; 2826 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2827 } else { 2828 an->an_tx_err++; 2829 ifp->if_oerrors++; 2830 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2831 sc->sc_stats.ast_tx_xretries++; 2832 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2833 sc->sc_stats.ast_tx_fifoerr++; 2834 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2835 sc->sc_stats.ast_tx_filtered++; 2836 an->an_tx_antenna = 0; /* invalidate */ 2837 } 2838 sr = ds->ds_txstat.ts_shortretry; 2839 lr = ds->ds_txstat.ts_longretry; 2840 sc->sc_stats.ast_tx_shortretry += sr; 2841 sc->sc_stats.ast_tx_longretry += lr; 2842 if (sr + lr) 2843 an->an_tx_retr++; 2844 /* 2845 * Reclaim reference to node. 2846 * 2847 * NB: the node may be reclaimed here if, for example 2848 * this is a DEAUTH message that was sent and the 2849 * node was timed out due to inactivity. 2850 */ 2851 if (ni != ic->ic_bss) 2852 ieee80211_free_node(ic, ni); 2853 } 2854 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2855 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2856 m_freem(bf->bf_m); 2857 bf->bf_m = NULL; 2858 bf->bf_node = NULL; 2859 2860 ath_txbuf_critsect_begin(sc, s2); 2861 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2862 ath_txbuf_critsect_end(sc, s2); 2863 } 2864 ifp->if_flags &= ~IFF_OACTIVE; 2865 sc->sc_tx_timer = 0; 2866 2867 ath_start(ifp); 2868 } 2869 2870 /* 2871 * Drain the transmit queue and reclaim resources. 2872 */ 2873 static void 2874 ath_draintxq(struct ath_softc *sc) 2875 { 2876 struct ath_hal *ah = sc->sc_ah; 2877 struct ieee80211com *ic = &sc->sc_ic; 2878 struct ifnet *ifp = &ic->ic_if; 2879 struct ieee80211_node *ni; 2880 struct ath_buf *bf; 2881 ath_txq_critsect_decl(s); 2882 ath_txbuf_critsect_decl(s2); 2883 2884 /* XXX return value */ 2885 if (!sc->sc_invalid) { 2886 /* don't touch the hardware if marked invalid */ 2887 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2888 DPRINTF(ATH_DEBUG_RESET, 2889 ("%s: tx queue %p, link %p\n", __func__, 2890 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2891 sc->sc_txlink)); 2892 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2893 DPRINTF(ATH_DEBUG_RESET, 2894 ("%s: beacon queue %p\n", __func__, 2895 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2896 } 2897 for (;;) { 2898 ath_txq_critsect_begin(sc, s); 2899 bf = TAILQ_FIRST(&sc->sc_txq); 2900 if (bf == NULL) { 2901 sc->sc_txlink = NULL; 2902 ath_txq_critsect_end(sc, s); 2903 break; 2904 } 2905 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2906 ath_txq_critsect_end(sc, s); 2907 #ifdef AR_DEBUG 2908 if (ath_debug & ATH_DEBUG_RESET) 2909 ath_printtxbuf(bf, 2910 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2911 #endif /* AR_DEBUG */ 2912 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2913 m_freem(bf->bf_m); 2914 bf->bf_m = NULL; 2915 ni = bf->bf_node; 2916 bf->bf_node = NULL; 2917 ath_txbuf_critsect_begin(sc, s2); 2918 if (ni != NULL && ni != ic->ic_bss) { 2919 /* 2920 * Reclaim node reference. 2921 */ 2922 ieee80211_free_node(ic, ni); 2923 } 2924 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2925 ath_txbuf_critsect_end(sc, s2); 2926 } 2927 ifp->if_flags &= ~IFF_OACTIVE; 2928 sc->sc_tx_timer = 0; 2929 } 2930 2931 /* 2932 * Disable the receive h/w in preparation for a reset. 2933 */ 2934 static void 2935 ath_stoprecv(struct ath_softc *sc) 2936 { 2937 #define PA2DESC(_sc, _pa) \ 2938 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2939 ((_pa) - (_sc)->sc_desc_paddr))) 2940 struct ath_hal *ah = sc->sc_ah; 2941 2942 ath_hal_stoppcurecv(ah); /* disable PCU */ 2943 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2944 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2945 DELAY(3000); /* long enough for 1 frame */ 2946 #ifdef AR_DEBUG 2947 if (ath_debug & ATH_DEBUG_RESET) { 2948 struct ath_buf *bf; 2949 2950 printf("%s: rx queue %p, link %p\n", __func__, 2951 (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink); 2952 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2953 struct ath_desc *ds = bf->bf_desc; 2954 if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr, 2955 PA2DESC(sc, ds->ds_link)) == HAL_OK) 2956 ath_printrxbuf(bf, 1); 2957 } 2958 } 2959 #endif 2960 sc->sc_rxlink = NULL; /* just in case */ 2961 #undef PA2DESC 2962 } 2963 2964 /* 2965 * Enable the receive h/w following a reset. 2966 */ 2967 static int 2968 ath_startrecv(struct ath_softc *sc) 2969 { 2970 struct ath_hal *ah = sc->sc_ah; 2971 struct ath_buf *bf; 2972 2973 sc->sc_rxlink = NULL; 2974 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2975 int error = ath_rxbuf_init(sc, bf); 2976 if (error != 0) { 2977 DPRINTF(ATH_DEBUG_RECV, 2978 ("%s: ath_rxbuf_init failed %d\n", 2979 __func__, error)); 2980 return error; 2981 } 2982 } 2983 2984 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2985 ath_hal_putrxbuf(ah, bf->bf_daddr); 2986 ath_hal_rxena(ah); /* enable recv descriptors */ 2987 ath_mode_init(sc); /* set filters, etc. */ 2988 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2989 return 0; 2990 } 2991 2992 /* 2993 * Set/change channels. If the channel is really being changed, 2994 * it's done by resetting the chip. To accomplish this we must 2995 * first cleanup any pending DMA, then restart stuff after a la 2996 * ath_init. 2997 */ 2998 static int 2999 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 3000 { 3001 struct ath_hal *ah = sc->sc_ah; 3002 struct ieee80211com *ic = &sc->sc_ic; 3003 3004 DPRINTF(ATH_DEBUG_ANY, ("%s: %u (%u MHz) -> %u (%u MHz)\n", __func__, 3005 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 3006 ic->ic_ibss_chan->ic_freq, 3007 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 3008 if (chan != ic->ic_ibss_chan) { 3009 HAL_STATUS status; 3010 HAL_CHANNEL hchan; 3011 enum ieee80211_phymode mode; 3012 3013 /* 3014 * To switch channels clear any pending DMA operations; 3015 * wait long enough for the RX fifo to drain, reset the 3016 * hardware at the new frequency, and then re-enable 3017 * the relevant bits of the h/w. 3018 */ 3019 ath_hal_intrset(ah, 0); /* disable interrupts */ 3020 ath_draintxq(sc); /* clear pending tx frames */ 3021 ath_stoprecv(sc); /* turn off frame recv */ 3022 /* 3023 * Convert to a HAL channel description with 3024 * the flags constrained to reflect the current 3025 * operating mode. 3026 */ 3027 hchan.channel = chan->ic_freq; 3028 hchan.channelFlags = ath_chan2flags(ic, chan); 3029 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 3030 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 3031 "channel %u (%u Mhz)\n", 3032 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 3033 return EIO; 3034 } 3035 /* 3036 * Re-enable rx framework. 3037 */ 3038 if (ath_startrecv(sc) != 0) { 3039 if_printf(&ic->ic_if, 3040 "ath_chan_set: unable to restart recv logic\n"); 3041 return EIO; 3042 } 3043 3044 /* 3045 * Update BPF state. 3046 */ 3047 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 3048 htole16(chan->ic_freq); 3049 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 3050 htole16(chan->ic_flags); 3051 3052 /* 3053 * Change channels and update the h/w rate map 3054 * if we're switching; e.g. 11a to 11b/g. 3055 */ 3056 ic->ic_ibss_chan = chan; 3057 mode = ieee80211_chan2mode(ic, chan); 3058 if (mode != sc->sc_curmode) 3059 ath_setcurmode(sc, mode); 3060 3061 /* 3062 * Re-enable interrupts. 3063 */ 3064 ath_hal_intrset(ah, sc->sc_imask); 3065 } 3066 return 0; 3067 } 3068 3069 static void 3070 ath_next_scan(void *arg) 3071 { 3072 struct ath_softc *sc = arg; 3073 struct ieee80211com *ic = &sc->sc_ic; 3074 struct ifnet *ifp = &ic->ic_if; 3075 int s; 3076 3077 /* don't call ath_start w/o network interrupts blocked */ 3078 s = splnet(); 3079 3080 if (ic->ic_state == IEEE80211_S_SCAN) 3081 ieee80211_next_scan(ifp); 3082 splx(s); 3083 } 3084 3085 /* 3086 * Periodically recalibrate the PHY to account 3087 * for temperature/environment changes. 3088 */ 3089 static void 3090 ath_calibrate(void *arg) 3091 { 3092 struct ath_softc *sc = arg; 3093 struct ath_hal *ah = sc->sc_ah; 3094 struct ieee80211com *ic = &sc->sc_ic; 3095 struct ieee80211_channel *c; 3096 HAL_CHANNEL hchan; 3097 3098 sc->sc_stats.ast_per_cal++; 3099 3100 /* 3101 * Convert to a HAL channel description with the flags 3102 * constrained to reflect the current operating mode. 3103 */ 3104 c = ic->ic_ibss_chan; 3105 hchan.channel = c->ic_freq; 3106 hchan.channelFlags = ath_chan2flags(ic, c); 3107 3108 DPRINTF(ATH_DEBUG_CALIBRATE, 3109 ("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 3110 3111 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 3112 /* 3113 * Rfgain is out of bounds, reset the chip 3114 * to load new gain values. 3115 */ 3116 sc->sc_stats.ast_per_rfgain++; 3117 ath_reset(sc); 3118 } 3119 if (!ath_hal_calibrate(ah, &hchan)) { 3120 DPRINTF(ATH_DEBUG_ANY, 3121 ("%s: calibration of channel %u failed\n", 3122 __func__, c->ic_freq)); 3123 sc->sc_stats.ast_per_calfail++; 3124 } 3125 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 3126 } 3127 3128 static HAL_LED_STATE 3129 ath_state_to_led(enum ieee80211_state state) 3130 { 3131 switch (state) { 3132 case IEEE80211_S_INIT: 3133 return HAL_LED_INIT; 3134 case IEEE80211_S_SCAN: 3135 return HAL_LED_SCAN; 3136 case IEEE80211_S_AUTH: 3137 return HAL_LED_AUTH; 3138 case IEEE80211_S_ASSOC: 3139 return HAL_LED_ASSOC; 3140 case IEEE80211_S_RUN: 3141 return HAL_LED_RUN; 3142 default: 3143 panic("%s: unknown 802.11 state %d\n", __func__, state); 3144 return HAL_LED_INIT; 3145 } 3146 } 3147 3148 static int 3149 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 3150 { 3151 struct ifnet *ifp = &ic->ic_if; 3152 struct ath_softc *sc = ifp->if_softc; 3153 struct ath_hal *ah = sc->sc_ah; 3154 struct ieee80211_node *ni; 3155 int i, error; 3156 const u_int8_t *bssid; 3157 u_int32_t rfilt; 3158 3159 DPRINTF(ATH_DEBUG_ANY, ("%s: %s -> %s\n", __func__, 3160 ieee80211_state_name[ic->ic_state], 3161 ieee80211_state_name[nstate])); 3162 3163 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 3164 3165 if (nstate == IEEE80211_S_INIT) { 3166 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3167 ath_hal_intrset(ah, sc->sc_imask); 3168 callout_stop(&sc->sc_scan_ch); 3169 callout_stop(&sc->sc_cal_ch); 3170 return (*sc->sc_newstate)(ic, nstate, arg); 3171 } 3172 ni = ic->ic_bss; 3173 error = ath_chan_set(sc, ni->ni_chan); 3174 if (error != 0) 3175 goto bad; 3176 rfilt = ath_calcrxfilter(sc); 3177 if (nstate == IEEE80211_S_SCAN) { 3178 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 3179 ath_next_scan, sc); 3180 bssid = ifp->if_broadcastaddr; 3181 } else { 3182 callout_stop(&sc->sc_scan_ch); 3183 bssid = ni->ni_bssid; 3184 } 3185 ath_hal_setrxfilter(ah, rfilt); 3186 DPRINTF(ATH_DEBUG_ANY, ("%s: RX filter 0x%x bssid %s\n", 3187 __func__, rfilt, ether_sprintf(bssid))); 3188 3189 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 3190 ath_hal_setassocid(ah, bssid, ni->ni_associd); 3191 else 3192 ath_hal_setassocid(ah, bssid, 0); 3193 if (ic->ic_flags & IEEE80211_F_WEPON) { 3194 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3195 if (ath_hal_keyisvalid(ah, i)) 3196 ath_hal_keysetmac(ah, i, bssid); 3197 } 3198 3199 if (nstate == IEEE80211_S_RUN) { 3200 DPRINTF(ATH_DEBUG_ANY, ("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 3201 "capinfo=0x%04x chan=%d\n" 3202 , __func__ 3203 , ic->ic_flags 3204 , ni->ni_intval 3205 , ether_sprintf(ni->ni_bssid) 3206 , ni->ni_capinfo 3207 , ieee80211_chan2ieee(ic, ni->ni_chan))); 3208 3209 /* 3210 * Allocate and setup the beacon frame for AP or adhoc mode. 3211 */ 3212 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 3213 ic->ic_opmode == IEEE80211_M_IBSS) { 3214 error = ath_beacon_alloc(sc, ni); 3215 if (error != 0) 3216 goto bad; 3217 } 3218 3219 /* 3220 * Configure the beacon and sleep timers. 3221 */ 3222 ath_beacon_config(sc); 3223 3224 /* start periodic recalibration timer */ 3225 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 3226 ath_calibrate, sc); 3227 } else { 3228 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3229 ath_hal_intrset(ah, sc->sc_imask); 3230 callout_stop(&sc->sc_cal_ch); /* no calibration */ 3231 } 3232 /* 3233 * Reset the rate control state. 3234 */ 3235 ath_rate_ctl_reset(sc, nstate); 3236 /* 3237 * Invoke the parent method to complete the work. 3238 */ 3239 return (*sc->sc_newstate)(ic, nstate, arg); 3240 bad: 3241 callout_stop(&sc->sc_scan_ch); 3242 callout_stop(&sc->sc_cal_ch); 3243 /* NB: do not invoke the parent */ 3244 return error; 3245 } 3246 3247 /* 3248 * Setup driver-specific state for a newly associated node. 3249 * Note that we're called also on a re-associate, the isnew 3250 * param tells us if this is the first time or not. 3251 */ 3252 static void 3253 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 3254 { 3255 if (isnew) { 3256 struct ath_node *an = (struct ath_node *) ni; 3257 3258 an->an_tx_ok = an->an_tx_err = 3259 an->an_tx_retr = an->an_tx_upper = 0; 3260 /* start with highest negotiated rate */ 3261 /* 3262 * XXX should do otherwise but only when 3263 * the rate control algorithm is better. 3264 */ 3265 KASSERT(ni->ni_rates.rs_nrates > 0, 3266 ("new association w/ no rates!")); 3267 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3268 } 3269 } 3270 3271 static int 3272 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor, 3273 HAL_BOOL xchanmode) 3274 { 3275 struct ieee80211com *ic = &sc->sc_ic; 3276 struct ifnet *ifp = &ic->ic_if; 3277 struct ath_hal *ah = sc->sc_ah; 3278 HAL_CHANNEL *chans; 3279 int i, ix, nchan; 3280 3281 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 3282 M_TEMP, M_NOWAIT); 3283 if (chans == NULL) { 3284 if_printf(ifp, "unable to allocate channel table\n"); 3285 return ENOMEM; 3286 } 3287 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 3288 cc, HAL_MODE_ALL, outdoor, xchanmode)) { 3289 if_printf(ifp, "unable to collect channel list from hal\n"); 3290 free(chans, M_TEMP); 3291 return EINVAL; 3292 } 3293 3294 /* 3295 * Convert HAL channels to ieee80211 ones and insert 3296 * them in the table according to their channel number. 3297 */ 3298 for (i = 0; i < nchan; i++) { 3299 HAL_CHANNEL *c = &chans[i]; 3300 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 3301 if (ix > IEEE80211_CHAN_MAX) { 3302 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 3303 ix, c->channel, c->channelFlags); 3304 continue; 3305 } 3306 DPRINTF(ATH_DEBUG_ANY, 3307 ("%s: HAL channel %d/%d freq %d flags %#04x idx %d\n", 3308 sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags, 3309 ix)); 3310 /* NB: flags are known to be compatible */ 3311 if (ic->ic_channels[ix].ic_freq == 0) { 3312 ic->ic_channels[ix].ic_freq = c->channel; 3313 ic->ic_channels[ix].ic_flags = c->channelFlags; 3314 } else { 3315 /* channels overlap; e.g. 11g and 11b */ 3316 ic->ic_channels[ix].ic_flags |= c->channelFlags; 3317 } 3318 } 3319 free(chans, M_TEMP); 3320 return 0; 3321 } 3322 3323 static int 3324 ath_rate_setup(struct ath_softc *sc, u_int mode) 3325 { 3326 struct ath_hal *ah = sc->sc_ah; 3327 struct ieee80211com *ic = &sc->sc_ic; 3328 const HAL_RATE_TABLE *rt; 3329 struct ieee80211_rateset *rs; 3330 int i, maxrates; 3331 3332 switch (mode) { 3333 case IEEE80211_MODE_11A: 3334 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 3335 break; 3336 case IEEE80211_MODE_11B: 3337 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 3338 break; 3339 case IEEE80211_MODE_11G: 3340 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 3341 break; 3342 case IEEE80211_MODE_TURBO: 3343 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 3344 break; 3345 default: 3346 DPRINTF(ATH_DEBUG_ANY, 3347 ("%s: invalid mode %u\n", __func__, mode)); 3348 return 0; 3349 } 3350 rt = sc->sc_rates[mode]; 3351 if (rt == NULL) 3352 return 0; 3353 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 3354 DPRINTF(ATH_DEBUG_ANY, 3355 ("%s: rate table too small (%u > %u)\n", 3356 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 3357 maxrates = IEEE80211_RATE_MAXSIZE; 3358 } else 3359 maxrates = rt->rateCount; 3360 rs = &ic->ic_sup_rates[mode]; 3361 for (i = 0; i < maxrates; i++) 3362 rs->rs_rates[i] = rt->info[i].dot11Rate; 3363 rs->rs_nrates = maxrates; 3364 return 1; 3365 } 3366 3367 static void 3368 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 3369 { 3370 const HAL_RATE_TABLE *rt; 3371 int i; 3372 3373 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 3374 rt = sc->sc_rates[mode]; 3375 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 3376 for (i = 0; i < rt->rateCount; i++) 3377 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 3378 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 3379 for (i = 0; i < 32; i++) 3380 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 3381 sc->sc_currates = rt; 3382 sc->sc_curmode = mode; 3383 } 3384 3385 /* 3386 * Reset the rate control state for each 802.11 state transition. 3387 */ 3388 static void 3389 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 3390 { 3391 struct ieee80211com *ic = &sc->sc_ic; 3392 struct ieee80211_node *ni; 3393 struct ath_node *an; 3394 3395 if (ic->ic_opmode != IEEE80211_M_STA) { 3396 /* 3397 * When operating as a station the node table holds 3398 * the AP's that were discovered during scanning. 3399 * For any other operating mode we want to reset the 3400 * tx rate state of each node. 3401 */ 3402 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3403 ni->ni_txrate = 0; /* use lowest rate */ 3404 an = (struct ath_node *) ni; 3405 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3406 an->an_tx_upper = 0; 3407 } 3408 } 3409 /* 3410 * Reset local xmit state; this is really only meaningful 3411 * when operating in station or adhoc mode. 3412 */ 3413 ni = ic->ic_bss; 3414 an = (struct ath_node *) ni; 3415 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3416 if (state == IEEE80211_S_RUN) { 3417 /* start with highest negotiated rate */ 3418 KASSERT(ni->ni_rates.rs_nrates > 0, 3419 ("transition to RUN state w/ no rates!")); 3420 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3421 } else { 3422 /* use lowest rate */ 3423 ni->ni_txrate = 0; 3424 } 3425 } 3426 3427 /* 3428 * Examine and potentially adjust the transmit rate. 3429 */ 3430 static void 3431 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3432 { 3433 struct ath_softc *sc = arg; 3434 struct ath_node *an = (struct ath_node *) ni; 3435 struct ieee80211_rateset *rs = &ni->ni_rates; 3436 int mod = 0, orate, enough; 3437 3438 /* 3439 * Rate control 3440 * XXX: very primitive version. 3441 */ 3442 sc->sc_stats.ast_rate_calls++; 3443 3444 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3445 3446 /* no packet reached -> down */ 3447 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3448 mod = -1; 3449 3450 /* all packets needs retry in average -> down */ 3451 if (enough && an->an_tx_ok < an->an_tx_retr) 3452 mod = -1; 3453 3454 /* no error and less than 10% of packets needs retry -> up */ 3455 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3456 mod = 1; 3457 3458 orate = ni->ni_txrate; 3459 switch (mod) { 3460 case 0: 3461 if (enough && an->an_tx_upper > 0) 3462 an->an_tx_upper--; 3463 break; 3464 case -1: 3465 if (ni->ni_txrate > 0) { 3466 ni->ni_txrate--; 3467 sc->sc_stats.ast_rate_drop++; 3468 } 3469 an->an_tx_upper = 0; 3470 break; 3471 case 1: 3472 if (++an->an_tx_upper < 2) 3473 break; 3474 an->an_tx_upper = 0; 3475 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3476 ni->ni_txrate++; 3477 sc->sc_stats.ast_rate_raise++; 3478 } 3479 break; 3480 } 3481 3482 if (ni->ni_txrate != orate) { 3483 DPRINTF(ATH_DEBUG_RATE, 3484 ("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3485 __func__, 3486 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3487 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3488 an->an_tx_ok, an->an_tx_err, an->an_tx_retr)); 3489 } 3490 if (ni->ni_txrate != orate || enough) 3491 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3492 } 3493 3494 #ifdef AR_DEBUG 3495 #ifdef __FreeBSD__ 3496 static int 3497 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3498 { 3499 char dmode[64]; 3500 int error; 3501 3502 strncpy(dmode, "", sizeof(dmode) - 1); 3503 dmode[sizeof(dmode) - 1] = '\0'; 3504 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3505 3506 if (error == 0 && req->newptr != NULL) { 3507 struct ifnet *ifp; 3508 struct ath_softc *sc; 3509 3510 ifp = ifunit("ath0"); /* XXX */ 3511 if (!ifp) 3512 return EINVAL; 3513 sc = ifp->if_softc; 3514 if (strcmp(dmode, "hal") == 0) 3515 ath_hal_dumpstate(sc->sc_ah); 3516 else 3517 return EINVAL; 3518 } 3519 return error; 3520 } 3521 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3522 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3523 #endif /* __FreeBSD__ */ 3524 3525 #if 0 /* #ifdef __NetBSD__ */ 3526 static int 3527 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3528 { 3529 char dmode[64]; 3530 int error; 3531 3532 strncpy(dmode, "", sizeof(dmode) - 1); 3533 dmode[sizeof(dmode) - 1] = '\0'; 3534 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3535 3536 if (error == 0 && req->newptr != NULL) { 3537 struct ifnet *ifp; 3538 struct ath_softc *sc; 3539 3540 ifp = ifunit("ath0"); /* XXX */ 3541 if (!ifp) 3542 return EINVAL; 3543 sc = ifp->if_softc; 3544 if (strcmp(dmode, "hal") == 0) 3545 ath_hal_dumpstate(sc->sc_ah); 3546 else 3547 return EINVAL; 3548 } 3549 return error; 3550 } 3551 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3552 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3553 #endif /* __NetBSD__ */ 3554 3555 static void 3556 ath_printrxbuf(struct ath_buf *bf, int done) 3557 { 3558 struct ath_desc *ds; 3559 int i; 3560 3561 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3562 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3563 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3564 ds->ds_link, ds->ds_data, 3565 ds->ds_ctl0, ds->ds_ctl1, 3566 ds->ds_hw[0], ds->ds_hw[1], 3567 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3568 } 3569 } 3570 3571 static void 3572 ath_printtxbuf(struct ath_buf *bf, int done) 3573 { 3574 struct ath_desc *ds; 3575 int i; 3576 3577 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3578 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3579 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3580 ds->ds_link, ds->ds_data, 3581 ds->ds_ctl0, ds->ds_ctl1, 3582 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3583 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3584 } 3585 } 3586 #endif /* AR_DEBUG */ 3587
Indexes created Thu Oct 02 07:10:07 GMT 2025