ath.c revision 1.29 1 /* $NetBSD: ath.c,v 1.29 2004/07/23 08:34:11 mycroft Exp $ */
2
3 /*-
4 * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 * redistribution must be conditioned upon including a substantially
16 * similar Disclaimer requirement for further binary redistribution.
17 * 3. Neither the names of the above-listed copyright holders nor the names
18 * of any contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * Alternatively, this software may be distributed under the terms of the
22 * GNU General Public License ("GPL") version 2 as published by the Free
23 * Software Foundation.
24 *
25 * NO WARRANTY
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
36 * THE POSSIBILITY OF SUCH DAMAGES.
37 */
38
39 #include <sys/cdefs.h>
40 #ifdef __FreeBSD__
41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.54 2004/04/05 04:42:42 sam Exp $");
42 #endif
43 #ifdef __NetBSD__
44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.29 2004/07/23 08:34:11 mycroft Exp $");
45 #endif
46
47 /*
48 * Driver for the Atheros Wireless LAN controller.
49 *
50 * This software is derived from work of Atsushi Onoe; his contribution
51 * is greatly appreciated.
52 */
53
54 #include "opt_inet.h"
55
56 #ifdef __NetBSD__
57 #include "bpfilter.h"
58 #endif /* __NetBSD__ */
59
60 #include <sys/param.h>
61 #include <sys/systm.h>
62 #include <sys/types.h>
63 #include <sys/sysctl.h>
64 #include <sys/mbuf.h>
65 #include <sys/malloc.h>
66 #include <sys/lock.h>
67 #ifdef __FreeBSD__
68 #include <sys/mutex.h>
69 #endif
70 #include <sys/kernel.h>
71 #include <sys/socket.h>
72 #include <sys/sockio.h>
73 #include <sys/errno.h>
74 #include <sys/callout.h>
75 #ifdef __FreeBSD__
76 #include <sys/bus.h>
77 #else
78 #include <machine/bus.h>
79 #endif
80 #include <sys/endian.h>
81
82 #include <machine/bus.h>
83
84 #include <net/if.h>
85 #include <net/if_dl.h>
86 #include <net/if_media.h>
87 #include <net/if_arp.h>
88 #ifdef __FreeBSD__
89 #include <net/ethernet.h>
90 #else
91 #include <net/if_ether.h>
92 #endif
93 #include <net/if_llc.h>
94
95 #include <net80211/ieee80211_var.h>
96 #include <net80211/ieee80211_compat.h>
97
98 #if NBPFILTER > 0
99 #include <net/bpf.h>
100 #endif
101
102 #ifdef INET
103 #include <netinet/in.h>
104 #endif
105
106 #include <dev/ic/athcompat.h>
107
108 #define AR_DEBUG
109 #ifdef __FreeBSD__
110 #include <dev/ath/if_athvar.h>
111 #include <contrib/dev/ath/ah_desc.h>
112 #else
113 #include <dev/ic/athvar.h>
114 #include <../contrib/sys/dev/ic/athhal_desc.h>
115 #endif
116
117 /* unaligned little endian access */
118 #define LE_READ_2(p) \
119 ((u_int16_t) \
120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8)))
121 #define LE_READ_4(p) \
122 ((u_int32_t) \
123 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \
124 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
125
126 #ifdef __FreeBSD__
127 static void ath_init(void *);
128 #else
129 static int ath_init(struct ifnet *);
130 #endif
131 static int ath_init1(struct ath_softc *);
132 static int ath_intr1(struct ath_softc *);
133 static void ath_stop(struct ifnet *);
134 static void ath_start(struct ifnet *);
135 static void ath_reset(struct ath_softc *);
136 static int ath_media_change(struct ifnet *);
137 static void ath_watchdog(struct ifnet *);
138 static int ath_ioctl(struct ifnet *, u_long, caddr_t);
139 static void ath_fatal_proc(void *, int);
140 static void ath_rxorn_proc(void *, int);
141 static void ath_bmiss_proc(void *, int);
142 static void ath_initkeytable(struct ath_softc *);
143 static void ath_mode_init(struct ath_softc *);
144 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
145 static void ath_beacon_proc(void *, int);
146 static void ath_beacon_free(struct ath_softc *);
147 static void ath_beacon_config(struct ath_softc *);
148 static int ath_desc_alloc(struct ath_softc *);
149 static void ath_desc_free(struct ath_softc *);
150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *);
151 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *);
152 static void ath_node_copy(struct ieee80211com *,
153 struct ieee80211_node *, const struct ieee80211_node *);
154 static u_int8_t ath_node_getrssi(struct ieee80211com *,
155 struct ieee80211_node *);
156 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
157 static void ath_rx_proc(void *, int);
158 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *,
159 struct ath_buf *, struct mbuf *);
160 static void ath_tx_proc(void *, int);
161 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
162 static void ath_draintxq(struct ath_softc *);
163 static void ath_stoprecv(struct ath_softc *);
164 static int ath_startrecv(struct ath_softc *);
165 static void ath_next_scan(void *);
166 static void ath_calibrate(void *);
167 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int);
168 static void ath_newassoc(struct ieee80211com *,
169 struct ieee80211_node *, int);
170 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor,
171 HAL_BOOL xchanmode);
172
173 static int ath_rate_setup(struct ath_softc *sc, u_int mode);
174 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
175 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state);
176 static void ath_rate_ctl(void *, struct ieee80211_node *);
177
178 #ifdef __NetBSD__
179 int ath_enable(struct ath_softc *);
180 void ath_disable(struct ath_softc *);
181 void ath_power(int, void *);
182 #endif
183
184 #ifdef __FreeBSD__
185 SYSCTL_DECL(_hw_ath);
186 /* XXX validate sysctl values */
187 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime,
188 0, "channel dwell time (ms) for AP/station scanning");
189 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval,
190 0, "chip calibration interval (secs)");
191 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor,
192 0, "enable/disable outdoor operation");
193 TUNABLE_INT("hw.ath.outdoor", &ath_outdoor);
194 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode,
195 0, "country code");
196 TUNABLE_INT("hw.ath.countrycode", &ath_countrycode);
197 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain,
198 0, "regulatory domain");
199 #endif /* __FreeBSD__ */
200
201 #ifdef __NetBSD__
202 static int ath_dwelltime_nodenum, ath_calibrate_nodenum, ath_outdoor_nodenum,
203 ath_countrycode_nodenum, ath_regdomain_nodenum, ath_debug_nodenum;
204 #endif /* __NetBSD__ */
205
206 static int ath_dwelltime = 200; /* 5 channels/second */
207 static int ath_calinterval = 30; /* calibrate every 30 secs */
208 static int ath_outdoor = AH_TRUE; /* outdoor operation */
209 static int ath_xchanmode = AH_TRUE; /* enable extended channels */
210 static int ath_countrycode = CTRY_DEFAULT; /* country code */
211 static int ath_regdomain = 0; /* regulatory domain */
212
213 #ifdef AR_DEBUG
214 int ath_debug = 0;
215 #ifdef __FreeBSD__
216 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
217 0, "control debugging printfs");
218 TUNABLE_INT("hw.ath.debug", &ath_debug);
219 #endif /* __FreeBSD__ */
220 #define IFF_DUMPPKTS(_ifp, _m) \
221 ((ath_debug & _m) || \
222 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
223 static void ath_printrxbuf(struct ath_buf *bf, int);
224 static void ath_printtxbuf(struct ath_buf *bf, int);
225 enum {
226 ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
227 ATH_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */
228 ATH_DEBUG_RECV = 0x00000004, /* basic recv operation */
229 ATH_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */
230 ATH_DEBUG_RATE = 0x00000010, /* rate control */
231 ATH_DEBUG_RESET = 0x00000020, /* reset processing */
232 ATH_DEBUG_MODE = 0x00000040, /* mode init/setup */
233 ATH_DEBUG_BEACON = 0x00000080, /* beacon handling */
234 ATH_DEBUG_WATCHDOG = 0x00000100, /* watchdog timeout */
235 ATH_DEBUG_INTR = 0x00001000, /* ISR */
236 ATH_DEBUG_TX_PROC = 0x00002000, /* tx ISR proc */
237 ATH_DEBUG_RX_PROC = 0x00004000, /* rx ISR proc */
238 ATH_DEBUG_BEACON_PROC = 0x00008000, /* beacon ISR proc */
239 ATH_DEBUG_CALIBRATE = 0x00010000, /* periodic calibration */
240 ATH_DEBUG_ANY = 0xffffffff
241 };
242 #define DPRINTF(_m,X) if (ath_debug & (_m)) printf X
243 #else
244 #define IFF_DUMPPKTS(_ifp, _m) \
245 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
246 #define DPRINTF(_m, X)
247 #endif
248
249 #ifdef __NetBSD__
250 int
251 ath_activate(struct device *self, enum devact act)
252 {
253 struct ath_softc *sc = (struct ath_softc *)self;
254 int rv = 0, s;
255
256 s = splnet();
257 switch (act) {
258 case DVACT_ACTIVATE:
259 rv = EOPNOTSUPP;
260 break;
261 case DVACT_DEACTIVATE:
262 if_deactivate(&sc->sc_ic.ic_if);
263 break;
264 }
265 splx(s);
266 return rv;
267 }
268
269 int
270 ath_enable(struct ath_softc *sc)
271 {
272 if (ATH_IS_ENABLED(sc) == 0) {
273 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
274 printf("%s: device enable failed\n",
275 sc->sc_dev.dv_xname);
276 return (EIO);
277 }
278 sc->sc_flags |= ATH_ENABLED;
279 }
280 return (0);
281 }
282
283 void
284 ath_disable(struct ath_softc *sc)
285 {
286 if (!ATH_IS_ENABLED(sc))
287 return;
288 if (sc->sc_disable != NULL)
289 (*sc->sc_disable)(sc);
290 sc->sc_flags &= ~ATH_ENABLED;
291 }
292
293 static int
294 sysctl_ath_verify(SYSCTLFN_ARGS)
295 {
296 int error, t;
297 struct sysctlnode node;
298
299 node = *rnode;
300 t = *(int*)rnode->sysctl_data;
301 node.sysctl_data = &t;
302 error = sysctl_lookup(SYSCTLFN_CALL(&node));
303 if (error || newp == NULL)
304 return (error);
305
306 DPRINTF(ATH_DEBUG_ANY, ("%s: t = %d, nodenum = %d, rnodenum = %d\n",
307 __func__, t, node.sysctl_num, rnode->sysctl_num));
308
309 if (node.sysctl_num == ath_dwelltime_nodenum) {
310 if (t <= 0)
311 return (EINVAL);
312 } else if (node.sysctl_num == ath_calibrate_nodenum) {
313 if (t <= 0)
314 return (EINVAL);
315 #ifdef AR_DEBUG
316 } else if (node.sysctl_num == ath_debug_nodenum) {
317 if (t < 0 || t > 2)
318 return (EINVAL);
319 #endif /* AR_DEBUG */
320 } else
321 return (EINVAL);
322
323 *(int*)rnode->sysctl_data = t;
324
325 return (0);
326 }
327
328 /*
329 * Setup sysctl(3) MIB, ath.*.
330 *
331 * TBD condition CTLFLAG_PERMANENT on being an LKM or not
332 */
333 SYSCTL_SETUP(sysctl_ath, "sysctl ath subtree setup")
334 {
335 int rc, ath_node_num;
336 struct sysctlnode *node;
337
338 if ((rc = sysctl_createv(clog, 0, NULL, NULL,
339 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL,
340 NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0)
341 goto err;
342
343 if ((rc = sysctl_createv(clog, 0, NULL, &node,
344 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ath",
345 SYSCTL_DESCR("ath information and options"),
346 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
347 goto err;
348
349 ath_node_num = node->sysctl_num;
350
351 /* channel dwell time (ms) for AP/station scanning */
352 if ((rc = sysctl_createv(clog, 0, NULL, &node,
353 CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
354 CTLTYPE_INT, "dwell",
355 SYSCTL_DESCR("Channel dwell time (ms) for AP/station scanning"),
356 sysctl_ath_verify, 0, &ath_dwelltime,
357 0, CTL_HW, ath_node_num, CTL_CREATE,
358 CTL_EOL)) != 0)
359 goto err;
360
361 ath_dwelltime_nodenum = node->sysctl_num;
362
363 /* chip calibration interval (secs) */
364 if ((rc = sysctl_createv(clog, 0, NULL, &node,
365 CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
366 CTLTYPE_INT, "calibrate",
367 SYSCTL_DESCR("Chip calibration interval (secs)"), sysctl_ath_verify,
368 0, &ath_calinterval, 0, CTL_HW,
369 ath_node_num, CTL_CREATE, CTL_EOL)) != 0)
370 goto err;
371
372 ath_calibrate_nodenum = node->sysctl_num;
373
374 /* enable/disable outdoor operation */
375 if ((rc = sysctl_createv(clog, 0, NULL, &node,
376 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
377 "outdoor", SYSCTL_DESCR("Enable/disable outdoor operation"),
378 NULL, 0, &ath_outdoor, 0,
379 CTL_HW, ath_node_num, CTL_CREATE,
380 CTL_EOL)) != 0)
381 goto err;
382
383 ath_outdoor_nodenum = node->sysctl_num;
384
385 /* country code */
386 if ((rc = sysctl_createv(clog, 0, NULL, &node,
387 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
388 "countrycode", SYSCTL_DESCR("Country code"),
389 NULL, 0, &ath_countrycode, 0,
390 CTL_HW, ath_node_num, CTL_CREATE,
391 CTL_EOL)) != 0)
392 goto err;
393
394 ath_countrycode_nodenum = node->sysctl_num;
395
396 /* regulatory domain */
397 if ((rc = sysctl_createv(clog, 0, NULL, &node,
398 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
399 "regdomain", SYSCTL_DESCR("Regulatory domain"),
400 NULL, 0, &ath_regdomain, 0,
401 CTL_HW, ath_node_num, CTL_CREATE,
402 CTL_EOL)) != 0)
403 goto err;
404
405 ath_regdomain_nodenum = node->sysctl_num;
406
407 #ifdef AR_DEBUG
408
409 /* control debugging printfs */
410 if ((rc = sysctl_createv(clog, 0, NULL, &node,
411 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
412 "debug", SYSCTL_DESCR("Enable/disable ath debugging output"),
413 sysctl_ath_verify, 0, &ath_debug, 0,
414 CTL_HW, ath_node_num, CTL_CREATE,
415 CTL_EOL)) != 0)
416 goto err;
417
418 ath_debug_nodenum = node->sysctl_num;
419
420 #endif /* AR_DEBUG */
421 return;
422 err:
423 printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc);
424 }
425 #endif /* __NetBSD__ */
426
427 int
428 ath_attach(u_int16_t devid, struct ath_softc *sc)
429 {
430 struct ieee80211com *ic = &sc->sc_ic;
431 struct ifnet *ifp = &ic->ic_if;
432 struct ath_hal *ah;
433 HAL_STATUS status;
434 int error = 0;
435
436 DPRINTF(ATH_DEBUG_ANY, ("%s: devid 0x%x\n", __func__, devid));
437
438 #ifdef __FreeBSD__
439 /* set these up early for if_printf use */
440 if_initname(ifp, device_get_name(sc->sc_dev),
441 device_get_unit(sc->sc_dev));
442 #else
443 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
444 #endif
445
446 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
447 if (ah == NULL) {
448 if_printf(ifp, "unable to attach hardware; HAL status %u\n",
449 status);
450 error = ENXIO;
451 goto bad;
452 }
453 if (ah->ah_abi != HAL_ABI_VERSION) {
454 if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n",
455 ah->ah_abi, HAL_ABI_VERSION);
456 error = ENXIO;
457 goto bad;
458 }
459 if_printf(ifp, "mac %d.%d phy %d.%d",
460 ah->ah_macVersion, ah->ah_macRev,
461 ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf);
462 if (ah->ah_analog5GhzRev)
463 printf(" 5ghz radio %d.%d",
464 ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf);
465 if (ah->ah_analog2GhzRev)
466 printf(" 2ghz radio %d.%d",
467 ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf);
468 printf("\n");
469 sc->sc_ah = ah;
470 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */
471
472 /*
473 * Collect the channel list using the default country
474 * code and including outdoor channels. The 802.11 layer
475 * is resposible for filtering this list based on settings
476 * like the phy mode.
477 */
478 error = ath_getchannels(sc, ath_countrycode, ath_outdoor,
479 ath_xchanmode);
480 if (error != 0)
481 goto bad;
482 /*
483 * Copy these back; they are set as a side effect
484 * of constructing the channel list.
485 */
486 ath_regdomain = ath_hal_getregdomain(ah);
487 ath_countrycode = ath_hal_getcountrycode(ah);
488
489 /*
490 * Setup rate tables for all potential media types.
491 */
492 ath_rate_setup(sc, IEEE80211_MODE_11A);
493 ath_rate_setup(sc, IEEE80211_MODE_11B);
494 ath_rate_setup(sc, IEEE80211_MODE_11G);
495 ath_rate_setup(sc, IEEE80211_MODE_TURBO);
496
497 error = ath_desc_alloc(sc);
498 if (error != 0) {
499 if_printf(ifp, "failed to allocate descriptors: %d\n", error);
500 goto bad;
501 }
502 ATH_CALLOUT_INIT(&sc->sc_scan_ch);
503 ATH_CALLOUT_INIT(&sc->sc_cal_ch);
504
505 #ifdef __FreeBSD__
506 ATH_TXBUF_LOCK_INIT(sc);
507 ATH_TXQ_LOCK_INIT(sc);
508 #endif
509
510 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc);
511 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc);
512 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc);
513 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc);
514 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc);
515
516 /*
517 * For now just pre-allocate one data queue and one
518 * beacon queue. Note that the HAL handles resetting
519 * them at the needed time. Eventually we'll want to
520 * allocate more tx queues for splitting management
521 * frames and for QOS support.
522 */
523 sc->sc_txhalq = ath_hal_setuptxqueue(ah,
524 HAL_TX_QUEUE_DATA,
525 AH_TRUE /* enable interrupts */
526 );
527 if (sc->sc_txhalq == (u_int) -1) {
528 if_printf(ifp, "unable to setup a data xmit queue!\n");
529 goto bad2;
530 }
531 sc->sc_bhalq = ath_hal_setuptxqueue(ah,
532 HAL_TX_QUEUE_BEACON,
533 AH_TRUE /* enable interrupts */
534 );
535 if (sc->sc_bhalq == (u_int) -1) {
536 if_printf(ifp, "unable to setup a beacon xmit queue!\n");
537 goto bad2;
538 }
539
540 ifp->if_softc = sc;
541 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
542 ifp->if_start = ath_start;
543 ifp->if_watchdog = ath_watchdog;
544 ifp->if_ioctl = ath_ioctl;
545 ifp->if_init = ath_init;
546 #ifdef __FreeBSD__
547 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
548 #else
549 #if 0
550 ifp->if_stop = ath_stop; /* XXX */
551 #endif
552 IFQ_SET_READY(&ifp->if_snd);
553 #endif
554
555 ic->ic_softc = sc;
556 ic->ic_newassoc = ath_newassoc;
557 /* XXX not right but it's not used anywhere important */
558 ic->ic_phytype = IEEE80211_T_OFDM;
559 ic->ic_opmode = IEEE80211_M_STA;
560 ic->ic_caps = IEEE80211_C_WEP /* wep supported */
561 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
562 | IEEE80211_C_HOSTAP /* hostap mode */
563 | IEEE80211_C_MONITOR /* monitor mode */
564 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
565 ;
566
567 /* get mac address from hardware */
568 ath_hal_getmac(ah, ic->ic_myaddr);
569
570 #ifdef __NetBSD__
571 if_attach(ifp);
572 #endif
573 /* call MI attach routine. */
574 ieee80211_ifattach(ifp);
575 /* override default methods */
576 ic->ic_node_alloc = ath_node_alloc;
577 sc->sc_node_free = ic->ic_node_free;
578 ic->ic_node_free = ath_node_free;
579 sc->sc_node_copy = ic->ic_node_copy;
580 ic->ic_node_copy = ath_node_copy;
581 ic->ic_node_getrssi = ath_node_getrssi;
582 sc->sc_newstate = ic->ic_newstate;
583 ic->ic_newstate = ath_newstate;
584 /* complete initialization */
585 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status);
586
587 #if NBPFILTER > 0
588 bpfattach2(ifp, DLT_IEEE802_11_RADIO,
589 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
590 &sc->sc_drvbpf);
591 #endif
592 /*
593 * Initialize constant fields.
594 * XXX make header lengths a multiple of 32-bits so subsequent
595 * headers are properly aligned; this is a kludge to keep
596 * certain applications happy.
597 *
598 * NB: the channel is setup each time we transition to the
599 * RUN state to avoid filling it in for each frame.
600 */
601 sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(u_int32_t));
602 sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len);
603 sc->sc_tx_th.wt_ihdr.it_present = htole32(ATH_TX_RADIOTAP_PRESENT);
604
605 sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(u_int32_t));
606 sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len);
607 sc->sc_rx_th.wr_ihdr.it_present = htole32(ATH_RX_RADIOTAP_PRESENT);
608
609 #ifdef __NetBSD__
610 sc->sc_flags |= ATH_ATTACHED;
611 /*
612 * Make sure the interface is shutdown during reboot.
613 */
614 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc);
615 if (sc->sc_sdhook == NULL)
616 printf("%s: WARNING: unable to establish shutdown hook\n",
617 sc->sc_dev.dv_xname);
618 sc->sc_powerhook = powerhook_establish(ath_power, sc);
619 if (sc->sc_powerhook == NULL)
620 printf("%s: WARNING: unable to establish power hook\n",
621 sc->sc_dev.dv_xname);
622 #endif
623 return 0;
624 bad2:
625 ath_desc_free(sc);
626 bad:
627 if (ah)
628 ath_hal_detach(ah);
629 sc->sc_invalid = 1;
630 return error;
631 }
632
633 int
634 ath_detach(struct ath_softc *sc)
635 {
636 struct ifnet *ifp = &sc->sc_ic.ic_if;
637 ath_softc_critsect_decl(s);
638
639 if ((sc->sc_flags & ATH_ATTACHED) == 0)
640 return (0);
641 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
642
643 ath_softc_critsect_begin(sc, s);
644 ath_stop(ifp);
645 #if NBPFILTER > 0
646 bpfdetach(ifp);
647 #endif
648 ath_desc_free(sc);
649 ath_hal_detach(sc->sc_ah);
650 ieee80211_ifdetach(ifp);
651 #ifdef __NetBSD__
652 if_detach(ifp);
653 #endif /* __NetBSD__ */
654 ath_softc_critsect_end(sc, s);
655 #ifdef __NetBSD__
656 powerhook_disestablish(sc->sc_powerhook);
657 shutdownhook_disestablish(sc->sc_sdhook);
658 #endif /* __NetBSD__ */
659 #ifdef __FreeBSD__
660
661 ATH_TXBUF_LOCK_DESTROY(sc);
662 ATH_TXQ_LOCK_DESTROY(sc);
663
664 #endif /* __FreeBSD__ */
665 return 0;
666 }
667
668 #ifdef __NetBSD__
669 void
670 ath_power(int why, void *arg)
671 {
672 struct ath_softc *sc = arg;
673 int s;
674
675 DPRINTF(ATH_DEBUG_ANY, ("ath_power(%d)\n", why));
676
677 s = splnet();
678 switch (why) {
679 case PWR_SUSPEND:
680 case PWR_STANDBY:
681 ath_suspend(sc, why);
682 break;
683 case PWR_RESUME:
684 ath_resume(sc, why);
685 break;
686 case PWR_SOFTSUSPEND:
687 case PWR_SOFTSTANDBY:
688 case PWR_SOFTRESUME:
689 break;
690 }
691 splx(s);
692 }
693 #endif
694
695 void
696 ath_suspend(struct ath_softc *sc, int why)
697 {
698 struct ifnet *ifp = &sc->sc_ic.ic_if;
699
700 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
701
702 ath_stop(ifp);
703 if (sc->sc_power != NULL)
704 (*sc->sc_power)(sc, why);
705 }
706
707 void
708 ath_resume(struct ath_softc *sc, int why)
709 {
710 struct ifnet *ifp = &sc->sc_ic.ic_if;
711
712 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
713
714 if (ifp->if_flags & IFF_UP) {
715 ath_init(ifp);
716 #if 0
717 (void)ath_intr(sc);
718 #endif
719 if (sc->sc_power != NULL)
720 (*sc->sc_power)(sc, why);
721 if (ifp->if_flags & IFF_RUNNING)
722 ath_start(ifp);
723 }
724 }
725
726 #ifdef __NetBSD__
727 void
728 ath_shutdown(void *arg)
729 {
730 struct ath_softc *sc = arg;
731
732 ath_stop(&sc->sc_ic.ic_if);
733 }
734 #else
735 void
736 ath_shutdown(struct ath_softc *sc)
737 {
738 #if 1
739 return;
740 #else
741 struct ifnet *ifp = &sc->sc_ic.ic_if;
742
743 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
744
745 ath_stop(ifp);
746 #endif
747 }
748 #endif
749
750 #ifdef __NetBSD__
751 int
752 ath_intr(void *arg)
753 {
754 return ath_intr1((struct ath_softc *)arg);
755 }
756 #else
757 void
758 ath_intr(void *arg)
759 {
760 (void)ath_intr1((struct ath_softc *)arg);
761 }
762 #endif
763
764 static int
765 ath_intr1(struct ath_softc *sc)
766 {
767 struct ieee80211com *ic = &sc->sc_ic;
768 struct ifnet *ifp = &ic->ic_if;
769 struct ath_hal *ah = sc->sc_ah;
770 HAL_INT status;
771
772 if (sc->sc_invalid) {
773 /*
774 * The hardware is not ready/present, don't touch anything.
775 * Note this can happen early on if the IRQ is shared.
776 */
777 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid; ignored\n", __func__));
778 return 0;
779 }
780 if (!ath_hal_intrpend(ah)) /* shared irq, not for us */
781 return 0;
782 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
783 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n",
784 __func__, ifp->if_flags));
785 ath_hal_getisr(ah, &status); /* clear ISR */
786 ath_hal_intrset(ah, 0); /* disable further intr's */
787 return 1; /* XXX */
788 }
789 ath_hal_getisr(ah, &status); /* NB: clears ISR too */
790 DPRINTF(ATH_DEBUG_INTR, ("%s: status 0x%x\n", __func__, status));
791 #ifdef AR_DEBUG
792 if (ath_debug &&
793 (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) {
794 if_printf(ifp, "ath_intr: status 0x%x\n", status);
795 ath_hal_dumpstate(ah);
796 }
797 #endif /* AR_DEBUG */
798 status &= sc->sc_imask; /* discard unasked for bits */
799 if (status & HAL_INT_FATAL) {
800 sc->sc_stats.ast_hardware++;
801 ath_hal_intrset(ah, 0); /* disable intr's until reset */
802 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask);
803 } else if (status & HAL_INT_RXORN) {
804 sc->sc_stats.ast_rxorn++;
805 ath_hal_intrset(ah, 0); /* disable intr's until reset */
806 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask);
807 } else {
808 if (status & HAL_INT_RXEOL) {
809 /*
810 * NB: the hardware should re-read the link when
811 * RXE bit is written, but it doesn't work at
812 * least on older hardware revs.
813 */
814 sc->sc_stats.ast_rxeol++;
815 sc->sc_rxlink = NULL;
816 }
817 if (status & HAL_INT_TXURN) {
818 sc->sc_stats.ast_txurn++;
819 /* bump tx trigger level */
820 ath_hal_updatetxtriglevel(ah, AH_TRUE);
821 }
822 if (status & HAL_INT_RX)
823 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask);
824 if (status & HAL_INT_TX)
825 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask);
826 if (status & HAL_INT_SWBA) {
827 /*
828 * Handle beacon transmission directly; deferring
829 * this is too slow to meet timing constraints
830 * under load.
831 */
832 ath_beacon_proc(sc, 0);
833 }
834 if (status & HAL_INT_BMISS) {
835 sc->sc_stats.ast_bmiss++;
836 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask);
837 }
838 }
839 return 1;
840 }
841
842 static void
843 ath_fatal_proc(void *arg, int pending)
844 {
845 struct ath_softc *sc = arg;
846
847 device_printf(sc->sc_dev, "hardware error; resetting\n");
848 ath_reset(sc);
849 }
850
851 static void
852 ath_rxorn_proc(void *arg, int pending)
853 {
854 struct ath_softc *sc = arg;
855
856 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n");
857 ath_reset(sc);
858 }
859
860 static void
861 ath_bmiss_proc(void *arg, int pending)
862 {
863 struct ath_softc *sc = arg;
864 struct ieee80211com *ic = &sc->sc_ic;
865
866 DPRINTF(ATH_DEBUG_ANY, ("%s: pending %u\n", __func__, pending));
867 if (ic->ic_opmode != IEEE80211_M_STA)
868 return;
869 if (ic->ic_state == IEEE80211_S_RUN) {
870 /*
871 * Rather than go directly to scan state, try to
872 * reassociate first. If that fails then the state
873 * machine will drop us into scanning after timing
874 * out waiting for a probe response.
875 */
876 ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1);
877 }
878 }
879
880 static u_int
881 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan)
882 {
883 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan);
884
885 switch (mode) {
886 case IEEE80211_MODE_AUTO:
887 return 0;
888 case IEEE80211_MODE_11A:
889 return CHANNEL_A;
890 case IEEE80211_MODE_11B:
891 return CHANNEL_B;
892 case IEEE80211_MODE_11G:
893 return CHANNEL_PUREG;
894 case IEEE80211_MODE_TURBO:
895 return CHANNEL_T;
896 default:
897 panic("%s: unsupported mode %d\n", __func__, mode);
898 return 0;
899 }
900 }
901
902 #ifdef __NetBSD__
903 static int
904 ath_init(struct ifnet *ifp)
905 {
906 return ath_init1((struct ath_softc *)ifp->if_softc);
907 }
908 #else
909 static void
910 ath_init(void *arg)
911 {
912 (void)ath_init1((struct ath_softc *)arg);
913 }
914 #endif
915
916 static int
917 ath_init1(struct ath_softc *sc)
918 {
919 struct ieee80211com *ic = &sc->sc_ic;
920 struct ifnet *ifp = &ic->ic_if;
921 struct ieee80211_node *ni;
922 enum ieee80211_phymode mode;
923 struct ath_hal *ah = sc->sc_ah;
924 HAL_STATUS status;
925 HAL_CHANNEL hchan;
926 int error = 0;
927 ath_softc_critsect_decl(s);
928
929 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n",
930 __func__, ifp->if_flags));
931
932 #ifdef __NetBSD__
933 if ((error = ath_enable(sc)) != 0)
934 return error;
935 #endif
936
937 ath_softc_critsect_begin(sc, s);
938 /*
939 * Stop anything previously setup. This is safe
940 * whether this is the first time through or not.
941 */
942 ath_stop(ifp);
943
944 /*
945 * The basic interface to setting the hardware in a good
946 * state is ``reset''. On return the hardware is known to
947 * be powered up and with interrupts disabled. This must
948 * be followed by initialization of the appropriate bits
949 * and then setup of the interrupt mask.
950 */
951 hchan.channel = ic->ic_ibss_chan->ic_freq;
952 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan);
953 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) {
954 if_printf(ifp, "unable to reset hardware; hal status %u\n",
955 status);
956 error = -1;
957 goto done;
958 }
959
960 /*
961 * Setup the hardware after reset: the key cache
962 * is filled as needed and the receive engine is
963 * set going. Frame transmit is handled entirely
964 * in the frame output path; there's nothing to do
965 * here except setup the interrupt mask.
966 */
967 if (ic->ic_flags & IEEE80211_F_PRIVACY)
968 ath_initkeytable(sc);
969 if ((error = ath_startrecv(sc)) != 0) {
970 if_printf(ifp, "unable to start recv logic\n");
971 goto done;
972 }
973
974 /*
975 * Enable interrupts.
976 */
977 sc->sc_imask = HAL_INT_RX | HAL_INT_TX
978 | HAL_INT_RXEOL | HAL_INT_RXORN
979 | HAL_INT_FATAL | HAL_INT_GLOBAL;
980 ath_hal_intrset(ah, sc->sc_imask);
981
982 ifp->if_flags |= IFF_RUNNING;
983 ic->ic_state = IEEE80211_S_INIT;
984
985 /*
986 * The hardware should be ready to go now so it's safe
987 * to kick the 802.11 state machine as it's likely to
988 * immediately call back to us to send mgmt frames.
989 */
990 ni = ic->ic_bss;
991 ni->ni_chan = ic->ic_ibss_chan;
992 mode = ieee80211_chan2mode(ic, ni->ni_chan);
993 if (mode != sc->sc_curmode)
994 ath_setcurmode(sc, mode);
995 if (ic->ic_opmode != IEEE80211_M_MONITOR)
996 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
997 else
998 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
999 done:
1000 ath_softc_critsect_end(sc, s);
1001 return error;
1002 }
1003
1004 static void
1005 ath_stop(struct ifnet *ifp)
1006 {
1007 struct ieee80211com *ic = (struct ieee80211com *) ifp;
1008 struct ath_softc *sc = ifp->if_softc;
1009 struct ath_hal *ah = sc->sc_ah;
1010 ath_softc_critsect_decl(s);
1011
1012 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid %u if_flags 0x%x\n",
1013 __func__, sc->sc_invalid, ifp->if_flags));
1014
1015 ath_softc_critsect_begin(sc, s);
1016 if (ifp->if_flags & IFF_RUNNING) {
1017 /*
1018 * Shutdown the hardware and driver:
1019 * disable interrupts
1020 * turn off timers
1021 * clear transmit machinery
1022 * clear receive machinery
1023 * drain and release tx queues
1024 * reclaim beacon resources
1025 * reset 802.11 state machine
1026 * power down hardware
1027 *
1028 * Note that some of this work is not possible if the
1029 * hardware is gone (invalid).
1030 */
1031 ifp->if_flags &= ~IFF_RUNNING;
1032 ifp->if_timer = 0;
1033 if (!sc->sc_invalid)
1034 ath_hal_intrset(ah, 0);
1035 ath_draintxq(sc);
1036 if (!sc->sc_invalid)
1037 ath_stoprecv(sc);
1038 else
1039 sc->sc_rxlink = NULL;
1040 #ifdef __FreeBSD__
1041 IF_DRAIN(&ifp->if_snd);
1042 #else
1043 IF_PURGE(&ifp->if_snd);
1044 #endif
1045 ath_beacon_free(sc);
1046 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
1047 if (!sc->sc_invalid) {
1048 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0);
1049 }
1050 #ifdef __NetBSD__
1051 ath_disable(sc);
1052 #endif
1053 }
1054 ath_softc_critsect_end(sc, s);
1055 }
1056
1057 /*
1058 * Reset the hardware w/o losing operational state. This is
1059 * basically a more efficient way of doing ath_stop, ath_init,
1060 * followed by state transitions to the current 802.11
1061 * operational state. Used to recover from errors rx overrun
1062 * and to reset the hardware when rf gain settings must be reset.
1063 */
1064 static void
1065 ath_reset(struct ath_softc *sc)
1066 {
1067 struct ieee80211com *ic = &sc->sc_ic;
1068 struct ifnet *ifp = &ic->ic_if;
1069 struct ath_hal *ah = sc->sc_ah;
1070 struct ieee80211_channel *c;
1071 HAL_STATUS status;
1072 HAL_CHANNEL hchan;
1073
1074 /*
1075 * Convert to a HAL channel description with the flags
1076 * constrained to reflect the current operating mode.
1077 */
1078 c = ic->ic_ibss_chan;
1079 hchan.channel = c->ic_freq;
1080 hchan.channelFlags = ath_chan2flags(ic, c);
1081
1082 ath_hal_intrset(ah, 0); /* disable interrupts */
1083 ath_draintxq(sc); /* stop xmit side */
1084 ath_stoprecv(sc); /* stop recv side */
1085 /* NB: indicate channel change so we do a full reset */
1086 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status))
1087 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
1088 __func__, status);
1089 ath_hal_intrset(ah, sc->sc_imask);
1090 if (ath_startrecv(sc) != 0) /* restart recv */
1091 if_printf(ifp, "%s: unable to start recv logic\n", __func__);
1092 ath_start(ifp); /* restart xmit */
1093 if (ic->ic_state == IEEE80211_S_RUN)
1094 ath_beacon_config(sc); /* restart beacons */
1095 }
1096
1097 static void
1098 ath_start(struct ifnet *ifp)
1099 {
1100 struct ath_softc *sc = ifp->if_softc;
1101 struct ath_hal *ah = sc->sc_ah;
1102 struct ieee80211com *ic = &sc->sc_ic;
1103 struct ieee80211_node *ni;
1104 struct ath_buf *bf;
1105 struct mbuf *m;
1106 struct ieee80211_frame *wh;
1107 ath_txbuf_critsect_decl(s);
1108
1109 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
1110 return;
1111 for (;;) {
1112 /*
1113 * Grab a TX buffer and associated resources.
1114 */
1115 ath_txbuf_critsect_begin(sc, s);
1116 bf = TAILQ_FIRST(&sc->sc_txbuf);
1117 if (bf != NULL)
1118 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
1119 ath_txbuf_critsect_end(sc, s);
1120 if (bf == NULL) {
1121 DPRINTF(ATH_DEBUG_ANY, ("%s: out of xmit buffers\n",
1122 __func__));
1123 sc->sc_stats.ast_tx_qstop++;
1124 ifp->if_flags |= IFF_OACTIVE;
1125 break;
1126 }
1127 /*
1128 * Poll the management queue for frames; they
1129 * have priority over normal data frames.
1130 */
1131 IF_DEQUEUE(&ic->ic_mgtq, m);
1132 if (m == NULL) {
1133 /*
1134 * No data frames go out unless we're associated.
1135 */
1136 if (ic->ic_state != IEEE80211_S_RUN) {
1137 DPRINTF(ATH_DEBUG_ANY,
1138 ("%s: ignore data packet, state %u\n",
1139 __func__, ic->ic_state));
1140 sc->sc_stats.ast_tx_discard++;
1141 ath_txbuf_critsect_begin(sc, s);
1142 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1143 ath_txbuf_critsect_end(sc, s);
1144 break;
1145 }
1146 IF_DEQUEUE(&ifp->if_snd, m);
1147 if (m == NULL) {
1148 ath_txbuf_critsect_begin(sc, s);
1149 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1150 ath_txbuf_critsect_end(sc, s);
1151 break;
1152 }
1153 ifp->if_opackets++;
1154
1155 #ifdef __NetBSD__
1156 #if NBPFILTER > 0
1157 if (ifp->if_bpf)
1158 bpf_mtap(ifp->if_bpf, m);
1159 #endif
1160 #endif
1161 #ifdef __FreeBSD__
1162 BPF_MTAP(ifp, m);
1163 #endif
1164 /*
1165 * Encapsulate the packet in prep for transmission.
1166 */
1167 m = ieee80211_encap(ifp, m, &ni);
1168 if (m == NULL) {
1169 DPRINTF(ATH_DEBUG_ANY,
1170 ("%s: encapsulation failure\n",
1171 __func__));
1172 sc->sc_stats.ast_tx_encap++;
1173 goto bad;
1174 }
1175 wh = mtod(m, struct ieee80211_frame *);
1176 } else {
1177 /*
1178 * Hack! The referenced node pointer is in the
1179 * rcvif field of the packet header. This is
1180 * placed there by ieee80211_mgmt_output because
1181 * we need to hold the reference with the frame
1182 * and there's no other way (other than packet
1183 * tags which we consider too expensive to use)
1184 * to pass it along.
1185 */
1186 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1187 m->m_pkthdr.rcvif = NULL;
1188
1189 wh = mtod(m, struct ieee80211_frame *);
1190 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1191 IEEE80211_FC0_SUBTYPE_PROBE_RESP) {
1192 /* fill time stamp */
1193 u_int64_t tsf;
1194 u_int32_t *tstamp;
1195
1196 tsf = ath_hal_gettsf64(ah);
1197 /* XXX: adjust 100us delay to xmit */
1198 tsf += 100;
1199 tstamp = (u_int32_t *)&wh[1];
1200 tstamp[0] = htole32(tsf & 0xffffffff);
1201 tstamp[1] = htole32(tsf >> 32);
1202 }
1203 sc->sc_stats.ast_tx_mgmt++;
1204 }
1205
1206 if (ath_tx_start(sc, ni, bf, m)) {
1207 bad:
1208 ath_txbuf_critsect_begin(sc, s);
1209 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1210 ath_txbuf_critsect_end(sc, s);
1211 ifp->if_oerrors++;
1212 if (ni && ni != ic->ic_bss)
1213 ieee80211_free_node(ic, ni);
1214 continue;
1215 }
1216
1217 sc->sc_tx_timer = 5;
1218 ifp->if_timer = 1;
1219 }
1220 }
1221
1222 static int
1223 ath_media_change(struct ifnet *ifp)
1224 {
1225 int error;
1226
1227 error = ieee80211_media_change(ifp);
1228 if (error == ENETRESET) {
1229 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
1230 (IFF_RUNNING|IFF_UP))
1231 ath_init(ifp); /* XXX lose error */
1232 error = 0;
1233 }
1234 return error;
1235 }
1236
1237 static void
1238 ath_watchdog(struct ifnet *ifp)
1239 {
1240 struct ath_softc *sc = ifp->if_softc;
1241 struct ieee80211com *ic = &sc->sc_ic;
1242
1243 ifp->if_timer = 0;
1244 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
1245 return;
1246 if (sc->sc_tx_timer) {
1247 if (--sc->sc_tx_timer == 0) {
1248 if_printf(ifp, "device timeout\n");
1249 #ifdef AR_DEBUG
1250 if (ath_debug & ATH_DEBUG_WATCHDOG)
1251 ath_hal_dumpstate(sc->sc_ah);
1252 #endif /* AR_DEBUG */
1253 ath_reset(sc);
1254 ifp->if_oerrors++;
1255 sc->sc_stats.ast_watchdog++;
1256 return;
1257 }
1258 ifp->if_timer = 1;
1259 }
1260 if (ic->ic_fixed_rate == -1) {
1261 /*
1262 * Run the rate control algorithm if we're not
1263 * locked at a fixed rate.
1264 */
1265 if (ic->ic_opmode == IEEE80211_M_STA)
1266 ath_rate_ctl(sc, ic->ic_bss);
1267 else
1268 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc);
1269 }
1270 ieee80211_watchdog(ifp);
1271 }
1272
1273 static int
1274 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1275 {
1276 struct ath_softc *sc = ifp->if_softc;
1277 struct ifreq *ifr = (struct ifreq *)data;
1278 int error = 0;
1279 ath_softc_critsect_decl(s);
1280
1281 ath_softc_critsect_begin(sc, s);
1282 switch (cmd) {
1283 case SIOCSIFFLAGS:
1284 if (ifp->if_flags & IFF_UP) {
1285 if (ifp->if_flags & IFF_RUNNING) {
1286 /*
1287 * To avoid rescanning another access point,
1288 * do not call ath_init() here. Instead,
1289 * only reflect promisc mode settings.
1290 */
1291 ath_mode_init(sc);
1292 } else {
1293 /*
1294 * Beware of being called during detach to
1295 * reset promiscuous mode. In that case we
1296 * will still be marked UP but not RUNNING.
1297 * However trying to re-init the interface
1298 * is the wrong thing to do as we've already
1299 * torn down much of our state. There's
1300 * probably a better way to deal with this.
1301 */
1302 if (!sc->sc_invalid)
1303 ath_init(ifp); /* XXX lose error */
1304 }
1305 } else
1306 ath_stop(ifp);
1307 break;
1308 case SIOCADDMULTI:
1309 case SIOCDELMULTI:
1310 #ifdef __FreeBSD__
1311 /*
1312 * The upper layer has already installed/removed
1313 * the multicast address(es), just recalculate the
1314 * multicast filter for the card.
1315 */
1316 if (ifp->if_flags & IFF_RUNNING)
1317 ath_mode_init(sc);
1318 #endif
1319 #ifdef __NetBSD__
1320 error = (cmd == SIOCADDMULTI) ?
1321 ether_addmulti(ifr, &sc->sc_ic.ic_ec) :
1322 ether_delmulti(ifr, &sc->sc_ic.ic_ec);
1323 if (error == ENETRESET) {
1324 if (ifp->if_flags & IFF_RUNNING)
1325 ath_mode_init(sc);
1326 error = 0;
1327 }
1328 #endif
1329 break;
1330 case SIOCGATHSTATS:
1331 error = copyout(&sc->sc_stats,
1332 ifr->ifr_data, sizeof (sc->sc_stats));
1333 break;
1334 case SIOCGATHDIAG: {
1335 struct ath_diag *ad = (struct ath_diag *)data;
1336 struct ath_hal *ah = sc->sc_ah;
1337 void *data;
1338 u_int size;
1339
1340 if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) {
1341 if (size < ad->ad_size)
1342 ad->ad_size = size;
1343 if (data)
1344 error = copyout(data, ad->ad_data, ad->ad_size);
1345 } else
1346 error = EINVAL;
1347 break;
1348 }
1349 default:
1350 error = ieee80211_ioctl(ifp, cmd, data);
1351 if (error == ENETRESET) {
1352 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
1353 (IFF_RUNNING|IFF_UP))
1354 ath_init(ifp); /* XXX lose error */
1355 error = 0;
1356 }
1357 break;
1358 }
1359 ath_softc_critsect_end(sc, s);
1360 return error;
1361 }
1362
1363 /*
1364 * Fill the hardware key cache with key entries.
1365 */
1366 static void
1367 ath_initkeytable(struct ath_softc *sc)
1368 {
1369 struct ieee80211com *ic = &sc->sc_ic;
1370 struct ath_hal *ah = sc->sc_ah;
1371 int i;
1372
1373 for (i = 0; i < IEEE80211_WEP_NKID; i++) {
1374 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i];
1375 if (k->wk_len == 0)
1376 ath_hal_keyreset(ah, i);
1377 else
1378 /* XXX return value */
1379 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */
1380 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k);
1381 }
1382 }
1383
1384 static void
1385 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2])
1386 {
1387 u_int32_t val;
1388 u_int8_t pos;
1389
1390 val = LE_READ_4(dl + 0);
1391 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
1392 val = LE_READ_4(dl + 3);
1393 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
1394 pos &= 0x3f;
1395 (*mfilt)[pos / 32] |= (1 << (pos % 32));
1396 }
1397
1398 #ifdef __FreeBSD__
1399 static void
1400 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
1401 {
1402 struct ieee80211com *ic = &sc->sc_ic;
1403 struct ifnet *ifp = &ic->ic_if;
1404 struct ifmultiaddr *ifma;
1405
1406 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1407 caddr_t dl;
1408
1409 /* calculate XOR of eight 6bit values */
1410 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
1411 ath_mcastfilter_accum(dl, &mfilt);
1412 }
1413 }
1414 #else
1415 static void
1416 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
1417 {
1418 struct ifnet *ifp = &sc->sc_ic.ic_if;
1419 struct ether_multi *enm;
1420 struct ether_multistep estep;
1421
1422 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm);
1423 while (enm != NULL) {
1424 /* XXX Punt on ranges. */
1425 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) {
1426 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0);
1427 ifp->if_flags |= IFF_ALLMULTI;
1428 return;
1429 }
1430 ath_mcastfilter_accum(enm->enm_addrlo, mfilt);
1431 ETHER_NEXT_MULTI(estep, enm);
1432 }
1433 ifp->if_flags &= ~IFF_ALLMULTI;
1434 }
1435 #endif
1436
1437 /*
1438 * Calculate the receive filter according to the
1439 * operating mode and state:
1440 *
1441 * o always accept unicast, broadcast, and multicast traffic
1442 * o maintain current state of phy error reception
1443 * o probe request frames are accepted only when operating in
1444 * hostap, adhoc, or monitor modes
1445 * o enable promiscuous mode according to the interface state
1446 * o accept beacons:
1447 * - when operating in adhoc mode so the 802.11 layer creates
1448 * node table entries for peers,
1449 * - when operating in station mode for collecting rssi data when
1450 * the station is otherwise quiet, or
1451 * - when scanning
1452 */
1453 static u_int32_t
1454 ath_calcrxfilter(struct ath_softc *sc)
1455 {
1456 struct ieee80211com *ic = &sc->sc_ic;
1457 struct ath_hal *ah = sc->sc_ah;
1458 struct ifnet *ifp = &ic->ic_if;
1459 u_int32_t rfilt;
1460
1461 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
1462 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
1463 if (ic->ic_opmode != IEEE80211_M_STA)
1464 rfilt |= HAL_RX_FILTER_PROBEREQ;
1465 if (ic->ic_opmode == IEEE80211_M_STA ||
1466 ic->ic_opmode == IEEE80211_M_IBSS ||
1467 ic->ic_state == IEEE80211_S_SCAN)
1468 rfilt |= HAL_RX_FILTER_BEACON;
1469 if (ifp->if_flags & IFF_PROMISC)
1470 rfilt |= HAL_RX_FILTER_PROM;
1471 return rfilt;
1472 }
1473
1474 static void
1475 ath_mode_init(struct ath_softc *sc)
1476 {
1477 #ifdef __FreeBSD__
1478 struct ieee80211com *ic = &sc->sc_ic;
1479 #endif
1480 struct ath_hal *ah = sc->sc_ah;
1481 u_int32_t rfilt, mfilt[2];
1482
1483 /* configure rx filter */
1484 rfilt = ath_calcrxfilter(sc);
1485 ath_hal_setrxfilter(ah, rfilt);
1486
1487 /* configure operational mode */
1488 ath_hal_setopmode(ah);
1489
1490 /* calculate and install multicast filter */
1491 #ifdef __FreeBSD__
1492 if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) {
1493 mfilt[0] = mfilt[1] = 0;
1494 ath_mcastfilter_compute(sc, &mfilt);
1495 } else {
1496 mfilt[0] = mfilt[1] = ~0;
1497 }
1498 #endif
1499 #ifdef __NetBSD__
1500 mfilt[0] = mfilt[1] = 0;
1501 ath_mcastfilter_compute(sc, &mfilt);
1502 #endif
1503 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
1504 DPRINTF(ATH_DEBUG_MODE, ("%s: RX filter 0x%x, MC filter %08x:%08x\n",
1505 __func__, rfilt, mfilt[0], mfilt[1]));
1506 }
1507
1508 #ifdef __FreeBSD__
1509 static void
1510 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error)
1511 {
1512 struct ath_buf *bf = arg;
1513
1514 KASSERT(nseg <= ATH_MAX_SCATTER,
1515 ("ath_mbuf_load_cb: too many DMA segments %u", nseg));
1516 bf->bf_mapsize = mapsize;
1517 bf->bf_nseg = nseg;
1518 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0]));
1519 }
1520 #endif /* __FreeBSD__ */
1521
1522 static struct mbuf *
1523 ath_getmbuf(int flags, int type, u_int pktlen)
1524 {
1525 struct mbuf *m;
1526
1527 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen));
1528 #ifdef __FreeBSD__
1529 if (pktlen <= MHLEN)
1530 MGETHDR(m, flags, type);
1531 else
1532 m = m_getcl(flags, type, M_PKTHDR);
1533 #else
1534 MGETHDR(m, flags, type);
1535 if (m != NULL && pktlen > MHLEN)
1536 MCLGET(m, flags);
1537 #endif
1538 return m;
1539 }
1540
1541 static int
1542 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
1543 {
1544 struct ieee80211com *ic = &sc->sc_ic;
1545 struct ifnet *ifp = &ic->ic_if;
1546 struct ath_hal *ah = sc->sc_ah;
1547 struct ieee80211_frame *wh;
1548 struct ath_buf *bf;
1549 struct ath_desc *ds;
1550 struct mbuf *m;
1551 int error, pktlen;
1552 u_int8_t *frm, rate;
1553 u_int16_t capinfo;
1554 struct ieee80211_rateset *rs;
1555 const HAL_RATE_TABLE *rt;
1556
1557 bf = sc->sc_bcbuf;
1558 if (bf->bf_m != NULL) {
1559 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1560 m_freem(bf->bf_m);
1561 bf->bf_m = NULL;
1562 bf->bf_node = NULL;
1563 }
1564 /*
1565 * NB: the beacon data buffer must be 32-bit aligned;
1566 * we assume the mbuf routines will return us something
1567 * with this alignment (perhaps should assert).
1568 */
1569 rs = &ni->ni_rates;
1570 pktlen = sizeof (struct ieee80211_frame)
1571 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6;
1572 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
1573 pktlen += 2;
1574 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen);
1575 if (m == NULL) {
1576 DPRINTF(ATH_DEBUG_BEACON,
1577 ("%s: cannot get mbuf/cluster; size %u\n",
1578 __func__, pktlen));
1579 sc->sc_stats.ast_be_nombuf++;
1580 return ENOMEM;
1581 }
1582
1583 wh = mtod(m, struct ieee80211_frame *);
1584 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
1585 IEEE80211_FC0_SUBTYPE_BEACON;
1586 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1587 *(u_int16_t *)wh->i_dur = 0;
1588 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
1589 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
1590 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
1591 *(u_int16_t *)wh->i_seq = 0;
1592
1593 /*
1594 * beacon frame format
1595 * [8] time stamp
1596 * [2] beacon interval
1597 * [2] cabability information
1598 * [tlv] ssid
1599 * [tlv] supported rates
1600 * [tlv] parameter set (IBSS)
1601 * [tlv] extended supported rates
1602 */
1603 frm = (u_int8_t *)&wh[1];
1604 memset(frm, 0, 8); /* timestamp is set by hardware */
1605 frm += 8;
1606 *(u_int16_t *)frm = htole16(ni->ni_intval);
1607 frm += 2;
1608 if (ic->ic_opmode == IEEE80211_M_IBSS)
1609 capinfo = IEEE80211_CAPINFO_IBSS;
1610 else
1611 capinfo = IEEE80211_CAPINFO_ESS;
1612 if (ic->ic_flags & IEEE80211_F_PRIVACY)
1613 capinfo |= IEEE80211_CAPINFO_PRIVACY;
1614 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1615 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
1616 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
1617 if (ic->ic_flags & IEEE80211_F_SHSLOT)
1618 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
1619 *(u_int16_t *)frm = htole16(capinfo);
1620 frm += 2;
1621 *frm++ = IEEE80211_ELEMID_SSID;
1622 *frm++ = ni->ni_esslen;
1623 memcpy(frm, ni->ni_essid, ni->ni_esslen);
1624 frm += ni->ni_esslen;
1625 frm = ieee80211_add_rates(frm, rs);
1626 *frm++ = IEEE80211_ELEMID_DSPARMS;
1627 *frm++ = 1;
1628 *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan);
1629 if (ic->ic_opmode == IEEE80211_M_IBSS) {
1630 *frm++ = IEEE80211_ELEMID_IBSSPARMS;
1631 *frm++ = 2;
1632 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */
1633 } else {
1634 /* TODO: TIM */
1635 *frm++ = IEEE80211_ELEMID_TIM;
1636 *frm++ = 4; /* length */
1637 *frm++ = 0; /* DTIM count */
1638 *frm++ = 1; /* DTIM period */
1639 *frm++ = 0; /* bitmap control */
1640 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */
1641 }
1642 frm = ieee80211_add_xrates(frm, rs);
1643 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
1644 KASSERT(m->m_pkthdr.len <= pktlen,
1645 ("beacon bigger than expected, len %u calculated %u",
1646 m->m_pkthdr.len, pktlen));
1647
1648 DPRINTF(ATH_DEBUG_BEACON, ("%s: m %p len %u\n", __func__, m, m->m_len));
1649 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT);
1650 if (error != 0) {
1651 m_freem(m);
1652 return error;
1653 }
1654 KASSERT(bf->bf_nseg == 1,
1655 ("%s: multi-segment packet; nseg %u", __func__, bf->bf_nseg));
1656 bf->bf_m = m;
1657
1658 /* setup descriptors */
1659 ds = bf->bf_desc;
1660
1661 ds->ds_link = 0;
1662 ds->ds_data = bf->bf_segs[0].ds_addr;
1663
1664 DPRINTF(ATH_DEBUG_ANY, ("%s: segaddr %p seglen %u\n", __func__,
1665 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len));
1666
1667 /*
1668 * Calculate rate code.
1669 * XXX everything at min xmit rate
1670 */
1671 rt = sc->sc_currates;
1672 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1673 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1674 rate = rt->info[0].rateCode | rt->info[0].shortPreamble;
1675 else
1676 rate = rt->info[0].rateCode;
1677 if (!ath_hal_setuptxdesc(ah, ds
1678 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */
1679 , sizeof(struct ieee80211_frame) /* header length */
1680 , HAL_PKT_TYPE_BEACON /* Atheros packet type */
1681 , 0x20 /* txpower XXX */
1682 , rate, 1 /* series 0 rate/tries */
1683 , HAL_TXKEYIX_INVALID /* no encryption */
1684 , 0 /* antenna mode */
1685 , HAL_TXDESC_NOACK /* no ack for beacons */
1686 , 0 /* rts/cts rate */
1687 , 0 /* rts/cts duration */
1688 )) {
1689 printf("%s: ath_hal_setuptxdesc failed\n", __func__);
1690 return -1;
1691 }
1692 /* NB: beacon's BufLen must be a multiple of 4 bytes */
1693 /* XXX verify mbuf data area covers this roundup */
1694 if (!ath_hal_filltxdesc(ah, ds
1695 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */
1696 , AH_TRUE /* first segment */
1697 , AH_TRUE /* last segment */
1698 )) {
1699 printf("%s: ath_hal_filltxdesc failed\n", __func__);
1700 return -1;
1701 }
1702
1703 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */
1704
1705 return 0;
1706 }
1707
1708 static void
1709 ath_beacon_proc(void *arg, int pending)
1710 {
1711 struct ath_softc *sc = arg;
1712 struct ieee80211com *ic = &sc->sc_ic;
1713 struct ath_buf *bf = sc->sc_bcbuf;
1714 struct ath_hal *ah = sc->sc_ah;
1715
1716 DPRINTF(ATH_DEBUG_BEACON_PROC, ("%s: pending %u\n", __func__, pending));
1717 if (ic->ic_opmode == IEEE80211_M_STA ||
1718 bf == NULL || bf->bf_m == NULL) {
1719 DPRINTF(ATH_DEBUG_ANY, ("%s: ic_flags=%x bf=%p bf_m=%p\n",
1720 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL));
1721 return;
1722 }
1723 /* TODO: update beacon to reflect PS poll state */
1724 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
1725 DPRINTF(ATH_DEBUG_ANY, ("%s: beacon queue %u did not stop?\n",
1726 __func__, sc->sc_bhalq));
1727 /* NB: the HAL still stops DMA, so proceed */
1728 }
1729 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
1730
1731 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
1732 ath_hal_txstart(ah, sc->sc_bhalq);
1733 DPRINTF(ATH_DEBUG_BEACON_PROC,
1734 ("%s: TXDP%u = %p (%p)\n", __func__,
1735 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
1736 }
1737
1738 static void
1739 ath_beacon_free(struct ath_softc *sc)
1740 {
1741 struct ath_buf *bf = sc->sc_bcbuf;
1742
1743 if (bf->bf_m != NULL) {
1744 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1745 m_freem(bf->bf_m);
1746 bf->bf_m = NULL;
1747 bf->bf_node = NULL;
1748 }
1749 }
1750
1751 /*
1752 * Configure the beacon and sleep timers.
1753 *
1754 * When operating as an AP this resets the TSF and sets
1755 * up the hardware to notify us when we need to issue beacons.
1756 *
1757 * When operating in station mode this sets up the beacon
1758 * timers according to the timestamp of the last received
1759 * beacon and the current TSF, configures PCF and DTIM
1760 * handling, programs the sleep registers so the hardware
1761 * will wakeup in time to receive beacons, and configures
1762 * the beacon miss handling so we'll receive a BMISS
1763 * interrupt when we stop seeing beacons from the AP
1764 * we've associated with.
1765 */
1766 static void
1767 ath_beacon_config(struct ath_softc *sc)
1768 {
1769 struct ath_hal *ah = sc->sc_ah;
1770 struct ieee80211com *ic = &sc->sc_ic;
1771 struct ieee80211_node *ni = ic->ic_bss;
1772 u_int32_t nexttbtt;
1773
1774 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) |
1775 (LE_READ_4(ni->ni_tstamp) >> 10);
1776 DPRINTF(ATH_DEBUG_BEACON, ("%s: nexttbtt=%u\n", __func__, nexttbtt));
1777 nexttbtt += ni->ni_intval;
1778 if (ic->ic_opmode == IEEE80211_M_STA) {
1779 HAL_BEACON_STATE bs;
1780 u_int32_t bmisstime;
1781
1782 /* NB: no PCF support right now */
1783 memset(&bs, 0, sizeof(bs));
1784 bs.bs_intval = ni->ni_intval;
1785 bs.bs_nexttbtt = nexttbtt;
1786 bs.bs_dtimperiod = bs.bs_intval;
1787 bs.bs_nextdtim = nexttbtt;
1788 /*
1789 * Calculate the number of consecutive beacons to miss
1790 * before taking a BMISS interrupt. The configuration
1791 * is specified in ms, so we need to convert that to
1792 * TU's and then calculate based on the beacon interval.
1793 * Note that we clamp the result to at most 10 beacons.
1794 */
1795 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024;
1796 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval);
1797 if (bs.bs_bmissthreshold > 10)
1798 bs.bs_bmissthreshold = 10;
1799 else if (bs.bs_bmissthreshold <= 0)
1800 bs.bs_bmissthreshold = 1;
1801
1802 /*
1803 * Calculate sleep duration. The configuration is
1804 * given in ms. We insure a multiple of the beacon
1805 * period is used. Also, if the sleep duration is
1806 * greater than the DTIM period then it makes senses
1807 * to make it a multiple of that.
1808 *
1809 * XXX fixed at 100ms
1810 */
1811 bs.bs_sleepduration =
1812 roundup((100 * 1000) / 1024, bs.bs_intval);
1813 if (bs.bs_sleepduration > bs.bs_dtimperiod)
1814 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
1815
1816 DPRINTF(ATH_DEBUG_BEACON,
1817 ("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n"
1818 , __func__
1819 , bs.bs_intval
1820 , bs.bs_nexttbtt
1821 , bs.bs_dtimperiod
1822 , bs.bs_nextdtim
1823 , bs.bs_bmissthreshold
1824 , bs.bs_sleepduration
1825 ));
1826 ath_hal_intrset(ah, 0);
1827 /*
1828 * Reset our tsf so the hardware will update the
1829 * tsf register to reflect timestamps found in
1830 * received beacons.
1831 */
1832 ath_hal_resettsf(ah);
1833 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0);
1834 sc->sc_imask |= HAL_INT_BMISS;
1835 ath_hal_intrset(ah, sc->sc_imask);
1836 } else {
1837 DPRINTF(ATH_DEBUG_BEACON, ("%s: intval %u nexttbtt %u\n",
1838 __func__, ni->ni_intval, nexttbtt));
1839 ath_hal_intrset(ah, 0);
1840 ath_hal_beaconinit(ah, nexttbtt, ni->ni_intval);
1841 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1842 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */
1843 ath_hal_intrset(ah, sc->sc_imask);
1844 }
1845 }
1846
1847 #ifdef __FreeBSD__
1848 static void
1849 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1850 {
1851 bus_addr_t *paddr = (bus_addr_t*) arg;
1852 *paddr = segs->ds_addr;
1853 }
1854 #endif
1855
1856 #ifdef __FreeBSD__
1857 static int
1858 ath_desc_alloc(struct ath_softc *sc)
1859 {
1860 int i, bsize, error;
1861 struct ath_desc *ds;
1862 struct ath_buf *bf;
1863
1864 /* allocate descriptors */
1865 sc->sc_desc_len = sizeof(struct ath_desc) *
1866 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
1867 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap);
1868 if (error != 0)
1869 return error;
1870
1871 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc,
1872 BUS_DMA_NOWAIT, &sc->sc_ddmamap);
1873
1874 if (error != 0)
1875 goto fail0;
1876
1877 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap,
1878 sc->sc_desc, sc->sc_desc_len,
1879 ath_load_cb, &sc->sc_desc_paddr,
1880 BUS_DMA_NOWAIT);
1881 if (error != 0)
1882 goto fail1;
1883
1884 ds = sc->sc_desc;
1885 DPRINTF(ATH_DEBUG_ANY, ("%s: DMA map: %p (%lu) -> %p (%lu)\n",
1886 __func__, ds, (u_long) sc->sc_desc_len, (caddr_t) sc->sc_desc_paddr,
1887 /*XXX*/ (u_long) sc->sc_desc_len));
1888
1889 /* allocate buffers */
1890 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
1891 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
1892 if (bf == NULL) {
1893 printf("%s: unable to allocate Tx/Rx buffers\n",
1894 sc->sc_dev.dv_xname);
1895 error = -1;
1896 goto fail2;
1897 }
1898 sc->sc_bufptr = bf;
1899
1900 TAILQ_INIT(&sc->sc_rxbuf);
1901 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
1902 bf->bf_desc = ds;
1903 bf->bf_daddr = sc->sc_desc_paddr +
1904 ((caddr_t)ds - (caddr_t)sc->sc_desc);
1905 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
1906 &bf->bf_dmamap);
1907 if (error != 0)
1908 break;
1909 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
1910 }
1911
1912 TAILQ_INIT(&sc->sc_txbuf);
1913 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
1914 bf->bf_desc = ds;
1915 bf->bf_daddr = sc->sc_desc_paddr +
1916 ((caddr_t)ds - (caddr_t)sc->sc_desc);
1917 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
1918 &bf->bf_dmamap);
1919 if (error != 0)
1920 break;
1921 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1922 }
1923 TAILQ_INIT(&sc->sc_txq);
1924
1925 /* beacon buffer */
1926 bf->bf_desc = ds;
1927 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
1928 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap);
1929 if (error != 0)
1930 return error;
1931 sc->sc_bcbuf = bf;
1932 return 0;
1933
1934 fail2:
1935 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
1936 fail1:
1937 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
1938 fail0:
1939 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
1940 sc->sc_ddmamap = NULL;
1941 return error;
1942 }
1943 #else
1944 static int
1945 ath_desc_alloc(struct ath_softc *sc)
1946 {
1947 int i, bsize, error = -1;
1948 struct ath_desc *ds;
1949 struct ath_buf *bf;
1950
1951 /* allocate descriptors */
1952 sc->sc_desc_len = sizeof(struct ath_desc) *
1953 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
1954 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE,
1955 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) {
1956 printf("%s: unable to allocate control data, error = %d\n",
1957 sc->sc_dev.dv_xname, error);
1958 goto fail0;
1959 }
1960
1961 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg,
1962 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) {
1963 printf("%s: unable to map control data, error = %d\n",
1964 sc->sc_dev.dv_xname, error);
1965 goto fail1;
1966 }
1967
1968 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1,
1969 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) {
1970 printf("%s: unable to create control data DMA map, "
1971 "error = %d\n", sc->sc_dev.dv_xname, error);
1972 goto fail2;
1973 }
1974
1975 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc,
1976 sc->sc_desc_len, NULL, 0)) != 0) {
1977 printf("%s: unable to load control data DMA map, error = %d\n",
1978 sc->sc_dev.dv_xname, error);
1979 goto fail3;
1980 }
1981
1982 ds = sc->sc_desc;
1983 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr;
1984
1985 DPRINTF(ATH_DEBUG_XMIT_DESC|ATH_DEBUG_RECV_DESC,
1986 ("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n",
1987 ds, (u_long)sc->sc_desc_len,
1988 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
1989
1990 /* allocate buffers */
1991 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
1992 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
1993 if (bf == NULL) {
1994 printf("%s: unable to allocate Tx/Rx buffers\n",
1995 sc->sc_dev.dv_xname);
1996 error = ENOMEM;
1997 goto fail3;
1998 }
1999 sc->sc_bufptr = bf;
2000
2001 TAILQ_INIT(&sc->sc_rxbuf);
2002 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
2003 bf->bf_desc = ds;
2004 bf->bf_daddr = sc->sc_desc_paddr +
2005 ((caddr_t)ds - (caddr_t)sc->sc_desc);
2006 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
2007 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
2008 printf("%s: unable to create Rx dmamap, error = %d\n",
2009 sc->sc_dev.dv_xname, error);
2010 goto fail4;
2011 }
2012 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
2013 }
2014
2015 TAILQ_INIT(&sc->sc_txbuf);
2016 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
2017 bf->bf_desc = ds;
2018 bf->bf_daddr = sc->sc_desc_paddr +
2019 ((caddr_t)ds - (caddr_t)sc->sc_desc);
2020 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
2021 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
2022 printf("%s: unable to create Tx dmamap, error = %d\n",
2023 sc->sc_dev.dv_xname, error);
2024 goto fail5;
2025 }
2026 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2027 }
2028 TAILQ_INIT(&sc->sc_txq);
2029
2030 /* beacon buffer */
2031 bf->bf_desc = ds;
2032 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
2033 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
2034 &bf->bf_dmamap)) != 0) {
2035 printf("%s: unable to create beacon dmamap, error = %d\n",
2036 sc->sc_dev.dv_xname, error);
2037 goto fail5;
2038 }
2039 sc->sc_bcbuf = bf;
2040 return 0;
2041
2042 fail5:
2043 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) {
2044 if (sc->sc_bufptr[i].bf_dmamap == NULL)
2045 continue;
2046 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
2047 }
2048 fail4:
2049 for (i = 0; i < ATH_RXBUF; i++) {
2050 if (sc->sc_bufptr[i].bf_dmamap == NULL)
2051 continue;
2052 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
2053 }
2054 fail3:
2055 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
2056 fail2:
2057 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
2058 sc->sc_ddmamap = NULL;
2059 fail1:
2060 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len);
2061 fail0:
2062 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
2063 return error;
2064 }
2065 #endif
2066
2067 static void
2068 ath_desc_free(struct ath_softc *sc)
2069 {
2070 struct ath_buf *bf;
2071
2072 #ifdef __FreeBSD__
2073 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
2074 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
2075 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
2076 #else
2077 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
2078 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
2079 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
2080 #endif
2081
2082 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
2083 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2084 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
2085 m_freem(bf->bf_m);
2086 }
2087 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list)
2088 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
2089 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
2090 if (bf->bf_m) {
2091 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2092 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
2093 m_freem(bf->bf_m);
2094 bf->bf_m = NULL;
2095 }
2096 }
2097 if (sc->sc_bcbuf != NULL) {
2098 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
2099 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
2100 sc->sc_bcbuf = NULL;
2101 }
2102
2103 TAILQ_INIT(&sc->sc_rxbuf);
2104 TAILQ_INIT(&sc->sc_txbuf);
2105 TAILQ_INIT(&sc->sc_txq);
2106 free(sc->sc_bufptr, M_DEVBUF);
2107 sc->sc_bufptr = NULL;
2108 }
2109
2110 static struct ieee80211_node *
2111 ath_node_alloc(struct ieee80211com *ic)
2112 {
2113 struct ath_node *an =
2114 malloc(sizeof(struct ath_node), M_80211_NODE, M_NOWAIT|M_ZERO);
2115 if (an) {
2116 int i;
2117 for (i = 0; i < ATH_RHIST_SIZE; i++)
2118 an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME;
2119 an->an_rx_hist_next = ATH_RHIST_SIZE-1;
2120 return &an->an_node;
2121 } else
2122 return NULL;
2123 }
2124
2125 static void
2126 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
2127 {
2128 struct ath_softc *sc = ic->ic_if.if_softc;
2129 struct ath_buf *bf;
2130
2131 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
2132 if (bf->bf_node == ni)
2133 bf->bf_node = NULL;
2134 }
2135 (*sc->sc_node_free)(ic, ni);
2136 }
2137
2138 static void
2139 ath_node_copy(struct ieee80211com *ic,
2140 struct ieee80211_node *dst, const struct ieee80211_node *src)
2141 {
2142 struct ath_softc *sc = ic->ic_if.if_softc;
2143
2144 memcpy(&dst[1], &src[1],
2145 sizeof(struct ath_node) - sizeof(struct ieee80211_node));
2146 (*sc->sc_node_copy)(ic, dst, src);
2147 }
2148
2149 static u_int8_t
2150 ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni)
2151 {
2152 struct ath_node *an = ATH_NODE(ni);
2153 int i, now, nsamples, rssi;
2154
2155 /*
2156 * Calculate the average over the last second of sampled data.
2157 */
2158 now = ATH_TICKS();
2159 nsamples = 0;
2160 rssi = 0;
2161 i = an->an_rx_hist_next;
2162 do {
2163 struct ath_recv_hist *rh = &an->an_rx_hist[i];
2164 if (rh->arh_ticks == ATH_RHIST_NOTIME)
2165 goto done;
2166 if (now - rh->arh_ticks > hz)
2167 goto done;
2168 rssi += rh->arh_rssi;
2169 nsamples++;
2170 if (i == 0)
2171 i = ATH_RHIST_SIZE-1;
2172 else
2173 i--;
2174 } while (i != an->an_rx_hist_next);
2175 done:
2176 /*
2177 * Return either the average or the last known
2178 * value if there is no recent data.
2179 */
2180 return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi);
2181 }
2182
2183 static int
2184 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
2185 {
2186 struct ath_hal *ah = sc->sc_ah;
2187 int error;
2188 struct mbuf *m;
2189 struct ath_desc *ds;
2190
2191 m = bf->bf_m;
2192 if (m == NULL) {
2193 /*
2194 * NB: by assigning a page to the rx dma buffer we
2195 * implicitly satisfy the Atheros requirement that
2196 * this buffer be cache-line-aligned and sized to be
2197 * multiple of the cache line size. Not doing this
2198 * causes weird stuff to happen (for the 5210 at least).
2199 */
2200 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES);
2201 if (m == NULL) {
2202 DPRINTF(ATH_DEBUG_ANY,
2203 ("%s: no mbuf/cluster\n", __func__));
2204 sc->sc_stats.ast_rx_nombuf++;
2205 return ENOMEM;
2206 }
2207 bf->bf_m = m;
2208 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
2209
2210 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m,
2211 BUS_DMA_NOWAIT);
2212 if (error != 0) {
2213 DPRINTF(ATH_DEBUG_ANY,
2214 ("%s: ath_buf_dmamap_load_mbuf failed;"
2215 " error %d\n", __func__, error));
2216 sc->sc_stats.ast_rx_busdma++;
2217 return error;
2218 }
2219 KASSERT(bf->bf_nseg == 1,
2220 ("ath_rxbuf_init: multi-segment packet; nseg %u",
2221 bf->bf_nseg));
2222 }
2223 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD);
2224
2225 /*
2226 * Setup descriptors. For receive we always terminate
2227 * the descriptor list with a self-linked entry so we'll
2228 * not get overrun under high load (as can happen with a
2229 * 5212 when ANI processing enables PHY errors).
2230 *
2231 * To insure the last descriptor is self-linked we create
2232 * each descriptor as self-linked and add it to the end. As
2233 * each additional descriptor is added the previous self-linked
2234 * entry is ``fixed'' naturally. This should be safe even
2235 * if DMA is happening. When processing RX interrupts we
2236 * never remove/process the last, self-linked, entry on the
2237 * descriptor list. This insures the hardware always has
2238 * someplace to write a new frame.
2239 */
2240 ds = bf->bf_desc;
2241 ds->ds_link = bf->bf_daddr; /* link to self */
2242 ds->ds_data = bf->bf_segs[0].ds_addr;
2243 ath_hal_setuprxdesc(ah, ds
2244 , m->m_len /* buffer size */
2245 , 0
2246 );
2247
2248 if (sc->sc_rxlink != NULL)
2249 *sc->sc_rxlink = bf->bf_daddr;
2250 sc->sc_rxlink = &ds->ds_link;
2251 return 0;
2252 }
2253
2254 static void
2255 ath_rx_proc(void *arg, int npending)
2256 {
2257 #define PA2DESC(_sc, _pa) \
2258 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
2259 ((_pa) - (_sc)->sc_desc_paddr)))
2260 struct ath_softc *sc = arg;
2261 struct ath_buf *bf;
2262 struct ieee80211com *ic = &sc->sc_ic;
2263 struct ifnet *ifp = &ic->ic_if;
2264 struct ath_hal *ah = sc->sc_ah;
2265 struct ath_desc *ds;
2266 struct mbuf *m;
2267 struct ieee80211_frame *wh, whbuf;
2268 struct ieee80211_node *ni;
2269 struct ath_node *an;
2270 struct ath_recv_hist *rh;
2271 int len;
2272 u_int phyerr;
2273 HAL_STATUS status;
2274
2275 DPRINTF(ATH_DEBUG_RX_PROC, ("%s: pending %u\n", __func__, npending));
2276 do {
2277 bf = TAILQ_FIRST(&sc->sc_rxbuf);
2278 if (bf == NULL) { /* NB: shouldn't happen */
2279 if_printf(ifp, "ath_rx_proc: no buffer!\n");
2280 break;
2281 }
2282 ds = bf->bf_desc;
2283 if (ds->ds_link == bf->bf_daddr) {
2284 /* NB: never process the self-linked entry at the end */
2285 break;
2286 }
2287 m = bf->bf_m;
2288 if (m == NULL) { /* NB: shouldn't happen */
2289 if_printf(ifp, "ath_rx_proc: no mbuf!\n");
2290 continue;
2291 }
2292 /* XXX sync descriptor memory */
2293 /*
2294 * Must provide the virtual address of the current
2295 * descriptor, the physical address, and the virtual
2296 * address of the next descriptor in the h/w chain.
2297 * This allows the HAL to look ahead to see if the
2298 * hardware is done with a descriptor by checking the
2299 * done bit in the following descriptor and the address
2300 * of the current descriptor the DMA engine is working
2301 * on. All this is necessary because of our use of
2302 * a self-linked list to avoid rx overruns.
2303 */
2304 status = ath_hal_rxprocdesc(ah, ds,
2305 bf->bf_daddr, PA2DESC(sc, ds->ds_link));
2306 #ifdef AR_DEBUG
2307 if (ath_debug & ATH_DEBUG_RECV_DESC)
2308 ath_printrxbuf(bf, status == HAL_OK);
2309 #endif
2310 if (status == HAL_EINPROGRESS)
2311 break;
2312 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
2313 if (ds->ds_rxstat.rs_status != 0) {
2314 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC)
2315 sc->sc_stats.ast_rx_crcerr++;
2316 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO)
2317 sc->sc_stats.ast_rx_fifoerr++;
2318 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT)
2319 sc->sc_stats.ast_rx_badcrypt++;
2320 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) {
2321 sc->sc_stats.ast_rx_phyerr++;
2322 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f;
2323 sc->sc_stats.ast_rx_phy[phyerr]++;
2324 } else {
2325 /*
2326 * NB: don't count PHY errors as input errors;
2327 * we enable them on the 5212 to collect info
2328 * about environmental noise and, in that
2329 * setting, they don't really reflect tx/rx
2330 * errors.
2331 */
2332 ifp->if_ierrors++;
2333 }
2334 goto rx_next;
2335 }
2336
2337 len = ds->ds_rxstat.rs_datalen;
2338 if (len < IEEE80211_MIN_LEN) {
2339 DPRINTF(ATH_DEBUG_RECV, ("%s: short packet %d\n",
2340 __func__, len));
2341 sc->sc_stats.ast_rx_tooshort++;
2342 goto rx_next;
2343 }
2344
2345 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD);
2346
2347 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2348 bf->bf_m = NULL;
2349 m->m_pkthdr.rcvif = ifp;
2350 m->m_pkthdr.len = m->m_len = len;
2351
2352 #if NBPFILTER > 0
2353 if (sc->sc_drvbpf) {
2354 sc->sc_rx_th.wr_rate =
2355 sc->sc_hwmap[ds->ds_rxstat.rs_rate];
2356 sc->sc_rx_th.wr_antsignal = ds->ds_rxstat.rs_rssi;
2357 sc->sc_rx_th.wr_antenna = ds->ds_rxstat.rs_antenna;
2358 /* XXX TSF */
2359 bpf_mtap2(sc->sc_drvbpf,
2360 &sc->sc_rx_th, sc->sc_rx_th_len, m);
2361 }
2362 #endif
2363
2364 m_adj(m, -IEEE80211_CRC_LEN);
2365 wh = mtod(m, struct ieee80211_frame *);
2366 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
2367 /*
2368 * WEP is decrypted by hardware. Clear WEP bit
2369 * and trim WEP header for ieee80211_input().
2370 */
2371 wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
2372 memcpy(&whbuf, wh, sizeof(whbuf));
2373 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN);
2374 wh = mtod(m, struct ieee80211_frame *);
2375 memcpy(wh, &whbuf, sizeof(whbuf));
2376 /*
2377 * Also trim WEP ICV from the tail.
2378 */
2379 m_adj(m, -IEEE80211_WEP_CRCLEN);
2380 /*
2381 * The header has probably moved.
2382 */
2383 wh = mtod(m, struct ieee80211_frame *);
2384 }
2385
2386 /*
2387 * Locate the node for sender, track state, and
2388 * then pass this node (referenced) up to the 802.11
2389 * layer for its use. We are required to pass
2390 * something so we fall back to ic_bss when this frame
2391 * is from an unknown sender.
2392 */
2393 ni = ieee80211_find_rxnode(ic, wh);
2394
2395 /*
2396 * Record driver-specific state.
2397 */
2398 an = ATH_NODE(ni);
2399 if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE)
2400 an->an_rx_hist_next = 0;
2401 rh = &an->an_rx_hist[an->an_rx_hist_next];
2402 rh->arh_ticks = ATH_TICKS();
2403 rh->arh_rssi = ds->ds_rxstat.rs_rssi;
2404 rh->arh_antenna = ds->ds_rxstat.rs_antenna;
2405
2406 /*
2407 * Send frame up for processing.
2408 */
2409 ieee80211_input(ifp, m, ni,
2410 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp);
2411
2412 /*
2413 * The frame may have caused the node to be marked for
2414 * reclamation (e.g. in response to a DEAUTH message)
2415 * so use free_node here instead of unref_node.
2416 */
2417 if (ni == ic->ic_bss)
2418 ieee80211_unref_node(&ni);
2419 else
2420 ieee80211_free_node(ic, ni);
2421 rx_next:
2422 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
2423 } while (ath_rxbuf_init(sc, bf) == 0);
2424
2425 ath_hal_rxmonitor(ah); /* rx signal state monitoring */
2426 ath_hal_rxena(ah); /* in case of RXEOL */
2427
2428 #ifdef __NetBSD__
2429 if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd))
2430 ath_start(ifp);
2431 #endif /* __NetBSD__ */
2432 #undef PA2DESC
2433 }
2434
2435 /*
2436 * XXX Size of an ACK control frame in bytes.
2437 */
2438 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4)
2439
2440 static int
2441 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
2442 struct mbuf *m0)
2443 {
2444 struct ieee80211com *ic = &sc->sc_ic;
2445 struct ath_hal *ah = sc->sc_ah;
2446 struct ifnet *ifp = &sc->sc_ic.ic_if;
2447 int i, error, iswep, hdrlen, pktlen;
2448 u_int8_t rix, cix, txrate, ctsrate;
2449 struct ath_desc *ds;
2450 struct mbuf *m;
2451 struct ieee80211_frame *wh;
2452 u_int32_t iv;
2453 u_int8_t *ivp;
2454 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) +
2455 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN];
2456 u_int subtype, flags, ctsduration, antenna;
2457 HAL_PKT_TYPE atype;
2458 const HAL_RATE_TABLE *rt;
2459 HAL_BOOL shortPreamble;
2460 struct ath_node *an;
2461 ath_txq_critsect_decl(s);
2462
2463 wh = mtod(m0, struct ieee80211_frame *);
2464 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
2465 hdrlen = sizeof(struct ieee80211_frame);
2466 pktlen = m0->m_pkthdr.len;
2467
2468 if (iswep) {
2469 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen);
2470 m_adj(m0, hdrlen);
2471 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT);
2472 if (m0 == NULL) {
2473 sc->sc_stats.ast_tx_nombuf++;
2474 return ENOMEM;
2475 }
2476 ivp = hdrbuf + hdrlen;
2477 wh = mtod(m0, struct ieee80211_frame *);
2478 /*
2479 * XXX
2480 * IV must not duplicate during the lifetime of the key.
2481 * But no mechanism to renew keys is defined in IEEE 802.11
2482 * WEP. And IV may be duplicated between other stations
2483 * because of the session key itself is shared.
2484 * So we use pseudo random IV for now, though it is not the
2485 * right way.
2486 */
2487 iv = ic->ic_iv;
2488 /*
2489 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir:
2490 * (B, 255, N) with 3 <= B < 8
2491 */
2492 if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00)
2493 iv += 0x000100;
2494 ic->ic_iv = iv + 1;
2495 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) {
2496 ivp[i] = iv;
2497 iv >>= 8;
2498 }
2499 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */
2500 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf));
2501 /*
2502 * The ICV length must be included into hdrlen and pktlen.
2503 */
2504 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN;
2505 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN;
2506 }
2507 pktlen += IEEE80211_CRC_LEN;
2508
2509 /*
2510 * Load the DMA map so any coalescing is done. This
2511 * also calculates the number of descriptors we need.
2512 */
2513 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT);
2514 /*
2515 * Discard null packets and check for packets that
2516 * require too many TX descriptors. We try to convert
2517 * the latter to a cluster.
2518 */
2519 if (error == EFBIG) { /* too many desc's, linearize */
2520 sc->sc_stats.ast_tx_linear++;
2521 MGETHDR(m, M_DONTWAIT, MT_DATA);
2522 if (m == NULL) {
2523 sc->sc_stats.ast_tx_nombuf++;
2524 m_freem(m0);
2525 return ENOMEM;
2526 }
2527 #ifdef __FreeBSD__
2528 M_MOVE_PKTHDR(m, m0);
2529 #else
2530 M_COPY_PKTHDR(m, m0);
2531 #endif
2532 MCLGET(m, M_DONTWAIT);
2533 if ((m->m_flags & M_EXT) == 0) {
2534 sc->sc_stats.ast_tx_nomcl++;
2535 m_freem(m0);
2536 m_free(m);
2537 return ENOMEM;
2538 }
2539 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
2540 m_freem(m0);
2541 m->m_len = m->m_pkthdr.len;
2542 m0 = m;
2543 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0,
2544 BUS_DMA_NOWAIT);
2545 if (error != 0) {
2546 sc->sc_stats.ast_tx_busdma++;
2547 m_freem(m0);
2548 return error;
2549 }
2550 KASSERT(bf->bf_nseg == 1,
2551 ("ath_tx_start: packet not one segment; nseg %u",
2552 bf->bf_nseg));
2553 } else if (error != 0) {
2554 sc->sc_stats.ast_tx_busdma++;
2555 m_freem(m0);
2556 return error;
2557 } else if (bf->bf_nseg == 0) { /* null packet, discard */
2558 sc->sc_stats.ast_tx_nodata++;
2559 m_freem(m0);
2560 return EIO;
2561 }
2562 DPRINTF(ATH_DEBUG_XMIT, ("%s: m %p len %u\n", __func__, m0, pktlen));
2563 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
2564 bf->bf_m = m0;
2565 bf->bf_node = ni; /* NB: held reference */
2566
2567 /* setup descriptors */
2568 ds = bf->bf_desc;
2569 rt = sc->sc_currates;
2570 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2571
2572 /*
2573 * Calculate Atheros packet type from IEEE80211 packet header
2574 * and setup for rate calculations.
2575 */
2576 atype = HAL_PKT_TYPE_NORMAL; /* default */
2577 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
2578 case IEEE80211_FC0_TYPE_MGT:
2579 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2580 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
2581 atype = HAL_PKT_TYPE_BEACON;
2582 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
2583 atype = HAL_PKT_TYPE_PROBE_RESP;
2584 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
2585 atype = HAL_PKT_TYPE_ATIM;
2586 rix = 0; /* XXX lowest rate */
2587 break;
2588 case IEEE80211_FC0_TYPE_CTL:
2589 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2590 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL)
2591 atype = HAL_PKT_TYPE_PSPOLL;
2592 rix = 0; /* XXX lowest rate */
2593 break;
2594 default:
2595 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] &
2596 IEEE80211_RATE_VAL];
2597 if (rix == 0xff) {
2598 if_printf(ifp, "bogus xmit rate 0x%x\n",
2599 ni->ni_rates.rs_rates[ni->ni_txrate]);
2600 sc->sc_stats.ast_tx_badrate++;
2601 m_freem(m0);
2602 return EIO;
2603 }
2604 break;
2605 }
2606 /*
2607 * NB: the 802.11 layer marks whether or not we should
2608 * use short preamble based on the current mode and
2609 * negotiated parameters.
2610 */
2611 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
2612 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
2613 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble;
2614 shortPreamble = AH_TRUE;
2615 sc->sc_stats.ast_tx_shortpre++;
2616 } else {
2617 txrate = rt->info[rix].rateCode;
2618 shortPreamble = AH_FALSE;
2619 }
2620
2621 /*
2622 * Calculate miscellaneous flags.
2623 */
2624 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */
2625 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2626 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
2627 sc->sc_stats.ast_tx_noack++;
2628 } else if (pktlen > ic->ic_rtsthreshold) {
2629 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
2630 sc->sc_stats.ast_tx_rts++;
2631 }
2632
2633 /*
2634 * Calculate duration. This logically belongs in the 802.11
2635 * layer but it lacks sufficient information to calculate it.
2636 */
2637 if ((flags & HAL_TXDESC_NOACK) == 0 &&
2638 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
2639 u_int16_t dur;
2640 /*
2641 * XXX not right with fragmentation.
2642 */
2643 dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE,
2644 rix, shortPreamble);
2645 *((u_int16_t*) wh->i_dur) = htole16(dur);
2646 }
2647
2648 /*
2649 * Calculate RTS/CTS rate and duration if needed.
2650 */
2651 ctsduration = 0;
2652 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
2653 /*
2654 * CTS transmit rate is derived from the transmit rate
2655 * by looking in the h/w rate table. We must also factor
2656 * in whether or not a short preamble is to be used.
2657 */
2658 cix = rt->info[rix].controlRate;
2659 ctsrate = rt->info[cix].rateCode;
2660 if (shortPreamble)
2661 ctsrate |= rt->info[cix].shortPreamble;
2662 /*
2663 * Compute the transmit duration based on the size
2664 * of an ACK frame. We call into the HAL to do the
2665 * computation since it depends on the characteristics
2666 * of the actual PHY being used.
2667 */
2668 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */
2669 ctsduration += ath_hal_computetxtime(ah,
2670 rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
2671 }
2672 /* SIFS + data */
2673 ctsduration += ath_hal_computetxtime(ah,
2674 rt, pktlen, rix, shortPreamble);
2675 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */
2676 ctsduration += ath_hal_computetxtime(ah,
2677 rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
2678 }
2679 } else
2680 ctsrate = 0;
2681
2682 /*
2683 * For now use the antenna on which the last good
2684 * frame was received on. We assume this field is
2685 * initialized to 0 which gives us ``auto'' or the
2686 * ``default'' antenna.
2687 */
2688 an = (struct ath_node *) ni;
2689 if (an->an_tx_antenna)
2690 antenna = an->an_tx_antenna;
2691 else
2692 antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna;
2693
2694 if (ic->ic_rawbpf)
2695 bpf_mtap(ic->ic_rawbpf, m0);
2696 if (sc->sc_drvbpf) {
2697 sc->sc_tx_th.wt_flags = 0;
2698 if (shortPreamble)
2699 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2700 if (iswep)
2701 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2702 sc->sc_tx_th.wt_rate = ni->ni_rates.rs_rates[ni->ni_txrate];
2703 sc->sc_tx_th.wt_txpower = 60/2; /* XXX */
2704 sc->sc_tx_th.wt_antenna = antenna;
2705
2706 bpf_mtap2(sc->sc_drvbpf,
2707 &sc->sc_tx_th, sc->sc_tx_th_len, m0);
2708 }
2709
2710 /*
2711 * Formulate first tx descriptor with tx controls.
2712 */
2713 /* XXX check return value? */
2714 ath_hal_setuptxdesc(ah, ds
2715 , pktlen /* packet length */
2716 , hdrlen /* header length */
2717 , atype /* Atheros packet type */
2718 , 60 /* txpower XXX */
2719 , txrate, 1+10 /* series 0 rate/tries */
2720 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID
2721 , antenna /* antenna mode */
2722 , flags /* flags */
2723 , ctsrate /* rts/cts rate */
2724 , ctsduration /* rts/cts duration */
2725 );
2726 #ifdef notyet
2727 ath_hal_setupxtxdesc(ah, ds
2728 , AH_FALSE /* short preamble */
2729 , 0, 0 /* series 1 rate/tries */
2730 , 0, 0 /* series 2 rate/tries */
2731 , 0, 0 /* series 3 rate/tries */
2732 );
2733 #endif
2734 /*
2735 * Fillin the remainder of the descriptor info.
2736 */
2737 for (i = 0; i < bf->bf_nseg; i++, ds++) {
2738 ds->ds_data = bf->bf_segs[i].ds_addr;
2739 if (i == bf->bf_nseg - 1)
2740 ds->ds_link = 0;
2741 else
2742 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
2743 ath_hal_filltxdesc(ah, ds
2744 , bf->bf_segs[i].ds_len /* segment length */
2745 , i == 0 /* first segment */
2746 , i == bf->bf_nseg - 1 /* last segment */
2747 );
2748 DPRINTF(ATH_DEBUG_XMIT,
2749 ("%s: %d: %08x %08x %08x %08x %08x %08x\n",
2750 __func__, i, ds->ds_link, ds->ds_data,
2751 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]));
2752 }
2753
2754 /*
2755 * Insert the frame on the outbound list and
2756 * pass it on to the hardware.
2757 */
2758 ath_txq_critsect_begin(sc, s);
2759 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
2760 if (sc->sc_txlink == NULL) {
2761 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr);
2762 DPRINTF(ATH_DEBUG_XMIT, ("%s: TXDP0 = %p (%p)\n", __func__,
2763 (caddr_t)bf->bf_daddr, bf->bf_desc));
2764 } else {
2765 *sc->sc_txlink = bf->bf_daddr;
2766 DPRINTF(ATH_DEBUG_XMIT, ("%s: link(%p)=%p (%p)\n", __func__,
2767 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc));
2768 }
2769 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
2770 ath_txq_critsect_end(sc, s);
2771
2772 ath_hal_txstart(ah, sc->sc_txhalq);
2773 return 0;
2774 }
2775
2776 static void
2777 ath_tx_proc(void *arg, int npending)
2778 {
2779 struct ath_softc *sc = arg;
2780 struct ath_hal *ah = sc->sc_ah;
2781 struct ath_buf *bf;
2782 struct ieee80211com *ic = &sc->sc_ic;
2783 struct ifnet *ifp = &ic->ic_if;
2784 struct ath_desc *ds;
2785 struct ieee80211_node *ni;
2786 struct ath_node *an;
2787 int sr, lr;
2788 HAL_STATUS status;
2789 ath_txq_critsect_decl(s);
2790 ath_txbuf_critsect_decl(s2);
2791
2792 DPRINTF(ATH_DEBUG_TX_PROC, ("%s: pending %u tx queue %p, link %p\n",
2793 __func__, npending,
2794 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq),
2795 sc->sc_txlink));
2796 for (;;) {
2797 ath_txq_critsect_begin(sc, s);
2798 bf = TAILQ_FIRST(&sc->sc_txq);
2799 if (bf == NULL) {
2800 sc->sc_txlink = NULL;
2801 ath_txq_critsect_end(sc, s);
2802 break;
2803 }
2804 /* only the last descriptor is needed */
2805 ds = &bf->bf_desc[bf->bf_nseg - 1];
2806 status = ath_hal_txprocdesc(ah, ds);
2807 #ifdef AR_DEBUG
2808 if (ath_debug & ATH_DEBUG_XMIT_DESC)
2809 ath_printtxbuf(bf, status == HAL_OK);
2810 #endif
2811 if (status == HAL_EINPROGRESS) {
2812 ath_txq_critsect_end(sc, s);
2813 break;
2814 }
2815 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
2816 ath_txq_critsect_end(sc, s);
2817
2818 ni = bf->bf_node;
2819 if (ni != NULL) {
2820 an = (struct ath_node *) ni;
2821 if (ds->ds_txstat.ts_status == 0) {
2822 an->an_tx_ok++;
2823 an->an_tx_antenna = ds->ds_txstat.ts_antenna;
2824 } else {
2825 an->an_tx_err++;
2826 ifp->if_oerrors++;
2827 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY)
2828 sc->sc_stats.ast_tx_xretries++;
2829 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO)
2830 sc->sc_stats.ast_tx_fifoerr++;
2831 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT)
2832 sc->sc_stats.ast_tx_filtered++;
2833 an->an_tx_antenna = 0; /* invalidate */
2834 }
2835 sr = ds->ds_txstat.ts_shortretry;
2836 lr = ds->ds_txstat.ts_longretry;
2837 sc->sc_stats.ast_tx_shortretry += sr;
2838 sc->sc_stats.ast_tx_longretry += lr;
2839 if (sr + lr)
2840 an->an_tx_retr++;
2841 /*
2842 * Reclaim reference to node.
2843 *
2844 * NB: the node may be reclaimed here if, for example
2845 * this is a DEAUTH message that was sent and the
2846 * node was timed out due to inactivity.
2847 */
2848 if (ni != ic->ic_bss)
2849 ieee80211_free_node(ic, ni);
2850 }
2851 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE);
2852 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2853 m_freem(bf->bf_m);
2854 bf->bf_m = NULL;
2855 bf->bf_node = NULL;
2856
2857 ath_txbuf_critsect_begin(sc, s2);
2858 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2859 ath_txbuf_critsect_end(sc, s2);
2860 }
2861 ifp->if_flags &= ~IFF_OACTIVE;
2862 sc->sc_tx_timer = 0;
2863
2864 ath_start(ifp);
2865 }
2866
2867 /*
2868 * Drain the transmit queue and reclaim resources.
2869 */
2870 static void
2871 ath_draintxq(struct ath_softc *sc)
2872 {
2873 struct ath_hal *ah = sc->sc_ah;
2874 struct ieee80211com *ic = &sc->sc_ic;
2875 struct ifnet *ifp = &ic->ic_if;
2876 struct ieee80211_node *ni;
2877 struct ath_buf *bf;
2878 ath_txq_critsect_decl(s);
2879 ath_txbuf_critsect_decl(s2);
2880
2881 /* XXX return value */
2882 if (!sc->sc_invalid) {
2883 /* don't touch the hardware if marked invalid */
2884 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq);
2885 DPRINTF(ATH_DEBUG_RESET,
2886 ("%s: tx queue %p, link %p\n", __func__,
2887 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq),
2888 sc->sc_txlink));
2889 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
2890 DPRINTF(ATH_DEBUG_RESET,
2891 ("%s: beacon queue %p\n", __func__,
2892 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq)));
2893 }
2894 for (;;) {
2895 ath_txq_critsect_begin(sc, s);
2896 bf = TAILQ_FIRST(&sc->sc_txq);
2897 if (bf == NULL) {
2898 sc->sc_txlink = NULL;
2899 ath_txq_critsect_end(sc, s);
2900 break;
2901 }
2902 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
2903 ath_txq_critsect_end(sc, s);
2904 #ifdef AR_DEBUG
2905 if (ath_debug & ATH_DEBUG_RESET)
2906 ath_printtxbuf(bf,
2907 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK);
2908 #endif /* AR_DEBUG */
2909 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2910 m_freem(bf->bf_m);
2911 bf->bf_m = NULL;
2912 ni = bf->bf_node;
2913 bf->bf_node = NULL;
2914 ath_txbuf_critsect_begin(sc, s2);
2915 if (ni != NULL && ni != ic->ic_bss) {
2916 /*
2917 * Reclaim node reference.
2918 */
2919 ieee80211_free_node(ic, ni);
2920 }
2921 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2922 ath_txbuf_critsect_end(sc, s2);
2923 }
2924 ifp->if_flags &= ~IFF_OACTIVE;
2925 sc->sc_tx_timer = 0;
2926 }
2927
2928 /*
2929 * Disable the receive h/w in preparation for a reset.
2930 */
2931 static void
2932 ath_stoprecv(struct ath_softc *sc)
2933 {
2934 #define PA2DESC(_sc, _pa) \
2935 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
2936 ((_pa) - (_sc)->sc_desc_paddr)))
2937 struct ath_hal *ah = sc->sc_ah;
2938
2939 ath_hal_stoppcurecv(ah); /* disable PCU */
2940 ath_hal_setrxfilter(ah, 0); /* clear recv filter */
2941 ath_hal_stopdmarecv(ah); /* disable DMA engine */
2942 DELAY(3000); /* long enough for 1 frame */
2943 #ifdef AR_DEBUG
2944 if (ath_debug & ATH_DEBUG_RESET) {
2945 struct ath_buf *bf;
2946
2947 printf("%s: rx queue %p, link %p\n", __func__,
2948 (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
2949 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
2950 struct ath_desc *ds = bf->bf_desc;
2951 if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr,
2952 PA2DESC(sc, ds->ds_link)) == HAL_OK)
2953 ath_printrxbuf(bf, 1);
2954 }
2955 }
2956 #endif
2957 sc->sc_rxlink = NULL; /* just in case */
2958 #undef PA2DESC
2959 }
2960
2961 /*
2962 * Enable the receive h/w following a reset.
2963 */
2964 static int
2965 ath_startrecv(struct ath_softc *sc)
2966 {
2967 struct ath_hal *ah = sc->sc_ah;
2968 struct ath_buf *bf;
2969
2970 sc->sc_rxlink = NULL;
2971 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
2972 int error = ath_rxbuf_init(sc, bf);
2973 if (error != 0) {
2974 DPRINTF(ATH_DEBUG_RECV,
2975 ("%s: ath_rxbuf_init failed %d\n",
2976 __func__, error));
2977 return error;
2978 }
2979 }
2980
2981 bf = TAILQ_FIRST(&sc->sc_rxbuf);
2982 ath_hal_putrxbuf(ah, bf->bf_daddr);
2983 ath_hal_rxena(ah); /* enable recv descriptors */
2984 ath_mode_init(sc); /* set filters, etc. */
2985 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
2986 return 0;
2987 }
2988
2989 /*
2990 * Set/change channels. If the channel is really being changed,
2991 * it's done by resetting the chip. To accomplish this we must
2992 * first cleanup any pending DMA, then restart stuff after a la
2993 * ath_init.
2994 */
2995 static int
2996 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
2997 {
2998 struct ath_hal *ah = sc->sc_ah;
2999 struct ieee80211com *ic = &sc->sc_ic;
3000
3001 DPRINTF(ATH_DEBUG_ANY, ("%s: %u (%u MHz) -> %u (%u MHz)\n", __func__,
3002 ieee80211_chan2ieee(ic, ic->ic_ibss_chan),
3003 ic->ic_ibss_chan->ic_freq,
3004 ieee80211_chan2ieee(ic, chan), chan->ic_freq));
3005 if (chan != ic->ic_ibss_chan) {
3006 HAL_STATUS status;
3007 HAL_CHANNEL hchan;
3008 enum ieee80211_phymode mode;
3009
3010 /*
3011 * To switch channels clear any pending DMA operations;
3012 * wait long enough for the RX fifo to drain, reset the
3013 * hardware at the new frequency, and then re-enable
3014 * the relevant bits of the h/w.
3015 */
3016 ath_hal_intrset(ah, 0); /* disable interrupts */
3017 ath_draintxq(sc); /* clear pending tx frames */
3018 ath_stoprecv(sc); /* turn off frame recv */
3019 /*
3020 * Convert to a HAL channel description with
3021 * the flags constrained to reflect the current
3022 * operating mode.
3023 */
3024 hchan.channel = chan->ic_freq;
3025 hchan.channelFlags = ath_chan2flags(ic, chan);
3026 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) {
3027 if_printf(&ic->ic_if, "ath_chan_set: unable to reset "
3028 "channel %u (%u Mhz)\n",
3029 ieee80211_chan2ieee(ic, chan), chan->ic_freq);
3030 return EIO;
3031 }
3032 /*
3033 * Re-enable rx framework.
3034 */
3035 if (ath_startrecv(sc) != 0) {
3036 if_printf(&ic->ic_if,
3037 "ath_chan_set: unable to restart recv logic\n");
3038 return EIO;
3039 }
3040
3041 /*
3042 * Update BPF state.
3043 */
3044 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
3045 htole16(chan->ic_freq);
3046 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
3047 htole16(chan->ic_flags);
3048
3049 /*
3050 * Change channels and update the h/w rate map
3051 * if we're switching; e.g. 11a to 11b/g.
3052 */
3053 ic->ic_ibss_chan = chan;
3054 mode = ieee80211_chan2mode(ic, chan);
3055 if (mode != sc->sc_curmode)
3056 ath_setcurmode(sc, mode);
3057
3058 /*
3059 * Re-enable interrupts.
3060 */
3061 ath_hal_intrset(ah, sc->sc_imask);
3062 }
3063 return 0;
3064 }
3065
3066 static void
3067 ath_next_scan(void *arg)
3068 {
3069 struct ath_softc *sc = arg;
3070 struct ieee80211com *ic = &sc->sc_ic;
3071 struct ifnet *ifp = &ic->ic_if;
3072 int s;
3073
3074 /* don't call ath_start w/o network interrupts blocked */
3075 s = splnet();
3076
3077 if (ic->ic_state == IEEE80211_S_SCAN)
3078 ieee80211_next_scan(ifp);
3079 splx(s);
3080 }
3081
3082 /*
3083 * Periodically recalibrate the PHY to account
3084 * for temperature/environment changes.
3085 */
3086 static void
3087 ath_calibrate(void *arg)
3088 {
3089 struct ath_softc *sc = arg;
3090 struct ath_hal *ah = sc->sc_ah;
3091 struct ieee80211com *ic = &sc->sc_ic;
3092 struct ieee80211_channel *c;
3093 HAL_CHANNEL hchan;
3094
3095 sc->sc_stats.ast_per_cal++;
3096
3097 /*
3098 * Convert to a HAL channel description with the flags
3099 * constrained to reflect the current operating mode.
3100 */
3101 c = ic->ic_ibss_chan;
3102 hchan.channel = c->ic_freq;
3103 hchan.channelFlags = ath_chan2flags(ic, c);
3104
3105 DPRINTF(ATH_DEBUG_CALIBRATE,
3106 ("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags));
3107
3108 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
3109 /*
3110 * Rfgain is out of bounds, reset the chip
3111 * to load new gain values.
3112 */
3113 sc->sc_stats.ast_per_rfgain++;
3114 ath_reset(sc);
3115 }
3116 if (!ath_hal_calibrate(ah, &hchan)) {
3117 DPRINTF(ATH_DEBUG_ANY,
3118 ("%s: calibration of channel %u failed\n",
3119 __func__, c->ic_freq));
3120 sc->sc_stats.ast_per_calfail++;
3121 }
3122 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc);
3123 }
3124
3125 static HAL_LED_STATE
3126 ath_state_to_led(enum ieee80211_state state)
3127 {
3128 switch (state) {
3129 case IEEE80211_S_INIT:
3130 return HAL_LED_INIT;
3131 case IEEE80211_S_SCAN:
3132 return HAL_LED_SCAN;
3133 case IEEE80211_S_AUTH:
3134 return HAL_LED_AUTH;
3135 case IEEE80211_S_ASSOC:
3136 return HAL_LED_ASSOC;
3137 case IEEE80211_S_RUN:
3138 return HAL_LED_RUN;
3139 default:
3140 panic("%s: unknown 802.11 state %d\n", __func__, state);
3141 return HAL_LED_INIT;
3142 }
3143 }
3144
3145 static int
3146 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
3147 {
3148 struct ifnet *ifp = &ic->ic_if;
3149 struct ath_softc *sc = ifp->if_softc;
3150 struct ath_hal *ah = sc->sc_ah;
3151 struct ieee80211_node *ni;
3152 int i, error;
3153 const u_int8_t *bssid;
3154 u_int32_t rfilt;
3155
3156 DPRINTF(ATH_DEBUG_ANY, ("%s: %s -> %s\n", __func__,
3157 ieee80211_state_name[ic->ic_state],
3158 ieee80211_state_name[nstate]));
3159
3160 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */
3161
3162 if (nstate == IEEE80211_S_INIT) {
3163 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
3164 ath_hal_intrset(ah, sc->sc_imask);
3165 callout_stop(&sc->sc_scan_ch);
3166 callout_stop(&sc->sc_cal_ch);
3167 return (*sc->sc_newstate)(ic, nstate, arg);
3168 }
3169 ni = ic->ic_bss;
3170 error = ath_chan_set(sc, ni->ni_chan);
3171 if (error != 0)
3172 goto bad;
3173 rfilt = ath_calcrxfilter(sc);
3174 if (nstate == IEEE80211_S_SCAN) {
3175 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000,
3176 ath_next_scan, sc);
3177 bssid = ifp->if_broadcastaddr;
3178 } else {
3179 callout_stop(&sc->sc_scan_ch);
3180 bssid = ni->ni_bssid;
3181 }
3182 ath_hal_setrxfilter(ah, rfilt);
3183 DPRINTF(ATH_DEBUG_ANY, ("%s: RX filter 0x%x bssid %s\n",
3184 __func__, rfilt, ether_sprintf(bssid)));
3185
3186 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA)
3187 ath_hal_setassocid(ah, bssid, ni->ni_associd);
3188 else
3189 ath_hal_setassocid(ah, bssid, 0);
3190 if (ic->ic_flags & IEEE80211_F_PRIVACY) {
3191 for (i = 0; i < IEEE80211_WEP_NKID; i++)
3192 if (ath_hal_keyisvalid(ah, i))
3193 ath_hal_keysetmac(ah, i, bssid);
3194 }
3195
3196 if (nstate == IEEE80211_S_RUN) {
3197 DPRINTF(ATH_DEBUG_ANY, ("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s "
3198 "capinfo=0x%04x chan=%d\n"
3199 , __func__
3200 , ic->ic_flags
3201 , ni->ni_intval
3202 , ether_sprintf(ni->ni_bssid)
3203 , ni->ni_capinfo
3204 , ieee80211_chan2ieee(ic, ni->ni_chan)));
3205
3206 /*
3207 * Allocate and setup the beacon frame for AP or adhoc mode.
3208 */
3209 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
3210 ic->ic_opmode == IEEE80211_M_IBSS) {
3211 error = ath_beacon_alloc(sc, ni);
3212 if (error != 0)
3213 goto bad;
3214 }
3215
3216 /*
3217 * Configure the beacon and sleep timers.
3218 */
3219 ath_beacon_config(sc);
3220
3221 /* start periodic recalibration timer */
3222 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval,
3223 ath_calibrate, sc);
3224 } else {
3225 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
3226 ath_hal_intrset(ah, sc->sc_imask);
3227 callout_stop(&sc->sc_cal_ch); /* no calibration */
3228 }
3229 /*
3230 * Reset the rate control state.
3231 */
3232 ath_rate_ctl_reset(sc, nstate);
3233 /*
3234 * Invoke the parent method to complete the work.
3235 */
3236 return (*sc->sc_newstate)(ic, nstate, arg);
3237 bad:
3238 callout_stop(&sc->sc_scan_ch);
3239 callout_stop(&sc->sc_cal_ch);
3240 /* NB: do not invoke the parent */
3241 return error;
3242 }
3243
3244 /*
3245 * Setup driver-specific state for a newly associated node.
3246 * Note that we're called also on a re-associate, the isnew
3247 * param tells us if this is the first time or not.
3248 */
3249 static void
3250 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
3251 {
3252 if (isnew) {
3253 struct ath_node *an = (struct ath_node *) ni;
3254
3255 an->an_tx_ok = an->an_tx_err =
3256 an->an_tx_retr = an->an_tx_upper = 0;
3257 /* start with highest negotiated rate */
3258 /*
3259 * XXX should do otherwise but only when
3260 * the rate control algorithm is better.
3261 */
3262 KASSERT(ni->ni_rates.rs_nrates > 0,
3263 ("new association w/ no rates!"));
3264 ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
3265 }
3266 }
3267
3268 static int
3269 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor,
3270 HAL_BOOL xchanmode)
3271 {
3272 struct ieee80211com *ic = &sc->sc_ic;
3273 struct ifnet *ifp = &ic->ic_if;
3274 struct ath_hal *ah = sc->sc_ah;
3275 HAL_CHANNEL *chans;
3276 int i, ix, nchan;
3277
3278 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL),
3279 M_TEMP, M_NOWAIT);
3280 if (chans == NULL) {
3281 if_printf(ifp, "unable to allocate channel table\n");
3282 return ENOMEM;
3283 }
3284 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
3285 cc, HAL_MODE_ALL, outdoor, xchanmode)) {
3286 if_printf(ifp, "unable to collect channel list from hal\n");
3287 free(chans, M_TEMP);
3288 return EINVAL;
3289 }
3290
3291 /*
3292 * Convert HAL channels to ieee80211 ones and insert
3293 * them in the table according to their channel number.
3294 */
3295 for (i = 0; i < nchan; i++) {
3296 HAL_CHANNEL *c = &chans[i];
3297 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags);
3298 if (ix > IEEE80211_CHAN_MAX) {
3299 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n",
3300 ix, c->channel, c->channelFlags);
3301 continue;
3302 }
3303 DPRINTF(ATH_DEBUG_ANY,
3304 ("%s: HAL channel %d/%d freq %d flags %#04x idx %d\n",
3305 sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags,
3306 ix));
3307 /* NB: flags are known to be compatible */
3308 if (ic->ic_channels[ix].ic_freq == 0) {
3309 ic->ic_channels[ix].ic_freq = c->channel;
3310 ic->ic_channels[ix].ic_flags = c->channelFlags;
3311 } else {
3312 /* channels overlap; e.g. 11g and 11b */
3313 ic->ic_channels[ix].ic_flags |= c->channelFlags;
3314 }
3315 }
3316 free(chans, M_TEMP);
3317 return 0;
3318 }
3319
3320 static int
3321 ath_rate_setup(struct ath_softc *sc, u_int mode)
3322 {
3323 struct ath_hal *ah = sc->sc_ah;
3324 struct ieee80211com *ic = &sc->sc_ic;
3325 const HAL_RATE_TABLE *rt;
3326 struct ieee80211_rateset *rs;
3327 int i, maxrates;
3328
3329 switch (mode) {
3330 case IEEE80211_MODE_11A:
3331 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A);
3332 break;
3333 case IEEE80211_MODE_11B:
3334 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B);
3335 break;
3336 case IEEE80211_MODE_11G:
3337 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G);
3338 break;
3339 case IEEE80211_MODE_TURBO:
3340 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO);
3341 break;
3342 default:
3343 DPRINTF(ATH_DEBUG_ANY,
3344 ("%s: invalid mode %u\n", __func__, mode));
3345 return 0;
3346 }
3347 rt = sc->sc_rates[mode];
3348 if (rt == NULL)
3349 return 0;
3350 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) {
3351 DPRINTF(ATH_DEBUG_ANY,
3352 ("%s: rate table too small (%u > %u)\n",
3353 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE));
3354 maxrates = IEEE80211_RATE_MAXSIZE;
3355 } else
3356 maxrates = rt->rateCount;
3357 rs = &ic->ic_sup_rates[mode];
3358 for (i = 0; i < maxrates; i++)
3359 rs->rs_rates[i] = rt->info[i].dot11Rate;
3360 rs->rs_nrates = maxrates;
3361 return 1;
3362 }
3363
3364 static void
3365 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
3366 {
3367 const HAL_RATE_TABLE *rt;
3368 int i;
3369
3370 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
3371 rt = sc->sc_rates[mode];
3372 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
3373 for (i = 0; i < rt->rateCount; i++)
3374 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i;
3375 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
3376 for (i = 0; i < 32; i++)
3377 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate;
3378 sc->sc_currates = rt;
3379 sc->sc_curmode = mode;
3380 }
3381
3382 /*
3383 * Reset the rate control state for each 802.11 state transition.
3384 */
3385 static void
3386 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state)
3387 {
3388 struct ieee80211com *ic = &sc->sc_ic;
3389 struct ieee80211_node *ni;
3390 struct ath_node *an;
3391
3392 if (ic->ic_opmode != IEEE80211_M_STA) {
3393 /*
3394 * When operating as a station the node table holds
3395 * the AP's that were discovered during scanning.
3396 * For any other operating mode we want to reset the
3397 * tx rate state of each node.
3398 */
3399 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) {
3400 ni->ni_txrate = 0; /* use lowest rate */
3401 an = (struct ath_node *) ni;
3402 an->an_tx_ok = an->an_tx_err = an->an_tx_retr =
3403 an->an_tx_upper = 0;
3404 }
3405 }
3406 /*
3407 * Reset local xmit state; this is really only meaningful
3408 * when operating in station or adhoc mode.
3409 */
3410 ni = ic->ic_bss;
3411 an = (struct ath_node *) ni;
3412 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0;
3413 if (state == IEEE80211_S_RUN) {
3414 /* start with highest negotiated rate */
3415 KASSERT(ni->ni_rates.rs_nrates > 0,
3416 ("transition to RUN state w/ no rates!"));
3417 ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
3418 } else {
3419 /* use lowest rate */
3420 ni->ni_txrate = 0;
3421 }
3422 }
3423
3424 /*
3425 * Examine and potentially adjust the transmit rate.
3426 */
3427 static void
3428 ath_rate_ctl(void *arg, struct ieee80211_node *ni)
3429 {
3430 struct ath_softc *sc = arg;
3431 struct ath_node *an = (struct ath_node *) ni;
3432 struct ieee80211_rateset *rs = &ni->ni_rates;
3433 int mod = 0, orate, enough;
3434
3435 /*
3436 * Rate control
3437 * XXX: very primitive version.
3438 */
3439 sc->sc_stats.ast_rate_calls++;
3440
3441 enough = (an->an_tx_ok + an->an_tx_err >= 10);
3442
3443 /* no packet reached -> down */
3444 if (an->an_tx_err > 0 && an->an_tx_ok == 0)
3445 mod = -1;
3446
3447 /* all packets needs retry in average -> down */
3448 if (enough && an->an_tx_ok < an->an_tx_retr)
3449 mod = -1;
3450
3451 /* no error and less than 10% of packets needs retry -> up */
3452 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10)
3453 mod = 1;
3454
3455 orate = ni->ni_txrate;
3456 switch (mod) {
3457 case 0:
3458 if (enough && an->an_tx_upper > 0)
3459 an->an_tx_upper--;
3460 break;
3461 case -1:
3462 if (ni->ni_txrate > 0) {
3463 ni->ni_txrate--;
3464 sc->sc_stats.ast_rate_drop++;
3465 }
3466 an->an_tx_upper = 0;
3467 break;
3468 case 1:
3469 if (++an->an_tx_upper < 2)
3470 break;
3471 an->an_tx_upper = 0;
3472 if (ni->ni_txrate + 1 < rs->rs_nrates) {
3473 ni->ni_txrate++;
3474 sc->sc_stats.ast_rate_raise++;
3475 }
3476 break;
3477 }
3478
3479 if (ni->ni_txrate != orate) {
3480 DPRINTF(ATH_DEBUG_RATE,
3481 ("%s: %dM -> %dM (%d ok, %d err, %d retr)\n",
3482 __func__,
3483 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2,
3484 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2,
3485 an->an_tx_ok, an->an_tx_err, an->an_tx_retr));
3486 }
3487 if (ni->ni_txrate != orate || enough)
3488 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0;
3489 }
3490
3491 #ifdef AR_DEBUG
3492 #ifdef __FreeBSD__
3493 static int
3494 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
3495 {
3496 char dmode[64];
3497 int error;
3498
3499 strncpy(dmode, "", sizeof(dmode) - 1);
3500 dmode[sizeof(dmode) - 1] = '\0';
3501 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
3502
3503 if (error == 0 && req->newptr != NULL) {
3504 struct ifnet *ifp;
3505 struct ath_softc *sc;
3506
3507 ifp = ifunit("ath0"); /* XXX */
3508 if (!ifp)
3509 return EINVAL;
3510 sc = ifp->if_softc;
3511 if (strcmp(dmode, "hal") == 0)
3512 ath_hal_dumpstate(sc->sc_ah);
3513 else
3514 return EINVAL;
3515 }
3516 return error;
3517 }
3518 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
3519 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
3520 #endif /* __FreeBSD__ */
3521
3522 #if 0 /* #ifdef __NetBSD__ */
3523 static int
3524 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
3525 {
3526 char dmode[64];
3527 int error;
3528
3529 strncpy(dmode, "", sizeof(dmode) - 1);
3530 dmode[sizeof(dmode) - 1] = '\0';
3531 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
3532
3533 if (error == 0 && req->newptr != NULL) {
3534 struct ifnet *ifp;
3535 struct ath_softc *sc;
3536
3537 ifp = ifunit("ath0"); /* XXX */
3538 if (!ifp)
3539 return EINVAL;
3540 sc = ifp->if_softc;
3541 if (strcmp(dmode, "hal") == 0)
3542 ath_hal_dumpstate(sc->sc_ah);
3543 else
3544 return EINVAL;
3545 }
3546 return error;
3547 }
3548 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
3549 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
3550 #endif /* __NetBSD__ */
3551
3552 static void
3553 ath_printrxbuf(struct ath_buf *bf, int done)
3554 {
3555 struct ath_desc *ds;
3556 int i;
3557
3558 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
3559 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n",
3560 i, ds, (struct ath_desc *)bf->bf_daddr + i,
3561 ds->ds_link, ds->ds_data,
3562 ds->ds_ctl0, ds->ds_ctl1,
3563 ds->ds_hw[0], ds->ds_hw[1],
3564 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!');
3565 }
3566 }
3567
3568 static void
3569 ath_printtxbuf(struct ath_buf *bf, int done)
3570 {
3571 struct ath_desc *ds;
3572 int i;
3573
3574 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
3575 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n",
3576 i, ds, (struct ath_desc *)bf->bf_daddr + i,
3577 ds->ds_link, ds->ds_data,
3578 ds->ds_ctl0, ds->ds_ctl1,
3579 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3],
3580 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!');
3581 }
3582 }
3583 #endif /* AR_DEBUG */
3584