ath.c revision 1.31
1 /* $NetBSD: ath.c,v 1.31 2004/07/28 08:57:40 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.54 2004/04/05 04:42:42 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.31 2004/07/28 08:57:40 dyoung Exp $"); 45 #endif 46 47 /* 48 * Driver for the Atheros Wireless LAN controller. 49 * 50 * This software is derived from work of Atsushi Onoe; his contribution 51 * is greatly appreciated. 52 */ 53 54 #include "opt_inet.h" 55 56 #ifdef __NetBSD__ 57 #include "bpfilter.h" 58 #endif /* __NetBSD__ */ 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/types.h> 63 #include <sys/sysctl.h> 64 #include <sys/mbuf.h> 65 #include <sys/malloc.h> 66 #include <sys/lock.h> 67 #ifdef __FreeBSD__ 68 #include <sys/mutex.h> 69 #endif 70 #include <sys/kernel.h> 71 #include <sys/socket.h> 72 #include <sys/sockio.h> 73 #include <sys/errno.h> 74 #include <sys/callout.h> 75 #ifdef __FreeBSD__ 76 #include <sys/bus.h> 77 #else 78 #include <machine/bus.h> 79 #endif 80 #include <sys/endian.h> 81 82 #include <machine/bus.h> 83 84 #include <net/if.h> 85 #include <net/if_dl.h> 86 #include <net/if_media.h> 87 #include <net/if_arp.h> 88 #ifdef __FreeBSD__ 89 #include <net/ethernet.h> 90 #else 91 #include <net/if_ether.h> 92 #endif 93 #include <net/if_llc.h> 94 95 #include <net80211/ieee80211_var.h> 96 #include <net80211/ieee80211_compat.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #endif 101 102 #ifdef INET 103 #include <netinet/in.h> 104 #endif 105 106 #include <dev/ic/athcompat.h> 107 108 #define AR_DEBUG 109 #ifdef __FreeBSD__ 110 #include <dev/ath/if_athvar.h> 111 #include <contrib/dev/ath/ah_desc.h> 112 #else 113 #include <dev/ic/athvar.h> 114 #include <../contrib/sys/dev/ic/athhal_desc.h> 115 #endif 116 117 /* unaligned little endian access */ 118 #define LE_READ_2(p) \ 119 ((u_int16_t) \ 120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 121 #define LE_READ_4(p) \ 122 ((u_int32_t) \ 123 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 124 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 125 126 #ifdef __FreeBSD__ 127 static void ath_init(void *); 128 #else 129 static int ath_init(struct ifnet *); 130 #endif 131 static int ath_init1(struct ath_softc *); 132 static int ath_intr1(struct ath_softc *); 133 static void ath_stop(struct ifnet *); 134 static void ath_start(struct ifnet *); 135 static void ath_reset(struct ath_softc *); 136 static int ath_media_change(struct ifnet *); 137 static void ath_watchdog(struct ifnet *); 138 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 139 static void ath_fatal_proc(void *, int); 140 static void ath_rxorn_proc(void *, int); 141 static void ath_bmiss_proc(void *, int); 142 static void ath_initkeytable(struct ath_softc *); 143 static void ath_mode_init(struct ath_softc *); 144 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 145 static void ath_beacon_proc(void *, int); 146 static void ath_beacon_free(struct ath_softc *); 147 static void ath_beacon_config(struct ath_softc *); 148 static int ath_desc_alloc(struct ath_softc *); 149 static void ath_desc_free(struct ath_softc *); 150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 151 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 152 static void ath_node_copy(struct ieee80211com *, 153 struct ieee80211_node *, const struct ieee80211_node *); 154 static u_int8_t ath_node_getrssi(struct ieee80211com *, 155 struct ieee80211_node *); 156 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 157 static void ath_rx_proc(void *, int); 158 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 159 struct ath_buf *, struct mbuf *); 160 static void ath_tx_proc(void *, int); 161 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 162 static void ath_draintxq(struct ath_softc *); 163 static void ath_stoprecv(struct ath_softc *); 164 static int ath_startrecv(struct ath_softc *); 165 static void ath_next_scan(void *); 166 static void ath_calibrate(void *); 167 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 168 static void ath_newassoc(struct ieee80211com *, 169 struct ieee80211_node *, int); 170 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor, 171 HAL_BOOL xchanmode); 172 173 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 174 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 175 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 176 static void ath_rate_ctl(void *, struct ieee80211_node *); 177 178 #ifdef __NetBSD__ 179 int ath_enable(struct ath_softc *); 180 void ath_disable(struct ath_softc *); 181 void ath_power(int, void *); 182 #endif 183 184 #ifdef __FreeBSD__ 185 SYSCTL_DECL(_hw_ath); 186 /* XXX validate sysctl values */ 187 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 188 0, "channel dwell time (ms) for AP/station scanning"); 189 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 190 0, "chip calibration interval (secs)"); 191 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 192 0, "enable/disable outdoor operation"); 193 TUNABLE_INT("hw.ath.outdoor", &ath_outdoor); 194 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 195 0, "country code"); 196 TUNABLE_INT("hw.ath.countrycode", &ath_countrycode); 197 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 198 0, "regulatory domain"); 199 #endif /* __FreeBSD__ */ 200 201 #ifdef __NetBSD__ 202 static int ath_dwelltime_nodenum, ath_calibrate_nodenum, ath_outdoor_nodenum, 203 ath_countrycode_nodenum, ath_regdomain_nodenum, ath_debug_nodenum; 204 #endif /* __NetBSD__ */ 205 206 static int ath_dwelltime = 200; /* 5 channels/second */ 207 static int ath_calinterval = 30; /* calibrate every 30 secs */ 208 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 209 static int ath_xchanmode = AH_TRUE; /* enable extended channels */ 210 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 211 static int ath_regdomain = 0; /* regulatory domain */ 212 213 #ifdef AR_DEBUG 214 int ath_debug = 0; 215 #ifdef __FreeBSD__ 216 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 217 0, "control debugging printfs"); 218 TUNABLE_INT("hw.ath.debug", &ath_debug); 219 #endif /* __FreeBSD__ */ 220 #define IFF_DUMPPKTS(_ifp, _m) \ 221 ((ath_debug & _m) || \ 222 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 223 static void ath_printrxbuf(struct ath_buf *bf, int); 224 static void ath_printtxbuf(struct ath_buf *bf, int); 225 enum { 226 ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 227 ATH_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 228 ATH_DEBUG_RECV = 0x00000004, /* basic recv operation */ 229 ATH_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 230 ATH_DEBUG_RATE = 0x00000010, /* rate control */ 231 ATH_DEBUG_RESET = 0x00000020, /* reset processing */ 232 ATH_DEBUG_MODE = 0x00000040, /* mode init/setup */ 233 ATH_DEBUG_BEACON = 0x00000080, /* beacon handling */ 234 ATH_DEBUG_WATCHDOG = 0x00000100, /* watchdog timeout */ 235 ATH_DEBUG_INTR = 0x00001000, /* ISR */ 236 ATH_DEBUG_TX_PROC = 0x00002000, /* tx ISR proc */ 237 ATH_DEBUG_RX_PROC = 0x00004000, /* rx ISR proc */ 238 ATH_DEBUG_BEACON_PROC = 0x00008000, /* beacon ISR proc */ 239 ATH_DEBUG_CALIBRATE = 0x00010000, /* periodic calibration */ 240 ATH_DEBUG_ANY = 0xffffffff 241 }; 242 #define DPRINTF(_m,X) if (ath_debug & (_m)) printf X 243 #else 244 #define IFF_DUMPPKTS(_ifp, _m) \ 245 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 246 #define DPRINTF(_m, X) 247 #endif 248 249 #ifdef __NetBSD__ 250 int 251 ath_activate(struct device *self, enum devact act) 252 { 253 struct ath_softc *sc = (struct ath_softc *)self; 254 int rv = 0, s; 255 256 s = splnet(); 257 switch (act) { 258 case DVACT_ACTIVATE: 259 rv = EOPNOTSUPP; 260 break; 261 case DVACT_DEACTIVATE: 262 if_deactivate(&sc->sc_ic.ic_if); 263 break; 264 } 265 splx(s); 266 return rv; 267 } 268 269 int 270 ath_enable(struct ath_softc *sc) 271 { 272 if (ATH_IS_ENABLED(sc) == 0) { 273 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 274 printf("%s: device enable failed\n", 275 sc->sc_dev.dv_xname); 276 return (EIO); 277 } 278 sc->sc_flags |= ATH_ENABLED; 279 } 280 return (0); 281 } 282 283 void 284 ath_disable(struct ath_softc *sc) 285 { 286 if (!ATH_IS_ENABLED(sc)) 287 return; 288 if (sc->sc_disable != NULL) 289 (*sc->sc_disable)(sc); 290 sc->sc_flags &= ~ATH_ENABLED; 291 } 292 293 static int 294 sysctl_ath_verify(SYSCTLFN_ARGS) 295 { 296 int error, t; 297 struct sysctlnode node; 298 299 node = *rnode; 300 t = *(int*)rnode->sysctl_data; 301 node.sysctl_data = &t; 302 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 303 if (error || newp == NULL) 304 return (error); 305 306 DPRINTF(ATH_DEBUG_ANY, ("%s: t = %d, nodenum = %d, rnodenum = %d\n", 307 __func__, t, node.sysctl_num, rnode->sysctl_num)); 308 309 if (node.sysctl_num == ath_dwelltime_nodenum) { 310 if (t <= 0) 311 return (EINVAL); 312 } else if (node.sysctl_num == ath_calibrate_nodenum) { 313 if (t <= 0) 314 return (EINVAL); 315 #ifdef AR_DEBUG 316 } else if (node.sysctl_num == ath_debug_nodenum) { 317 if (t < 0 || t > 2) 318 return (EINVAL); 319 #endif /* AR_DEBUG */ 320 } else 321 return (EINVAL); 322 323 *(int*)rnode->sysctl_data = t; 324 325 return (0); 326 } 327 328 /* 329 * Setup sysctl(3) MIB, ath.*. 330 * 331 * TBD condition CTLFLAG_PERMANENT on being an LKM or not 332 */ 333 SYSCTL_SETUP(sysctl_ath, "sysctl ath subtree setup") 334 { 335 int rc, ath_node_num; 336 struct sysctlnode *node; 337 338 if ((rc = sysctl_createv(clog, 0, NULL, NULL, 339 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL, 340 NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) 341 goto err; 342 343 if ((rc = sysctl_createv(clog, 0, NULL, &node, 344 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ath", 345 SYSCTL_DESCR("ath information and options"), 346 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 347 goto err; 348 349 ath_node_num = node->sysctl_num; 350 351 /* channel dwell time (ms) for AP/station scanning */ 352 if ((rc = sysctl_createv(clog, 0, NULL, &node, 353 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 354 CTLTYPE_INT, "dwell", 355 SYSCTL_DESCR("Channel dwell time (ms) for AP/station scanning"), 356 sysctl_ath_verify, 0, &ath_dwelltime, 357 0, CTL_HW, ath_node_num, CTL_CREATE, 358 CTL_EOL)) != 0) 359 goto err; 360 361 ath_dwelltime_nodenum = node->sysctl_num; 362 363 /* chip calibration interval (secs) */ 364 if ((rc = sysctl_createv(clog, 0, NULL, &node, 365 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 366 CTLTYPE_INT, "calibrate", 367 SYSCTL_DESCR("Chip calibration interval (secs)"), sysctl_ath_verify, 368 0, &ath_calinterval, 0, CTL_HW, 369 ath_node_num, CTL_CREATE, CTL_EOL)) != 0) 370 goto err; 371 372 ath_calibrate_nodenum = node->sysctl_num; 373 374 /* enable/disable outdoor operation */ 375 if ((rc = sysctl_createv(clog, 0, NULL, &node, 376 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 377 "outdoor", SYSCTL_DESCR("Enable/disable outdoor operation"), 378 NULL, 0, &ath_outdoor, 0, 379 CTL_HW, ath_node_num, CTL_CREATE, 380 CTL_EOL)) != 0) 381 goto err; 382 383 ath_outdoor_nodenum = node->sysctl_num; 384 385 /* country code */ 386 if ((rc = sysctl_createv(clog, 0, NULL, &node, 387 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 388 "countrycode", SYSCTL_DESCR("Country code"), 389 NULL, 0, &ath_countrycode, 0, 390 CTL_HW, ath_node_num, CTL_CREATE, 391 CTL_EOL)) != 0) 392 goto err; 393 394 ath_countrycode_nodenum = node->sysctl_num; 395 396 /* regulatory domain */ 397 if ((rc = sysctl_createv(clog, 0, NULL, &node, 398 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 399 "regdomain", SYSCTL_DESCR("Regulatory domain"), 400 NULL, 0, &ath_regdomain, 0, 401 CTL_HW, ath_node_num, CTL_CREATE, 402 CTL_EOL)) != 0) 403 goto err; 404 405 ath_regdomain_nodenum = node->sysctl_num; 406 407 #ifdef AR_DEBUG 408 409 /* control debugging printfs */ 410 if ((rc = sysctl_createv(clog, 0, NULL, &node, 411 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 412 "debug", SYSCTL_DESCR("Enable/disable ath debugging output"), 413 sysctl_ath_verify, 0, &ath_debug, 0, 414 CTL_HW, ath_node_num, CTL_CREATE, 415 CTL_EOL)) != 0) 416 goto err; 417 418 ath_debug_nodenum = node->sysctl_num; 419 420 #endif /* AR_DEBUG */ 421 return; 422 err: 423 printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 424 } 425 #endif /* __NetBSD__ */ 426 427 int 428 ath_attach(u_int16_t devid, struct ath_softc *sc) 429 { 430 struct ieee80211com *ic = &sc->sc_ic; 431 struct ifnet *ifp = &ic->ic_if; 432 struct ath_hal *ah; 433 HAL_STATUS status; 434 HAL_TXQ_INFO qinfo; 435 int error = 0; 436 437 DPRINTF(ATH_DEBUG_ANY, ("%s: devid 0x%x\n", __func__, devid)); 438 439 #ifdef __FreeBSD__ 440 /* set these up early for if_printf use */ 441 if_initname(ifp, device_get_name(sc->sc_dev), 442 device_get_unit(sc->sc_dev)); 443 #else 444 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 445 #endif 446 447 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 448 if (ah == NULL) { 449 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 450 status); 451 error = ENXIO; 452 goto bad; 453 } 454 if (ah->ah_abi != HAL_ABI_VERSION) { 455 if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n", 456 ah->ah_abi, HAL_ABI_VERSION); 457 error = ENXIO; 458 goto bad; 459 } 460 if_printf(ifp, "mac %d.%d phy %d.%d", 461 ah->ah_macVersion, ah->ah_macRev, 462 ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf); 463 if (ah->ah_analog5GhzRev) 464 printf(" 5ghz radio %d.%d", 465 ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf); 466 if (ah->ah_analog2GhzRev) 467 printf(" 2ghz radio %d.%d", 468 ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf); 469 printf("\n"); 470 sc->sc_ah = ah; 471 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 472 473 /* 474 * Collect the channel list using the default country 475 * code and including outdoor channels. The 802.11 layer 476 * is resposible for filtering this list based on settings 477 * like the phy mode. 478 */ 479 error = ath_getchannels(sc, ath_countrycode, ath_outdoor, 480 ath_xchanmode); 481 if (error != 0) 482 goto bad; 483 /* 484 * Copy these back; they are set as a side effect 485 * of constructing the channel list. 486 */ 487 ath_hal_getregdomain(ah, &ath_regdomain); 488 ath_hal_getcountrycode(ah, &ath_countrycode); 489 490 /* 491 * Setup rate tables for all potential media types. 492 */ 493 ath_rate_setup(sc, IEEE80211_MODE_11A); 494 ath_rate_setup(sc, IEEE80211_MODE_11B); 495 ath_rate_setup(sc, IEEE80211_MODE_11G); 496 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 497 498 error = ath_desc_alloc(sc); 499 if (error != 0) { 500 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 501 goto bad; 502 } 503 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 504 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 505 506 #ifdef __FreeBSD__ 507 ATH_TXBUF_LOCK_INIT(sc); 508 ATH_TXQ_LOCK_INIT(sc); 509 #endif 510 511 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 512 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 513 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 514 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 515 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 516 517 /* 518 * For now just pre-allocate one data queue and one 519 * beacon queue. Note that the HAL handles resetting 520 * them at the needed time. Eventually we'll want to 521 * allocate more tx queues for splitting management 522 * frames and for QOS support. 523 */ 524 sc->sc_bhalq = ath_hal_setuptxqueue(ah,HAL_TX_QUEUE_BEACON,NULL); 525 if (sc->sc_bhalq == (u_int) -1) { 526 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 527 goto bad2; 528 } 529 530 memset(&qinfo, 0, sizeof(qinfo)); 531 qinfo.tqi_subtype = HAL_WME_AC_BE; 532 sc->sc_txhalq = ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_DATA, &qinfo); 533 if (sc->sc_txhalq == (u_int) -1) { 534 if_printf(ifp, "unable to setup a data xmit queue!\n"); 535 goto bad2; 536 } 537 538 ifp->if_softc = sc; 539 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 540 ifp->if_start = ath_start; 541 ifp->if_watchdog = ath_watchdog; 542 ifp->if_ioctl = ath_ioctl; 543 ifp->if_init = ath_init; 544 #ifdef __FreeBSD__ 545 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 546 #else 547 #if 0 548 ifp->if_stop = ath_stop; /* XXX */ 549 #endif 550 IFQ_SET_READY(&ifp->if_snd); 551 #endif 552 553 ic->ic_softc = sc; 554 ic->ic_newassoc = ath_newassoc; 555 /* XXX not right but it's not used anywhere important */ 556 ic->ic_phytype = IEEE80211_T_OFDM; 557 ic->ic_opmode = IEEE80211_M_STA; 558 ic->ic_caps = IEEE80211_C_WEP /* wep supported */ 559 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 560 | IEEE80211_C_HOSTAP /* hostap mode */ 561 | IEEE80211_C_MONITOR /* monitor mode */ 562 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 563 ; 564 565 /* get mac address from hardware */ 566 ath_hal_getmac(ah, ic->ic_myaddr); 567 568 #ifdef __NetBSD__ 569 if_attach(ifp); 570 #endif 571 /* call MI attach routine. */ 572 ieee80211_ifattach(ifp); 573 /* override default methods */ 574 ic->ic_node_alloc = ath_node_alloc; 575 sc->sc_node_free = ic->ic_node_free; 576 ic->ic_node_free = ath_node_free; 577 sc->sc_node_copy = ic->ic_node_copy; 578 ic->ic_node_copy = ath_node_copy; 579 ic->ic_node_getrssi = ath_node_getrssi; 580 sc->sc_newstate = ic->ic_newstate; 581 ic->ic_newstate = ath_newstate; 582 /* complete initialization */ 583 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 584 585 #if NBPFILTER > 0 586 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 587 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 588 &sc->sc_drvbpf); 589 #endif 590 /* 591 * Initialize constant fields. 592 * XXX make header lengths a multiple of 32-bits so subsequent 593 * headers are properly aligned; this is a kludge to keep 594 * certain applications happy. 595 * 596 * NB: the channel is setup each time we transition to the 597 * RUN state to avoid filling it in for each frame. 598 */ 599 sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(u_int32_t)); 600 sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len); 601 sc->sc_tx_th.wt_ihdr.it_present = htole32(ATH_TX_RADIOTAP_PRESENT); 602 603 sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(u_int32_t)); 604 sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len); 605 sc->sc_rx_th.wr_ihdr.it_present = htole32(ATH_RX_RADIOTAP_PRESENT); 606 607 #ifdef __NetBSD__ 608 sc->sc_flags |= ATH_ATTACHED; 609 /* 610 * Make sure the interface is shutdown during reboot. 611 */ 612 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 613 if (sc->sc_sdhook == NULL) 614 printf("%s: WARNING: unable to establish shutdown hook\n", 615 sc->sc_dev.dv_xname); 616 sc->sc_powerhook = powerhook_establish(ath_power, sc); 617 if (sc->sc_powerhook == NULL) 618 printf("%s: WARNING: unable to establish power hook\n", 619 sc->sc_dev.dv_xname); 620 #endif 621 return 0; 622 bad2: 623 ath_desc_free(sc); 624 bad: 625 if (ah) 626 ath_hal_detach(ah); 627 sc->sc_invalid = 1; 628 return error; 629 } 630 631 int 632 ath_detach(struct ath_softc *sc) 633 { 634 struct ifnet *ifp = &sc->sc_ic.ic_if; 635 ath_softc_critsect_decl(s); 636 637 if ((sc->sc_flags & ATH_ATTACHED) == 0) 638 return (0); 639 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 640 641 ath_softc_critsect_begin(sc, s); 642 ath_stop(ifp); 643 #if NBPFILTER > 0 644 bpfdetach(ifp); 645 #endif 646 ath_desc_free(sc); 647 ath_hal_detach(sc->sc_ah); 648 ieee80211_ifdetach(ifp); 649 #ifdef __NetBSD__ 650 if_detach(ifp); 651 #endif /* __NetBSD__ */ 652 ath_softc_critsect_end(sc, s); 653 #ifdef __NetBSD__ 654 powerhook_disestablish(sc->sc_powerhook); 655 shutdownhook_disestablish(sc->sc_sdhook); 656 #endif /* __NetBSD__ */ 657 #ifdef __FreeBSD__ 658 659 ATH_TXBUF_LOCK_DESTROY(sc); 660 ATH_TXQ_LOCK_DESTROY(sc); 661 662 #endif /* __FreeBSD__ */ 663 return 0; 664 } 665 666 #ifdef __NetBSD__ 667 void 668 ath_power(int why, void *arg) 669 { 670 struct ath_softc *sc = arg; 671 int s; 672 673 DPRINTF(ATH_DEBUG_ANY, ("ath_power(%d)\n", why)); 674 675 s = splnet(); 676 switch (why) { 677 case PWR_SUSPEND: 678 case PWR_STANDBY: 679 ath_suspend(sc, why); 680 break; 681 case PWR_RESUME: 682 ath_resume(sc, why); 683 break; 684 case PWR_SOFTSUSPEND: 685 case PWR_SOFTSTANDBY: 686 case PWR_SOFTRESUME: 687 break; 688 } 689 splx(s); 690 } 691 #endif 692 693 void 694 ath_suspend(struct ath_softc *sc, int why) 695 { 696 struct ifnet *ifp = &sc->sc_ic.ic_if; 697 698 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 699 700 ath_stop(ifp); 701 if (sc->sc_power != NULL) 702 (*sc->sc_power)(sc, why); 703 } 704 705 void 706 ath_resume(struct ath_softc *sc, int why) 707 { 708 struct ifnet *ifp = &sc->sc_ic.ic_if; 709 710 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 711 712 if (ifp->if_flags & IFF_UP) { 713 ath_init(ifp); 714 #if 0 715 (void)ath_intr(sc); 716 #endif 717 if (sc->sc_power != NULL) 718 (*sc->sc_power)(sc, why); 719 if (ifp->if_flags & IFF_RUNNING) 720 ath_start(ifp); 721 } 722 } 723 724 #ifdef __NetBSD__ 725 void 726 ath_shutdown(void *arg) 727 { 728 struct ath_softc *sc = arg; 729 730 ath_stop(&sc->sc_ic.ic_if); 731 } 732 #else 733 void 734 ath_shutdown(struct ath_softc *sc) 735 { 736 #if 1 737 return; 738 #else 739 struct ifnet *ifp = &sc->sc_ic.ic_if; 740 741 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 742 743 ath_stop(ifp); 744 #endif 745 } 746 #endif 747 748 #ifdef __NetBSD__ 749 int 750 ath_intr(void *arg) 751 { 752 return ath_intr1((struct ath_softc *)arg); 753 } 754 #else 755 void 756 ath_intr(void *arg) 757 { 758 (void)ath_intr1((struct ath_softc *)arg); 759 } 760 #endif 761 762 static int 763 ath_intr1(struct ath_softc *sc) 764 { 765 struct ieee80211com *ic = &sc->sc_ic; 766 struct ifnet *ifp = &ic->ic_if; 767 struct ath_hal *ah = sc->sc_ah; 768 HAL_INT status; 769 770 if (sc->sc_invalid) { 771 /* 772 * The hardware is not ready/present, don't touch anything. 773 * Note this can happen early on if the IRQ is shared. 774 */ 775 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid; ignored\n", __func__)); 776 return 0; 777 } 778 if (!ath_hal_intrpend(ah)) /* shared irq, not for us */ 779 return 0; 780 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 781 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n", 782 __func__, ifp->if_flags)); 783 ath_hal_getisr(ah, &status); /* clear ISR */ 784 ath_hal_intrset(ah, 0); /* disable further intr's */ 785 return 1; /* XXX */ 786 } 787 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 788 DPRINTF(ATH_DEBUG_INTR, ("%s: status 0x%x\n", __func__, status)); 789 status &= sc->sc_imask; /* discard unasked for bits */ 790 if (status & HAL_INT_FATAL) { 791 sc->sc_stats.ast_hardware++; 792 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 793 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 794 } else if (status & HAL_INT_RXORN) { 795 sc->sc_stats.ast_rxorn++; 796 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 797 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 798 } else { 799 if (status & HAL_INT_RXEOL) { 800 /* 801 * NB: the hardware should re-read the link when 802 * RXE bit is written, but it doesn't work at 803 * least on older hardware revs. 804 */ 805 sc->sc_stats.ast_rxeol++; 806 sc->sc_rxlink = NULL; 807 } 808 if (status & HAL_INT_TXURN) { 809 sc->sc_stats.ast_txurn++; 810 /* bump tx trigger level */ 811 ath_hal_updatetxtriglevel(ah, AH_TRUE); 812 } 813 if (status & HAL_INT_RX) 814 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 815 if (status & HAL_INT_TX) 816 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 817 if (status & HAL_INT_SWBA) { 818 /* 819 * Handle beacon transmission directly; deferring 820 * this is too slow to meet timing constraints 821 * under load. 822 */ 823 ath_beacon_proc(sc, 0); 824 } 825 if (status & HAL_INT_BMISS) { 826 sc->sc_stats.ast_bmiss++; 827 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 828 } 829 } 830 return 1; 831 } 832 833 static void 834 ath_fatal_proc(void *arg, int pending) 835 { 836 struct ath_softc *sc = arg; 837 838 device_printf(sc->sc_dev, "hardware error; resetting\n"); 839 ath_reset(sc); 840 } 841 842 static void 843 ath_rxorn_proc(void *arg, int pending) 844 { 845 struct ath_softc *sc = arg; 846 847 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 848 ath_reset(sc); 849 } 850 851 static void 852 ath_bmiss_proc(void *arg, int pending) 853 { 854 struct ath_softc *sc = arg; 855 struct ieee80211com *ic = &sc->sc_ic; 856 857 DPRINTF(ATH_DEBUG_ANY, ("%s: pending %u\n", __func__, pending)); 858 if (ic->ic_opmode != IEEE80211_M_STA) 859 return; 860 if (ic->ic_state == IEEE80211_S_RUN) { 861 /* 862 * Rather than go directly to scan state, try to 863 * reassociate first. If that fails then the state 864 * machine will drop us into scanning after timing 865 * out waiting for a probe response. 866 */ 867 ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1); 868 } 869 } 870 871 static u_int 872 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 873 { 874 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 875 876 switch (mode) { 877 case IEEE80211_MODE_AUTO: 878 return 0; 879 case IEEE80211_MODE_11A: 880 return CHANNEL_A; 881 case IEEE80211_MODE_11B: 882 return CHANNEL_B; 883 case IEEE80211_MODE_11G: 884 return CHANNEL_PUREG; 885 case IEEE80211_MODE_TURBO: 886 return CHANNEL_T; 887 default: 888 panic("%s: unsupported mode %d\n", __func__, mode); 889 return 0; 890 } 891 } 892 893 #ifdef __NetBSD__ 894 static int 895 ath_init(struct ifnet *ifp) 896 { 897 return ath_init1((struct ath_softc *)ifp->if_softc); 898 } 899 #else 900 static void 901 ath_init(void *arg) 902 { 903 (void)ath_init1((struct ath_softc *)arg); 904 } 905 #endif 906 907 static int 908 ath_init1(struct ath_softc *sc) 909 { 910 struct ieee80211com *ic = &sc->sc_ic; 911 struct ifnet *ifp = &ic->ic_if; 912 struct ieee80211_node *ni; 913 enum ieee80211_phymode mode; 914 struct ath_hal *ah = sc->sc_ah; 915 HAL_STATUS status; 916 HAL_CHANNEL hchan; 917 int error = 0; 918 ath_softc_critsect_decl(s); 919 920 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n", 921 __func__, ifp->if_flags)); 922 923 #ifdef __NetBSD__ 924 if ((error = ath_enable(sc)) != 0) 925 return error; 926 #endif 927 928 ath_softc_critsect_begin(sc, s); 929 /* 930 * Stop anything previously setup. This is safe 931 * whether this is the first time through or not. 932 */ 933 ath_stop(ifp); 934 935 /* 936 * The basic interface to setting the hardware in a good 937 * state is ``reset''. On return the hardware is known to 938 * be powered up and with interrupts disabled. This must 939 * be followed by initialization of the appropriate bits 940 * and then setup of the interrupt mask. 941 */ 942 hchan.channel = ic->ic_ibss_chan->ic_freq; 943 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 944 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 945 if_printf(ifp, "unable to reset hardware; hal status %u\n", 946 status); 947 error = -1; 948 goto done; 949 } 950 951 /* 952 * Setup the hardware after reset: the key cache 953 * is filled as needed and the receive engine is 954 * set going. Frame transmit is handled entirely 955 * in the frame output path; there's nothing to do 956 * here except setup the interrupt mask. 957 */ 958 if (ic->ic_flags & IEEE80211_F_PRIVACY) 959 ath_initkeytable(sc); 960 if ((error = ath_startrecv(sc)) != 0) { 961 if_printf(ifp, "unable to start recv logic\n"); 962 goto done; 963 } 964 965 /* 966 * Enable interrupts. 967 */ 968 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 969 | HAL_INT_RXEOL | HAL_INT_RXORN 970 | HAL_INT_FATAL | HAL_INT_GLOBAL; 971 ath_hal_intrset(ah, sc->sc_imask); 972 973 ifp->if_flags |= IFF_RUNNING; 974 ic->ic_state = IEEE80211_S_INIT; 975 976 /* 977 * The hardware should be ready to go now so it's safe 978 * to kick the 802.11 state machine as it's likely to 979 * immediately call back to us to send mgmt frames. 980 */ 981 ni = ic->ic_bss; 982 ni->ni_chan = ic->ic_ibss_chan; 983 mode = ieee80211_chan2mode(ic, ni->ni_chan); 984 if (mode != sc->sc_curmode) 985 ath_setcurmode(sc, mode); 986 if (ic->ic_opmode != IEEE80211_M_MONITOR) 987 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 988 else 989 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 990 done: 991 ath_softc_critsect_end(sc, s); 992 return error; 993 } 994 995 static void 996 ath_stop(struct ifnet *ifp) 997 { 998 struct ieee80211com *ic = (struct ieee80211com *) ifp; 999 struct ath_softc *sc = ifp->if_softc; 1000 struct ath_hal *ah = sc->sc_ah; 1001 ath_softc_critsect_decl(s); 1002 1003 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid %u if_flags 0x%x\n", 1004 __func__, sc->sc_invalid, ifp->if_flags)); 1005 1006 ath_softc_critsect_begin(sc, s); 1007 if (ifp->if_flags & IFF_RUNNING) { 1008 /* 1009 * Shutdown the hardware and driver: 1010 * disable interrupts 1011 * turn off timers 1012 * clear transmit machinery 1013 * clear receive machinery 1014 * drain and release tx queues 1015 * reclaim beacon resources 1016 * reset 802.11 state machine 1017 * power down hardware 1018 * 1019 * Note that some of this work is not possible if the 1020 * hardware is gone (invalid). 1021 */ 1022 ifp->if_flags &= ~IFF_RUNNING; 1023 ifp->if_timer = 0; 1024 if (!sc->sc_invalid) 1025 ath_hal_intrset(ah, 0); 1026 ath_draintxq(sc); 1027 if (!sc->sc_invalid) 1028 ath_stoprecv(sc); 1029 else 1030 sc->sc_rxlink = NULL; 1031 #ifdef __FreeBSD__ 1032 IF_DRAIN(&ifp->if_snd); 1033 #else 1034 IF_PURGE(&ifp->if_snd); 1035 #endif 1036 ath_beacon_free(sc); 1037 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 1038 if (!sc->sc_invalid) { 1039 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 1040 } 1041 #ifdef __NetBSD__ 1042 ath_disable(sc); 1043 #endif 1044 } 1045 ath_softc_critsect_end(sc, s); 1046 } 1047 1048 /* 1049 * Reset the hardware w/o losing operational state. This is 1050 * basically a more efficient way of doing ath_stop, ath_init, 1051 * followed by state transitions to the current 802.11 1052 * operational state. Used to recover from errors rx overrun 1053 * and to reset the hardware when rf gain settings must be reset. 1054 */ 1055 static void 1056 ath_reset(struct ath_softc *sc) 1057 { 1058 struct ieee80211com *ic = &sc->sc_ic; 1059 struct ifnet *ifp = &ic->ic_if; 1060 struct ath_hal *ah = sc->sc_ah; 1061 struct ieee80211_channel *c; 1062 HAL_STATUS status; 1063 HAL_CHANNEL hchan; 1064 1065 /* 1066 * Convert to a HAL channel description with the flags 1067 * constrained to reflect the current operating mode. 1068 */ 1069 c = ic->ic_ibss_chan; 1070 hchan.channel = c->ic_freq; 1071 hchan.channelFlags = ath_chan2flags(ic, c); 1072 1073 ath_hal_intrset(ah, 0); /* disable interrupts */ 1074 ath_draintxq(sc); /* stop xmit side */ 1075 ath_stoprecv(sc); /* stop recv side */ 1076 /* NB: indicate channel change so we do a full reset */ 1077 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 1078 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 1079 __func__, status); 1080 ath_hal_intrset(ah, sc->sc_imask); 1081 if (ath_startrecv(sc) != 0) /* restart recv */ 1082 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 1083 ath_start(ifp); /* restart xmit */ 1084 if (ic->ic_state == IEEE80211_S_RUN) 1085 ath_beacon_config(sc); /* restart beacons */ 1086 } 1087 1088 static void 1089 ath_start(struct ifnet *ifp) 1090 { 1091 struct ath_softc *sc = ifp->if_softc; 1092 struct ath_hal *ah = sc->sc_ah; 1093 struct ieee80211com *ic = &sc->sc_ic; 1094 struct ieee80211_node *ni; 1095 struct ath_buf *bf; 1096 struct mbuf *m; 1097 struct ieee80211_frame *wh; 1098 ath_txbuf_critsect_decl(s); 1099 1100 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1101 return; 1102 for (;;) { 1103 /* 1104 * Grab a TX buffer and associated resources. 1105 */ 1106 ath_txbuf_critsect_begin(sc, s); 1107 bf = TAILQ_FIRST(&sc->sc_txbuf); 1108 if (bf != NULL) 1109 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 1110 ath_txbuf_critsect_end(sc, s); 1111 if (bf == NULL) { 1112 DPRINTF(ATH_DEBUG_ANY, ("%s: out of xmit buffers\n", 1113 __func__)); 1114 sc->sc_stats.ast_tx_qstop++; 1115 ifp->if_flags |= IFF_OACTIVE; 1116 break; 1117 } 1118 /* 1119 * Poll the management queue for frames; they 1120 * have priority over normal data frames. 1121 */ 1122 IF_DEQUEUE(&ic->ic_mgtq, m); 1123 if (m == NULL) { 1124 /* 1125 * No data frames go out unless we're associated. 1126 */ 1127 if (ic->ic_state != IEEE80211_S_RUN) { 1128 DPRINTF(ATH_DEBUG_ANY, 1129 ("%s: ignore data packet, state %u\n", 1130 __func__, ic->ic_state)); 1131 sc->sc_stats.ast_tx_discard++; 1132 ath_txbuf_critsect_begin(sc, s); 1133 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1134 ath_txbuf_critsect_end(sc, s); 1135 break; 1136 } 1137 IF_DEQUEUE(&ifp->if_snd, m); 1138 if (m == NULL) { 1139 ath_txbuf_critsect_begin(sc, s); 1140 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1141 ath_txbuf_critsect_end(sc, s); 1142 break; 1143 } 1144 ifp->if_opackets++; 1145 1146 #ifdef __NetBSD__ 1147 #if NBPFILTER > 0 1148 if (ifp->if_bpf) 1149 bpf_mtap(ifp->if_bpf, m); 1150 #endif 1151 #endif 1152 #ifdef __FreeBSD__ 1153 BPF_MTAP(ifp, m); 1154 #endif 1155 /* 1156 * Encapsulate the packet in prep for transmission. 1157 */ 1158 m = ieee80211_encap(ifp, m, &ni); 1159 if (m == NULL) { 1160 DPRINTF(ATH_DEBUG_ANY, 1161 ("%s: encapsulation failure\n", 1162 __func__)); 1163 sc->sc_stats.ast_tx_encap++; 1164 goto bad; 1165 } 1166 wh = mtod(m, struct ieee80211_frame *); 1167 } else { 1168 /* 1169 * Hack! The referenced node pointer is in the 1170 * rcvif field of the packet header. This is 1171 * placed there by ieee80211_mgmt_output because 1172 * we need to hold the reference with the frame 1173 * and there's no other way (other than packet 1174 * tags which we consider too expensive to use) 1175 * to pass it along. 1176 */ 1177 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1178 m->m_pkthdr.rcvif = NULL; 1179 1180 wh = mtod(m, struct ieee80211_frame *); 1181 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1182 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 1183 /* fill time stamp */ 1184 u_int64_t tsf; 1185 u_int32_t *tstamp; 1186 1187 tsf = ath_hal_gettsf64(ah); 1188 /* XXX: adjust 100us delay to xmit */ 1189 tsf += 100; 1190 tstamp = (u_int32_t *)&wh[1]; 1191 tstamp[0] = htole32(tsf & 0xffffffff); 1192 tstamp[1] = htole32(tsf >> 32); 1193 } 1194 sc->sc_stats.ast_tx_mgmt++; 1195 } 1196 1197 if (ath_tx_start(sc, ni, bf, m)) { 1198 bad: 1199 ath_txbuf_critsect_begin(sc, s); 1200 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1201 ath_txbuf_critsect_end(sc, s); 1202 ifp->if_oerrors++; 1203 if (ni && ni != ic->ic_bss) 1204 ieee80211_free_node(ic, ni); 1205 continue; 1206 } 1207 1208 sc->sc_tx_timer = 5; 1209 ifp->if_timer = 1; 1210 } 1211 } 1212 1213 static int 1214 ath_media_change(struct ifnet *ifp) 1215 { 1216 int error; 1217 1218 error = ieee80211_media_change(ifp); 1219 if (error == ENETRESET) { 1220 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1221 (IFF_RUNNING|IFF_UP)) 1222 ath_init(ifp); /* XXX lose error */ 1223 error = 0; 1224 } 1225 return error; 1226 } 1227 1228 static void 1229 ath_watchdog(struct ifnet *ifp) 1230 { 1231 struct ath_softc *sc = ifp->if_softc; 1232 struct ieee80211com *ic = &sc->sc_ic; 1233 1234 ifp->if_timer = 0; 1235 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1236 return; 1237 if (sc->sc_tx_timer) { 1238 if (--sc->sc_tx_timer == 0) { 1239 if_printf(ifp, "device timeout\n"); 1240 ath_reset(sc); 1241 ifp->if_oerrors++; 1242 sc->sc_stats.ast_watchdog++; 1243 return; 1244 } 1245 ifp->if_timer = 1; 1246 } 1247 if (ic->ic_fixed_rate == -1) { 1248 /* 1249 * Run the rate control algorithm if we're not 1250 * locked at a fixed rate. 1251 */ 1252 if (ic->ic_opmode == IEEE80211_M_STA) 1253 ath_rate_ctl(sc, ic->ic_bss); 1254 else 1255 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1256 } 1257 ieee80211_watchdog(ifp); 1258 } 1259 1260 static int 1261 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1262 { 1263 struct ath_softc *sc = ifp->if_softc; 1264 struct ifreq *ifr = (struct ifreq *)data; 1265 int error = 0; 1266 ath_softc_critsect_decl(s); 1267 1268 ath_softc_critsect_begin(sc, s); 1269 switch (cmd) { 1270 case SIOCSIFFLAGS: 1271 if (ifp->if_flags & IFF_UP) { 1272 if (ifp->if_flags & IFF_RUNNING) { 1273 /* 1274 * To avoid rescanning another access point, 1275 * do not call ath_init() here. Instead, 1276 * only reflect promisc mode settings. 1277 */ 1278 ath_mode_init(sc); 1279 } else { 1280 /* 1281 * Beware of being called during detach to 1282 * reset promiscuous mode. In that case we 1283 * will still be marked UP but not RUNNING. 1284 * However trying to re-init the interface 1285 * is the wrong thing to do as we've already 1286 * torn down much of our state. There's 1287 * probably a better way to deal with this. 1288 */ 1289 if (!sc->sc_invalid) 1290 ath_init(ifp); /* XXX lose error */ 1291 } 1292 } else 1293 ath_stop(ifp); 1294 break; 1295 case SIOCADDMULTI: 1296 case SIOCDELMULTI: 1297 #ifdef __FreeBSD__ 1298 /* 1299 * The upper layer has already installed/removed 1300 * the multicast address(es), just recalculate the 1301 * multicast filter for the card. 1302 */ 1303 if (ifp->if_flags & IFF_RUNNING) 1304 ath_mode_init(sc); 1305 #endif 1306 #ifdef __NetBSD__ 1307 error = (cmd == SIOCADDMULTI) ? 1308 ether_addmulti(ifr, &sc->sc_ic.ic_ec) : 1309 ether_delmulti(ifr, &sc->sc_ic.ic_ec); 1310 if (error == ENETRESET) { 1311 if (ifp->if_flags & IFF_RUNNING) 1312 ath_mode_init(sc); 1313 error = 0; 1314 } 1315 #endif 1316 break; 1317 case SIOCGATHSTATS: 1318 error = copyout(&sc->sc_stats, 1319 ifr->ifr_data, sizeof (sc->sc_stats)); 1320 break; 1321 case SIOCGATHDIAG: { 1322 #if 0 /* XXX punt */ 1323 struct ath_diag *ad = (struct ath_diag *)data; 1324 struct ath_hal *ah = sc->sc_ah; 1325 void *data; 1326 u_int size; 1327 1328 if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) { 1329 if (size < ad->ad_size) 1330 ad->ad_size = size; 1331 if (data) 1332 error = copyout(data, ad->ad_data, ad->ad_size); 1333 } else 1334 error = EINVAL; 1335 #else 1336 error = EINVAL; 1337 #endif 1338 break; 1339 } 1340 default: 1341 error = ieee80211_ioctl(ifp, cmd, data); 1342 if (error == ENETRESET) { 1343 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1344 (IFF_RUNNING|IFF_UP)) 1345 ath_init(ifp); /* XXX lose error */ 1346 error = 0; 1347 } 1348 break; 1349 } 1350 ath_softc_critsect_end(sc, s); 1351 return error; 1352 } 1353 1354 /* 1355 * Fill the hardware key cache with key entries. 1356 */ 1357 static void 1358 ath_initkeytable(struct ath_softc *sc) 1359 { 1360 struct ieee80211com *ic = &sc->sc_ic; 1361 struct ath_hal *ah = sc->sc_ah; 1362 int i; 1363 1364 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1365 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1366 if (k->wk_len == 0) 1367 ath_hal_keyreset(ah, i); 1368 else 1369 /* XXX return value */ 1370 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 1371 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 1372 } 1373 } 1374 1375 static void 1376 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1377 { 1378 u_int32_t val; 1379 u_int8_t pos; 1380 1381 val = LE_READ_4(dl + 0); 1382 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1383 val = LE_READ_4(dl + 3); 1384 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1385 pos &= 0x3f; 1386 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1387 } 1388 1389 #ifdef __FreeBSD__ 1390 static void 1391 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1392 { 1393 struct ieee80211com *ic = &sc->sc_ic; 1394 struct ifnet *ifp = &ic->ic_if; 1395 struct ifmultiaddr *ifma; 1396 1397 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1398 caddr_t dl; 1399 1400 /* calculate XOR of eight 6bit values */ 1401 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1402 ath_mcastfilter_accum(dl, &mfilt); 1403 } 1404 } 1405 #else 1406 static void 1407 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1408 { 1409 struct ifnet *ifp = &sc->sc_ic.ic_if; 1410 struct ether_multi *enm; 1411 struct ether_multistep estep; 1412 1413 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1414 while (enm != NULL) { 1415 /* XXX Punt on ranges. */ 1416 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1417 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1418 ifp->if_flags |= IFF_ALLMULTI; 1419 return; 1420 } 1421 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1422 ETHER_NEXT_MULTI(estep, enm); 1423 } 1424 ifp->if_flags &= ~IFF_ALLMULTI; 1425 } 1426 #endif 1427 1428 /* 1429 * Calculate the receive filter according to the 1430 * operating mode and state: 1431 * 1432 * o always accept unicast, broadcast, and multicast traffic 1433 * o maintain current state of phy error reception 1434 * o probe request frames are accepted only when operating in 1435 * hostap, adhoc, or monitor modes 1436 * o enable promiscuous mode according to the interface state 1437 * o accept beacons: 1438 * - when operating in adhoc mode so the 802.11 layer creates 1439 * node table entries for peers, 1440 * - when operating in station mode for collecting rssi data when 1441 * the station is otherwise quiet, or 1442 * - when scanning 1443 */ 1444 static u_int32_t 1445 ath_calcrxfilter(struct ath_softc *sc) 1446 { 1447 struct ieee80211com *ic = &sc->sc_ic; 1448 struct ath_hal *ah = sc->sc_ah; 1449 struct ifnet *ifp = &ic->ic_if; 1450 u_int32_t rfilt; 1451 1452 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1453 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1454 if (ic->ic_opmode != IEEE80211_M_STA) 1455 rfilt |= HAL_RX_FILTER_PROBEREQ; 1456 if (ic->ic_opmode == IEEE80211_M_STA || 1457 ic->ic_opmode == IEEE80211_M_IBSS || 1458 ic->ic_state == IEEE80211_S_SCAN) 1459 rfilt |= HAL_RX_FILTER_BEACON; 1460 if (ifp->if_flags & IFF_PROMISC) 1461 rfilt |= HAL_RX_FILTER_PROM; 1462 return rfilt; 1463 } 1464 1465 static void 1466 ath_mode_init(struct ath_softc *sc) 1467 { 1468 #ifdef __FreeBSD__ 1469 struct ieee80211com *ic = &sc->sc_ic; 1470 #endif 1471 struct ath_hal *ah = sc->sc_ah; 1472 u_int32_t rfilt, mfilt[2]; 1473 1474 /* configure rx filter */ 1475 rfilt = ath_calcrxfilter(sc); 1476 ath_hal_setrxfilter(ah, rfilt); 1477 1478 /* configure operational mode */ 1479 ath_hal_setopmode(ah); 1480 1481 /* calculate and install multicast filter */ 1482 #ifdef __FreeBSD__ 1483 if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) { 1484 mfilt[0] = mfilt[1] = 0; 1485 ath_mcastfilter_compute(sc, &mfilt); 1486 } else { 1487 mfilt[0] = mfilt[1] = ~0; 1488 } 1489 #endif 1490 #ifdef __NetBSD__ 1491 mfilt[0] = mfilt[1] = 0; 1492 ath_mcastfilter_compute(sc, &mfilt); 1493 #endif 1494 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1495 DPRINTF(ATH_DEBUG_MODE, ("%s: RX filter 0x%x, MC filter %08x:%08x\n", 1496 __func__, rfilt, mfilt[0], mfilt[1])); 1497 } 1498 1499 #ifdef __FreeBSD__ 1500 static void 1501 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1502 { 1503 struct ath_buf *bf = arg; 1504 1505 KASSERT(nseg <= ATH_MAX_SCATTER, 1506 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1507 bf->bf_mapsize = mapsize; 1508 bf->bf_nseg = nseg; 1509 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1510 } 1511 #endif /* __FreeBSD__ */ 1512 1513 static struct mbuf * 1514 ath_getmbuf(int flags, int type, u_int pktlen) 1515 { 1516 struct mbuf *m; 1517 1518 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1519 #ifdef __FreeBSD__ 1520 if (pktlen <= MHLEN) 1521 MGETHDR(m, flags, type); 1522 else 1523 m = m_getcl(flags, type, M_PKTHDR); 1524 #else 1525 MGETHDR(m, flags, type); 1526 if (m != NULL && pktlen > MHLEN) 1527 MCLGET(m, flags); 1528 #endif 1529 return m; 1530 } 1531 1532 static int 1533 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1534 { 1535 struct ieee80211com *ic = &sc->sc_ic; 1536 struct ifnet *ifp = &ic->ic_if; 1537 struct ath_hal *ah = sc->sc_ah; 1538 struct ieee80211_frame *wh; 1539 struct ath_buf *bf; 1540 struct ath_desc *ds; 1541 struct mbuf *m; 1542 int error, pktlen; 1543 u_int8_t *frm, rate; 1544 u_int16_t capinfo; 1545 struct ieee80211_rateset *rs; 1546 const HAL_RATE_TABLE *rt; 1547 1548 bf = sc->sc_bcbuf; 1549 if (bf->bf_m != NULL) { 1550 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1551 m_freem(bf->bf_m); 1552 bf->bf_m = NULL; 1553 bf->bf_node = NULL; 1554 } 1555 /* 1556 * NB: the beacon data buffer must be 32-bit aligned; 1557 * we assume the mbuf routines will return us something 1558 * with this alignment (perhaps should assert). 1559 */ 1560 rs = &ni->ni_rates; 1561 pktlen = sizeof (struct ieee80211_frame) 1562 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6; 1563 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1564 pktlen += 2; 1565 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1566 if (m == NULL) { 1567 DPRINTF(ATH_DEBUG_BEACON, 1568 ("%s: cannot get mbuf/cluster; size %u\n", 1569 __func__, pktlen)); 1570 sc->sc_stats.ast_be_nombuf++; 1571 return ENOMEM; 1572 } 1573 1574 wh = mtod(m, struct ieee80211_frame *); 1575 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1576 IEEE80211_FC0_SUBTYPE_BEACON; 1577 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1578 *(u_int16_t *)wh->i_dur = 0; 1579 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1580 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1581 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1582 *(u_int16_t *)wh->i_seq = 0; 1583 1584 /* 1585 * beacon frame format 1586 * [8] time stamp 1587 * [2] beacon interval 1588 * [2] cabability information 1589 * [tlv] ssid 1590 * [tlv] supported rates 1591 * [tlv] parameter set (IBSS) 1592 * [tlv] extended supported rates 1593 */ 1594 frm = (u_int8_t *)&wh[1]; 1595 memset(frm, 0, 8); /* timestamp is set by hardware */ 1596 frm += 8; 1597 *(u_int16_t *)frm = htole16(ni->ni_intval); 1598 frm += 2; 1599 if (ic->ic_opmode == IEEE80211_M_IBSS) 1600 capinfo = IEEE80211_CAPINFO_IBSS; 1601 else 1602 capinfo = IEEE80211_CAPINFO_ESS; 1603 if (ic->ic_flags & IEEE80211_F_PRIVACY) 1604 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1605 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1606 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 1607 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1608 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1609 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1610 *(u_int16_t *)frm = htole16(capinfo); 1611 frm += 2; 1612 *frm++ = IEEE80211_ELEMID_SSID; 1613 *frm++ = ni->ni_esslen; 1614 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1615 frm += ni->ni_esslen; 1616 frm = ieee80211_add_rates(frm, rs); 1617 *frm++ = IEEE80211_ELEMID_DSPARMS; 1618 *frm++ = 1; 1619 *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan); 1620 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1621 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1622 *frm++ = 2; 1623 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1624 } else { 1625 /* TODO: TIM */ 1626 *frm++ = IEEE80211_ELEMID_TIM; 1627 *frm++ = 4; /* length */ 1628 *frm++ = 0; /* DTIM count */ 1629 *frm++ = 1; /* DTIM period */ 1630 *frm++ = 0; /* bitmap control */ 1631 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1632 } 1633 frm = ieee80211_add_xrates(frm, rs); 1634 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1635 KASSERT(m->m_pkthdr.len <= pktlen, 1636 ("beacon bigger than expected, len %u calculated %u", 1637 m->m_pkthdr.len, pktlen)); 1638 1639 DPRINTF(ATH_DEBUG_BEACON, ("%s: m %p len %u\n", __func__, m, m->m_len)); 1640 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1641 if (error != 0) { 1642 m_freem(m); 1643 return error; 1644 } 1645 KASSERT(bf->bf_nseg == 1, 1646 ("%s: multi-segment packet; nseg %u", __func__, bf->bf_nseg)); 1647 bf->bf_m = m; 1648 1649 /* setup descriptors */ 1650 ds = bf->bf_desc; 1651 1652 ds->ds_link = 0; 1653 ds->ds_data = bf->bf_segs[0].ds_addr; 1654 1655 DPRINTF(ATH_DEBUG_ANY, ("%s: segaddr %p seglen %u\n", __func__, 1656 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1657 1658 /* 1659 * Calculate rate code. 1660 * XXX everything at min xmit rate 1661 */ 1662 rt = sc->sc_currates; 1663 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1664 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1665 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1666 else 1667 rate = rt->info[0].rateCode; 1668 if (!ath_hal_setuptxdesc(ah, ds 1669 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1670 , sizeof(struct ieee80211_frame) /* header length */ 1671 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1672 , 0x20 /* txpower XXX */ 1673 , rate, 1 /* series 0 rate/tries */ 1674 , HAL_TXKEYIX_INVALID /* no encryption */ 1675 , 0 /* antenna mode */ 1676 , HAL_TXDESC_NOACK /* no ack for beacons */ 1677 , 0 /* rts/cts rate */ 1678 , 0 /* rts/cts duration */ 1679 )) { 1680 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1681 return -1; 1682 } 1683 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1684 /* XXX verify mbuf data area covers this roundup */ 1685 if (!ath_hal_filltxdesc(ah, ds 1686 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1687 , AH_TRUE /* first segment */ 1688 , AH_TRUE /* last segment */ 1689 )) { 1690 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1691 return -1; 1692 } 1693 1694 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1695 1696 return 0; 1697 } 1698 1699 static void 1700 ath_beacon_proc(void *arg, int pending) 1701 { 1702 struct ath_softc *sc = arg; 1703 struct ieee80211com *ic = &sc->sc_ic; 1704 struct ath_buf *bf = sc->sc_bcbuf; 1705 struct ath_hal *ah = sc->sc_ah; 1706 1707 DPRINTF(ATH_DEBUG_BEACON_PROC, ("%s: pending %u\n", __func__, pending)); 1708 if (ic->ic_opmode == IEEE80211_M_STA || 1709 bf == NULL || bf->bf_m == NULL) { 1710 DPRINTF(ATH_DEBUG_ANY, ("%s: ic_flags=%x bf=%p bf_m=%p\n", 1711 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1712 return; 1713 } 1714 /* TODO: update beacon to reflect PS poll state */ 1715 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1716 DPRINTF(ATH_DEBUG_ANY, ("%s: beacon queue %u did not stop?\n", 1717 __func__, sc->sc_bhalq)); 1718 /* NB: the HAL still stops DMA, so proceed */ 1719 } 1720 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1721 1722 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1723 ath_hal_txstart(ah, sc->sc_bhalq); 1724 DPRINTF(ATH_DEBUG_BEACON_PROC, 1725 ("%s: TXDP%u = %p (%p)\n", __func__, 1726 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1727 } 1728 1729 static void 1730 ath_beacon_free(struct ath_softc *sc) 1731 { 1732 struct ath_buf *bf = sc->sc_bcbuf; 1733 1734 if (bf->bf_m != NULL) { 1735 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1736 m_freem(bf->bf_m); 1737 bf->bf_m = NULL; 1738 bf->bf_node = NULL; 1739 } 1740 } 1741 1742 /* 1743 * Configure the beacon and sleep timers. 1744 * 1745 * When operating as an AP this resets the TSF and sets 1746 * up the hardware to notify us when we need to issue beacons. 1747 * 1748 * When operating in station mode this sets up the beacon 1749 * timers according to the timestamp of the last received 1750 * beacon and the current TSF, configures PCF and DTIM 1751 * handling, programs the sleep registers so the hardware 1752 * will wakeup in time to receive beacons, and configures 1753 * the beacon miss handling so we'll receive a BMISS 1754 * interrupt when we stop seeing beacons from the AP 1755 * we've associated with. 1756 */ 1757 static void 1758 ath_beacon_config(struct ath_softc *sc) 1759 { 1760 struct ath_hal *ah = sc->sc_ah; 1761 struct ieee80211com *ic = &sc->sc_ic; 1762 struct ieee80211_node *ni = ic->ic_bss; 1763 u_int32_t nexttbtt, intval; 1764 1765 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1766 (LE_READ_4(ni->ni_tstamp) >> 10); 1767 DPRINTF(ATH_DEBUG_BEACON, ("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1768 nexttbtt += ni->ni_intval; 1769 intval = ni->ni_intval & HAL_BEACON_PERIOD; 1770 if (ic->ic_opmode == IEEE80211_M_STA) { 1771 HAL_BEACON_STATE bs; 1772 u_int32_t bmisstime; 1773 1774 /* NB: no PCF support right now */ 1775 memset(&bs, 0, sizeof(bs)); 1776 /* 1777 * Reset our tsf so the hardware will update the 1778 * tsf register to reflect timestamps found in 1779 * received beacons. 1780 */ 1781 bs.bs_intval = intval | HAL_BEACON_RESET_TSF; 1782 bs.bs_nexttbtt = nexttbtt; 1783 bs.bs_dtimperiod = bs.bs_intval; 1784 bs.bs_nextdtim = nexttbtt; 1785 /* 1786 * Calculate the number of consecutive beacons to miss 1787 * before taking a BMISS interrupt. The configuration 1788 * is specified in ms, so we need to convert that to 1789 * TU's and then calculate based on the beacon interval. 1790 * Note that we clamp the result to at most 10 beacons. 1791 */ 1792 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1793 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1794 if (bs.bs_bmissthreshold > 10) 1795 bs.bs_bmissthreshold = 10; 1796 else if (bs.bs_bmissthreshold <= 0) 1797 bs.bs_bmissthreshold = 1; 1798 1799 /* 1800 * Calculate sleep duration. The configuration is 1801 * given in ms. We insure a multiple of the beacon 1802 * period is used. Also, if the sleep duration is 1803 * greater than the DTIM period then it makes senses 1804 * to make it a multiple of that. 1805 * 1806 * XXX fixed at 100ms 1807 */ 1808 bs.bs_sleepduration = 1809 roundup((100 * 1000) / 1024, bs.bs_intval); 1810 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1811 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1812 1813 DPRINTF(ATH_DEBUG_BEACON, 1814 ("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1815 , __func__ 1816 , bs.bs_intval 1817 , bs.bs_nexttbtt 1818 , bs.bs_dtimperiod 1819 , bs.bs_nextdtim 1820 , bs.bs_bmissthreshold 1821 , bs.bs_sleepduration 1822 )); 1823 ath_hal_intrset(ah, 0); 1824 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1825 sc->sc_imask |= HAL_INT_BMISS; 1826 ath_hal_intrset(ah, sc->sc_imask); 1827 } else { 1828 DPRINTF(ATH_DEBUG_BEACON, ("%s: intval %u nexttbtt %u\n", 1829 __func__, ni->ni_intval, nexttbtt)); 1830 ath_hal_intrset(ah, 0); 1831 ath_hal_beaconinit(ah, nexttbtt, ni->ni_intval); 1832 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1833 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1834 ath_hal_intrset(ah, sc->sc_imask); 1835 } 1836 } 1837 1838 #ifdef __FreeBSD__ 1839 static void 1840 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1841 { 1842 bus_addr_t *paddr = (bus_addr_t*) arg; 1843 *paddr = segs->ds_addr; 1844 } 1845 #endif 1846 1847 #ifdef __FreeBSD__ 1848 static int 1849 ath_desc_alloc(struct ath_softc *sc) 1850 { 1851 int i, bsize, error; 1852 struct ath_desc *ds; 1853 struct ath_buf *bf; 1854 1855 /* allocate descriptors */ 1856 sc->sc_desc_len = sizeof(struct ath_desc) * 1857 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1858 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1859 if (error != 0) 1860 return error; 1861 1862 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1863 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1864 1865 if (error != 0) 1866 goto fail0; 1867 1868 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1869 sc->sc_desc, sc->sc_desc_len, 1870 ath_load_cb, &sc->sc_desc_paddr, 1871 BUS_DMA_NOWAIT); 1872 if (error != 0) 1873 goto fail1; 1874 1875 ds = sc->sc_desc; 1876 DPRINTF(ATH_DEBUG_ANY, ("%s: DMA map: %p (%lu) -> %p (%lu)\n", 1877 __func__, ds, (u_long) sc->sc_desc_len, (caddr_t) sc->sc_desc_paddr, 1878 /*XXX*/ (u_long) sc->sc_desc_len)); 1879 1880 /* allocate buffers */ 1881 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1882 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1883 if (bf == NULL) { 1884 printf("%s: unable to allocate Tx/Rx buffers\n", 1885 sc->sc_dev.dv_xname); 1886 error = -1; 1887 goto fail2; 1888 } 1889 sc->sc_bufptr = bf; 1890 1891 TAILQ_INIT(&sc->sc_rxbuf); 1892 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1893 bf->bf_desc = ds; 1894 bf->bf_daddr = sc->sc_desc_paddr + 1895 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1896 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1897 &bf->bf_dmamap); 1898 if (error != 0) 1899 break; 1900 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1901 } 1902 1903 TAILQ_INIT(&sc->sc_txbuf); 1904 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1905 bf->bf_desc = ds; 1906 bf->bf_daddr = sc->sc_desc_paddr + 1907 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1908 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1909 &bf->bf_dmamap); 1910 if (error != 0) 1911 break; 1912 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1913 } 1914 TAILQ_INIT(&sc->sc_txq); 1915 1916 /* beacon buffer */ 1917 bf->bf_desc = ds; 1918 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1919 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1920 if (error != 0) 1921 return error; 1922 sc->sc_bcbuf = bf; 1923 return 0; 1924 1925 fail2: 1926 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1927 fail1: 1928 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1929 fail0: 1930 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1931 sc->sc_ddmamap = NULL; 1932 return error; 1933 } 1934 #else 1935 static int 1936 ath_desc_alloc(struct ath_softc *sc) 1937 { 1938 int i, bsize, error = -1; 1939 struct ath_desc *ds; 1940 struct ath_buf *bf; 1941 1942 /* allocate descriptors */ 1943 sc->sc_desc_len = sizeof(struct ath_desc) * 1944 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1945 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1946 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1947 printf("%s: unable to allocate control data, error = %d\n", 1948 sc->sc_dev.dv_xname, error); 1949 goto fail0; 1950 } 1951 1952 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1953 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1954 printf("%s: unable to map control data, error = %d\n", 1955 sc->sc_dev.dv_xname, error); 1956 goto fail1; 1957 } 1958 1959 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1960 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 1961 printf("%s: unable to create control data DMA map, " 1962 "error = %d\n", sc->sc_dev.dv_xname, error); 1963 goto fail2; 1964 } 1965 1966 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 1967 sc->sc_desc_len, NULL, 0)) != 0) { 1968 printf("%s: unable to load control data DMA map, error = %d\n", 1969 sc->sc_dev.dv_xname, error); 1970 goto fail3; 1971 } 1972 1973 ds = sc->sc_desc; 1974 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 1975 1976 DPRINTF(ATH_DEBUG_XMIT_DESC|ATH_DEBUG_RECV_DESC, 1977 ("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 1978 ds, (u_long)sc->sc_desc_len, 1979 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1980 1981 /* allocate buffers */ 1982 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1983 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1984 if (bf == NULL) { 1985 printf("%s: unable to allocate Tx/Rx buffers\n", 1986 sc->sc_dev.dv_xname); 1987 error = ENOMEM; 1988 goto fail3; 1989 } 1990 sc->sc_bufptr = bf; 1991 1992 TAILQ_INIT(&sc->sc_rxbuf); 1993 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1994 bf->bf_desc = ds; 1995 bf->bf_daddr = sc->sc_desc_paddr + 1996 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1997 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 1998 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1999 printf("%s: unable to create Rx dmamap, error = %d\n", 2000 sc->sc_dev.dv_xname, error); 2001 goto fail4; 2002 } 2003 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2004 } 2005 2006 TAILQ_INIT(&sc->sc_txbuf); 2007 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 2008 bf->bf_desc = ds; 2009 bf->bf_daddr = sc->sc_desc_paddr + 2010 ((caddr_t)ds - (caddr_t)sc->sc_desc); 2011 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 2012 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 2013 printf("%s: unable to create Tx dmamap, error = %d\n", 2014 sc->sc_dev.dv_xname, error); 2015 goto fail5; 2016 } 2017 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2018 } 2019 TAILQ_INIT(&sc->sc_txq); 2020 2021 /* beacon buffer */ 2022 bf->bf_desc = ds; 2023 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 2024 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 2025 &bf->bf_dmamap)) != 0) { 2026 printf("%s: unable to create beacon dmamap, error = %d\n", 2027 sc->sc_dev.dv_xname, error); 2028 goto fail5; 2029 } 2030 sc->sc_bcbuf = bf; 2031 return 0; 2032 2033 fail5: 2034 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 2035 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2036 continue; 2037 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2038 } 2039 fail4: 2040 for (i = 0; i < ATH_RXBUF; i++) { 2041 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2042 continue; 2043 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2044 } 2045 fail3: 2046 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2047 fail2: 2048 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2049 sc->sc_ddmamap = NULL; 2050 fail1: 2051 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 2052 fail0: 2053 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2054 return error; 2055 } 2056 #endif 2057 2058 static void 2059 ath_desc_free(struct ath_softc *sc) 2060 { 2061 struct ath_buf *bf; 2062 2063 #ifdef __FreeBSD__ 2064 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2065 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 2066 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2067 #else 2068 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2069 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2070 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2071 #endif 2072 2073 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2074 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2075 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2076 m_freem(bf->bf_m); 2077 } 2078 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 2079 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2080 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2081 if (bf->bf_m) { 2082 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2083 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2084 m_freem(bf->bf_m); 2085 bf->bf_m = NULL; 2086 } 2087 } 2088 if (sc->sc_bcbuf != NULL) { 2089 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2090 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2091 sc->sc_bcbuf = NULL; 2092 } 2093 2094 TAILQ_INIT(&sc->sc_rxbuf); 2095 TAILQ_INIT(&sc->sc_txbuf); 2096 TAILQ_INIT(&sc->sc_txq); 2097 free(sc->sc_bufptr, M_DEVBUF); 2098 sc->sc_bufptr = NULL; 2099 } 2100 2101 static struct ieee80211_node * 2102 ath_node_alloc(struct ieee80211com *ic) 2103 { 2104 struct ath_node *an = 2105 malloc(sizeof(struct ath_node), M_80211_NODE, M_NOWAIT|M_ZERO); 2106 if (an) { 2107 int i; 2108 for (i = 0; i < ATH_RHIST_SIZE; i++) 2109 an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME; 2110 an->an_rx_hist_next = ATH_RHIST_SIZE-1; 2111 return &an->an_node; 2112 } else 2113 return NULL; 2114 } 2115 2116 static void 2117 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 2118 { 2119 struct ath_softc *sc = ic->ic_if.if_softc; 2120 struct ath_buf *bf; 2121 2122 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2123 if (bf->bf_node == ni) 2124 bf->bf_node = NULL; 2125 } 2126 (*sc->sc_node_free)(ic, ni); 2127 } 2128 2129 static void 2130 ath_node_copy(struct ieee80211com *ic, 2131 struct ieee80211_node *dst, const struct ieee80211_node *src) 2132 { 2133 struct ath_softc *sc = ic->ic_if.if_softc; 2134 2135 memcpy(&dst[1], &src[1], 2136 sizeof(struct ath_node) - sizeof(struct ieee80211_node)); 2137 (*sc->sc_node_copy)(ic, dst, src); 2138 } 2139 2140 static u_int8_t 2141 ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni) 2142 { 2143 struct ath_node *an = ATH_NODE(ni); 2144 int i, now, nsamples, rssi; 2145 2146 /* 2147 * Calculate the average over the last second of sampled data. 2148 */ 2149 now = ATH_TICKS(); 2150 nsamples = 0; 2151 rssi = 0; 2152 i = an->an_rx_hist_next; 2153 do { 2154 struct ath_recv_hist *rh = &an->an_rx_hist[i]; 2155 if (rh->arh_ticks == ATH_RHIST_NOTIME) 2156 goto done; 2157 if (now - rh->arh_ticks > hz) 2158 goto done; 2159 rssi += rh->arh_rssi; 2160 nsamples++; 2161 if (i == 0) 2162 i = ATH_RHIST_SIZE-1; 2163 else 2164 i--; 2165 } while (i != an->an_rx_hist_next); 2166 done: 2167 /* 2168 * Return either the average or the last known 2169 * value if there is no recent data. 2170 */ 2171 return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi); 2172 } 2173 2174 static int 2175 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 2176 { 2177 struct ath_hal *ah = sc->sc_ah; 2178 int error; 2179 struct mbuf *m; 2180 struct ath_desc *ds; 2181 2182 m = bf->bf_m; 2183 if (m == NULL) { 2184 /* 2185 * NB: by assigning a page to the rx dma buffer we 2186 * implicitly satisfy the Atheros requirement that 2187 * this buffer be cache-line-aligned and sized to be 2188 * multiple of the cache line size. Not doing this 2189 * causes weird stuff to happen (for the 5210 at least). 2190 */ 2191 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 2192 if (m == NULL) { 2193 DPRINTF(ATH_DEBUG_ANY, 2194 ("%s: no mbuf/cluster\n", __func__)); 2195 sc->sc_stats.ast_rx_nombuf++; 2196 return ENOMEM; 2197 } 2198 bf->bf_m = m; 2199 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 2200 2201 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 2202 BUS_DMA_NOWAIT); 2203 if (error != 0) { 2204 DPRINTF(ATH_DEBUG_ANY, 2205 ("%s: ath_buf_dmamap_load_mbuf failed;" 2206 " error %d\n", __func__, error)); 2207 sc->sc_stats.ast_rx_busdma++; 2208 return error; 2209 } 2210 KASSERT(bf->bf_nseg == 1, 2211 ("ath_rxbuf_init: multi-segment packet; nseg %u", 2212 bf->bf_nseg)); 2213 } 2214 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 2215 2216 /* 2217 * Setup descriptors. For receive we always terminate 2218 * the descriptor list with a self-linked entry so we'll 2219 * not get overrun under high load (as can happen with a 2220 * 5212 when ANI processing enables PHY errors). 2221 * 2222 * To insure the last descriptor is self-linked we create 2223 * each descriptor as self-linked and add it to the end. As 2224 * each additional descriptor is added the previous self-linked 2225 * entry is ``fixed'' naturally. This should be safe even 2226 * if DMA is happening. When processing RX interrupts we 2227 * never remove/process the last, self-linked, entry on the 2228 * descriptor list. This insures the hardware always has 2229 * someplace to write a new frame. 2230 */ 2231 ds = bf->bf_desc; 2232 ds->ds_link = bf->bf_daddr; /* link to self */ 2233 ds->ds_data = bf->bf_segs[0].ds_addr; 2234 ath_hal_setuprxdesc(ah, ds 2235 , m->m_len /* buffer size */ 2236 , 0 2237 ); 2238 2239 if (sc->sc_rxlink != NULL) 2240 *sc->sc_rxlink = bf->bf_daddr; 2241 sc->sc_rxlink = &ds->ds_link; 2242 return 0; 2243 } 2244 2245 static void 2246 ath_rx_proc(void *arg, int npending) 2247 { 2248 #define PA2DESC(_sc, _pa) \ 2249 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2250 ((_pa) - (_sc)->sc_desc_paddr))) 2251 struct ath_softc *sc = arg; 2252 struct ath_buf *bf; 2253 struct ieee80211com *ic = &sc->sc_ic; 2254 struct ifnet *ifp = &ic->ic_if; 2255 struct ath_hal *ah = sc->sc_ah; 2256 struct ath_desc *ds; 2257 struct mbuf *m; 2258 struct ieee80211_frame *wh, whbuf; 2259 struct ieee80211_node *ni; 2260 struct ath_node *an; 2261 struct ath_recv_hist *rh; 2262 int len; 2263 u_int phyerr; 2264 HAL_STATUS status; 2265 2266 DPRINTF(ATH_DEBUG_RX_PROC, ("%s: pending %u\n", __func__, npending)); 2267 do { 2268 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2269 if (bf == NULL) { /* NB: shouldn't happen */ 2270 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 2271 break; 2272 } 2273 ds = bf->bf_desc; 2274 if (ds->ds_link == bf->bf_daddr) { 2275 /* NB: never process the self-linked entry at the end */ 2276 break; 2277 } 2278 m = bf->bf_m; 2279 if (m == NULL) { /* NB: shouldn't happen */ 2280 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 2281 continue; 2282 } 2283 /* XXX sync descriptor memory */ 2284 /* 2285 * Must provide the virtual address of the current 2286 * descriptor, the physical address, and the virtual 2287 * address of the next descriptor in the h/w chain. 2288 * This allows the HAL to look ahead to see if the 2289 * hardware is done with a descriptor by checking the 2290 * done bit in the following descriptor and the address 2291 * of the current descriptor the DMA engine is working 2292 * on. All this is necessary because of our use of 2293 * a self-linked list to avoid rx overruns. 2294 */ 2295 status = ath_hal_rxprocdesc(ah, ds, 2296 bf->bf_daddr, PA2DESC(sc, ds->ds_link)); 2297 #ifdef AR_DEBUG 2298 if (ath_debug & ATH_DEBUG_RECV_DESC) 2299 ath_printrxbuf(bf, status == HAL_OK); 2300 #endif 2301 if (status == HAL_EINPROGRESS) 2302 break; 2303 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 2304 if (ds->ds_rxstat.rs_status != 0) { 2305 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 2306 sc->sc_stats.ast_rx_crcerr++; 2307 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 2308 sc->sc_stats.ast_rx_fifoerr++; 2309 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 2310 sc->sc_stats.ast_rx_badcrypt++; 2311 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 2312 sc->sc_stats.ast_rx_phyerr++; 2313 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 2314 sc->sc_stats.ast_rx_phy[phyerr]++; 2315 } else { 2316 /* 2317 * NB: don't count PHY errors as input errors; 2318 * we enable them on the 5212 to collect info 2319 * about environmental noise and, in that 2320 * setting, they don't really reflect tx/rx 2321 * errors. 2322 */ 2323 ifp->if_ierrors++; 2324 } 2325 goto rx_next; 2326 } 2327 2328 len = ds->ds_rxstat.rs_datalen; 2329 if (len < IEEE80211_MIN_LEN) { 2330 DPRINTF(ATH_DEBUG_RECV, ("%s: short packet %d\n", 2331 __func__, len)); 2332 sc->sc_stats.ast_rx_tooshort++; 2333 goto rx_next; 2334 } 2335 2336 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 2337 2338 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2339 bf->bf_m = NULL; 2340 m->m_pkthdr.rcvif = ifp; 2341 m->m_pkthdr.len = m->m_len = len; 2342 2343 #if NBPFILTER > 0 2344 if (sc->sc_drvbpf) { 2345 sc->sc_rx_th.wr_rate = 2346 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2347 sc->sc_rx_th.wr_antsignal = ds->ds_rxstat.rs_rssi; 2348 sc->sc_rx_th.wr_antenna = ds->ds_rxstat.rs_antenna; 2349 /* XXX TSF */ 2350 bpf_mtap2(sc->sc_drvbpf, 2351 &sc->sc_rx_th, sc->sc_rx_th_len, m); 2352 } 2353 #endif 2354 2355 m_adj(m, -IEEE80211_CRC_LEN); 2356 wh = mtod(m, struct ieee80211_frame *); 2357 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2358 /* 2359 * WEP is decrypted by hardware. Clear WEP bit 2360 * and trim WEP header for ieee80211_input(). 2361 */ 2362 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2363 memcpy(&whbuf, wh, sizeof(whbuf)); 2364 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2365 wh = mtod(m, struct ieee80211_frame *); 2366 memcpy(wh, &whbuf, sizeof(whbuf)); 2367 /* 2368 * Also trim WEP ICV from the tail. 2369 */ 2370 m_adj(m, -IEEE80211_WEP_CRCLEN); 2371 /* 2372 * The header has probably moved. 2373 */ 2374 wh = mtod(m, struct ieee80211_frame *); 2375 } 2376 2377 /* 2378 * Locate the node for sender, track state, and 2379 * then pass this node (referenced) up to the 802.11 2380 * layer for its use. We are required to pass 2381 * something so we fall back to ic_bss when this frame 2382 * is from an unknown sender. 2383 */ 2384 ni = ieee80211_find_rxnode(ic, wh); 2385 2386 /* 2387 * Record driver-specific state. 2388 */ 2389 an = ATH_NODE(ni); 2390 if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE) 2391 an->an_rx_hist_next = 0; 2392 rh = &an->an_rx_hist[an->an_rx_hist_next]; 2393 rh->arh_ticks = ATH_TICKS(); 2394 rh->arh_rssi = ds->ds_rxstat.rs_rssi; 2395 rh->arh_antenna = ds->ds_rxstat.rs_antenna; 2396 2397 /* 2398 * Send frame up for processing. 2399 */ 2400 ieee80211_input(ifp, m, ni, 2401 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2402 2403 /* 2404 * The frame may have caused the node to be marked for 2405 * reclamation (e.g. in response to a DEAUTH message) 2406 * so use free_node here instead of unref_node. 2407 */ 2408 if (ni == ic->ic_bss) 2409 ieee80211_unref_node(&ni); 2410 else 2411 ieee80211_free_node(ic, ni); 2412 rx_next: 2413 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2414 } while (ath_rxbuf_init(sc, bf) == 0); 2415 2416 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2417 ath_hal_rxena(ah); /* in case of RXEOL */ 2418 2419 #ifdef __NetBSD__ 2420 if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd)) 2421 ath_start(ifp); 2422 #endif /* __NetBSD__ */ 2423 #undef PA2DESC 2424 } 2425 2426 /* 2427 * XXX Size of an ACK control frame in bytes. 2428 */ 2429 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2430 2431 static int 2432 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2433 struct mbuf *m0) 2434 { 2435 struct ieee80211com *ic = &sc->sc_ic; 2436 struct ath_hal *ah = sc->sc_ah; 2437 struct ifnet *ifp = &sc->sc_ic.ic_if; 2438 int i, error, iswep, hdrlen, pktlen; 2439 u_int8_t rix, cix, txrate, ctsrate; 2440 struct ath_desc *ds; 2441 struct mbuf *m; 2442 struct ieee80211_frame *wh; 2443 u_int32_t iv; 2444 u_int8_t *ivp; 2445 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2446 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2447 u_int subtype, flags, ctsduration, antenna; 2448 HAL_PKT_TYPE atype; 2449 const HAL_RATE_TABLE *rt; 2450 HAL_BOOL shortPreamble; 2451 struct ath_node *an; 2452 ath_txq_critsect_decl(s); 2453 2454 wh = mtod(m0, struct ieee80211_frame *); 2455 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2456 hdrlen = sizeof(struct ieee80211_frame); 2457 pktlen = m0->m_pkthdr.len; 2458 2459 if (iswep) { 2460 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2461 m_adj(m0, hdrlen); 2462 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2463 if (m0 == NULL) { 2464 sc->sc_stats.ast_tx_nombuf++; 2465 return ENOMEM; 2466 } 2467 ivp = hdrbuf + hdrlen; 2468 wh = mtod(m0, struct ieee80211_frame *); 2469 /* 2470 * XXX 2471 * IV must not duplicate during the lifetime of the key. 2472 * But no mechanism to renew keys is defined in IEEE 802.11 2473 * WEP. And IV may be duplicated between other stations 2474 * because of the session key itself is shared. 2475 * So we use pseudo random IV for now, though it is not the 2476 * right way. 2477 */ 2478 iv = ic->ic_iv; 2479 /* 2480 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir: 2481 * (B, 255, N) with 3 <= B < 8 2482 */ 2483 if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00) 2484 iv += 0x000100; 2485 ic->ic_iv = iv + 1; 2486 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 2487 ivp[i] = iv; 2488 iv >>= 8; 2489 } 2490 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 2491 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2492 /* 2493 * The ICV length must be included into hdrlen and pktlen. 2494 */ 2495 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2496 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2497 } 2498 pktlen += IEEE80211_CRC_LEN; 2499 2500 /* 2501 * Load the DMA map so any coalescing is done. This 2502 * also calculates the number of descriptors we need. 2503 */ 2504 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2505 /* 2506 * Discard null packets and check for packets that 2507 * require too many TX descriptors. We try to convert 2508 * the latter to a cluster. 2509 */ 2510 if (error == EFBIG) { /* too many desc's, linearize */ 2511 sc->sc_stats.ast_tx_linear++; 2512 MGETHDR(m, M_DONTWAIT, MT_DATA); 2513 if (m == NULL) { 2514 sc->sc_stats.ast_tx_nombuf++; 2515 m_freem(m0); 2516 return ENOMEM; 2517 } 2518 #ifdef __FreeBSD__ 2519 M_MOVE_PKTHDR(m, m0); 2520 #else 2521 M_COPY_PKTHDR(m, m0); 2522 #endif 2523 MCLGET(m, M_DONTWAIT); 2524 if ((m->m_flags & M_EXT) == 0) { 2525 sc->sc_stats.ast_tx_nomcl++; 2526 m_freem(m0); 2527 m_free(m); 2528 return ENOMEM; 2529 } 2530 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2531 m_freem(m0); 2532 m->m_len = m->m_pkthdr.len; 2533 m0 = m; 2534 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2535 BUS_DMA_NOWAIT); 2536 if (error != 0) { 2537 sc->sc_stats.ast_tx_busdma++; 2538 m_freem(m0); 2539 return error; 2540 } 2541 KASSERT(bf->bf_nseg == 1, 2542 ("ath_tx_start: packet not one segment; nseg %u", 2543 bf->bf_nseg)); 2544 } else if (error != 0) { 2545 sc->sc_stats.ast_tx_busdma++; 2546 m_freem(m0); 2547 return error; 2548 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2549 sc->sc_stats.ast_tx_nodata++; 2550 m_freem(m0); 2551 return EIO; 2552 } 2553 DPRINTF(ATH_DEBUG_XMIT, ("%s: m %p len %u\n", __func__, m0, pktlen)); 2554 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2555 bf->bf_m = m0; 2556 bf->bf_node = ni; /* NB: held reference */ 2557 2558 /* setup descriptors */ 2559 ds = bf->bf_desc; 2560 rt = sc->sc_currates; 2561 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2562 2563 /* 2564 * Calculate Atheros packet type from IEEE80211 packet header 2565 * and setup for rate calculations. 2566 */ 2567 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2568 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2569 case IEEE80211_FC0_TYPE_MGT: 2570 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2571 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2572 atype = HAL_PKT_TYPE_BEACON; 2573 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2574 atype = HAL_PKT_TYPE_PROBE_RESP; 2575 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2576 atype = HAL_PKT_TYPE_ATIM; 2577 rix = 0; /* XXX lowest rate */ 2578 break; 2579 case IEEE80211_FC0_TYPE_CTL: 2580 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2581 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2582 atype = HAL_PKT_TYPE_PSPOLL; 2583 rix = 0; /* XXX lowest rate */ 2584 break; 2585 default: 2586 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2587 IEEE80211_RATE_VAL]; 2588 if (rix == 0xff) { 2589 if_printf(ifp, "bogus xmit rate 0x%x\n", 2590 ni->ni_rates.rs_rates[ni->ni_txrate]); 2591 sc->sc_stats.ast_tx_badrate++; 2592 m_freem(m0); 2593 return EIO; 2594 } 2595 break; 2596 } 2597 /* 2598 * NB: the 802.11 layer marks whether or not we should 2599 * use short preamble based on the current mode and 2600 * negotiated parameters. 2601 */ 2602 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 2603 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 2604 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2605 shortPreamble = AH_TRUE; 2606 sc->sc_stats.ast_tx_shortpre++; 2607 } else { 2608 txrate = rt->info[rix].rateCode; 2609 shortPreamble = AH_FALSE; 2610 } 2611 2612 /* 2613 * Calculate miscellaneous flags. 2614 */ 2615 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2616 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2617 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2618 sc->sc_stats.ast_tx_noack++; 2619 } else if (pktlen > ic->ic_rtsthreshold) { 2620 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2621 sc->sc_stats.ast_tx_rts++; 2622 } 2623 2624 /* 2625 * Calculate duration. This logically belongs in the 802.11 2626 * layer but it lacks sufficient information to calculate it. 2627 */ 2628 if ((flags & HAL_TXDESC_NOACK) == 0 && 2629 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 2630 u_int16_t dur; 2631 /* 2632 * XXX not right with fragmentation. 2633 */ 2634 dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE, 2635 rix, shortPreamble); 2636 *((u_int16_t*) wh->i_dur) = htole16(dur); 2637 } 2638 2639 /* 2640 * Calculate RTS/CTS rate and duration if needed. 2641 */ 2642 ctsduration = 0; 2643 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2644 /* 2645 * CTS transmit rate is derived from the transmit rate 2646 * by looking in the h/w rate table. We must also factor 2647 * in whether or not a short preamble is to be used. 2648 */ 2649 cix = rt->info[rix].controlRate; 2650 ctsrate = rt->info[cix].rateCode; 2651 if (shortPreamble) 2652 ctsrate |= rt->info[cix].shortPreamble; 2653 /* 2654 * Compute the transmit duration based on the size 2655 * of an ACK frame. We call into the HAL to do the 2656 * computation since it depends on the characteristics 2657 * of the actual PHY being used. 2658 */ 2659 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2660 ctsduration += ath_hal_computetxtime(ah, 2661 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2662 } 2663 /* SIFS + data */ 2664 ctsduration += ath_hal_computetxtime(ah, 2665 rt, pktlen, rix, shortPreamble); 2666 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2667 ctsduration += ath_hal_computetxtime(ah, 2668 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2669 } 2670 } else 2671 ctsrate = 0; 2672 2673 /* 2674 * For now use the antenna on which the last good 2675 * frame was received on. We assume this field is 2676 * initialized to 0 which gives us ``auto'' or the 2677 * ``default'' antenna. 2678 */ 2679 an = (struct ath_node *) ni; 2680 if (an->an_tx_antenna) 2681 antenna = an->an_tx_antenna; 2682 else 2683 antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna; 2684 2685 if (ic->ic_rawbpf) 2686 bpf_mtap(ic->ic_rawbpf, m0); 2687 if (sc->sc_drvbpf) { 2688 sc->sc_tx_th.wt_flags = 0; 2689 if (shortPreamble) 2690 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2691 if (iswep) 2692 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2693 sc->sc_tx_th.wt_rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 2694 sc->sc_tx_th.wt_txpower = 60/2; /* XXX */ 2695 sc->sc_tx_th.wt_antenna = antenna; 2696 2697 bpf_mtap2(sc->sc_drvbpf, 2698 &sc->sc_tx_th, sc->sc_tx_th_len, m0); 2699 } 2700 2701 /* 2702 * Formulate first tx descriptor with tx controls. 2703 */ 2704 /* XXX check return value? */ 2705 ath_hal_setuptxdesc(ah, ds 2706 , pktlen /* packet length */ 2707 , hdrlen /* header length */ 2708 , atype /* Atheros packet type */ 2709 , 60 /* txpower XXX */ 2710 , txrate, 1+10 /* series 0 rate/tries */ 2711 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2712 , antenna /* antenna mode */ 2713 , flags /* flags */ 2714 , ctsrate /* rts/cts rate */ 2715 , ctsduration /* rts/cts duration */ 2716 ); 2717 #ifdef notyet 2718 ath_hal_setupxtxdesc(ah, ds 2719 , AH_FALSE /* short preamble */ 2720 , 0, 0 /* series 1 rate/tries */ 2721 , 0, 0 /* series 2 rate/tries */ 2722 , 0, 0 /* series 3 rate/tries */ 2723 ); 2724 #endif 2725 /* 2726 * Fillin the remainder of the descriptor info. 2727 */ 2728 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2729 ds->ds_data = bf->bf_segs[i].ds_addr; 2730 if (i == bf->bf_nseg - 1) 2731 ds->ds_link = 0; 2732 else 2733 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2734 ath_hal_filltxdesc(ah, ds 2735 , bf->bf_segs[i].ds_len /* segment length */ 2736 , i == 0 /* first segment */ 2737 , i == bf->bf_nseg - 1 /* last segment */ 2738 ); 2739 DPRINTF(ATH_DEBUG_XMIT, 2740 ("%s: %d: %08x %08x %08x %08x %08x %08x\n", 2741 __func__, i, ds->ds_link, ds->ds_data, 2742 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1])); 2743 } 2744 2745 /* 2746 * Insert the frame on the outbound list and 2747 * pass it on to the hardware. 2748 */ 2749 ath_txq_critsect_begin(sc, s); 2750 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2751 if (sc->sc_txlink == NULL) { 2752 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2753 DPRINTF(ATH_DEBUG_XMIT, ("%s: TXDP0 = %p (%p)\n", __func__, 2754 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2755 } else { 2756 *sc->sc_txlink = bf->bf_daddr; 2757 DPRINTF(ATH_DEBUG_XMIT, ("%s: link(%p)=%p (%p)\n", __func__, 2758 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2759 } 2760 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2761 ath_txq_critsect_end(sc, s); 2762 2763 ath_hal_txstart(ah, sc->sc_txhalq); 2764 return 0; 2765 } 2766 2767 static void 2768 ath_tx_proc(void *arg, int npending) 2769 { 2770 struct ath_softc *sc = arg; 2771 struct ath_hal *ah = sc->sc_ah; 2772 struct ath_buf *bf; 2773 struct ieee80211com *ic = &sc->sc_ic; 2774 struct ifnet *ifp = &ic->ic_if; 2775 struct ath_desc *ds; 2776 struct ieee80211_node *ni; 2777 struct ath_node *an; 2778 int sr, lr; 2779 HAL_STATUS status; 2780 ath_txq_critsect_decl(s); 2781 ath_txbuf_critsect_decl(s2); 2782 2783 DPRINTF(ATH_DEBUG_TX_PROC, ("%s: pending %u tx queue %p, link %p\n", 2784 __func__, npending, 2785 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2786 sc->sc_txlink)); 2787 for (;;) { 2788 ath_txq_critsect_begin(sc, s); 2789 bf = TAILQ_FIRST(&sc->sc_txq); 2790 if (bf == NULL) { 2791 sc->sc_txlink = NULL; 2792 ath_txq_critsect_end(sc, s); 2793 break; 2794 } 2795 /* only the last descriptor is needed */ 2796 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2797 status = ath_hal_txprocdesc(ah, ds); 2798 #ifdef AR_DEBUG 2799 if (ath_debug & ATH_DEBUG_XMIT_DESC) 2800 ath_printtxbuf(bf, status == HAL_OK); 2801 #endif 2802 if (status == HAL_EINPROGRESS) { 2803 ath_txq_critsect_end(sc, s); 2804 break; 2805 } 2806 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2807 ath_txq_critsect_end(sc, s); 2808 2809 ni = bf->bf_node; 2810 if (ni != NULL) { 2811 an = (struct ath_node *) ni; 2812 if (ds->ds_txstat.ts_status == 0) { 2813 an->an_tx_ok++; 2814 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2815 } else { 2816 an->an_tx_err++; 2817 ifp->if_oerrors++; 2818 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2819 sc->sc_stats.ast_tx_xretries++; 2820 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2821 sc->sc_stats.ast_tx_fifoerr++; 2822 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2823 sc->sc_stats.ast_tx_filtered++; 2824 an->an_tx_antenna = 0; /* invalidate */ 2825 } 2826 sr = ds->ds_txstat.ts_shortretry; 2827 lr = ds->ds_txstat.ts_longretry; 2828 sc->sc_stats.ast_tx_shortretry += sr; 2829 sc->sc_stats.ast_tx_longretry += lr; 2830 if (sr + lr) 2831 an->an_tx_retr++; 2832 /* 2833 * Reclaim reference to node. 2834 * 2835 * NB: the node may be reclaimed here if, for example 2836 * this is a DEAUTH message that was sent and the 2837 * node was timed out due to inactivity. 2838 */ 2839 if (ni != ic->ic_bss) 2840 ieee80211_free_node(ic, ni); 2841 } 2842 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2843 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2844 m_freem(bf->bf_m); 2845 bf->bf_m = NULL; 2846 bf->bf_node = NULL; 2847 2848 ath_txbuf_critsect_begin(sc, s2); 2849 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2850 ath_txbuf_critsect_end(sc, s2); 2851 } 2852 ifp->if_flags &= ~IFF_OACTIVE; 2853 sc->sc_tx_timer = 0; 2854 2855 ath_start(ifp); 2856 } 2857 2858 /* 2859 * Drain the transmit queue and reclaim resources. 2860 */ 2861 static void 2862 ath_draintxq(struct ath_softc *sc) 2863 { 2864 struct ath_hal *ah = sc->sc_ah; 2865 struct ieee80211com *ic = &sc->sc_ic; 2866 struct ifnet *ifp = &ic->ic_if; 2867 struct ieee80211_node *ni; 2868 struct ath_buf *bf; 2869 ath_txq_critsect_decl(s); 2870 ath_txbuf_critsect_decl(s2); 2871 2872 /* XXX return value */ 2873 if (!sc->sc_invalid) { 2874 /* don't touch the hardware if marked invalid */ 2875 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2876 DPRINTF(ATH_DEBUG_RESET, 2877 ("%s: tx queue %p, link %p\n", __func__, 2878 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2879 sc->sc_txlink)); 2880 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2881 DPRINTF(ATH_DEBUG_RESET, 2882 ("%s: beacon queue %p\n", __func__, 2883 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2884 } 2885 for (;;) { 2886 ath_txq_critsect_begin(sc, s); 2887 bf = TAILQ_FIRST(&sc->sc_txq); 2888 if (bf == NULL) { 2889 sc->sc_txlink = NULL; 2890 ath_txq_critsect_end(sc, s); 2891 break; 2892 } 2893 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2894 ath_txq_critsect_end(sc, s); 2895 #ifdef AR_DEBUG 2896 if (ath_debug & ATH_DEBUG_RESET) 2897 ath_printtxbuf(bf, 2898 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2899 #endif /* AR_DEBUG */ 2900 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2901 m_freem(bf->bf_m); 2902 bf->bf_m = NULL; 2903 ni = bf->bf_node; 2904 bf->bf_node = NULL; 2905 ath_txbuf_critsect_begin(sc, s2); 2906 if (ni != NULL && ni != ic->ic_bss) { 2907 /* 2908 * Reclaim node reference. 2909 */ 2910 ieee80211_free_node(ic, ni); 2911 } 2912 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2913 ath_txbuf_critsect_end(sc, s2); 2914 } 2915 ifp->if_flags &= ~IFF_OACTIVE; 2916 sc->sc_tx_timer = 0; 2917 } 2918 2919 /* 2920 * Disable the receive h/w in preparation for a reset. 2921 */ 2922 static void 2923 ath_stoprecv(struct ath_softc *sc) 2924 { 2925 #define PA2DESC(_sc, _pa) \ 2926 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2927 ((_pa) - (_sc)->sc_desc_paddr))) 2928 struct ath_hal *ah = sc->sc_ah; 2929 2930 ath_hal_stoppcurecv(ah); /* disable PCU */ 2931 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2932 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2933 DELAY(3000); /* long enough for 1 frame */ 2934 #ifdef AR_DEBUG 2935 if (ath_debug & ATH_DEBUG_RESET) { 2936 struct ath_buf *bf; 2937 2938 printf("%s: rx queue %p, link %p\n", __func__, 2939 (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink); 2940 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2941 struct ath_desc *ds = bf->bf_desc; 2942 if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr, 2943 PA2DESC(sc, ds->ds_link)) == HAL_OK) 2944 ath_printrxbuf(bf, 1); 2945 } 2946 } 2947 #endif 2948 sc->sc_rxlink = NULL; /* just in case */ 2949 #undef PA2DESC 2950 } 2951 2952 /* 2953 * Enable the receive h/w following a reset. 2954 */ 2955 static int 2956 ath_startrecv(struct ath_softc *sc) 2957 { 2958 struct ath_hal *ah = sc->sc_ah; 2959 struct ath_buf *bf; 2960 2961 sc->sc_rxlink = NULL; 2962 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2963 int error = ath_rxbuf_init(sc, bf); 2964 if (error != 0) { 2965 DPRINTF(ATH_DEBUG_RECV, 2966 ("%s: ath_rxbuf_init failed %d\n", 2967 __func__, error)); 2968 return error; 2969 } 2970 } 2971 2972 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2973 ath_hal_putrxbuf(ah, bf->bf_daddr); 2974 ath_hal_rxena(ah); /* enable recv descriptors */ 2975 ath_mode_init(sc); /* set filters, etc. */ 2976 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2977 return 0; 2978 } 2979 2980 /* 2981 * Set/change channels. If the channel is really being changed, 2982 * it's done by resetting the chip. To accomplish this we must 2983 * first cleanup any pending DMA, then restart stuff after a la 2984 * ath_init. 2985 */ 2986 static int 2987 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 2988 { 2989 struct ath_hal *ah = sc->sc_ah; 2990 struct ieee80211com *ic = &sc->sc_ic; 2991 2992 DPRINTF(ATH_DEBUG_ANY, ("%s: %u (%u MHz) -> %u (%u MHz)\n", __func__, 2993 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 2994 ic->ic_ibss_chan->ic_freq, 2995 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 2996 if (chan != ic->ic_ibss_chan) { 2997 HAL_STATUS status; 2998 HAL_CHANNEL hchan; 2999 enum ieee80211_phymode mode; 3000 3001 /* 3002 * To switch channels clear any pending DMA operations; 3003 * wait long enough for the RX fifo to drain, reset the 3004 * hardware at the new frequency, and then re-enable 3005 * the relevant bits of the h/w. 3006 */ 3007 ath_hal_intrset(ah, 0); /* disable interrupts */ 3008 ath_draintxq(sc); /* clear pending tx frames */ 3009 ath_stoprecv(sc); /* turn off frame recv */ 3010 /* 3011 * Convert to a HAL channel description with 3012 * the flags constrained to reflect the current 3013 * operating mode. 3014 */ 3015 hchan.channel = chan->ic_freq; 3016 hchan.channelFlags = ath_chan2flags(ic, chan); 3017 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 3018 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 3019 "channel %u (%u Mhz)\n", 3020 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 3021 return EIO; 3022 } 3023 /* 3024 * Re-enable rx framework. 3025 */ 3026 if (ath_startrecv(sc) != 0) { 3027 if_printf(&ic->ic_if, 3028 "ath_chan_set: unable to restart recv logic\n"); 3029 return EIO; 3030 } 3031 3032 /* 3033 * Update BPF state. 3034 */ 3035 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 3036 htole16(chan->ic_freq); 3037 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 3038 htole16(chan->ic_flags); 3039 3040 /* 3041 * Change channels and update the h/w rate map 3042 * if we're switching; e.g. 11a to 11b/g. 3043 */ 3044 ic->ic_ibss_chan = chan; 3045 mode = ieee80211_chan2mode(ic, chan); 3046 if (mode != sc->sc_curmode) 3047 ath_setcurmode(sc, mode); 3048 3049 /* 3050 * Re-enable interrupts. 3051 */ 3052 ath_hal_intrset(ah, sc->sc_imask); 3053 } 3054 return 0; 3055 } 3056 3057 static void 3058 ath_next_scan(void *arg) 3059 { 3060 struct ath_softc *sc = arg; 3061 struct ieee80211com *ic = &sc->sc_ic; 3062 int s; 3063 3064 /* don't call ath_start w/o network interrupts blocked */ 3065 s = splnet(); 3066 3067 if (ic->ic_state == IEEE80211_S_SCAN) 3068 ieee80211_next_scan(ic); 3069 splx(s); 3070 } 3071 3072 /* 3073 * Periodically recalibrate the PHY to account 3074 * for temperature/environment changes. 3075 */ 3076 static void 3077 ath_calibrate(void *arg) 3078 { 3079 struct ath_softc *sc = arg; 3080 struct ath_hal *ah = sc->sc_ah; 3081 struct ieee80211com *ic = &sc->sc_ic; 3082 struct ieee80211_channel *c; 3083 HAL_CHANNEL hchan; 3084 3085 sc->sc_stats.ast_per_cal++; 3086 3087 /* 3088 * Convert to a HAL channel description with the flags 3089 * constrained to reflect the current operating mode. 3090 */ 3091 c = ic->ic_ibss_chan; 3092 hchan.channel = c->ic_freq; 3093 hchan.channelFlags = ath_chan2flags(ic, c); 3094 3095 DPRINTF(ATH_DEBUG_CALIBRATE, 3096 ("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 3097 3098 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 3099 /* 3100 * Rfgain is out of bounds, reset the chip 3101 * to load new gain values. 3102 */ 3103 sc->sc_stats.ast_per_rfgain++; 3104 ath_reset(sc); 3105 } 3106 if (!ath_hal_calibrate(ah, &hchan)) { 3107 DPRINTF(ATH_DEBUG_ANY, 3108 ("%s: calibration of channel %u failed\n", 3109 __func__, c->ic_freq)); 3110 sc->sc_stats.ast_per_calfail++; 3111 } 3112 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 3113 } 3114 3115 static HAL_LED_STATE 3116 ath_state_to_led(enum ieee80211_state state) 3117 { 3118 switch (state) { 3119 case IEEE80211_S_INIT: 3120 return HAL_LED_INIT; 3121 case IEEE80211_S_SCAN: 3122 return HAL_LED_SCAN; 3123 case IEEE80211_S_AUTH: 3124 return HAL_LED_AUTH; 3125 case IEEE80211_S_ASSOC: 3126 return HAL_LED_ASSOC; 3127 case IEEE80211_S_RUN: 3128 return HAL_LED_RUN; 3129 default: 3130 panic("%s: unknown 802.11 state %d\n", __func__, state); 3131 return HAL_LED_INIT; 3132 } 3133 } 3134 3135 static int 3136 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 3137 { 3138 struct ifnet *ifp = &ic->ic_if; 3139 struct ath_softc *sc = ifp->if_softc; 3140 struct ath_hal *ah = sc->sc_ah; 3141 struct ieee80211_node *ni; 3142 int i, error; 3143 const u_int8_t *bssid; 3144 u_int32_t rfilt; 3145 3146 DPRINTF(ATH_DEBUG_ANY, ("%s: %s -> %s\n", __func__, 3147 ieee80211_state_name[ic->ic_state], 3148 ieee80211_state_name[nstate])); 3149 3150 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 3151 3152 if (nstate == IEEE80211_S_INIT) { 3153 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3154 ath_hal_intrset(ah, sc->sc_imask); 3155 callout_stop(&sc->sc_scan_ch); 3156 callout_stop(&sc->sc_cal_ch); 3157 return (*sc->sc_newstate)(ic, nstate, arg); 3158 } 3159 ni = ic->ic_bss; 3160 error = ath_chan_set(sc, ni->ni_chan); 3161 if (error != 0) 3162 goto bad; 3163 rfilt = ath_calcrxfilter(sc); 3164 if (nstate == IEEE80211_S_SCAN) { 3165 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 3166 ath_next_scan, sc); 3167 bssid = ifp->if_broadcastaddr; 3168 } else { 3169 callout_stop(&sc->sc_scan_ch); 3170 bssid = ni->ni_bssid; 3171 } 3172 ath_hal_setrxfilter(ah, rfilt); 3173 DPRINTF(ATH_DEBUG_ANY, ("%s: RX filter 0x%x bssid %s\n", 3174 __func__, rfilt, ether_sprintf(bssid))); 3175 3176 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 3177 ath_hal_setassocid(ah, bssid, ni->ni_associd); 3178 else 3179 ath_hal_setassocid(ah, bssid, 0); 3180 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 3181 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3182 if (ath_hal_keyisvalid(ah, i)) 3183 ath_hal_keysetmac(ah, i, bssid); 3184 } 3185 3186 if (nstate == IEEE80211_S_RUN) { 3187 DPRINTF(ATH_DEBUG_ANY, ("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 3188 "capinfo=0x%04x chan=%d\n" 3189 , __func__ 3190 , ic->ic_flags 3191 , ni->ni_intval 3192 , ether_sprintf(ni->ni_bssid) 3193 , ni->ni_capinfo 3194 , ieee80211_chan2ieee(ic, ni->ni_chan))); 3195 3196 /* 3197 * Allocate and setup the beacon frame for AP or adhoc mode. 3198 */ 3199 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 3200 ic->ic_opmode == IEEE80211_M_IBSS) { 3201 error = ath_beacon_alloc(sc, ni); 3202 if (error != 0) 3203 goto bad; 3204 } 3205 3206 /* 3207 * Configure the beacon and sleep timers. 3208 */ 3209 ath_beacon_config(sc); 3210 3211 /* start periodic recalibration timer */ 3212 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 3213 ath_calibrate, sc); 3214 } else { 3215 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3216 ath_hal_intrset(ah, sc->sc_imask); 3217 callout_stop(&sc->sc_cal_ch); /* no calibration */ 3218 } 3219 /* 3220 * Reset the rate control state. 3221 */ 3222 ath_rate_ctl_reset(sc, nstate); 3223 /* 3224 * Invoke the parent method to complete the work. 3225 */ 3226 return (*sc->sc_newstate)(ic, nstate, arg); 3227 bad: 3228 callout_stop(&sc->sc_scan_ch); 3229 callout_stop(&sc->sc_cal_ch); 3230 /* NB: do not invoke the parent */ 3231 return error; 3232 } 3233 3234 /* 3235 * Setup driver-specific state for a newly associated node. 3236 * Note that we're called also on a re-associate, the isnew 3237 * param tells us if this is the first time or not. 3238 */ 3239 static void 3240 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 3241 { 3242 if (isnew) { 3243 struct ath_node *an = (struct ath_node *) ni; 3244 3245 an->an_tx_ok = an->an_tx_err = 3246 an->an_tx_retr = an->an_tx_upper = 0; 3247 /* start with highest negotiated rate */ 3248 /* 3249 * XXX should do otherwise but only when 3250 * the rate control algorithm is better. 3251 */ 3252 KASSERT(ni->ni_rates.rs_nrates > 0, 3253 ("new association w/ no rates!")); 3254 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3255 } 3256 } 3257 3258 static int 3259 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor, 3260 HAL_BOOL xchanmode) 3261 { 3262 struct ieee80211com *ic = &sc->sc_ic; 3263 struct ifnet *ifp = &ic->ic_if; 3264 struct ath_hal *ah = sc->sc_ah; 3265 HAL_CHANNEL *chans; 3266 int i, ix, nchan; 3267 3268 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 3269 M_TEMP, M_NOWAIT); 3270 if (chans == NULL) { 3271 if_printf(ifp, "unable to allocate channel table\n"); 3272 return ENOMEM; 3273 } 3274 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 3275 cc, HAL_MODE_ALL, outdoor, xchanmode)) { 3276 if_printf(ifp, "unable to collect channel list from hal\n"); 3277 free(chans, M_TEMP); 3278 return EINVAL; 3279 } 3280 3281 /* 3282 * Convert HAL channels to ieee80211 ones and insert 3283 * them in the table according to their channel number. 3284 */ 3285 for (i = 0; i < nchan; i++) { 3286 HAL_CHANNEL *c = &chans[i]; 3287 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 3288 if (ix > IEEE80211_CHAN_MAX) { 3289 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 3290 ix, c->channel, c->channelFlags); 3291 continue; 3292 } 3293 DPRINTF(ATH_DEBUG_ANY, 3294 ("%s: HAL channel %d/%d freq %d flags %#04x idx %d\n", 3295 sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags, 3296 ix)); 3297 /* NB: flags are known to be compatible */ 3298 if (ic->ic_channels[ix].ic_freq == 0) { 3299 ic->ic_channels[ix].ic_freq = c->channel; 3300 ic->ic_channels[ix].ic_flags = c->channelFlags; 3301 } else { 3302 /* channels overlap; e.g. 11g and 11b */ 3303 ic->ic_channels[ix].ic_flags |= c->channelFlags; 3304 } 3305 } 3306 free(chans, M_TEMP); 3307 return 0; 3308 } 3309 3310 static int 3311 ath_rate_setup(struct ath_softc *sc, u_int mode) 3312 { 3313 struct ath_hal *ah = sc->sc_ah; 3314 struct ieee80211com *ic = &sc->sc_ic; 3315 const HAL_RATE_TABLE *rt; 3316 struct ieee80211_rateset *rs; 3317 int i, maxrates; 3318 3319 switch (mode) { 3320 case IEEE80211_MODE_11A: 3321 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 3322 break; 3323 case IEEE80211_MODE_11B: 3324 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 3325 break; 3326 case IEEE80211_MODE_11G: 3327 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 3328 break; 3329 case IEEE80211_MODE_TURBO: 3330 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 3331 break; 3332 default: 3333 DPRINTF(ATH_DEBUG_ANY, 3334 ("%s: invalid mode %u\n", __func__, mode)); 3335 return 0; 3336 } 3337 rt = sc->sc_rates[mode]; 3338 if (rt == NULL) 3339 return 0; 3340 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 3341 DPRINTF(ATH_DEBUG_ANY, 3342 ("%s: rate table too small (%u > %u)\n", 3343 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 3344 maxrates = IEEE80211_RATE_MAXSIZE; 3345 } else 3346 maxrates = rt->rateCount; 3347 rs = &ic->ic_sup_rates[mode]; 3348 for (i = 0; i < maxrates; i++) 3349 rs->rs_rates[i] = rt->info[i].dot11Rate; 3350 rs->rs_nrates = maxrates; 3351 return 1; 3352 } 3353 3354 static void 3355 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 3356 { 3357 const HAL_RATE_TABLE *rt; 3358 int i; 3359 3360 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 3361 rt = sc->sc_rates[mode]; 3362 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 3363 for (i = 0; i < rt->rateCount; i++) 3364 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 3365 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 3366 for (i = 0; i < 32; i++) 3367 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 3368 sc->sc_currates = rt; 3369 sc->sc_curmode = mode; 3370 } 3371 3372 /* 3373 * Reset the rate control state for each 802.11 state transition. 3374 */ 3375 static void 3376 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 3377 { 3378 struct ieee80211com *ic = &sc->sc_ic; 3379 struct ieee80211_node *ni; 3380 struct ath_node *an; 3381 3382 if (ic->ic_opmode != IEEE80211_M_STA) { 3383 /* 3384 * When operating as a station the node table holds 3385 * the AP's that were discovered during scanning. 3386 * For any other operating mode we want to reset the 3387 * tx rate state of each node. 3388 */ 3389 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3390 ni->ni_txrate = 0; /* use lowest rate */ 3391 an = (struct ath_node *) ni; 3392 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3393 an->an_tx_upper = 0; 3394 } 3395 } 3396 /* 3397 * Reset local xmit state; this is really only meaningful 3398 * when operating in station or adhoc mode. 3399 */ 3400 ni = ic->ic_bss; 3401 an = (struct ath_node *) ni; 3402 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3403 if (state == IEEE80211_S_RUN) { 3404 /* start with highest negotiated rate */ 3405 KASSERT(ni->ni_rates.rs_nrates > 0, 3406 ("transition to RUN state w/ no rates!")); 3407 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3408 } else { 3409 /* use lowest rate */ 3410 ni->ni_txrate = 0; 3411 } 3412 } 3413 3414 /* 3415 * Examine and potentially adjust the transmit rate. 3416 */ 3417 static void 3418 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3419 { 3420 struct ath_softc *sc = arg; 3421 struct ath_node *an = (struct ath_node *) ni; 3422 struct ieee80211_rateset *rs = &ni->ni_rates; 3423 int mod = 0, orate, enough; 3424 3425 /* 3426 * Rate control 3427 * XXX: very primitive version. 3428 */ 3429 sc->sc_stats.ast_rate_calls++; 3430 3431 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3432 3433 /* no packet reached -> down */ 3434 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3435 mod = -1; 3436 3437 /* all packets needs retry in average -> down */ 3438 if (enough && an->an_tx_ok < an->an_tx_retr) 3439 mod = -1; 3440 3441 /* no error and less than 10% of packets needs retry -> up */ 3442 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3443 mod = 1; 3444 3445 orate = ni->ni_txrate; 3446 switch (mod) { 3447 case 0: 3448 if (enough && an->an_tx_upper > 0) 3449 an->an_tx_upper--; 3450 break; 3451 case -1: 3452 if (ni->ni_txrate > 0) { 3453 ni->ni_txrate--; 3454 sc->sc_stats.ast_rate_drop++; 3455 } 3456 an->an_tx_upper = 0; 3457 break; 3458 case 1: 3459 if (++an->an_tx_upper < 2) 3460 break; 3461 an->an_tx_upper = 0; 3462 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3463 ni->ni_txrate++; 3464 sc->sc_stats.ast_rate_raise++; 3465 } 3466 break; 3467 } 3468 3469 if (ni->ni_txrate != orate) { 3470 DPRINTF(ATH_DEBUG_RATE, 3471 ("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3472 __func__, 3473 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3474 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3475 an->an_tx_ok, an->an_tx_err, an->an_tx_retr)); 3476 } 3477 if (ni->ni_txrate != orate || enough) 3478 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3479 } 3480 3481 #ifdef AR_DEBUG 3482 #ifdef __FreeBSD__ 3483 static int 3484 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3485 { 3486 char dmode[64]; 3487 int error; 3488 3489 strncpy(dmode, "", sizeof(dmode) - 1); 3490 dmode[sizeof(dmode) - 1] = '\0'; 3491 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3492 3493 if (error == 0 && req->newptr != NULL) { 3494 struct ifnet *ifp; 3495 struct ath_softc *sc; 3496 3497 ifp = ifunit("ath0"); /* XXX */ 3498 if (!ifp) 3499 return EINVAL; 3500 sc = ifp->if_softc; 3501 if (strcmp(dmode, "hal") == 0) 3502 ath_hal_dumpstate(sc->sc_ah); 3503 else 3504 return EINVAL; 3505 } 3506 return error; 3507 } 3508 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3509 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3510 #endif /* __FreeBSD__ */ 3511 3512 #if 0 /* #ifdef __NetBSD__ */ 3513 static int 3514 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3515 { 3516 char dmode[64]; 3517 int error; 3518 3519 strncpy(dmode, "", sizeof(dmode) - 1); 3520 dmode[sizeof(dmode) - 1] = '\0'; 3521 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3522 3523 if (error == 0 && req->newptr != NULL) { 3524 struct ifnet *ifp; 3525 struct ath_softc *sc; 3526 3527 ifp = ifunit("ath0"); /* XXX */ 3528 if (!ifp) 3529 return EINVAL; 3530 sc = ifp->if_softc; 3531 if (strcmp(dmode, "hal") == 0) 3532 ath_hal_dumpstate(sc->sc_ah); 3533 else 3534 return EINVAL; 3535 } 3536 return error; 3537 } 3538 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3539 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3540 #endif /* __NetBSD__ */ 3541 3542 static void 3543 ath_printrxbuf(struct ath_buf *bf, int done) 3544 { 3545 struct ath_desc *ds; 3546 int i; 3547 3548 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3549 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3550 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3551 ds->ds_link, ds->ds_data, 3552 ds->ds_ctl0, ds->ds_ctl1, 3553 ds->ds_hw[0], ds->ds_hw[1], 3554 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3555 } 3556 } 3557 3558 static void 3559 ath_printtxbuf(struct ath_buf *bf, int done) 3560 { 3561 struct ath_desc *ds; 3562 int i; 3563 3564 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3565 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3566 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3567 ds->ds_link, ds->ds_data, 3568 ds->ds_ctl0, ds->ds_ctl1, 3569 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3570 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3571 } 3572 } 3573 #endif /* AR_DEBUG */ 3574
Indexes created Thu Oct 02 07:10:07 GMT 2025