ath.c revision 1.32.2.2
1 /* $NetBSD: ath.c,v 1.32.2.2 2004/08/03 10:46:10 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.54 2004/04/05 04:42:42 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.32.2.2 2004/08/03 10:46:10 skrll Exp $"); 45 #endif 46 47 /* 48 * Driver for the Atheros Wireless LAN controller. 49 * 50 * This software is derived from work of Atsushi Onoe; his contribution 51 * is greatly appreciated. 52 */ 53 54 #include "opt_inet.h" 55 56 #ifdef __NetBSD__ 57 #include "bpfilter.h" 58 #endif /* __NetBSD__ */ 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/types.h> 63 #include <sys/sysctl.h> 64 #include <sys/mbuf.h> 65 #include <sys/malloc.h> 66 #include <sys/lock.h> 67 #ifdef __FreeBSD__ 68 #include <sys/mutex.h> 69 #endif 70 #include <sys/kernel.h> 71 #include <sys/socket.h> 72 #include <sys/sockio.h> 73 #include <sys/errno.h> 74 #include <sys/callout.h> 75 #ifdef __FreeBSD__ 76 #include <sys/bus.h> 77 #else 78 #include <machine/bus.h> 79 #endif 80 #include <sys/endian.h> 81 82 #include <machine/bus.h> 83 84 #include <net/if.h> 85 #include <net/if_dl.h> 86 #include <net/if_media.h> 87 #include <net/if_arp.h> 88 #ifdef __FreeBSD__ 89 #include <net/ethernet.h> 90 #else 91 #include <net/if_ether.h> 92 #endif 93 #include <net/if_llc.h> 94 95 #include <net80211/ieee80211_var.h> 96 #include <net80211/ieee80211_compat.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #endif 101 102 #ifdef INET 103 #include <netinet/in.h> 104 #endif 105 106 #include <dev/ic/athcompat.h> 107 108 #define AR_DEBUG 109 #ifdef __FreeBSD__ 110 #include <dev/ath/if_athvar.h> 111 #include <contrib/dev/ath/ah_desc.h> 112 #else 113 #include <dev/ic/athvar.h> 114 #include <../contrib/sys/dev/ic/athhal_desc.h> 115 #endif 116 117 /* unaligned little endian access */ 118 #define LE_READ_2(p) \ 119 ((u_int16_t) \ 120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 121 #define LE_READ_4(p) \ 122 ((u_int32_t) \ 123 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 124 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 125 126 #ifdef __FreeBSD__ 127 static void ath_init(void *); 128 #else 129 static int ath_init(struct ifnet *); 130 #endif 131 static int ath_init1(struct ath_softc *); 132 static int ath_intr1(struct ath_softc *); 133 static void ath_stop(struct ifnet *); 134 static void ath_start(struct ifnet *); 135 static void ath_reset(struct ath_softc *); 136 static int ath_media_change(struct ifnet *); 137 static void ath_watchdog(struct ifnet *); 138 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 139 static void ath_fatal_proc(void *, int); 140 static void ath_rxorn_proc(void *, int); 141 static void ath_bmiss_proc(void *, int); 142 static void ath_initkeytable(struct ath_softc *); 143 static void ath_mode_init(struct ath_softc *); 144 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 145 static void ath_beacon_proc(void *, int); 146 static void ath_beacon_free(struct ath_softc *); 147 static void ath_beacon_config(struct ath_softc *); 148 static int ath_desc_alloc(struct ath_softc *); 149 static void ath_desc_free(struct ath_softc *); 150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 151 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 152 static void ath_node_copy(struct ieee80211com *, 153 struct ieee80211_node *, const struct ieee80211_node *); 154 static u_int8_t ath_node_getrssi(struct ieee80211com *, 155 struct ieee80211_node *); 156 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 157 static void ath_rx_proc(void *, int); 158 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 159 struct ath_buf *, struct mbuf *); 160 static void ath_tx_proc(void *, int); 161 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 162 static void ath_draintxq(struct ath_softc *); 163 static void ath_stoprecv(struct ath_softc *); 164 static int ath_startrecv(struct ath_softc *); 165 static void ath_next_scan(void *); 166 static void ath_calibrate(void *); 167 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 168 static void ath_newassoc(struct ieee80211com *, 169 struct ieee80211_node *, int); 170 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor, 171 HAL_BOOL xchanmode); 172 173 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 174 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 175 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 176 static void ath_rate_ctl(void *, struct ieee80211_node *); 177 178 #ifdef __NetBSD__ 179 int ath_enable(struct ath_softc *); 180 void ath_disable(struct ath_softc *); 181 void ath_power(int, void *); 182 #endif 183 184 #ifdef __FreeBSD__ 185 SYSCTL_DECL(_hw_ath); 186 /* XXX validate sysctl values */ 187 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 188 0, "channel dwell time (ms) for AP/station scanning"); 189 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 190 0, "chip calibration interval (secs)"); 191 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 192 0, "enable/disable outdoor operation"); 193 TUNABLE_INT("hw.ath.outdoor", &ath_outdoor); 194 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 195 0, "country code"); 196 TUNABLE_INT("hw.ath.countrycode", &ath_countrycode); 197 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 198 0, "regulatory domain"); 199 #endif /* __FreeBSD__ */ 200 201 #ifdef __NetBSD__ 202 static int ath_dwelltime_nodenum, ath_calibrate_nodenum, ath_outdoor_nodenum, 203 ath_countrycode_nodenum, ath_regdomain_nodenum, ath_debug_nodenum; 204 #endif /* __NetBSD__ */ 205 206 static int ath_dwelltime = 200; /* 5 channels/second */ 207 static int ath_calinterval = 30; /* calibrate every 30 secs */ 208 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 209 static int ath_xchanmode = AH_TRUE; /* enable extended channels */ 210 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 211 static int ath_regdomain = 0; /* regulatory domain */ 212 213 #ifdef AR_DEBUG 214 int ath_debug = 0; 215 #ifdef __FreeBSD__ 216 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 217 0, "control debugging printfs"); 218 TUNABLE_INT("hw.ath.debug", &ath_debug); 219 #endif /* __FreeBSD__ */ 220 #define IFF_DUMPPKTS(_ifp, _m) \ 221 ((ath_debug & _m) || \ 222 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 223 static void ath_printrxbuf(struct ath_buf *bf, int); 224 static void ath_printtxbuf(struct ath_buf *bf, int); 225 enum { 226 ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 227 ATH_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 228 ATH_DEBUG_RECV = 0x00000004, /* basic recv operation */ 229 ATH_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 230 ATH_DEBUG_RATE = 0x00000010, /* rate control */ 231 ATH_DEBUG_RESET = 0x00000020, /* reset processing */ 232 ATH_DEBUG_MODE = 0x00000040, /* mode init/setup */ 233 ATH_DEBUG_BEACON = 0x00000080, /* beacon handling */ 234 ATH_DEBUG_WATCHDOG = 0x00000100, /* watchdog timeout */ 235 ATH_DEBUG_INTR = 0x00001000, /* ISR */ 236 ATH_DEBUG_TX_PROC = 0x00002000, /* tx ISR proc */ 237 ATH_DEBUG_RX_PROC = 0x00004000, /* rx ISR proc */ 238 ATH_DEBUG_BEACON_PROC = 0x00008000, /* beacon ISR proc */ 239 ATH_DEBUG_CALIBRATE = 0x00010000, /* periodic calibration */ 240 ATH_DEBUG_ANY = 0xffffffff 241 }; 242 #define DPRINTF(_m,X) if (ath_debug & (_m)) printf X 243 #else 244 #define IFF_DUMPPKTS(_ifp, _m) \ 245 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 246 #define DPRINTF(_m, X) 247 #endif 248 249 #ifdef __NetBSD__ 250 int 251 ath_activate(struct device *self, enum devact act) 252 { 253 struct ath_softc *sc = (struct ath_softc *)self; 254 int rv = 0, s; 255 256 s = splnet(); 257 switch (act) { 258 case DVACT_ACTIVATE: 259 rv = EOPNOTSUPP; 260 break; 261 case DVACT_DEACTIVATE: 262 if_deactivate(&sc->sc_ic.ic_if); 263 break; 264 } 265 splx(s); 266 return rv; 267 } 268 269 int 270 ath_enable(struct ath_softc *sc) 271 { 272 if (ATH_IS_ENABLED(sc) == 0) { 273 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 274 printf("%s: device enable failed\n", 275 sc->sc_dev.dv_xname); 276 return (EIO); 277 } 278 sc->sc_flags |= ATH_ENABLED; 279 } 280 return (0); 281 } 282 283 void 284 ath_disable(struct ath_softc *sc) 285 { 286 if (!ATH_IS_ENABLED(sc)) 287 return; 288 if (sc->sc_disable != NULL) 289 (*sc->sc_disable)(sc); 290 sc->sc_flags &= ~ATH_ENABLED; 291 } 292 293 static int 294 sysctl_ath_verify(SYSCTLFN_ARGS) 295 { 296 int error, t; 297 struct sysctlnode node; 298 299 node = *rnode; 300 t = *(int*)rnode->sysctl_data; 301 node.sysctl_data = &t; 302 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 303 if (error || newp == NULL) 304 return (error); 305 306 DPRINTF(ATH_DEBUG_ANY, ("%s: t = %d, nodenum = %d, rnodenum = %d\n", 307 __func__, t, node.sysctl_num, rnode->sysctl_num)); 308 309 if (node.sysctl_num == ath_dwelltime_nodenum) { 310 if (t <= 0) 311 return (EINVAL); 312 } else if (node.sysctl_num == ath_calibrate_nodenum) { 313 if (t <= 0) 314 return (EINVAL); 315 #ifdef AR_DEBUG 316 } else if (node.sysctl_num == ath_debug_nodenum) { 317 if (t < 0 || t > 2) 318 return (EINVAL); 319 #endif /* AR_DEBUG */ 320 } else 321 return (EINVAL); 322 323 *(int*)rnode->sysctl_data = t; 324 325 return (0); 326 } 327 328 /* 329 * Setup sysctl(3) MIB, ath.*. 330 * 331 * TBD condition CTLFLAG_PERMANENT on being an LKM or not 332 */ 333 SYSCTL_SETUP(sysctl_ath, "sysctl ath subtree setup") 334 { 335 int rc, ath_node_num; 336 struct sysctlnode *node; 337 338 if ((rc = sysctl_createv(clog, 0, NULL, NULL, 339 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL, 340 NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) 341 goto err; 342 343 if ((rc = sysctl_createv(clog, 0, NULL, &node, 344 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ath", 345 SYSCTL_DESCR("ath information and options"), 346 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 347 goto err; 348 349 ath_node_num = node->sysctl_num; 350 351 /* channel dwell time (ms) for AP/station scanning */ 352 if ((rc = sysctl_createv(clog, 0, NULL, &node, 353 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 354 CTLTYPE_INT, "dwell", 355 SYSCTL_DESCR("Channel dwell time (ms) for AP/station scanning"), 356 sysctl_ath_verify, 0, &ath_dwelltime, 357 0, CTL_HW, ath_node_num, CTL_CREATE, 358 CTL_EOL)) != 0) 359 goto err; 360 361 ath_dwelltime_nodenum = node->sysctl_num; 362 363 /* chip calibration interval (secs) */ 364 if ((rc = sysctl_createv(clog, 0, NULL, &node, 365 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 366 CTLTYPE_INT, "calibrate", 367 SYSCTL_DESCR("Chip calibration interval (secs)"), sysctl_ath_verify, 368 0, &ath_calinterval, 0, CTL_HW, 369 ath_node_num, CTL_CREATE, CTL_EOL)) != 0) 370 goto err; 371 372 ath_calibrate_nodenum = node->sysctl_num; 373 374 /* enable/disable outdoor operation */ 375 if ((rc = sysctl_createv(clog, 0, NULL, &node, 376 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 377 "outdoor", SYSCTL_DESCR("Enable/disable outdoor operation"), 378 NULL, 0, &ath_outdoor, 0, 379 CTL_HW, ath_node_num, CTL_CREATE, 380 CTL_EOL)) != 0) 381 goto err; 382 383 ath_outdoor_nodenum = node->sysctl_num; 384 385 /* country code */ 386 if ((rc = sysctl_createv(clog, 0, NULL, &node, 387 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 388 "countrycode", SYSCTL_DESCR("Country code"), 389 NULL, 0, &ath_countrycode, 0, 390 CTL_HW, ath_node_num, CTL_CREATE, 391 CTL_EOL)) != 0) 392 goto err; 393 394 ath_countrycode_nodenum = node->sysctl_num; 395 396 /* regulatory domain */ 397 if ((rc = sysctl_createv(clog, 0, NULL, &node, 398 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 399 "regdomain", SYSCTL_DESCR("Regulatory domain"), 400 NULL, 0, &ath_regdomain, 0, 401 CTL_HW, ath_node_num, CTL_CREATE, 402 CTL_EOL)) != 0) 403 goto err; 404 405 ath_regdomain_nodenum = node->sysctl_num; 406 407 #ifdef AR_DEBUG 408 409 /* control debugging printfs */ 410 if ((rc = sysctl_createv(clog, 0, NULL, &node, 411 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 412 "debug", SYSCTL_DESCR("Enable/disable ath debugging output"), 413 sysctl_ath_verify, 0, &ath_debug, 0, 414 CTL_HW, ath_node_num, CTL_CREATE, 415 CTL_EOL)) != 0) 416 goto err; 417 418 ath_debug_nodenum = node->sysctl_num; 419 420 #endif /* AR_DEBUG */ 421 return; 422 err: 423 printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 424 } 425 #endif /* __NetBSD__ */ 426 427 int 428 ath_attach(u_int16_t devid, struct ath_softc *sc) 429 { 430 struct ieee80211com *ic = &sc->sc_ic; 431 struct ifnet *ifp = &ic->ic_if; 432 struct ath_hal *ah; 433 HAL_STATUS status; 434 HAL_TXQ_INFO qinfo; 435 int error = 0; 436 437 DPRINTF(ATH_DEBUG_ANY, ("%s: devid 0x%x\n", __func__, devid)); 438 439 #ifdef __FreeBSD__ 440 /* set these up early for if_printf use */ 441 if_initname(ifp, device_get_name(sc->sc_dev), 442 device_get_unit(sc->sc_dev)); 443 #else 444 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 445 #endif 446 447 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 448 if (ah == NULL) { 449 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 450 status); 451 error = ENXIO; 452 goto bad; 453 } 454 if (ah->ah_abi != HAL_ABI_VERSION) { 455 if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n", 456 ah->ah_abi, HAL_ABI_VERSION); 457 error = ENXIO; 458 goto bad; 459 } 460 if_printf(ifp, "mac %d.%d phy %d.%d", 461 ah->ah_macVersion, ah->ah_macRev, 462 ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf); 463 if (ah->ah_analog5GhzRev) 464 printf(" 5ghz radio %d.%d", 465 ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf); 466 if (ah->ah_analog2GhzRev) 467 printf(" 2ghz radio %d.%d", 468 ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf); 469 printf("\n"); 470 sc->sc_ah = ah; 471 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 472 473 /* 474 * Collect the channel list using the default country 475 * code and including outdoor channels. The 802.11 layer 476 * is resposible for filtering this list based on settings 477 * like the phy mode. 478 */ 479 error = ath_getchannels(sc, ath_countrycode, ath_outdoor, 480 ath_xchanmode); 481 if (error != 0) 482 goto bad; 483 /* 484 * Copy these back; they are set as a side effect 485 * of constructing the channel list. 486 */ 487 ath_hal_getregdomain(ah, &ath_regdomain); 488 ath_hal_getcountrycode(ah, &ath_countrycode); 489 490 /* 491 * Setup rate tables for all potential media types. 492 */ 493 ath_rate_setup(sc, IEEE80211_MODE_11A); 494 ath_rate_setup(sc, IEEE80211_MODE_11B); 495 ath_rate_setup(sc, IEEE80211_MODE_11G); 496 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 497 498 error = ath_desc_alloc(sc); 499 if (error != 0) { 500 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 501 goto bad; 502 } 503 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 504 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 505 506 #ifdef __FreeBSD__ 507 ATH_TXBUF_LOCK_INIT(sc); 508 ATH_TXQ_LOCK_INIT(sc); 509 #endif 510 511 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 512 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 513 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 514 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 515 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 516 517 /* 518 * For now just pre-allocate one data queue and one 519 * beacon queue. Note that the HAL handles resetting 520 * them at the needed time. Eventually we'll want to 521 * allocate more tx queues for splitting management 522 * frames and for QOS support. 523 */ 524 sc->sc_bhalq = ath_hal_setuptxqueue(ah,HAL_TX_QUEUE_BEACON,NULL); 525 if (sc->sc_bhalq == (u_int) -1) { 526 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 527 goto bad2; 528 } 529 530 memset(&qinfo, 0, sizeof(qinfo)); 531 qinfo.tqi_subtype = HAL_WME_AC_BE; 532 sc->sc_txhalq = ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_DATA, &qinfo); 533 if (sc->sc_txhalq == (u_int) -1) { 534 if_printf(ifp, "unable to setup a data xmit queue!\n"); 535 goto bad2; 536 } 537 538 ifp->if_softc = sc; 539 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 540 ifp->if_start = ath_start; 541 ifp->if_watchdog = ath_watchdog; 542 ifp->if_ioctl = ath_ioctl; 543 ifp->if_init = ath_init; 544 #ifdef __FreeBSD__ 545 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 546 #else 547 #if 0 548 ifp->if_stop = ath_stop; /* XXX */ 549 #endif 550 IFQ_SET_READY(&ifp->if_snd); 551 #endif 552 553 ic->ic_softc = sc; 554 ic->ic_newassoc = ath_newassoc; 555 /* XXX not right but it's not used anywhere important */ 556 ic->ic_phytype = IEEE80211_T_OFDM; 557 ic->ic_opmode = IEEE80211_M_STA; 558 ic->ic_caps = IEEE80211_C_WEP /* wep supported */ 559 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 560 | IEEE80211_C_HOSTAP /* hostap mode */ 561 | IEEE80211_C_MONITOR /* monitor mode */ 562 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 563 ; 564 565 /* get mac address from hardware */ 566 ath_hal_getmac(ah, ic->ic_myaddr); 567 568 #ifdef __NetBSD__ 569 if_attach(ifp); 570 #endif 571 /* call MI attach routine. */ 572 ieee80211_ifattach(ifp); 573 /* override default methods */ 574 ic->ic_node_alloc = ath_node_alloc; 575 sc->sc_node_free = ic->ic_node_free; 576 ic->ic_node_free = ath_node_free; 577 sc->sc_node_copy = ic->ic_node_copy; 578 ic->ic_node_copy = ath_node_copy; 579 ic->ic_node_getrssi = ath_node_getrssi; 580 sc->sc_newstate = ic->ic_newstate; 581 ic->ic_newstate = ath_newstate; 582 /* complete initialization */ 583 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 584 585 #if NBPFILTER > 0 586 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 587 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 588 &sc->sc_drvbpf); 589 #endif 590 /* 591 * Initialize constant fields. 592 * XXX make header lengths a multiple of 32-bits so subsequent 593 * headers are properly aligned; this is a kludge to keep 594 * certain applications happy. 595 * 596 * NB: the channel is setup each time we transition to the 597 * RUN state to avoid filling it in for each frame. 598 */ 599 sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(u_int32_t)); 600 sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len); 601 sc->sc_tx_th.wt_ihdr.it_present = htole32(ATH_TX_RADIOTAP_PRESENT); 602 603 sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(u_int32_t)); 604 sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len); 605 sc->sc_rx_th.wr_ihdr.it_present = htole32(ATH_RX_RADIOTAP_PRESENT); 606 607 #ifdef __NetBSD__ 608 sc->sc_flags |= ATH_ATTACHED; 609 /* 610 * Make sure the interface is shutdown during reboot. 611 */ 612 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 613 if (sc->sc_sdhook == NULL) 614 printf("%s: WARNING: unable to establish shutdown hook\n", 615 sc->sc_dev.dv_xname); 616 sc->sc_powerhook = powerhook_establish(ath_power, sc); 617 if (sc->sc_powerhook == NULL) 618 printf("%s: WARNING: unable to establish power hook\n", 619 sc->sc_dev.dv_xname); 620 #endif 621 return 0; 622 bad2: 623 ath_desc_free(sc); 624 bad: 625 if (ah) 626 ath_hal_detach(ah); 627 sc->sc_invalid = 1; 628 return error; 629 } 630 631 int 632 ath_detach(struct ath_softc *sc) 633 { 634 struct ifnet *ifp = &sc->sc_ic.ic_if; 635 ath_softc_critsect_decl(s); 636 637 if ((sc->sc_flags & ATH_ATTACHED) == 0) 638 return (0); 639 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 640 641 ath_softc_critsect_begin(sc, s); 642 ath_stop(ifp); 643 #if NBPFILTER > 0 644 bpfdetach(ifp); 645 #endif 646 ath_desc_free(sc); 647 ath_hal_detach(sc->sc_ah); 648 ieee80211_ifdetach(ifp); 649 #ifdef __NetBSD__ 650 if_detach(ifp); 651 #endif /* __NetBSD__ */ 652 ath_softc_critsect_end(sc, s); 653 #ifdef __NetBSD__ 654 powerhook_disestablish(sc->sc_powerhook); 655 shutdownhook_disestablish(sc->sc_sdhook); 656 #endif /* __NetBSD__ */ 657 #ifdef __FreeBSD__ 658 659 ATH_TXBUF_LOCK_DESTROY(sc); 660 ATH_TXQ_LOCK_DESTROY(sc); 661 662 #endif /* __FreeBSD__ */ 663 return 0; 664 } 665 666 #ifdef __NetBSD__ 667 void 668 ath_power(int why, void *arg) 669 { 670 struct ath_softc *sc = arg; 671 int s; 672 673 DPRINTF(ATH_DEBUG_ANY, ("ath_power(%d)\n", why)); 674 675 s = splnet(); 676 switch (why) { 677 case PWR_SUSPEND: 678 case PWR_STANDBY: 679 ath_suspend(sc, why); 680 break; 681 case PWR_RESUME: 682 ath_resume(sc, why); 683 break; 684 case PWR_SOFTSUSPEND: 685 case PWR_SOFTSTANDBY: 686 case PWR_SOFTRESUME: 687 break; 688 } 689 splx(s); 690 } 691 #endif 692 693 void 694 ath_suspend(struct ath_softc *sc, int why) 695 { 696 struct ifnet *ifp = &sc->sc_ic.ic_if; 697 698 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 699 700 ath_stop(ifp); 701 if (sc->sc_power != NULL) 702 (*sc->sc_power)(sc, why); 703 } 704 705 void 706 ath_resume(struct ath_softc *sc, int why) 707 { 708 struct ifnet *ifp = &sc->sc_ic.ic_if; 709 710 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 711 712 if (ifp->if_flags & IFF_UP) { 713 ath_init(ifp); 714 #if 0 715 (void)ath_intr(sc); 716 #endif 717 if (sc->sc_power != NULL) 718 (*sc->sc_power)(sc, why); 719 if (ifp->if_flags & IFF_RUNNING) 720 ath_start(ifp); 721 } 722 } 723 724 #ifdef __NetBSD__ 725 void 726 ath_shutdown(void *arg) 727 { 728 struct ath_softc *sc = arg; 729 730 ath_stop(&sc->sc_ic.ic_if); 731 } 732 #else 733 void 734 ath_shutdown(struct ath_softc *sc) 735 { 736 #if 1 737 return; 738 #else 739 struct ifnet *ifp = &sc->sc_ic.ic_if; 740 741 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 742 743 ath_stop(ifp); 744 #endif 745 } 746 #endif 747 748 #ifdef __NetBSD__ 749 int 750 ath_intr(void *arg) 751 { 752 return ath_intr1((struct ath_softc *)arg); 753 } 754 #else 755 void 756 ath_intr(void *arg) 757 { 758 (void)ath_intr1((struct ath_softc *)arg); 759 } 760 #endif 761 762 static int 763 ath_intr1(struct ath_softc *sc) 764 { 765 struct ieee80211com *ic = &sc->sc_ic; 766 struct ifnet *ifp = &ic->ic_if; 767 struct ath_hal *ah = sc->sc_ah; 768 HAL_INT status; 769 770 if (sc->sc_invalid) { 771 /* 772 * The hardware is not ready/present, don't touch anything. 773 * Note this can happen early on if the IRQ is shared. 774 */ 775 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid; ignored\n", __func__)); 776 return 0; 777 } 778 if (!ath_hal_intrpend(ah)) /* shared irq, not for us */ 779 return 0; 780 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 781 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n", 782 __func__, ifp->if_flags)); 783 ath_hal_getisr(ah, &status); /* clear ISR */ 784 ath_hal_intrset(ah, 0); /* disable further intr's */ 785 return 1; /* XXX */ 786 } 787 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 788 DPRINTF(ATH_DEBUG_INTR, ("%s: status 0x%x\n", __func__, status)); 789 status &= sc->sc_imask; /* discard unasked for bits */ 790 if (status & HAL_INT_FATAL) { 791 sc->sc_stats.ast_hardware++; 792 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 793 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 794 } else if (status & HAL_INT_RXORN) { 795 sc->sc_stats.ast_rxorn++; 796 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 797 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 798 } else { 799 if (status & HAL_INT_RXEOL) { 800 /* 801 * NB: the hardware should re-read the link when 802 * RXE bit is written, but it doesn't work at 803 * least on older hardware revs. 804 */ 805 sc->sc_stats.ast_rxeol++; 806 sc->sc_rxlink = NULL; 807 } 808 if (status & HAL_INT_TXURN) { 809 sc->sc_stats.ast_txurn++; 810 /* bump tx trigger level */ 811 ath_hal_updatetxtriglevel(ah, AH_TRUE); 812 } 813 if (status & HAL_INT_RX) 814 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 815 if (status & HAL_INT_TX) 816 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 817 if (status & HAL_INT_SWBA) { 818 /* 819 * Handle beacon transmission directly; deferring 820 * this is too slow to meet timing constraints 821 * under load. 822 */ 823 ath_beacon_proc(sc, 0); 824 } 825 if (status & HAL_INT_BMISS) { 826 sc->sc_stats.ast_bmiss++; 827 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 828 } 829 } 830 return 1; 831 } 832 833 static void 834 ath_fatal_proc(void *arg, int pending) 835 { 836 struct ath_softc *sc = arg; 837 838 device_printf(sc->sc_dev, "hardware error; resetting\n"); 839 ath_reset(sc); 840 } 841 842 static void 843 ath_rxorn_proc(void *arg, int pending) 844 { 845 struct ath_softc *sc = arg; 846 847 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 848 ath_reset(sc); 849 } 850 851 static void 852 ath_bmiss_proc(void *arg, int pending) 853 { 854 struct ath_softc *sc = arg; 855 struct ieee80211com *ic = &sc->sc_ic; 856 857 DPRINTF(ATH_DEBUG_ANY, ("%s: pending %u\n", __func__, pending)); 858 if (ic->ic_opmode != IEEE80211_M_STA) 859 return; 860 if (ic->ic_state == IEEE80211_S_RUN) { 861 /* 862 * Rather than go directly to scan state, try to 863 * reassociate first. If that fails then the state 864 * machine will drop us into scanning after timing 865 * out waiting for a probe response. 866 */ 867 ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1); 868 } 869 } 870 871 static u_int 872 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 873 { 874 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 875 876 switch (mode) { 877 case IEEE80211_MODE_AUTO: 878 return 0; 879 case IEEE80211_MODE_11A: 880 return CHANNEL_A; 881 case IEEE80211_MODE_11B: 882 return CHANNEL_B; 883 case IEEE80211_MODE_11G: 884 return CHANNEL_PUREG; 885 case IEEE80211_MODE_TURBO: 886 return CHANNEL_T; 887 default: 888 panic("%s: unsupported mode %d\n", __func__, mode); 889 return 0; 890 } 891 } 892 893 #ifdef __NetBSD__ 894 static int 895 ath_init(struct ifnet *ifp) 896 { 897 return ath_init1((struct ath_softc *)ifp->if_softc); 898 } 899 #else 900 static void 901 ath_init(void *arg) 902 { 903 (void)ath_init1((struct ath_softc *)arg); 904 } 905 #endif 906 907 static int 908 ath_init1(struct ath_softc *sc) 909 { 910 struct ieee80211com *ic = &sc->sc_ic; 911 struct ifnet *ifp = &ic->ic_if; 912 struct ieee80211_node *ni; 913 enum ieee80211_phymode mode; 914 struct ath_hal *ah = sc->sc_ah; 915 HAL_STATUS status; 916 HAL_CHANNEL hchan; 917 int error = 0; 918 ath_softc_critsect_decl(s); 919 920 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n", 921 __func__, ifp->if_flags)); 922 923 #ifdef __NetBSD__ 924 if ((error = ath_enable(sc)) != 0) 925 return error; 926 #endif 927 928 ath_softc_critsect_begin(sc, s); 929 /* 930 * Stop anything previously setup. This is safe 931 * whether this is the first time through or not. 932 */ 933 ath_stop(ifp); 934 935 /* 936 * The basic interface to setting the hardware in a good 937 * state is ``reset''. On return the hardware is known to 938 * be powered up and with interrupts disabled. This must 939 * be followed by initialization of the appropriate bits 940 * and then setup of the interrupt mask. 941 */ 942 hchan.channel = ic->ic_ibss_chan->ic_freq; 943 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 944 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 945 if_printf(ifp, "unable to reset hardware; hal status %u\n", 946 status); 947 error = -1; 948 goto done; 949 } 950 951 /* 952 * Setup the hardware after reset: the key cache 953 * is filled as needed and the receive engine is 954 * set going. Frame transmit is handled entirely 955 * in the frame output path; there's nothing to do 956 * here except setup the interrupt mask. 957 */ 958 if (ic->ic_flags & IEEE80211_F_PRIVACY) 959 ath_initkeytable(sc); 960 if ((error = ath_startrecv(sc)) != 0) { 961 if_printf(ifp, "unable to start recv logic\n"); 962 goto done; 963 } 964 965 /* 966 * Enable interrupts. 967 */ 968 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 969 | HAL_INT_RXEOL | HAL_INT_RXORN 970 | HAL_INT_FATAL | HAL_INT_GLOBAL; 971 ath_hal_intrset(ah, sc->sc_imask); 972 973 ifp->if_flags |= IFF_RUNNING; 974 ic->ic_state = IEEE80211_S_INIT; 975 976 /* 977 * The hardware should be ready to go now so it's safe 978 * to kick the 802.11 state machine as it's likely to 979 * immediately call back to us to send mgmt frames. 980 */ 981 ni = ic->ic_bss; 982 ni->ni_chan = ic->ic_ibss_chan; 983 mode = ieee80211_chan2mode(ic, ni->ni_chan); 984 if (mode != sc->sc_curmode) 985 ath_setcurmode(sc, mode); 986 if (ic->ic_opmode != IEEE80211_M_MONITOR) 987 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 988 else 989 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 990 done: 991 ath_softc_critsect_end(sc, s); 992 return error; 993 } 994 995 static void 996 ath_stop(struct ifnet *ifp) 997 { 998 struct ieee80211com *ic = (struct ieee80211com *) ifp; 999 struct ath_softc *sc = ifp->if_softc; 1000 struct ath_hal *ah = sc->sc_ah; 1001 ath_softc_critsect_decl(s); 1002 1003 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid %u if_flags 0x%x\n", 1004 __func__, sc->sc_invalid, ifp->if_flags)); 1005 1006 ath_softc_critsect_begin(sc, s); 1007 if (ifp->if_flags & IFF_RUNNING) { 1008 /* 1009 * Shutdown the hardware and driver: 1010 * disable interrupts 1011 * turn off timers 1012 * clear transmit machinery 1013 * clear receive machinery 1014 * drain and release tx queues 1015 * reclaim beacon resources 1016 * reset 802.11 state machine 1017 * power down hardware 1018 * 1019 * Note that some of this work is not possible if the 1020 * hardware is gone (invalid). 1021 */ 1022 ifp->if_flags &= ~IFF_RUNNING; 1023 ifp->if_timer = 0; 1024 if (!sc->sc_invalid) 1025 ath_hal_intrset(ah, 0); 1026 ath_draintxq(sc); 1027 if (!sc->sc_invalid) 1028 ath_stoprecv(sc); 1029 else 1030 sc->sc_rxlink = NULL; 1031 #ifdef __FreeBSD__ 1032 IF_DRAIN(&ifp->if_snd); 1033 #else 1034 IF_PURGE(&ifp->if_snd); 1035 #endif 1036 ath_beacon_free(sc); 1037 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 1038 if (!sc->sc_invalid) { 1039 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 1040 } 1041 #ifdef __NetBSD__ 1042 ath_disable(sc); 1043 #endif 1044 } 1045 ath_softc_critsect_end(sc, s); 1046 } 1047 1048 /* 1049 * Reset the hardware w/o losing operational state. This is 1050 * basically a more efficient way of doing ath_stop, ath_init, 1051 * followed by state transitions to the current 802.11 1052 * operational state. Used to recover from errors rx overrun 1053 * and to reset the hardware when rf gain settings must be reset. 1054 */ 1055 static void 1056 ath_reset(struct ath_softc *sc) 1057 { 1058 struct ieee80211com *ic = &sc->sc_ic; 1059 struct ifnet *ifp = &ic->ic_if; 1060 struct ath_hal *ah = sc->sc_ah; 1061 struct ieee80211_channel *c; 1062 HAL_STATUS status; 1063 HAL_CHANNEL hchan; 1064 1065 /* 1066 * Convert to a HAL channel description with the flags 1067 * constrained to reflect the current operating mode. 1068 */ 1069 c = ic->ic_ibss_chan; 1070 hchan.channel = c->ic_freq; 1071 hchan.channelFlags = ath_chan2flags(ic, c); 1072 1073 ath_hal_intrset(ah, 0); /* disable interrupts */ 1074 ath_draintxq(sc); /* stop xmit side */ 1075 ath_stoprecv(sc); /* stop recv side */ 1076 /* NB: indicate channel change so we do a full reset */ 1077 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 1078 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 1079 __func__, status); 1080 ath_hal_intrset(ah, sc->sc_imask); 1081 if (ath_startrecv(sc) != 0) /* restart recv */ 1082 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 1083 ath_start(ifp); /* restart xmit */ 1084 if (ic->ic_state == IEEE80211_S_RUN) 1085 ath_beacon_config(sc); /* restart beacons */ 1086 } 1087 1088 static void 1089 ath_start(struct ifnet *ifp) 1090 { 1091 struct ath_softc *sc = ifp->if_softc; 1092 struct ath_hal *ah = sc->sc_ah; 1093 struct ieee80211com *ic = &sc->sc_ic; 1094 struct ieee80211_node *ni; 1095 struct ath_buf *bf; 1096 struct mbuf *m; 1097 struct ieee80211_frame *wh; 1098 ath_txbuf_critsect_decl(s); 1099 1100 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1101 return; 1102 for (;;) { 1103 /* 1104 * Grab a TX buffer and associated resources. 1105 */ 1106 ath_txbuf_critsect_begin(sc, s); 1107 bf = TAILQ_FIRST(&sc->sc_txbuf); 1108 if (bf != NULL) 1109 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 1110 ath_txbuf_critsect_end(sc, s); 1111 if (bf == NULL) { 1112 DPRINTF(ATH_DEBUG_ANY, ("%s: out of xmit buffers\n", 1113 __func__)); 1114 sc->sc_stats.ast_tx_qstop++; 1115 ifp->if_flags |= IFF_OACTIVE; 1116 break; 1117 } 1118 /* 1119 * Poll the management queue for frames; they 1120 * have priority over normal data frames. 1121 */ 1122 IF_DEQUEUE(&ic->ic_mgtq, m); 1123 if (m == NULL) { 1124 /* 1125 * No data frames go out unless we're associated. 1126 */ 1127 if (ic->ic_state != IEEE80211_S_RUN) { 1128 DPRINTF(ATH_DEBUG_ANY, 1129 ("%s: ignore data packet, state %u\n", 1130 __func__, ic->ic_state)); 1131 sc->sc_stats.ast_tx_discard++; 1132 ath_txbuf_critsect_begin(sc, s); 1133 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1134 ath_txbuf_critsect_end(sc, s); 1135 break; 1136 } 1137 IF_DEQUEUE(&ifp->if_snd, m); 1138 if (m == NULL) { 1139 ath_txbuf_critsect_begin(sc, s); 1140 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1141 ath_txbuf_critsect_end(sc, s); 1142 break; 1143 } 1144 ifp->if_opackets++; 1145 1146 #ifdef __NetBSD__ 1147 #if NBPFILTER > 0 1148 if (ifp->if_bpf) 1149 bpf_mtap(ifp->if_bpf, m); 1150 #endif 1151 #endif 1152 #ifdef __FreeBSD__ 1153 BPF_MTAP(ifp, m); 1154 #endif 1155 /* 1156 * Encapsulate the packet in prep for transmission. 1157 */ 1158 m = ieee80211_encap(ifp, m, &ni); 1159 if (m == NULL) { 1160 DPRINTF(ATH_DEBUG_ANY, 1161 ("%s: encapsulation failure\n", 1162 __func__)); 1163 sc->sc_stats.ast_tx_encap++; 1164 goto bad; 1165 } 1166 wh = mtod(m, struct ieee80211_frame *); 1167 } else { 1168 /* 1169 * Hack! The referenced node pointer is in the 1170 * rcvif field of the packet header. This is 1171 * placed there by ieee80211_mgmt_output because 1172 * we need to hold the reference with the frame 1173 * and there's no other way (other than packet 1174 * tags which we consider too expensive to use) 1175 * to pass it along. 1176 */ 1177 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1178 m->m_pkthdr.rcvif = NULL; 1179 1180 wh = mtod(m, struct ieee80211_frame *); 1181 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1182 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 1183 /* fill time stamp */ 1184 u_int64_t tsf; 1185 u_int32_t *tstamp; 1186 1187 tsf = ath_hal_gettsf64(ah); 1188 /* XXX: adjust 100us delay to xmit */ 1189 tsf += 100; 1190 tstamp = (u_int32_t *)&wh[1]; 1191 tstamp[0] = htole32(tsf & 0xffffffff); 1192 tstamp[1] = htole32(tsf >> 32); 1193 } 1194 sc->sc_stats.ast_tx_mgmt++; 1195 } 1196 1197 if (ath_tx_start(sc, ni, bf, m)) { 1198 bad: 1199 ath_txbuf_critsect_begin(sc, s); 1200 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1201 ath_txbuf_critsect_end(sc, s); 1202 ifp->if_oerrors++; 1203 if (ni && ni != ic->ic_bss) 1204 ieee80211_free_node(ic, ni); 1205 continue; 1206 } 1207 1208 sc->sc_tx_timer = 5; 1209 ifp->if_timer = 1; 1210 } 1211 } 1212 1213 static int 1214 ath_media_change(struct ifnet *ifp) 1215 { 1216 int error; 1217 1218 error = ieee80211_media_change(ifp); 1219 if (error == ENETRESET) { 1220 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1221 (IFF_RUNNING|IFF_UP)) 1222 ath_init(ifp); /* XXX lose error */ 1223 error = 0; 1224 } 1225 return error; 1226 } 1227 1228 static void 1229 ath_watchdog(struct ifnet *ifp) 1230 { 1231 struct ath_softc *sc = ifp->if_softc; 1232 struct ieee80211com *ic = &sc->sc_ic; 1233 1234 ifp->if_timer = 0; 1235 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1236 return; 1237 if (sc->sc_tx_timer) { 1238 if (--sc->sc_tx_timer == 0) { 1239 if_printf(ifp, "device timeout\n"); 1240 ath_reset(sc); 1241 ifp->if_oerrors++; 1242 sc->sc_stats.ast_watchdog++; 1243 return; 1244 } 1245 ifp->if_timer = 1; 1246 } 1247 if (ic->ic_fixed_rate == -1) { 1248 /* 1249 * Run the rate control algorithm if we're not 1250 * locked at a fixed rate. 1251 */ 1252 if (ic->ic_opmode == IEEE80211_M_STA) 1253 ath_rate_ctl(sc, ic->ic_bss); 1254 else 1255 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1256 } 1257 ieee80211_watchdog(ifp); 1258 } 1259 1260 static int 1261 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1262 { 1263 struct ath_softc *sc = ifp->if_softc; 1264 struct ifreq *ifr = (struct ifreq *)data; 1265 int error = 0; 1266 ath_softc_critsect_decl(s); 1267 1268 ath_softc_critsect_begin(sc, s); 1269 switch (cmd) { 1270 case SIOCSIFFLAGS: 1271 if (ifp->if_flags & IFF_UP) { 1272 if (ifp->if_flags & IFF_RUNNING) { 1273 /* 1274 * To avoid rescanning another access point, 1275 * do not call ath_init() here. Instead, 1276 * only reflect promisc mode settings. 1277 */ 1278 ath_mode_init(sc); 1279 } else { 1280 /* 1281 * Beware of being called during detach to 1282 * reset promiscuous mode. In that case we 1283 * will still be marked UP but not RUNNING. 1284 * However trying to re-init the interface 1285 * is the wrong thing to do as we've already 1286 * torn down much of our state. There's 1287 * probably a better way to deal with this. 1288 */ 1289 if (!sc->sc_invalid) 1290 ath_init(ifp); /* XXX lose error */ 1291 } 1292 } else 1293 ath_stop(ifp); 1294 break; 1295 case SIOCADDMULTI: 1296 case SIOCDELMULTI: 1297 #ifdef __FreeBSD__ 1298 /* 1299 * The upper layer has already installed/removed 1300 * the multicast address(es), just recalculate the 1301 * multicast filter for the card. 1302 */ 1303 if (ifp->if_flags & IFF_RUNNING) 1304 ath_mode_init(sc); 1305 #endif 1306 #ifdef __NetBSD__ 1307 error = (cmd == SIOCADDMULTI) ? 1308 ether_addmulti(ifr, &sc->sc_ic.ic_ec) : 1309 ether_delmulti(ifr, &sc->sc_ic.ic_ec); 1310 if (error == ENETRESET) { 1311 if (ifp->if_flags & IFF_RUNNING) 1312 ath_mode_init(sc); 1313 error = 0; 1314 } 1315 #endif 1316 break; 1317 case SIOCGATHSTATS: 1318 error = copyout(&sc->sc_stats, 1319 ifr->ifr_data, sizeof (sc->sc_stats)); 1320 break; 1321 case SIOCGATHDIAG: { 1322 #if 0 /* XXX punt */ 1323 struct ath_diag *ad = (struct ath_diag *)data; 1324 struct ath_hal *ah = sc->sc_ah; 1325 void *data; 1326 u_int size; 1327 1328 if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) { 1329 if (size < ad->ad_size) 1330 ad->ad_size = size; 1331 if (data) 1332 error = copyout(data, ad->ad_data, ad->ad_size); 1333 } else 1334 error = EINVAL; 1335 #else 1336 error = EINVAL; 1337 #endif 1338 break; 1339 } 1340 default: 1341 error = ieee80211_ioctl(ifp, cmd, data); 1342 if (error == ENETRESET) { 1343 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1344 (IFF_RUNNING|IFF_UP)) 1345 ath_init(ifp); /* XXX lose error */ 1346 error = 0; 1347 } 1348 break; 1349 } 1350 ath_softc_critsect_end(sc, s); 1351 return error; 1352 } 1353 1354 /* 1355 * Fill the hardware key cache with key entries. 1356 */ 1357 static void 1358 ath_initkeytable(struct ath_softc *sc) 1359 { 1360 struct ieee80211com *ic = &sc->sc_ic; 1361 struct ath_hal *ah = sc->sc_ah; 1362 int i; 1363 1364 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1365 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1366 if (k->wk_len == 0) 1367 ath_hal_keyreset(ah, i); 1368 else 1369 /* XXX return value */ 1370 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 1371 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 1372 } 1373 } 1374 1375 static void 1376 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1377 { 1378 u_int32_t val; 1379 u_int8_t pos; 1380 1381 val = LE_READ_4(dl + 0); 1382 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1383 val = LE_READ_4(dl + 3); 1384 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1385 pos &= 0x3f; 1386 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1387 } 1388 1389 #ifdef __FreeBSD__ 1390 static void 1391 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1392 { 1393 struct ieee80211com *ic = &sc->sc_ic; 1394 struct ifnet *ifp = &ic->ic_if; 1395 struct ifmultiaddr *ifma; 1396 1397 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1398 caddr_t dl; 1399 1400 /* calculate XOR of eight 6bit values */ 1401 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1402 ath_mcastfilter_accum(dl, &mfilt); 1403 } 1404 } 1405 #else 1406 static void 1407 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1408 { 1409 struct ifnet *ifp = &sc->sc_ic.ic_if; 1410 struct ether_multi *enm; 1411 struct ether_multistep estep; 1412 1413 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1414 while (enm != NULL) { 1415 /* XXX Punt on ranges. */ 1416 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1417 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1418 ifp->if_flags |= IFF_ALLMULTI; 1419 return; 1420 } 1421 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1422 ETHER_NEXT_MULTI(estep, enm); 1423 } 1424 ifp->if_flags &= ~IFF_ALLMULTI; 1425 } 1426 #endif 1427 1428 /* 1429 * Calculate the receive filter according to the 1430 * operating mode and state: 1431 * 1432 * o always accept unicast, broadcast, and multicast traffic 1433 * o maintain current state of phy error reception 1434 * o probe request frames are accepted only when operating in 1435 * hostap, adhoc, or monitor modes 1436 * o enable promiscuous mode according to the interface state 1437 * o accept beacons: 1438 * - when operating in adhoc mode so the 802.11 layer creates 1439 * node table entries for peers, 1440 * - when operating in station mode for collecting rssi data when 1441 * the station is otherwise quiet, or 1442 * - when scanning 1443 */ 1444 static u_int32_t 1445 ath_calcrxfilter(struct ath_softc *sc) 1446 { 1447 struct ieee80211com *ic = &sc->sc_ic; 1448 struct ath_hal *ah = sc->sc_ah; 1449 struct ifnet *ifp = &ic->ic_if; 1450 u_int32_t rfilt; 1451 1452 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1453 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1454 if (ic->ic_opmode != IEEE80211_M_STA) 1455 rfilt |= HAL_RX_FILTER_PROBEREQ; 1456 if (ic->ic_opmode != IEEE80211_M_AHDEMO) 1457 rfilt |= HAL_RX_FILTER_BEACON; 1458 if (ifp->if_flags & IFF_PROMISC) 1459 rfilt |= HAL_RX_FILTER_PROM; 1460 return rfilt; 1461 } 1462 1463 static void 1464 ath_mode_init(struct ath_softc *sc) 1465 { 1466 #ifdef __FreeBSD__ 1467 struct ieee80211com *ic = &sc->sc_ic; 1468 #endif 1469 struct ath_hal *ah = sc->sc_ah; 1470 u_int32_t rfilt, mfilt[2]; 1471 1472 /* configure rx filter */ 1473 rfilt = ath_calcrxfilter(sc); 1474 ath_hal_setrxfilter(ah, rfilt); 1475 1476 /* configure operational mode */ 1477 ath_hal_setopmode(ah); 1478 1479 /* calculate and install multicast filter */ 1480 #ifdef __FreeBSD__ 1481 if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) { 1482 mfilt[0] = mfilt[1] = 0; 1483 ath_mcastfilter_compute(sc, &mfilt); 1484 } else { 1485 mfilt[0] = mfilt[1] = ~0; 1486 } 1487 #endif 1488 #ifdef __NetBSD__ 1489 mfilt[0] = mfilt[1] = 0; 1490 ath_mcastfilter_compute(sc, &mfilt); 1491 #endif 1492 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1493 DPRINTF(ATH_DEBUG_MODE, ("%s: RX filter 0x%x, MC filter %08x:%08x\n", 1494 __func__, rfilt, mfilt[0], mfilt[1])); 1495 } 1496 1497 #ifdef __FreeBSD__ 1498 static void 1499 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1500 { 1501 struct ath_buf *bf = arg; 1502 1503 KASSERT(nseg <= ATH_MAX_SCATTER, 1504 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1505 bf->bf_mapsize = mapsize; 1506 bf->bf_nseg = nseg; 1507 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1508 } 1509 #endif /* __FreeBSD__ */ 1510 1511 static struct mbuf * 1512 ath_getmbuf(int flags, int type, u_int pktlen) 1513 { 1514 struct mbuf *m; 1515 1516 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1517 #ifdef __FreeBSD__ 1518 if (pktlen <= MHLEN) 1519 MGETHDR(m, flags, type); 1520 else 1521 m = m_getcl(flags, type, M_PKTHDR); 1522 #else 1523 MGETHDR(m, flags, type); 1524 if (m != NULL && pktlen > MHLEN) 1525 MCLGET(m, flags); 1526 #endif 1527 return m; 1528 } 1529 1530 static int 1531 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1532 { 1533 struct ieee80211com *ic = &sc->sc_ic; 1534 struct ifnet *ifp = &ic->ic_if; 1535 struct ath_hal *ah = sc->sc_ah; 1536 struct ieee80211_frame *wh; 1537 struct ath_buf *bf; 1538 struct ath_desc *ds; 1539 struct mbuf *m; 1540 int error, pktlen; 1541 u_int8_t *frm, rate; 1542 u_int16_t capinfo; 1543 struct ieee80211_rateset *rs; 1544 const HAL_RATE_TABLE *rt; 1545 1546 bf = sc->sc_bcbuf; 1547 if (bf->bf_m != NULL) { 1548 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1549 m_freem(bf->bf_m); 1550 bf->bf_m = NULL; 1551 bf->bf_node = NULL; 1552 } 1553 /* 1554 * NB: the beacon data buffer must be 32-bit aligned; 1555 * we assume the mbuf routines will return us something 1556 * with this alignment (perhaps should assert). 1557 */ 1558 rs = &ni->ni_rates; 1559 pktlen = sizeof (struct ieee80211_frame) 1560 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6; 1561 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1562 pktlen += 2; 1563 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1564 if (m == NULL) { 1565 DPRINTF(ATH_DEBUG_BEACON, 1566 ("%s: cannot get mbuf/cluster; size %u\n", 1567 __func__, pktlen)); 1568 sc->sc_stats.ast_be_nombuf++; 1569 return ENOMEM; 1570 } 1571 1572 wh = mtod(m, struct ieee80211_frame *); 1573 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1574 IEEE80211_FC0_SUBTYPE_BEACON; 1575 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1576 *(u_int16_t *)wh->i_dur = 0; 1577 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1578 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1579 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1580 *(u_int16_t *)wh->i_seq = 0; 1581 1582 /* 1583 * beacon frame format 1584 * [8] time stamp 1585 * [2] beacon interval 1586 * [2] cabability information 1587 * [tlv] ssid 1588 * [tlv] supported rates 1589 * [tlv] parameter set (IBSS) 1590 * [tlv] extended supported rates 1591 */ 1592 frm = (u_int8_t *)&wh[1]; 1593 memset(frm, 0, 8); /* timestamp is set by hardware */ 1594 frm += 8; 1595 *(u_int16_t *)frm = htole16(ni->ni_intval); 1596 frm += 2; 1597 if (ic->ic_opmode == IEEE80211_M_IBSS) 1598 capinfo = IEEE80211_CAPINFO_IBSS; 1599 else 1600 capinfo = IEEE80211_CAPINFO_ESS; 1601 if (ic->ic_flags & IEEE80211_F_PRIVACY) 1602 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1603 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1604 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 1605 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1606 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1607 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1608 *(u_int16_t *)frm = htole16(capinfo); 1609 frm += 2; 1610 *frm++ = IEEE80211_ELEMID_SSID; 1611 *frm++ = ni->ni_esslen; 1612 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1613 frm += ni->ni_esslen; 1614 frm = ieee80211_add_rates(frm, rs); 1615 *frm++ = IEEE80211_ELEMID_DSPARMS; 1616 *frm++ = 1; 1617 *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan); 1618 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1619 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1620 *frm++ = 2; 1621 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1622 } else { 1623 /* TODO: TIM */ 1624 *frm++ = IEEE80211_ELEMID_TIM; 1625 *frm++ = 4; /* length */ 1626 *frm++ = 0; /* DTIM count */ 1627 *frm++ = 1; /* DTIM period */ 1628 *frm++ = 0; /* bitmap control */ 1629 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1630 } 1631 frm = ieee80211_add_xrates(frm, rs); 1632 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1633 KASSERT(m->m_pkthdr.len <= pktlen, 1634 ("beacon bigger than expected, len %u calculated %u", 1635 m->m_pkthdr.len, pktlen)); 1636 1637 DPRINTF(ATH_DEBUG_BEACON, ("%s: m %p len %u\n", __func__, m, m->m_len)); 1638 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1639 if (error != 0) { 1640 m_freem(m); 1641 return error; 1642 } 1643 KASSERT(bf->bf_nseg == 1, 1644 ("%s: multi-segment packet; nseg %u", __func__, bf->bf_nseg)); 1645 bf->bf_m = m; 1646 1647 /* setup descriptors */ 1648 ds = bf->bf_desc; 1649 1650 ds->ds_link = 0; 1651 ds->ds_data = bf->bf_segs[0].ds_addr; 1652 1653 DPRINTF(ATH_DEBUG_ANY, ("%s: segaddr %p seglen %u\n", __func__, 1654 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1655 1656 /* 1657 * Calculate rate code. 1658 * XXX everything at min xmit rate 1659 */ 1660 rt = sc->sc_currates; 1661 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1662 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1663 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1664 else 1665 rate = rt->info[0].rateCode; 1666 if (!ath_hal_setuptxdesc(ah, ds 1667 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1668 , sizeof(struct ieee80211_frame) /* header length */ 1669 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1670 , 0x20 /* txpower XXX */ 1671 , rate, 1 /* series 0 rate/tries */ 1672 , HAL_TXKEYIX_INVALID /* no encryption */ 1673 , 0 /* antenna mode */ 1674 , HAL_TXDESC_NOACK /* no ack for beacons */ 1675 , 0 /* rts/cts rate */ 1676 , 0 /* rts/cts duration */ 1677 )) { 1678 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1679 return -1; 1680 } 1681 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1682 /* XXX verify mbuf data area covers this roundup */ 1683 if (!ath_hal_filltxdesc(ah, ds 1684 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1685 , AH_TRUE /* first segment */ 1686 , AH_TRUE /* last segment */ 1687 )) { 1688 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1689 return -1; 1690 } 1691 1692 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1693 1694 return 0; 1695 } 1696 1697 static void 1698 ath_beacon_proc(void *arg, int pending) 1699 { 1700 struct ath_softc *sc = arg; 1701 struct ieee80211com *ic = &sc->sc_ic; 1702 struct ath_buf *bf = sc->sc_bcbuf; 1703 struct ath_hal *ah = sc->sc_ah; 1704 1705 DPRINTF(ATH_DEBUG_BEACON_PROC, ("%s: pending %u\n", __func__, pending)); 1706 if (ic->ic_opmode == IEEE80211_M_STA || 1707 bf == NULL || bf->bf_m == NULL) { 1708 DPRINTF(ATH_DEBUG_ANY, ("%s: ic_flags=%x bf=%p bf_m=%p\n", 1709 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1710 return; 1711 } 1712 /* TODO: update beacon to reflect PS poll state */ 1713 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1714 DPRINTF(ATH_DEBUG_ANY, ("%s: beacon queue %u did not stop?\n", 1715 __func__, sc->sc_bhalq)); 1716 /* NB: the HAL still stops DMA, so proceed */ 1717 } 1718 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1719 1720 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1721 ath_hal_txstart(ah, sc->sc_bhalq); 1722 DPRINTF(ATH_DEBUG_BEACON_PROC, 1723 ("%s: TXDP%u = %p (%p)\n", __func__, 1724 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1725 } 1726 1727 static void 1728 ath_beacon_free(struct ath_softc *sc) 1729 { 1730 struct ath_buf *bf = sc->sc_bcbuf; 1731 1732 if (bf->bf_m != NULL) { 1733 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1734 m_freem(bf->bf_m); 1735 bf->bf_m = NULL; 1736 bf->bf_node = NULL; 1737 } 1738 } 1739 1740 /* 1741 * Configure the beacon and sleep timers. 1742 * 1743 * When operating as an AP this resets the TSF and sets 1744 * up the hardware to notify us when we need to issue beacons. 1745 * 1746 * When operating in station mode this sets up the beacon 1747 * timers according to the timestamp of the last received 1748 * beacon and the current TSF, configures PCF and DTIM 1749 * handling, programs the sleep registers so the hardware 1750 * will wakeup in time to receive beacons, and configures 1751 * the beacon miss handling so we'll receive a BMISS 1752 * interrupt when we stop seeing beacons from the AP 1753 * we've associated with. 1754 */ 1755 static void 1756 ath_beacon_config(struct ath_softc *sc) 1757 { 1758 struct ath_hal *ah = sc->sc_ah; 1759 struct ieee80211com *ic = &sc->sc_ic; 1760 struct ieee80211_node *ni = ic->ic_bss; 1761 u_int32_t nexttbtt, intval; 1762 1763 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1764 (LE_READ_4(ni->ni_tstamp) >> 10); 1765 DPRINTF(ATH_DEBUG_BEACON, ("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1766 nexttbtt += ni->ni_intval; 1767 intval = ni->ni_intval & HAL_BEACON_PERIOD; 1768 if (ic->ic_opmode == IEEE80211_M_STA) { 1769 HAL_BEACON_STATE bs; 1770 u_int32_t bmisstime; 1771 1772 /* NB: no PCF support right now */ 1773 memset(&bs, 0, sizeof(bs)); 1774 /* 1775 * Reset our tsf so the hardware will update the 1776 * tsf register to reflect timestamps found in 1777 * received beacons. 1778 */ 1779 bs.bs_intval = intval | HAL_BEACON_RESET_TSF; 1780 bs.bs_nexttbtt = nexttbtt; 1781 bs.bs_dtimperiod = bs.bs_intval; 1782 bs.bs_nextdtim = nexttbtt; 1783 /* 1784 * Calculate the number of consecutive beacons to miss 1785 * before taking a BMISS interrupt. The configuration 1786 * is specified in ms, so we need to convert that to 1787 * TU's and then calculate based on the beacon interval. 1788 * Note that we clamp the result to at most 10 beacons. 1789 */ 1790 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1791 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1792 if (bs.bs_bmissthreshold > 10) 1793 bs.bs_bmissthreshold = 10; 1794 else if (bs.bs_bmissthreshold <= 0) 1795 bs.bs_bmissthreshold = 1; 1796 1797 /* 1798 * Calculate sleep duration. The configuration is 1799 * given in ms. We insure a multiple of the beacon 1800 * period is used. Also, if the sleep duration is 1801 * greater than the DTIM period then it makes senses 1802 * to make it a multiple of that. 1803 * 1804 * XXX fixed at 100ms 1805 */ 1806 bs.bs_sleepduration = 1807 roundup((100 * 1000) / 1024, bs.bs_intval); 1808 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1809 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1810 1811 DPRINTF(ATH_DEBUG_BEACON, 1812 ("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1813 , __func__ 1814 , bs.bs_intval 1815 , bs.bs_nexttbtt 1816 , bs.bs_dtimperiod 1817 , bs.bs_nextdtim 1818 , bs.bs_bmissthreshold 1819 , bs.bs_sleepduration 1820 )); 1821 ath_hal_intrset(ah, 0); 1822 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1823 sc->sc_imask |= HAL_INT_BMISS; 1824 ath_hal_intrset(ah, sc->sc_imask); 1825 } else { 1826 DPRINTF(ATH_DEBUG_BEACON, ("%s: intval %u nexttbtt %u\n", 1827 __func__, ni->ni_intval, nexttbtt)); 1828 ath_hal_intrset(ah, 0); 1829 ath_hal_beaconinit(ah, nexttbtt, ni->ni_intval); 1830 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1831 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1832 ath_hal_intrset(ah, sc->sc_imask); 1833 } 1834 } 1835 1836 #ifdef __FreeBSD__ 1837 static void 1838 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1839 { 1840 bus_addr_t *paddr = (bus_addr_t*) arg; 1841 *paddr = segs->ds_addr; 1842 } 1843 #endif 1844 1845 #ifdef __FreeBSD__ 1846 static int 1847 ath_desc_alloc(struct ath_softc *sc) 1848 { 1849 int i, bsize, error; 1850 struct ath_desc *ds; 1851 struct ath_buf *bf; 1852 1853 /* allocate descriptors */ 1854 sc->sc_desc_len = sizeof(struct ath_desc) * 1855 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1856 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1857 if (error != 0) 1858 return error; 1859 1860 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1861 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1862 1863 if (error != 0) 1864 goto fail0; 1865 1866 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1867 sc->sc_desc, sc->sc_desc_len, 1868 ath_load_cb, &sc->sc_desc_paddr, 1869 BUS_DMA_NOWAIT); 1870 if (error != 0) 1871 goto fail1; 1872 1873 ds = sc->sc_desc; 1874 DPRINTF(ATH_DEBUG_ANY, ("%s: DMA map: %p (%lu) -> %p (%lu)\n", 1875 __func__, ds, (u_long) sc->sc_desc_len, (caddr_t) sc->sc_desc_paddr, 1876 /*XXX*/ (u_long) sc->sc_desc_len)); 1877 1878 /* allocate buffers */ 1879 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1880 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1881 if (bf == NULL) { 1882 printf("%s: unable to allocate Tx/Rx buffers\n", 1883 sc->sc_dev.dv_xname); 1884 error = -1; 1885 goto fail2; 1886 } 1887 sc->sc_bufptr = bf; 1888 1889 TAILQ_INIT(&sc->sc_rxbuf); 1890 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1891 bf->bf_desc = ds; 1892 bf->bf_daddr = sc->sc_desc_paddr + 1893 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1894 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1895 &bf->bf_dmamap); 1896 if (error != 0) 1897 break; 1898 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1899 } 1900 1901 TAILQ_INIT(&sc->sc_txbuf); 1902 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1903 bf->bf_desc = ds; 1904 bf->bf_daddr = sc->sc_desc_paddr + 1905 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1906 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1907 &bf->bf_dmamap); 1908 if (error != 0) 1909 break; 1910 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1911 } 1912 TAILQ_INIT(&sc->sc_txq); 1913 1914 /* beacon buffer */ 1915 bf->bf_desc = ds; 1916 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1917 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1918 if (error != 0) 1919 return error; 1920 sc->sc_bcbuf = bf; 1921 return 0; 1922 1923 fail2: 1924 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1925 fail1: 1926 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1927 fail0: 1928 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1929 sc->sc_ddmamap = NULL; 1930 return error; 1931 } 1932 #else 1933 static int 1934 ath_desc_alloc(struct ath_softc *sc) 1935 { 1936 int i, bsize, error = -1; 1937 struct ath_desc *ds; 1938 struct ath_buf *bf; 1939 1940 /* allocate descriptors */ 1941 sc->sc_desc_len = sizeof(struct ath_desc) * 1942 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1943 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1944 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1945 printf("%s: unable to allocate control data, error = %d\n", 1946 sc->sc_dev.dv_xname, error); 1947 goto fail0; 1948 } 1949 1950 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1951 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1952 printf("%s: unable to map control data, error = %d\n", 1953 sc->sc_dev.dv_xname, error); 1954 goto fail1; 1955 } 1956 1957 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1958 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 1959 printf("%s: unable to create control data DMA map, " 1960 "error = %d\n", sc->sc_dev.dv_xname, error); 1961 goto fail2; 1962 } 1963 1964 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 1965 sc->sc_desc_len, NULL, 0)) != 0) { 1966 printf("%s: unable to load control data DMA map, error = %d\n", 1967 sc->sc_dev.dv_xname, error); 1968 goto fail3; 1969 } 1970 1971 ds = sc->sc_desc; 1972 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 1973 1974 DPRINTF(ATH_DEBUG_XMIT_DESC|ATH_DEBUG_RECV_DESC, 1975 ("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 1976 ds, (u_long)sc->sc_desc_len, 1977 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1978 1979 /* allocate buffers */ 1980 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1981 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1982 if (bf == NULL) { 1983 printf("%s: unable to allocate Tx/Rx buffers\n", 1984 sc->sc_dev.dv_xname); 1985 error = ENOMEM; 1986 goto fail3; 1987 } 1988 sc->sc_bufptr = bf; 1989 1990 TAILQ_INIT(&sc->sc_rxbuf); 1991 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1992 bf->bf_desc = ds; 1993 bf->bf_daddr = sc->sc_desc_paddr + 1994 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1995 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 1996 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1997 printf("%s: unable to create Rx dmamap, error = %d\n", 1998 sc->sc_dev.dv_xname, error); 1999 goto fail4; 2000 } 2001 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2002 } 2003 2004 TAILQ_INIT(&sc->sc_txbuf); 2005 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 2006 bf->bf_desc = ds; 2007 bf->bf_daddr = sc->sc_desc_paddr + 2008 ((caddr_t)ds - (caddr_t)sc->sc_desc); 2009 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 2010 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 2011 printf("%s: unable to create Tx dmamap, error = %d\n", 2012 sc->sc_dev.dv_xname, error); 2013 goto fail5; 2014 } 2015 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2016 } 2017 TAILQ_INIT(&sc->sc_txq); 2018 2019 /* beacon buffer */ 2020 bf->bf_desc = ds; 2021 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 2022 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 2023 &bf->bf_dmamap)) != 0) { 2024 printf("%s: unable to create beacon dmamap, error = %d\n", 2025 sc->sc_dev.dv_xname, error); 2026 goto fail5; 2027 } 2028 sc->sc_bcbuf = bf; 2029 return 0; 2030 2031 fail5: 2032 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 2033 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2034 continue; 2035 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2036 } 2037 fail4: 2038 for (i = 0; i < ATH_RXBUF; i++) { 2039 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2040 continue; 2041 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2042 } 2043 fail3: 2044 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2045 fail2: 2046 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2047 sc->sc_ddmamap = NULL; 2048 fail1: 2049 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 2050 fail0: 2051 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2052 return error; 2053 } 2054 #endif 2055 2056 static void 2057 ath_desc_free(struct ath_softc *sc) 2058 { 2059 struct ath_buf *bf; 2060 2061 #ifdef __FreeBSD__ 2062 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2063 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 2064 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2065 #else 2066 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2067 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2068 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2069 #endif 2070 2071 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2072 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2073 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2074 m_freem(bf->bf_m); 2075 } 2076 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 2077 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2078 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2079 if (bf->bf_m) { 2080 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2081 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2082 m_freem(bf->bf_m); 2083 bf->bf_m = NULL; 2084 } 2085 } 2086 if (sc->sc_bcbuf != NULL) { 2087 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2088 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2089 sc->sc_bcbuf = NULL; 2090 } 2091 2092 TAILQ_INIT(&sc->sc_rxbuf); 2093 TAILQ_INIT(&sc->sc_txbuf); 2094 TAILQ_INIT(&sc->sc_txq); 2095 free(sc->sc_bufptr, M_DEVBUF); 2096 sc->sc_bufptr = NULL; 2097 } 2098 2099 static struct ieee80211_node * 2100 ath_node_alloc(struct ieee80211com *ic) 2101 { 2102 struct ath_node *an = 2103 malloc(sizeof(struct ath_node), M_80211_NODE, M_NOWAIT|M_ZERO); 2104 if (an) { 2105 int i; 2106 for (i = 0; i < ATH_RHIST_SIZE; i++) 2107 an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME; 2108 an->an_rx_hist_next = ATH_RHIST_SIZE-1; 2109 return &an->an_node; 2110 } else 2111 return NULL; 2112 } 2113 2114 static void 2115 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 2116 { 2117 struct ath_softc *sc = ic->ic_if.if_softc; 2118 struct ath_buf *bf; 2119 2120 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2121 if (bf->bf_node == ni) 2122 bf->bf_node = NULL; 2123 } 2124 (*sc->sc_node_free)(ic, ni); 2125 } 2126 2127 static void 2128 ath_node_copy(struct ieee80211com *ic, 2129 struct ieee80211_node *dst, const struct ieee80211_node *src) 2130 { 2131 struct ath_softc *sc = ic->ic_if.if_softc; 2132 2133 memcpy(&dst[1], &src[1], 2134 sizeof(struct ath_node) - sizeof(struct ieee80211_node)); 2135 (*sc->sc_node_copy)(ic, dst, src); 2136 } 2137 2138 static u_int8_t 2139 ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni) 2140 { 2141 struct ath_node *an = ATH_NODE(ni); 2142 int i, now, nsamples, rssi; 2143 2144 /* 2145 * Calculate the average over the last second of sampled data. 2146 */ 2147 now = ATH_TICKS(); 2148 nsamples = 0; 2149 rssi = 0; 2150 i = an->an_rx_hist_next; 2151 do { 2152 struct ath_recv_hist *rh = &an->an_rx_hist[i]; 2153 if (rh->arh_ticks == ATH_RHIST_NOTIME) 2154 goto done; 2155 if (now - rh->arh_ticks > hz) 2156 goto done; 2157 rssi += rh->arh_rssi; 2158 nsamples++; 2159 if (i == 0) 2160 i = ATH_RHIST_SIZE-1; 2161 else 2162 i--; 2163 } while (i != an->an_rx_hist_next); 2164 done: 2165 /* 2166 * Return either the average or the last known 2167 * value if there is no recent data. 2168 */ 2169 return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi); 2170 } 2171 2172 static int 2173 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 2174 { 2175 struct ath_hal *ah = sc->sc_ah; 2176 int error; 2177 struct mbuf *m; 2178 struct ath_desc *ds; 2179 2180 m = bf->bf_m; 2181 if (m == NULL) { 2182 /* 2183 * NB: by assigning a page to the rx dma buffer we 2184 * implicitly satisfy the Atheros requirement that 2185 * this buffer be cache-line-aligned and sized to be 2186 * multiple of the cache line size. Not doing this 2187 * causes weird stuff to happen (for the 5210 at least). 2188 */ 2189 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 2190 if (m == NULL) { 2191 DPRINTF(ATH_DEBUG_ANY, 2192 ("%s: no mbuf/cluster\n", __func__)); 2193 sc->sc_stats.ast_rx_nombuf++; 2194 return ENOMEM; 2195 } 2196 bf->bf_m = m; 2197 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 2198 2199 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 2200 BUS_DMA_NOWAIT); 2201 if (error != 0) { 2202 DPRINTF(ATH_DEBUG_ANY, 2203 ("%s: ath_buf_dmamap_load_mbuf failed;" 2204 " error %d\n", __func__, error)); 2205 sc->sc_stats.ast_rx_busdma++; 2206 return error; 2207 } 2208 KASSERT(bf->bf_nseg == 1, 2209 ("ath_rxbuf_init: multi-segment packet; nseg %u", 2210 bf->bf_nseg)); 2211 } 2212 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 2213 2214 /* 2215 * Setup descriptors. For receive we always terminate 2216 * the descriptor list with a self-linked entry so we'll 2217 * not get overrun under high load (as can happen with a 2218 * 5212 when ANI processing enables PHY errors). 2219 * 2220 * To insure the last descriptor is self-linked we create 2221 * each descriptor as self-linked and add it to the end. As 2222 * each additional descriptor is added the previous self-linked 2223 * entry is ``fixed'' naturally. This should be safe even 2224 * if DMA is happening. When processing RX interrupts we 2225 * never remove/process the last, self-linked, entry on the 2226 * descriptor list. This insures the hardware always has 2227 * someplace to write a new frame. 2228 */ 2229 ds = bf->bf_desc; 2230 ds->ds_link = bf->bf_daddr; /* link to self */ 2231 ds->ds_data = bf->bf_segs[0].ds_addr; 2232 ath_hal_setuprxdesc(ah, ds 2233 , m->m_len /* buffer size */ 2234 , 0 2235 ); 2236 2237 if (sc->sc_rxlink != NULL) 2238 *sc->sc_rxlink = bf->bf_daddr; 2239 sc->sc_rxlink = &ds->ds_link; 2240 return 0; 2241 } 2242 2243 static void 2244 ath_rx_proc(void *arg, int npending) 2245 { 2246 #define PA2DESC(_sc, _pa) \ 2247 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2248 ((_pa) - (_sc)->sc_desc_paddr))) 2249 struct ath_softc *sc = arg; 2250 struct ath_buf *bf; 2251 struct ieee80211com *ic = &sc->sc_ic; 2252 struct ifnet *ifp = &ic->ic_if; 2253 struct ath_hal *ah = sc->sc_ah; 2254 struct ath_desc *ds; 2255 struct mbuf *m; 2256 struct ieee80211_frame *wh, whbuf; 2257 struct ieee80211_node *ni; 2258 struct ath_node *an; 2259 struct ath_recv_hist *rh; 2260 int len; 2261 u_int phyerr; 2262 HAL_STATUS status; 2263 2264 DPRINTF(ATH_DEBUG_RX_PROC, ("%s: pending %u\n", __func__, npending)); 2265 do { 2266 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2267 if (bf == NULL) { /* NB: shouldn't happen */ 2268 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 2269 break; 2270 } 2271 ds = bf->bf_desc; 2272 if (ds->ds_link == bf->bf_daddr) { 2273 /* NB: never process the self-linked entry at the end */ 2274 break; 2275 } 2276 m = bf->bf_m; 2277 if (m == NULL) { /* NB: shouldn't happen */ 2278 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 2279 continue; 2280 } 2281 /* XXX sync descriptor memory */ 2282 /* 2283 * Must provide the virtual address of the current 2284 * descriptor, the physical address, and the virtual 2285 * address of the next descriptor in the h/w chain. 2286 * This allows the HAL to look ahead to see if the 2287 * hardware is done with a descriptor by checking the 2288 * done bit in the following descriptor and the address 2289 * of the current descriptor the DMA engine is working 2290 * on. All this is necessary because of our use of 2291 * a self-linked list to avoid rx overruns. 2292 */ 2293 status = ath_hal_rxprocdesc(ah, ds, 2294 bf->bf_daddr, PA2DESC(sc, ds->ds_link)); 2295 #ifdef AR_DEBUG 2296 if (ath_debug & ATH_DEBUG_RECV_DESC) 2297 ath_printrxbuf(bf, status == HAL_OK); 2298 #endif 2299 if (status == HAL_EINPROGRESS) 2300 break; 2301 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 2302 if (ds->ds_rxstat.rs_status != 0) { 2303 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 2304 sc->sc_stats.ast_rx_crcerr++; 2305 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 2306 sc->sc_stats.ast_rx_fifoerr++; 2307 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 2308 sc->sc_stats.ast_rx_badcrypt++; 2309 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 2310 sc->sc_stats.ast_rx_phyerr++; 2311 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 2312 sc->sc_stats.ast_rx_phy[phyerr]++; 2313 } else { 2314 /* 2315 * NB: don't count PHY errors as input errors; 2316 * we enable them on the 5212 to collect info 2317 * about environmental noise and, in that 2318 * setting, they don't really reflect tx/rx 2319 * errors. 2320 */ 2321 ifp->if_ierrors++; 2322 } 2323 goto rx_next; 2324 } 2325 2326 len = ds->ds_rxstat.rs_datalen; 2327 if (len < IEEE80211_MIN_LEN) { 2328 DPRINTF(ATH_DEBUG_RECV, ("%s: short packet %d\n", 2329 __func__, len)); 2330 sc->sc_stats.ast_rx_tooshort++; 2331 goto rx_next; 2332 } 2333 2334 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 2335 2336 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2337 bf->bf_m = NULL; 2338 m->m_pkthdr.rcvif = ifp; 2339 m->m_pkthdr.len = m->m_len = len; 2340 2341 #if NBPFILTER > 0 2342 if (sc->sc_drvbpf) { 2343 sc->sc_rx_th.wr_rate = 2344 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2345 sc->sc_rx_th.wr_antsignal = ds->ds_rxstat.rs_rssi; 2346 sc->sc_rx_th.wr_antenna = ds->ds_rxstat.rs_antenna; 2347 /* XXX TSF */ 2348 bpf_mtap2(sc->sc_drvbpf, 2349 &sc->sc_rx_th, sc->sc_rx_th_len, m); 2350 } 2351 #endif 2352 2353 m_adj(m, -IEEE80211_CRC_LEN); 2354 wh = mtod(m, struct ieee80211_frame *); 2355 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2356 /* 2357 * WEP is decrypted by hardware. Clear WEP bit 2358 * and trim WEP header for ieee80211_input(). 2359 */ 2360 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2361 memcpy(&whbuf, wh, sizeof(whbuf)); 2362 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2363 wh = mtod(m, struct ieee80211_frame *); 2364 memcpy(wh, &whbuf, sizeof(whbuf)); 2365 /* 2366 * Also trim WEP ICV from the tail. 2367 */ 2368 m_adj(m, -IEEE80211_WEP_CRCLEN); 2369 /* 2370 * The header has probably moved. 2371 */ 2372 wh = mtod(m, struct ieee80211_frame *); 2373 } 2374 2375 /* 2376 * Locate the node for sender, track state, and 2377 * then pass this node (referenced) up to the 802.11 2378 * layer for its use. We are required to pass 2379 * something so we fall back to ic_bss when this frame 2380 * is from an unknown sender. 2381 */ 2382 ni = ieee80211_find_rxnode(ic, wh); 2383 2384 /* 2385 * Record driver-specific state. 2386 */ 2387 an = ATH_NODE(ni); 2388 if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE) 2389 an->an_rx_hist_next = 0; 2390 rh = &an->an_rx_hist[an->an_rx_hist_next]; 2391 rh->arh_ticks = ATH_TICKS(); 2392 rh->arh_rssi = ds->ds_rxstat.rs_rssi; 2393 rh->arh_antenna = ds->ds_rxstat.rs_antenna; 2394 2395 /* 2396 * Send frame up for processing. 2397 */ 2398 ieee80211_input(ifp, m, ni, 2399 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2400 2401 /* 2402 * The frame may have caused the node to be marked for 2403 * reclamation (e.g. in response to a DEAUTH message) 2404 * so use free_node here instead of unref_node. 2405 */ 2406 if (ni == ic->ic_bss) 2407 ieee80211_unref_node(&ni); 2408 else 2409 ieee80211_free_node(ic, ni); 2410 rx_next: 2411 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2412 } while (ath_rxbuf_init(sc, bf) == 0); 2413 2414 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2415 ath_hal_rxena(ah); /* in case of RXEOL */ 2416 2417 #ifdef __NetBSD__ 2418 if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd)) 2419 ath_start(ifp); 2420 #endif /* __NetBSD__ */ 2421 #undef PA2DESC 2422 } 2423 2424 /* 2425 * XXX Size of an ACK control frame in bytes. 2426 */ 2427 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2428 2429 static int 2430 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2431 struct mbuf *m0) 2432 { 2433 struct ieee80211com *ic = &sc->sc_ic; 2434 struct ath_hal *ah = sc->sc_ah; 2435 struct ifnet *ifp = &sc->sc_ic.ic_if; 2436 int i, error, iswep, hdrlen, pktlen; 2437 u_int8_t rix, cix, txrate, ctsrate; 2438 struct ath_desc *ds; 2439 struct mbuf *m; 2440 struct ieee80211_frame *wh; 2441 u_int32_t iv; 2442 u_int8_t *ivp; 2443 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2444 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2445 u_int subtype, flags, ctsduration, antenna; 2446 HAL_PKT_TYPE atype; 2447 const HAL_RATE_TABLE *rt; 2448 HAL_BOOL shortPreamble; 2449 struct ath_node *an; 2450 ath_txq_critsect_decl(s); 2451 2452 wh = mtod(m0, struct ieee80211_frame *); 2453 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2454 hdrlen = sizeof(struct ieee80211_frame); 2455 pktlen = m0->m_pkthdr.len; 2456 2457 if (iswep) { 2458 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2459 m_adj(m0, hdrlen); 2460 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2461 if (m0 == NULL) { 2462 sc->sc_stats.ast_tx_nombuf++; 2463 return ENOMEM; 2464 } 2465 ivp = hdrbuf + hdrlen; 2466 wh = mtod(m0, struct ieee80211_frame *); 2467 /* 2468 * XXX 2469 * IV must not duplicate during the lifetime of the key. 2470 * But no mechanism to renew keys is defined in IEEE 802.11 2471 * WEP. And IV may be duplicated between other stations 2472 * because of the session key itself is shared. 2473 * So we use pseudo random IV for now, though it is not the 2474 * right way. 2475 */ 2476 iv = ic->ic_iv; 2477 /* 2478 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir: 2479 * (B, 255, N) with 3 <= B < 8 2480 */ 2481 if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00) 2482 iv += 0x000100; 2483 ic->ic_iv = iv + 1; 2484 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 2485 ivp[i] = iv; 2486 iv >>= 8; 2487 } 2488 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 2489 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2490 /* 2491 * The ICV length must be included into hdrlen and pktlen. 2492 */ 2493 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2494 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2495 } 2496 pktlen += IEEE80211_CRC_LEN; 2497 2498 /* 2499 * Load the DMA map so any coalescing is done. This 2500 * also calculates the number of descriptors we need. 2501 */ 2502 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2503 /* 2504 * Discard null packets and check for packets that 2505 * require too many TX descriptors. We try to convert 2506 * the latter to a cluster. 2507 */ 2508 if (error == EFBIG) { /* too many desc's, linearize */ 2509 sc->sc_stats.ast_tx_linear++; 2510 MGETHDR(m, M_DONTWAIT, MT_DATA); 2511 if (m == NULL) { 2512 sc->sc_stats.ast_tx_nombuf++; 2513 m_freem(m0); 2514 return ENOMEM; 2515 } 2516 #ifdef __FreeBSD__ 2517 M_MOVE_PKTHDR(m, m0); 2518 #else 2519 M_COPY_PKTHDR(m, m0); 2520 #endif 2521 MCLGET(m, M_DONTWAIT); 2522 if ((m->m_flags & M_EXT) == 0) { 2523 sc->sc_stats.ast_tx_nomcl++; 2524 m_freem(m0); 2525 m_free(m); 2526 return ENOMEM; 2527 } 2528 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2529 m_freem(m0); 2530 m->m_len = m->m_pkthdr.len; 2531 m0 = m; 2532 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2533 BUS_DMA_NOWAIT); 2534 if (error != 0) { 2535 sc->sc_stats.ast_tx_busdma++; 2536 m_freem(m0); 2537 return error; 2538 } 2539 KASSERT(bf->bf_nseg == 1, 2540 ("ath_tx_start: packet not one segment; nseg %u", 2541 bf->bf_nseg)); 2542 } else if (error != 0) { 2543 sc->sc_stats.ast_tx_busdma++; 2544 m_freem(m0); 2545 return error; 2546 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2547 sc->sc_stats.ast_tx_nodata++; 2548 m_freem(m0); 2549 return EIO; 2550 } 2551 DPRINTF(ATH_DEBUG_XMIT, ("%s: m %p len %u\n", __func__, m0, pktlen)); 2552 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2553 bf->bf_m = m0; 2554 bf->bf_node = ni; /* NB: held reference */ 2555 2556 /* setup descriptors */ 2557 ds = bf->bf_desc; 2558 rt = sc->sc_currates; 2559 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2560 2561 /* 2562 * Calculate Atheros packet type from IEEE80211 packet header 2563 * and setup for rate calculations. 2564 */ 2565 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2566 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2567 case IEEE80211_FC0_TYPE_MGT: 2568 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2569 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2570 atype = HAL_PKT_TYPE_BEACON; 2571 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2572 atype = HAL_PKT_TYPE_PROBE_RESP; 2573 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2574 atype = HAL_PKT_TYPE_ATIM; 2575 rix = 0; /* XXX lowest rate */ 2576 break; 2577 case IEEE80211_FC0_TYPE_CTL: 2578 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2579 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2580 atype = HAL_PKT_TYPE_PSPOLL; 2581 rix = 0; /* XXX lowest rate */ 2582 break; 2583 default: 2584 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2585 IEEE80211_RATE_VAL]; 2586 if (rix == 0xff) { 2587 if_printf(ifp, "bogus xmit rate 0x%x\n", 2588 ni->ni_rates.rs_rates[ni->ni_txrate]); 2589 sc->sc_stats.ast_tx_badrate++; 2590 m_freem(m0); 2591 return EIO; 2592 } 2593 break; 2594 } 2595 /* 2596 * NB: the 802.11 layer marks whether or not we should 2597 * use short preamble based on the current mode and 2598 * negotiated parameters. 2599 */ 2600 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 2601 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 2602 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2603 shortPreamble = AH_TRUE; 2604 sc->sc_stats.ast_tx_shortpre++; 2605 } else { 2606 txrate = rt->info[rix].rateCode; 2607 shortPreamble = AH_FALSE; 2608 } 2609 2610 /* 2611 * Calculate miscellaneous flags. 2612 */ 2613 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2614 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2615 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2616 sc->sc_stats.ast_tx_noack++; 2617 } else if (pktlen > ic->ic_rtsthreshold) { 2618 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2619 sc->sc_stats.ast_tx_rts++; 2620 } 2621 2622 /* 2623 * Calculate duration. This logically belongs in the 802.11 2624 * layer but it lacks sufficient information to calculate it. 2625 */ 2626 if ((flags & HAL_TXDESC_NOACK) == 0 && 2627 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 2628 u_int16_t dur; 2629 /* 2630 * XXX not right with fragmentation. 2631 */ 2632 dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE, 2633 rix, shortPreamble); 2634 *((u_int16_t*) wh->i_dur) = htole16(dur); 2635 } 2636 2637 /* 2638 * Calculate RTS/CTS rate and duration if needed. 2639 */ 2640 ctsduration = 0; 2641 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2642 /* 2643 * CTS transmit rate is derived from the transmit rate 2644 * by looking in the h/w rate table. We must also factor 2645 * in whether or not a short preamble is to be used. 2646 */ 2647 cix = rt->info[rix].controlRate; 2648 ctsrate = rt->info[cix].rateCode; 2649 if (shortPreamble) 2650 ctsrate |= rt->info[cix].shortPreamble; 2651 /* 2652 * Compute the transmit duration based on the size 2653 * of an ACK frame. We call into the HAL to do the 2654 * computation since it depends on the characteristics 2655 * of the actual PHY being used. 2656 */ 2657 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2658 ctsduration += ath_hal_computetxtime(ah, 2659 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2660 } 2661 /* SIFS + data */ 2662 ctsduration += ath_hal_computetxtime(ah, 2663 rt, pktlen, rix, shortPreamble); 2664 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2665 ctsduration += ath_hal_computetxtime(ah, 2666 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2667 } 2668 } else 2669 ctsrate = 0; 2670 2671 /* 2672 * For now use the antenna on which the last good 2673 * frame was received on. We assume this field is 2674 * initialized to 0 which gives us ``auto'' or the 2675 * ``default'' antenna. 2676 */ 2677 an = (struct ath_node *) ni; 2678 if (an->an_tx_antenna) 2679 antenna = an->an_tx_antenna; 2680 else 2681 antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna; 2682 2683 if (ic->ic_rawbpf) 2684 bpf_mtap(ic->ic_rawbpf, m0); 2685 if (sc->sc_drvbpf) { 2686 sc->sc_tx_th.wt_flags = 0; 2687 if (shortPreamble) 2688 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2689 if (iswep) 2690 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2691 sc->sc_tx_th.wt_rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 2692 sc->sc_tx_th.wt_txpower = 60/2; /* XXX */ 2693 sc->sc_tx_th.wt_antenna = antenna; 2694 2695 bpf_mtap2(sc->sc_drvbpf, 2696 &sc->sc_tx_th, sc->sc_tx_th_len, m0); 2697 } 2698 2699 /* 2700 * Formulate first tx descriptor with tx controls. 2701 */ 2702 /* XXX check return value? */ 2703 ath_hal_setuptxdesc(ah, ds 2704 , pktlen /* packet length */ 2705 , hdrlen /* header length */ 2706 , atype /* Atheros packet type */ 2707 , 60 /* txpower XXX */ 2708 , txrate, 1+10 /* series 0 rate/tries */ 2709 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2710 , antenna /* antenna mode */ 2711 , flags /* flags */ 2712 , ctsrate /* rts/cts rate */ 2713 , ctsduration /* rts/cts duration */ 2714 ); 2715 #ifdef notyet 2716 ath_hal_setupxtxdesc(ah, ds 2717 , AH_FALSE /* short preamble */ 2718 , 0, 0 /* series 1 rate/tries */ 2719 , 0, 0 /* series 2 rate/tries */ 2720 , 0, 0 /* series 3 rate/tries */ 2721 ); 2722 #endif 2723 /* 2724 * Fillin the remainder of the descriptor info. 2725 */ 2726 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2727 ds->ds_data = bf->bf_segs[i].ds_addr; 2728 if (i == bf->bf_nseg - 1) 2729 ds->ds_link = 0; 2730 else 2731 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2732 ath_hal_filltxdesc(ah, ds 2733 , bf->bf_segs[i].ds_len /* segment length */ 2734 , i == 0 /* first segment */ 2735 , i == bf->bf_nseg - 1 /* last segment */ 2736 ); 2737 DPRINTF(ATH_DEBUG_XMIT, 2738 ("%s: %d: %08x %08x %08x %08x %08x %08x\n", 2739 __func__, i, ds->ds_link, ds->ds_data, 2740 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1])); 2741 } 2742 2743 /* 2744 * Insert the frame on the outbound list and 2745 * pass it on to the hardware. 2746 */ 2747 ath_txq_critsect_begin(sc, s); 2748 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2749 if (sc->sc_txlink == NULL) { 2750 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2751 DPRINTF(ATH_DEBUG_XMIT, ("%s: TXDP0 = %p (%p)\n", __func__, 2752 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2753 } else { 2754 *sc->sc_txlink = bf->bf_daddr; 2755 DPRINTF(ATH_DEBUG_XMIT, ("%s: link(%p)=%p (%p)\n", __func__, 2756 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2757 } 2758 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2759 ath_txq_critsect_end(sc, s); 2760 2761 ath_hal_txstart(ah, sc->sc_txhalq); 2762 return 0; 2763 } 2764 2765 static void 2766 ath_tx_proc(void *arg, int npending) 2767 { 2768 struct ath_softc *sc = arg; 2769 struct ath_hal *ah = sc->sc_ah; 2770 struct ath_buf *bf; 2771 struct ieee80211com *ic = &sc->sc_ic; 2772 struct ifnet *ifp = &ic->ic_if; 2773 struct ath_desc *ds; 2774 struct ieee80211_node *ni; 2775 struct ath_node *an; 2776 int sr, lr; 2777 HAL_STATUS status; 2778 ath_txq_critsect_decl(s); 2779 ath_txbuf_critsect_decl(s2); 2780 2781 DPRINTF(ATH_DEBUG_TX_PROC, ("%s: pending %u tx queue %p, link %p\n", 2782 __func__, npending, 2783 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2784 sc->sc_txlink)); 2785 for (;;) { 2786 ath_txq_critsect_begin(sc, s); 2787 bf = TAILQ_FIRST(&sc->sc_txq); 2788 if (bf == NULL) { 2789 sc->sc_txlink = NULL; 2790 ath_txq_critsect_end(sc, s); 2791 break; 2792 } 2793 /* only the last descriptor is needed */ 2794 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2795 status = ath_hal_txprocdesc(ah, ds); 2796 #ifdef AR_DEBUG 2797 if (ath_debug & ATH_DEBUG_XMIT_DESC) 2798 ath_printtxbuf(bf, status == HAL_OK); 2799 #endif 2800 if (status == HAL_EINPROGRESS) { 2801 ath_txq_critsect_end(sc, s); 2802 break; 2803 } 2804 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2805 ath_txq_critsect_end(sc, s); 2806 2807 ni = bf->bf_node; 2808 if (ni != NULL) { 2809 an = (struct ath_node *) ni; 2810 if (ds->ds_txstat.ts_status == 0) { 2811 an->an_tx_ok++; 2812 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2813 } else { 2814 an->an_tx_err++; 2815 ifp->if_oerrors++; 2816 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2817 sc->sc_stats.ast_tx_xretries++; 2818 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2819 sc->sc_stats.ast_tx_fifoerr++; 2820 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2821 sc->sc_stats.ast_tx_filtered++; 2822 an->an_tx_antenna = 0; /* invalidate */ 2823 } 2824 sr = ds->ds_txstat.ts_shortretry; 2825 lr = ds->ds_txstat.ts_longretry; 2826 sc->sc_stats.ast_tx_shortretry += sr; 2827 sc->sc_stats.ast_tx_longretry += lr; 2828 if (sr + lr) 2829 an->an_tx_retr++; 2830 /* 2831 * Reclaim reference to node. 2832 * 2833 * NB: the node may be reclaimed here if, for example 2834 * this is a DEAUTH message that was sent and the 2835 * node was timed out due to inactivity. 2836 */ 2837 if (ni != ic->ic_bss) 2838 ieee80211_free_node(ic, ni); 2839 } 2840 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2841 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2842 m_freem(bf->bf_m); 2843 bf->bf_m = NULL; 2844 bf->bf_node = NULL; 2845 2846 ath_txbuf_critsect_begin(sc, s2); 2847 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2848 ath_txbuf_critsect_end(sc, s2); 2849 } 2850 ifp->if_flags &= ~IFF_OACTIVE; 2851 sc->sc_tx_timer = 0; 2852 2853 ath_start(ifp); 2854 } 2855 2856 /* 2857 * Drain the transmit queue and reclaim resources. 2858 */ 2859 static void 2860 ath_draintxq(struct ath_softc *sc) 2861 { 2862 struct ath_hal *ah = sc->sc_ah; 2863 struct ieee80211com *ic = &sc->sc_ic; 2864 struct ifnet *ifp = &ic->ic_if; 2865 struct ieee80211_node *ni; 2866 struct ath_buf *bf; 2867 ath_txq_critsect_decl(s); 2868 ath_txbuf_critsect_decl(s2); 2869 2870 /* XXX return value */ 2871 if (!sc->sc_invalid) { 2872 /* don't touch the hardware if marked invalid */ 2873 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2874 DPRINTF(ATH_DEBUG_RESET, 2875 ("%s: tx queue %p, link %p\n", __func__, 2876 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2877 sc->sc_txlink)); 2878 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2879 DPRINTF(ATH_DEBUG_RESET, 2880 ("%s: beacon queue %p\n", __func__, 2881 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2882 } 2883 for (;;) { 2884 ath_txq_critsect_begin(sc, s); 2885 bf = TAILQ_FIRST(&sc->sc_txq); 2886 if (bf == NULL) { 2887 sc->sc_txlink = NULL; 2888 ath_txq_critsect_end(sc, s); 2889 break; 2890 } 2891 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2892 ath_txq_critsect_end(sc, s); 2893 #ifdef AR_DEBUG 2894 if (ath_debug & ATH_DEBUG_RESET) 2895 ath_printtxbuf(bf, 2896 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2897 #endif /* AR_DEBUG */ 2898 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2899 m_freem(bf->bf_m); 2900 bf->bf_m = NULL; 2901 ni = bf->bf_node; 2902 bf->bf_node = NULL; 2903 ath_txbuf_critsect_begin(sc, s2); 2904 if (ni != NULL && ni != ic->ic_bss) { 2905 /* 2906 * Reclaim node reference. 2907 */ 2908 ieee80211_free_node(ic, ni); 2909 } 2910 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2911 ath_txbuf_critsect_end(sc, s2); 2912 } 2913 ifp->if_flags &= ~IFF_OACTIVE; 2914 sc->sc_tx_timer = 0; 2915 } 2916 2917 /* 2918 * Disable the receive h/w in preparation for a reset. 2919 */ 2920 static void 2921 ath_stoprecv(struct ath_softc *sc) 2922 { 2923 #define PA2DESC(_sc, _pa) \ 2924 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2925 ((_pa) - (_sc)->sc_desc_paddr))) 2926 struct ath_hal *ah = sc->sc_ah; 2927 2928 ath_hal_stoppcurecv(ah); /* disable PCU */ 2929 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2930 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2931 DELAY(3000); /* long enough for 1 frame */ 2932 #ifdef AR_DEBUG 2933 if (ath_debug & ATH_DEBUG_RESET) { 2934 struct ath_buf *bf; 2935 2936 printf("%s: rx queue %p, link %p\n", __func__, 2937 (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink); 2938 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2939 struct ath_desc *ds = bf->bf_desc; 2940 if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr, 2941 PA2DESC(sc, ds->ds_link)) == HAL_OK) 2942 ath_printrxbuf(bf, 1); 2943 } 2944 } 2945 #endif 2946 sc->sc_rxlink = NULL; /* just in case */ 2947 #undef PA2DESC 2948 } 2949 2950 /* 2951 * Enable the receive h/w following a reset. 2952 */ 2953 static int 2954 ath_startrecv(struct ath_softc *sc) 2955 { 2956 struct ath_hal *ah = sc->sc_ah; 2957 struct ath_buf *bf; 2958 2959 sc->sc_rxlink = NULL; 2960 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2961 int error = ath_rxbuf_init(sc, bf); 2962 if (error != 0) { 2963 DPRINTF(ATH_DEBUG_RECV, 2964 ("%s: ath_rxbuf_init failed %d\n", 2965 __func__, error)); 2966 return error; 2967 } 2968 } 2969 2970 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2971 ath_hal_putrxbuf(ah, bf->bf_daddr); 2972 ath_hal_rxena(ah); /* enable recv descriptors */ 2973 ath_mode_init(sc); /* set filters, etc. */ 2974 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2975 return 0; 2976 } 2977 2978 /* 2979 * Set/change channels. If the channel is really being changed, 2980 * it's done by resetting the chip. To accomplish this we must 2981 * first cleanup any pending DMA, then restart stuff after a la 2982 * ath_init. 2983 */ 2984 static int 2985 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 2986 { 2987 struct ath_hal *ah = sc->sc_ah; 2988 struct ieee80211com *ic = &sc->sc_ic; 2989 2990 DPRINTF(ATH_DEBUG_ANY, ("%s: %u (%u MHz) -> %u (%u MHz)\n", __func__, 2991 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 2992 ic->ic_ibss_chan->ic_freq, 2993 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 2994 if (chan != ic->ic_ibss_chan) { 2995 HAL_STATUS status; 2996 HAL_CHANNEL hchan; 2997 enum ieee80211_phymode mode; 2998 2999 /* 3000 * To switch channels clear any pending DMA operations; 3001 * wait long enough for the RX fifo to drain, reset the 3002 * hardware at the new frequency, and then re-enable 3003 * the relevant bits of the h/w. 3004 */ 3005 ath_hal_intrset(ah, 0); /* disable interrupts */ 3006 ath_draintxq(sc); /* clear pending tx frames */ 3007 ath_stoprecv(sc); /* turn off frame recv */ 3008 /* 3009 * Convert to a HAL channel description with 3010 * the flags constrained to reflect the current 3011 * operating mode. 3012 */ 3013 hchan.channel = chan->ic_freq; 3014 hchan.channelFlags = ath_chan2flags(ic, chan); 3015 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 3016 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 3017 "channel %u (%u Mhz)\n", 3018 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 3019 return EIO; 3020 } 3021 /* 3022 * Re-enable rx framework. 3023 */ 3024 if (ath_startrecv(sc) != 0) { 3025 if_printf(&ic->ic_if, 3026 "ath_chan_set: unable to restart recv logic\n"); 3027 return EIO; 3028 } 3029 3030 /* 3031 * Update BPF state. 3032 */ 3033 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 3034 htole16(chan->ic_freq); 3035 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 3036 htole16(chan->ic_flags); 3037 3038 /* 3039 * Change channels and update the h/w rate map 3040 * if we're switching; e.g. 11a to 11b/g. 3041 */ 3042 ic->ic_ibss_chan = chan; 3043 mode = ieee80211_chan2mode(ic, chan); 3044 if (mode != sc->sc_curmode) 3045 ath_setcurmode(sc, mode); 3046 3047 /* 3048 * Re-enable interrupts. 3049 */ 3050 ath_hal_intrset(ah, sc->sc_imask); 3051 } 3052 return 0; 3053 } 3054 3055 static void 3056 ath_next_scan(void *arg) 3057 { 3058 struct ath_softc *sc = arg; 3059 struct ieee80211com *ic = &sc->sc_ic; 3060 int s; 3061 3062 /* don't call ath_start w/o network interrupts blocked */ 3063 s = splnet(); 3064 3065 if (ic->ic_state == IEEE80211_S_SCAN) 3066 ieee80211_next_scan(ic); 3067 splx(s); 3068 } 3069 3070 /* 3071 * Periodically recalibrate the PHY to account 3072 * for temperature/environment changes. 3073 */ 3074 static void 3075 ath_calibrate(void *arg) 3076 { 3077 struct ath_softc *sc = arg; 3078 struct ath_hal *ah = sc->sc_ah; 3079 struct ieee80211com *ic = &sc->sc_ic; 3080 struct ieee80211_channel *c; 3081 HAL_CHANNEL hchan; 3082 3083 sc->sc_stats.ast_per_cal++; 3084 3085 /* 3086 * Convert to a HAL channel description with the flags 3087 * constrained to reflect the current operating mode. 3088 */ 3089 c = ic->ic_ibss_chan; 3090 hchan.channel = c->ic_freq; 3091 hchan.channelFlags = ath_chan2flags(ic, c); 3092 3093 DPRINTF(ATH_DEBUG_CALIBRATE, 3094 ("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 3095 3096 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 3097 /* 3098 * Rfgain is out of bounds, reset the chip 3099 * to load new gain values. 3100 */ 3101 sc->sc_stats.ast_per_rfgain++; 3102 ath_reset(sc); 3103 } 3104 if (!ath_hal_calibrate(ah, &hchan)) { 3105 DPRINTF(ATH_DEBUG_ANY, 3106 ("%s: calibration of channel %u failed\n", 3107 __func__, c->ic_freq)); 3108 sc->sc_stats.ast_per_calfail++; 3109 } 3110 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 3111 } 3112 3113 static HAL_LED_STATE 3114 ath_state_to_led(enum ieee80211_state state) 3115 { 3116 switch (state) { 3117 case IEEE80211_S_INIT: 3118 return HAL_LED_INIT; 3119 case IEEE80211_S_SCAN: 3120 return HAL_LED_SCAN; 3121 case IEEE80211_S_AUTH: 3122 return HAL_LED_AUTH; 3123 case IEEE80211_S_ASSOC: 3124 return HAL_LED_ASSOC; 3125 case IEEE80211_S_RUN: 3126 return HAL_LED_RUN; 3127 default: 3128 panic("%s: unknown 802.11 state %d\n", __func__, state); 3129 return HAL_LED_INIT; 3130 } 3131 } 3132 3133 static int 3134 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 3135 { 3136 struct ifnet *ifp = &ic->ic_if; 3137 struct ath_softc *sc = ifp->if_softc; 3138 struct ath_hal *ah = sc->sc_ah; 3139 struct ieee80211_node *ni; 3140 int i, error; 3141 const u_int8_t *bssid; 3142 u_int32_t rfilt; 3143 3144 DPRINTF(ATH_DEBUG_ANY, ("%s: %s -> %s\n", __func__, 3145 ieee80211_state_name[ic->ic_state], 3146 ieee80211_state_name[nstate])); 3147 3148 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 3149 3150 if (nstate == IEEE80211_S_INIT) { 3151 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3152 ath_hal_intrset(ah, sc->sc_imask); 3153 callout_stop(&sc->sc_scan_ch); 3154 callout_stop(&sc->sc_cal_ch); 3155 return (*sc->sc_newstate)(ic, nstate, arg); 3156 } 3157 ni = ic->ic_bss; 3158 error = ath_chan_set(sc, ni->ni_chan); 3159 if (error != 0) 3160 goto bad; 3161 rfilt = ath_calcrxfilter(sc); 3162 if (nstate == IEEE80211_S_SCAN) { 3163 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 3164 ath_next_scan, sc); 3165 bssid = ifp->if_broadcastaddr; 3166 } else { 3167 callout_stop(&sc->sc_scan_ch); 3168 bssid = ni->ni_bssid; 3169 } 3170 ath_hal_setrxfilter(ah, rfilt); 3171 DPRINTF(ATH_DEBUG_ANY, ("%s: RX filter 0x%x bssid %s\n", 3172 __func__, rfilt, ether_sprintf(bssid))); 3173 3174 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 3175 ath_hal_setassocid(ah, bssid, ni->ni_associd); 3176 else 3177 ath_hal_setassocid(ah, bssid, 0); 3178 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 3179 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3180 if (ath_hal_keyisvalid(ah, i)) 3181 ath_hal_keysetmac(ah, i, bssid); 3182 } 3183 3184 if (nstate == IEEE80211_S_RUN) { 3185 DPRINTF(ATH_DEBUG_ANY, ("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 3186 "capinfo=0x%04x chan=%d\n" 3187 , __func__ 3188 , ic->ic_flags 3189 , ni->ni_intval 3190 , ether_sprintf(ni->ni_bssid) 3191 , ni->ni_capinfo 3192 , ieee80211_chan2ieee(ic, ni->ni_chan))); 3193 3194 /* 3195 * Allocate and setup the beacon frame for AP or adhoc mode. 3196 */ 3197 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 3198 ic->ic_opmode == IEEE80211_M_IBSS) { 3199 error = ath_beacon_alloc(sc, ni); 3200 if (error != 0) 3201 goto bad; 3202 } 3203 3204 /* 3205 * Configure the beacon and sleep timers. 3206 */ 3207 ath_beacon_config(sc); 3208 3209 /* start periodic recalibration timer */ 3210 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 3211 ath_calibrate, sc); 3212 } else { 3213 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3214 ath_hal_intrset(ah, sc->sc_imask); 3215 callout_stop(&sc->sc_cal_ch); /* no calibration */ 3216 } 3217 /* 3218 * Reset the rate control state. 3219 */ 3220 ath_rate_ctl_reset(sc, nstate); 3221 /* 3222 * Invoke the parent method to complete the work. 3223 */ 3224 return (*sc->sc_newstate)(ic, nstate, arg); 3225 bad: 3226 callout_stop(&sc->sc_scan_ch); 3227 callout_stop(&sc->sc_cal_ch); 3228 /* NB: do not invoke the parent */ 3229 return error; 3230 } 3231 3232 /* 3233 * Setup driver-specific state for a newly associated node. 3234 * Note that we're called also on a re-associate, the isnew 3235 * param tells us if this is the first time or not. 3236 */ 3237 static void 3238 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 3239 { 3240 if (isnew) { 3241 struct ath_node *an = (struct ath_node *) ni; 3242 3243 an->an_tx_ok = an->an_tx_err = 3244 an->an_tx_retr = an->an_tx_upper = 0; 3245 /* start with highest negotiated rate */ 3246 /* 3247 * XXX should do otherwise but only when 3248 * the rate control algorithm is better. 3249 */ 3250 KASSERT(ni->ni_rates.rs_nrates > 0, 3251 ("new association w/ no rates!")); 3252 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3253 } 3254 } 3255 3256 static int 3257 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor, 3258 HAL_BOOL xchanmode) 3259 { 3260 struct ieee80211com *ic = &sc->sc_ic; 3261 struct ifnet *ifp = &ic->ic_if; 3262 struct ath_hal *ah = sc->sc_ah; 3263 HAL_CHANNEL *chans; 3264 int i, ix, nchan; 3265 3266 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 3267 M_TEMP, M_NOWAIT); 3268 if (chans == NULL) { 3269 if_printf(ifp, "unable to allocate channel table\n"); 3270 return ENOMEM; 3271 } 3272 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 3273 cc, HAL_MODE_ALL, outdoor, xchanmode)) { 3274 if_printf(ifp, "unable to collect channel list from hal\n"); 3275 free(chans, M_TEMP); 3276 return EINVAL; 3277 } 3278 3279 /* 3280 * Convert HAL channels to ieee80211 ones and insert 3281 * them in the table according to their channel number. 3282 */ 3283 for (i = 0; i < nchan; i++) { 3284 HAL_CHANNEL *c = &chans[i]; 3285 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 3286 if (ix > IEEE80211_CHAN_MAX) { 3287 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 3288 ix, c->channel, c->channelFlags); 3289 continue; 3290 } 3291 DPRINTF(ATH_DEBUG_ANY, 3292 ("%s: HAL channel %d/%d freq %d flags %#04x idx %d\n", 3293 sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags, 3294 ix)); 3295 /* NB: flags are known to be compatible */ 3296 if (ic->ic_channels[ix].ic_freq == 0) { 3297 ic->ic_channels[ix].ic_freq = c->channel; 3298 ic->ic_channels[ix].ic_flags = c->channelFlags; 3299 } else { 3300 /* channels overlap; e.g. 11g and 11b */ 3301 ic->ic_channels[ix].ic_flags |= c->channelFlags; 3302 } 3303 } 3304 free(chans, M_TEMP); 3305 return 0; 3306 } 3307 3308 static int 3309 ath_rate_setup(struct ath_softc *sc, u_int mode) 3310 { 3311 struct ath_hal *ah = sc->sc_ah; 3312 struct ieee80211com *ic = &sc->sc_ic; 3313 const HAL_RATE_TABLE *rt; 3314 struct ieee80211_rateset *rs; 3315 int i, maxrates; 3316 3317 switch (mode) { 3318 case IEEE80211_MODE_11A: 3319 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 3320 break; 3321 case IEEE80211_MODE_11B: 3322 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 3323 break; 3324 case IEEE80211_MODE_11G: 3325 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 3326 break; 3327 case IEEE80211_MODE_TURBO: 3328 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 3329 break; 3330 default: 3331 DPRINTF(ATH_DEBUG_ANY, 3332 ("%s: invalid mode %u\n", __func__, mode)); 3333 return 0; 3334 } 3335 rt = sc->sc_rates[mode]; 3336 if (rt == NULL) 3337 return 0; 3338 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 3339 DPRINTF(ATH_DEBUG_ANY, 3340 ("%s: rate table too small (%u > %u)\n", 3341 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 3342 maxrates = IEEE80211_RATE_MAXSIZE; 3343 } else 3344 maxrates = rt->rateCount; 3345 rs = &ic->ic_sup_rates[mode]; 3346 for (i = 0; i < maxrates; i++) 3347 rs->rs_rates[i] = rt->info[i].dot11Rate; 3348 rs->rs_nrates = maxrates; 3349 return 1; 3350 } 3351 3352 static void 3353 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 3354 { 3355 const HAL_RATE_TABLE *rt; 3356 int i; 3357 3358 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 3359 rt = sc->sc_rates[mode]; 3360 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 3361 for (i = 0; i < rt->rateCount; i++) 3362 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 3363 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 3364 for (i = 0; i < 32; i++) 3365 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 3366 sc->sc_currates = rt; 3367 sc->sc_curmode = mode; 3368 } 3369 3370 /* 3371 * Reset the rate control state for each 802.11 state transition. 3372 */ 3373 static void 3374 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 3375 { 3376 struct ieee80211com *ic = &sc->sc_ic; 3377 struct ieee80211_node *ni; 3378 struct ath_node *an; 3379 3380 if (ic->ic_opmode != IEEE80211_M_STA) { 3381 /* 3382 * When operating as a station the node table holds 3383 * the AP's that were discovered during scanning. 3384 * For any other operating mode we want to reset the 3385 * tx rate state of each node. 3386 */ 3387 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3388 ni->ni_txrate = 0; /* use lowest rate */ 3389 an = (struct ath_node *) ni; 3390 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3391 an->an_tx_upper = 0; 3392 } 3393 } 3394 /* 3395 * Reset local xmit state; this is really only meaningful 3396 * when operating in station or adhoc mode. 3397 */ 3398 ni = ic->ic_bss; 3399 an = (struct ath_node *) ni; 3400 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3401 if (state == IEEE80211_S_RUN) { 3402 /* start with highest negotiated rate */ 3403 KASSERT(ni->ni_rates.rs_nrates > 0, 3404 ("transition to RUN state w/ no rates!")); 3405 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3406 } else { 3407 /* use lowest rate */ 3408 ni->ni_txrate = 0; 3409 } 3410 } 3411 3412 /* 3413 * Examine and potentially adjust the transmit rate. 3414 */ 3415 static void 3416 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3417 { 3418 struct ath_softc *sc = arg; 3419 struct ath_node *an = (struct ath_node *) ni; 3420 struct ieee80211_rateset *rs = &ni->ni_rates; 3421 int mod = 0, orate, enough; 3422 3423 /* 3424 * Rate control 3425 * XXX: very primitive version. 3426 */ 3427 sc->sc_stats.ast_rate_calls++; 3428 3429 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3430 3431 /* no packet reached -> down */ 3432 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3433 mod = -1; 3434 3435 /* all packets needs retry in average -> down */ 3436 if (enough && an->an_tx_ok < an->an_tx_retr) 3437 mod = -1; 3438 3439 /* no error and less than 10% of packets needs retry -> up */ 3440 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3441 mod = 1; 3442 3443 orate = ni->ni_txrate; 3444 switch (mod) { 3445 case 0: 3446 if (enough && an->an_tx_upper > 0) 3447 an->an_tx_upper--; 3448 break; 3449 case -1: 3450 if (ni->ni_txrate > 0) { 3451 ni->ni_txrate--; 3452 sc->sc_stats.ast_rate_drop++; 3453 } 3454 an->an_tx_upper = 0; 3455 break; 3456 case 1: 3457 if (++an->an_tx_upper < 2) 3458 break; 3459 an->an_tx_upper = 0; 3460 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3461 ni->ni_txrate++; 3462 sc->sc_stats.ast_rate_raise++; 3463 } 3464 break; 3465 } 3466 3467 if (ni->ni_txrate != orate) { 3468 DPRINTF(ATH_DEBUG_RATE, 3469 ("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3470 __func__, 3471 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3472 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3473 an->an_tx_ok, an->an_tx_err, an->an_tx_retr)); 3474 } 3475 if (ni->ni_txrate != orate || enough) 3476 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3477 } 3478 3479 #ifdef AR_DEBUG 3480 #ifdef __FreeBSD__ 3481 static int 3482 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3483 { 3484 char dmode[64]; 3485 int error; 3486 3487 strncpy(dmode, "", sizeof(dmode) - 1); 3488 dmode[sizeof(dmode) - 1] = '\0'; 3489 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3490 3491 if (error == 0 && req->newptr != NULL) { 3492 struct ifnet *ifp; 3493 struct ath_softc *sc; 3494 3495 ifp = ifunit("ath0"); /* XXX */ 3496 if (!ifp) 3497 return EINVAL; 3498 sc = ifp->if_softc; 3499 if (strcmp(dmode, "hal") == 0) 3500 ath_hal_dumpstate(sc->sc_ah); 3501 else 3502 return EINVAL; 3503 } 3504 return error; 3505 } 3506 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3507 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3508 #endif /* __FreeBSD__ */ 3509 3510 #if 0 /* #ifdef __NetBSD__ */ 3511 static int 3512 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3513 { 3514 char dmode[64]; 3515 int error; 3516 3517 strncpy(dmode, "", sizeof(dmode) - 1); 3518 dmode[sizeof(dmode) - 1] = '\0'; 3519 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3520 3521 if (error == 0 && req->newptr != NULL) { 3522 struct ifnet *ifp; 3523 struct ath_softc *sc; 3524 3525 ifp = ifunit("ath0"); /* XXX */ 3526 if (!ifp) 3527 return EINVAL; 3528 sc = ifp->if_softc; 3529 if (strcmp(dmode, "hal") == 0) 3530 ath_hal_dumpstate(sc->sc_ah); 3531 else 3532 return EINVAL; 3533 } 3534 return error; 3535 } 3536 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3537 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3538 #endif /* __NetBSD__ */ 3539 3540 static void 3541 ath_printrxbuf(struct ath_buf *bf, int done) 3542 { 3543 struct ath_desc *ds; 3544 int i; 3545 3546 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3547 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3548 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3549 ds->ds_link, ds->ds_data, 3550 ds->ds_ctl0, ds->ds_ctl1, 3551 ds->ds_hw[0], ds->ds_hw[1], 3552 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3553 } 3554 } 3555 3556 static void 3557 ath_printtxbuf(struct ath_buf *bf, int done) 3558 { 3559 struct ath_desc *ds; 3560 int i; 3561 3562 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3563 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3564 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3565 ds->ds_link, ds->ds_data, 3566 ds->ds_ctl0, ds->ds_ctl1, 3567 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3568 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3569 } 3570 } 3571 #endif /* AR_DEBUG */ 3572
Indexes created Thu Oct 02 07:10:07 GMT 2025