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ath.c revision 1.33
      1 /*	$NetBSD: ath.c,v 1.33 2004/08/03 20:06:54 dyoung Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer,
     12  *    without modification.
     13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
     14  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
     15  *    redistribution must be conditioned upon including a substantially
     16  *    similar Disclaimer requirement for further binary redistribution.
     17  * 3. Neither the names of the above-listed copyright holders nor the names
     18  *    of any contributors may be used to endorse or promote products derived
     19  *    from this software without specific prior written permission.
     20  *
     21  * Alternatively, this software may be distributed under the terms of the
     22  * GNU General Public License ("GPL") version 2 as published by the Free
     23  * Software Foundation.
     24  *
     25  * NO WARRANTY
     26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     28  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
     29  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
     30  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
     31  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
     34  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     36  * THE POSSIBILITY OF SUCH DAMAGES.
     37  */
     38 
     39 #include <sys/cdefs.h>
     40 #ifdef __FreeBSD__
     41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.54 2004/04/05 04:42:42 sam Exp $");
     42 #endif
     43 #ifdef __NetBSD__
     44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.33 2004/08/03 20:06:54 dyoung Exp $");
     45 #endif
     46 
     47 /*
     48  * Driver for the Atheros Wireless LAN controller.
     49  *
     50  * This software is derived from work of Atsushi Onoe; his contribution
     51  * is greatly appreciated.
     52  */
     53 
     54 #include "opt_inet.h"
     55 
     56 #ifdef __NetBSD__
     57 #include "bpfilter.h"
     58 #endif /* __NetBSD__ */
     59 
     60 #include <sys/param.h>
     61 #include <sys/systm.h>
     62 #include <sys/types.h>
     63 #include <sys/sysctl.h>
     64 #include <sys/mbuf.h>
     65 #include <sys/malloc.h>
     66 #include <sys/lock.h>
     67 #ifdef __FreeBSD__
     68 #include <sys/mutex.h>
     69 #endif
     70 #include <sys/kernel.h>
     71 #include <sys/socket.h>
     72 #include <sys/sockio.h>
     73 #include <sys/errno.h>
     74 #include <sys/callout.h>
     75 #ifdef __FreeBSD__
     76 #include <sys/bus.h>
     77 #else
     78 #include <machine/bus.h>
     79 #endif
     80 #include <sys/endian.h>
     81 
     82 #include <machine/bus.h>
     83 
     84 #include <net/if.h>
     85 #include <net/if_dl.h>
     86 #include <net/if_media.h>
     87 #include <net/if_arp.h>
     88 #ifdef __FreeBSD__
     89 #include <net/ethernet.h>
     90 #else
     91 #include <net/if_ether.h>
     92 #endif
     93 #include <net/if_llc.h>
     94 
     95 #include <net80211/ieee80211_var.h>
     96 #include <net80211/ieee80211_compat.h>
     97 
     98 #if NBPFILTER > 0
     99 #include <net/bpf.h>
    100 #endif
    101 
    102 #ifdef INET
    103 #include <netinet/in.h>
    104 #endif
    105 
    106 #include <dev/ic/athcompat.h>
    107 
    108 #define	AR_DEBUG
    109 #ifdef __FreeBSD__
    110 #include <dev/ath/if_athvar.h>
    111 #include <contrib/dev/ath/ah_desc.h>
    112 #else
    113 #include <dev/ic/athvar.h>
    114 #include <../contrib/sys/dev/ic/athhal_desc.h>
    115 #endif
    116 
    117 /* unaligned little endian access */
    118 #define LE_READ_2(p)							\
    119 	((u_int16_t)							\
    120 	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8)))
    121 #define LE_READ_4(p)							\
    122 	((u_int32_t)							\
    123 	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8) |	\
    124 	  (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
    125 
    126 #ifdef __FreeBSD__
    127 static void	ath_init(void *);
    128 #else
    129 static int	ath_init(struct ifnet *);
    130 #endif
    131 static int	ath_init1(struct ath_softc *);
    132 static int	ath_intr1(struct ath_softc *);
    133 static void	ath_stop(struct ifnet *);
    134 static void	ath_start(struct ifnet *);
    135 static void	ath_reset(struct ath_softc *);
    136 static int	ath_media_change(struct ifnet *);
    137 static void	ath_watchdog(struct ifnet *);
    138 static int	ath_ioctl(struct ifnet *, u_long, caddr_t);
    139 static void	ath_fatal_proc(void *, int);
    140 static void	ath_rxorn_proc(void *, int);
    141 static void	ath_bmiss_proc(void *, int);
    142 static void	ath_initkeytable(struct ath_softc *);
    143 static void	ath_mode_init(struct ath_softc *);
    144 static int	ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
    145 static void	ath_beacon_proc(void *, int);
    146 static void	ath_beacon_free(struct ath_softc *);
    147 static void	ath_beacon_config(struct ath_softc *);
    148 static int	ath_desc_alloc(struct ath_softc *);
    149 static void	ath_desc_free(struct ath_softc *);
    150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *);
    151 static void	ath_node_free(struct ieee80211com *, struct ieee80211_node *);
    152 static void	ath_node_copy(struct ieee80211com *,
    153 			struct ieee80211_node *, const struct ieee80211_node *);
    154 static u_int8_t	ath_node_getrssi(struct ieee80211com *,
    155 			struct ieee80211_node *);
    156 static int	ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
    157 static void	ath_rx_proc(void *, int);
    158 static int	ath_tx_start(struct ath_softc *, struct ieee80211_node *,
    159 			     struct ath_buf *, struct mbuf *);
    160 static void	ath_tx_proc(void *, int);
    161 static int	ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
    162 static void	ath_draintxq(struct ath_softc *);
    163 static void	ath_stoprecv(struct ath_softc *);
    164 static int	ath_startrecv(struct ath_softc *);
    165 static void	ath_next_scan(void *);
    166 static void	ath_calibrate(void *);
    167 static int	ath_newstate(struct ieee80211com *, enum ieee80211_state, int);
    168 static void	ath_newassoc(struct ieee80211com *,
    169 			struct ieee80211_node *, int);
    170 static int	ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor,
    171 			HAL_BOOL xchanmode);
    172 
    173 static int	ath_rate_setup(struct ath_softc *sc, u_int mode);
    174 static void	ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
    175 static void	ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state);
    176 static void	ath_rate_ctl(void *, struct ieee80211_node *);
    177 
    178 #ifdef __NetBSD__
    179 int	ath_enable(struct ath_softc *);
    180 void	ath_disable(struct ath_softc *);
    181 void	ath_power(int, void *);
    182 #endif
    183 
    184 #ifdef __FreeBSD__
    185 SYSCTL_DECL(_hw_ath);
    186 /* XXX validate sysctl values */
    187 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime,
    188 	    0, "channel dwell time (ms) for AP/station scanning");
    189 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval,
    190 	    0, "chip calibration interval (secs)");
    191 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor,
    192 	    0, "enable/disable outdoor operation");
    193 TUNABLE_INT("hw.ath.outdoor", &ath_outdoor);
    194 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode,
    195 	    0, "country code");
    196 TUNABLE_INT("hw.ath.countrycode", &ath_countrycode);
    197 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain,
    198 	    0, "regulatory domain");
    199 #endif /* __FreeBSD__ */
    200 
    201 #ifdef __NetBSD__
    202 static int ath_dwelltime_nodenum, ath_calibrate_nodenum, ath_outdoor_nodenum,
    203            ath_countrycode_nodenum, ath_regdomain_nodenum, ath_debug_nodenum;
    204 #endif /* __NetBSD__ */
    205 
    206 static	int ath_dwelltime = 200;		/* 5 channels/second */
    207 static	int ath_calinterval = 30;		/* calibrate every 30 secs */
    208 static	int ath_outdoor = AH_TRUE;		/* outdoor operation */
    209 static	int ath_xchanmode = AH_TRUE;		/* enable extended channels */
    210 static	int ath_countrycode = CTRY_DEFAULT;	/* country code */
    211 static	int ath_regdomain = 0;			/* regulatory domain */
    212 
    213 #ifdef AR_DEBUG
    214 int	ath_debug = 0;
    215 #ifdef __FreeBSD__
    216 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
    217 	    0, "control debugging printfs");
    218 TUNABLE_INT("hw.ath.debug", &ath_debug);
    219 #endif /* __FreeBSD__ */
    220 #define	IFF_DUMPPKTS(_ifp, _m) \
    221 	((ath_debug & _m) || \
    222 	    ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
    223 static	void ath_printrxbuf(struct ath_buf *bf, int);
    224 static	void ath_printtxbuf(struct ath_buf *bf, int);
    225 enum {
    226 	ATH_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
    227 	ATH_DEBUG_XMIT_DESC	= 0x00000002,	/* xmit descriptors */
    228 	ATH_DEBUG_RECV		= 0x00000004,	/* basic recv operation */
    229 	ATH_DEBUG_RECV_DESC	= 0x00000008,	/* recv descriptors */
    230 	ATH_DEBUG_RATE		= 0x00000010,	/* rate control */
    231 	ATH_DEBUG_RESET		= 0x00000020,	/* reset processing */
    232 	ATH_DEBUG_MODE		= 0x00000040,	/* mode init/setup */
    233 	ATH_DEBUG_BEACON 	= 0x00000080,	/* beacon handling */
    234 	ATH_DEBUG_WATCHDOG 	= 0x00000100,	/* watchdog timeout */
    235 	ATH_DEBUG_INTR		= 0x00001000,	/* ISR */
    236 	ATH_DEBUG_TX_PROC	= 0x00002000,	/* tx ISR proc */
    237 	ATH_DEBUG_RX_PROC	= 0x00004000,	/* rx ISR proc */
    238 	ATH_DEBUG_BEACON_PROC	= 0x00008000,	/* beacon ISR proc */
    239 	ATH_DEBUG_CALIBRATE	= 0x00010000,	/* periodic calibration */
    240 	ATH_DEBUG_ANY		= 0xffffffff
    241 };
    242 #define	DPRINTF(_m,X)	if (ath_debug & (_m)) printf X
    243 #else
    244 #define	IFF_DUMPPKTS(_ifp, _m) \
    245 	(((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
    246 #define	DPRINTF(_m, X)
    247 #endif
    248 
    249 #ifdef __NetBSD__
    250 int
    251 ath_activate(struct device *self, enum devact act)
    252 {
    253 	struct ath_softc *sc = (struct ath_softc *)self;
    254 	int rv = 0, s;
    255 
    256 	s = splnet();
    257 	switch (act) {
    258 	case DVACT_ACTIVATE:
    259 		rv = EOPNOTSUPP;
    260 		break;
    261 	case DVACT_DEACTIVATE:
    262 		if_deactivate(&sc->sc_ic.ic_if);
    263 		break;
    264 	}
    265 	splx(s);
    266 	return rv;
    267 }
    268 
    269 int
    270 ath_enable(struct ath_softc *sc)
    271 {
    272 	if (ATH_IS_ENABLED(sc) == 0) {
    273 		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
    274 			printf("%s: device enable failed\n",
    275 				sc->sc_dev.dv_xname);
    276 			return (EIO);
    277 		}
    278 		sc->sc_flags |= ATH_ENABLED;
    279 	}
    280 	return (0);
    281 }
    282 
    283 void
    284 ath_disable(struct ath_softc *sc)
    285 {
    286 	if (!ATH_IS_ENABLED(sc))
    287 		return;
    288 	if (sc->sc_disable != NULL)
    289 		(*sc->sc_disable)(sc);
    290 	sc->sc_flags &= ~ATH_ENABLED;
    291 }
    292 
    293 static int
    294 sysctl_ath_verify(SYSCTLFN_ARGS)
    295 {
    296 	int error, t;
    297 	struct sysctlnode node;
    298 
    299 	node = *rnode;
    300 	t = *(int*)rnode->sysctl_data;
    301 	node.sysctl_data = &t;
    302 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
    303 	if (error || newp == NULL)
    304 		return (error);
    305 
    306 	DPRINTF(ATH_DEBUG_ANY, ("%s: t = %d, nodenum = %d, rnodenum = %d\n",
    307 	    __func__, t, node.sysctl_num, rnode->sysctl_num));
    308 
    309 	if (node.sysctl_num == ath_dwelltime_nodenum) {
    310 		if (t <= 0)
    311 			return (EINVAL);
    312 	} else if (node.sysctl_num == ath_calibrate_nodenum) {
    313 		if (t <= 0)
    314 			return (EINVAL);
    315 #ifdef AR_DEBUG
    316 	} else if (node.sysctl_num == ath_debug_nodenum) {
    317 		if (t < 0 || t > 2)
    318 			return (EINVAL);
    319 #endif /* AR_DEBUG */
    320 	} else
    321 		return (EINVAL);
    322 
    323 	*(int*)rnode->sysctl_data = t;
    324 
    325 	return (0);
    326 }
    327 
    328 /*
    329  * Setup sysctl(3) MIB, ath.*.
    330  *
    331  * TBD condition CTLFLAG_PERMANENT on being an LKM or not
    332  */
    333 SYSCTL_SETUP(sysctl_ath, "sysctl ath subtree setup")
    334 {
    335 	int rc, ath_node_num;
    336 	struct sysctlnode *node;
    337 
    338 	if ((rc = sysctl_createv(clog, 0, NULL, NULL,
    339 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL,
    340 	    NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0)
    341 		goto err;
    342 
    343 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    344 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "ath",
    345 	    SYSCTL_DESCR("ath information and options"),
    346 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
    347 		goto err;
    348 
    349 	ath_node_num = node->sysctl_num;
    350 
    351 	/* channel dwell time (ms) for AP/station scanning */
    352 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    353 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
    354 	    CTLTYPE_INT, "dwell",
    355 	    SYSCTL_DESCR("Channel dwell time (ms) for AP/station scanning"),
    356 	    sysctl_ath_verify, 0, &ath_dwelltime,
    357 	    0, CTL_HW, ath_node_num, CTL_CREATE,
    358 	    CTL_EOL)) != 0)
    359 		goto err;
    360 
    361 	ath_dwelltime_nodenum = node->sysctl_num;
    362 
    363 	/* chip calibration interval (secs) */
    364 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    365 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
    366 	    CTLTYPE_INT, "calibrate",
    367 	    SYSCTL_DESCR("Chip calibration interval (secs)"), sysctl_ath_verify,
    368 	    0, &ath_calinterval, 0, CTL_HW,
    369 	    ath_node_num, CTL_CREATE, CTL_EOL)) != 0)
    370 		goto err;
    371 
    372 	ath_calibrate_nodenum = node->sysctl_num;
    373 
    374 	/* enable/disable outdoor operation */
    375 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    376 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
    377 	    "outdoor", SYSCTL_DESCR("Enable/disable outdoor operation"),
    378 	    NULL, 0, &ath_outdoor, 0,
    379 	    CTL_HW, ath_node_num, CTL_CREATE,
    380 	    CTL_EOL)) != 0)
    381 		goto err;
    382 
    383 	ath_outdoor_nodenum = node->sysctl_num;
    384 
    385 	/* country code */
    386 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    387 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
    388 	    "countrycode", SYSCTL_DESCR("Country code"),
    389 	    NULL, 0, &ath_countrycode, 0,
    390 	    CTL_HW, ath_node_num, CTL_CREATE,
    391 	    CTL_EOL)) != 0)
    392 		goto err;
    393 
    394 	ath_countrycode_nodenum = node->sysctl_num;
    395 
    396 	/* regulatory domain */
    397 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    398 	    CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT,
    399 	    "regdomain", SYSCTL_DESCR("Regulatory domain"),
    400 	    NULL, 0, &ath_regdomain, 0,
    401 	    CTL_HW, ath_node_num, CTL_CREATE,
    402 	    CTL_EOL)) != 0)
    403 		goto err;
    404 
    405 	ath_regdomain_nodenum = node->sysctl_num;
    406 
    407 #ifdef AR_DEBUG
    408 
    409 	/* control debugging printfs */
    410 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
    411 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    412 	    "debug", SYSCTL_DESCR("Enable/disable ath debugging output"),
    413 	    sysctl_ath_verify, 0, &ath_debug, 0,
    414 	    CTL_HW, ath_node_num, CTL_CREATE,
    415 	    CTL_EOL)) != 0)
    416 		goto err;
    417 
    418 	ath_debug_nodenum = node->sysctl_num;
    419 
    420 #endif /* AR_DEBUG */
    421 	return;
    422 err:
    423 	printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc);
    424 }
    425 #endif /* __NetBSD__ */
    426 
    427 int
    428 ath_attach(u_int16_t devid, struct ath_softc *sc)
    429 {
    430 	struct ieee80211com *ic = &sc->sc_ic;
    431 	struct ifnet *ifp = &ic->ic_if;
    432 	struct ath_hal *ah;
    433 	HAL_STATUS status;
    434 	HAL_TXQ_INFO qinfo;
    435 	int error = 0;
    436 
    437 	DPRINTF(ATH_DEBUG_ANY, ("%s: devid 0x%x\n", __func__, devid));
    438 
    439 #ifdef __FreeBSD__
    440 	/* set these up early for if_printf use */
    441 	if_initname(ifp, device_get_name(sc->sc_dev),
    442 	    device_get_unit(sc->sc_dev));
    443 #else
    444 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
    445 #endif
    446 
    447 	ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
    448 	if (ah == NULL) {
    449 		if_printf(ifp, "unable to attach hardware; HAL status %u\n",
    450 			status);
    451 		error = ENXIO;
    452 		goto bad;
    453 	}
    454 	if (ah->ah_abi != HAL_ABI_VERSION) {
    455 		if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n",
    456 			ah->ah_abi, HAL_ABI_VERSION);
    457 		error = ENXIO;
    458 		goto bad;
    459 	}
    460 	if_printf(ifp, "mac %d.%d phy %d.%d",
    461 		ah->ah_macVersion, ah->ah_macRev,
    462 		ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf);
    463 	if (ah->ah_analog5GhzRev)
    464 		printf(" 5ghz radio %d.%d",
    465 			ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf);
    466 	if (ah->ah_analog2GhzRev)
    467 		printf(" 2ghz radio %d.%d",
    468 			ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf);
    469 	printf("\n");
    470 	sc->sc_ah = ah;
    471 	sc->sc_invalid = 0;	/* ready to go, enable interrupt handling */
    472 
    473 	/*
    474 	 * Collect the channel list using the default country
    475 	 * code and including outdoor channels.  The 802.11 layer
    476 	 * is resposible for filtering this list based on settings
    477 	 * like the phy mode.
    478 	 */
    479 	error = ath_getchannels(sc, ath_countrycode, ath_outdoor,
    480 	    ath_xchanmode);
    481 	if (error != 0)
    482 		goto bad;
    483 	/*
    484 	 * Copy these back; they are set as a side effect
    485 	 * of constructing the channel list.
    486 	 */
    487 	ath_hal_getregdomain(ah, &ath_regdomain);
    488 	ath_hal_getcountrycode(ah, &ath_countrycode);
    489 
    490 	/*
    491 	 * Setup rate tables for all potential media types.
    492 	 */
    493 	ath_rate_setup(sc, IEEE80211_MODE_11A);
    494 	ath_rate_setup(sc, IEEE80211_MODE_11B);
    495 	ath_rate_setup(sc, IEEE80211_MODE_11G);
    496 	ath_rate_setup(sc, IEEE80211_MODE_TURBO);
    497 
    498 	error = ath_desc_alloc(sc);
    499 	if (error != 0) {
    500 		if_printf(ifp, "failed to allocate descriptors: %d\n", error);
    501 		goto bad;
    502 	}
    503 	ATH_CALLOUT_INIT(&sc->sc_scan_ch);
    504 	ATH_CALLOUT_INIT(&sc->sc_cal_ch);
    505 
    506 #ifdef __FreeBSD__
    507 	ATH_TXBUF_LOCK_INIT(sc);
    508 	ATH_TXQ_LOCK_INIT(sc);
    509 #endif
    510 
    511 	ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc);
    512 	ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc);
    513 	ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc);
    514 	ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc);
    515 	ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc);
    516 
    517 	/*
    518 	 * For now just pre-allocate one data queue and one
    519 	 * beacon queue.  Note that the HAL handles resetting
    520 	 * them at the needed time.  Eventually we'll want to
    521 	 * allocate more tx queues for splitting management
    522 	 * frames and for QOS support.
    523 	 */
    524 	sc->sc_bhalq = ath_hal_setuptxqueue(ah,HAL_TX_QUEUE_BEACON,NULL);
    525 	if (sc->sc_bhalq == (u_int) -1) {
    526 		if_printf(ifp, "unable to setup a beacon xmit queue!\n");
    527 		goto bad2;
    528 	}
    529 
    530 	memset(&qinfo, 0, sizeof(qinfo));
    531 	qinfo.tqi_subtype = HAL_WME_AC_BE;
    532 	sc->sc_txhalq = ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_DATA, &qinfo);
    533 	if (sc->sc_txhalq == (u_int) -1) {
    534 		if_printf(ifp, "unable to setup a data xmit queue!\n");
    535 		goto bad2;
    536 	}
    537 
    538 	ifp->if_softc = sc;
    539 	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
    540 	ifp->if_start = ath_start;
    541 	ifp->if_watchdog = ath_watchdog;
    542 	ifp->if_ioctl = ath_ioctl;
    543 	ifp->if_init = ath_init;
    544 #ifdef __FreeBSD__
    545 	ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
    546 #else
    547 #if 0
    548 	ifp->if_stop = ath_stop;		/* XXX */
    549 #endif
    550 	IFQ_SET_READY(&ifp->if_snd);
    551 #endif
    552 
    553 	ic->ic_softc = sc;
    554 	ic->ic_newassoc = ath_newassoc;
    555 	/* XXX not right but it's not used anywhere important */
    556 	ic->ic_phytype = IEEE80211_T_OFDM;
    557 	ic->ic_opmode = IEEE80211_M_STA;
    558 	ic->ic_caps = IEEE80211_C_WEP		/* wep supported */
    559 		| IEEE80211_C_IBSS		/* ibss, nee adhoc, mode */
    560 		| IEEE80211_C_HOSTAP		/* hostap mode */
    561 		| IEEE80211_C_MONITOR		/* monitor mode */
    562 		| IEEE80211_C_SHPREAMBLE	/* short preamble supported */
    563 		;
    564 
    565 	/* get mac address from hardware */
    566 	ath_hal_getmac(ah, ic->ic_myaddr);
    567 
    568 #ifdef __NetBSD__
    569 	if_attach(ifp);
    570 #endif
    571 	/* call MI attach routine. */
    572 	ieee80211_ifattach(ifp);
    573 	/* override default methods */
    574 	ic->ic_node_alloc = ath_node_alloc;
    575 	sc->sc_node_free = ic->ic_node_free;
    576 	ic->ic_node_free = ath_node_free;
    577 	sc->sc_node_copy = ic->ic_node_copy;
    578 	ic->ic_node_copy = ath_node_copy;
    579 	ic->ic_node_getrssi = ath_node_getrssi;
    580 	sc->sc_newstate = ic->ic_newstate;
    581 	ic->ic_newstate = ath_newstate;
    582 	/* complete initialization */
    583 	ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status);
    584 
    585 #if NBPFILTER > 0
    586 	bpfattach2(ifp, DLT_IEEE802_11_RADIO,
    587 		sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
    588 		&sc->sc_drvbpf);
    589 #endif
    590 	/*
    591 	 * Initialize constant fields.
    592 	 * XXX make header lengths a multiple of 32-bits so subsequent
    593 	 *     headers are properly aligned; this is a kludge to keep
    594 	 *     certain applications happy.
    595 	 *
    596 	 * NB: the channel is setup each time we transition to the
    597 	 *     RUN state to avoid filling it in for each frame.
    598 	 */
    599 	sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(u_int32_t));
    600 	sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len);
    601 	sc->sc_tx_th.wt_ihdr.it_present = htole32(ATH_TX_RADIOTAP_PRESENT);
    602 
    603 	sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(u_int32_t));
    604 	sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len);
    605 	sc->sc_rx_th.wr_ihdr.it_present = htole32(ATH_RX_RADIOTAP_PRESENT);
    606 
    607 #ifdef __NetBSD__
    608 	sc->sc_flags |= ATH_ATTACHED;
    609 	/*
    610 	 * Make sure the interface is shutdown during reboot.
    611 	 */
    612 	sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc);
    613 	if (sc->sc_sdhook == NULL)
    614 		printf("%s: WARNING: unable to establish shutdown hook\n",
    615 			sc->sc_dev.dv_xname);
    616 	sc->sc_powerhook = powerhook_establish(ath_power, sc);
    617 	if (sc->sc_powerhook == NULL)
    618 		printf("%s: WARNING: unable to establish power hook\n",
    619 			sc->sc_dev.dv_xname);
    620 #endif
    621 	return 0;
    622 bad2:
    623 	ath_desc_free(sc);
    624 bad:
    625 	if (ah)
    626 		ath_hal_detach(ah);
    627 	sc->sc_invalid = 1;
    628 	return error;
    629 }
    630 
    631 int
    632 ath_detach(struct ath_softc *sc)
    633 {
    634 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    635 	ath_softc_critsect_decl(s);
    636 
    637 	if ((sc->sc_flags & ATH_ATTACHED) == 0)
    638 		return (0);
    639 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
    640 
    641 	ath_softc_critsect_begin(sc, s);
    642 	ath_stop(ifp);
    643 #if NBPFILTER > 0
    644 	bpfdetach(ifp);
    645 #endif
    646 	ath_desc_free(sc);
    647 	ath_hal_detach(sc->sc_ah);
    648 	ieee80211_ifdetach(ifp);
    649 #ifdef __NetBSD__
    650 	if_detach(ifp);
    651 #endif /* __NetBSD__ */
    652 	ath_softc_critsect_end(sc, s);
    653 #ifdef __NetBSD__
    654 	powerhook_disestablish(sc->sc_powerhook);
    655 	shutdownhook_disestablish(sc->sc_sdhook);
    656 #endif /* __NetBSD__ */
    657 #ifdef __FreeBSD__
    658 
    659 	ATH_TXBUF_LOCK_DESTROY(sc);
    660 	ATH_TXQ_LOCK_DESTROY(sc);
    661 
    662 #endif /* __FreeBSD__ */
    663 	return 0;
    664 }
    665 
    666 #ifdef __NetBSD__
    667 void
    668 ath_power(int why, void *arg)
    669 {
    670 	struct ath_softc *sc = arg;
    671 	int s;
    672 
    673 	DPRINTF(ATH_DEBUG_ANY, ("ath_power(%d)\n", why));
    674 
    675 	s = splnet();
    676 	switch (why) {
    677 	case PWR_SUSPEND:
    678 	case PWR_STANDBY:
    679 		ath_suspend(sc, why);
    680 		break;
    681 	case PWR_RESUME:
    682 		ath_resume(sc, why);
    683 		break;
    684 	case PWR_SOFTSUSPEND:
    685 	case PWR_SOFTSTANDBY:
    686 	case PWR_SOFTRESUME:
    687 		break;
    688 	}
    689 	splx(s);
    690 }
    691 #endif
    692 
    693 void
    694 ath_suspend(struct ath_softc *sc, int why)
    695 {
    696 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    697 
    698 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
    699 
    700 	ath_stop(ifp);
    701 	if (sc->sc_power != NULL)
    702 		(*sc->sc_power)(sc, why);
    703 }
    704 
    705 void
    706 ath_resume(struct ath_softc *sc, int why)
    707 {
    708 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    709 
    710 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
    711 
    712 	if (ifp->if_flags & IFF_UP) {
    713 		ath_init(ifp);
    714 #if 0
    715 		(void)ath_intr(sc);
    716 #endif
    717 		if (sc->sc_power != NULL)
    718 			(*sc->sc_power)(sc, why);
    719 		if (ifp->if_flags & IFF_RUNNING)
    720 			ath_start(ifp);
    721 	}
    722 }
    723 
    724 #ifdef __NetBSD__
    725 void
    726 ath_shutdown(void *arg)
    727 {
    728 	struct ath_softc *sc = arg;
    729 
    730 	ath_stop(&sc->sc_ic.ic_if);
    731 }
    732 #else
    733 void
    734 ath_shutdown(struct ath_softc *sc)
    735 {
    736 #if 1
    737 	return;
    738 #else
    739 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    740 
    741 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags));
    742 
    743 	ath_stop(ifp);
    744 #endif
    745 }
    746 #endif
    747 
    748 #ifdef __NetBSD__
    749 int
    750 ath_intr(void *arg)
    751 {
    752 	return ath_intr1((struct ath_softc *)arg);
    753 }
    754 #else
    755 void
    756 ath_intr(void *arg)
    757 {
    758 	(void)ath_intr1((struct ath_softc *)arg);
    759 }
    760 #endif
    761 
    762 static int
    763 ath_intr1(struct ath_softc *sc)
    764 {
    765 	struct ieee80211com *ic = &sc->sc_ic;
    766 	struct ifnet *ifp = &ic->ic_if;
    767 	struct ath_hal *ah = sc->sc_ah;
    768 	HAL_INT status;
    769 
    770 	if (sc->sc_invalid) {
    771 		/*
    772 		 * The hardware is not ready/present, don't touch anything.
    773 		 * Note this can happen early on if the IRQ is shared.
    774 		 */
    775 		DPRINTF(ATH_DEBUG_ANY, ("%s: invalid; ignored\n", __func__));
    776 		return 0;
    777 	}
    778 	if (!ath_hal_intrpend(ah))		/* shared irq, not for us */
    779 		return 0;
    780 	if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
    781 		DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n",
    782 			__func__, ifp->if_flags));
    783 		ath_hal_getisr(ah, &status);	/* clear ISR */
    784 		ath_hal_intrset(ah, 0);		/* disable further intr's */
    785 		return 1; /* XXX */
    786 	}
    787 	ath_hal_getisr(ah, &status);		/* NB: clears ISR too */
    788 	DPRINTF(ATH_DEBUG_INTR, ("%s: status 0x%x\n", __func__, status));
    789 	status &= sc->sc_imask;			/* discard unasked for bits */
    790 	if (status & HAL_INT_FATAL) {
    791 		sc->sc_stats.ast_hardware++;
    792 		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
    793 		ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask);
    794 	} else if (status & HAL_INT_RXORN) {
    795 		sc->sc_stats.ast_rxorn++;
    796 		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
    797 		ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask);
    798 	} else {
    799 		if (status & HAL_INT_RXEOL) {
    800 			/*
    801 			 * NB: the hardware should re-read the link when
    802 			 *     RXE bit is written, but it doesn't work at
    803 			 *     least on older hardware revs.
    804 			 */
    805 			sc->sc_stats.ast_rxeol++;
    806 			sc->sc_rxlink = NULL;
    807 		}
    808 		if (status & HAL_INT_TXURN) {
    809 			sc->sc_stats.ast_txurn++;
    810 			/* bump tx trigger level */
    811 			ath_hal_updatetxtriglevel(ah, AH_TRUE);
    812 		}
    813 		if (status & HAL_INT_RX)
    814 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask);
    815 		if (status & HAL_INT_TX)
    816 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask);
    817 		if (status & HAL_INT_SWBA) {
    818 			/*
    819 			 * Handle beacon transmission directly; deferring
    820 			 * this is too slow to meet timing constraints
    821 			 * under load.
    822 			 */
    823 			ath_beacon_proc(sc, 0);
    824 		}
    825 		if (status & HAL_INT_BMISS) {
    826 			sc->sc_stats.ast_bmiss++;
    827 			ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask);
    828 		}
    829 	}
    830 	return 1;
    831 }
    832 
    833 static void
    834 ath_fatal_proc(void *arg, int pending)
    835 {
    836 	struct ath_softc *sc = arg;
    837 
    838 	device_printf(sc->sc_dev, "hardware error; resetting\n");
    839 	ath_reset(sc);
    840 }
    841 
    842 static void
    843 ath_rxorn_proc(void *arg, int pending)
    844 {
    845 	struct ath_softc *sc = arg;
    846 
    847 	device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n");
    848 	ath_reset(sc);
    849 }
    850 
    851 static void
    852 ath_bmiss_proc(void *arg, int pending)
    853 {
    854 	struct ath_softc *sc = arg;
    855 	struct ieee80211com *ic = &sc->sc_ic;
    856 
    857 	DPRINTF(ATH_DEBUG_ANY, ("%s: pending %u\n", __func__, pending));
    858 	if (ic->ic_opmode != IEEE80211_M_STA)
    859 		return;
    860 	if (ic->ic_state == IEEE80211_S_RUN) {
    861 		/*
    862 		 * Rather than go directly to scan state, try to
    863 		 * reassociate first.  If that fails then the state
    864 		 * machine will drop us into scanning after timing
    865 		 * out waiting for a probe response.
    866 		 */
    867 		ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1);
    868 	}
    869 }
    870 
    871 static u_int
    872 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan)
    873 {
    874 	enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan);
    875 
    876 	switch (mode) {
    877 	case IEEE80211_MODE_AUTO:
    878 		return 0;
    879 	case IEEE80211_MODE_11A:
    880 		return CHANNEL_A;
    881 	case IEEE80211_MODE_11B:
    882 		return CHANNEL_B;
    883 	case IEEE80211_MODE_11G:
    884 		return CHANNEL_PUREG;
    885 	case IEEE80211_MODE_TURBO:
    886 		return CHANNEL_T;
    887 	default:
    888 		panic("%s: unsupported mode %d\n", __func__, mode);
    889 		return 0;
    890 	}
    891 }
    892 
    893 #ifdef __NetBSD__
    894 static int
    895 ath_init(struct ifnet *ifp)
    896 {
    897 	return ath_init1((struct ath_softc *)ifp->if_softc);
    898 }
    899 #else
    900 static void
    901 ath_init(void *arg)
    902 {
    903 	(void)ath_init1((struct ath_softc *)arg);
    904 }
    905 #endif
    906 
    907 static int
    908 ath_init1(struct ath_softc *sc)
    909 {
    910 	struct ieee80211com *ic = &sc->sc_ic;
    911 	struct ifnet *ifp = &ic->ic_if;
    912 	struct ieee80211_node *ni;
    913 	enum ieee80211_phymode mode;
    914 	struct ath_hal *ah = sc->sc_ah;
    915 	HAL_STATUS status;
    916 	HAL_CHANNEL hchan;
    917 	int error = 0;
    918 	ath_softc_critsect_decl(s);
    919 
    920 	DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n",
    921 		__func__, ifp->if_flags));
    922 
    923 #ifdef __NetBSD__
    924 	if ((error = ath_enable(sc)) != 0)
    925 		return error;
    926 #endif
    927 
    928 	ath_softc_critsect_begin(sc, s);
    929 	/*
    930 	 * Stop anything previously setup.  This is safe
    931 	 * whether this is the first time through or not.
    932 	 */
    933 	ath_stop(ifp);
    934 
    935 	/*
    936 	 * The basic interface to setting the hardware in a good
    937 	 * state is ``reset''.  On return the hardware is known to
    938 	 * be powered up and with interrupts disabled.  This must
    939 	 * be followed by initialization of the appropriate bits
    940 	 * and then setup of the interrupt mask.
    941 	 */
    942 	hchan.channel = ic->ic_ibss_chan->ic_freq;
    943 	hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan);
    944 	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) {
    945 		if_printf(ifp, "unable to reset hardware; hal status %u\n",
    946 			status);
    947 		error = -1;
    948 		goto done;
    949 	}
    950 
    951 	/*
    952 	 * Setup the hardware after reset: the key cache
    953 	 * is filled as needed and the receive engine is
    954 	 * set going.  Frame transmit is handled entirely
    955 	 * in the frame output path; there's nothing to do
    956 	 * here except setup the interrupt mask.
    957 	 */
    958 	if (ic->ic_flags & IEEE80211_F_PRIVACY)
    959 		ath_initkeytable(sc);
    960 	if ((error = ath_startrecv(sc)) != 0) {
    961 		if_printf(ifp, "unable to start recv logic\n");
    962 		goto done;
    963 	}
    964 
    965 	/*
    966 	 * Enable interrupts.
    967 	 */
    968 	sc->sc_imask = HAL_INT_RX | HAL_INT_TX
    969 		  | HAL_INT_RXEOL | HAL_INT_RXORN
    970 		  | HAL_INT_FATAL | HAL_INT_GLOBAL;
    971 	ath_hal_intrset(ah, sc->sc_imask);
    972 
    973 	ifp->if_flags |= IFF_RUNNING;
    974 	ic->ic_state = IEEE80211_S_INIT;
    975 
    976 	/*
    977 	 * The hardware should be ready to go now so it's safe
    978 	 * to kick the 802.11 state machine as it's likely to
    979 	 * immediately call back to us to send mgmt frames.
    980 	 */
    981 	ni = ic->ic_bss;
    982 	ni->ni_chan = ic->ic_ibss_chan;
    983 	mode = ieee80211_chan2mode(ic, ni->ni_chan);
    984 	if (mode != sc->sc_curmode)
    985 		ath_setcurmode(sc, mode);
    986 	if (ic->ic_opmode != IEEE80211_M_MONITOR)
    987 		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
    988 	else
    989 		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
    990 done:
    991 	ath_softc_critsect_end(sc, s);
    992 	return error;
    993 }
    994 
    995 static void
    996 ath_stop(struct ifnet *ifp)
    997 {
    998 	struct ieee80211com *ic = (struct ieee80211com *) ifp;
    999 	struct ath_softc *sc = ifp->if_softc;
   1000 	struct ath_hal *ah = sc->sc_ah;
   1001 	ath_softc_critsect_decl(s);
   1002 
   1003 	DPRINTF(ATH_DEBUG_ANY, ("%s: invalid %u if_flags 0x%x\n",
   1004 		__func__, sc->sc_invalid, ifp->if_flags));
   1005 
   1006 	ath_softc_critsect_begin(sc, s);
   1007 	if (ifp->if_flags & IFF_RUNNING) {
   1008 		/*
   1009 		 * Shutdown the hardware and driver:
   1010 		 *    disable interrupts
   1011 		 *    turn off timers
   1012 		 *    clear transmit machinery
   1013 		 *    clear receive machinery
   1014 		 *    drain and release tx queues
   1015 		 *    reclaim beacon resources
   1016 		 *    reset 802.11 state machine
   1017 		 *    power down hardware
   1018 		 *
   1019 		 * Note that some of this work is not possible if the
   1020 		 * hardware is gone (invalid).
   1021 		 */
   1022 		ifp->if_flags &= ~IFF_RUNNING;
   1023 		ifp->if_timer = 0;
   1024 		if (!sc->sc_invalid)
   1025 			ath_hal_intrset(ah, 0);
   1026 		ath_draintxq(sc);
   1027 		if (!sc->sc_invalid)
   1028 			ath_stoprecv(sc);
   1029 		else
   1030 			sc->sc_rxlink = NULL;
   1031 #ifdef __FreeBSD__
   1032 		IF_DRAIN(&ifp->if_snd);
   1033 #else
   1034 		IF_PURGE(&ifp->if_snd);
   1035 #endif
   1036 		ath_beacon_free(sc);
   1037 		ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
   1038 		if (!sc->sc_invalid) {
   1039 			ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0);
   1040 		}
   1041 #ifdef __NetBSD__
   1042 		ath_disable(sc);
   1043 #endif
   1044 	}
   1045 	ath_softc_critsect_end(sc, s);
   1046 }
   1047 
   1048 /*
   1049  * Reset the hardware w/o losing operational state.  This is
   1050  * basically a more efficient way of doing ath_stop, ath_init,
   1051  * followed by state transitions to the current 802.11
   1052  * operational state.  Used to recover from errors rx overrun
   1053  * and to reset the hardware when rf gain settings must be reset.
   1054  */
   1055 static void
   1056 ath_reset(struct ath_softc *sc)
   1057 {
   1058 	struct ieee80211com *ic = &sc->sc_ic;
   1059 	struct ifnet *ifp = &ic->ic_if;
   1060 	struct ath_hal *ah = sc->sc_ah;
   1061 	struct ieee80211_channel *c;
   1062 	HAL_STATUS status;
   1063 	HAL_CHANNEL hchan;
   1064 
   1065 	/*
   1066 	 * Convert to a HAL channel description with the flags
   1067 	 * constrained to reflect the current operating mode.
   1068 	 */
   1069 	c = ic->ic_ibss_chan;
   1070 	hchan.channel = c->ic_freq;
   1071 	hchan.channelFlags = ath_chan2flags(ic, c);
   1072 
   1073 	ath_hal_intrset(ah, 0);		/* disable interrupts */
   1074 	ath_draintxq(sc);		/* stop xmit side */
   1075 	ath_stoprecv(sc);		/* stop recv side */
   1076 	/* NB: indicate channel change so we do a full reset */
   1077 	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status))
   1078 		if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
   1079 			__func__, status);
   1080 	ath_hal_intrset(ah, sc->sc_imask);
   1081 	if (ath_startrecv(sc) != 0)	/* restart recv */
   1082 		if_printf(ifp, "%s: unable to start recv logic\n", __func__);
   1083 	ath_start(ifp);			/* restart xmit */
   1084 	if (ic->ic_state == IEEE80211_S_RUN)
   1085 		ath_beacon_config(sc);	/* restart beacons */
   1086 }
   1087 
   1088 static void
   1089 ath_start(struct ifnet *ifp)
   1090 {
   1091 	struct ath_softc *sc = ifp->if_softc;
   1092 	struct ath_hal *ah = sc->sc_ah;
   1093 	struct ieee80211com *ic = &sc->sc_ic;
   1094 	struct ieee80211_node *ni;
   1095 	struct ath_buf *bf;
   1096 	struct mbuf *m;
   1097 	struct ieee80211_frame *wh;
   1098 	ath_txbuf_critsect_decl(s);
   1099 
   1100 	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
   1101 		return;
   1102 	for (;;) {
   1103 		/*
   1104 		 * Grab a TX buffer and associated resources.
   1105 		 */
   1106 		ath_txbuf_critsect_begin(sc, s);
   1107 		bf = TAILQ_FIRST(&sc->sc_txbuf);
   1108 		if (bf != NULL)
   1109 			TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
   1110 		ath_txbuf_critsect_end(sc, s);
   1111 		if (bf == NULL) {
   1112 			DPRINTF(ATH_DEBUG_ANY, ("%s: out of xmit buffers\n",
   1113 				__func__));
   1114 			sc->sc_stats.ast_tx_qstop++;
   1115 			ifp->if_flags |= IFF_OACTIVE;
   1116 			break;
   1117 		}
   1118 		/*
   1119 		 * Poll the management queue for frames; they
   1120 		 * have priority over normal data frames.
   1121 		 */
   1122 		IF_DEQUEUE(&ic->ic_mgtq, m);
   1123 		if (m == NULL) {
   1124 			/*
   1125 			 * No data frames go out unless we're associated.
   1126 			 */
   1127 			if (ic->ic_state != IEEE80211_S_RUN) {
   1128 				DPRINTF(ATH_DEBUG_ANY,
   1129 					("%s: ignore data packet, state %u\n",
   1130 					__func__, ic->ic_state));
   1131 				sc->sc_stats.ast_tx_discard++;
   1132 				ath_txbuf_critsect_begin(sc, s);
   1133 				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1134 				ath_txbuf_critsect_end(sc, s);
   1135 				break;
   1136 			}
   1137 			IF_DEQUEUE(&ifp->if_snd, m);
   1138 			if (m == NULL) {
   1139 				ath_txbuf_critsect_begin(sc, s);
   1140 				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1141 				ath_txbuf_critsect_end(sc, s);
   1142 				break;
   1143 			}
   1144 			ifp->if_opackets++;
   1145 
   1146 #ifdef __NetBSD__
   1147 #if NBPFILTER > 0
   1148 			if (ifp->if_bpf)
   1149 				bpf_mtap(ifp->if_bpf, m);
   1150 #endif
   1151 #endif
   1152 #ifdef __FreeBSD__
   1153 			BPF_MTAP(ifp, m);
   1154 #endif
   1155 			/*
   1156 			 * Encapsulate the packet in prep for transmission.
   1157 			 */
   1158 			m = ieee80211_encap(ifp, m, &ni);
   1159 			if (m == NULL) {
   1160 				DPRINTF(ATH_DEBUG_ANY,
   1161 					("%s: encapsulation failure\n",
   1162 					__func__));
   1163 				sc->sc_stats.ast_tx_encap++;
   1164 				goto bad;
   1165 			}
   1166 			wh = mtod(m, struct ieee80211_frame *);
   1167 		} else {
   1168 			/*
   1169 			 * Hack!  The referenced node pointer is in the
   1170 			 * rcvif field of the packet header.  This is
   1171 			 * placed there by ieee80211_mgmt_output because
   1172 			 * we need to hold the reference with the frame
   1173 			 * and there's no other way (other than packet
   1174 			 * tags which we consider too expensive to use)
   1175 			 * to pass it along.
   1176 			 */
   1177 			ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
   1178 			m->m_pkthdr.rcvif = NULL;
   1179 
   1180 			wh = mtod(m, struct ieee80211_frame *);
   1181 			if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
   1182 			    IEEE80211_FC0_SUBTYPE_PROBE_RESP) {
   1183 				/* fill time stamp */
   1184 				u_int64_t tsf;
   1185 				u_int32_t *tstamp;
   1186 
   1187 				tsf = ath_hal_gettsf64(ah);
   1188 				/* XXX: adjust 100us delay to xmit */
   1189 				tsf += 100;
   1190 				tstamp = (u_int32_t *)&wh[1];
   1191 				tstamp[0] = htole32(tsf & 0xffffffff);
   1192 				tstamp[1] = htole32(tsf >> 32);
   1193 			}
   1194 			sc->sc_stats.ast_tx_mgmt++;
   1195 		}
   1196 
   1197 		if (ath_tx_start(sc, ni, bf, m)) {
   1198 	bad:
   1199 			ath_txbuf_critsect_begin(sc, s);
   1200 			TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1201 			ath_txbuf_critsect_end(sc, s);
   1202 			ifp->if_oerrors++;
   1203 			if (ni && ni != ic->ic_bss)
   1204 				ieee80211_free_node(ic, ni);
   1205 			continue;
   1206 		}
   1207 
   1208 		sc->sc_tx_timer = 5;
   1209 		ifp->if_timer = 1;
   1210 	}
   1211 }
   1212 
   1213 static int
   1214 ath_media_change(struct ifnet *ifp)
   1215 {
   1216 	int error;
   1217 
   1218 	error = ieee80211_media_change(ifp);
   1219 	if (error == ENETRESET) {
   1220 		if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
   1221 		    (IFF_RUNNING|IFF_UP))
   1222 			ath_init(ifp);		/* XXX lose error */
   1223 		error = 0;
   1224 	}
   1225 	return error;
   1226 }
   1227 
   1228 static void
   1229 ath_watchdog(struct ifnet *ifp)
   1230 {
   1231 	struct ath_softc *sc = ifp->if_softc;
   1232 	struct ieee80211com *ic = &sc->sc_ic;
   1233 
   1234 	ifp->if_timer = 0;
   1235 	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
   1236 		return;
   1237 	if (sc->sc_tx_timer) {
   1238 		if (--sc->sc_tx_timer == 0) {
   1239 			if_printf(ifp, "device timeout\n");
   1240 			ath_reset(sc);
   1241 			ifp->if_oerrors++;
   1242 			sc->sc_stats.ast_watchdog++;
   1243 			return;
   1244 		}
   1245 		ifp->if_timer = 1;
   1246 	}
   1247 	if (ic->ic_fixed_rate == -1) {
   1248 		/*
   1249 		 * Run the rate control algorithm if we're not
   1250 		 * locked at a fixed rate.
   1251 		 */
   1252 		if (ic->ic_opmode == IEEE80211_M_STA)
   1253 			ath_rate_ctl(sc, ic->ic_bss);
   1254 		else
   1255 			ieee80211_iterate_nodes(ic, ath_rate_ctl, sc);
   1256 	}
   1257 	ieee80211_watchdog(ifp);
   1258 }
   1259 
   1260 static int
   1261 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
   1262 {
   1263 	struct ath_softc *sc = ifp->if_softc;
   1264 	struct ifreq *ifr = (struct ifreq *)data;
   1265 	int error = 0;
   1266 	ath_softc_critsect_decl(s);
   1267 
   1268 	ath_softc_critsect_begin(sc, s);
   1269 	switch (cmd) {
   1270 	case SIOCSIFFLAGS:
   1271 		if (ifp->if_flags & IFF_UP) {
   1272 			if (ifp->if_flags & IFF_RUNNING) {
   1273 				/*
   1274 				 * To avoid rescanning another access point,
   1275 				 * do not call ath_init() here.  Instead,
   1276 				 * only reflect promisc mode settings.
   1277 				 */
   1278 				ath_mode_init(sc);
   1279 			} else {
   1280 				/*
   1281 				 * Beware of being called during detach to
   1282 				 * reset promiscuous mode.  In that case we
   1283 				 * will still be marked UP but not RUNNING.
   1284 				 * However trying to re-init the interface
   1285 				 * is the wrong thing to do as we've already
   1286 				 * torn down much of our state.  There's
   1287 				 * probably a better way to deal with this.
   1288 				 */
   1289 				if (!sc->sc_invalid)
   1290 					ath_init(ifp);	/* XXX lose error */
   1291 			}
   1292 		} else
   1293 			ath_stop(ifp);
   1294 		break;
   1295 	case SIOCADDMULTI:
   1296 	case SIOCDELMULTI:
   1297 #ifdef __FreeBSD__
   1298 		/*
   1299 		 * The upper layer has already installed/removed
   1300 		 * the multicast address(es), just recalculate the
   1301 		 * multicast filter for the card.
   1302 		 */
   1303 		if (ifp->if_flags & IFF_RUNNING)
   1304 			ath_mode_init(sc);
   1305 #endif
   1306 #ifdef __NetBSD__
   1307 		error = (cmd == SIOCADDMULTI) ?
   1308 		    ether_addmulti(ifr, &sc->sc_ic.ic_ec) :
   1309 		    ether_delmulti(ifr, &sc->sc_ic.ic_ec);
   1310 		if (error == ENETRESET) {
   1311 			if (ifp->if_flags & IFF_RUNNING)
   1312 				ath_mode_init(sc);
   1313 			error = 0;
   1314 		}
   1315 #endif
   1316 		break;
   1317 	case SIOCGATHSTATS:
   1318 		error = copyout(&sc->sc_stats,
   1319 				ifr->ifr_data, sizeof (sc->sc_stats));
   1320 		break;
   1321 	case SIOCGATHDIAG: {
   1322 #if 0	/* XXX punt */
   1323 		struct ath_diag *ad = (struct ath_diag *)data;
   1324 		struct ath_hal *ah = sc->sc_ah;
   1325 		void *data;
   1326 		u_int size;
   1327 
   1328 		if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) {
   1329 			if (size < ad->ad_size)
   1330 				ad->ad_size = size;
   1331 			if (data)
   1332 				error = copyout(data, ad->ad_data, ad->ad_size);
   1333 		} else
   1334 			error = EINVAL;
   1335 #else
   1336 		error = EINVAL;
   1337 #endif
   1338 		break;
   1339 	}
   1340 	default:
   1341 		error = ieee80211_ioctl(ifp, cmd, data);
   1342 		if (error == ENETRESET) {
   1343 			if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
   1344 			    (IFF_RUNNING|IFF_UP))
   1345 				ath_init(ifp);		/* XXX lose error */
   1346 			error = 0;
   1347 		}
   1348 		break;
   1349 	}
   1350 	ath_softc_critsect_end(sc, s);
   1351 	return error;
   1352 }
   1353 
   1354 /*
   1355  * Fill the hardware key cache with key entries.
   1356  */
   1357 static void
   1358 ath_initkeytable(struct ath_softc *sc)
   1359 {
   1360 	struct ieee80211com *ic = &sc->sc_ic;
   1361 	struct ath_hal *ah = sc->sc_ah;
   1362 	int i;
   1363 
   1364 	/* XXX maybe should reset all keys when !WEPON */
   1365 	for (i = 0; i < IEEE80211_WEP_NKID; i++) {
   1366 		struct ieee80211_wepkey *k = &ic->ic_nw_keys[i];
   1367 		if (k->wk_len == 0)
   1368 			ath_hal_keyreset(ah, i);
   1369 		else {
   1370 			HAL_KEYVAL hk;
   1371 
   1372 			memset(&hk, 0, sizeof(hk));
   1373 			hk.kv_type = HAL_CIPHER_WEP;
   1374 			hk.kv_len = k->wk_len;
   1375 			memcpy(hk.kv_val, k->wk_key, k->wk_len);
   1376 			/* XXX return value */
   1377 			ath_hal_keyset(ah, i, &hk);
   1378 		}
   1379 	}
   1380 }
   1381 
   1382 static void
   1383 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2])
   1384 {
   1385 	u_int32_t val;
   1386 	u_int8_t pos;
   1387 
   1388 	val = LE_READ_4(dl + 0);
   1389 	pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
   1390 	val = LE_READ_4(dl + 3);
   1391 	pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
   1392 	pos &= 0x3f;
   1393 	(*mfilt)[pos / 32] |= (1 << (pos % 32));
   1394 }
   1395 
   1396 #ifdef __FreeBSD__
   1397 static void
   1398 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
   1399 {
   1400 	struct ieee80211com *ic = &sc->sc_ic;
   1401 	struct ifnet *ifp = &ic->ic_if;
   1402 	struct ifmultiaddr *ifma;
   1403 
   1404 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
   1405 		caddr_t dl;
   1406 
   1407 		/* calculate XOR of eight 6bit values */
   1408 		dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
   1409 		ath_mcastfilter_accum(dl, &mfilt);
   1410 	}
   1411 }
   1412 #else
   1413 static void
   1414 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
   1415 {
   1416 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1417 	struct ether_multi *enm;
   1418 	struct ether_multistep estep;
   1419 
   1420 	ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm);
   1421 	while (enm != NULL) {
   1422 		/* XXX Punt on ranges. */
   1423 		if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) {
   1424 			(*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0);
   1425 			ifp->if_flags |= IFF_ALLMULTI;
   1426 			return;
   1427 		}
   1428 		ath_mcastfilter_accum(enm->enm_addrlo, mfilt);
   1429 		ETHER_NEXT_MULTI(estep, enm);
   1430 	}
   1431 	ifp->if_flags &= ~IFF_ALLMULTI;
   1432 }
   1433 #endif
   1434 
   1435 /*
   1436  * Calculate the receive filter according to the
   1437  * operating mode and state:
   1438  *
   1439  * o always accept unicast, broadcast, and multicast traffic
   1440  * o maintain current state of phy error reception
   1441  * o probe request frames are accepted only when operating in
   1442  *   hostap, adhoc, or monitor modes
   1443  * o enable promiscuous mode according to the interface state
   1444  * o accept beacons:
   1445  *   - when operating in adhoc mode so the 802.11 layer creates
   1446  *     node table entries for peers,
   1447  *   - when operating in station mode for collecting rssi data when
   1448  *     the station is otherwise quiet, or
   1449  *   - when scanning
   1450  */
   1451 static u_int32_t
   1452 ath_calcrxfilter(struct ath_softc *sc)
   1453 {
   1454 	struct ieee80211com *ic = &sc->sc_ic;
   1455 	struct ath_hal *ah = sc->sc_ah;
   1456 	struct ifnet *ifp = &ic->ic_if;
   1457 	u_int32_t rfilt;
   1458 
   1459 	rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
   1460 	      | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
   1461 	if (ic->ic_opmode != IEEE80211_M_STA)
   1462 		rfilt |= HAL_RX_FILTER_PROBEREQ;
   1463 	if (ic->ic_opmode != IEEE80211_M_AHDEMO)
   1464 		rfilt |= HAL_RX_FILTER_BEACON;
   1465 	if (ifp->if_flags & IFF_PROMISC)
   1466 		rfilt |= HAL_RX_FILTER_PROM;
   1467 	return rfilt;
   1468 }
   1469 
   1470 static void
   1471 ath_mode_init(struct ath_softc *sc)
   1472 {
   1473 #ifdef __FreeBSD__
   1474 	struct ieee80211com *ic = &sc->sc_ic;
   1475 #endif
   1476 	struct ath_hal *ah = sc->sc_ah;
   1477 	u_int32_t rfilt, mfilt[2];
   1478 
   1479 	/* configure rx filter */
   1480 	rfilt = ath_calcrxfilter(sc);
   1481 	ath_hal_setrxfilter(ah, rfilt);
   1482 
   1483 	/* configure operational mode */
   1484 	ath_hal_setopmode(ah);
   1485 
   1486 	/* calculate and install multicast filter */
   1487 #ifdef __FreeBSD__
   1488 	if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) {
   1489 		mfilt[0] = mfilt[1] = 0;
   1490 		ath_mcastfilter_compute(sc, &mfilt);
   1491 	} else {
   1492 		mfilt[0] = mfilt[1] = ~0;
   1493 	}
   1494 #endif
   1495 #ifdef __NetBSD__
   1496 	mfilt[0] = mfilt[1] = 0;
   1497 	ath_mcastfilter_compute(sc, &mfilt);
   1498 #endif
   1499 	ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
   1500 	DPRINTF(ATH_DEBUG_MODE, ("%s: RX filter 0x%x, MC filter %08x:%08x\n",
   1501 		__func__, rfilt, mfilt[0], mfilt[1]));
   1502 }
   1503 
   1504 #ifdef __FreeBSD__
   1505 static void
   1506 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error)
   1507 {
   1508 	struct ath_buf *bf = arg;
   1509 
   1510 	KASSERT(nseg <= ATH_MAX_SCATTER,
   1511 		("ath_mbuf_load_cb: too many DMA segments %u", nseg));
   1512 	bf->bf_mapsize = mapsize;
   1513 	bf->bf_nseg = nseg;
   1514 	bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0]));
   1515 }
   1516 #endif /* __FreeBSD__ */
   1517 
   1518 static struct mbuf *
   1519 ath_getmbuf(int flags, int type, u_int pktlen)
   1520 {
   1521 	struct mbuf *m;
   1522 
   1523 	KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen));
   1524 #ifdef __FreeBSD__
   1525 	if (pktlen <= MHLEN)
   1526 		MGETHDR(m, flags, type);
   1527 	else
   1528 		m = m_getcl(flags, type, M_PKTHDR);
   1529 #else
   1530 	MGETHDR(m, flags, type);
   1531 	if (m != NULL && pktlen > MHLEN)
   1532 		MCLGET(m, flags);
   1533 #endif
   1534 	return m;
   1535 }
   1536 
   1537 static int
   1538 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
   1539 {
   1540 	struct ieee80211com *ic = &sc->sc_ic;
   1541 	struct ifnet *ifp = &ic->ic_if;
   1542 	struct ath_hal *ah = sc->sc_ah;
   1543 	struct ieee80211_frame *wh;
   1544 	struct ath_buf *bf;
   1545 	struct ath_desc *ds;
   1546 	struct mbuf *m;
   1547 	int error, pktlen;
   1548 	u_int8_t *frm, rate;
   1549 	u_int16_t capinfo;
   1550 	struct ieee80211_rateset *rs;
   1551 	const HAL_RATE_TABLE *rt;
   1552 
   1553 	bf = sc->sc_bcbuf;
   1554 	if (bf->bf_m != NULL) {
   1555 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1556 		m_freem(bf->bf_m);
   1557 		bf->bf_m = NULL;
   1558 		bf->bf_node = NULL;
   1559 	}
   1560 	/*
   1561 	 * NB: the beacon data buffer must be 32-bit aligned;
   1562 	 * we assume the mbuf routines will return us something
   1563 	 * with this alignment (perhaps should assert).
   1564 	 */
   1565 	rs = &ni->ni_rates;
   1566 	pktlen = sizeof (struct ieee80211_frame)
   1567 	       + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6;
   1568 	if (rs->rs_nrates > IEEE80211_RATE_SIZE)
   1569 		pktlen += 2;
   1570 	m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen);
   1571 	if (m == NULL) {
   1572 		DPRINTF(ATH_DEBUG_BEACON,
   1573 			("%s: cannot get mbuf/cluster; size %u\n",
   1574 			__func__, pktlen));
   1575 		sc->sc_stats.ast_be_nombuf++;
   1576 		return ENOMEM;
   1577 	}
   1578 
   1579 	wh = mtod(m, struct ieee80211_frame *);
   1580 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
   1581 	    IEEE80211_FC0_SUBTYPE_BEACON;
   1582 	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
   1583 	*(u_int16_t *)wh->i_dur = 0;
   1584 	memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
   1585 	memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
   1586 	memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
   1587 	*(u_int16_t *)wh->i_seq = 0;
   1588 
   1589 	/*
   1590 	 * beacon frame format
   1591 	 *	[8] time stamp
   1592 	 *	[2] beacon interval
   1593 	 *	[2] cabability information
   1594 	 *	[tlv] ssid
   1595 	 *	[tlv] supported rates
   1596 	 *	[tlv] parameter set (IBSS)
   1597 	 *	[tlv] extended supported rates
   1598 	 */
   1599 	frm = (u_int8_t *)&wh[1];
   1600 	memset(frm, 0, 8);	/* timestamp is set by hardware */
   1601 	frm += 8;
   1602 	*(u_int16_t *)frm = htole16(ni->ni_intval);
   1603 	frm += 2;
   1604 	if (ic->ic_opmode == IEEE80211_M_IBSS)
   1605 		capinfo = IEEE80211_CAPINFO_IBSS;
   1606 	else
   1607 		capinfo = IEEE80211_CAPINFO_ESS;
   1608 	if (ic->ic_flags & IEEE80211_F_PRIVACY)
   1609 		capinfo |= IEEE80211_CAPINFO_PRIVACY;
   1610 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
   1611 	    IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
   1612 		capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
   1613 	if (ic->ic_flags & IEEE80211_F_SHSLOT)
   1614 		capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
   1615 	*(u_int16_t *)frm = htole16(capinfo);
   1616 	frm += 2;
   1617 	*frm++ = IEEE80211_ELEMID_SSID;
   1618 	*frm++ = ni->ni_esslen;
   1619 	memcpy(frm, ni->ni_essid, ni->ni_esslen);
   1620 	frm += ni->ni_esslen;
   1621 	frm = ieee80211_add_rates(frm, rs);
   1622 	*frm++ = IEEE80211_ELEMID_DSPARMS;
   1623 	*frm++ = 1;
   1624 	*frm++ = ieee80211_chan2ieee(ic, ni->ni_chan);
   1625 	if (ic->ic_opmode == IEEE80211_M_IBSS) {
   1626 		*frm++ = IEEE80211_ELEMID_IBSSPARMS;
   1627 		*frm++ = 2;
   1628 		*frm++ = 0; *frm++ = 0;		/* TODO: ATIM window */
   1629 	} else {
   1630 		/* TODO: TIM */
   1631 		*frm++ = IEEE80211_ELEMID_TIM;
   1632 		*frm++ = 4;	/* length */
   1633 		*frm++ = 0;	/* DTIM count */
   1634 		*frm++ = 1;	/* DTIM period */
   1635 		*frm++ = 0;	/* bitmap control */
   1636 		*frm++ = 0;	/* Partial Virtual Bitmap (variable length) */
   1637 	}
   1638 	frm = ieee80211_add_xrates(frm, rs);
   1639 	m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
   1640 	KASSERT(m->m_pkthdr.len <= pktlen,
   1641 		("beacon bigger than expected, len %u calculated %u",
   1642 		m->m_pkthdr.len, pktlen));
   1643 
   1644 	DPRINTF(ATH_DEBUG_BEACON, ("%s: m %p len %u\n", __func__, m, m->m_len));
   1645 	error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT);
   1646 	if (error != 0) {
   1647 		m_freem(m);
   1648 		return error;
   1649 	}
   1650 	KASSERT(bf->bf_nseg == 1,
   1651 		("%s: multi-segment packet; nseg %u", __func__, bf->bf_nseg));
   1652 	bf->bf_m = m;
   1653 
   1654 	/* setup descriptors */
   1655 	ds = bf->bf_desc;
   1656 
   1657 	ds->ds_link = 0;
   1658 	ds->ds_data = bf->bf_segs[0].ds_addr;
   1659 
   1660 	DPRINTF(ATH_DEBUG_ANY, ("%s: segaddr %p seglen %u\n", __func__,
   1661 	    (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len));
   1662 
   1663 	/*
   1664 	 * Calculate rate code.
   1665 	 * XXX everything at min xmit rate
   1666 	 */
   1667 	rt = sc->sc_currates;
   1668 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
   1669 	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
   1670 		rate = rt->info[0].rateCode | rt->info[0].shortPreamble;
   1671 	else
   1672 		rate = rt->info[0].rateCode;
   1673 	if (!ath_hal_setuptxdesc(ah, ds
   1674 		, m->m_pkthdr.len + IEEE80211_CRC_LEN	/* packet length */
   1675 		, sizeof(struct ieee80211_frame)	/* header length */
   1676 		, HAL_PKT_TYPE_BEACON		/* Atheros packet type */
   1677 		, 0x20				/* txpower XXX */
   1678 		, rate, 1			/* series 0 rate/tries */
   1679 		, HAL_TXKEYIX_INVALID		/* no encryption */
   1680 		, 0				/* antenna mode */
   1681 		, HAL_TXDESC_NOACK		/* no ack for beacons */
   1682 		, 0				/* rts/cts rate */
   1683 		, 0				/* rts/cts duration */
   1684 	)) {
   1685 		printf("%s: ath_hal_setuptxdesc failed\n", __func__);
   1686 		return -1;
   1687 	}
   1688 	/* NB: beacon's BufLen must be a multiple of 4 bytes */
   1689 	/* XXX verify mbuf data area covers this roundup */
   1690 	if (!ath_hal_filltxdesc(ah, ds
   1691 		, roundup(bf->bf_segs[0].ds_len, 4)	/* buffer length */
   1692 		, AH_TRUE				/* first segment */
   1693 		, AH_TRUE				/* last segment */
   1694 	)) {
   1695 		printf("%s: ath_hal_filltxdesc failed\n", __func__);
   1696 		return -1;
   1697 	}
   1698 
   1699 	/* XXX it is not appropriate to bus_dmamap_sync? -dcy */
   1700 
   1701 	return 0;
   1702 }
   1703 
   1704 static void
   1705 ath_beacon_proc(void *arg, int pending)
   1706 {
   1707 	struct ath_softc *sc = arg;
   1708 	struct ieee80211com *ic = &sc->sc_ic;
   1709 	struct ath_buf *bf = sc->sc_bcbuf;
   1710 	struct ath_hal *ah = sc->sc_ah;
   1711 
   1712 	DPRINTF(ATH_DEBUG_BEACON_PROC, ("%s: pending %u\n", __func__, pending));
   1713 	if (ic->ic_opmode == IEEE80211_M_STA ||
   1714 	    bf == NULL || bf->bf_m == NULL) {
   1715 		DPRINTF(ATH_DEBUG_ANY, ("%s: ic_flags=%x bf=%p bf_m=%p\n",
   1716 			__func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL));
   1717 		return;
   1718 	}
   1719 	/* TODO: update beacon to reflect PS poll state */
   1720 	if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
   1721 		DPRINTF(ATH_DEBUG_ANY, ("%s: beacon queue %u did not stop?\n",
   1722 			__func__, sc->sc_bhalq));
   1723 		/* NB: the HAL still stops DMA, so proceed */
   1724 	}
   1725 	ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
   1726 
   1727 	ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
   1728 	ath_hal_txstart(ah, sc->sc_bhalq);
   1729 	DPRINTF(ATH_DEBUG_BEACON_PROC,
   1730 		("%s: TXDP%u = %p (%p)\n", __func__,
   1731 		sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
   1732 }
   1733 
   1734 static void
   1735 ath_beacon_free(struct ath_softc *sc)
   1736 {
   1737 	struct ath_buf *bf = sc->sc_bcbuf;
   1738 
   1739 	if (bf->bf_m != NULL) {
   1740 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   1741 		m_freem(bf->bf_m);
   1742 		bf->bf_m = NULL;
   1743 		bf->bf_node = NULL;
   1744 	}
   1745 }
   1746 
   1747 /*
   1748  * Configure the beacon and sleep timers.
   1749  *
   1750  * When operating as an AP this resets the TSF and sets
   1751  * up the hardware to notify us when we need to issue beacons.
   1752  *
   1753  * When operating in station mode this sets up the beacon
   1754  * timers according to the timestamp of the last received
   1755  * beacon and the current TSF, configures PCF and DTIM
   1756  * handling, programs the sleep registers so the hardware
   1757  * will wakeup in time to receive beacons, and configures
   1758  * the beacon miss handling so we'll receive a BMISS
   1759  * interrupt when we stop seeing beacons from the AP
   1760  * we've associated with.
   1761  */
   1762 static void
   1763 ath_beacon_config(struct ath_softc *sc)
   1764 {
   1765 	struct ath_hal *ah = sc->sc_ah;
   1766 	struct ieee80211com *ic = &sc->sc_ic;
   1767 	struct ieee80211_node *ni = ic->ic_bss;
   1768 	u_int32_t nexttbtt, intval;
   1769 
   1770 	nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) |
   1771 	    (LE_READ_4(ni->ni_tstamp) >> 10);
   1772 	DPRINTF(ATH_DEBUG_BEACON, ("%s: nexttbtt=%u\n", __func__, nexttbtt));
   1773 	nexttbtt += ni->ni_intval;
   1774 	intval = ni->ni_intval & HAL_BEACON_PERIOD;
   1775 	if (ic->ic_opmode == IEEE80211_M_STA) {
   1776 		HAL_BEACON_STATE bs;
   1777 		u_int32_t bmisstime;
   1778 
   1779 		/* NB: no PCF support right now */
   1780 		memset(&bs, 0, sizeof(bs));
   1781 		/*
   1782 		 * Reset our tsf so the hardware will update the
   1783 		 * tsf register to reflect timestamps found in
   1784 		 * received beacons.
   1785 		 */
   1786 		bs.bs_intval = intval | HAL_BEACON_RESET_TSF;
   1787 		bs.bs_nexttbtt = nexttbtt;
   1788 		bs.bs_dtimperiod = bs.bs_intval;
   1789 		bs.bs_nextdtim = nexttbtt;
   1790 		/*
   1791 		 * Calculate the number of consecutive beacons to miss
   1792 		 * before taking a BMISS interrupt.  The configuration
   1793 		 * is specified in ms, so we need to convert that to
   1794 		 * TU's and then calculate based on the beacon interval.
   1795 		 * Note that we clamp the result to at most 10 beacons.
   1796 		 */
   1797 		bmisstime = (ic->ic_bmisstimeout * 1000) / 1024;
   1798 		bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval);
   1799 		if (bs.bs_bmissthreshold > 10)
   1800 			bs.bs_bmissthreshold = 10;
   1801 		else if (bs.bs_bmissthreshold <= 0)
   1802 			bs.bs_bmissthreshold = 1;
   1803 
   1804 		/*
   1805 		 * Calculate sleep duration.  The configuration is
   1806 		 * given in ms.  We insure a multiple of the beacon
   1807 		 * period is used.  Also, if the sleep duration is
   1808 		 * greater than the DTIM period then it makes senses
   1809 		 * to make it a multiple of that.
   1810 		 *
   1811 		 * XXX fixed at 100ms
   1812 		 */
   1813 		bs.bs_sleepduration =
   1814 			roundup((100 * 1000) / 1024, bs.bs_intval);
   1815 		if (bs.bs_sleepduration > bs.bs_dtimperiod)
   1816 			bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
   1817 
   1818 		DPRINTF(ATH_DEBUG_BEACON,
   1819 			("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n"
   1820 			, __func__
   1821 			, bs.bs_intval
   1822 			, bs.bs_nexttbtt
   1823 			, bs.bs_dtimperiod
   1824 			, bs.bs_nextdtim
   1825 			, bs.bs_bmissthreshold
   1826 			, bs.bs_sleepduration
   1827 		));
   1828 		ath_hal_intrset(ah, 0);
   1829 		ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0);
   1830 		sc->sc_imask |= HAL_INT_BMISS;
   1831 		ath_hal_intrset(ah, sc->sc_imask);
   1832 	} else {
   1833 		DPRINTF(ATH_DEBUG_BEACON, ("%s: intval %u nexttbtt %u\n",
   1834 			__func__, ni->ni_intval, nexttbtt));
   1835 		ath_hal_intrset(ah, 0);
   1836 		ath_hal_beaconinit(ah, nexttbtt, ni->ni_intval);
   1837 		if (ic->ic_opmode != IEEE80211_M_MONITOR)
   1838 			sc->sc_imask |= HAL_INT_SWBA;	/* beacon prepare */
   1839 		ath_hal_intrset(ah, sc->sc_imask);
   1840 	}
   1841 }
   1842 
   1843 #ifdef __FreeBSD__
   1844 static void
   1845 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
   1846 {
   1847 	bus_addr_t *paddr = (bus_addr_t*) arg;
   1848 	*paddr = segs->ds_addr;
   1849 }
   1850 #endif
   1851 
   1852 #ifdef __FreeBSD__
   1853 static int
   1854 ath_desc_alloc(struct ath_softc *sc)
   1855 {
   1856 	int i, bsize, error;
   1857 	struct ath_desc *ds;
   1858 	struct ath_buf *bf;
   1859 
   1860 	/* allocate descriptors */
   1861 	sc->sc_desc_len = sizeof(struct ath_desc) *
   1862 				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
   1863 	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap);
   1864 	if (error != 0)
   1865 		return error;
   1866 
   1867 	error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc,
   1868 				 BUS_DMA_NOWAIT, &sc->sc_ddmamap);
   1869 
   1870 	if (error != 0)
   1871 		goto fail0;
   1872 
   1873 	error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap,
   1874 				sc->sc_desc, sc->sc_desc_len,
   1875 				ath_load_cb, &sc->sc_desc_paddr,
   1876 				BUS_DMA_NOWAIT);
   1877 	if (error != 0)
   1878 		goto fail1;
   1879 
   1880 	ds = sc->sc_desc;
   1881 	DPRINTF(ATH_DEBUG_ANY, ("%s: DMA map: %p (%lu) -> %p (%lu)\n",
   1882 	    __func__, ds, (u_long) sc->sc_desc_len, (caddr_t) sc->sc_desc_paddr,
   1883 	    /*XXX*/ (u_long) sc->sc_desc_len));
   1884 
   1885 	/* allocate buffers */
   1886 	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
   1887 	bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
   1888 	if (bf == NULL) {
   1889 		printf("%s: unable to allocate Tx/Rx buffers\n",
   1890 		    sc->sc_dev.dv_xname);
   1891 		error = -1;
   1892 		goto fail2;
   1893 	}
   1894 	sc->sc_bufptr = bf;
   1895 
   1896 	TAILQ_INIT(&sc->sc_rxbuf);
   1897 	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
   1898 		bf->bf_desc = ds;
   1899 		bf->bf_daddr = sc->sc_desc_paddr +
   1900 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1901 		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
   1902 					  &bf->bf_dmamap);
   1903 		if (error != 0)
   1904 			break;
   1905 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   1906 	}
   1907 
   1908 	TAILQ_INIT(&sc->sc_txbuf);
   1909 	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
   1910 		bf->bf_desc = ds;
   1911 		bf->bf_daddr = sc->sc_desc_paddr +
   1912 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1913 		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
   1914 					  &bf->bf_dmamap);
   1915 		if (error != 0)
   1916 			break;
   1917 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   1918 	}
   1919 	TAILQ_INIT(&sc->sc_txq);
   1920 
   1921 	/* beacon buffer */
   1922 	bf->bf_desc = ds;
   1923 	bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
   1924 	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap);
   1925 	if (error != 0)
   1926 		return error;
   1927 	sc->sc_bcbuf = bf;
   1928 	return 0;
   1929 
   1930 fail2:
   1931 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   1932 fail1:
   1933 	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
   1934 fail0:
   1935 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   1936 	sc->sc_ddmamap = NULL;
   1937 	return error;
   1938 }
   1939 #else
   1940 static int
   1941 ath_desc_alloc(struct ath_softc *sc)
   1942 {
   1943 	int i, bsize, error = -1;
   1944 	struct ath_desc *ds;
   1945 	struct ath_buf *bf;
   1946 
   1947 	/* allocate descriptors */
   1948 	sc->sc_desc_len = sizeof(struct ath_desc) *
   1949 				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
   1950 	if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE,
   1951 	    0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) {
   1952 		printf("%s: unable to allocate control data, error = %d\n",
   1953 		    sc->sc_dev.dv_xname, error);
   1954 		goto fail0;
   1955 	}
   1956 
   1957 	if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg,
   1958 	    sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) {
   1959 		printf("%s: unable to map control data, error = %d\n",
   1960 		    sc->sc_dev.dv_xname, error);
   1961 		goto fail1;
   1962 	}
   1963 
   1964 	if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1,
   1965 	    sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) {
   1966 		printf("%s: unable to create control data DMA map, "
   1967 		    "error = %d\n", sc->sc_dev.dv_xname, error);
   1968 		goto fail2;
   1969 	}
   1970 
   1971 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc,
   1972 	    sc->sc_desc_len, NULL, 0)) != 0) {
   1973 		printf("%s: unable to load control data DMA map, error = %d\n",
   1974 		    sc->sc_dev.dv_xname, error);
   1975 		goto fail3;
   1976 	}
   1977 
   1978 	ds = sc->sc_desc;
   1979 	sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr;
   1980 
   1981 	DPRINTF(ATH_DEBUG_XMIT_DESC|ATH_DEBUG_RECV_DESC,
   1982 	    ("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n",
   1983 	    ds, (u_long)sc->sc_desc_len,
   1984 	    (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
   1985 
   1986 	/* allocate buffers */
   1987 	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
   1988 	bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
   1989 	if (bf == NULL) {
   1990 		printf("%s: unable to allocate Tx/Rx buffers\n",
   1991 		    sc->sc_dev.dv_xname);
   1992 		error = ENOMEM;
   1993 		goto fail3;
   1994 	}
   1995 	sc->sc_bufptr = bf;
   1996 
   1997 	TAILQ_INIT(&sc->sc_rxbuf);
   1998 	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
   1999 		bf->bf_desc = ds;
   2000 		bf->bf_daddr = sc->sc_desc_paddr +
   2001 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   2002 		if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
   2003 		    MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
   2004 			printf("%s: unable to create Rx dmamap, error = %d\n",
   2005 			    sc->sc_dev.dv_xname, error);
   2006 			goto fail4;
   2007 		}
   2008 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   2009 	}
   2010 
   2011 	TAILQ_INIT(&sc->sc_txbuf);
   2012 	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
   2013 		bf->bf_desc = ds;
   2014 		bf->bf_daddr = sc->sc_desc_paddr +
   2015 		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
   2016 		if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
   2017 		    ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) {
   2018 			printf("%s: unable to create Tx dmamap, error = %d\n",
   2019 			    sc->sc_dev.dv_xname, error);
   2020 			goto fail5;
   2021 		}
   2022 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2023 	}
   2024 	TAILQ_INIT(&sc->sc_txq);
   2025 
   2026 	/* beacon buffer */
   2027 	bf->bf_desc = ds;
   2028 	bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
   2029 	if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
   2030 	    &bf->bf_dmamap)) != 0) {
   2031 		printf("%s: unable to create beacon dmamap, error = %d\n",
   2032 		    sc->sc_dev.dv_xname, error);
   2033 		goto fail5;
   2034 	}
   2035 	sc->sc_bcbuf = bf;
   2036 	return 0;
   2037 
   2038 fail5:
   2039 	for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) {
   2040 		if (sc->sc_bufptr[i].bf_dmamap == NULL)
   2041 			continue;
   2042 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
   2043 	}
   2044 fail4:
   2045 	for (i = 0; i < ATH_RXBUF; i++) {
   2046 		if (sc->sc_bufptr[i].bf_dmamap == NULL)
   2047 			continue;
   2048 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
   2049 	}
   2050 fail3:
   2051 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   2052 fail2:
   2053 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   2054 	sc->sc_ddmamap = NULL;
   2055 fail1:
   2056 	bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len);
   2057 fail0:
   2058 	bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
   2059 	return error;
   2060 }
   2061 #endif
   2062 
   2063 static void
   2064 ath_desc_free(struct ath_softc *sc)
   2065 {
   2066 	struct ath_buf *bf;
   2067 
   2068 #ifdef __FreeBSD__
   2069 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   2070 	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
   2071 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   2072 #else
   2073 	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
   2074 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
   2075 	bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
   2076 #endif
   2077 
   2078 	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
   2079 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2080 		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   2081 		m_freem(bf->bf_m);
   2082 	}
   2083 	TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list)
   2084 		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   2085 	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   2086 		if (bf->bf_m) {
   2087 			bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2088 			bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
   2089 			m_freem(bf->bf_m);
   2090 			bf->bf_m = NULL;
   2091 		}
   2092 	}
   2093 	if (sc->sc_bcbuf != NULL) {
   2094 		bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
   2095 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
   2096 		sc->sc_bcbuf = NULL;
   2097 	}
   2098 
   2099 	TAILQ_INIT(&sc->sc_rxbuf);
   2100 	TAILQ_INIT(&sc->sc_txbuf);
   2101 	TAILQ_INIT(&sc->sc_txq);
   2102 	free(sc->sc_bufptr, M_DEVBUF);
   2103 	sc->sc_bufptr = NULL;
   2104 }
   2105 
   2106 static struct ieee80211_node *
   2107 ath_node_alloc(struct ieee80211com *ic)
   2108 {
   2109 	struct ath_node *an =
   2110 		malloc(sizeof(struct ath_node), M_80211_NODE, M_NOWAIT|M_ZERO);
   2111 	if (an) {
   2112 		int i;
   2113 		for (i = 0; i < ATH_RHIST_SIZE; i++)
   2114 			an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME;
   2115 		an->an_rx_hist_next = ATH_RHIST_SIZE-1;
   2116 		return &an->an_node;
   2117 	} else
   2118 		return NULL;
   2119 }
   2120 
   2121 static void
   2122 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
   2123 {
   2124 	struct ath_softc *sc = ic->ic_if.if_softc;
   2125 	struct ath_buf *bf;
   2126 
   2127 	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
   2128 		if (bf->bf_node == ni)
   2129 			bf->bf_node = NULL;
   2130 	}
   2131 	(*sc->sc_node_free)(ic, ni);
   2132 }
   2133 
   2134 static void
   2135 ath_node_copy(struct ieee80211com *ic,
   2136 	struct ieee80211_node *dst, const struct ieee80211_node *src)
   2137 {
   2138         struct ath_softc *sc = ic->ic_if.if_softc;
   2139 
   2140 	memcpy(&dst[1], &src[1],
   2141 		sizeof(struct ath_node) - sizeof(struct ieee80211_node));
   2142 	(*sc->sc_node_copy)(ic, dst, src);
   2143 }
   2144 
   2145 static u_int8_t
   2146 ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni)
   2147 {
   2148 	struct ath_node *an = ATH_NODE(ni);
   2149 	int i, now, nsamples, rssi;
   2150 
   2151 	/*
   2152 	 * Calculate the average over the last second of sampled data.
   2153 	 */
   2154 	now = ATH_TICKS();
   2155 	nsamples = 0;
   2156 	rssi = 0;
   2157 	i = an->an_rx_hist_next;
   2158 	do {
   2159 		struct ath_recv_hist *rh = &an->an_rx_hist[i];
   2160 		if (rh->arh_ticks == ATH_RHIST_NOTIME)
   2161 			goto done;
   2162 		if (now - rh->arh_ticks > hz)
   2163 			goto done;
   2164 		rssi += rh->arh_rssi;
   2165 		nsamples++;
   2166 		if (i == 0)
   2167 			i = ATH_RHIST_SIZE-1;
   2168 		else
   2169 			i--;
   2170 	} while (i != an->an_rx_hist_next);
   2171 done:
   2172 	/*
   2173 	 * Return either the average or the last known
   2174 	 * value if there is no recent data.
   2175 	 */
   2176 	return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi);
   2177 }
   2178 
   2179 static int
   2180 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
   2181 {
   2182 	struct ath_hal *ah = sc->sc_ah;
   2183 	int error;
   2184 	struct mbuf *m;
   2185 	struct ath_desc *ds;
   2186 
   2187 	m = bf->bf_m;
   2188 	if (m == NULL) {
   2189 		/*
   2190 		 * NB: by assigning a page to the rx dma buffer we
   2191 		 * implicitly satisfy the Atheros requirement that
   2192 		 * this buffer be cache-line-aligned and sized to be
   2193 		 * multiple of the cache line size.  Not doing this
   2194 		 * causes weird stuff to happen (for the 5210 at least).
   2195 		 */
   2196 		m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES);
   2197 		if (m == NULL) {
   2198 			DPRINTF(ATH_DEBUG_ANY,
   2199 				("%s: no mbuf/cluster\n", __func__));
   2200 			sc->sc_stats.ast_rx_nombuf++;
   2201 			return ENOMEM;
   2202 		}
   2203 		bf->bf_m = m;
   2204 		m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
   2205 
   2206 		error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m,
   2207 		                                 BUS_DMA_NOWAIT);
   2208 		if (error != 0) {
   2209 			DPRINTF(ATH_DEBUG_ANY,
   2210 				("%s: ath_buf_dmamap_load_mbuf failed;"
   2211 				" error %d\n", __func__, error));
   2212 			sc->sc_stats.ast_rx_busdma++;
   2213 			return error;
   2214 		}
   2215 		KASSERT(bf->bf_nseg == 1,
   2216 			("ath_rxbuf_init: multi-segment packet; nseg %u",
   2217 			bf->bf_nseg));
   2218 	}
   2219 	ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD);
   2220 
   2221 	/*
   2222 	 * Setup descriptors.  For receive we always terminate
   2223 	 * the descriptor list with a self-linked entry so we'll
   2224 	 * not get overrun under high load (as can happen with a
   2225 	 * 5212 when ANI processing enables PHY errors).
   2226 	 *
   2227 	 * To insure the last descriptor is self-linked we create
   2228 	 * each descriptor as self-linked and add it to the end.  As
   2229 	 * each additional descriptor is added the previous self-linked
   2230 	 * entry is ``fixed'' naturally.  This should be safe even
   2231 	 * if DMA is happening.  When processing RX interrupts we
   2232 	 * never remove/process the last, self-linked, entry on the
   2233 	 * descriptor list.  This insures the hardware always has
   2234 	 * someplace to write a new frame.
   2235 	 */
   2236 	ds = bf->bf_desc;
   2237 	ds->ds_link = bf->bf_daddr;	/* link to self */
   2238 	ds->ds_data = bf->bf_segs[0].ds_addr;
   2239 	ath_hal_setuprxdesc(ah, ds
   2240 		, m->m_len		/* buffer size */
   2241 		, 0
   2242 	);
   2243 
   2244 	if (sc->sc_rxlink != NULL)
   2245 		*sc->sc_rxlink = bf->bf_daddr;
   2246 	sc->sc_rxlink = &ds->ds_link;
   2247 	return 0;
   2248 }
   2249 
   2250 static void
   2251 ath_rx_proc(void *arg, int npending)
   2252 {
   2253 #define	PA2DESC(_sc, _pa) \
   2254 	((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
   2255 		((_pa) - (_sc)->sc_desc_paddr)))
   2256 	struct ath_softc *sc = arg;
   2257 	struct ath_buf *bf;
   2258 	struct ieee80211com *ic = &sc->sc_ic;
   2259 	struct ifnet *ifp = &ic->ic_if;
   2260 	struct ath_hal *ah = sc->sc_ah;
   2261 	struct ath_desc *ds;
   2262 	struct mbuf *m;
   2263 	struct ieee80211_frame *wh, whbuf;
   2264 	struct ieee80211_node *ni;
   2265 	struct ath_node *an;
   2266 	struct ath_recv_hist *rh;
   2267 	int len;
   2268 	u_int phyerr;
   2269 	HAL_STATUS status;
   2270 
   2271 	DPRINTF(ATH_DEBUG_RX_PROC, ("%s: pending %u\n", __func__, npending));
   2272 	do {
   2273 		bf = TAILQ_FIRST(&sc->sc_rxbuf);
   2274 		if (bf == NULL) {		/* NB: shouldn't happen */
   2275 			if_printf(ifp, "ath_rx_proc: no buffer!\n");
   2276 			break;
   2277 		}
   2278 		ds = bf->bf_desc;
   2279 		if (ds->ds_link == bf->bf_daddr) {
   2280 			/* NB: never process the self-linked entry at the end */
   2281 			break;
   2282 		}
   2283 		m = bf->bf_m;
   2284 		if (m == NULL) {		/* NB: shouldn't happen */
   2285 			if_printf(ifp, "ath_rx_proc: no mbuf!\n");
   2286 			continue;
   2287 		}
   2288 		/* XXX sync descriptor memory */
   2289 		/*
   2290 		 * Must provide the virtual address of the current
   2291 		 * descriptor, the physical address, and the virtual
   2292 		 * address of the next descriptor in the h/w chain.
   2293 		 * This allows the HAL to look ahead to see if the
   2294 		 * hardware is done with a descriptor by checking the
   2295 		 * done bit in the following descriptor and the address
   2296 		 * of the current descriptor the DMA engine is working
   2297 		 * on.  All this is necessary because of our use of
   2298 		 * a self-linked list to avoid rx overruns.
   2299 		 */
   2300 		status = ath_hal_rxprocdesc(ah, ds,
   2301 				bf->bf_daddr, PA2DESC(sc, ds->ds_link));
   2302 #ifdef AR_DEBUG
   2303 		if (ath_debug & ATH_DEBUG_RECV_DESC)
   2304 			ath_printrxbuf(bf, status == HAL_OK);
   2305 #endif
   2306 		if (status == HAL_EINPROGRESS)
   2307 			break;
   2308 		TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
   2309 
   2310 		if (ds->ds_rxstat.rs_more) {
   2311 			/*
   2312 			 * Frame spans multiple descriptors; this
   2313 			 * cannot happen yet as we don't support
   2314 			 * jumbograms.  If not in monitor mode,
   2315 			 * discard the frame.
   2316 			 */
   2317 
   2318 			/* enable this if you want to see error frames in Monitor mode */
   2319 #ifdef ERROR_FRAMES
   2320 			if (ic->ic_opmode != IEEE80211_M_MONITOR) {
   2321 				/* XXX statistic */
   2322 				goto rx_next;
   2323 			}
   2324 #endif
   2325 			/* fall thru for monitor mode handling... */
   2326 
   2327 		} else if (ds->ds_rxstat.rs_status != 0) {
   2328 			if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC)
   2329 				sc->sc_stats.ast_rx_crcerr++;
   2330 			if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO)
   2331 				sc->sc_stats.ast_rx_fifoerr++;
   2332 			if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT)
   2333 				sc->sc_stats.ast_rx_badcrypt++;
   2334 			if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) {
   2335 				sc->sc_stats.ast_rx_phyerr++;
   2336 				phyerr = ds->ds_rxstat.rs_phyerr & 0x1f;
   2337 				sc->sc_stats.ast_rx_phy[phyerr]++;
   2338 			}
   2339 
   2340 			/*
   2341 			 * reject error frames, we normally don't want
   2342 			 * to see them in monitor mode.
   2343 			 */
   2344 			if ((ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT ) ||
   2345 			    (ds->ds_rxstat.rs_status & HAL_RXERR_PHY))
   2346 			    goto rx_next;
   2347 
   2348 			/*
   2349 			 * In monitor mode, allow through packets that
   2350 			 * cannot be decrypted
   2351 			 */
   2352 			if ((ds->ds_rxstat.rs_status & ~HAL_RXERR_DECRYPT) ||
   2353 			    sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR)
   2354 				goto rx_next;
   2355 		}
   2356 
   2357 		len = ds->ds_rxstat.rs_datalen;
   2358 		if (len < IEEE80211_MIN_LEN) {
   2359 			DPRINTF(ATH_DEBUG_RECV, ("%s: short packet %d\n",
   2360 				__func__, len));
   2361 			sc->sc_stats.ast_rx_tooshort++;
   2362 			goto rx_next;
   2363 		}
   2364 
   2365 		ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD);
   2366 
   2367 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2368 		bf->bf_m = NULL;
   2369 		m->m_pkthdr.rcvif = ifp;
   2370 		m->m_pkthdr.len = m->m_len = len;
   2371 
   2372 #if NBPFILTER > 0
   2373 		if (sc->sc_drvbpf) {
   2374 			sc->sc_rx_th.wr_rate =
   2375 				sc->sc_hwmap[ds->ds_rxstat.rs_rate];
   2376 			sc->sc_rx_th.wr_antsignal = ds->ds_rxstat.rs_rssi;
   2377 			sc->sc_rx_th.wr_antenna = ds->ds_rxstat.rs_antenna;
   2378 			/* XXX TSF */
   2379 			bpf_mtap2(sc->sc_drvbpf,
   2380 				&sc->sc_rx_th, sc->sc_rx_th_len, m);
   2381 		}
   2382 #endif
   2383 
   2384 		m_adj(m, -IEEE80211_CRC_LEN);
   2385 		wh = mtod(m, struct ieee80211_frame *);
   2386 		if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
   2387 			/*
   2388 			 * WEP is decrypted by hardware. Clear WEP bit
   2389 			 * and trim WEP header for ieee80211_input().
   2390 			 */
   2391 			wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
   2392 			memcpy(&whbuf, wh, sizeof(whbuf));
   2393 			m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN);
   2394 			wh = mtod(m, struct ieee80211_frame *);
   2395 			memcpy(wh, &whbuf, sizeof(whbuf));
   2396 			/*
   2397 			 * Also trim WEP ICV from the tail.
   2398 			 */
   2399 			m_adj(m, -IEEE80211_WEP_CRCLEN);
   2400 			/*
   2401 			 * The header has probably moved.
   2402 			 */
   2403 			wh = mtod(m, struct ieee80211_frame *);
   2404 		}
   2405 
   2406 		/*
   2407 		 * Locate the node for sender, track state, and
   2408 		 * then pass this node (referenced) up to the 802.11
   2409 		 * layer for its use.  We are required to pass
   2410 		 * something so we fall back to ic_bss when this frame
   2411 		 * is from an unknown sender.
   2412 		 */
   2413 		ni = ieee80211_find_rxnode(ic, wh);
   2414 
   2415 		/*
   2416 		 * Record driver-specific state.
   2417 		 */
   2418 		an = ATH_NODE(ni);
   2419 		if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE)
   2420 			an->an_rx_hist_next = 0;
   2421 		rh = &an->an_rx_hist[an->an_rx_hist_next];
   2422 		rh->arh_ticks = ATH_TICKS();
   2423 		rh->arh_rssi = ds->ds_rxstat.rs_rssi;
   2424 		rh->arh_antenna = ds->ds_rxstat.rs_antenna;
   2425 
   2426 		/*
   2427 		 * Send frame up for processing.
   2428 		 */
   2429 		ieee80211_input(ifp, m, ni,
   2430 			ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp);
   2431 
   2432 		/*
   2433 		 * The frame may have caused the node to be marked for
   2434 		 * reclamation (e.g. in response to a DEAUTH message)
   2435 		 * so use free_node here instead of unref_node.
   2436 		 */
   2437 		if (ni == ic->ic_bss)
   2438 			ieee80211_unref_node(&ni);
   2439 		else
   2440 			ieee80211_free_node(ic, ni);
   2441   rx_next:
   2442 		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
   2443 	} while (ath_rxbuf_init(sc, bf) == 0);
   2444 
   2445 	ath_hal_rxmonitor(ah);			/* rx signal state monitoring */
   2446 	ath_hal_rxena(ah);			/* in case of RXEOL */
   2447 
   2448 #ifdef __NetBSD__
   2449 	if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd))
   2450 		ath_start(ifp);
   2451 #endif /* __NetBSD__ */
   2452 #undef PA2DESC
   2453 }
   2454 
   2455 /*
   2456  * XXX Size of an ACK control frame in bytes.
   2457  */
   2458 #define	IEEE80211_ACK_SIZE	(2+2+IEEE80211_ADDR_LEN+4)
   2459 
   2460 static int
   2461 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
   2462     struct mbuf *m0)
   2463 {
   2464 	struct ieee80211com *ic = &sc->sc_ic;
   2465 	struct ath_hal *ah = sc->sc_ah;
   2466 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   2467 	int i, error, iswep, hdrlen, pktlen;
   2468 	u_int8_t rix, cix, txrate, ctsrate;
   2469 	struct ath_desc *ds;
   2470 	struct mbuf *m;
   2471 	struct ieee80211_frame *wh;
   2472 	u_int32_t iv;
   2473 	u_int8_t *ivp;
   2474 	u_int8_t hdrbuf[sizeof(struct ieee80211_frame) +
   2475 	    IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN];
   2476 	u_int subtype, flags, ctsduration, antenna;
   2477 	HAL_PKT_TYPE atype;
   2478 	const HAL_RATE_TABLE *rt;
   2479 	HAL_BOOL shortPreamble;
   2480 	struct ath_node *an;
   2481 	ath_txq_critsect_decl(s);
   2482 
   2483 	wh = mtod(m0, struct ieee80211_frame *);
   2484 	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
   2485 	hdrlen = sizeof(struct ieee80211_frame);
   2486 	pktlen = m0->m_pkthdr.len;
   2487 
   2488 	if (iswep) {
   2489 		memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen);
   2490 		m_adj(m0, hdrlen);
   2491 		M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT);
   2492 		if (m0 == NULL) {
   2493 			sc->sc_stats.ast_tx_nombuf++;
   2494 			return ENOMEM;
   2495 		}
   2496 		ivp = hdrbuf + hdrlen;
   2497 		wh = mtod(m0, struct ieee80211_frame *);
   2498 		/*
   2499 		 * XXX
   2500 		 * IV must not duplicate during the lifetime of the key.
   2501 		 * But no mechanism to renew keys is defined in IEEE 802.11
   2502 		 * for WEP.  And the IV may be duplicated at other stations
   2503 		 * because the session key itself is shared.  So we use a
   2504 		 * pseudo random IV for now, though it is not the right way.
   2505 		 *
   2506 		 * NB: Rather than use a strictly random IV we select a
   2507 		 * random one to start and then increment the value for
   2508 		 * each frame.  This is an explicit tradeoff between
   2509 		 * overhead and security.  Given the basic insecurity of
   2510 		 * WEP this seems worthwhile.
   2511 		 */
   2512 
   2513 		/*
   2514 		 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir:
   2515 		 * (B, 255, N) with 3 <= B < 16 and 0 <= N <= 255
   2516 		 */
   2517 		iv = ic->ic_iv;
   2518 		if ((iv & 0xff00) == 0xff00) {
   2519 			int B = (iv & 0xff0000) >> 16;
   2520 			if (3 <= B && B < 16)
   2521 				iv = (B+1) << 16;
   2522 		}
   2523 		ic->ic_iv = iv + 1;
   2524 
   2525 		/*
   2526 		 * NB: Preserve byte order of IV for packet
   2527 		 *     sniffers; it doesn't matter otherwise.
   2528 		 */
   2529 #if AH_BYTE_ORDER == AH_BIG_ENDIAN
   2530 		ivp[0] = iv >> 0;
   2531 		ivp[1] = iv >> 8;
   2532 		ivp[2] = iv >> 16;
   2533 #else
   2534 		ivp[2] = iv >> 0;
   2535 		ivp[1] = iv >> 8;
   2536 		ivp[0] = iv >> 16;
   2537 #endif
   2538 		ivp[3] = ic->ic_wep_txkey << 6; /* Key ID and pad */
   2539 		memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf));
   2540 		/*
   2541 		 * The ICV length must be included into hdrlen and pktlen.
   2542 		 */
   2543 		hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN;
   2544 		pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN;
   2545 	}
   2546 	pktlen += IEEE80211_CRC_LEN;
   2547 
   2548 	/*
   2549 	 * Load the DMA map so any coalescing is done.  This
   2550 	 * also calculates the number of descriptors we need.
   2551 	 */
   2552 	error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT);
   2553 	/*
   2554 	 * Discard null packets and check for packets that
   2555 	 * require too many TX descriptors.  We try to convert
   2556 	 * the latter to a cluster.
   2557 	 */
   2558 	if (error == EFBIG) {		/* too many desc's, linearize */
   2559 		sc->sc_stats.ast_tx_linear++;
   2560 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   2561 		if (m == NULL) {
   2562 			sc->sc_stats.ast_tx_nombuf++;
   2563 			m_freem(m0);
   2564 			return ENOMEM;
   2565 		}
   2566 #ifdef __FreeBSD__
   2567 		M_MOVE_PKTHDR(m, m0);
   2568 #else
   2569 		M_COPY_PKTHDR(m, m0);
   2570 #endif
   2571 		MCLGET(m, M_DONTWAIT);
   2572 		if ((m->m_flags & M_EXT) == 0) {
   2573 			sc->sc_stats.ast_tx_nomcl++;
   2574 			m_freem(m0);
   2575 			m_free(m);
   2576 			return ENOMEM;
   2577 		}
   2578 		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
   2579 		m_freem(m0);
   2580 		m->m_len = m->m_pkthdr.len;
   2581 		m0 = m;
   2582 		error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0,
   2583 					         BUS_DMA_NOWAIT);
   2584 		if (error != 0) {
   2585 			sc->sc_stats.ast_tx_busdma++;
   2586 			m_freem(m0);
   2587 			return error;
   2588 		}
   2589 		KASSERT(bf->bf_nseg == 1,
   2590 			("ath_tx_start: packet not one segment; nseg %u",
   2591 			bf->bf_nseg));
   2592 	} else if (error != 0) {
   2593 		sc->sc_stats.ast_tx_busdma++;
   2594 		m_freem(m0);
   2595 		return error;
   2596 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
   2597 		sc->sc_stats.ast_tx_nodata++;
   2598 		m_freem(m0);
   2599 		return EIO;
   2600 	}
   2601 	DPRINTF(ATH_DEBUG_XMIT, ("%s: m %p len %u\n", __func__, m0, pktlen));
   2602 	ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE);
   2603 	bf->bf_m = m0;
   2604 	bf->bf_node = ni;			/* NB: held reference */
   2605 
   2606 	/* setup descriptors */
   2607 	ds = bf->bf_desc;
   2608 	rt = sc->sc_currates;
   2609 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
   2610 
   2611 	/*
   2612 	 * Calculate Atheros packet type from IEEE80211 packet header
   2613 	 * and setup for rate calculations.
   2614 	 */
   2615 	atype = HAL_PKT_TYPE_NORMAL;			/* default */
   2616 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
   2617 	case IEEE80211_FC0_TYPE_MGT:
   2618 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
   2619 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
   2620 			atype = HAL_PKT_TYPE_BEACON;
   2621 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
   2622 			atype = HAL_PKT_TYPE_PROBE_RESP;
   2623 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
   2624 			atype = HAL_PKT_TYPE_ATIM;
   2625 		rix = 0;			/* XXX lowest rate */
   2626 		break;
   2627 	case IEEE80211_FC0_TYPE_CTL:
   2628 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
   2629 		if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL)
   2630 			atype = HAL_PKT_TYPE_PSPOLL;
   2631 		rix = 0;			/* XXX lowest rate */
   2632 		break;
   2633 	default:
   2634 		rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] &
   2635 				IEEE80211_RATE_VAL];
   2636 		if (rix == 0xff) {
   2637 			if_printf(ifp, "bogus xmit rate 0x%x\n",
   2638 				ni->ni_rates.rs_rates[ni->ni_txrate]);
   2639 			sc->sc_stats.ast_tx_badrate++;
   2640 			m_freem(m0);
   2641 			return EIO;
   2642 		}
   2643 		break;
   2644 	}
   2645 	/*
   2646 	 * NB: the 802.11 layer marks whether or not we should
   2647 	 * use short preamble based on the current mode and
   2648 	 * negotiated parameters.
   2649 	 */
   2650 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
   2651 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
   2652 		txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble;
   2653 		shortPreamble = AH_TRUE;
   2654 		sc->sc_stats.ast_tx_shortpre++;
   2655 	} else {
   2656 		txrate = rt->info[rix].rateCode;
   2657 		shortPreamble = AH_FALSE;
   2658 	}
   2659 
   2660 	/*
   2661 	 * Calculate miscellaneous flags.
   2662 	 */
   2663 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for wep errors */
   2664 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
   2665 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
   2666 		sc->sc_stats.ast_tx_noack++;
   2667 	} else if (pktlen > ic->ic_rtsthreshold) {
   2668 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
   2669 		sc->sc_stats.ast_tx_rts++;
   2670 	}
   2671 
   2672 	/*
   2673 	 * Calculate duration.  This logically belongs in the 802.11
   2674 	 * layer but it lacks sufficient information to calculate it.
   2675 	 */
   2676 	if ((flags & HAL_TXDESC_NOACK) == 0 &&
   2677 	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
   2678 		u_int16_t dur;
   2679 		/*
   2680 		 * XXX not right with fragmentation.
   2681 		 */
   2682 		dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE,
   2683 				rix, shortPreamble);
   2684 		*((u_int16_t*) wh->i_dur) = htole16(dur);
   2685 	}
   2686 
   2687 	/*
   2688 	 * Calculate RTS/CTS rate and duration if needed.
   2689 	 */
   2690 	ctsduration = 0;
   2691 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
   2692 		/*
   2693 		 * CTS transmit rate is derived from the transmit rate
   2694 		 * by looking in the h/w rate table.  We must also factor
   2695 		 * in whether or not a short preamble is to be used.
   2696 		 */
   2697 		cix = rt->info[rix].controlRate;
   2698 		ctsrate = rt->info[cix].rateCode;
   2699 		if (shortPreamble)
   2700 			ctsrate |= rt->info[cix].shortPreamble;
   2701 		/*
   2702 		 * Compute the transmit duration based on the size
   2703 		 * of an ACK frame.  We call into the HAL to do the
   2704 		 * computation since it depends on the characteristics
   2705 		 * of the actual PHY being used.
   2706 		 */
   2707 		if (flags & HAL_TXDESC_RTSENA) {	/* SIFS + CTS */
   2708 			ctsduration += ath_hal_computetxtime(ah,
   2709 				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
   2710 		}
   2711 		/* SIFS + data */
   2712 		ctsduration += ath_hal_computetxtime(ah,
   2713 			rt, pktlen, rix, shortPreamble);
   2714 		if ((flags & HAL_TXDESC_NOACK) == 0) {	/* SIFS + ACK */
   2715 			ctsduration += ath_hal_computetxtime(ah,
   2716 				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
   2717 		}
   2718 	} else
   2719 		ctsrate = 0;
   2720 
   2721 	/*
   2722 	 * For now use the antenna on which the last good
   2723 	 * frame was received on.  We assume this field is
   2724 	 * initialized to 0 which gives us ``auto'' or the
   2725 	 * ``default'' antenna.
   2726 	 */
   2727 	an = (struct ath_node *) ni;
   2728 	if (an->an_tx_antenna)
   2729 		antenna = an->an_tx_antenna;
   2730 	else
   2731 		antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna;
   2732 
   2733 	if (ic->ic_rawbpf)
   2734 		bpf_mtap(ic->ic_rawbpf, m0);
   2735 	if (sc->sc_drvbpf) {
   2736 		sc->sc_tx_th.wt_flags = 0;
   2737 		if (shortPreamble)
   2738 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
   2739 		if (iswep)
   2740 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
   2741 		sc->sc_tx_th.wt_rate = ni->ni_rates.rs_rates[ni->ni_txrate];
   2742 		sc->sc_tx_th.wt_txpower = 60/2;		/* XXX */
   2743 		sc->sc_tx_th.wt_antenna = antenna;
   2744 
   2745 		bpf_mtap2(sc->sc_drvbpf,
   2746 			&sc->sc_tx_th, sc->sc_tx_th_len, m0);
   2747 	}
   2748 
   2749 	/*
   2750 	 * Formulate first tx descriptor with tx controls.
   2751 	 */
   2752 	/* XXX check return value? */
   2753 	ath_hal_setuptxdesc(ah, ds
   2754 		, pktlen		/* packet length */
   2755 		, hdrlen		/* header length */
   2756 		, atype			/* Atheros packet type */
   2757 		, 60			/* txpower XXX */
   2758 		, txrate, 1+10		/* series 0 rate/tries */
   2759 		, iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID
   2760 		, antenna		/* antenna mode */
   2761 		, flags			/* flags */
   2762 		, ctsrate		/* rts/cts rate */
   2763 		, ctsduration		/* rts/cts duration */
   2764 	);
   2765 #ifdef notyet
   2766 	ath_hal_setupxtxdesc(ah, ds
   2767 		, AH_FALSE		/* short preamble */
   2768 		, 0, 0			/* series 1 rate/tries */
   2769 		, 0, 0			/* series 2 rate/tries */
   2770 		, 0, 0			/* series 3 rate/tries */
   2771 	);
   2772 #endif
   2773 	/*
   2774 	 * Fillin the remainder of the descriptor info.
   2775 	 */
   2776 	for (i = 0; i < bf->bf_nseg; i++, ds++) {
   2777 		ds->ds_data = bf->bf_segs[i].ds_addr;
   2778 		if (i == bf->bf_nseg - 1)
   2779 			ds->ds_link = 0;
   2780 		else
   2781 			ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
   2782 		ath_hal_filltxdesc(ah, ds
   2783 			, bf->bf_segs[i].ds_len	/* segment length */
   2784 			, i == 0		/* first segment */
   2785 			, i == bf->bf_nseg - 1	/* last segment */
   2786 		);
   2787 		DPRINTF(ATH_DEBUG_XMIT,
   2788 			("%s: %d: %08x %08x %08x %08x %08x %08x\n",
   2789 			__func__, i, ds->ds_link, ds->ds_data,
   2790 			ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]));
   2791 	}
   2792 
   2793 	/*
   2794 	 * Insert the frame on the outbound list and
   2795 	 * pass it on to the hardware.
   2796 	 */
   2797 	ath_txq_critsect_begin(sc, s);
   2798 	TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
   2799 	if (sc->sc_txlink == NULL) {
   2800 		ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr);
   2801 		DPRINTF(ATH_DEBUG_XMIT, ("%s: TXDP0 = %p (%p)\n", __func__,
   2802 		    (caddr_t)bf->bf_daddr, bf->bf_desc));
   2803 	} else {
   2804 		*sc->sc_txlink = bf->bf_daddr;
   2805 		DPRINTF(ATH_DEBUG_XMIT, ("%s: link(%p)=%p (%p)\n", __func__,
   2806 		    sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc));
   2807 	}
   2808 	sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
   2809 	ath_txq_critsect_end(sc, s);
   2810 
   2811 	ath_hal_txstart(ah, sc->sc_txhalq);
   2812 	return 0;
   2813 }
   2814 
   2815 static void
   2816 ath_tx_proc(void *arg, int npending)
   2817 {
   2818 	struct ath_softc *sc = arg;
   2819 	struct ath_hal *ah = sc->sc_ah;
   2820 	struct ath_buf *bf;
   2821 	struct ieee80211com *ic = &sc->sc_ic;
   2822 	struct ifnet *ifp = &ic->ic_if;
   2823 	struct ath_desc *ds;
   2824 	struct ieee80211_node *ni;
   2825 	struct ath_node *an;
   2826 	int sr, lr;
   2827 	HAL_STATUS status;
   2828 	ath_txq_critsect_decl(s);
   2829 	ath_txbuf_critsect_decl(s2);
   2830 
   2831 	DPRINTF(ATH_DEBUG_TX_PROC, ("%s: pending %u tx queue %p, link %p\n",
   2832 		__func__, npending,
   2833 		(caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq),
   2834 		sc->sc_txlink));
   2835 	for (;;) {
   2836 		ath_txq_critsect_begin(sc, s);
   2837 		bf = TAILQ_FIRST(&sc->sc_txq);
   2838 		if (bf == NULL) {
   2839 			sc->sc_txlink = NULL;
   2840 			ath_txq_critsect_end(sc, s);
   2841 			break;
   2842 		}
   2843 		/* only the last descriptor is needed */
   2844 		ds = &bf->bf_desc[bf->bf_nseg - 1];
   2845 		status = ath_hal_txprocdesc(ah, ds);
   2846 #ifdef AR_DEBUG
   2847 		if (ath_debug & ATH_DEBUG_XMIT_DESC)
   2848 			ath_printtxbuf(bf, status == HAL_OK);
   2849 #endif
   2850 		if (status == HAL_EINPROGRESS) {
   2851 			ath_txq_critsect_end(sc, s);
   2852 			break;
   2853 		}
   2854 		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
   2855 		ath_txq_critsect_end(sc, s);
   2856 
   2857 		ni = bf->bf_node;
   2858 		if (ni != NULL) {
   2859 			an = (struct ath_node *) ni;
   2860 			if (ds->ds_txstat.ts_status == 0) {
   2861 				an->an_tx_ok++;
   2862 				an->an_tx_antenna = ds->ds_txstat.ts_antenna;
   2863 			} else {
   2864 				an->an_tx_err++;
   2865 				ifp->if_oerrors++;
   2866 				if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY)
   2867 					sc->sc_stats.ast_tx_xretries++;
   2868 				if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO)
   2869 					sc->sc_stats.ast_tx_fifoerr++;
   2870 				if (ds->ds_txstat.ts_status & HAL_TXERR_FILT)
   2871 					sc->sc_stats.ast_tx_filtered++;
   2872 				an->an_tx_antenna = 0;	/* invalidate */
   2873 			}
   2874 			sr = ds->ds_txstat.ts_shortretry;
   2875 			lr = ds->ds_txstat.ts_longretry;
   2876 			sc->sc_stats.ast_tx_shortretry += sr;
   2877 			sc->sc_stats.ast_tx_longretry += lr;
   2878 			if (sr + lr)
   2879 				an->an_tx_retr++;
   2880 			/*
   2881 			 * Reclaim reference to node.
   2882 			 *
   2883 			 * NB: the node may be reclaimed here if, for example
   2884 			 *     this is a DEAUTH message that was sent and the
   2885 			 *     node was timed out due to inactivity.
   2886 			 */
   2887 			if (ni != ic->ic_bss)
   2888 				ieee80211_free_node(ic, ni);
   2889 		}
   2890 		ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE);
   2891 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2892 		m_freem(bf->bf_m);
   2893 		bf->bf_m = NULL;
   2894 		bf->bf_node = NULL;
   2895 
   2896 		ath_txbuf_critsect_begin(sc, s2);
   2897 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2898 		ath_txbuf_critsect_end(sc, s2);
   2899 	}
   2900 	ifp->if_flags &= ~IFF_OACTIVE;
   2901 	sc->sc_tx_timer = 0;
   2902 
   2903 	ath_start(ifp);
   2904 }
   2905 
   2906 /*
   2907  * Drain the transmit queue and reclaim resources.
   2908  */
   2909 static void
   2910 ath_draintxq(struct ath_softc *sc)
   2911 {
   2912 	struct ath_hal *ah = sc->sc_ah;
   2913 	struct ieee80211com *ic = &sc->sc_ic;
   2914 	struct ifnet *ifp = &ic->ic_if;
   2915 	struct ieee80211_node *ni;
   2916 	struct ath_buf *bf;
   2917 	ath_txq_critsect_decl(s);
   2918 	ath_txbuf_critsect_decl(s2);
   2919 
   2920 	/* XXX return value */
   2921 	if (!sc->sc_invalid) {
   2922 		/* don't touch the hardware if marked invalid */
   2923 		(void) ath_hal_stoptxdma(ah, sc->sc_txhalq);
   2924 		DPRINTF(ATH_DEBUG_RESET,
   2925 		    ("%s: tx queue %p, link %p\n", __func__,
   2926 		    (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq),
   2927 		    sc->sc_txlink));
   2928 		(void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
   2929 		DPRINTF(ATH_DEBUG_RESET,
   2930 		    ("%s: beacon queue %p\n", __func__,
   2931 		    (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq)));
   2932 	}
   2933 	for (;;) {
   2934 		ath_txq_critsect_begin(sc, s);
   2935 		bf = TAILQ_FIRST(&sc->sc_txq);
   2936 		if (bf == NULL) {
   2937 			sc->sc_txlink = NULL;
   2938 			ath_txq_critsect_end(sc, s);
   2939 			break;
   2940 		}
   2941 		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
   2942 		ath_txq_critsect_end(sc, s);
   2943 #ifdef AR_DEBUG
   2944 		if (ath_debug & ATH_DEBUG_RESET)
   2945 			ath_printtxbuf(bf,
   2946 				ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK);
   2947 #endif /* AR_DEBUG */
   2948 		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
   2949 		m_freem(bf->bf_m);
   2950 		bf->bf_m = NULL;
   2951 		ni = bf->bf_node;
   2952 		bf->bf_node = NULL;
   2953 		ath_txbuf_critsect_begin(sc, s2);
   2954 		if (ni != NULL && ni != ic->ic_bss) {
   2955 			/*
   2956 			 * Reclaim node reference.
   2957 			 */
   2958 			ieee80211_free_node(ic, ni);
   2959 		}
   2960 		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
   2961 		ath_txbuf_critsect_end(sc, s2);
   2962 	}
   2963 	ifp->if_flags &= ~IFF_OACTIVE;
   2964 	sc->sc_tx_timer = 0;
   2965 }
   2966 
   2967 /*
   2968  * Disable the receive h/w in preparation for a reset.
   2969  */
   2970 static void
   2971 ath_stoprecv(struct ath_softc *sc)
   2972 {
   2973 #define	PA2DESC(_sc, _pa) \
   2974 	((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \
   2975 		((_pa) - (_sc)->sc_desc_paddr)))
   2976 	struct ath_hal *ah = sc->sc_ah;
   2977 
   2978 	ath_hal_stoppcurecv(ah);	/* disable PCU */
   2979 	ath_hal_setrxfilter(ah, 0);	/* clear recv filter */
   2980 	ath_hal_stopdmarecv(ah);	/* disable DMA engine */
   2981 	DELAY(3000);			/* long enough for 1 frame */
   2982 #ifdef AR_DEBUG
   2983 	if (ath_debug & ATH_DEBUG_RESET) {
   2984 		struct ath_buf *bf;
   2985 
   2986 		printf("%s: rx queue %p, link %p\n", __func__,
   2987 			(caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
   2988 		TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   2989 			struct ath_desc *ds = bf->bf_desc;
   2990 			if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr,
   2991 			    PA2DESC(sc, ds->ds_link)) == HAL_OK)
   2992 				ath_printrxbuf(bf, 1);
   2993 		}
   2994 	}
   2995 #endif
   2996 	sc->sc_rxlink = NULL;		/* just in case */
   2997 #undef PA2DESC
   2998 }
   2999 
   3000 /*
   3001  * Enable the receive h/w following a reset.
   3002  */
   3003 static int
   3004 ath_startrecv(struct ath_softc *sc)
   3005 {
   3006 	struct ath_hal *ah = sc->sc_ah;
   3007 	struct ath_buf *bf;
   3008 
   3009 	sc->sc_rxlink = NULL;
   3010 	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
   3011 		int error = ath_rxbuf_init(sc, bf);
   3012 		if (error != 0) {
   3013 			DPRINTF(ATH_DEBUG_RECV,
   3014 				("%s: ath_rxbuf_init failed %d\n",
   3015 				__func__, error));
   3016 			return error;
   3017 		}
   3018 	}
   3019 
   3020 	bf = TAILQ_FIRST(&sc->sc_rxbuf);
   3021 	ath_hal_putrxbuf(ah, bf->bf_daddr);
   3022 	ath_hal_rxena(ah);		/* enable recv descriptors */
   3023 	ath_mode_init(sc);		/* set filters, etc. */
   3024 	ath_hal_startpcurecv(ah);	/* re-enable PCU/DMA engine */
   3025 	return 0;
   3026 }
   3027 
   3028 /*
   3029  * Set/change channels.  If the channel is really being changed,
   3030  * it's done by resetting the chip.  To accomplish this we must
   3031  * first cleanup any pending DMA, then restart stuff after a la
   3032  * ath_init.
   3033  */
   3034 static int
   3035 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
   3036 {
   3037 	struct ath_hal *ah = sc->sc_ah;
   3038 	struct ieee80211com *ic = &sc->sc_ic;
   3039 
   3040 	DPRINTF(ATH_DEBUG_ANY, ("%s: %u (%u MHz) -> %u (%u MHz)\n", __func__,
   3041 	    ieee80211_chan2ieee(ic, ic->ic_ibss_chan),
   3042 		ic->ic_ibss_chan->ic_freq,
   3043 	    ieee80211_chan2ieee(ic, chan), chan->ic_freq));
   3044 	if (chan != ic->ic_ibss_chan) {
   3045 		HAL_STATUS status;
   3046 		HAL_CHANNEL hchan;
   3047 		enum ieee80211_phymode mode;
   3048 
   3049 		/*
   3050 		 * To switch channels clear any pending DMA operations;
   3051 		 * wait long enough for the RX fifo to drain, reset the
   3052 		 * hardware at the new frequency, and then re-enable
   3053 		 * the relevant bits of the h/w.
   3054 		 */
   3055 		ath_hal_intrset(ah, 0);		/* disable interrupts */
   3056 		ath_draintxq(sc);		/* clear pending tx frames */
   3057 		ath_stoprecv(sc);		/* turn off frame recv */
   3058 		/*
   3059 		 * Convert to a HAL channel description with
   3060 		 * the flags constrained to reflect the current
   3061 		 * operating mode.
   3062 		 */
   3063 		hchan.channel = chan->ic_freq;
   3064 		hchan.channelFlags = ath_chan2flags(ic, chan);
   3065 		if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) {
   3066 			if_printf(&ic->ic_if, "ath_chan_set: unable to reset "
   3067 				"channel %u (%u Mhz)\n",
   3068 				ieee80211_chan2ieee(ic, chan), chan->ic_freq);
   3069 			return EIO;
   3070 		}
   3071 		/*
   3072 		 * Re-enable rx framework.
   3073 		 */
   3074 		if (ath_startrecv(sc) != 0) {
   3075 			if_printf(&ic->ic_if,
   3076 				"ath_chan_set: unable to restart recv logic\n");
   3077 			return EIO;
   3078 		}
   3079 
   3080 		/*
   3081 		 * Update BPF state.
   3082 		 */
   3083 		sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
   3084 			htole16(chan->ic_freq);
   3085 		sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
   3086 			htole16(chan->ic_flags);
   3087 
   3088 		/*
   3089 		 * Change channels and update the h/w rate map
   3090 		 * if we're switching; e.g. 11a to 11b/g.
   3091 		 */
   3092 		ic->ic_ibss_chan = chan;
   3093 		mode = ieee80211_chan2mode(ic, chan);
   3094 		if (mode != sc->sc_curmode)
   3095 			ath_setcurmode(sc, mode);
   3096 
   3097 		/*
   3098 		 * Re-enable interrupts.
   3099 		 */
   3100 		ath_hal_intrset(ah, sc->sc_imask);
   3101 	}
   3102 	return 0;
   3103 }
   3104 
   3105 static void
   3106 ath_next_scan(void *arg)
   3107 {
   3108 	struct ath_softc *sc = arg;
   3109 	struct ieee80211com *ic = &sc->sc_ic;
   3110 	int s;
   3111 
   3112 	/* don't call ath_start w/o network interrupts blocked */
   3113 	s = splnet();
   3114 
   3115 	if (ic->ic_state == IEEE80211_S_SCAN)
   3116 		ieee80211_next_scan(ic);
   3117 	splx(s);
   3118 }
   3119 
   3120 /*
   3121  * Periodically recalibrate the PHY to account
   3122  * for temperature/environment changes.
   3123  */
   3124 static void
   3125 ath_calibrate(void *arg)
   3126 {
   3127 	struct ath_softc *sc = arg;
   3128 	struct ath_hal *ah = sc->sc_ah;
   3129 	struct ieee80211com *ic = &sc->sc_ic;
   3130 	struct ieee80211_channel *c;
   3131 	HAL_CHANNEL hchan;
   3132 
   3133 	sc->sc_stats.ast_per_cal++;
   3134 
   3135 	/*
   3136 	 * Convert to a HAL channel description with the flags
   3137 	 * constrained to reflect the current operating mode.
   3138 	 */
   3139 	c = ic->ic_ibss_chan;
   3140 	hchan.channel = c->ic_freq;
   3141 	hchan.channelFlags = ath_chan2flags(ic, c);
   3142 
   3143 	DPRINTF(ATH_DEBUG_CALIBRATE,
   3144 		("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags));
   3145 
   3146 	if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
   3147 		/*
   3148 		 * Rfgain is out of bounds, reset the chip
   3149 		 * to load new gain values.
   3150 		 */
   3151 		sc->sc_stats.ast_per_rfgain++;
   3152 		ath_reset(sc);
   3153 	}
   3154 	if (!ath_hal_calibrate(ah, &hchan)) {
   3155 		DPRINTF(ATH_DEBUG_ANY,
   3156 			("%s: calibration of channel %u failed\n",
   3157 			__func__, c->ic_freq));
   3158 		sc->sc_stats.ast_per_calfail++;
   3159 	}
   3160 	callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc);
   3161 }
   3162 
   3163 static HAL_LED_STATE
   3164 ath_state_to_led(enum ieee80211_state state)
   3165 {
   3166 	switch (state) {
   3167 	case IEEE80211_S_INIT:
   3168 		return HAL_LED_INIT;
   3169 	case IEEE80211_S_SCAN:
   3170 		return HAL_LED_SCAN;
   3171 	case IEEE80211_S_AUTH:
   3172 		return HAL_LED_AUTH;
   3173 	case IEEE80211_S_ASSOC:
   3174 		return HAL_LED_ASSOC;
   3175 	case IEEE80211_S_RUN:
   3176 		return HAL_LED_RUN;
   3177 	default:
   3178 		panic("%s: unknown 802.11 state %d\n", __func__, state);
   3179 		return HAL_LED_INIT;
   3180 	}
   3181 }
   3182 
   3183 static int
   3184 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
   3185 {
   3186 	struct ifnet *ifp = &ic->ic_if;
   3187 	struct ath_softc *sc = ifp->if_softc;
   3188 	struct ath_hal *ah = sc->sc_ah;
   3189 	struct ieee80211_node *ni;
   3190 	int i, error;
   3191 	const u_int8_t *bssid;
   3192 	u_int32_t rfilt;
   3193 
   3194 	DPRINTF(ATH_DEBUG_ANY, ("%s: %s -> %s\n", __func__,
   3195 		ieee80211_state_name[ic->ic_state],
   3196 		ieee80211_state_name[nstate]));
   3197 
   3198 	ath_hal_setledstate(ah, ath_state_to_led(nstate));	/* set LED */
   3199 
   3200 	if (nstate == IEEE80211_S_INIT) {
   3201 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
   3202 		ath_hal_intrset(ah, sc->sc_imask);
   3203 		callout_stop(&sc->sc_scan_ch);
   3204 		callout_stop(&sc->sc_cal_ch);
   3205 		return (*sc->sc_newstate)(ic, nstate, arg);
   3206 	}
   3207 	ni = ic->ic_bss;
   3208 	error = ath_chan_set(sc, ni->ni_chan);
   3209 	if (error != 0)
   3210 		goto bad;
   3211 	rfilt = ath_calcrxfilter(sc);
   3212 	if (nstate == IEEE80211_S_SCAN) {
   3213 		callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000,
   3214 			ath_next_scan, sc);
   3215 		bssid = ifp->if_broadcastaddr;
   3216 	} else {
   3217 		callout_stop(&sc->sc_scan_ch);
   3218 		bssid = ni->ni_bssid;
   3219 	}
   3220 	ath_hal_setrxfilter(ah, rfilt);
   3221 	DPRINTF(ATH_DEBUG_ANY, ("%s: RX filter 0x%x bssid %s\n",
   3222 		 __func__, rfilt, ether_sprintf(bssid)));
   3223 
   3224 	if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA)
   3225 		ath_hal_setassocid(ah, bssid, ni->ni_associd);
   3226 	else
   3227 		ath_hal_setassocid(ah, bssid, 0);
   3228 	if (ic->ic_flags & IEEE80211_F_PRIVACY) {
   3229 		for (i = 0; i < IEEE80211_WEP_NKID; i++)
   3230 			if (ath_hal_keyisvalid(ah, i))
   3231 				ath_hal_keysetmac(ah, i, bssid);
   3232 	}
   3233 
   3234 	if (nstate == IEEE80211_S_RUN) {
   3235 		DPRINTF(ATH_DEBUG_ANY, ("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s "
   3236 			"capinfo=0x%04x chan=%d\n"
   3237 			 , __func__
   3238 			 , ic->ic_flags
   3239 			 , ni->ni_intval
   3240 			 , ether_sprintf(ni->ni_bssid)
   3241 			 , ni->ni_capinfo
   3242 			 , ieee80211_chan2ieee(ic, ni->ni_chan)));
   3243 
   3244 		/*
   3245 		 * Allocate and setup the beacon frame for AP or adhoc mode.
   3246 		 */
   3247 		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
   3248 		    ic->ic_opmode == IEEE80211_M_IBSS) {
   3249 			error = ath_beacon_alloc(sc, ni);
   3250 			if (error != 0)
   3251 				goto bad;
   3252 		}
   3253 
   3254 		/*
   3255 		 * Configure the beacon and sleep timers.
   3256 		 */
   3257 		ath_beacon_config(sc);
   3258 
   3259 		/* start periodic recalibration timer */
   3260 		callout_reset(&sc->sc_cal_ch, hz * ath_calinterval,
   3261 			ath_calibrate, sc);
   3262 	} else {
   3263 		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
   3264 		ath_hal_intrset(ah, sc->sc_imask);
   3265 		callout_stop(&sc->sc_cal_ch);		/* no calibration */
   3266 	}
   3267 	/*
   3268 	 * Reset the rate control state.
   3269 	 */
   3270 	ath_rate_ctl_reset(sc, nstate);
   3271 	/*
   3272 	 * Invoke the parent method to complete the work.
   3273 	 */
   3274 	return (*sc->sc_newstate)(ic, nstate, arg);
   3275 bad:
   3276 	callout_stop(&sc->sc_scan_ch);
   3277 	callout_stop(&sc->sc_cal_ch);
   3278 	/* NB: do not invoke the parent */
   3279 	return error;
   3280 }
   3281 
   3282 /*
   3283  * Setup driver-specific state for a newly associated node.
   3284  * Note that we're called also on a re-associate, the isnew
   3285  * param tells us if this is the first time or not.
   3286  */
   3287 static void
   3288 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
   3289 {
   3290 	if (isnew) {
   3291 		struct ath_node *an = (struct ath_node *) ni;
   3292 
   3293 		an->an_tx_ok = an->an_tx_err =
   3294 			an->an_tx_retr = an->an_tx_upper = 0;
   3295 		/* start with highest negotiated rate */
   3296 		/*
   3297 		 * XXX should do otherwise but only when
   3298 		 * the rate control algorithm is better.
   3299 		 */
   3300 		KASSERT(ni->ni_rates.rs_nrates > 0,
   3301 			("new association w/ no rates!"));
   3302 		ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
   3303 	}
   3304 }
   3305 
   3306 static int
   3307 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor,
   3308     HAL_BOOL xchanmode)
   3309 {
   3310 	struct ieee80211com *ic = &sc->sc_ic;
   3311 	struct ifnet *ifp = &ic->ic_if;
   3312 	struct ath_hal *ah = sc->sc_ah;
   3313 	HAL_CHANNEL *chans;
   3314 	int i, ix, nchan;
   3315 
   3316 	chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL),
   3317 			M_TEMP, M_NOWAIT);
   3318 	if (chans == NULL) {
   3319 		if_printf(ifp, "unable to allocate channel table\n");
   3320 		return ENOMEM;
   3321 	}
   3322 	if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
   3323 	    cc, HAL_MODE_ALL, outdoor, xchanmode)) {
   3324 		if_printf(ifp, "unable to collect channel list from hal\n");
   3325 		free(chans, M_TEMP);
   3326 		return EINVAL;
   3327 	}
   3328 
   3329 	/*
   3330 	 * Convert HAL channels to ieee80211 ones and insert
   3331 	 * them in the table according to their channel number.
   3332 	 */
   3333 	for (i = 0; i < nchan; i++) {
   3334 		HAL_CHANNEL *c = &chans[i];
   3335 		ix = ath_hal_mhz2ieee(c->channel, c->channelFlags);
   3336 		if (ix > IEEE80211_CHAN_MAX) {
   3337 			if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n",
   3338 				ix, c->channel, c->channelFlags);
   3339 			continue;
   3340 		}
   3341 		DPRINTF(ATH_DEBUG_ANY,
   3342 		    ("%s: HAL channel %d/%d freq %d flags %#04x idx %d\n",
   3343 		    sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags,
   3344 		    ix));
   3345 		/* NB: flags are known to be compatible */
   3346 		if (ic->ic_channels[ix].ic_freq == 0) {
   3347 			ic->ic_channels[ix].ic_freq = c->channel;
   3348 			ic->ic_channels[ix].ic_flags = c->channelFlags;
   3349 		} else {
   3350 			/* channels overlap; e.g. 11g and 11b */
   3351 			ic->ic_channels[ix].ic_flags |= c->channelFlags;
   3352 		}
   3353 	}
   3354 	free(chans, M_TEMP);
   3355 	return 0;
   3356 }
   3357 
   3358 static int
   3359 ath_rate_setup(struct ath_softc *sc, u_int mode)
   3360 {
   3361 	struct ath_hal *ah = sc->sc_ah;
   3362 	struct ieee80211com *ic = &sc->sc_ic;
   3363 	const HAL_RATE_TABLE *rt;
   3364 	struct ieee80211_rateset *rs;
   3365 	int i, maxrates;
   3366 
   3367 	switch (mode) {
   3368 	case IEEE80211_MODE_11A:
   3369 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A);
   3370 		break;
   3371 	case IEEE80211_MODE_11B:
   3372 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B);
   3373 		break;
   3374 	case IEEE80211_MODE_11G:
   3375 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G);
   3376 		break;
   3377 	case IEEE80211_MODE_TURBO:
   3378 		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO);
   3379 		break;
   3380 	default:
   3381 		DPRINTF(ATH_DEBUG_ANY,
   3382 			("%s: invalid mode %u\n", __func__, mode));
   3383 		return 0;
   3384 	}
   3385 	rt = sc->sc_rates[mode];
   3386 	if (rt == NULL)
   3387 		return 0;
   3388 	if (rt->rateCount > IEEE80211_RATE_MAXSIZE) {
   3389 		DPRINTF(ATH_DEBUG_ANY,
   3390 			("%s: rate table too small (%u > %u)\n",
   3391 			__func__, rt->rateCount, IEEE80211_RATE_MAXSIZE));
   3392 		maxrates = IEEE80211_RATE_MAXSIZE;
   3393 	} else
   3394 		maxrates = rt->rateCount;
   3395 	rs = &ic->ic_sup_rates[mode];
   3396 	for (i = 0; i < maxrates; i++)
   3397 		rs->rs_rates[i] = rt->info[i].dot11Rate;
   3398 	rs->rs_nrates = maxrates;
   3399 	return 1;
   3400 }
   3401 
   3402 static void
   3403 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
   3404 {
   3405 	const HAL_RATE_TABLE *rt;
   3406 	int i;
   3407 
   3408 	memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
   3409 	rt = sc->sc_rates[mode];
   3410 	KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
   3411 	for (i = 0; i < rt->rateCount; i++)
   3412 		sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i;
   3413 	memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
   3414 	for (i = 0; i < 32; i++)
   3415 		sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate;
   3416 	sc->sc_currates = rt;
   3417 	sc->sc_curmode = mode;
   3418 }
   3419 
   3420 /*
   3421  * Reset the rate control state for each 802.11 state transition.
   3422  */
   3423 static void
   3424 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state)
   3425 {
   3426 	struct ieee80211com *ic = &sc->sc_ic;
   3427 	struct ieee80211_node *ni;
   3428 	struct ath_node *an;
   3429 
   3430 	if (ic->ic_opmode != IEEE80211_M_STA) {
   3431 		/*
   3432 		 * When operating as a station the node table holds
   3433 		 * the AP's that were discovered during scanning.
   3434 		 * For any other operating mode we want to reset the
   3435 		 * tx rate state of each node.
   3436 		 */
   3437 		TAILQ_FOREACH(ni, &ic->ic_node, ni_list) {
   3438 			ni->ni_txrate = 0;		/* use lowest rate */
   3439 			an = (struct ath_node *) ni;
   3440 			an->an_tx_ok = an->an_tx_err = an->an_tx_retr =
   3441 			    an->an_tx_upper = 0;
   3442 		}
   3443 	}
   3444 	/*
   3445 	 * Reset local xmit state; this is really only meaningful
   3446 	 * when operating in station or adhoc mode.
   3447 	 */
   3448 	ni = ic->ic_bss;
   3449 	an = (struct ath_node *) ni;
   3450 	an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0;
   3451 	if (state == IEEE80211_S_RUN) {
   3452 		/* start with highest negotiated rate */
   3453 		KASSERT(ni->ni_rates.rs_nrates > 0,
   3454 			("transition to RUN state w/ no rates!"));
   3455 		ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
   3456 	} else {
   3457 		/* use lowest rate */
   3458 		ni->ni_txrate = 0;
   3459 	}
   3460 }
   3461 
   3462 /*
   3463  * Examine and potentially adjust the transmit rate.
   3464  */
   3465 static void
   3466 ath_rate_ctl(void *arg, struct ieee80211_node *ni)
   3467 {
   3468 	struct ath_softc *sc = arg;
   3469 	struct ath_node *an = (struct ath_node *) ni;
   3470 	struct ieee80211_rateset *rs = &ni->ni_rates;
   3471 	int mod = 0, orate, enough;
   3472 
   3473 	/*
   3474 	 * Rate control
   3475 	 * XXX: very primitive version.
   3476 	 */
   3477 	sc->sc_stats.ast_rate_calls++;
   3478 
   3479 	enough = (an->an_tx_ok + an->an_tx_err >= 10);
   3480 
   3481 	/* no packet reached -> down */
   3482 	if (an->an_tx_err > 0 && an->an_tx_ok == 0)
   3483 		mod = -1;
   3484 
   3485 	/* all packets needs retry in average -> down */
   3486 	if (enough && an->an_tx_ok < an->an_tx_retr)
   3487 		mod = -1;
   3488 
   3489 	/* no error and less than 10% of packets needs retry -> up */
   3490 	if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10)
   3491 		mod = 1;
   3492 
   3493 	orate = ni->ni_txrate;
   3494 	switch (mod) {
   3495 	case 0:
   3496 		if (enough && an->an_tx_upper > 0)
   3497 			an->an_tx_upper--;
   3498 		break;
   3499 	case -1:
   3500 		if (ni->ni_txrate > 0) {
   3501 			ni->ni_txrate--;
   3502 			sc->sc_stats.ast_rate_drop++;
   3503 		}
   3504 		an->an_tx_upper = 0;
   3505 		break;
   3506 	case 1:
   3507 		if (++an->an_tx_upper < 2)
   3508 			break;
   3509 		an->an_tx_upper = 0;
   3510 		if (ni->ni_txrate + 1 < rs->rs_nrates) {
   3511 			ni->ni_txrate++;
   3512 			sc->sc_stats.ast_rate_raise++;
   3513 		}
   3514 		break;
   3515 	}
   3516 
   3517 	if (ni->ni_txrate != orate) {
   3518 		DPRINTF(ATH_DEBUG_RATE,
   3519 		    ("%s: %dM -> %dM (%d ok, %d err, %d retr)\n",
   3520 		    __func__,
   3521 		    (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2,
   3522 		    (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2,
   3523 		    an->an_tx_ok, an->an_tx_err, an->an_tx_retr));
   3524 	}
   3525 	if (ni->ni_txrate != orate || enough)
   3526 		an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0;
   3527 }
   3528 
   3529 #ifdef AR_DEBUG
   3530 #ifdef __FreeBSD__
   3531 static int
   3532 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
   3533 {
   3534 	char dmode[64];
   3535 	int error;
   3536 
   3537 	strncpy(dmode, "", sizeof(dmode) - 1);
   3538 	dmode[sizeof(dmode) - 1] = '\0';
   3539 	error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
   3540 
   3541 	if (error == 0 && req->newptr != NULL) {
   3542 		struct ifnet *ifp;
   3543 		struct ath_softc *sc;
   3544 
   3545 		ifp = ifunit("ath0");		/* XXX */
   3546 		if (!ifp)
   3547 			return EINVAL;
   3548 		sc = ifp->if_softc;
   3549 		if (strcmp(dmode, "hal") == 0)
   3550 			ath_hal_dumpstate(sc->sc_ah);
   3551 		else
   3552 			return EINVAL;
   3553 	}
   3554 	return error;
   3555 }
   3556 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
   3557 	0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
   3558 #endif /* __FreeBSD__ */
   3559 
   3560 #if 0 /* #ifdef __NetBSD__ */
   3561 static int
   3562 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
   3563 {
   3564 	char dmode[64];
   3565 	int error;
   3566 
   3567 	strncpy(dmode, "", sizeof(dmode) - 1);
   3568 	dmode[sizeof(dmode) - 1] = '\0';
   3569 	error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
   3570 
   3571 	if (error == 0 && req->newptr != NULL) {
   3572 		struct ifnet *ifp;
   3573 		struct ath_softc *sc;
   3574 
   3575 		ifp = ifunit("ath0");		/* XXX */
   3576 		if (!ifp)
   3577 			return EINVAL;
   3578 		sc = ifp->if_softc;
   3579 		if (strcmp(dmode, "hal") == 0)
   3580 			ath_hal_dumpstate(sc->sc_ah);
   3581 		else
   3582 			return EINVAL;
   3583 	}
   3584 	return error;
   3585 }
   3586 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
   3587 	0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
   3588 #endif /* __NetBSD__ */
   3589 
   3590 static void
   3591 ath_printrxbuf(struct ath_buf *bf, int done)
   3592 {
   3593 	struct ath_desc *ds;
   3594 	int i;
   3595 
   3596 	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
   3597 		printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n",
   3598 		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
   3599 		    ds->ds_link, ds->ds_data,
   3600 		    ds->ds_ctl0, ds->ds_ctl1,
   3601 		    ds->ds_hw[0], ds->ds_hw[1],
   3602 		    !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!');
   3603 	}
   3604 }
   3605 
   3606 static void
   3607 ath_printtxbuf(struct ath_buf *bf, int done)
   3608 {
   3609 	struct ath_desc *ds;
   3610 	int i;
   3611 
   3612 	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
   3613 		printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n",
   3614 		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
   3615 		    ds->ds_link, ds->ds_data,
   3616 		    ds->ds_ctl0, ds->ds_ctl1,
   3617 		    ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3],
   3618 		    !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!');
   3619 	}
   3620 }
   3621 #endif /* AR_DEBUG */
   3622