ath.c revision 1.38
1 /* $NetBSD: ath.c,v 1.38 2004/09/07 01:15:59 enami Exp $ */ 2 3 /*- 4 * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.54 2004/04/05 04:42:42 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.38 2004/09/07 01:15:59 enami Exp $"); 45 #endif 46 47 /* 48 * Driver for the Atheros Wireless LAN controller. 49 * 50 * This software is derived from work of Atsushi Onoe; his contribution 51 * is greatly appreciated. 52 */ 53 54 #include "opt_inet.h" 55 56 #ifdef __NetBSD__ 57 #include "bpfilter.h" 58 #endif /* __NetBSD__ */ 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/types.h> 63 #include <sys/sysctl.h> 64 #include <sys/mbuf.h> 65 #include <sys/malloc.h> 66 #include <sys/lock.h> 67 #ifdef __FreeBSD__ 68 #include <sys/mutex.h> 69 #endif 70 #include <sys/kernel.h> 71 #include <sys/socket.h> 72 #include <sys/sockio.h> 73 #include <sys/errno.h> 74 #include <sys/callout.h> 75 #ifdef __FreeBSD__ 76 #include <sys/bus.h> 77 #else 78 #include <machine/bus.h> 79 #endif 80 #include <sys/endian.h> 81 82 #include <machine/bus.h> 83 84 #include <net/if.h> 85 #include <net/if_dl.h> 86 #include <net/if_media.h> 87 #include <net/if_arp.h> 88 #ifdef __FreeBSD__ 89 #include <net/ethernet.h> 90 #else 91 #include <net/if_ether.h> 92 #endif 93 #include <net/if_llc.h> 94 95 #include <net80211/ieee80211_var.h> 96 #include <net80211/ieee80211_compat.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #endif 101 102 #ifdef INET 103 #include <netinet/in.h> 104 #endif 105 106 #include <dev/ic/athcompat.h> 107 108 #define AR_DEBUG 109 #ifdef __FreeBSD__ 110 #include <dev/ath/if_athvar.h> 111 #include <contrib/dev/ath/ah_desc.h> 112 #else 113 #include <dev/ic/athvar.h> 114 #include <../contrib/sys/dev/ic/athhal_desc.h> 115 #endif 116 117 /* unaligned little endian access */ 118 #define LE_READ_2(p) \ 119 ((u_int16_t) \ 120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 121 #define LE_READ_4(p) \ 122 ((u_int32_t) \ 123 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 124 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 125 126 #ifdef __FreeBSD__ 127 static void ath_init(void *); 128 #else 129 static int ath_init(struct ifnet *); 130 #endif 131 static int ath_init1(struct ath_softc *); 132 static int ath_intr1(struct ath_softc *); 133 static void ath_stop(struct ifnet *); 134 static void ath_start(struct ifnet *); 135 static void ath_reset(struct ath_softc *); 136 static int ath_media_change(struct ifnet *); 137 static void ath_watchdog(struct ifnet *); 138 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 139 static void ath_fatal_proc(void *, int); 140 static void ath_rxorn_proc(void *, int); 141 static void ath_bmiss_proc(void *, int); 142 static void ath_initkeytable(struct ath_softc *); 143 static void ath_mode_init(struct ath_softc *); 144 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 145 static void ath_beacon_proc(struct ath_softc *, int); 146 static void ath_beacon_free(struct ath_softc *); 147 static void ath_beacon_config(struct ath_softc *); 148 static int ath_desc_alloc(struct ath_softc *); 149 static void ath_desc_free(struct ath_softc *); 150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 151 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 152 static void ath_node_copy(struct ieee80211com *, 153 struct ieee80211_node *, const struct ieee80211_node *); 154 static u_int8_t ath_node_getrssi(struct ieee80211com *, 155 struct ieee80211_node *); 156 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 157 static void ath_rx_proc(void *, int); 158 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 159 struct ath_buf *, struct mbuf *); 160 static void ath_tx_proc(void *, int); 161 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 162 static void ath_draintxq(struct ath_softc *); 163 static void ath_stoprecv(struct ath_softc *); 164 static int ath_startrecv(struct ath_softc *); 165 static void ath_next_scan(void *); 166 static void ath_calibrate(void *); 167 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 168 static void ath_newassoc(struct ieee80211com *, 169 struct ieee80211_node *, int); 170 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor, 171 HAL_BOOL xchanmode); 172 173 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 174 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 175 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 176 static void ath_rate_ctl(void *, struct ieee80211_node *); 177 static void ath_recv_mgmt(struct ieee80211com *, struct mbuf *, 178 struct ieee80211_node *, int, int, u_int32_t); 179 180 #ifdef __NetBSD__ 181 int ath_enable(struct ath_softc *); 182 void ath_disable(struct ath_softc *); 183 void ath_power(int, void *); 184 #endif 185 186 #ifdef __FreeBSD__ 187 SYSCTL_DECL(_hw_ath); 188 /* XXX validate sysctl values */ 189 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 190 0, "channel dwell time (ms) for AP/station scanning"); 191 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 192 0, "chip calibration interval (secs)"); 193 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 194 0, "enable/disable outdoor operation"); 195 TUNABLE_INT("hw.ath.outdoor", &ath_outdoor); 196 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 197 0, "country code"); 198 TUNABLE_INT("hw.ath.countrycode", &ath_countrycode); 199 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 200 0, "regulatory domain"); 201 #endif /* __FreeBSD__ */ 202 203 #ifdef __NetBSD__ 204 static int ath_dwelltime_nodenum, ath_calibrate_nodenum, ath_outdoor_nodenum, 205 ath_countrycode_nodenum, ath_regdomain_nodenum, ath_debug_nodenum; 206 #endif /* __NetBSD__ */ 207 208 static int ath_dwelltime = 200; /* 5 channels/second */ 209 static int ath_calinterval = 30; /* calibrate every 30 secs */ 210 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 211 static int ath_xchanmode = AH_TRUE; /* enable extended channels */ 212 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 213 static int ath_regdomain = 0; /* regulatory domain */ 214 215 #ifdef AR_DEBUG 216 int ath_debug = 0; 217 #ifdef __FreeBSD__ 218 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 219 0, "control debugging printfs"); 220 TUNABLE_INT("hw.ath.debug", &ath_debug); 221 #endif /* __FreeBSD__ */ 222 #define IFF_DUMPPKTS(_ifp, _m) \ 223 ((ath_debug & _m) || \ 224 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 225 static void ath_printrxbuf(struct ath_buf *bf, int); 226 static void ath_printtxbuf(struct ath_buf *bf, int); 227 enum { 228 ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 229 ATH_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 230 ATH_DEBUG_RECV = 0x00000004, /* basic recv operation */ 231 ATH_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 232 ATH_DEBUG_RATE = 0x00000010, /* rate control */ 233 ATH_DEBUG_RESET = 0x00000020, /* reset processing */ 234 ATH_DEBUG_MODE = 0x00000040, /* mode init/setup */ 235 ATH_DEBUG_BEACON = 0x00000080, /* beacon handling */ 236 ATH_DEBUG_WATCHDOG = 0x00000100, /* watchdog timeout */ 237 ATH_DEBUG_INTR = 0x00001000, /* ISR */ 238 ATH_DEBUG_TX_PROC = 0x00002000, /* tx ISR proc */ 239 ATH_DEBUG_RX_PROC = 0x00004000, /* rx ISR proc */ 240 ATH_DEBUG_BEACON_PROC = 0x00008000, /* beacon ISR proc */ 241 ATH_DEBUG_CALIBRATE = 0x00010000, /* periodic calibration */ 242 ATH_DEBUG_ANY = 0xffffffff 243 }; 244 #define DPRINTF(_m,X) if (ath_debug & (_m)) printf X 245 #else 246 #define IFF_DUMPPKTS(_ifp, _m) \ 247 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 248 #define DPRINTF(_m, X) 249 #endif 250 251 #ifdef __NetBSD__ 252 int 253 ath_activate(struct device *self, enum devact act) 254 { 255 struct ath_softc *sc = (struct ath_softc *)self; 256 int rv = 0, s; 257 258 s = splnet(); 259 switch (act) { 260 case DVACT_ACTIVATE: 261 rv = EOPNOTSUPP; 262 break; 263 case DVACT_DEACTIVATE: 264 if_deactivate(&sc->sc_ic.ic_if); 265 break; 266 } 267 splx(s); 268 return rv; 269 } 270 271 int 272 ath_enable(struct ath_softc *sc) 273 { 274 if (ATH_IS_ENABLED(sc) == 0) { 275 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 276 printf("%s: device enable failed\n", 277 sc->sc_dev.dv_xname); 278 return (EIO); 279 } 280 sc->sc_flags |= ATH_ENABLED; 281 } 282 return (0); 283 } 284 285 void 286 ath_disable(struct ath_softc *sc) 287 { 288 if (!ATH_IS_ENABLED(sc)) 289 return; 290 if (sc->sc_disable != NULL) 291 (*sc->sc_disable)(sc); 292 sc->sc_flags &= ~ATH_ENABLED; 293 } 294 295 static int 296 sysctl_ath_verify(SYSCTLFN_ARGS) 297 { 298 int error, t; 299 struct sysctlnode node; 300 301 node = *rnode; 302 t = *(int*)rnode->sysctl_data; 303 node.sysctl_data = &t; 304 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 305 if (error || newp == NULL) 306 return (error); 307 308 DPRINTF(ATH_DEBUG_ANY, ("%s: t = %d, nodenum = %d, rnodenum = %d\n", 309 __func__, t, node.sysctl_num, rnode->sysctl_num)); 310 311 if (node.sysctl_num == ath_dwelltime_nodenum) { 312 if (t <= 0) 313 return (EINVAL); 314 } else if (node.sysctl_num == ath_calibrate_nodenum) { 315 if (t <= 0) 316 return (EINVAL); 317 #ifdef AR_DEBUG 318 } else if (node.sysctl_num == ath_debug_nodenum) { 319 ; /* Accept any vaule */ 320 #endif /* AR_DEBUG */ 321 } else 322 return (EINVAL); 323 324 *(int*)rnode->sysctl_data = t; 325 326 return (0); 327 } 328 329 /* 330 * Setup sysctl(3) MIB, ath.*. 331 * 332 * TBD condition CTLFLAG_PERMANENT on being an LKM or not 333 */ 334 SYSCTL_SETUP(sysctl_ath, "sysctl ath subtree setup") 335 { 336 int rc, ath_node_num; 337 struct sysctlnode *node; 338 339 if ((rc = sysctl_createv(clog, 0, NULL, NULL, 340 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL, 341 NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) 342 goto err; 343 344 if ((rc = sysctl_createv(clog, 0, NULL, &node, 345 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ath", 346 SYSCTL_DESCR("ath information and options"), 347 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) 348 goto err; 349 350 ath_node_num = node->sysctl_num; 351 352 /* channel dwell time (ms) for AP/station scanning */ 353 if ((rc = sysctl_createv(clog, 0, NULL, &node, 354 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 355 CTLTYPE_INT, "dwell", 356 SYSCTL_DESCR("Channel dwell time (ms) for AP/station scanning"), 357 sysctl_ath_verify, 0, &ath_dwelltime, 358 0, CTL_HW, ath_node_num, CTL_CREATE, 359 CTL_EOL)) != 0) 360 goto err; 361 362 ath_dwelltime_nodenum = node->sysctl_num; 363 364 /* chip calibration interval (secs) */ 365 if ((rc = sysctl_createv(clog, 0, NULL, &node, 366 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 367 CTLTYPE_INT, "calibrate", 368 SYSCTL_DESCR("Chip calibration interval (secs)"), sysctl_ath_verify, 369 0, &ath_calinterval, 0, CTL_HW, 370 ath_node_num, CTL_CREATE, CTL_EOL)) != 0) 371 goto err; 372 373 ath_calibrate_nodenum = node->sysctl_num; 374 375 /* enable/disable outdoor operation */ 376 if ((rc = sysctl_createv(clog, 0, NULL, &node, 377 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 378 "outdoor", SYSCTL_DESCR("Enable/disable outdoor operation"), 379 NULL, 0, &ath_outdoor, 0, 380 CTL_HW, ath_node_num, CTL_CREATE, 381 CTL_EOL)) != 0) 382 goto err; 383 384 ath_outdoor_nodenum = node->sysctl_num; 385 386 /* country code */ 387 if ((rc = sysctl_createv(clog, 0, NULL, &node, 388 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 389 "countrycode", SYSCTL_DESCR("Country code"), 390 NULL, 0, &ath_countrycode, 0, 391 CTL_HW, ath_node_num, CTL_CREATE, 392 CTL_EOL)) != 0) 393 goto err; 394 395 ath_countrycode_nodenum = node->sysctl_num; 396 397 /* regulatory domain */ 398 if ((rc = sysctl_createv(clog, 0, NULL, &node, 399 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_INT, 400 "regdomain", SYSCTL_DESCR("Regulatory domain"), 401 NULL, 0, &ath_regdomain, 0, 402 CTL_HW, ath_node_num, CTL_CREATE, 403 CTL_EOL)) != 0) 404 goto err; 405 406 ath_regdomain_nodenum = node->sysctl_num; 407 408 #ifdef AR_DEBUG 409 410 /* control debugging printfs */ 411 if ((rc = sysctl_createv(clog, 0, NULL, &node, 412 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 413 "debug", SYSCTL_DESCR("Enable/disable ath debugging output"), 414 sysctl_ath_verify, 0, &ath_debug, 0, 415 CTL_HW, ath_node_num, CTL_CREATE, 416 CTL_EOL)) != 0) 417 goto err; 418 419 ath_debug_nodenum = node->sysctl_num; 420 421 #endif /* AR_DEBUG */ 422 return; 423 err: 424 printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 425 } 426 #endif /* __NetBSD__ */ 427 428 int 429 ath_attach(u_int16_t devid, struct ath_softc *sc) 430 { 431 struct ieee80211com *ic = &sc->sc_ic; 432 struct ifnet *ifp = &ic->ic_if; 433 struct ath_hal *ah; 434 HAL_STATUS status; 435 HAL_TXQ_INFO qinfo; 436 int error = 0; 437 438 DPRINTF(ATH_DEBUG_ANY, ("%s: devid 0x%x\n", __func__, devid)); 439 440 #ifdef __FreeBSD__ 441 /* set these up early for if_printf use */ 442 if_initname(ifp, device_get_name(sc->sc_dev), 443 device_get_unit(sc->sc_dev)); 444 #else 445 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 446 #endif 447 448 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 449 if (ah == NULL) { 450 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 451 status); 452 error = ENXIO; 453 goto bad; 454 } 455 if (ah->ah_abi != HAL_ABI_VERSION) { 456 if_printf(ifp, "HAL ABI mismatch detected (0x%x != 0x%x)\n", 457 ah->ah_abi, HAL_ABI_VERSION); 458 error = ENXIO; 459 goto bad; 460 } 461 if_printf(ifp, "mac %d.%d phy %d.%d", 462 ah->ah_macVersion, ah->ah_macRev, 463 ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf); 464 if (ah->ah_analog5GhzRev) 465 printf(" 5ghz radio %d.%d", 466 ah->ah_analog5GhzRev >> 4, ah->ah_analog5GhzRev & 0xf); 467 if (ah->ah_analog2GhzRev) 468 printf(" 2ghz radio %d.%d", 469 ah->ah_analog2GhzRev >> 4, ah->ah_analog2GhzRev & 0xf); 470 printf("\n"); 471 sc->sc_ah = ah; 472 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 473 474 /* 475 * Collect the channel list using the default country 476 * code and including outdoor channels. The 802.11 layer 477 * is resposible for filtering this list based on settings 478 * like the phy mode. 479 */ 480 error = ath_getchannels(sc, ath_countrycode, ath_outdoor, 481 ath_xchanmode); 482 if (error != 0) 483 goto bad; 484 /* 485 * Copy these back; they are set as a side effect 486 * of constructing the channel list. 487 */ 488 ath_hal_getregdomain(ah, &ath_regdomain); 489 ath_hal_getcountrycode(ah, &ath_countrycode); 490 491 /* 492 * Setup rate tables for all potential media types. 493 */ 494 ath_rate_setup(sc, IEEE80211_MODE_11A); 495 ath_rate_setup(sc, IEEE80211_MODE_11B); 496 ath_rate_setup(sc, IEEE80211_MODE_11G); 497 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 498 499 error = ath_desc_alloc(sc); 500 if (error != 0) { 501 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 502 goto bad; 503 } 504 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 505 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 506 507 #ifdef __FreeBSD__ 508 ATH_TXBUF_LOCK_INIT(sc); 509 ATH_TXQ_LOCK_INIT(sc); 510 #endif 511 512 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 513 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 514 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 515 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 516 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 517 518 /* 519 * For now just pre-allocate one data queue and one 520 * beacon queue. Note that the HAL handles resetting 521 * them at the needed time. Eventually we'll want to 522 * allocate more tx queues for splitting management 523 * frames and for QOS support. 524 */ 525 sc->sc_bhalq = ath_hal_setuptxqueue(ah,HAL_TX_QUEUE_BEACON,NULL); 526 if (sc->sc_bhalq == (u_int) -1) { 527 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 528 goto bad2; 529 } 530 531 memset(&qinfo, 0, sizeof(qinfo)); 532 qinfo.tqi_subtype = HAL_WME_AC_BE; 533 sc->sc_txhalq = ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_DATA, &qinfo); 534 if (sc->sc_txhalq == (u_int) -1) { 535 if_printf(ifp, "unable to setup a data xmit queue!\n"); 536 goto bad2; 537 } 538 539 ifp->if_softc = sc; 540 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 541 ifp->if_start = ath_start; 542 ifp->if_watchdog = ath_watchdog; 543 ifp->if_ioctl = ath_ioctl; 544 ifp->if_init = ath_init; 545 #ifdef __FreeBSD__ 546 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 547 #else 548 #if 0 549 ifp->if_stop = ath_stop; /* XXX */ 550 #endif 551 IFQ_SET_READY(&ifp->if_snd); 552 #endif 553 554 ic->ic_softc = sc; 555 ic->ic_newassoc = ath_newassoc; 556 /* XXX not right but it's not used anywhere important */ 557 ic->ic_phytype = IEEE80211_T_OFDM; 558 ic->ic_opmode = IEEE80211_M_STA; 559 ic->ic_caps = IEEE80211_C_WEP /* wep supported */ 560 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 561 | IEEE80211_C_HOSTAP /* hostap mode */ 562 | IEEE80211_C_MONITOR /* monitor mode */ 563 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 564 ; 565 566 /* get mac address from hardware */ 567 ath_hal_getmac(ah, ic->ic_myaddr); 568 569 #ifdef __NetBSD__ 570 if_attach(ifp); 571 #endif 572 /* call MI attach routine. */ 573 ieee80211_ifattach(ifp); 574 /* override default methods */ 575 ic->ic_node_alloc = ath_node_alloc; 576 sc->sc_node_free = ic->ic_node_free; 577 ic->ic_node_free = ath_node_free; 578 sc->sc_node_copy = ic->ic_node_copy; 579 ic->ic_node_copy = ath_node_copy; 580 ic->ic_node_getrssi = ath_node_getrssi; 581 sc->sc_newstate = ic->ic_newstate; 582 ic->ic_newstate = ath_newstate; 583 sc->sc_recv_mgmt = ic->ic_recv_mgmt; 584 ic->ic_recv_mgmt = ath_recv_mgmt; 585 586 /* complete initialization */ 587 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 588 589 #if NBPFILTER > 0 590 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 591 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 592 &sc->sc_drvbpf); 593 #endif 594 /* 595 * Initialize constant fields. 596 * XXX make header lengths a multiple of 32-bits so subsequent 597 * headers are properly aligned; this is a kludge to keep 598 * certain applications happy. 599 * 600 * NB: the channel is setup each time we transition to the 601 * RUN state to avoid filling it in for each frame. 602 */ 603 sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(u_int32_t)); 604 sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len); 605 sc->sc_tx_th.wt_ihdr.it_present = htole32(ATH_TX_RADIOTAP_PRESENT); 606 607 sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(u_int32_t)); 608 sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len); 609 sc->sc_rx_th.wr_ihdr.it_present = htole32(ATH_RX_RADIOTAP_PRESENT); 610 611 #ifdef __NetBSD__ 612 sc->sc_flags |= ATH_ATTACHED; 613 /* 614 * Make sure the interface is shutdown during reboot. 615 */ 616 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 617 if (sc->sc_sdhook == NULL) 618 printf("%s: WARNING: unable to establish shutdown hook\n", 619 sc->sc_dev.dv_xname); 620 sc->sc_powerhook = powerhook_establish(ath_power, sc); 621 if (sc->sc_powerhook == NULL) 622 printf("%s: WARNING: unable to establish power hook\n", 623 sc->sc_dev.dv_xname); 624 #endif 625 return 0; 626 bad2: 627 ath_desc_free(sc); 628 bad: 629 if (ah) 630 ath_hal_detach(ah); 631 sc->sc_invalid = 1; 632 return error; 633 } 634 635 int 636 ath_detach(struct ath_softc *sc) 637 { 638 struct ifnet *ifp = &sc->sc_ic.ic_if; 639 ath_softc_critsect_decl(s); 640 641 if ((sc->sc_flags & ATH_ATTACHED) == 0) 642 return (0); 643 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 644 645 ath_softc_critsect_begin(sc, s); 646 ath_stop(ifp); 647 #if NBPFILTER > 0 648 bpfdetach(ifp); 649 #endif 650 ath_desc_free(sc); 651 ath_hal_detach(sc->sc_ah); 652 ieee80211_ifdetach(ifp); 653 #ifdef __NetBSD__ 654 if_detach(ifp); 655 #endif /* __NetBSD__ */ 656 ath_softc_critsect_end(sc, s); 657 #ifdef __NetBSD__ 658 powerhook_disestablish(sc->sc_powerhook); 659 shutdownhook_disestablish(sc->sc_sdhook); 660 #endif /* __NetBSD__ */ 661 #ifdef __FreeBSD__ 662 663 ATH_TXBUF_LOCK_DESTROY(sc); 664 ATH_TXQ_LOCK_DESTROY(sc); 665 666 #endif /* __FreeBSD__ */ 667 return 0; 668 } 669 670 #ifdef __NetBSD__ 671 void 672 ath_power(int why, void *arg) 673 { 674 struct ath_softc *sc = arg; 675 int s; 676 677 DPRINTF(ATH_DEBUG_ANY, ("ath_power(%d)\n", why)); 678 679 s = splnet(); 680 switch (why) { 681 case PWR_SUSPEND: 682 case PWR_STANDBY: 683 ath_suspend(sc, why); 684 break; 685 case PWR_RESUME: 686 ath_resume(sc, why); 687 break; 688 case PWR_SOFTSUSPEND: 689 case PWR_SOFTSTANDBY: 690 case PWR_SOFTRESUME: 691 break; 692 } 693 splx(s); 694 } 695 #endif 696 697 void 698 ath_suspend(struct ath_softc *sc, int why) 699 { 700 struct ifnet *ifp = &sc->sc_ic.ic_if; 701 702 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 703 704 ath_stop(ifp); 705 if (sc->sc_power != NULL) 706 (*sc->sc_power)(sc, why); 707 } 708 709 void 710 ath_resume(struct ath_softc *sc, int why) 711 { 712 struct ifnet *ifp = &sc->sc_ic.ic_if; 713 714 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 715 716 if (ifp->if_flags & IFF_UP) { 717 ath_init(ifp); 718 #if 0 719 (void)ath_intr(sc); 720 #endif 721 if (sc->sc_power != NULL) 722 (*sc->sc_power)(sc, why); 723 if (ifp->if_flags & IFF_RUNNING) 724 ath_start(ifp); 725 } 726 } 727 728 #ifdef __NetBSD__ 729 void 730 ath_shutdown(void *arg) 731 { 732 struct ath_softc *sc = arg; 733 734 ath_stop(&sc->sc_ic.ic_if); 735 } 736 #else 737 void 738 ath_shutdown(struct ath_softc *sc) 739 { 740 #if 1 741 return; 742 #else 743 struct ifnet *ifp = &sc->sc_ic.ic_if; 744 745 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags %x\n", __func__, ifp->if_flags)); 746 747 ath_stop(ifp); 748 #endif 749 } 750 #endif 751 752 #ifdef __NetBSD__ 753 int 754 ath_intr(void *arg) 755 { 756 return ath_intr1((struct ath_softc *)arg); 757 } 758 #else 759 void 760 ath_intr(void *arg) 761 { 762 (void)ath_intr1((struct ath_softc *)arg); 763 } 764 #endif 765 766 static int 767 ath_intr1(struct ath_softc *sc) 768 { 769 struct ieee80211com *ic = &sc->sc_ic; 770 struct ifnet *ifp = &ic->ic_if; 771 struct ath_hal *ah = sc->sc_ah; 772 HAL_INT status; 773 774 if (sc->sc_invalid) { 775 /* 776 * The hardware is not ready/present, don't touch anything. 777 * Note this can happen early on if the IRQ is shared. 778 */ 779 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid; ignored\n", __func__)); 780 return 0; 781 } 782 if (!ath_hal_intrpend(ah)) /* shared irq, not for us */ 783 return 0; 784 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 785 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n", 786 __func__, ifp->if_flags)); 787 ath_hal_getisr(ah, &status); /* clear ISR */ 788 ath_hal_intrset(ah, 0); /* disable further intr's */ 789 return 1; /* XXX */ 790 } 791 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 792 DPRINTF(ATH_DEBUG_INTR, ("%s: status 0x%x\n", __func__, status)); 793 status &= sc->sc_imask; /* discard unasked for bits */ 794 if (status & HAL_INT_FATAL) { 795 sc->sc_stats.ast_hardware++; 796 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 797 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 798 } else if (status & HAL_INT_RXORN) { 799 sc->sc_stats.ast_rxorn++; 800 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 801 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 802 } else { 803 if (status & HAL_INT_RXEOL) { 804 /* 805 * NB: the hardware should re-read the link when 806 * RXE bit is written, but it doesn't work at 807 * least on older hardware revs. 808 */ 809 sc->sc_stats.ast_rxeol++; 810 sc->sc_rxlink = NULL; 811 } 812 if (status & HAL_INT_TXURN) { 813 sc->sc_stats.ast_txurn++; 814 /* bump tx trigger level */ 815 ath_hal_updatetxtriglevel(ah, AH_TRUE); 816 } 817 if (status & HAL_INT_RX) 818 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 819 if (status & HAL_INT_TX) 820 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 821 if (status & HAL_INT_SWBA) { 822 /* 823 * Handle beacon transmission directly; deferring 824 * this is too slow to meet timing constraints 825 * under load. 826 */ 827 ath_beacon_proc(sc, 0); 828 } 829 if (status & HAL_INT_BMISS) { 830 sc->sc_stats.ast_bmiss++; 831 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 832 } 833 } 834 return 1; 835 } 836 837 static void 838 ath_fatal_proc(void *arg, int pending) 839 { 840 struct ath_softc *sc = arg; 841 842 device_printf(sc->sc_dev, "hardware error; resetting\n"); 843 ath_reset(sc); 844 } 845 846 static void 847 ath_rxorn_proc(void *arg, int pending) 848 { 849 struct ath_softc *sc = arg; 850 851 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 852 ath_reset(sc); 853 } 854 855 static void 856 ath_bmiss_proc(void *arg, int pending) 857 { 858 struct ath_softc *sc = arg; 859 struct ieee80211com *ic = &sc->sc_ic; 860 861 DPRINTF(ATH_DEBUG_ANY, ("%s: pending %u\n", __func__, pending)); 862 if (ic->ic_opmode != IEEE80211_M_STA) 863 return; 864 if (ic->ic_state == IEEE80211_S_RUN) { 865 /* 866 * Rather than go directly to scan state, try to 867 * reassociate first. If that fails then the state 868 * machine will drop us into scanning after timing 869 * out waiting for a probe response. 870 */ 871 ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1); 872 } 873 } 874 875 static u_int 876 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 877 { 878 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 879 880 switch (mode) { 881 case IEEE80211_MODE_AUTO: 882 return 0; 883 case IEEE80211_MODE_11A: 884 return CHANNEL_A; 885 case IEEE80211_MODE_11B: 886 return CHANNEL_B; 887 case IEEE80211_MODE_11G: 888 return CHANNEL_PUREG; 889 case IEEE80211_MODE_TURBO: 890 return CHANNEL_T; 891 default: 892 panic("%s: unsupported mode %d\n", __func__, mode); 893 return 0; 894 } 895 } 896 897 #ifdef __NetBSD__ 898 static int 899 ath_init(struct ifnet *ifp) 900 { 901 return ath_init1((struct ath_softc *)ifp->if_softc); 902 } 903 #else 904 static void 905 ath_init(void *arg) 906 { 907 (void)ath_init1((struct ath_softc *)arg); 908 } 909 #endif 910 911 static int 912 ath_init1(struct ath_softc *sc) 913 { 914 struct ieee80211com *ic = &sc->sc_ic; 915 struct ifnet *ifp = &ic->ic_if; 916 struct ieee80211_node *ni; 917 enum ieee80211_phymode mode; 918 struct ath_hal *ah = sc->sc_ah; 919 HAL_STATUS status; 920 HAL_CHANNEL hchan; 921 int error = 0; 922 ath_softc_critsect_decl(s); 923 924 DPRINTF(ATH_DEBUG_ANY, ("%s: if_flags 0x%x\n", 925 __func__, ifp->if_flags)); 926 927 #ifdef __NetBSD__ 928 if ((error = ath_enable(sc)) != 0) 929 return error; 930 #endif 931 932 ath_softc_critsect_begin(sc, s); 933 /* 934 * Stop anything previously setup. This is safe 935 * whether this is the first time through or not. 936 */ 937 ath_stop(ifp); 938 939 /* 940 * The basic interface to setting the hardware in a good 941 * state is ``reset''. On return the hardware is known to 942 * be powered up and with interrupts disabled. This must 943 * be followed by initialization of the appropriate bits 944 * and then setup of the interrupt mask. 945 */ 946 hchan.channel = ic->ic_ibss_chan->ic_freq; 947 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 948 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 949 if_printf(ifp, "unable to reset hardware; hal status %u\n", 950 status); 951 error = EIO; 952 goto done; 953 } 954 955 /* 956 * Setup the hardware after reset: the key cache 957 * is filled as needed and the receive engine is 958 * set going. Frame transmit is handled entirely 959 * in the frame output path; there's nothing to do 960 * here except setup the interrupt mask. 961 */ 962 if (ic->ic_flags & IEEE80211_F_PRIVACY) 963 ath_initkeytable(sc); 964 if ((error = ath_startrecv(sc)) != 0) { 965 if_printf(ifp, "unable to start recv logic\n"); 966 goto done; 967 } 968 969 /* 970 * Enable interrupts. 971 */ 972 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 973 | HAL_INT_RXEOL | HAL_INT_RXORN 974 | HAL_INT_FATAL | HAL_INT_GLOBAL; 975 ath_hal_intrset(ah, sc->sc_imask); 976 977 ifp->if_flags |= IFF_RUNNING; 978 ic->ic_state = IEEE80211_S_INIT; 979 980 /* 981 * The hardware should be ready to go now so it's safe 982 * to kick the 802.11 state machine as it's likely to 983 * immediately call back to us to send mgmt frames. 984 */ 985 ni = ic->ic_bss; 986 ni->ni_chan = ic->ic_ibss_chan; 987 mode = ieee80211_chan2mode(ic, ni->ni_chan); 988 if (mode != sc->sc_curmode) 989 ath_setcurmode(sc, mode); 990 if (ic->ic_opmode != IEEE80211_M_MONITOR) 991 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 992 else 993 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 994 done: 995 ath_softc_critsect_end(sc, s); 996 return error; 997 } 998 999 static void 1000 ath_stop(struct ifnet *ifp) 1001 { 1002 struct ieee80211com *ic = (struct ieee80211com *) ifp; 1003 struct ath_softc *sc = ifp->if_softc; 1004 struct ath_hal *ah = sc->sc_ah; 1005 ath_softc_critsect_decl(s); 1006 1007 DPRINTF(ATH_DEBUG_ANY, ("%s: invalid %u if_flags 0x%x\n", 1008 __func__, sc->sc_invalid, ifp->if_flags)); 1009 1010 ath_softc_critsect_begin(sc, s); 1011 if (ifp->if_flags & IFF_RUNNING) { 1012 /* 1013 * Shutdown the hardware and driver: 1014 * disable interrupts 1015 * turn off timers 1016 * clear transmit machinery 1017 * clear receive machinery 1018 * drain and release tx queues 1019 * reclaim beacon resources 1020 * reset 802.11 state machine 1021 * power down hardware 1022 * 1023 * Note that some of this work is not possible if the 1024 * hardware is gone (invalid). 1025 */ 1026 ifp->if_flags &= ~IFF_RUNNING; 1027 ifp->if_timer = 0; 1028 if (!sc->sc_invalid) 1029 ath_hal_intrset(ah, 0); 1030 ath_draintxq(sc); 1031 if (!sc->sc_invalid) 1032 ath_stoprecv(sc); 1033 else 1034 sc->sc_rxlink = NULL; 1035 #ifdef __FreeBSD__ 1036 IF_DRAIN(&ifp->if_snd); 1037 #else 1038 IF_PURGE(&ifp->if_snd); 1039 #endif 1040 ath_beacon_free(sc); 1041 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 1042 if (!sc->sc_invalid) { 1043 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 1044 } 1045 #ifdef __NetBSD__ 1046 ath_disable(sc); 1047 #endif 1048 } 1049 ath_softc_critsect_end(sc, s); 1050 } 1051 1052 /* 1053 * Reset the hardware w/o losing operational state. This is 1054 * basically a more efficient way of doing ath_stop, ath_init, 1055 * followed by state transitions to the current 802.11 1056 * operational state. Used to recover from errors rx overrun 1057 * and to reset the hardware when rf gain settings must be reset. 1058 */ 1059 static void 1060 ath_reset(struct ath_softc *sc) 1061 { 1062 struct ieee80211com *ic = &sc->sc_ic; 1063 struct ifnet *ifp = &ic->ic_if; 1064 struct ath_hal *ah = sc->sc_ah; 1065 struct ieee80211_channel *c; 1066 HAL_STATUS status; 1067 HAL_CHANNEL hchan; 1068 1069 /* 1070 * Convert to a HAL channel description with the flags 1071 * constrained to reflect the current operating mode. 1072 */ 1073 c = ic->ic_ibss_chan; 1074 hchan.channel = c->ic_freq; 1075 hchan.channelFlags = ath_chan2flags(ic, c); 1076 1077 ath_hal_intrset(ah, 0); /* disable interrupts */ 1078 ath_draintxq(sc); /* stop xmit side */ 1079 ath_stoprecv(sc); /* stop recv side */ 1080 /* NB: indicate channel change so we do a full reset */ 1081 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 1082 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 1083 __func__, status); 1084 ath_hal_intrset(ah, sc->sc_imask); 1085 if (ath_startrecv(sc) != 0) /* restart recv */ 1086 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 1087 ath_start(ifp); /* restart xmit */ 1088 if (ic->ic_state == IEEE80211_S_RUN) 1089 ath_beacon_config(sc); /* restart beacons */ 1090 } 1091 1092 static void 1093 ath_start(struct ifnet *ifp) 1094 { 1095 struct ath_softc *sc = ifp->if_softc; 1096 struct ath_hal *ah = sc->sc_ah; 1097 struct ieee80211com *ic = &sc->sc_ic; 1098 struct ieee80211_node *ni; 1099 struct ath_buf *bf; 1100 struct mbuf *m; 1101 struct ieee80211_frame *wh; 1102 ath_txbuf_critsect_decl(s); 1103 1104 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1105 return; 1106 for (;;) { 1107 /* 1108 * Grab a TX buffer and associated resources. 1109 */ 1110 ath_txbuf_critsect_begin(sc, s); 1111 bf = TAILQ_FIRST(&sc->sc_txbuf); 1112 if (bf != NULL) 1113 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 1114 ath_txbuf_critsect_end(sc, s); 1115 if (bf == NULL) { 1116 DPRINTF(ATH_DEBUG_ANY, ("%s: out of xmit buffers\n", 1117 __func__)); 1118 sc->sc_stats.ast_tx_qstop++; 1119 ifp->if_flags |= IFF_OACTIVE; 1120 break; 1121 } 1122 /* 1123 * Poll the management queue for frames; they 1124 * have priority over normal data frames. 1125 */ 1126 IF_DEQUEUE(&ic->ic_mgtq, m); 1127 if (m == NULL) { 1128 /* 1129 * No data frames go out unless we're associated. 1130 */ 1131 if (ic->ic_state != IEEE80211_S_RUN) { 1132 DPRINTF(ATH_DEBUG_ANY, 1133 ("%s: ignore data packet, state %u\n", 1134 __func__, ic->ic_state)); 1135 sc->sc_stats.ast_tx_discard++; 1136 ath_txbuf_critsect_begin(sc, s); 1137 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1138 ath_txbuf_critsect_end(sc, s); 1139 break; 1140 } 1141 IF_DEQUEUE(&ifp->if_snd, m); 1142 if (m == NULL) { 1143 ath_txbuf_critsect_begin(sc, s); 1144 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1145 ath_txbuf_critsect_end(sc, s); 1146 break; 1147 } 1148 ifp->if_opackets++; 1149 1150 #ifdef __NetBSD__ 1151 #if NBPFILTER > 0 1152 if (ifp->if_bpf) 1153 bpf_mtap(ifp->if_bpf, m); 1154 #endif 1155 #endif 1156 #ifdef __FreeBSD__ 1157 BPF_MTAP(ifp, m); 1158 #endif 1159 /* 1160 * Encapsulate the packet in prep for transmission. 1161 */ 1162 m = ieee80211_encap(ifp, m, &ni); 1163 if (m == NULL) { 1164 DPRINTF(ATH_DEBUG_ANY, 1165 ("%s: encapsulation failure\n", 1166 __func__)); 1167 sc->sc_stats.ast_tx_encap++; 1168 goto bad; 1169 } 1170 wh = mtod(m, struct ieee80211_frame *); 1171 } else { 1172 /* 1173 * Hack! The referenced node pointer is in the 1174 * rcvif field of the packet header. This is 1175 * placed there by ieee80211_mgmt_output because 1176 * we need to hold the reference with the frame 1177 * and there's no other way (other than packet 1178 * tags which we consider too expensive to use) 1179 * to pass it along. 1180 */ 1181 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1182 m->m_pkthdr.rcvif = NULL; 1183 1184 wh = mtod(m, struct ieee80211_frame *); 1185 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1186 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 1187 /* fill time stamp */ 1188 u_int64_t tsf; 1189 u_int32_t *tstamp; 1190 1191 tsf = ath_hal_gettsf64(ah); 1192 /* XXX: adjust 100us delay to xmit */ 1193 tsf += 100; 1194 tstamp = (u_int32_t *)&wh[1]; 1195 tstamp[0] = htole32(tsf & 0xffffffff); 1196 tstamp[1] = htole32(tsf >> 32); 1197 } 1198 sc->sc_stats.ast_tx_mgmt++; 1199 } 1200 1201 if (ath_tx_start(sc, ni, bf, m)) { 1202 bad: 1203 ath_txbuf_critsect_begin(sc, s); 1204 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1205 ath_txbuf_critsect_end(sc, s); 1206 ifp->if_oerrors++; 1207 if (ni != NULL) 1208 ieee80211_release_node(ic, ni); 1209 continue; 1210 } 1211 1212 sc->sc_tx_timer = 5; 1213 ifp->if_timer = 1; 1214 } 1215 } 1216 1217 static int 1218 ath_media_change(struct ifnet *ifp) 1219 { 1220 int error; 1221 1222 error = ieee80211_media_change(ifp); 1223 if (error == ENETRESET) { 1224 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1225 (IFF_RUNNING|IFF_UP)) 1226 ath_init(ifp); /* XXX lose error */ 1227 error = 0; 1228 } 1229 return error; 1230 } 1231 1232 static void 1233 ath_watchdog(struct ifnet *ifp) 1234 { 1235 struct ath_softc *sc = ifp->if_softc; 1236 struct ieee80211com *ic = &sc->sc_ic; 1237 1238 ifp->if_timer = 0; 1239 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1240 return; 1241 if (sc->sc_tx_timer) { 1242 if (--sc->sc_tx_timer == 0) { 1243 if_printf(ifp, "device timeout\n"); 1244 ath_reset(sc); 1245 ifp->if_oerrors++; 1246 sc->sc_stats.ast_watchdog++; 1247 return; 1248 } 1249 ifp->if_timer = 1; 1250 } 1251 if (ic->ic_fixed_rate == -1) { 1252 /* 1253 * Run the rate control algorithm if we're not 1254 * locked at a fixed rate. 1255 */ 1256 if (ic->ic_opmode == IEEE80211_M_STA) 1257 ath_rate_ctl(sc, ic->ic_bss); 1258 else 1259 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1260 } 1261 ieee80211_watchdog(ifp); 1262 } 1263 1264 static int 1265 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1266 { 1267 struct ath_softc *sc = ifp->if_softc; 1268 struct ifreq *ifr = (struct ifreq *)data; 1269 int error = 0; 1270 ath_softc_critsect_decl(s); 1271 1272 ath_softc_critsect_begin(sc, s); 1273 switch (cmd) { 1274 case SIOCSIFFLAGS: 1275 if (ifp->if_flags & IFF_UP) { 1276 if (ifp->if_flags & IFF_RUNNING) { 1277 /* 1278 * To avoid rescanning another access point, 1279 * do not call ath_init() here. Instead, 1280 * only reflect promisc mode settings. 1281 */ 1282 ath_mode_init(sc); 1283 } else { 1284 /* 1285 * Beware of being called during detach to 1286 * reset promiscuous mode. In that case we 1287 * will still be marked UP but not RUNNING. 1288 * However trying to re-init the interface 1289 * is the wrong thing to do as we've already 1290 * torn down much of our state. There's 1291 * probably a better way to deal with this. 1292 */ 1293 if (!sc->sc_invalid) 1294 ath_init(ifp); /* XXX lose error */ 1295 } 1296 } else 1297 ath_stop(ifp); 1298 break; 1299 case SIOCADDMULTI: 1300 case SIOCDELMULTI: 1301 #ifdef __FreeBSD__ 1302 /* 1303 * The upper layer has already installed/removed 1304 * the multicast address(es), just recalculate the 1305 * multicast filter for the card. 1306 */ 1307 if (ifp->if_flags & IFF_RUNNING) 1308 ath_mode_init(sc); 1309 #endif 1310 #ifdef __NetBSD__ 1311 error = (cmd == SIOCADDMULTI) ? 1312 ether_addmulti(ifr, &sc->sc_ic.ic_ec) : 1313 ether_delmulti(ifr, &sc->sc_ic.ic_ec); 1314 if (error == ENETRESET) { 1315 if (ifp->if_flags & IFF_RUNNING) 1316 ath_mode_init(sc); 1317 error = 0; 1318 } 1319 #endif 1320 break; 1321 case SIOCGATHSTATS: 1322 error = copyout(&sc->sc_stats, 1323 ifr->ifr_data, sizeof (sc->sc_stats)); 1324 break; 1325 case SIOCGATHDIAG: { 1326 #if 0 /* XXX punt */ 1327 struct ath_diag *ad = (struct ath_diag *)data; 1328 struct ath_hal *ah = sc->sc_ah; 1329 void *data; 1330 u_int size; 1331 1332 if (ath_hal_getdiagstate(ah, ad->ad_id, &data, &size)) { 1333 if (size < ad->ad_size) 1334 ad->ad_size = size; 1335 if (data) 1336 error = copyout(data, ad->ad_data, ad->ad_size); 1337 } else 1338 error = EINVAL; 1339 #else 1340 error = EINVAL; 1341 #endif 1342 break; 1343 } 1344 default: 1345 error = ieee80211_ioctl(ifp, cmd, data); 1346 if (error == ENETRESET) { 1347 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1348 (IFF_RUNNING|IFF_UP)) 1349 ath_init(ifp); /* XXX lose error */ 1350 error = 0; 1351 } 1352 break; 1353 } 1354 ath_softc_critsect_end(sc, s); 1355 return error; 1356 } 1357 1358 /* 1359 * Fill the hardware key cache with key entries. 1360 */ 1361 static void 1362 ath_initkeytable(struct ath_softc *sc) 1363 { 1364 struct ieee80211com *ic = &sc->sc_ic; 1365 struct ath_hal *ah = sc->sc_ah; 1366 int i; 1367 1368 /* XXX maybe should reset all keys when !WEPON */ 1369 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1370 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1371 if (k->wk_len == 0) 1372 ath_hal_keyreset(ah, i); 1373 else { 1374 HAL_KEYVAL hk; 1375 1376 memset(&hk, 0, sizeof(hk)); 1377 hk.kv_type = HAL_CIPHER_WEP; 1378 hk.kv_len = k->wk_len; 1379 memcpy(hk.kv_val, k->wk_key, k->wk_len); 1380 /* XXX return value */ 1381 ath_hal_keyset(ah, i, &hk); 1382 } 1383 } 1384 } 1385 1386 static void 1387 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1388 { 1389 u_int32_t val; 1390 u_int8_t pos; 1391 1392 val = LE_READ_4(dl + 0); 1393 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1394 val = LE_READ_4(dl + 3); 1395 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1396 pos &= 0x3f; 1397 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1398 } 1399 1400 #ifdef __FreeBSD__ 1401 static void 1402 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1403 { 1404 struct ieee80211com *ic = &sc->sc_ic; 1405 struct ifnet *ifp = &ic->ic_if; 1406 struct ifmultiaddr *ifma; 1407 1408 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1409 caddr_t dl; 1410 1411 /* calculate XOR of eight 6bit values */ 1412 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1413 ath_mcastfilter_accum(dl, &mfilt); 1414 } 1415 } 1416 #else 1417 static void 1418 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1419 { 1420 struct ifnet *ifp = &sc->sc_ic.ic_if; 1421 struct ether_multi *enm; 1422 struct ether_multistep estep; 1423 1424 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1425 while (enm != NULL) { 1426 /* XXX Punt on ranges. */ 1427 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1428 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1429 ifp->if_flags |= IFF_ALLMULTI; 1430 return; 1431 } 1432 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1433 ETHER_NEXT_MULTI(estep, enm); 1434 } 1435 ifp->if_flags &= ~IFF_ALLMULTI; 1436 } 1437 #endif 1438 1439 /* 1440 * Calculate the receive filter according to the 1441 * operating mode and state: 1442 * 1443 * o always accept unicast, broadcast, and multicast traffic 1444 * o maintain current state of phy error reception 1445 * o probe request frames are accepted only when operating in 1446 * hostap, adhoc, or monitor modes 1447 * o enable promiscuous mode according to the interface state 1448 * o accept beacons: 1449 * - when operating in adhoc mode so the 802.11 layer creates 1450 * node table entries for peers, 1451 * - when operating in station mode for collecting rssi data when 1452 * the station is otherwise quiet, or 1453 * - when scanning 1454 */ 1455 static u_int32_t 1456 ath_calcrxfilter(struct ath_softc *sc) 1457 { 1458 struct ieee80211com *ic = &sc->sc_ic; 1459 struct ath_hal *ah = sc->sc_ah; 1460 struct ifnet *ifp = &ic->ic_if; 1461 u_int32_t rfilt; 1462 1463 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1464 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1465 if (ic->ic_opmode != IEEE80211_M_STA) 1466 rfilt |= HAL_RX_FILTER_PROBEREQ; 1467 if (ic->ic_opmode != IEEE80211_M_AHDEMO) 1468 rfilt |= HAL_RX_FILTER_BEACON; 1469 if (ifp->if_flags & IFF_PROMISC) 1470 rfilt |= HAL_RX_FILTER_PROM; 1471 return rfilt; 1472 } 1473 1474 static void 1475 ath_mode_init(struct ath_softc *sc) 1476 { 1477 #ifdef __FreeBSD__ 1478 struct ieee80211com *ic = &sc->sc_ic; 1479 #endif 1480 struct ath_hal *ah = sc->sc_ah; 1481 u_int32_t rfilt, mfilt[2]; 1482 1483 /* configure rx filter */ 1484 rfilt = ath_calcrxfilter(sc); 1485 ath_hal_setrxfilter(ah, rfilt); 1486 1487 /* configure operational mode */ 1488 ath_hal_setopmode(ah); 1489 1490 /* calculate and install multicast filter */ 1491 #ifdef __FreeBSD__ 1492 if ((ic->ic_if.if_flags & IFF_ALLMULTI) == 0) { 1493 mfilt[0] = mfilt[1] = 0; 1494 ath_mcastfilter_compute(sc, &mfilt); 1495 } else { 1496 mfilt[0] = mfilt[1] = ~0; 1497 } 1498 #endif 1499 #ifdef __NetBSD__ 1500 mfilt[0] = mfilt[1] = 0; 1501 ath_mcastfilter_compute(sc, &mfilt); 1502 #endif 1503 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1504 DPRINTF(ATH_DEBUG_MODE, ("%s: RX filter 0x%x, MC filter %08x:%08x\n", 1505 __func__, rfilt, mfilt[0], mfilt[1])); 1506 } 1507 1508 #ifdef __FreeBSD__ 1509 static void 1510 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1511 { 1512 struct ath_buf *bf = arg; 1513 1514 KASSERT(nseg <= ATH_MAX_SCATTER, 1515 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1516 bf->bf_mapsize = mapsize; 1517 bf->bf_nseg = nseg; 1518 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1519 } 1520 #endif /* __FreeBSD__ */ 1521 1522 static struct mbuf * 1523 ath_getmbuf(int flags, int type, u_int pktlen) 1524 { 1525 struct mbuf *m; 1526 1527 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1528 #ifdef __FreeBSD__ 1529 if (pktlen <= MHLEN) 1530 MGETHDR(m, flags, type); 1531 else 1532 m = m_getcl(flags, type, M_PKTHDR); 1533 #else 1534 MGETHDR(m, flags, type); 1535 if (m != NULL && pktlen > MHLEN) 1536 MCLGET(m, flags); 1537 #endif 1538 return m; 1539 } 1540 1541 static int 1542 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1543 { 1544 struct ieee80211com *ic = &sc->sc_ic; 1545 struct ifnet *ifp = &ic->ic_if; 1546 struct ath_hal *ah = sc->sc_ah; 1547 struct ieee80211_frame *wh; 1548 struct ath_buf *bf; 1549 struct ath_desc *ds; 1550 struct mbuf *m; 1551 int error, pktlen; 1552 u_int8_t *frm, rate; 1553 u_int16_t capinfo; 1554 struct ieee80211_rateset *rs; 1555 const HAL_RATE_TABLE *rt; 1556 u_int flags; 1557 1558 bf = sc->sc_bcbuf; 1559 if (bf->bf_m != NULL) { 1560 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1561 m_freem(bf->bf_m); 1562 bf->bf_m = NULL; 1563 bf->bf_node = NULL; 1564 } 1565 /* 1566 * NB: the beacon data buffer must be 32-bit aligned; 1567 * we assume the mbuf routines will return us something 1568 * with this alignment (perhaps should assert). 1569 */ 1570 rs = &ni->ni_rates; 1571 pktlen = sizeof (struct ieee80211_frame) 1572 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6; 1573 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1574 pktlen += 2; 1575 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1576 if (m == NULL) { 1577 DPRINTF(ATH_DEBUG_BEACON, 1578 ("%s: cannot get mbuf/cluster; size %u\n", 1579 __func__, pktlen)); 1580 sc->sc_stats.ast_be_nombuf++; 1581 return ENOMEM; 1582 } 1583 1584 wh = mtod(m, struct ieee80211_frame *); 1585 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1586 IEEE80211_FC0_SUBTYPE_BEACON; 1587 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1588 *(u_int16_t *)wh->i_dur = 0; 1589 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1590 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1591 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1592 *(u_int16_t *)wh->i_seq = 0; 1593 1594 /* 1595 * beacon frame format 1596 * [8] time stamp 1597 * [2] beacon interval 1598 * [2] cabability information 1599 * [tlv] ssid 1600 * [tlv] supported rates 1601 * [tlv] parameter set (IBSS) 1602 * [tlv] extended supported rates 1603 */ 1604 frm = (u_int8_t *)&wh[1]; 1605 memset(frm, 0, 8); /* timestamp is set by hardware */ 1606 frm += 8; 1607 *(u_int16_t *)frm = htole16(ni->ni_intval); 1608 frm += 2; 1609 if (ic->ic_opmode == IEEE80211_M_IBSS) 1610 capinfo = IEEE80211_CAPINFO_IBSS; 1611 else 1612 capinfo = IEEE80211_CAPINFO_ESS; 1613 if (ic->ic_flags & IEEE80211_F_PRIVACY) 1614 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1615 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1616 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 1617 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1618 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1619 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1620 *(u_int16_t *)frm = htole16(capinfo); 1621 frm += 2; 1622 *frm++ = IEEE80211_ELEMID_SSID; 1623 *frm++ = ni->ni_esslen; 1624 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1625 frm += ni->ni_esslen; 1626 frm = ieee80211_add_rates(frm, rs); 1627 *frm++ = IEEE80211_ELEMID_DSPARMS; 1628 *frm++ = 1; 1629 *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan); 1630 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1631 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1632 *frm++ = 2; 1633 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1634 } else { 1635 /* TODO: TIM */ 1636 *frm++ = IEEE80211_ELEMID_TIM; 1637 *frm++ = 4; /* length */ 1638 *frm++ = 0; /* DTIM count */ 1639 *frm++ = 1; /* DTIM period */ 1640 *frm++ = 0; /* bitmap control */ 1641 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1642 } 1643 frm = ieee80211_add_xrates(frm, rs); 1644 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1645 KASSERT(m->m_pkthdr.len <= pktlen, 1646 ("beacon bigger than expected, len %u calculated %u", 1647 m->m_pkthdr.len, pktlen)); 1648 1649 DPRINTF(ATH_DEBUG_BEACON, ("%s: m %p len %u\n", __func__, m, m->m_len)); 1650 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1651 if (error != 0) { 1652 m_freem(m); 1653 return error; 1654 } 1655 KASSERT(bf->bf_nseg == 1, 1656 ("%s: multi-segment packet; nseg %u", __func__, bf->bf_nseg)); 1657 bf->bf_m = m; 1658 1659 /* setup descriptors */ 1660 ds = bf->bf_desc; 1661 1662 if (ic->ic_opmode == IEEE80211_M_IBSS) 1663 ds->ds_link = bf->bf_daddr; /* link to self */ 1664 else 1665 ds->ds_link = 0; 1666 ds->ds_data = bf->bf_segs[0].ds_addr; 1667 1668 DPRINTF(ATH_DEBUG_ANY, ("%s: segaddr %p seglen %u\n", __func__, 1669 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1670 1671 /* 1672 * Calculate rate code. 1673 * XXX everything at min xmit rate 1674 */ 1675 rt = sc->sc_currates; 1676 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1677 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1678 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1679 else 1680 rate = rt->info[0].rateCode; 1681 1682 flags = HAL_TXDESC_NOACK; 1683 if (ic->ic_opmode == IEEE80211_M_IBSS) 1684 flags |= HAL_TXDESC_VEOL; 1685 1686 if (!ath_hal_setuptxdesc(ah, ds 1687 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1688 , sizeof(struct ieee80211_frame) /* header length */ 1689 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1690 , 0x20 /* txpower XXX */ 1691 , rate, 1 /* series 0 rate/tries */ 1692 , HAL_TXKEYIX_INVALID /* no encryption */ 1693 , 0 /* antenna mode */ 1694 , flags /* no ack for beacons */ 1695 , 0 /* rts/cts rate */ 1696 , 0 /* rts/cts duration */ 1697 )) { 1698 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1699 return -1; 1700 } 1701 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1702 /* XXX verify mbuf data area covers this roundup */ 1703 if (!ath_hal_filltxdesc(ah, ds 1704 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1705 , AH_TRUE /* first segment */ 1706 , AH_TRUE /* last segment */ 1707 )) { 1708 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1709 return -1; 1710 } 1711 1712 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1713 1714 return 0; 1715 } 1716 1717 static void 1718 ath_beacon_proc(struct ath_softc *sc, int pending) 1719 { 1720 struct ieee80211com *ic = &sc->sc_ic; 1721 struct ath_buf *bf = sc->sc_bcbuf; 1722 struct ath_hal *ah = sc->sc_ah; 1723 1724 DPRINTF(ATH_DEBUG_BEACON_PROC, ("%s: pending %u\n", __func__, pending)); 1725 if (ic->ic_opmode == IEEE80211_M_STA || 1726 bf == NULL || bf->bf_m == NULL) { 1727 DPRINTF(ATH_DEBUG_ANY, ("%s: ic_flags=%x bf=%p bf_m=%p\n", 1728 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1729 return; 1730 } 1731 /* TODO: update beacon to reflect PS poll state */ 1732 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1733 DPRINTF(ATH_DEBUG_ANY, ("%s: beacon queue %u did not stop?\n", 1734 __func__, sc->sc_bhalq)); 1735 /* NB: the HAL still stops DMA, so proceed */ 1736 } 1737 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1738 1739 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1740 ath_hal_txstart(ah, sc->sc_bhalq); 1741 DPRINTF(ATH_DEBUG_BEACON_PROC, 1742 ("%s: TXDP%u = %p (%p)\n", __func__, 1743 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1744 } 1745 1746 static void 1747 ath_beacon_free(struct ath_softc *sc) 1748 { 1749 struct ath_buf *bf = sc->sc_bcbuf; 1750 1751 if (bf->bf_m != NULL) { 1752 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1753 m_freem(bf->bf_m); 1754 bf->bf_m = NULL; 1755 bf->bf_node = NULL; 1756 } 1757 } 1758 1759 /* 1760 * Configure the beacon and sleep timers. 1761 * 1762 * When operating as an AP this resets the TSF and sets 1763 * up the hardware to notify us when we need to issue beacons. 1764 * 1765 * When operating in station mode this sets up the beacon 1766 * timers according to the timestamp of the last received 1767 * beacon and the current TSF, configures PCF and DTIM 1768 * handling, programs the sleep registers so the hardware 1769 * will wakeup in time to receive beacons, and configures 1770 * the beacon miss handling so we'll receive a BMISS 1771 * interrupt when we stop seeing beacons from the AP 1772 * we've associated with. 1773 */ 1774 static void 1775 ath_beacon_config(struct ath_softc *sc) 1776 { 1777 struct ath_hal *ah = sc->sc_ah; 1778 struct ieee80211com *ic = &sc->sc_ic; 1779 struct ieee80211_node *ni = ic->ic_bss; 1780 u_int32_t nexttbtt, intval; 1781 1782 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1783 (LE_READ_4(ni->ni_tstamp) >> 10); 1784 DPRINTF(ATH_DEBUG_BEACON, ("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1785 nexttbtt += ni->ni_intval; 1786 intval = ni->ni_intval & HAL_BEACON_PERIOD; 1787 if (ic->ic_opmode == IEEE80211_M_STA) { 1788 HAL_BEACON_STATE bs; 1789 u_int32_t bmisstime; 1790 1791 /* NB: no PCF support right now */ 1792 memset(&bs, 0, sizeof(bs)); 1793 /* 1794 * Reset our tsf so the hardware will update the 1795 * tsf register to reflect timestamps found in 1796 * received beacons. 1797 */ 1798 bs.bs_intval = intval | HAL_BEACON_RESET_TSF; 1799 bs.bs_nexttbtt = nexttbtt; 1800 bs.bs_dtimperiod = bs.bs_intval; 1801 bs.bs_nextdtim = nexttbtt; 1802 /* 1803 * Calculate the number of consecutive beacons to miss 1804 * before taking a BMISS interrupt. The configuration 1805 * is specified in ms, so we need to convert that to 1806 * TU's and then calculate based on the beacon interval. 1807 * Note that we clamp the result to at most 10 beacons. 1808 */ 1809 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1810 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1811 if (bs.bs_bmissthreshold > 10) 1812 bs.bs_bmissthreshold = 10; 1813 else if (bs.bs_bmissthreshold <= 0) 1814 bs.bs_bmissthreshold = 1; 1815 1816 /* 1817 * Calculate sleep duration. The configuration is 1818 * given in ms. We insure a multiple of the beacon 1819 * period is used. Also, if the sleep duration is 1820 * greater than the DTIM period then it makes senses 1821 * to make it a multiple of that. 1822 * 1823 * XXX fixed at 100ms 1824 */ 1825 bs.bs_sleepduration = 1826 roundup((100 * 1000) / 1024, bs.bs_intval); 1827 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1828 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1829 1830 DPRINTF(ATH_DEBUG_BEACON, 1831 ("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1832 , __func__ 1833 , bs.bs_intval 1834 , bs.bs_nexttbtt 1835 , bs.bs_dtimperiod 1836 , bs.bs_nextdtim 1837 , bs.bs_bmissthreshold 1838 , bs.bs_sleepduration 1839 )); 1840 ath_hal_intrset(ah, 0); 1841 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1842 sc->sc_imask |= HAL_INT_BMISS; 1843 ath_hal_intrset(ah, sc->sc_imask); 1844 } else { 1845 ath_hal_intrset(ah, 0); 1846 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1847 intval |= HAL_BEACON_ENA; 1848 switch (ic->ic_opmode) { 1849 /* No beacons in monitor, ad hoc-demo modes. */ 1850 case IEEE80211_M_MONITOR: 1851 case IEEE80211_M_AHDEMO: 1852 intval &= ~HAL_BEACON_ENA; 1853 /*FALLTHROUGH*/ 1854 /* In IBSS mode, I am uncertain how SWBA interrupts 1855 * work, so I just turn them off and use a self-linked 1856 * descriptor. 1857 */ 1858 case IEEE80211_M_IBSS: 1859 sc->sc_imask &= ~HAL_INT_SWBA; 1860 nexttbtt = ni->ni_intval; 1861 /*FALLTHROUGH*/ 1862 case IEEE80211_M_HOSTAP: 1863 default: 1864 if (nexttbtt == ni->ni_intval) 1865 intval |= HAL_BEACON_RESET_TSF; 1866 break; 1867 } 1868 DPRINTF(ATH_DEBUG_BEACON, ("%s: intval %u nexttbtt %u\n", 1869 __func__, ni->ni_intval, nexttbtt)); 1870 ath_hal_beaconinit(ah, nexttbtt, intval); 1871 ath_hal_intrset(ah, sc->sc_imask); 1872 if (ic->ic_opmode == IEEE80211_M_IBSS) 1873 ath_beacon_proc(sc, 0); 1874 } 1875 } 1876 1877 #ifdef __FreeBSD__ 1878 static void 1879 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1880 { 1881 bus_addr_t *paddr = (bus_addr_t*) arg; 1882 *paddr = segs->ds_addr; 1883 } 1884 #endif 1885 1886 #ifdef __FreeBSD__ 1887 static int 1888 ath_desc_alloc(struct ath_softc *sc) 1889 { 1890 int i, bsize, error; 1891 struct ath_desc *ds; 1892 struct ath_buf *bf; 1893 1894 /* allocate descriptors */ 1895 sc->sc_desc_len = sizeof(struct ath_desc) * 1896 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1897 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1898 if (error != 0) 1899 return error; 1900 1901 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1902 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1903 1904 if (error != 0) 1905 goto fail0; 1906 1907 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1908 sc->sc_desc, sc->sc_desc_len, 1909 ath_load_cb, &sc->sc_desc_paddr, 1910 BUS_DMA_NOWAIT); 1911 if (error != 0) 1912 goto fail1; 1913 1914 ds = sc->sc_desc; 1915 DPRINTF(ATH_DEBUG_ANY, ("%s: DMA map: %p (%lu) -> %p (%lu)\n", 1916 __func__, ds, (u_long) sc->sc_desc_len, (caddr_t) sc->sc_desc_paddr, 1917 /*XXX*/ (u_long) sc->sc_desc_len)); 1918 1919 /* allocate buffers */ 1920 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1921 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1922 if (bf == NULL) { 1923 printf("%s: unable to allocate Tx/Rx buffers\n", 1924 sc->sc_dev.dv_xname); 1925 error = -1; 1926 goto fail2; 1927 } 1928 sc->sc_bufptr = bf; 1929 1930 TAILQ_INIT(&sc->sc_rxbuf); 1931 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1932 bf->bf_desc = ds; 1933 bf->bf_daddr = sc->sc_desc_paddr + 1934 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1935 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1936 &bf->bf_dmamap); 1937 if (error != 0) 1938 break; 1939 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1940 } 1941 1942 TAILQ_INIT(&sc->sc_txbuf); 1943 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1944 bf->bf_desc = ds; 1945 bf->bf_daddr = sc->sc_desc_paddr + 1946 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1947 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1948 &bf->bf_dmamap); 1949 if (error != 0) 1950 break; 1951 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1952 } 1953 TAILQ_INIT(&sc->sc_txq); 1954 1955 /* beacon buffer */ 1956 bf->bf_desc = ds; 1957 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1958 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1959 if (error != 0) 1960 return error; 1961 sc->sc_bcbuf = bf; 1962 return 0; 1963 1964 fail2: 1965 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1966 fail1: 1967 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1968 fail0: 1969 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1970 sc->sc_ddmamap = NULL; 1971 return error; 1972 } 1973 #else 1974 static int 1975 ath_desc_alloc(struct ath_softc *sc) 1976 { 1977 int i, bsize, error = -1; 1978 struct ath_desc *ds; 1979 struct ath_buf *bf; 1980 1981 /* allocate descriptors */ 1982 sc->sc_desc_len = sizeof(struct ath_desc) * 1983 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1984 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1985 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1986 printf("%s: unable to allocate control data, error = %d\n", 1987 sc->sc_dev.dv_xname, error); 1988 goto fail0; 1989 } 1990 1991 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1992 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1993 printf("%s: unable to map control data, error = %d\n", 1994 sc->sc_dev.dv_xname, error); 1995 goto fail1; 1996 } 1997 1998 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1999 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 2000 printf("%s: unable to create control data DMA map, " 2001 "error = %d\n", sc->sc_dev.dv_xname, error); 2002 goto fail2; 2003 } 2004 2005 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 2006 sc->sc_desc_len, NULL, 0)) != 0) { 2007 printf("%s: unable to load control data DMA map, error = %d\n", 2008 sc->sc_dev.dv_xname, error); 2009 goto fail3; 2010 } 2011 2012 ds = sc->sc_desc; 2013 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 2014 2015 DPRINTF(ATH_DEBUG_XMIT_DESC|ATH_DEBUG_RECV_DESC, 2016 ("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 2017 ds, (u_long)sc->sc_desc_len, 2018 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 2019 2020 /* allocate buffers */ 2021 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 2022 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 2023 if (bf == NULL) { 2024 printf("%s: unable to allocate Tx/Rx buffers\n", 2025 sc->sc_dev.dv_xname); 2026 error = ENOMEM; 2027 goto fail3; 2028 } 2029 sc->sc_bufptr = bf; 2030 2031 TAILQ_INIT(&sc->sc_rxbuf); 2032 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 2033 bf->bf_desc = ds; 2034 bf->bf_daddr = sc->sc_desc_paddr + 2035 ((caddr_t)ds - (caddr_t)sc->sc_desc); 2036 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 2037 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 2038 printf("%s: unable to create Rx dmamap, error = %d\n", 2039 sc->sc_dev.dv_xname, error); 2040 goto fail4; 2041 } 2042 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2043 } 2044 2045 TAILQ_INIT(&sc->sc_txbuf); 2046 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 2047 bf->bf_desc = ds; 2048 bf->bf_daddr = sc->sc_desc_paddr + 2049 ((caddr_t)ds - (caddr_t)sc->sc_desc); 2050 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 2051 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 2052 printf("%s: unable to create Tx dmamap, error = %d\n", 2053 sc->sc_dev.dv_xname, error); 2054 goto fail5; 2055 } 2056 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2057 } 2058 TAILQ_INIT(&sc->sc_txq); 2059 2060 /* beacon buffer */ 2061 bf->bf_desc = ds; 2062 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 2063 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 2064 &bf->bf_dmamap)) != 0) { 2065 printf("%s: unable to create beacon dmamap, error = %d\n", 2066 sc->sc_dev.dv_xname, error); 2067 goto fail5; 2068 } 2069 sc->sc_bcbuf = bf; 2070 return 0; 2071 2072 fail5: 2073 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 2074 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2075 continue; 2076 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2077 } 2078 fail4: 2079 for (i = 0; i < ATH_RXBUF; i++) { 2080 if (sc->sc_bufptr[i].bf_dmamap == NULL) 2081 continue; 2082 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 2083 } 2084 fail3: 2085 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2086 fail2: 2087 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2088 sc->sc_ddmamap = NULL; 2089 fail1: 2090 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 2091 fail0: 2092 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2093 return error; 2094 } 2095 #endif 2096 2097 static void 2098 ath_desc_free(struct ath_softc *sc) 2099 { 2100 struct ath_buf *bf; 2101 2102 #ifdef __FreeBSD__ 2103 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2104 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 2105 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2106 #else 2107 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 2108 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 2109 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 2110 #endif 2111 2112 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2113 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2114 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2115 m_freem(bf->bf_m); 2116 } 2117 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 2118 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2119 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2120 if (bf->bf_m) { 2121 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2122 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 2123 m_freem(bf->bf_m); 2124 bf->bf_m = NULL; 2125 } 2126 } 2127 if (sc->sc_bcbuf != NULL) { 2128 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2129 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 2130 sc->sc_bcbuf = NULL; 2131 } 2132 2133 TAILQ_INIT(&sc->sc_rxbuf); 2134 TAILQ_INIT(&sc->sc_txbuf); 2135 TAILQ_INIT(&sc->sc_txq); 2136 free(sc->sc_bufptr, M_DEVBUF); 2137 sc->sc_bufptr = NULL; 2138 } 2139 2140 static struct ieee80211_node * 2141 ath_node_alloc(struct ieee80211com *ic) 2142 { 2143 struct ath_node *an = 2144 malloc(sizeof(struct ath_node), M_80211_NODE, M_NOWAIT|M_ZERO); 2145 if (an) { 2146 int i; 2147 for (i = 0; i < ATH_RHIST_SIZE; i++) 2148 an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME; 2149 an->an_rx_hist_next = ATH_RHIST_SIZE-1; 2150 return &an->an_node; 2151 } else 2152 return NULL; 2153 } 2154 2155 static void 2156 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 2157 { 2158 struct ath_softc *sc = ic->ic_if.if_softc; 2159 struct ath_buf *bf; 2160 2161 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 2162 if (bf->bf_node == ni) 2163 bf->bf_node = NULL; 2164 } 2165 (*sc->sc_node_free)(ic, ni); 2166 } 2167 2168 static void 2169 ath_node_copy(struct ieee80211com *ic, 2170 struct ieee80211_node *dst, const struct ieee80211_node *src) 2171 { 2172 struct ath_softc *sc = ic->ic_if.if_softc; 2173 2174 memcpy(&dst[1], &src[1], 2175 sizeof(struct ath_node) - sizeof(struct ieee80211_node)); 2176 (*sc->sc_node_copy)(ic, dst, src); 2177 } 2178 2179 static u_int8_t 2180 ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni) 2181 { 2182 struct ath_node *an = ATH_NODE(ni); 2183 int i, now, nsamples, rssi; 2184 2185 /* 2186 * Calculate the average over the last second of sampled data. 2187 */ 2188 now = ATH_TICKS(); 2189 nsamples = 0; 2190 rssi = 0; 2191 i = an->an_rx_hist_next; 2192 do { 2193 struct ath_recv_hist *rh = &an->an_rx_hist[i]; 2194 if (rh->arh_ticks == ATH_RHIST_NOTIME) 2195 goto done; 2196 if (now - rh->arh_ticks > hz) 2197 goto done; 2198 rssi += rh->arh_rssi; 2199 nsamples++; 2200 if (i == 0) 2201 i = ATH_RHIST_SIZE-1; 2202 else 2203 i--; 2204 } while (i != an->an_rx_hist_next); 2205 done: 2206 /* 2207 * Return either the average or the last known 2208 * value if there is no recent data. 2209 */ 2210 return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi); 2211 } 2212 2213 static int 2214 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 2215 { 2216 struct ath_hal *ah = sc->sc_ah; 2217 int error; 2218 struct mbuf *m; 2219 struct ath_desc *ds; 2220 2221 m = bf->bf_m; 2222 if (m == NULL) { 2223 /* 2224 * NB: by assigning a page to the rx dma buffer we 2225 * implicitly satisfy the Atheros requirement that 2226 * this buffer be cache-line-aligned and sized to be 2227 * multiple of the cache line size. Not doing this 2228 * causes weird stuff to happen (for the 5210 at least). 2229 */ 2230 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 2231 if (m == NULL) { 2232 DPRINTF(ATH_DEBUG_ANY, 2233 ("%s: no mbuf/cluster\n", __func__)); 2234 sc->sc_stats.ast_rx_nombuf++; 2235 return ENOMEM; 2236 } 2237 bf->bf_m = m; 2238 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 2239 2240 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 2241 BUS_DMA_NOWAIT); 2242 if (error != 0) { 2243 DPRINTF(ATH_DEBUG_ANY, 2244 ("%s: ath_buf_dmamap_load_mbuf failed;" 2245 " error %d\n", __func__, error)); 2246 sc->sc_stats.ast_rx_busdma++; 2247 return error; 2248 } 2249 KASSERT(bf->bf_nseg == 1, 2250 ("ath_rxbuf_init: multi-segment packet; nseg %u", 2251 bf->bf_nseg)); 2252 } 2253 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 2254 2255 /* 2256 * Setup descriptors. For receive we always terminate 2257 * the descriptor list with a self-linked entry so we'll 2258 * not get overrun under high load (as can happen with a 2259 * 5212 when ANI processing enables PHY errors). 2260 * 2261 * To insure the last descriptor is self-linked we create 2262 * each descriptor as self-linked and add it to the end. As 2263 * each additional descriptor is added the previous self-linked 2264 * entry is ``fixed'' naturally. This should be safe even 2265 * if DMA is happening. When processing RX interrupts we 2266 * never remove/process the last, self-linked, entry on the 2267 * descriptor list. This insures the hardware always has 2268 * someplace to write a new frame. 2269 */ 2270 ds = bf->bf_desc; 2271 ds->ds_link = bf->bf_daddr; /* link to self */ 2272 ds->ds_data = bf->bf_segs[0].ds_addr; 2273 ath_hal_setuprxdesc(ah, ds 2274 , m->m_len /* buffer size */ 2275 , 0 2276 ); 2277 2278 if (sc->sc_rxlink != NULL) 2279 *sc->sc_rxlink = bf->bf_daddr; 2280 sc->sc_rxlink = &ds->ds_link; 2281 return 0; 2282 } 2283 2284 static void 2285 ath_rx_proc(void *arg, int npending) 2286 { 2287 #define PA2DESC(_sc, _pa) \ 2288 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 2289 ((_pa) - (_sc)->sc_desc_paddr))) 2290 struct ath_softc *sc = arg; 2291 struct ath_buf *bf; 2292 struct ieee80211com *ic = &sc->sc_ic; 2293 struct ifnet *ifp = &ic->ic_if; 2294 struct ath_hal *ah = sc->sc_ah; 2295 struct ath_desc *ds; 2296 struct mbuf *m; 2297 struct ieee80211_frame *wh, whbuf; 2298 struct ieee80211_node *ni; 2299 struct ath_node *an; 2300 struct ath_recv_hist *rh; 2301 int len; 2302 u_int phyerr; 2303 HAL_STATUS status; 2304 2305 DPRINTF(ATH_DEBUG_RX_PROC, ("%s: pending %u\n", __func__, npending)); 2306 do { 2307 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2308 if (bf == NULL) { /* NB: shouldn't happen */ 2309 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 2310 break; 2311 } 2312 ds = bf->bf_desc; 2313 if (ds->ds_link == bf->bf_daddr) { 2314 /* NB: never process the self-linked entry at the end */ 2315 break; 2316 } 2317 m = bf->bf_m; 2318 if (m == NULL) { /* NB: shouldn't happen */ 2319 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 2320 continue; 2321 } 2322 /* XXX sync descriptor memory */ 2323 /* 2324 * Must provide the virtual address of the current 2325 * descriptor, the physical address, and the virtual 2326 * address of the next descriptor in the h/w chain. 2327 * This allows the HAL to look ahead to see if the 2328 * hardware is done with a descriptor by checking the 2329 * done bit in the following descriptor and the address 2330 * of the current descriptor the DMA engine is working 2331 * on. All this is necessary because of our use of 2332 * a self-linked list to avoid rx overruns. 2333 */ 2334 status = ath_hal_rxprocdesc(ah, ds, 2335 bf->bf_daddr, PA2DESC(sc, ds->ds_link)); 2336 #ifdef AR_DEBUG 2337 if (ath_debug & ATH_DEBUG_RECV_DESC) 2338 ath_printrxbuf(bf, status == HAL_OK); 2339 #endif 2340 if (status == HAL_EINPROGRESS) 2341 break; 2342 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 2343 2344 if (ds->ds_rxstat.rs_more) { 2345 /* 2346 * Frame spans multiple descriptors; this 2347 * cannot happen yet as we don't support 2348 * jumbograms. If not in monitor mode, 2349 * discard the frame. 2350 */ 2351 2352 /* enable this if you want to see error frames in Monitor mode */ 2353 #ifdef ERROR_FRAMES 2354 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2355 /* XXX statistic */ 2356 goto rx_next; 2357 } 2358 #endif 2359 /* fall thru for monitor mode handling... */ 2360 2361 } else if (ds->ds_rxstat.rs_status != 0) { 2362 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 2363 sc->sc_stats.ast_rx_crcerr++; 2364 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 2365 sc->sc_stats.ast_rx_fifoerr++; 2366 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 2367 sc->sc_stats.ast_rx_badcrypt++; 2368 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 2369 sc->sc_stats.ast_rx_phyerr++; 2370 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 2371 sc->sc_stats.ast_rx_phy[phyerr]++; 2372 } 2373 2374 /* 2375 * reject error frames, we normally don't want 2376 * to see them in monitor mode. 2377 */ 2378 if ((ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT ) || 2379 (ds->ds_rxstat.rs_status & HAL_RXERR_PHY)) 2380 goto rx_next; 2381 2382 /* 2383 * In monitor mode, allow through packets that 2384 * cannot be decrypted 2385 */ 2386 if ((ds->ds_rxstat.rs_status & ~HAL_RXERR_DECRYPT) || 2387 sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR) 2388 goto rx_next; 2389 } 2390 2391 len = ds->ds_rxstat.rs_datalen; 2392 if (len < IEEE80211_MIN_LEN) { 2393 DPRINTF(ATH_DEBUG_RECV, ("%s: short packet %d\n", 2394 __func__, len)); 2395 sc->sc_stats.ast_rx_tooshort++; 2396 goto rx_next; 2397 } 2398 2399 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 2400 2401 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2402 bf->bf_m = NULL; 2403 m->m_pkthdr.rcvif = ifp; 2404 m->m_pkthdr.len = m->m_len = len; 2405 2406 #if NBPFILTER > 0 2407 if (sc->sc_drvbpf) { 2408 sc->sc_rx_th.wr_rate = 2409 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2410 sc->sc_rx_th.wr_antsignal = ds->ds_rxstat.rs_rssi; 2411 sc->sc_rx_th.wr_antenna = ds->ds_rxstat.rs_antenna; 2412 /* XXX TSF */ 2413 bpf_mtap2(sc->sc_drvbpf, 2414 &sc->sc_rx_th, sc->sc_rx_th_len, m); 2415 } 2416 #endif 2417 2418 m_adj(m, -IEEE80211_CRC_LEN); 2419 wh = mtod(m, struct ieee80211_frame *); 2420 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2421 /* 2422 * WEP is decrypted by hardware. Clear WEP bit 2423 * and trim WEP header for ieee80211_input(). 2424 */ 2425 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2426 memcpy(&whbuf, wh, sizeof(whbuf)); 2427 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2428 wh = mtod(m, struct ieee80211_frame *); 2429 memcpy(wh, &whbuf, sizeof(whbuf)); 2430 /* 2431 * Also trim WEP ICV from the tail. 2432 */ 2433 m_adj(m, -IEEE80211_WEP_CRCLEN); 2434 /* 2435 * The header has probably moved. 2436 */ 2437 wh = mtod(m, struct ieee80211_frame *); 2438 } 2439 2440 /* 2441 * Locate the node for sender, track state, and 2442 * then pass this node (referenced) up to the 802.11 2443 * layer for its use. 2444 */ 2445 ni = ieee80211_find_rxnode(ic, wh); 2446 2447 /* 2448 * Record driver-specific state. 2449 */ 2450 an = ATH_NODE(ni); 2451 if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE) 2452 an->an_rx_hist_next = 0; 2453 rh = &an->an_rx_hist[an->an_rx_hist_next]; 2454 rh->arh_ticks = ATH_TICKS(); 2455 rh->arh_rssi = ds->ds_rxstat.rs_rssi; 2456 rh->arh_antenna = ds->ds_rxstat.rs_antenna; 2457 2458 /* 2459 * Send frame up for processing. 2460 */ 2461 ieee80211_input(ifp, m, ni, 2462 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2463 2464 /* 2465 * The frame may have caused the node to be marked for 2466 * reclamation (e.g. in response to a DEAUTH message) 2467 * so use release_node here instead of unref_node. 2468 */ 2469 ieee80211_release_node(ic, ni); 2470 rx_next: 2471 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2472 } while (ath_rxbuf_init(sc, bf) == 0); 2473 2474 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2475 ath_hal_rxena(ah); /* in case of RXEOL */ 2476 2477 #ifdef __NetBSD__ 2478 if ((ifp->if_flags & IFF_OACTIVE) == 0 && !IFQ_IS_EMPTY(&ifp->if_snd)) 2479 ath_start(ifp); 2480 #endif /* __NetBSD__ */ 2481 #undef PA2DESC 2482 } 2483 2484 /* 2485 * XXX Size of an ACK control frame in bytes. 2486 */ 2487 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2488 2489 static int 2490 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2491 struct mbuf *m0) 2492 { 2493 struct ieee80211com *ic = &sc->sc_ic; 2494 struct ath_hal *ah = sc->sc_ah; 2495 struct ifnet *ifp = &sc->sc_ic.ic_if; 2496 int i, error, iswep, hdrlen, pktlen; 2497 u_int8_t rix, cix, txrate, ctsrate; 2498 struct ath_desc *ds; 2499 struct mbuf *m; 2500 struct ieee80211_frame *wh; 2501 u_int32_t iv; 2502 u_int8_t *ivp; 2503 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2504 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2505 u_int subtype, flags, ctsduration, antenna; 2506 HAL_PKT_TYPE atype; 2507 const HAL_RATE_TABLE *rt; 2508 HAL_BOOL shortPreamble; 2509 struct ath_node *an; 2510 ath_txq_critsect_decl(s); 2511 2512 wh = mtod(m0, struct ieee80211_frame *); 2513 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2514 hdrlen = sizeof(struct ieee80211_frame); 2515 pktlen = m0->m_pkthdr.len; 2516 2517 if (iswep) { 2518 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2519 m_adj(m0, hdrlen); 2520 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2521 if (m0 == NULL) { 2522 sc->sc_stats.ast_tx_nombuf++; 2523 return ENOMEM; 2524 } 2525 ivp = hdrbuf + hdrlen; 2526 wh = mtod(m0, struct ieee80211_frame *); 2527 /* 2528 * XXX 2529 * IV must not duplicate during the lifetime of the key. 2530 * But no mechanism to renew keys is defined in IEEE 802.11 2531 * for WEP. And the IV may be duplicated at other stations 2532 * because the session key itself is shared. So we use a 2533 * pseudo random IV for now, though it is not the right way. 2534 * 2535 * NB: Rather than use a strictly random IV we select a 2536 * random one to start and then increment the value for 2537 * each frame. This is an explicit tradeoff between 2538 * overhead and security. Given the basic insecurity of 2539 * WEP this seems worthwhile. 2540 */ 2541 2542 /* 2543 * Skip 'bad' IVs from Fluhrer/Mantin/Shamir: 2544 * (B, 255, N) with 3 <= B < 16 and 0 <= N <= 255 2545 */ 2546 iv = ic->ic_iv; 2547 if ((iv & 0xff00) == 0xff00) { 2548 int B = (iv & 0xff0000) >> 16; 2549 if (3 <= B && B < 16) 2550 iv = (B+1) << 16; 2551 } 2552 ic->ic_iv = iv + 1; 2553 2554 /* 2555 * NB: Preserve byte order of IV for packet 2556 * sniffers; it doesn't matter otherwise. 2557 */ 2558 #if AH_BYTE_ORDER == AH_BIG_ENDIAN 2559 ivp[0] = iv >> 0; 2560 ivp[1] = iv >> 8; 2561 ivp[2] = iv >> 16; 2562 #else 2563 ivp[2] = iv >> 0; 2564 ivp[1] = iv >> 8; 2565 ivp[0] = iv >> 16; 2566 #endif 2567 ivp[3] = ic->ic_wep_txkey << 6; /* Key ID and pad */ 2568 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2569 /* 2570 * The ICV length must be included into hdrlen and pktlen. 2571 */ 2572 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2573 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2574 } 2575 pktlen += IEEE80211_CRC_LEN; 2576 2577 /* 2578 * Load the DMA map so any coalescing is done. This 2579 * also calculates the number of descriptors we need. 2580 */ 2581 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2582 /* 2583 * Discard null packets and check for packets that 2584 * require too many TX descriptors. We try to convert 2585 * the latter to a cluster. 2586 */ 2587 if (error == EFBIG) { /* too many desc's, linearize */ 2588 sc->sc_stats.ast_tx_linear++; 2589 MGETHDR(m, M_DONTWAIT, MT_DATA); 2590 if (m == NULL) { 2591 sc->sc_stats.ast_tx_nombuf++; 2592 m_freem(m0); 2593 return ENOMEM; 2594 } 2595 #ifdef __FreeBSD__ 2596 M_MOVE_PKTHDR(m, m0); 2597 #else 2598 M_COPY_PKTHDR(m, m0); 2599 #endif 2600 MCLGET(m, M_DONTWAIT); 2601 if ((m->m_flags & M_EXT) == 0) { 2602 sc->sc_stats.ast_tx_nomcl++; 2603 m_freem(m0); 2604 m_free(m); 2605 return ENOMEM; 2606 } 2607 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2608 m_freem(m0); 2609 m->m_len = m->m_pkthdr.len; 2610 m0 = m; 2611 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2612 BUS_DMA_NOWAIT); 2613 if (error != 0) { 2614 sc->sc_stats.ast_tx_busdma++; 2615 m_freem(m0); 2616 return error; 2617 } 2618 KASSERT(bf->bf_nseg == 1, 2619 ("ath_tx_start: packet not one segment; nseg %u", 2620 bf->bf_nseg)); 2621 } else if (error != 0) { 2622 sc->sc_stats.ast_tx_busdma++; 2623 m_freem(m0); 2624 return error; 2625 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2626 sc->sc_stats.ast_tx_nodata++; 2627 m_freem(m0); 2628 return EIO; 2629 } 2630 DPRINTF(ATH_DEBUG_XMIT, ("%s: m %p len %u\n", __func__, m0, pktlen)); 2631 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2632 bf->bf_m = m0; 2633 bf->bf_node = ni; /* NB: held reference */ 2634 2635 /* setup descriptors */ 2636 ds = bf->bf_desc; 2637 rt = sc->sc_currates; 2638 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2639 2640 /* 2641 * Calculate Atheros packet type from IEEE80211 packet header 2642 * and setup for rate calculations. 2643 */ 2644 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2645 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2646 case IEEE80211_FC0_TYPE_MGT: 2647 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2648 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2649 atype = HAL_PKT_TYPE_BEACON; 2650 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2651 atype = HAL_PKT_TYPE_PROBE_RESP; 2652 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2653 atype = HAL_PKT_TYPE_ATIM; 2654 rix = 0; /* XXX lowest rate */ 2655 break; 2656 case IEEE80211_FC0_TYPE_CTL: 2657 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2658 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2659 atype = HAL_PKT_TYPE_PSPOLL; 2660 rix = 0; /* XXX lowest rate */ 2661 break; 2662 default: 2663 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2664 IEEE80211_RATE_VAL]; 2665 if (rix == 0xff) { 2666 if_printf(ifp, "bogus xmit rate 0x%x\n", 2667 ni->ni_rates.rs_rates[ni->ni_txrate]); 2668 sc->sc_stats.ast_tx_badrate++; 2669 m_freem(m0); 2670 return EIO; 2671 } 2672 break; 2673 } 2674 /* 2675 * NB: the 802.11 layer marks whether or not we should 2676 * use short preamble based on the current mode and 2677 * negotiated parameters. 2678 */ 2679 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 2680 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 2681 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2682 shortPreamble = AH_TRUE; 2683 sc->sc_stats.ast_tx_shortpre++; 2684 } else { 2685 txrate = rt->info[rix].rateCode; 2686 shortPreamble = AH_FALSE; 2687 } 2688 2689 /* 2690 * Calculate miscellaneous flags. 2691 */ 2692 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2693 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2694 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2695 sc->sc_stats.ast_tx_noack++; 2696 } else if (pktlen > ic->ic_rtsthreshold) { 2697 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2698 sc->sc_stats.ast_tx_rts++; 2699 } 2700 2701 /* 2702 * Calculate duration. This logically belongs in the 802.11 2703 * layer but it lacks sufficient information to calculate it. 2704 */ 2705 if ((flags & HAL_TXDESC_NOACK) == 0 && 2706 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 2707 u_int16_t dur; 2708 /* 2709 * XXX not right with fragmentation. 2710 */ 2711 dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE, 2712 rix, shortPreamble); 2713 *((u_int16_t*) wh->i_dur) = htole16(dur); 2714 } 2715 2716 /* 2717 * Calculate RTS/CTS rate and duration if needed. 2718 */ 2719 ctsduration = 0; 2720 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2721 /* 2722 * CTS transmit rate is derived from the transmit rate 2723 * by looking in the h/w rate table. We must also factor 2724 * in whether or not a short preamble is to be used. 2725 */ 2726 cix = rt->info[rix].controlRate; 2727 ctsrate = rt->info[cix].rateCode; 2728 if (shortPreamble) 2729 ctsrate |= rt->info[cix].shortPreamble; 2730 /* 2731 * Compute the transmit duration based on the size 2732 * of an ACK frame. We call into the HAL to do the 2733 * computation since it depends on the characteristics 2734 * of the actual PHY being used. 2735 */ 2736 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2737 ctsduration += ath_hal_computetxtime(ah, 2738 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2739 } 2740 /* SIFS + data */ 2741 ctsduration += ath_hal_computetxtime(ah, 2742 rt, pktlen, rix, shortPreamble); 2743 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2744 ctsduration += ath_hal_computetxtime(ah, 2745 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2746 } 2747 } else 2748 ctsrate = 0; 2749 2750 /* 2751 * For now use the antenna on which the last good 2752 * frame was received on. We assume this field is 2753 * initialized to 0 which gives us ``auto'' or the 2754 * ``default'' antenna. 2755 */ 2756 an = (struct ath_node *) ni; 2757 if (an->an_tx_antenna) 2758 antenna = an->an_tx_antenna; 2759 else 2760 antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna; 2761 2762 if (ic->ic_rawbpf) 2763 bpf_mtap(ic->ic_rawbpf, m0); 2764 if (sc->sc_drvbpf) { 2765 sc->sc_tx_th.wt_flags = 0; 2766 if (shortPreamble) 2767 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2768 if (iswep) 2769 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2770 sc->sc_tx_th.wt_rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 2771 sc->sc_tx_th.wt_txpower = 60/2; /* XXX */ 2772 sc->sc_tx_th.wt_antenna = antenna; 2773 2774 bpf_mtap2(sc->sc_drvbpf, 2775 &sc->sc_tx_th, sc->sc_tx_th_len, m0); 2776 } 2777 2778 /* 2779 * Formulate first tx descriptor with tx controls. 2780 */ 2781 /* XXX check return value? */ 2782 ath_hal_setuptxdesc(ah, ds 2783 , pktlen /* packet length */ 2784 , hdrlen /* header length */ 2785 , atype /* Atheros packet type */ 2786 , 60 /* txpower XXX */ 2787 , txrate, 1+10 /* series 0 rate/tries */ 2788 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2789 , antenna /* antenna mode */ 2790 , flags /* flags */ 2791 , ctsrate /* rts/cts rate */ 2792 , ctsduration /* rts/cts duration */ 2793 ); 2794 #ifdef notyet 2795 ath_hal_setupxtxdesc(ah, ds 2796 , AH_FALSE /* short preamble */ 2797 , 0, 0 /* series 1 rate/tries */ 2798 , 0, 0 /* series 2 rate/tries */ 2799 , 0, 0 /* series 3 rate/tries */ 2800 ); 2801 #endif 2802 /* 2803 * Fillin the remainder of the descriptor info. 2804 */ 2805 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2806 ds->ds_data = bf->bf_segs[i].ds_addr; 2807 if (i == bf->bf_nseg - 1) 2808 ds->ds_link = 0; 2809 else 2810 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2811 ath_hal_filltxdesc(ah, ds 2812 , bf->bf_segs[i].ds_len /* segment length */ 2813 , i == 0 /* first segment */ 2814 , i == bf->bf_nseg - 1 /* last segment */ 2815 ); 2816 DPRINTF(ATH_DEBUG_XMIT, 2817 ("%s: %d: %08x %08x %08x %08x %08x %08x\n", 2818 __func__, i, ds->ds_link, ds->ds_data, 2819 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1])); 2820 } 2821 2822 /* 2823 * Insert the frame on the outbound list and 2824 * pass it on to the hardware. 2825 */ 2826 ath_txq_critsect_begin(sc, s); 2827 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2828 if (sc->sc_txlink == NULL) { 2829 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2830 DPRINTF(ATH_DEBUG_XMIT, ("%s: TXDP0 = %p (%p)\n", __func__, 2831 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2832 } else { 2833 *sc->sc_txlink = bf->bf_daddr; 2834 DPRINTF(ATH_DEBUG_XMIT, ("%s: link(%p)=%p (%p)\n", __func__, 2835 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2836 } 2837 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2838 ath_txq_critsect_end(sc, s); 2839 2840 ath_hal_txstart(ah, sc->sc_txhalq); 2841 return 0; 2842 } 2843 2844 static void 2845 ath_tx_proc(void *arg, int npending) 2846 { 2847 struct ath_softc *sc = arg; 2848 struct ath_hal *ah = sc->sc_ah; 2849 struct ath_buf *bf; 2850 struct ieee80211com *ic = &sc->sc_ic; 2851 struct ifnet *ifp = &ic->ic_if; 2852 struct ath_desc *ds; 2853 struct ieee80211_node *ni; 2854 struct ath_node *an; 2855 int sr, lr; 2856 HAL_STATUS status; 2857 ath_txq_critsect_decl(s); 2858 ath_txbuf_critsect_decl(s2); 2859 2860 DPRINTF(ATH_DEBUG_TX_PROC, ("%s: pending %u tx queue %p, link %p\n", 2861 __func__, npending, 2862 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2863 sc->sc_txlink)); 2864 for (;;) { 2865 ath_txq_critsect_begin(sc, s); 2866 bf = TAILQ_FIRST(&sc->sc_txq); 2867 if (bf == NULL) { 2868 sc->sc_txlink = NULL; 2869 ath_txq_critsect_end(sc, s); 2870 break; 2871 } 2872 /* only the last descriptor is needed */ 2873 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2874 status = ath_hal_txprocdesc(ah, ds); 2875 #ifdef AR_DEBUG 2876 if (ath_debug & ATH_DEBUG_XMIT_DESC) 2877 ath_printtxbuf(bf, status == HAL_OK); 2878 #endif 2879 if (status == HAL_EINPROGRESS) { 2880 ath_txq_critsect_end(sc, s); 2881 break; 2882 } 2883 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2884 ath_txq_critsect_end(sc, s); 2885 2886 ni = bf->bf_node; 2887 if (ni != NULL) { 2888 an = (struct ath_node *) ni; 2889 if (ds->ds_txstat.ts_status == 0) { 2890 an->an_tx_ok++; 2891 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2892 } else { 2893 an->an_tx_err++; 2894 ifp->if_oerrors++; 2895 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2896 sc->sc_stats.ast_tx_xretries++; 2897 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2898 sc->sc_stats.ast_tx_fifoerr++; 2899 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2900 sc->sc_stats.ast_tx_filtered++; 2901 an->an_tx_antenna = 0; /* invalidate */ 2902 } 2903 sr = ds->ds_txstat.ts_shortretry; 2904 lr = ds->ds_txstat.ts_longretry; 2905 sc->sc_stats.ast_tx_shortretry += sr; 2906 sc->sc_stats.ast_tx_longretry += lr; 2907 if (sr + lr) 2908 an->an_tx_retr++; 2909 /* 2910 * Reclaim reference to node. 2911 * 2912 * NB: the node may be reclaimed here if, for example 2913 * this is a DEAUTH message that was sent and the 2914 * node was timed out due to inactivity. 2915 */ 2916 ieee80211_release_node(ic, ni); 2917 } 2918 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2919 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2920 m_freem(bf->bf_m); 2921 bf->bf_m = NULL; 2922 bf->bf_node = NULL; 2923 2924 ath_txbuf_critsect_begin(sc, s2); 2925 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2926 ath_txbuf_critsect_end(sc, s2); 2927 } 2928 ifp->if_flags &= ~IFF_OACTIVE; 2929 sc->sc_tx_timer = 0; 2930 2931 ath_start(ifp); 2932 } 2933 2934 /* 2935 * Drain the transmit queue and reclaim resources. 2936 */ 2937 static void 2938 ath_draintxq(struct ath_softc *sc) 2939 { 2940 struct ath_hal *ah = sc->sc_ah; 2941 struct ieee80211com *ic = &sc->sc_ic; 2942 struct ifnet *ifp = &ic->ic_if; 2943 struct ieee80211_node *ni; 2944 struct ath_buf *bf; 2945 ath_txq_critsect_decl(s); 2946 ath_txbuf_critsect_decl(s2); 2947 2948 /* XXX return value */ 2949 if (!sc->sc_invalid) { 2950 /* don't touch the hardware if marked invalid */ 2951 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2952 DPRINTF(ATH_DEBUG_RESET, 2953 ("%s: tx queue %p, link %p\n", __func__, 2954 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2955 sc->sc_txlink)); 2956 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2957 DPRINTF(ATH_DEBUG_RESET, 2958 ("%s: beacon queue %p\n", __func__, 2959 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2960 } 2961 for (;;) { 2962 ath_txq_critsect_begin(sc, s); 2963 bf = TAILQ_FIRST(&sc->sc_txq); 2964 if (bf == NULL) { 2965 sc->sc_txlink = NULL; 2966 ath_txq_critsect_end(sc, s); 2967 break; 2968 } 2969 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2970 ath_txq_critsect_end(sc, s); 2971 #ifdef AR_DEBUG 2972 if (ath_debug & ATH_DEBUG_RESET) 2973 ath_printtxbuf(bf, 2974 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2975 #endif /* AR_DEBUG */ 2976 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2977 m_freem(bf->bf_m); 2978 bf->bf_m = NULL; 2979 ni = bf->bf_node; 2980 bf->bf_node = NULL; 2981 ath_txbuf_critsect_begin(sc, s2); 2982 if (ni != NULL) { 2983 /* 2984 * Reclaim node reference. 2985 */ 2986 ieee80211_release_node(ic, ni); 2987 } 2988 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2989 ath_txbuf_critsect_end(sc, s2); 2990 } 2991 ifp->if_flags &= ~IFF_OACTIVE; 2992 sc->sc_tx_timer = 0; 2993 } 2994 2995 /* 2996 * Disable the receive h/w in preparation for a reset. 2997 */ 2998 static void 2999 ath_stoprecv(struct ath_softc *sc) 3000 { 3001 #define PA2DESC(_sc, _pa) \ 3002 ((struct ath_desc *)((caddr_t)(_sc)->sc_desc + \ 3003 ((_pa) - (_sc)->sc_desc_paddr))) 3004 struct ath_hal *ah = sc->sc_ah; 3005 3006 ath_hal_stoppcurecv(ah); /* disable PCU */ 3007 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 3008 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 3009 DELAY(3000); /* long enough for 1 frame */ 3010 #ifdef AR_DEBUG 3011 if (ath_debug & ATH_DEBUG_RESET) { 3012 struct ath_buf *bf; 3013 3014 printf("%s: rx queue %p, link %p\n", __func__, 3015 (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink); 3016 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 3017 struct ath_desc *ds = bf->bf_desc; 3018 if (ath_hal_rxprocdesc(ah, ds, bf->bf_daddr, 3019 PA2DESC(sc, ds->ds_link)) == HAL_OK) 3020 ath_printrxbuf(bf, 1); 3021 } 3022 } 3023 #endif 3024 sc->sc_rxlink = NULL; /* just in case */ 3025 #undef PA2DESC 3026 } 3027 3028 /* 3029 * Enable the receive h/w following a reset. 3030 */ 3031 static int 3032 ath_startrecv(struct ath_softc *sc) 3033 { 3034 struct ath_hal *ah = sc->sc_ah; 3035 struct ath_buf *bf; 3036 3037 sc->sc_rxlink = NULL; 3038 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 3039 int error = ath_rxbuf_init(sc, bf); 3040 if (error != 0) { 3041 DPRINTF(ATH_DEBUG_RECV, 3042 ("%s: ath_rxbuf_init failed %d\n", 3043 __func__, error)); 3044 return error; 3045 } 3046 } 3047 3048 bf = TAILQ_FIRST(&sc->sc_rxbuf); 3049 ath_hal_putrxbuf(ah, bf->bf_daddr); 3050 ath_hal_rxena(ah); /* enable recv descriptors */ 3051 ath_mode_init(sc); /* set filters, etc. */ 3052 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 3053 return 0; 3054 } 3055 3056 /* 3057 * Set/change channels. If the channel is really being changed, 3058 * it's done by resetting the chip. To accomplish this we must 3059 * first cleanup any pending DMA, then restart stuff after a la 3060 * ath_init. 3061 */ 3062 static int 3063 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 3064 { 3065 struct ath_hal *ah = sc->sc_ah; 3066 struct ieee80211com *ic = &sc->sc_ic; 3067 3068 DPRINTF(ATH_DEBUG_ANY, ("%s: %u (%u MHz) -> %u (%u MHz)\n", __func__, 3069 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 3070 ic->ic_ibss_chan->ic_freq, 3071 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 3072 if (chan != ic->ic_ibss_chan) { 3073 HAL_STATUS status; 3074 HAL_CHANNEL hchan; 3075 enum ieee80211_phymode mode; 3076 3077 /* 3078 * To switch channels clear any pending DMA operations; 3079 * wait long enough for the RX fifo to drain, reset the 3080 * hardware at the new frequency, and then re-enable 3081 * the relevant bits of the h/w. 3082 */ 3083 ath_hal_intrset(ah, 0); /* disable interrupts */ 3084 ath_draintxq(sc); /* clear pending tx frames */ 3085 ath_stoprecv(sc); /* turn off frame recv */ 3086 /* 3087 * Convert to a HAL channel description with 3088 * the flags constrained to reflect the current 3089 * operating mode. 3090 */ 3091 hchan.channel = chan->ic_freq; 3092 hchan.channelFlags = ath_chan2flags(ic, chan); 3093 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 3094 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 3095 "channel %u (%u Mhz)\n", 3096 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 3097 return EIO; 3098 } 3099 /* 3100 * Re-enable rx framework. 3101 */ 3102 if (ath_startrecv(sc) != 0) { 3103 if_printf(&ic->ic_if, 3104 "ath_chan_set: unable to restart recv logic\n"); 3105 return EIO; 3106 } 3107 3108 /* 3109 * Update BPF state. 3110 */ 3111 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 3112 htole16(chan->ic_freq); 3113 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 3114 htole16(chan->ic_flags); 3115 3116 /* 3117 * Change channels and update the h/w rate map 3118 * if we're switching; e.g. 11a to 11b/g. 3119 */ 3120 ic->ic_ibss_chan = chan; 3121 mode = ieee80211_chan2mode(ic, chan); 3122 if (mode != sc->sc_curmode) 3123 ath_setcurmode(sc, mode); 3124 3125 /* 3126 * Re-enable interrupts. 3127 */ 3128 ath_hal_intrset(ah, sc->sc_imask); 3129 } 3130 return 0; 3131 } 3132 3133 static void 3134 ath_next_scan(void *arg) 3135 { 3136 struct ath_softc *sc = arg; 3137 struct ieee80211com *ic = &sc->sc_ic; 3138 int s; 3139 3140 /* don't call ath_start w/o network interrupts blocked */ 3141 s = splnet(); 3142 3143 if (ic->ic_state == IEEE80211_S_SCAN) 3144 ieee80211_next_scan(ic); 3145 splx(s); 3146 } 3147 3148 /* 3149 * Periodically recalibrate the PHY to account 3150 * for temperature/environment changes. 3151 */ 3152 static void 3153 ath_calibrate(void *arg) 3154 { 3155 struct ath_softc *sc = arg; 3156 struct ath_hal *ah = sc->sc_ah; 3157 struct ieee80211com *ic = &sc->sc_ic; 3158 struct ieee80211_channel *c; 3159 HAL_CHANNEL hchan; 3160 3161 sc->sc_stats.ast_per_cal++; 3162 3163 /* 3164 * Convert to a HAL channel description with the flags 3165 * constrained to reflect the current operating mode. 3166 */ 3167 c = ic->ic_ibss_chan; 3168 hchan.channel = c->ic_freq; 3169 hchan.channelFlags = ath_chan2flags(ic, c); 3170 3171 DPRINTF(ATH_DEBUG_CALIBRATE, 3172 ("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 3173 3174 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 3175 /* 3176 * Rfgain is out of bounds, reset the chip 3177 * to load new gain values. 3178 */ 3179 sc->sc_stats.ast_per_rfgain++; 3180 ath_reset(sc); 3181 } 3182 if (!ath_hal_calibrate(ah, &hchan)) { 3183 DPRINTF(ATH_DEBUG_ANY, 3184 ("%s: calibration of channel %u failed\n", 3185 __func__, c->ic_freq)); 3186 sc->sc_stats.ast_per_calfail++; 3187 } 3188 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 3189 } 3190 3191 static HAL_LED_STATE 3192 ath_state_to_led(enum ieee80211_state state) 3193 { 3194 switch (state) { 3195 case IEEE80211_S_INIT: 3196 return HAL_LED_INIT; 3197 case IEEE80211_S_SCAN: 3198 return HAL_LED_SCAN; 3199 case IEEE80211_S_AUTH: 3200 return HAL_LED_AUTH; 3201 case IEEE80211_S_ASSOC: 3202 return HAL_LED_ASSOC; 3203 case IEEE80211_S_RUN: 3204 return HAL_LED_RUN; 3205 default: 3206 panic("%s: unknown 802.11 state %d\n", __func__, state); 3207 return HAL_LED_INIT; 3208 } 3209 } 3210 3211 static int 3212 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 3213 { 3214 struct ifnet *ifp = &ic->ic_if; 3215 struct ath_softc *sc = ifp->if_softc; 3216 struct ath_hal *ah = sc->sc_ah; 3217 struct ieee80211_node *ni; 3218 int i, error; 3219 const u_int8_t *bssid; 3220 u_int32_t rfilt; 3221 3222 DPRINTF(ATH_DEBUG_ANY, ("%s: %s -> %s\n", __func__, 3223 ieee80211_state_name[ic->ic_state], 3224 ieee80211_state_name[nstate])); 3225 3226 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 3227 3228 if (nstate == IEEE80211_S_INIT) { 3229 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3230 ath_hal_intrset(ah, sc->sc_imask); 3231 callout_stop(&sc->sc_scan_ch); 3232 callout_stop(&sc->sc_cal_ch); 3233 return (*sc->sc_newstate)(ic, nstate, arg); 3234 } 3235 ni = ic->ic_bss; 3236 error = ath_chan_set(sc, ni->ni_chan); 3237 if (error != 0) 3238 goto bad; 3239 rfilt = ath_calcrxfilter(sc); 3240 if (nstate == IEEE80211_S_SCAN) { 3241 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 3242 ath_next_scan, sc); 3243 bssid = ifp->if_broadcastaddr; 3244 } else { 3245 callout_stop(&sc->sc_scan_ch); 3246 bssid = ni->ni_bssid; 3247 } 3248 ath_hal_setrxfilter(ah, rfilt); 3249 DPRINTF(ATH_DEBUG_ANY, ("%s: RX filter 0x%x bssid %s\n", 3250 __func__, rfilt, ether_sprintf(bssid))); 3251 3252 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 3253 ath_hal_setassocid(ah, bssid, ni->ni_associd); 3254 else 3255 ath_hal_setassocid(ah, bssid, 0); 3256 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 3257 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3258 if (ath_hal_keyisvalid(ah, i)) 3259 ath_hal_keysetmac(ah, i, bssid); 3260 } 3261 3262 if (nstate == IEEE80211_S_RUN) { 3263 DPRINTF(ATH_DEBUG_ANY, ("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 3264 "capinfo=0x%04x chan=%d\n" 3265 , __func__ 3266 , ic->ic_flags 3267 , ni->ni_intval 3268 , ether_sprintf(ni->ni_bssid) 3269 , ni->ni_capinfo 3270 , ieee80211_chan2ieee(ic, ni->ni_chan))); 3271 3272 /* 3273 * Allocate and setup the beacon frame for AP or adhoc mode. 3274 */ 3275 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 3276 ic->ic_opmode == IEEE80211_M_IBSS) { 3277 error = ath_beacon_alloc(sc, ni); 3278 if (error != 0) 3279 goto bad; 3280 } 3281 3282 /* 3283 * Configure the beacon and sleep timers. 3284 */ 3285 ath_beacon_config(sc); 3286 3287 /* start periodic recalibration timer */ 3288 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 3289 ath_calibrate, sc); 3290 } else { 3291 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 3292 ath_hal_intrset(ah, sc->sc_imask); 3293 callout_stop(&sc->sc_cal_ch); /* no calibration */ 3294 } 3295 /* 3296 * Reset the rate control state. 3297 */ 3298 ath_rate_ctl_reset(sc, nstate); 3299 /* 3300 * Invoke the parent method to complete the work. 3301 */ 3302 return (*sc->sc_newstate)(ic, nstate, arg); 3303 bad: 3304 callout_stop(&sc->sc_scan_ch); 3305 callout_stop(&sc->sc_cal_ch); 3306 /* NB: do not invoke the parent */ 3307 return error; 3308 } 3309 3310 static void 3311 ath_recv_mgmt(struct ieee80211com *ic, struct mbuf *m, 3312 struct ieee80211_node *ni, int subtype, int rssi, u_int32_t rstamp) 3313 { 3314 struct ath_softc *sc = (struct ath_softc*)ic->ic_softc; 3315 struct ath_hal *ah = sc->sc_ah; 3316 3317 (*sc->sc_recv_mgmt)(ic, m, ni, subtype, rssi, rstamp); 3318 3319 switch (subtype) { 3320 case IEEE80211_FC0_SUBTYPE_PROBE_RESP: 3321 case IEEE80211_FC0_SUBTYPE_BEACON: 3322 if (ic->ic_opmode != IEEE80211_M_IBSS || 3323 ic->ic_state != IEEE80211_S_RUN) 3324 break; 3325 if (ieee80211_ibss_merge(ic, ni, ath_hal_gettsf64(ah)) == 3326 ENETRESET) 3327 ath_hal_setassocid(ah, ic->ic_bss->ni_bssid, 0); 3328 break; 3329 default: 3330 break; 3331 } 3332 return; 3333 } 3334 3335 /* 3336 * Setup driver-specific state for a newly associated node. 3337 * Note that we're called also on a re-associate, the isnew 3338 * param tells us if this is the first time or not. 3339 */ 3340 static void 3341 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 3342 { 3343 if (isnew) { 3344 struct ath_node *an = (struct ath_node *) ni; 3345 3346 an->an_tx_ok = an->an_tx_err = 3347 an->an_tx_retr = an->an_tx_upper = 0; 3348 /* start with highest negotiated rate */ 3349 /* 3350 * XXX should do otherwise but only when 3351 * the rate control algorithm is better. 3352 */ 3353 KASSERT(ni->ni_rates.rs_nrates > 0, 3354 ("new association w/ no rates!")); 3355 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3356 } 3357 } 3358 3359 static int 3360 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor, 3361 HAL_BOOL xchanmode) 3362 { 3363 struct ieee80211com *ic = &sc->sc_ic; 3364 struct ifnet *ifp = &ic->ic_if; 3365 struct ath_hal *ah = sc->sc_ah; 3366 HAL_CHANNEL *chans; 3367 int i, ix, nchan; 3368 3369 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 3370 M_TEMP, M_NOWAIT); 3371 if (chans == NULL) { 3372 if_printf(ifp, "unable to allocate channel table\n"); 3373 return ENOMEM; 3374 } 3375 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 3376 cc, HAL_MODE_ALL, outdoor, xchanmode)) { 3377 if_printf(ifp, "unable to collect channel list from hal\n"); 3378 free(chans, M_TEMP); 3379 return EINVAL; 3380 } 3381 3382 /* 3383 * Convert HAL channels to ieee80211 ones and insert 3384 * them in the table according to their channel number. 3385 */ 3386 for (i = 0; i < nchan; i++) { 3387 HAL_CHANNEL *c = &chans[i]; 3388 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 3389 if (ix > IEEE80211_CHAN_MAX) { 3390 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 3391 ix, c->channel, c->channelFlags); 3392 continue; 3393 } 3394 DPRINTF(ATH_DEBUG_ANY, 3395 ("%s: HAL channel %d/%d freq %d flags %#04x idx %d\n", 3396 sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags, 3397 ix)); 3398 /* NB: flags are known to be compatible */ 3399 if (ic->ic_channels[ix].ic_freq == 0) { 3400 ic->ic_channels[ix].ic_freq = c->channel; 3401 ic->ic_channels[ix].ic_flags = c->channelFlags; 3402 } else { 3403 /* channels overlap; e.g. 11g and 11b */ 3404 ic->ic_channels[ix].ic_flags |= c->channelFlags; 3405 } 3406 } 3407 free(chans, M_TEMP); 3408 return 0; 3409 } 3410 3411 static int 3412 ath_rate_setup(struct ath_softc *sc, u_int mode) 3413 { 3414 struct ath_hal *ah = sc->sc_ah; 3415 struct ieee80211com *ic = &sc->sc_ic; 3416 const HAL_RATE_TABLE *rt; 3417 struct ieee80211_rateset *rs; 3418 int i, maxrates; 3419 3420 switch (mode) { 3421 case IEEE80211_MODE_11A: 3422 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 3423 break; 3424 case IEEE80211_MODE_11B: 3425 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 3426 break; 3427 case IEEE80211_MODE_11G: 3428 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 3429 break; 3430 case IEEE80211_MODE_TURBO: 3431 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 3432 break; 3433 default: 3434 DPRINTF(ATH_DEBUG_ANY, 3435 ("%s: invalid mode %u\n", __func__, mode)); 3436 return 0; 3437 } 3438 rt = sc->sc_rates[mode]; 3439 if (rt == NULL) 3440 return 0; 3441 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 3442 DPRINTF(ATH_DEBUG_ANY, 3443 ("%s: rate table too small (%u > %u)\n", 3444 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 3445 maxrates = IEEE80211_RATE_MAXSIZE; 3446 } else 3447 maxrates = rt->rateCount; 3448 rs = &ic->ic_sup_rates[mode]; 3449 for (i = 0; i < maxrates; i++) 3450 rs->rs_rates[i] = rt->info[i].dot11Rate; 3451 rs->rs_nrates = maxrates; 3452 return 1; 3453 } 3454 3455 static void 3456 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 3457 { 3458 const HAL_RATE_TABLE *rt; 3459 int i; 3460 3461 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 3462 rt = sc->sc_rates[mode]; 3463 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 3464 for (i = 0; i < rt->rateCount; i++) 3465 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 3466 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 3467 for (i = 0; i < 32; i++) 3468 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 3469 sc->sc_currates = rt; 3470 sc->sc_curmode = mode; 3471 } 3472 3473 /* 3474 * Reset the rate control state for each 802.11 state transition. 3475 */ 3476 static void 3477 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 3478 { 3479 struct ieee80211com *ic = &sc->sc_ic; 3480 struct ieee80211_node *ni; 3481 struct ath_node *an; 3482 3483 if (ic->ic_opmode != IEEE80211_M_STA) { 3484 /* 3485 * When operating as a station the node table holds 3486 * the AP's that were discovered during scanning. 3487 * For any other operating mode we want to reset the 3488 * tx rate state of each node. 3489 */ 3490 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3491 ni->ni_txrate = 0; /* use lowest rate */ 3492 an = (struct ath_node *) ni; 3493 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3494 an->an_tx_upper = 0; 3495 } 3496 } 3497 /* 3498 * Reset local xmit state; this is really only meaningful 3499 * when operating in station or adhoc mode. 3500 */ 3501 ni = ic->ic_bss; 3502 an = (struct ath_node *) ni; 3503 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3504 if (state == IEEE80211_S_RUN) { 3505 /* start with highest negotiated rate */ 3506 KASSERT(ni->ni_rates.rs_nrates > 0, 3507 ("transition to RUN state w/ no rates!")); 3508 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3509 } else { 3510 /* use lowest rate */ 3511 ni->ni_txrate = 0; 3512 } 3513 } 3514 3515 /* 3516 * Examine and potentially adjust the transmit rate. 3517 */ 3518 static void 3519 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3520 { 3521 struct ath_softc *sc = arg; 3522 struct ath_node *an = (struct ath_node *) ni; 3523 struct ieee80211_rateset *rs = &ni->ni_rates; 3524 int mod = 0, orate, enough; 3525 3526 /* 3527 * Rate control 3528 * XXX: very primitive version. 3529 */ 3530 sc->sc_stats.ast_rate_calls++; 3531 3532 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3533 3534 /* no packet reached -> down */ 3535 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3536 mod = -1; 3537 3538 /* all packets needs retry in average -> down */ 3539 if (enough && an->an_tx_ok < an->an_tx_retr) 3540 mod = -1; 3541 3542 /* no error and less than 10% of packets needs retry -> up */ 3543 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3544 mod = 1; 3545 3546 orate = ni->ni_txrate; 3547 switch (mod) { 3548 case 0: 3549 if (enough && an->an_tx_upper > 0) 3550 an->an_tx_upper--; 3551 break; 3552 case -1: 3553 if (ni->ni_txrate > 0) { 3554 ni->ni_txrate--; 3555 sc->sc_stats.ast_rate_drop++; 3556 } 3557 an->an_tx_upper = 0; 3558 break; 3559 case 1: 3560 if (++an->an_tx_upper < 2) 3561 break; 3562 an->an_tx_upper = 0; 3563 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3564 ni->ni_txrate++; 3565 sc->sc_stats.ast_rate_raise++; 3566 } 3567 break; 3568 } 3569 3570 if (ni->ni_txrate != orate) { 3571 DPRINTF(ATH_DEBUG_RATE, 3572 ("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3573 __func__, 3574 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3575 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3576 an->an_tx_ok, an->an_tx_err, an->an_tx_retr)); 3577 } 3578 if (ni->ni_txrate != orate || enough) 3579 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3580 } 3581 3582 #ifdef AR_DEBUG 3583 #ifdef __FreeBSD__ 3584 static int 3585 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3586 { 3587 char dmode[64]; 3588 int error; 3589 3590 strncpy(dmode, "", sizeof(dmode) - 1); 3591 dmode[sizeof(dmode) - 1] = '\0'; 3592 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3593 3594 if (error == 0 && req->newptr != NULL) { 3595 struct ifnet *ifp; 3596 struct ath_softc *sc; 3597 3598 ifp = ifunit("ath0"); /* XXX */ 3599 if (!ifp) 3600 return EINVAL; 3601 sc = ifp->if_softc; 3602 if (strcmp(dmode, "hal") == 0) 3603 ath_hal_dumpstate(sc->sc_ah); 3604 else 3605 return EINVAL; 3606 } 3607 return error; 3608 } 3609 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3610 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3611 #endif /* __FreeBSD__ */ 3612 3613 #if 0 /* #ifdef __NetBSD__ */ 3614 static int 3615 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3616 { 3617 char dmode[64]; 3618 int error; 3619 3620 strncpy(dmode, "", sizeof(dmode) - 1); 3621 dmode[sizeof(dmode) - 1] = '\0'; 3622 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3623 3624 if (error == 0 && req->newptr != NULL) { 3625 struct ifnet *ifp; 3626 struct ath_softc *sc; 3627 3628 ifp = ifunit("ath0"); /* XXX */ 3629 if (!ifp) 3630 return EINVAL; 3631 sc = ifp->if_softc; 3632 if (strcmp(dmode, "hal") == 0) 3633 ath_hal_dumpstate(sc->sc_ah); 3634 else 3635 return EINVAL; 3636 } 3637 return error; 3638 } 3639 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3640 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3641 #endif /* __NetBSD__ */ 3642 3643 static void 3644 ath_printrxbuf(struct ath_buf *bf, int done) 3645 { 3646 struct ath_desc *ds; 3647 int i; 3648 3649 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3650 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3651 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3652 ds->ds_link, ds->ds_data, 3653 ds->ds_ctl0, ds->ds_ctl1, 3654 ds->ds_hw[0], ds->ds_hw[1], 3655 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3656 } 3657 } 3658 3659 static void 3660 ath_printtxbuf(struct ath_buf *bf, int done) 3661 { 3662 struct ath_desc *ds; 3663 int i; 3664 3665 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3666 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3667 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3668 ds->ds_link, ds->ds_data, 3669 ds->ds_ctl0, ds->ds_ctl1, 3670 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3671 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3672 } 3673 } 3674 #endif /* AR_DEBUG */ 3675
Indexes created Thu Oct 02 07:10:07 GMT 2025