ath.c revision 1.4
1 /*- 2 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 22 * 23 * NO WARRANTY 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 */ 36 37 #include <sys/cdefs.h> 38 #ifdef __FreeBSD__ 39 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.14 2003/09/05 22:22:49 sam Exp $"); 40 #endif 41 #ifdef __NetBSD__ 42 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.4 2003/10/14 23:13:44 dyoung Exp $"); 43 #endif 44 45 /* 46 * Driver for the Atheros Wireless LAN controller. 47 * 48 * This software is derived from work of Atsushi Onoe; his contribution 49 * is greatly appreciated. 50 */ 51 52 #include "opt_inet.h" 53 54 #ifdef __NetBSD__ 55 #include "bpfilter.h" 56 #endif /* __NetBSD__ */ 57 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/types.h> 61 #include <sys/sysctl.h> 62 #include <sys/mbuf.h> 63 #include <sys/malloc.h> 64 #include <sys/lock.h> 65 #ifdef __FreeBSD__ 66 #include <sys/mutex.h> 67 #endif 68 #include <sys/kernel.h> 69 #include <sys/socket.h> 70 #include <sys/sockio.h> 71 #include <sys/errno.h> 72 #include <sys/callout.h> 73 #ifdef __FreeBSD__ 74 #include <sys/bus.h> 75 #else 76 #include <machine/bus.h> 77 #endif 78 #include <sys/endian.h> 79 80 #include <machine/bus.h> 81 82 #include <net/if.h> 83 #include <net/if_dl.h> 84 #include <net/if_media.h> 85 #include <net/if_arp.h> 86 #ifdef __FreeBSD__ 87 #include <net/ethernet.h> 88 #else 89 #include <net/if_ether.h> 90 #endif 91 #include <net/if_llc.h> 92 93 #include <net80211/ieee80211_var.h> 94 #include <net80211/ieee80211_compat.h> 95 96 #if NBPFILTER > 0 97 #include <net/bpf.h> 98 #endif 99 100 #ifdef INET 101 #include <netinet/in.h> 102 #endif 103 104 #include <dev/ic/athcompat.h> 105 106 #define AR_DEBUG 107 #ifdef __FreeBSD__ 108 #include <dev/ath/if_athvar.h> 109 #include <contrib/dev/ath/ah_desc.h> 110 #else 111 #include <dev/ic/athvar.h> 112 #include <../contrib/sys/dev/ic/athhal_desc.h> 113 #endif 114 115 /* unalligned little endian access */ 116 #define LE_READ_2(p) \ 117 ((u_int16_t) \ 118 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 119 #define LE_READ_4(p) \ 120 ((u_int32_t) \ 121 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 122 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 123 124 #ifdef __FreeBSD__ 125 static void ath_init(void *); 126 #else 127 static int ath_init(struct ifnet *); 128 #endif 129 static int ath_init1(struct ath_softc *); 130 static int ath_intr1(struct ath_softc *); 131 static void ath_stop(struct ifnet *); 132 static void ath_start(struct ifnet *); 133 static void ath_reset(struct ath_softc *); 134 static int ath_media_change(struct ifnet *); 135 static void ath_watchdog(struct ifnet *); 136 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 137 static void ath_fatal_proc(void *, int); 138 static void ath_rxorn_proc(void *, int); 139 static void ath_bmiss_proc(void *, int); 140 static void ath_initkeytable(struct ath_softc *); 141 static void ath_mode_init(struct ath_softc *); 142 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 143 static void ath_beacon_proc(void *, int); 144 static void ath_beacon_free(struct ath_softc *); 145 static void ath_beacon_config(struct ath_softc *); 146 static int ath_desc_alloc(struct ath_softc *); 147 static void ath_desc_free(struct ath_softc *); 148 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 149 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 150 static void ath_node_copy(struct ieee80211com *, 151 struct ieee80211_node *, const struct ieee80211_node *); 152 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 153 static void ath_rx_proc(void *, int); 154 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 155 struct ath_buf *, struct mbuf *); 156 static void ath_tx_proc(void *, int); 157 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 158 static void ath_draintxq(struct ath_softc *); 159 static void ath_stoprecv(struct ath_softc *); 160 static int ath_startrecv(struct ath_softc *); 161 static void ath_next_scan(void *); 162 static void ath_calibrate(void *); 163 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 164 static void ath_newassoc(struct ieee80211com *, 165 struct ieee80211_node *, int); 166 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor); 167 168 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 169 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 170 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 171 static void ath_rate_ctl(void *, struct ieee80211_node *); 172 173 #ifdef __NetBSD__ 174 int ath_enable(struct ath_softc *); 175 void ath_disable(struct ath_softc *); 176 void ath_power(int, void *); 177 #endif 178 179 #ifdef __FreeBSD__ 180 SYSCTL_DECL(_hw_ath); 181 /* XXX validate sysctl values */ 182 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 183 0, "channel dwell time (ms) for AP/station scanning"); 184 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 185 0, "chip calibration interval (secs)"); 186 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 187 0, "enable/disable outdoor operation"); 188 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 189 0, "country code"); 190 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 191 0, "regulatory domain"); 192 #endif /* __FreeBSD__ */ 193 194 static int ath_dwelltime = 200; /* 5 channels/second */ 195 static int ath_calinterval = 30; /* calibrate every 30 secs */ 196 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 197 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 198 static int ath_regdomain = 0; /* regulatory domain */ 199 200 #ifdef AR_DEBUG 201 int ath_debug = 0; 202 #ifdef __FreeBSD__ 203 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 204 0, "control debugging printfs"); 205 #endif /* __FreeBSD__ */ 206 #define IFF_DUMPPKTS(_ifp) \ 207 (ath_debug || \ 208 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 209 static void ath_printrxbuf(struct ath_buf *bf, int); 210 static void ath_printtxbuf(struct ath_buf *bf, int); 211 #define DPRINTF(X) if (ath_debug) printf X 212 #define DPRINTF2(X) if (ath_debug > 1) printf X 213 #else 214 #define IFF_DUMPPKTS(_ifp) \ 215 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 216 #define DPRINTF(X) 217 #define DPRINTF2(X) 218 #endif 219 220 #ifdef __NetBSD__ 221 int 222 ath_activate(struct device *self, enum devact act) 223 { 224 struct ath_softc *sc = (struct ath_softc *)self; 225 int rv = 0, s; 226 227 s = splnet(); 228 switch (act) { 229 case DVACT_ACTIVATE: 230 rv = EOPNOTSUPP; 231 break; 232 case DVACT_DEACTIVATE: 233 if_deactivate(&sc->sc_ic.ic_if); 234 break; 235 } 236 splx(s); 237 return rv; 238 } 239 240 int 241 ath_enable(struct ath_softc *sc) 242 { 243 if (ATH_IS_ENABLED(sc) == 0) { 244 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 245 printf("%s: device enable failed\n", 246 sc->sc_dev.dv_xname); 247 return (EIO); 248 } 249 sc->sc_flags |= ATH_ENABLED; 250 } 251 return (0); 252 } 253 254 void 255 ath_disable(struct ath_softc *sc) 256 { 257 if (!ATH_IS_ENABLED(sc)) 258 return; 259 if (sc->sc_disable != NULL) 260 (*sc->sc_disable)(sc); 261 sc->sc_flags &= ~ATH_ENABLED; 262 } 263 #endif /* #ifdef __NetBSD__ */ 264 265 int 266 ath_attach(u_int16_t devid, struct ath_softc *sc) 267 { 268 struct ieee80211com *ic = &sc->sc_ic; 269 struct ifnet *ifp = &ic->ic_if; 270 struct ath_hal *ah; 271 HAL_STATUS status; 272 int error = 0; 273 274 DPRINTF(("ath_attach: devid 0x%x\n", devid)); 275 276 #ifdef __FreeBSD__ 277 /* set these up early for if_printf use */ 278 ifp->if_unit = device_get_unit(sc->sc_dev); 279 ifp->if_name = "ath"; 280 #else 281 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 282 #endif 283 284 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 285 if (ah == NULL) { 286 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 287 status); 288 error = ENXIO; 289 goto bad; 290 } 291 sc->sc_ah = ah; 292 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 293 294 /* 295 * Collect the channel list using the default country 296 * code and including outdoor channels. The 802.11 layer 297 * is resposible for filtering this list based on settings 298 * like the phy mode. 299 */ 300 error = ath_getchannels(sc, ath_countrycode, ath_outdoor); 301 if (error != 0) 302 goto bad; 303 /* 304 * Copy these back; they are set as a side effect 305 * of constructing the channel list. 306 */ 307 ath_regdomain = ath_hal_getregdomain(ah); 308 ath_countrycode = ath_hal_getcountrycode(ah); 309 310 /* 311 * Setup rate tables for all potential media types. 312 */ 313 ath_rate_setup(sc, IEEE80211_MODE_11A); 314 ath_rate_setup(sc, IEEE80211_MODE_11B); 315 ath_rate_setup(sc, IEEE80211_MODE_11G); 316 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 317 318 error = ath_desc_alloc(sc); 319 if (error != 0) { 320 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 321 goto bad; 322 } 323 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 324 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 325 326 #ifdef __FreeBSD__ 327 mtx_init(&sc->sc_txbuflock, 328 device_get_nameunit(sc->sc_dev), "xmit buf q", MTX_DEF); 329 mtx_init(&sc->sc_txqlock, 330 device_get_nameunit(sc->sc_dev), "xmit q", MTX_DEF); 331 #endif 332 333 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 334 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 335 ATH_TASK_INIT(&sc->sc_swbatask, ath_beacon_proc, sc); 336 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 337 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 338 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 339 340 /* 341 * For now just pre-allocate one data queue and one 342 * beacon queue. Note that the HAL handles resetting 343 * them at the needed time. Eventually we'll want to 344 * allocate more tx queues for splitting management 345 * frames and for QOS support. 346 */ 347 sc->sc_txhalq = ath_hal_setuptxqueue(ah, 348 HAL_TX_QUEUE_DATA, 349 AH_TRUE /* enable interrupts */ 350 ); 351 if (sc->sc_txhalq == (u_int) -1) { 352 if_printf(ifp, "unable to setup a data xmit queue!\n"); 353 goto bad; 354 } 355 sc->sc_bhalq = ath_hal_setuptxqueue(ah, 356 HAL_TX_QUEUE_BEACON, 357 AH_TRUE /* enable interrupts */ 358 ); 359 if (sc->sc_bhalq == (u_int) -1) { 360 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 361 goto bad; 362 } 363 364 ifp->if_softc = sc; 365 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 366 ifp->if_start = ath_start; 367 ifp->if_watchdog = ath_watchdog; 368 ifp->if_ioctl = ath_ioctl; 369 ifp->if_init = ath_init; 370 #ifdef __FreeBSD__ 371 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 372 #else 373 #if 0 374 ifp->if_stop = ath_stop; /* XXX */ 375 #endif 376 IFQ_SET_READY(&ifp->if_snd); 377 #endif 378 379 ic->ic_softc = sc; 380 ic->ic_newassoc = ath_newassoc; 381 /* XXX not right but it's not used anywhere important */ 382 ic->ic_phytype = IEEE80211_T_OFDM; 383 ic->ic_opmode = IEEE80211_M_STA; 384 ic->ic_caps = IEEE80211_C_WEP | IEEE80211_C_IBSS | IEEE80211_C_HOSTAP 385 | IEEE80211_C_MONITOR; 386 /* NB: 11g support is identified when we fetch the channel set */ 387 if (sc->sc_have11g) 388 ic->ic_caps |= IEEE80211_C_SHPREAMBLE; 389 390 /* get mac address from hardware */ 391 ath_hal_getmac(ah, ic->ic_myaddr); 392 393 #ifdef __NetBSD__ 394 if_attach(ifp); 395 #endif 396 /* call MI attach routine. */ 397 ieee80211_ifattach(ifp); 398 /* override default methods */ 399 ic->ic_node_alloc = ath_node_alloc; 400 ic->ic_node_free = ath_node_free; 401 ic->ic_node_copy = ath_node_copy; 402 sc->sc_newstate = ic->ic_newstate; 403 ic->ic_newstate = ath_newstate; 404 /* complete initialization */ 405 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 406 407 #if NBPFILTER > 0 408 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 409 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 410 &sc->sc_drvbpf); 411 #endif 412 /* 413 * Initialize constant fields. 414 * 415 * NB: the channel is setup each time we transition to the 416 * RUN state to avoid filling it in for each frame. 417 */ 418 sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th); 419 sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT; 420 421 sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th); 422 sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT; 423 424 if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr)); 425 426 #ifdef __NetBSD__ 427 sc->sc_flags |= ATH_ATTACHED; 428 /* 429 * Make sure the interface is shutdown during reboot. 430 */ 431 #if 0 432 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 433 if (sc->sc_sdhook == NULL) 434 printf("%s: WARNING: unable to establish shutdown hook\n", 435 sc->sc_dev.dv_xname); 436 #endif 437 sc->sc_powerhook = powerhook_establish(ath_power, sc); 438 if (sc->sc_powerhook == NULL) 439 printf("%s: WARNING: unable to establish power hook\n", 440 sc->sc_dev.dv_xname); 441 #endif 442 return 0; 443 bad: 444 if (ah) 445 ath_hal_detach(ah); 446 sc->sc_invalid = 1; 447 return error; 448 } 449 450 int 451 ath_detach(struct ath_softc *sc) 452 { 453 struct ifnet *ifp = &sc->sc_ic.ic_if; 454 ath_softc_critsect_decl(s); 455 456 DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags)); 457 if ((sc->sc_flags & ATH_ATTACHED) == 0) 458 return (0); 459 460 ath_softc_critsect_begin(sc, s); 461 ath_stop(ifp); 462 #if NBPFILTER > 0 463 bpfdetach(ifp); 464 #endif 465 ath_desc_free(sc); 466 ath_hal_detach(sc->sc_ah); 467 ieee80211_ifdetach(ifp); 468 #ifdef __NetBSD__ 469 if_detach(ifp); 470 #endif 471 ath_softc_critsect_end(sc, s); 472 return 0; 473 } 474 475 void 476 ath_power(int why, void *arg) 477 { 478 struct ath_softc *sc = arg; 479 int s; 480 481 DPRINTF(("ath_power(%d)\n", why)); 482 483 s = splnet(); 484 switch (why) { 485 case PWR_SUSPEND: 486 case PWR_STANDBY: 487 ath_suspend(sc, why); 488 break; 489 case PWR_RESUME: 490 ath_resume(sc, why); 491 break; 492 case PWR_SOFTSUSPEND: 493 case PWR_SOFTSTANDBY: 494 case PWR_SOFTRESUME: 495 break; 496 } 497 splx(s); 498 } 499 500 void 501 ath_suspend(struct ath_softc *sc, int why) 502 { 503 struct ifnet *ifp = &sc->sc_ic.ic_if; 504 505 DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags)); 506 507 ath_stop(ifp); 508 if (sc->sc_power != NULL) 509 (*sc->sc_power)(sc, why); 510 } 511 512 void 513 ath_resume(struct ath_softc *sc, int why) 514 { 515 struct ifnet *ifp = &sc->sc_ic.ic_if; 516 517 DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags)); 518 519 if (ifp->if_flags & IFF_UP) { 520 ath_init(ifp); 521 #if 0 522 (void)ath_intr(sc); 523 #endif 524 if (sc->sc_power != NULL) 525 (*sc->sc_power)(sc, why); 526 if (ifp->if_flags & IFF_RUNNING) 527 ath_start(ifp); 528 } 529 } 530 531 void 532 ath_shutdown(struct ath_softc *sc) 533 { 534 #if 1 535 return; 536 #else 537 struct ifnet *ifp = &sc->sc_ic.ic_if; 538 539 DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags)); 540 541 ath_stop(ifp); 542 #endif 543 } 544 545 #ifdef __NetBSD__ 546 int 547 ath_intr(void *arg) 548 { 549 return ath_intr1((struct ath_softc *)arg); 550 } 551 #else 552 void 553 ath_intr(void *arg) 554 { 555 (void)ath_intr1((struct ath_softc *)arg); 556 } 557 #endif 558 559 static int 560 ath_intr1(struct ath_softc *sc) 561 { 562 struct ieee80211com *ic = &sc->sc_ic; 563 struct ifnet *ifp = &ic->ic_if; 564 struct ath_hal *ah = sc->sc_ah; 565 HAL_INT status; 566 567 if (sc->sc_invalid) { 568 /* 569 * The hardware is not ready/present, don't touch anything. 570 * Note this can happen early on if the IRQ is shared. 571 */ 572 DPRINTF(("ath_intr: invalid; ignored\n")); 573 return 0; 574 } 575 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 576 DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags)); 577 ath_hal_getisr(ah, &status); /* clear ISR */ 578 ath_hal_intrset(ah, 0); /* disable further intr's */ 579 return 1; /* XXX */ 580 } 581 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 582 DPRINTF2(("ath_intr: status 0x%x\n", status)); 583 #ifdef AR_DEBUG 584 if (ath_debug && 585 (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) { 586 if_printf(ifp, "ath_intr: status 0x%x\n", status); 587 ath_hal_dumpstate(ah); 588 } 589 #endif /* AR_DEBUG */ 590 if (status & HAL_INT_FATAL) { 591 sc->sc_stats.ast_hardware++; 592 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 593 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 594 } else if (status & HAL_INT_RXORN) { 595 sc->sc_stats.ast_rxorn++; 596 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 597 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 598 } else { 599 if (status & HAL_INT_RXEOL) { 600 /* 601 * NB: the hardware should re-read the link when 602 * RXE bit is written, but it doesn't work at 603 * least on older hardware revs. 604 */ 605 sc->sc_stats.ast_rxeol++; 606 sc->sc_rxlink = NULL; 607 } 608 if (status & HAL_INT_TXURN) { 609 sc->sc_stats.ast_txurn++; 610 /* bump tx trigger level */ 611 ath_hal_updatetxtriglevel(ah, AH_TRUE); 612 } 613 if (status & HAL_INT_RX) 614 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 615 if (status & HAL_INT_TX) 616 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 617 if (status & HAL_INT_SWBA) 618 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_swbatask); 619 if (status & HAL_INT_BMISS) { 620 sc->sc_stats.ast_bmiss++; 621 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 622 } 623 } 624 return 1; 625 } 626 627 static void 628 ath_fatal_proc(void *arg, int pending) 629 { 630 struct ath_softc *sc = arg; 631 632 device_printf(sc->sc_dev, "hardware error; resetting\n"); 633 ath_reset(sc); 634 } 635 636 static void 637 ath_rxorn_proc(void *arg, int pending) 638 { 639 struct ath_softc *sc = arg; 640 641 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 642 ath_reset(sc); 643 } 644 645 static void 646 ath_bmiss_proc(void *arg, int pending) 647 { 648 struct ath_softc *sc = arg; 649 struct ieee80211com *ic = &sc->sc_ic; 650 651 DPRINTF(("ath_bmiss_proc: pending %u\n", pending)); 652 KASSERT(ic->ic_opmode == IEEE80211_M_STA, 653 ("unexpect operating mode %u", ic->ic_opmode)); 654 if (ic->ic_state == IEEE80211_S_RUN) 655 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 656 } 657 658 static u_int 659 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 660 { 661 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 662 663 switch (mode) { 664 case IEEE80211_MODE_AUTO: 665 return 0; 666 case IEEE80211_MODE_11A: 667 return CHANNEL_A; 668 case IEEE80211_MODE_11B: 669 return CHANNEL_B; 670 case IEEE80211_MODE_11G: 671 return CHANNEL_PUREG; 672 case IEEE80211_MODE_TURBO: 673 return CHANNEL_T; 674 default: 675 panic("%s: unsupported mode %d\n", __func__, mode); 676 return 0; 677 } 678 } 679 680 #ifdef __NetBSD__ 681 static int 682 ath_init(struct ifnet *ifp) 683 { 684 return ath_init1((struct ath_softc *)ifp->if_softc); 685 } 686 #else 687 static void 688 ath_init(void *arg) 689 { 690 (void)ath_init1((struct ath_softc *)arg); 691 } 692 #endif 693 694 static int 695 ath_init1(struct ath_softc *sc) 696 { 697 struct ieee80211com *ic = &sc->sc_ic; 698 struct ifnet *ifp = &ic->ic_if; 699 struct ieee80211_node *ni; 700 enum ieee80211_phymode mode; 701 struct ath_hal *ah = sc->sc_ah; 702 HAL_STATUS status; 703 HAL_CHANNEL hchan; 704 int error = 0; 705 ath_softc_critsect_decl(s); 706 707 DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags)); 708 709 #ifdef __NetBSD__ 710 if ((error = ath_enable(sc)) != 0) 711 return error; 712 #endif 713 714 ath_softc_critsect_begin(sc, s); 715 /* 716 * Stop anything previously setup. This is safe 717 * whether this is the first time through or not. 718 */ 719 ath_stop(ifp); 720 721 /* 722 * The basic interface to setting the hardware in a good 723 * state is ``reset''. On return the hardware is known to 724 * be powered up and with interrupts disabled. This must 725 * be followed by initialization of the appropriate bits 726 * and then setup of the interrupt mask. 727 */ 728 hchan.channel = ic->ic_ibss_chan->ic_freq; 729 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 730 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 731 if_printf(ifp, "unable to reset hardware; hal status %u\n", 732 status); 733 error = -1; 734 goto done; 735 } 736 737 /* 738 * Setup the hardware after reset: the key cache 739 * is filled as needed and the receive engine is 740 * set going. Frame transmit is handled entirely 741 * in the frame output path; there's nothing to do 742 * here except setup the interrupt mask. 743 */ 744 if (ic->ic_flags & IEEE80211_F_WEPON) 745 ath_initkeytable(sc); 746 if ((error = ath_startrecv(sc)) != 0) { 747 if_printf(ifp, "unable to start recv logic\n"); 748 goto done; 749 } 750 751 /* 752 * Enable interrupts. 753 */ 754 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 755 | HAL_INT_RXEOL | HAL_INT_RXORN 756 | HAL_INT_FATAL | HAL_INT_GLOBAL; 757 ath_hal_intrset(ah, sc->sc_imask); 758 759 ifp->if_flags |= IFF_RUNNING; 760 ic->ic_state = IEEE80211_S_INIT; 761 762 /* 763 * The hardware should be ready to go now so it's safe 764 * to kick the 802.11 state machine as it's likely to 765 * immediately call back to us to send mgmt frames. 766 */ 767 ni = ic->ic_bss; 768 ni->ni_chan = ic->ic_ibss_chan; 769 mode = ieee80211_chan2mode(ic, ni->ni_chan); 770 if (mode != sc->sc_curmode) 771 ath_setcurmode(sc, mode); 772 if (ic->ic_opmode != IEEE80211_M_MONITOR) 773 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 774 else 775 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 776 done: 777 ath_softc_critsect_end(sc, s); 778 return error; 779 } 780 781 static void 782 ath_stop(struct ifnet *ifp) 783 { 784 struct ieee80211com *ic = (struct ieee80211com *) ifp; 785 struct ath_softc *sc = ifp->if_softc; 786 struct ath_hal *ah = sc->sc_ah; 787 ath_softc_critsect_decl(s); 788 789 DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n", 790 sc->sc_invalid, ifp->if_flags)); 791 792 ath_softc_critsect_begin(sc, s); 793 if (ifp->if_flags & IFF_RUNNING) { 794 /* 795 * Shutdown the hardware and driver: 796 * disable interrupts 797 * turn off timers 798 * clear transmit machinery 799 * clear receive machinery 800 * drain and release tx queues 801 * reclaim beacon resources 802 * reset 802.11 state machine 803 * power down hardware 804 * 805 * Note that some of this work is not possible if the 806 * hardware is gone (invalid). 807 */ 808 ifp->if_flags &= ~IFF_RUNNING; 809 ifp->if_timer = 0; 810 if (!sc->sc_invalid) 811 ath_hal_intrset(ah, 0); 812 ath_draintxq(sc); 813 if (!sc->sc_invalid) 814 ath_stoprecv(sc); 815 else 816 sc->sc_rxlink = NULL; 817 #ifdef __FreeBSD__ 818 IF_DRAIN(&ifp->if_snd); 819 #else 820 IF_PURGE(&ifp->if_snd); 821 #endif 822 ath_beacon_free(sc); 823 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 824 if (!sc->sc_invalid) { 825 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 826 } 827 #ifdef __NetBSD__ 828 ath_disable(sc); 829 #endif 830 } 831 ath_softc_critsect_end(sc, s); 832 } 833 834 /* 835 * Reset the hardware w/o losing operational state. This is 836 * basically a more efficient way of doing ath_stop, ath_init, 837 * followed by state transitions to the current 802.11 838 * operational state. Used to recover from errors rx overrun 839 * and to reset the hardware when rf gain settings must be reset. 840 */ 841 static void 842 ath_reset(struct ath_softc *sc) 843 { 844 struct ieee80211com *ic = &sc->sc_ic; 845 struct ifnet *ifp = &ic->ic_if; 846 struct ath_hal *ah = sc->sc_ah; 847 struct ieee80211_channel *c; 848 HAL_STATUS status; 849 HAL_CHANNEL hchan; 850 851 /* 852 * Convert to a HAL channel description with the flags 853 * constrained to reflect the current operating mode. 854 */ 855 c = ic->ic_ibss_chan; 856 hchan.channel = c->ic_freq; 857 hchan.channelFlags = ath_chan2flags(ic, c); 858 859 ath_hal_intrset(ah, 0); /* disable interrupts */ 860 ath_draintxq(sc); /* stop xmit side */ 861 ath_stoprecv(sc); /* stop recv side */ 862 /* NB: indicate channel change so we do a full reset */ 863 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 864 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 865 __func__, status); 866 ath_hal_intrset(ah, sc->sc_imask); 867 if (ath_startrecv(sc) != 0) /* restart recv */ 868 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 869 ath_start(ifp); /* restart xmit */ 870 if (ic->ic_state == IEEE80211_S_RUN) 871 ath_beacon_config(sc); /* restart beacons */ 872 } 873 874 static void 875 ath_start(struct ifnet *ifp) 876 { 877 struct ath_softc *sc = ifp->if_softc; 878 struct ath_hal *ah = sc->sc_ah; 879 struct ieee80211com *ic = &sc->sc_ic; 880 struct ieee80211_node *ni; 881 struct ath_buf *bf; 882 struct mbuf *m; 883 struct ieee80211_frame *wh; 884 ath_txbuf_critsect_decl(s); 885 886 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 887 return; 888 for (;;) { 889 /* 890 * Grab a TX buffer and associated resources. 891 */ 892 ath_txbuf_critsect_begin(sc, s); 893 bf = TAILQ_FIRST(&sc->sc_txbuf); 894 if (bf != NULL) 895 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 896 ath_txbuf_critsect_end(sc, s); 897 if (bf == NULL) { 898 DPRINTF(("ath_start: out of xmit buffers\n")); 899 sc->sc_stats.ast_tx_qstop++; 900 ifp->if_flags |= IFF_OACTIVE; 901 break; 902 } 903 /* 904 * Poll the management queue for frames; they 905 * have priority over normal data frames. 906 */ 907 IF_DEQUEUE(&ic->ic_mgtq, m); 908 if (m == NULL) { 909 /* 910 * No data frames go out unless we're associated. 911 */ 912 if (ic->ic_state != IEEE80211_S_RUN) { 913 DPRINTF(("ath_start: ignore data packet, " 914 "state %u\n", ic->ic_state)); 915 sc->sc_stats.ast_tx_discard++; 916 ath_txbuf_critsect_begin(sc, s); 917 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 918 ath_txbuf_critsect_end(sc, s); 919 break; 920 } 921 IF_DEQUEUE(&ifp->if_snd, m); 922 if (m == NULL) { 923 ath_txbuf_critsect_begin(sc, s); 924 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 925 ath_txbuf_critsect_end(sc, s); 926 break; 927 } 928 ifp->if_opackets++; 929 930 #ifdef __NetBSD__ 931 #if NBPFILTER > 0 932 if (ifp->if_bpf) 933 bpf_mtap(ifp->if_bpf, m); 934 #endif 935 #endif 936 #ifdef __FreeBSD__ 937 BPF_MTAP(ifp, m); 938 #endif 939 /* 940 * Encapsulate the packet in prep for transmission. 941 */ 942 m = ieee80211_encap(ifp, m, &ni); 943 if (m == NULL) { 944 DPRINTF(("ath_start: encapsulation failure\n")); 945 sc->sc_stats.ast_tx_encap++; 946 goto bad; 947 } 948 wh = mtod(m, struct ieee80211_frame *); 949 if (ic->ic_flags & IEEE80211_F_WEPON) 950 wh->i_fc[1] |= IEEE80211_FC1_WEP; 951 } else { 952 /* 953 * Hack! The referenced node pointer is in the 954 * rcvif field of the packet header. This is 955 * placed there by ieee80211_mgmt_output because 956 * we need to hold the reference with the frame 957 * and there's no other way (other than packet 958 * tags which we consider too expensive to use) 959 * to pass it along. 960 */ 961 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 962 m->m_pkthdr.rcvif = NULL; 963 964 wh = mtod(m, struct ieee80211_frame *); 965 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 966 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 967 /* fill time stamp */ 968 u_int64_t tsf; 969 u_int32_t *tstamp; 970 971 tsf = ath_hal_gettsf64(ah); 972 /* XXX: adjust 100us delay to xmit */ 973 tsf += 100; 974 tstamp = (u_int32_t *)&wh[1]; 975 tstamp[0] = htole32(tsf & 0xffffffff); 976 tstamp[1] = htole32(tsf >> 32); 977 } 978 sc->sc_stats.ast_tx_mgmt++; 979 } 980 #if NBPFILTER > 0 981 if (ic->ic_rawbpf) 982 bpf_mtap(ic->ic_rawbpf, m); 983 #endif 984 985 #if NBPFILTER > 0 986 if (sc->sc_drvbpf) { 987 #ifdef __FreeBSD__ 988 struct mbuf *mb; 989 990 MGETHDR(mb, M_DONTWAIT, m->m_type); 991 if (mb != NULL) { 992 sc->sc_tx_th.wt_rate = 993 ni->ni_rates.rs_rates[ni->ni_txrate]; 994 995 mb->m_next = m; 996 mb->m_data = (caddr_t)&sc->sc_tx_th; 997 mb->m_len = sizeof(sc->sc_tx_th); 998 mb->m_pkthdr.len += mb->m_len; 999 bpf_mtap(sc->sc_drvbpf, mb); 1000 m_free(mb); 1001 } 1002 #else 1003 struct mbuf mb; 1004 1005 M_COPY_PKTHDR(&mb, m); 1006 sc->sc_tx_th.wt_rate = 1007 ni->ni_rates.rs_rates[ni->ni_txrate]; 1008 1009 mb.m_next = m; 1010 mb.m_data = (caddr_t)&sc->sc_tx_th; 1011 mb.m_len = sizeof(sc->sc_tx_th); 1012 mb.m_pkthdr.len += mb.m_len; 1013 bpf_mtap(sc->sc_drvbpf, &mb); 1014 #endif 1015 } 1016 #endif 1017 1018 /* 1019 * TODO: 1020 * The duration field of 802.11 header should be filled. 1021 * XXX This may be done in the ieee80211 layer, but the upper 1022 * doesn't know the detail of parameters such as IFS 1023 * for now.. 1024 */ 1025 if (ath_tx_start(sc, ni, bf, m)) { 1026 bad: 1027 ath_txbuf_critsect_begin(sc, s); 1028 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1029 ath_txbuf_critsect_end(sc, s); 1030 ifp->if_oerrors++; 1031 if (ni && ni != ic->ic_bss) 1032 ieee80211_free_node(ic, ni); 1033 continue; 1034 } 1035 1036 sc->sc_tx_timer = 5; 1037 ifp->if_timer = 1; 1038 } 1039 } 1040 1041 static int 1042 ath_media_change(struct ifnet *ifp) 1043 { 1044 int error; 1045 1046 error = ieee80211_media_change(ifp); 1047 if (error == ENETRESET) { 1048 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1049 (IFF_RUNNING|IFF_UP)) 1050 ath_init(ifp); /* XXX lose error */ 1051 error = 0; 1052 } 1053 return error; 1054 } 1055 1056 static void 1057 ath_watchdog(struct ifnet *ifp) 1058 { 1059 struct ath_softc *sc = ifp->if_softc; 1060 struct ieee80211com *ic = &sc->sc_ic; 1061 1062 ifp->if_timer = 0; 1063 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1064 return; 1065 if (sc->sc_tx_timer) { 1066 if (--sc->sc_tx_timer == 0) { 1067 if_printf(ifp, "device timeout\n"); 1068 #ifdef AR_DEBUG 1069 if (ath_debug) 1070 ath_hal_dumpstate(sc->sc_ah); 1071 #endif /* AR_DEBUG */ 1072 ath_init(ifp); /* XXX ath_reset??? */ 1073 ifp->if_oerrors++; 1074 sc->sc_stats.ast_watchdog++; 1075 return; 1076 } 1077 ifp->if_timer = 1; 1078 } 1079 if (ic->ic_fixed_rate == -1) { 1080 /* 1081 * Run the rate control algorithm if we're not 1082 * locked at a fixed rate. 1083 */ 1084 if (ic->ic_opmode == IEEE80211_M_STA) 1085 ath_rate_ctl(sc, ic->ic_bss); 1086 else 1087 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1088 } 1089 ieee80211_watchdog(ifp); 1090 } 1091 1092 static int 1093 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1094 { 1095 struct ath_softc *sc = ifp->if_softc; 1096 struct ifreq *ifr = (struct ifreq *)data; 1097 int error = 0; 1098 ath_softc_critsect_decl(s); 1099 1100 ath_softc_critsect_begin(sc, s); 1101 switch (cmd) { 1102 case SIOCSIFFLAGS: 1103 if (ifp->if_flags & IFF_UP) { 1104 if (ifp->if_flags & IFF_RUNNING) { 1105 /* 1106 * To avoid rescanning another access point, 1107 * do not call ath_init() here. Instead, 1108 * only reflect promisc mode settings. 1109 */ 1110 ath_mode_init(sc); 1111 } else 1112 ath_init(ifp); /* XXX lose error */ 1113 } else 1114 ath_stop(ifp); 1115 break; 1116 case SIOCADDMULTI: 1117 case SIOCDELMULTI: 1118 /* 1119 * The upper layer has already installed/removed 1120 * the multicast address(es), just recalculate the 1121 * multicast filter for the card. 1122 */ 1123 if (ifp->if_flags & IFF_RUNNING) 1124 ath_mode_init(sc); 1125 break; 1126 case SIOCGATHSTATS: 1127 copyout(&sc->sc_stats, ifr->ifr_data, sizeof (sc->sc_stats)); 1128 break; 1129 default: 1130 error = ieee80211_ioctl(ifp, cmd, data); 1131 if (error == ENETRESET) { 1132 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1133 (IFF_RUNNING|IFF_UP)) 1134 ath_init(ifp); /* XXX lose error */ 1135 error = 0; 1136 } 1137 break; 1138 } 1139 ath_softc_critsect_end(sc, s); 1140 return error; 1141 } 1142 1143 /* 1144 * Fill the hardware key cache with key entries. 1145 */ 1146 static void 1147 ath_initkeytable(struct ath_softc *sc) 1148 { 1149 struct ieee80211com *ic = &sc->sc_ic; 1150 struct ath_hal *ah = sc->sc_ah; 1151 int i; 1152 1153 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1154 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1155 if (k->wk_len == 0) 1156 ath_hal_keyreset(ah, i); 1157 else 1158 /* XXX return value */ 1159 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 1160 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 1161 } 1162 } 1163 1164 static void 1165 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1166 { 1167 u_int32_t val; 1168 u_int8_t pos; 1169 1170 val = LE_READ_4(dl + 0); 1171 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1172 val = LE_READ_4(dl + 3); 1173 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1174 pos &= 0x3f; 1175 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1176 } 1177 1178 #ifdef __FreeBSD__ 1179 static void 1180 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1181 { 1182 struct ieee80211com *ic = &sc->sc_ic; 1183 struct ifnet *ifp = &ic->ic_if; 1184 struct ifmultiaddr *ifma; 1185 1186 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1187 caddr_t dl; 1188 1189 /* calculate XOR of eight 6bit values */ 1190 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1191 ath_mcastfilter_accum(dl, &mfilt); 1192 } 1193 } 1194 #else 1195 static void 1196 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1197 { 1198 struct ether_multi *enm; 1199 struct ether_multistep estep; 1200 1201 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1202 while (enm != NULL) { 1203 /* XXX Punt on ranges. */ 1204 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1205 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1206 break; 1207 } 1208 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1209 ETHER_NEXT_MULTI(estep, enm); 1210 } 1211 } 1212 #endif 1213 1214 static void 1215 ath_mode_init(struct ath_softc *sc) 1216 { 1217 struct ieee80211com *ic = &sc->sc_ic; 1218 struct ath_hal *ah = sc->sc_ah; 1219 struct ifnet *ifp = &ic->ic_if; 1220 u_int32_t rfilt, mfilt[2]; 1221 1222 /* configure operational mode */ 1223 ath_hal_setopmode(ah, ic->ic_opmode); 1224 1225 /* receive filter */ 1226 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1227 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1228 if (ic->ic_opmode != IEEE80211_M_STA) 1229 rfilt |= HAL_RX_FILTER_PROBEREQ; 1230 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 1231 (ifp->if_flags & IFF_PROMISC)) 1232 rfilt |= HAL_RX_FILTER_PROM; 1233 if (ic->ic_state == IEEE80211_S_SCAN) 1234 rfilt |= HAL_RX_FILTER_BEACON; 1235 ath_hal_setrxfilter(ah, rfilt); 1236 1237 /* calculate and install multicast filter */ 1238 if ((ifp->if_flags & IFF_ALLMULTI) == 0) { 1239 mfilt[0] = mfilt[1] = 0; 1240 ath_mcastfilter_compute(sc, &mfilt); 1241 } else { 1242 mfilt[0] = mfilt[1] = ~0; 1243 } 1244 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1245 DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n", 1246 rfilt, mfilt[0], mfilt[1])); 1247 } 1248 1249 #ifdef __FreeBSD__ 1250 static void 1251 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1252 { 1253 struct ath_buf *bf = arg; 1254 1255 KASSERT(nseg <= ATH_MAX_SCATTER, 1256 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1257 bf->bf_mapsize = mapsize; 1258 bf->bf_nseg = nseg; 1259 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1260 } 1261 #endif /* __FreeBSD__ */ 1262 1263 static struct mbuf * 1264 ath_getmbuf(int flags, int type, u_int pktlen) 1265 { 1266 struct mbuf *m; 1267 1268 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1269 #ifdef __FreeBSD__ 1270 if (pktlen <= MHLEN) 1271 MGETHDR(m, flags, type); 1272 else 1273 m = m_getcl(flags, type, M_PKTHDR); 1274 #else 1275 MGETHDR(m, flags, type); 1276 if (m != NULL && pktlen > MHLEN) 1277 MCLGET(m, flags); 1278 #endif 1279 return m; 1280 } 1281 1282 static int 1283 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1284 { 1285 struct ieee80211com *ic = &sc->sc_ic; 1286 struct ifnet *ifp = &ic->ic_if; 1287 struct ath_hal *ah = sc->sc_ah; 1288 struct ieee80211_frame *wh; 1289 struct ath_buf *bf; 1290 struct ath_desc *ds; 1291 struct mbuf *m; 1292 int error, pktlen; 1293 u_int8_t *frm, rate; 1294 u_int16_t capinfo; 1295 struct ieee80211_rateset *rs; 1296 const HAL_RATE_TABLE *rt; 1297 1298 bf = sc->sc_bcbuf; 1299 if (bf->bf_m != NULL) { 1300 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1301 m_freem(bf->bf_m); 1302 bf->bf_m = NULL; 1303 bf->bf_node = NULL; 1304 } 1305 /* 1306 * NB: the beacon data buffer must be 32-bit aligned; 1307 * we assume the mbuf routines will return us something 1308 * with this alignment (perhaps should assert). 1309 */ 1310 rs = &ni->ni_rates; 1311 pktlen = sizeof (struct ieee80211_frame) 1312 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 6; 1313 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1314 pktlen += 2; 1315 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1316 if (m == NULL) { 1317 DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n", 1318 pktlen)); 1319 sc->sc_stats.ast_be_nombuf++; 1320 return ENOMEM; 1321 } 1322 1323 wh = mtod(m, struct ieee80211_frame *); 1324 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1325 IEEE80211_FC0_SUBTYPE_BEACON; 1326 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1327 *(u_int16_t *)wh->i_dur = 0; 1328 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1329 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1330 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1331 *(u_int16_t *)wh->i_seq = 0; 1332 1333 /* 1334 * beacon frame format 1335 * [8] time stamp 1336 * [2] beacon interval 1337 * [2] cabability information 1338 * [tlv] ssid 1339 * [tlv] supported rates 1340 * [tlv] parameter set (IBSS) 1341 * [tlv] extended supported rates 1342 */ 1343 frm = (u_int8_t *)&wh[1]; 1344 memset(frm, 0, 8); /* timestamp is set by hardware */ 1345 frm += 8; 1346 *(u_int16_t *)frm = htole16(ni->ni_intval); 1347 frm += 2; 1348 if (ic->ic_opmode == IEEE80211_M_IBSS) 1349 capinfo = IEEE80211_CAPINFO_IBSS; 1350 else 1351 capinfo = IEEE80211_CAPINFO_ESS; 1352 if (ic->ic_flags & IEEE80211_F_WEPON) 1353 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1354 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1355 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1356 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1357 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1358 *(u_int16_t *)frm = htole16(capinfo); 1359 frm += 2; 1360 *frm++ = IEEE80211_ELEMID_SSID; 1361 *frm++ = ni->ni_esslen; 1362 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1363 frm += ni->ni_esslen; 1364 frm = ieee80211_add_rates(frm, rs); 1365 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1366 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1367 *frm++ = 2; 1368 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1369 } else { 1370 /* TODO: TIM */ 1371 *frm++ = IEEE80211_ELEMID_TIM; 1372 *frm++ = 4; /* length */ 1373 *frm++ = 0; /* DTIM count */ 1374 *frm++ = 1; /* DTIM period */ 1375 *frm++ = 0; /* bitmap control */ 1376 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1377 } 1378 frm = ieee80211_add_xrates(frm, rs); 1379 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1380 KASSERT(m->m_pkthdr.len <= pktlen, 1381 ("beacon bigger than expected, len %u calculated %u", 1382 m->m_pkthdr.len, pktlen)); 1383 1384 DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len)); 1385 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1386 if (error != 0) { 1387 m_freem(m); 1388 return error; 1389 } 1390 KASSERT(bf->bf_nseg == 1, 1391 ("ath_beacon_alloc: multi-segment packet; nseg %u", 1392 bf->bf_nseg)); 1393 bf->bf_m = m; 1394 1395 /* setup descriptors */ 1396 ds = bf->bf_desc; 1397 1398 ds->ds_link = 0; 1399 ds->ds_data = bf->bf_segs[0].ds_addr; 1400 1401 DPRINTF2(("%s: segaddr %p seglen %u\n", __func__, 1402 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1403 1404 /* 1405 * Calculate rate code. 1406 * XXX everything at min xmit rate 1407 */ 1408 rt = sc->sc_currates; 1409 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1410 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1411 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1412 else 1413 rate = rt->info[0].rateCode; 1414 if (!ath_hal_setuptxdesc(ah, ds 1415 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1416 , sizeof(struct ieee80211_frame) /* header length */ 1417 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1418 , 0x20 /* txpower XXX */ 1419 , rate, 1 /* series 0 rate/tries */ 1420 , HAL_TXKEYIX_INVALID /* no encryption */ 1421 , 0 /* antenna mode */ 1422 , HAL_TXDESC_NOACK /* no ack for beacons */ 1423 , 0 /* rts/cts rate */ 1424 , 0 /* rts/cts duration */ 1425 )) { 1426 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1427 return -1; 1428 } 1429 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1430 /* XXX verify mbuf data area covers this roundup */ 1431 if (!ath_hal_filltxdesc(ah, ds 1432 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1433 , AH_TRUE /* first segment */ 1434 , AH_TRUE /* last segment */ 1435 )) { 1436 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1437 return -1; 1438 } 1439 1440 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1441 1442 return 0; 1443 } 1444 1445 static void 1446 ath_beacon_proc(void *arg, int pending) 1447 { 1448 struct ath_softc *sc = arg; 1449 struct ieee80211com *ic = &sc->sc_ic; 1450 struct ath_buf *bf = sc->sc_bcbuf; 1451 struct ath_hal *ah = sc->sc_ah; 1452 1453 DPRINTF2(("%s: pending %u\n", __func__, pending)); 1454 if (ic->ic_opmode == IEEE80211_M_STA || 1455 bf == NULL || bf->bf_m == NULL) { 1456 DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n", 1457 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1458 return; 1459 } 1460 /* TODO: update beacon to reflect PS poll state */ 1461 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1462 DPRINTF(("%s: beacon queue %u did not stop?", 1463 __func__, sc->sc_bhalq)); 1464 return; /* busy, XXX is this right? */ 1465 } 1466 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1467 1468 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1469 ath_hal_txstart(ah, sc->sc_bhalq); 1470 DPRINTF2(("%s: BCDP%u = %p (%p)\n", __func__, 1471 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1472 } 1473 1474 static void 1475 ath_beacon_free(struct ath_softc *sc) 1476 { 1477 struct ath_buf *bf = sc->sc_bcbuf; 1478 1479 if (bf->bf_m != NULL) { 1480 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1481 m_freem(bf->bf_m); 1482 bf->bf_m = NULL; 1483 bf->bf_node = NULL; 1484 } 1485 } 1486 1487 /* 1488 * Configure the beacon and sleep timers. 1489 * 1490 * When operating as an AP this resets the TSF and sets 1491 * up the hardware to notify us when we need to issue beacons. 1492 * 1493 * When operating in station mode this sets up the beacon 1494 * timers according to the timestamp of the last received 1495 * beacon and the current TSF, configures PCF and DTIM 1496 * handling, programs the sleep registers so the hardware 1497 * will wakeup in time to receive beacons, and configures 1498 * the beacon miss handling so we'll receive a BMISS 1499 * interrupt when we stop seeing beacons from the AP 1500 * we've associated with. 1501 */ 1502 static void 1503 ath_beacon_config(struct ath_softc *sc) 1504 { 1505 struct ath_hal *ah = sc->sc_ah; 1506 struct ieee80211com *ic = &sc->sc_ic; 1507 struct ieee80211_node *ni = ic->ic_bss; 1508 u_int32_t nexttbtt; 1509 1510 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1511 (LE_READ_4(ni->ni_tstamp) >> 10); 1512 DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1513 nexttbtt += ni->ni_intval; 1514 if (ic->ic_opmode == IEEE80211_M_STA) { 1515 HAL_BEACON_STATE bs; 1516 u_int32_t bmisstime; 1517 1518 /* NB: no PCF support right now */ 1519 memset(&bs, 0, sizeof(bs)); 1520 bs.bs_intval = ni->ni_intval; 1521 bs.bs_nexttbtt = nexttbtt; 1522 bs.bs_dtimperiod = bs.bs_intval; 1523 bs.bs_nextdtim = nexttbtt; 1524 /* 1525 * Calculate the number of consecutive beacons to miss 1526 * before taking a BMISS interrupt. The configuration 1527 * is specified in ms, so we need to convert that to 1528 * TU's and then calculate based on the beacon interval. 1529 * Note that we clamp the result to at most 10 beacons. 1530 */ 1531 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1532 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1533 if (bs.bs_bmissthreshold > 10) 1534 bs.bs_bmissthreshold = 10; 1535 else if (bs.bs_bmissthreshold <= 0) 1536 bs.bs_bmissthreshold = 1; 1537 1538 /* 1539 * Calculate sleep duration. The configuration is 1540 * given in ms. We insure a multiple of the beacon 1541 * period is used. Also, if the sleep duration is 1542 * greater than the DTIM period then it makes senses 1543 * to make it a multiple of that. 1544 * 1545 * XXX fixed at 100ms 1546 */ 1547 bs.bs_sleepduration = 1548 roundup((100 * 1000) / 1024, bs.bs_intval); 1549 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1550 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1551 1552 DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1553 , __func__ 1554 , bs.bs_intval 1555 , bs.bs_nexttbtt 1556 , bs.bs_dtimperiod 1557 , bs.bs_nextdtim 1558 , bs.bs_bmissthreshold 1559 , bs.bs_sleepduration 1560 )); 1561 ath_hal_intrset(ah, 0); 1562 /* 1563 * Reset our tsf so the hardware will update the 1564 * tsf register to reflect timestamps found in 1565 * received beacons. 1566 */ 1567 ath_hal_resettsf(ah); 1568 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1569 sc->sc_imask |= HAL_INT_BMISS; 1570 ath_hal_intrset(ah, sc->sc_imask); 1571 } else { 1572 DPRINTF(("%s: intval %u nexttbtt %u\n", 1573 __func__, ni->ni_intval, nexttbtt)); 1574 ath_hal_intrset(ah, 0); 1575 ath_hal_beaconinit(ah, ic->ic_opmode, 1576 nexttbtt, ni->ni_intval); 1577 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1578 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1579 ath_hal_intrset(ah, sc->sc_imask); 1580 } 1581 } 1582 1583 #ifdef __FreeBSD__ 1584 static void 1585 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1586 { 1587 bus_addr_t *paddr = (bus_addr_t*) arg; 1588 *paddr = segs->ds_addr; 1589 } 1590 #endif 1591 1592 #ifdef __FreeBSD__ 1593 static int 1594 ath_desc_alloc(struct ath_softc *sc) 1595 { 1596 int i, bsize, error; 1597 struct ath_desc *ds; 1598 struct ath_buf *bf; 1599 1600 /* allocate descriptors */ 1601 sc->sc_desc_len = sizeof(struct ath_desc) * 1602 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1603 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1604 if (error != 0) 1605 return error; 1606 1607 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1608 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1609 1610 if (error != 0) 1611 goto fail0; 1612 1613 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1614 sc->sc_desc, sc->sc_desc_len, 1615 ath_load_cb, &sc->sc_desc_paddr, 1616 BUS_DMA_NOWAIT); 1617 if (error != 0) 1618 goto fail1; 1619 1620 ds = sc->sc_desc; 1621 DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n", 1622 ds, sc->sc_desc_len, 1623 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1624 1625 /* allocate buffers */ 1626 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1627 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1628 if (bf == NULL) { 1629 printf("%s: unable to allocate Tx/Rx buffers\n", 1630 sc->sc_dev.dv_xname); 1631 error = -1; 1632 goto fail2; 1633 } 1634 sc->sc_bufptr = bf; 1635 1636 TAILQ_INIT(&sc->sc_rxbuf); 1637 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1638 bf->bf_desc = ds; 1639 bf->bf_daddr = sc->sc_desc_paddr + 1640 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1641 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1642 &bf->bf_dmamap); 1643 if (error != 0) 1644 break; 1645 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1646 } 1647 1648 TAILQ_INIT(&sc->sc_txbuf); 1649 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1650 bf->bf_desc = ds; 1651 bf->bf_daddr = sc->sc_desc_paddr + 1652 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1653 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1654 &bf->bf_dmamap); 1655 if (error != 0) 1656 break; 1657 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1658 } 1659 TAILQ_INIT(&sc->sc_txq); 1660 1661 /* beacon buffer */ 1662 bf->bf_desc = ds; 1663 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1664 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1665 if (error != 0) 1666 return error; 1667 sc->sc_bcbuf = bf; 1668 return 0; 1669 1670 fail2: 1671 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1672 fail1: 1673 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1674 fail0: 1675 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1676 sc->sc_ddmamap = NULL; 1677 return error; 1678 } 1679 #else 1680 static int 1681 ath_desc_alloc(struct ath_softc *sc) 1682 { 1683 int i, bsize, error = -1; 1684 struct ath_desc *ds; 1685 struct ath_buf *bf; 1686 1687 /* allocate descriptors */ 1688 sc->sc_desc_len = sizeof(struct ath_desc) * 1689 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1690 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1691 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1692 printf("%s: unable to allocate control data, error = %d\n", 1693 sc->sc_dev.dv_xname, error); 1694 goto fail0; 1695 } 1696 1697 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1698 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1699 printf("%s: unable to map control data, error = %d\n", 1700 sc->sc_dev.dv_xname, error); 1701 goto fail1; 1702 } 1703 1704 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1705 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 1706 printf("%s: unable to create control data DMA map, " 1707 "error = %d\n", sc->sc_dev.dv_xname, error); 1708 goto fail2; 1709 } 1710 1711 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 1712 sc->sc_desc_len, NULL, 0)) != 0) { 1713 printf("%s: unable to load control data DMA map, error = %d\n", 1714 sc->sc_dev.dv_xname, error); 1715 goto fail3; 1716 } 1717 1718 ds = sc->sc_desc; 1719 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 1720 1721 DPRINTF(("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 1722 ds, (u_long)sc->sc_desc_len, 1723 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1724 1725 /* allocate buffers */ 1726 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1727 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1728 if (bf == NULL) { 1729 printf("%s: unable to allocate Tx/Rx buffers\n", 1730 sc->sc_dev.dv_xname); 1731 error = ENOMEM; 1732 goto fail3; 1733 } 1734 sc->sc_bufptr = bf; 1735 1736 TAILQ_INIT(&sc->sc_rxbuf); 1737 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1738 bf->bf_desc = ds; 1739 bf->bf_daddr = sc->sc_desc_paddr + 1740 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1741 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 1742 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1743 printf("%s: unable to create Rx dmamap, error = %d\n", 1744 sc->sc_dev.dv_xname, error); 1745 goto fail4; 1746 } 1747 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1748 } 1749 1750 TAILQ_INIT(&sc->sc_txbuf); 1751 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1752 bf->bf_desc = ds; 1753 bf->bf_daddr = sc->sc_desc_paddr + 1754 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1755 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1756 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1757 printf("%s: unable to create Tx dmamap, error = %d\n", 1758 sc->sc_dev.dv_xname, error); 1759 goto fail5; 1760 } 1761 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1762 } 1763 TAILQ_INIT(&sc->sc_txq); 1764 1765 /* beacon buffer */ 1766 bf->bf_desc = ds; 1767 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1768 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 1769 &bf->bf_dmamap)) != 0) { 1770 printf("%s: unable to create beacon dmamap, error = %d\n", 1771 sc->sc_dev.dv_xname, error); 1772 goto fail5; 1773 } 1774 sc->sc_bcbuf = bf; 1775 return 0; 1776 1777 fail5: 1778 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 1779 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1780 continue; 1781 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1782 } 1783 fail4: 1784 for (i = 0; i < ATH_RXBUF; i++) { 1785 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1786 continue; 1787 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1788 } 1789 fail3: 1790 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1791 fail2: 1792 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1793 sc->sc_ddmamap = NULL; 1794 fail1: 1795 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 1796 fail0: 1797 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1798 return error; 1799 } 1800 #endif 1801 1802 static void 1803 ath_desc_free(struct ath_softc *sc) 1804 { 1805 struct ath_buf *bf; 1806 1807 #ifdef __FreeBSD__ 1808 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1809 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1810 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1811 #else 1812 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1813 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1814 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1815 #endif 1816 1817 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1818 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1819 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1820 m_freem(bf->bf_m); 1821 } 1822 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 1823 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1824 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 1825 if (bf->bf_m) { 1826 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1827 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1828 m_freem(bf->bf_m); 1829 bf->bf_m = NULL; 1830 } 1831 } 1832 if (sc->sc_bcbuf != NULL) { 1833 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1834 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1835 sc->sc_bcbuf = NULL; 1836 } 1837 1838 TAILQ_INIT(&sc->sc_rxbuf); 1839 TAILQ_INIT(&sc->sc_txbuf); 1840 TAILQ_INIT(&sc->sc_txq); 1841 free(sc->sc_bufptr, M_DEVBUF); 1842 sc->sc_bufptr = NULL; 1843 } 1844 1845 static struct ieee80211_node * 1846 ath_node_alloc(struct ieee80211com *ic) 1847 { 1848 struct ath_node *an = 1849 malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1850 return an ? &an->an_node : NULL; 1851 } 1852 1853 static void 1854 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 1855 { 1856 struct ath_softc *sc = ic->ic_if.if_softc; 1857 struct ath_buf *bf; 1858 1859 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1860 if (bf->bf_node == ni) 1861 bf->bf_node = NULL; 1862 } 1863 free(ni, M_DEVBUF); 1864 } 1865 1866 static void 1867 ath_node_copy(struct ieee80211com *ic, 1868 struct ieee80211_node *dst, const struct ieee80211_node *src) 1869 { 1870 *(struct ath_node *)dst = *(const struct ath_node *)src; 1871 } 1872 1873 static int 1874 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 1875 { 1876 struct ath_hal *ah = sc->sc_ah; 1877 int error; 1878 struct mbuf *m; 1879 struct ath_desc *ds; 1880 1881 m = bf->bf_m; 1882 if (m == NULL) { 1883 /* 1884 * NB: by assigning a page to the rx dma buffer we 1885 * implicitly satisfy the Atheros requirement that 1886 * this buffer be cache-line-aligned and sized to be 1887 * multiple of the cache line size. Not doing this 1888 * causes weird stuff to happen (for the 5210 at least). 1889 */ 1890 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 1891 if (m == NULL) { 1892 DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n")); 1893 sc->sc_stats.ast_rx_nombuf++; 1894 return ENOMEM; 1895 } 1896 bf->bf_m = m; 1897 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 1898 1899 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 1900 BUS_DMA_NOWAIT); 1901 if (error != 0) { 1902 DPRINTF(("ath_rxbuf_init: ath_buf_dmamap_load_mbuf failed;" 1903 " error %d\n", error)); 1904 sc->sc_stats.ast_rx_busdma++; 1905 return error; 1906 } 1907 KASSERT(bf->bf_nseg == 1, 1908 ("ath_rxbuf_init: multi-segment packet; nseg %u", 1909 bf->bf_nseg)); 1910 } 1911 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 1912 1913 /* setup descriptors */ 1914 ds = bf->bf_desc; 1915 ds->ds_link = 0; 1916 ds->ds_data = bf->bf_segs[0].ds_addr; 1917 ath_hal_setuprxdesc(ah, ds 1918 , m->m_len /* buffer size */ 1919 , 0 1920 ); 1921 1922 if (sc->sc_rxlink != NULL) 1923 *sc->sc_rxlink = bf->bf_daddr; 1924 sc->sc_rxlink = &ds->ds_link; 1925 return 0; 1926 } 1927 1928 static void 1929 ath_rx_proc(void *arg, int npending) 1930 { 1931 struct ath_softc *sc = arg; 1932 struct ath_buf *bf; 1933 struct ieee80211com *ic = &sc->sc_ic; 1934 struct ifnet *ifp = &ic->ic_if; 1935 struct ath_hal *ah = sc->sc_ah; 1936 struct ath_desc *ds; 1937 struct mbuf *m; 1938 struct ieee80211_frame *wh, whbuf; 1939 struct ieee80211_node *ni; 1940 int len; 1941 u_int phyerr; 1942 HAL_STATUS status; 1943 1944 DPRINTF2(("ath_rx_proc: pending %u\n", npending)); 1945 do { 1946 bf = TAILQ_FIRST(&sc->sc_rxbuf); 1947 if (bf == NULL) { /* NB: shouldn't happen */ 1948 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 1949 break; 1950 } 1951 m = bf->bf_m; 1952 if (m == NULL) { /* NB: shouldn't happen */ 1953 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 1954 continue; 1955 } 1956 ds = bf->bf_desc; 1957 status = ath_hal_rxprocdesc(ah, ds); 1958 #ifdef AR_DEBUG 1959 if (ath_debug > 1) 1960 ath_printrxbuf(bf, status == HAL_OK); 1961 #endif 1962 if (status == HAL_EINPROGRESS) 1963 break; 1964 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 1965 if (ds->ds_rxstat.rs_status != 0) { 1966 ifp->if_ierrors++; 1967 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 1968 sc->sc_stats.ast_rx_crcerr++; 1969 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 1970 sc->sc_stats.ast_rx_fifoerr++; 1971 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 1972 sc->sc_stats.ast_rx_badcrypt++; 1973 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 1974 sc->sc_stats.ast_rx_phyerr++; 1975 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 1976 sc->sc_stats.ast_rx_phy[phyerr]++; 1977 } 1978 goto rx_next; 1979 } 1980 1981 len = ds->ds_rxstat.rs_datalen; 1982 if (len < sizeof(struct ieee80211_frame)) { 1983 DPRINTF(("ath_rx_proc: short packet %d\n", len)); 1984 sc->sc_stats.ast_rx_tooshort++; 1985 goto rx_next; 1986 } 1987 1988 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 1989 1990 wh = mtod(m, struct ieee80211_frame *); 1991 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1992 IEEE80211_FC0_TYPE_CTL && 1993 ic->ic_opmode != IEEE80211_M_MONITOR) { 1994 /* 1995 * Discard control frame when not in monitor mode. 1996 */ 1997 DPRINTF(("ath_rx_proc: control frame\n")); 1998 sc->sc_stats.ast_rx_ctl++; 1999 goto rx_next; 2000 } 2001 2002 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2003 bf->bf_m = NULL; 2004 m->m_pkthdr.rcvif = ifp; 2005 m->m_pkthdr.len = m->m_len = len; 2006 2007 #if NBPFILTER > 0 2008 if (sc->sc_drvbpf) { 2009 #ifdef __FreeBSD__ 2010 struct mbuf *mb; 2011 2012 /* XXX pre-allocate space when setting up recv's */ 2013 MGETHDR(mb, M_DONTWAIT, m->m_type); 2014 if (mb != NULL) { 2015 sc->sc_rx_th.wr_rate = 2016 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2017 sc->sc_rx_th.wr_antsignal = 2018 ds->ds_rxstat.rs_rssi; 2019 sc->sc_rx_th.wr_antenna = 2020 ds->ds_rxstat.rs_antenna; 2021 /* XXX TSF */ 2022 2023 (void) m_dup_pkthdr(mb, m, M_DONTWAIT); 2024 mb->m_next = m; 2025 mb->m_data = (caddr_t)&sc->sc_rx_th; 2026 mb->m_len = sizeof(sc->sc_rx_th); 2027 mb->m_pkthdr.len += mb->m_len; 2028 bpf_mtap(sc->sc_drvbpf, mb); 2029 m_free(mb); 2030 } 2031 #else 2032 /* XXX pre-allocate space when setting up recv's */ 2033 struct mbuf mb; 2034 2035 sc->sc_rx_th.wr_rate = 2036 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2037 sc->sc_rx_th.wr_antsignal = 2038 ds->ds_rxstat.rs_rssi; 2039 sc->sc_rx_th.wr_antenna = 2040 ds->ds_rxstat.rs_antenna; 2041 /* XXX TSF */ 2042 2043 M_COPY_PKTHDR(&mb, m); 2044 mb.m_next = m; 2045 mb.m_data = (caddr_t)&sc->sc_rx_th; 2046 mb.m_len = sizeof(sc->sc_rx_th); 2047 mb.m_pkthdr.len += mb.m_len; 2048 bpf_mtap(sc->sc_drvbpf, &mb); 2049 #endif 2050 } 2051 #endif 2052 2053 m_adj(m, -IEEE80211_CRC_LEN); 2054 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2055 /* 2056 * WEP is decrypted by hardware. Clear WEP bit 2057 * and trim WEP header for ieee80211_input(). 2058 */ 2059 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2060 memcpy(&whbuf, wh, sizeof(whbuf)); 2061 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2062 memcpy(mtod(m, caddr_t), &whbuf, sizeof(whbuf)); 2063 /* 2064 * Also trim WEP ICV from the tail. 2065 */ 2066 m_adj(m, -IEEE80211_WEP_CRCLEN); 2067 } 2068 2069 /* 2070 * Locate the node for sender, track state, and 2071 * then pass this node (referenced) up to the 802.11 2072 * layer for its use. We are required to pass 2073 * something so we fall back to ic_bss when this frame 2074 * is from an unknown sender. 2075 */ 2076 if (ic->ic_opmode != IEEE80211_M_STA) { 2077 ni = ieee80211_find_node(ic, wh->i_addr2); 2078 if (ni == NULL) 2079 ni = ieee80211_ref_node(ic->ic_bss); 2080 } else 2081 ni = ieee80211_ref_node(ic->ic_bss); 2082 ATH_NODE(ni)->an_rx_antenna = ds->ds_rxstat.rs_antenna; 2083 /* 2084 * Send frame up for processing. 2085 */ 2086 ieee80211_input(ifp, m, ni, 2087 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2088 /* 2089 * The frame may have caused the node to be marked for 2090 * reclamation (e.g. in response to a DEAUTH message) 2091 * so use free_node here instead of unref_node. 2092 */ 2093 if (ni == ic->ic_bss) 2094 ieee80211_unref_node(&ni); 2095 else 2096 ieee80211_free_node(ic, ni); 2097 rx_next: 2098 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2099 } while (ath_rxbuf_init(sc, bf) == 0); 2100 2101 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2102 ath_hal_rxena(ah); /* in case of RXEOL */ 2103 } 2104 2105 /* 2106 * XXX Size of an ACK control frame in bytes. 2107 */ 2108 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2109 2110 static int 2111 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2112 struct mbuf *m0) 2113 { 2114 struct ieee80211com *ic = &sc->sc_ic; 2115 struct ath_hal *ah = sc->sc_ah; 2116 struct ifnet *ifp = &sc->sc_ic.ic_if; 2117 int i, error, iswep, hdrlen, pktlen; 2118 u_int8_t rix, cix, txrate, ctsrate; 2119 struct ath_desc *ds; 2120 struct mbuf *m; 2121 struct ieee80211_frame *wh; 2122 u_int32_t iv; 2123 u_int8_t *ivp; 2124 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2125 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2126 u_int subtype, flags, ctsduration, antenna; 2127 HAL_PKT_TYPE atype; 2128 const HAL_RATE_TABLE *rt; 2129 HAL_BOOL shortPreamble; 2130 struct ath_node *an; 2131 ath_txq_critsect_decl(s); 2132 2133 wh = mtod(m0, struct ieee80211_frame *); 2134 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2135 hdrlen = sizeof(struct ieee80211_frame); 2136 pktlen = m0->m_pkthdr.len; 2137 2138 if (iswep) { 2139 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2140 m_adj(m0, hdrlen); 2141 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2142 if (m0 == NULL) { 2143 sc->sc_stats.ast_tx_nombuf++; 2144 return ENOMEM; 2145 } 2146 ivp = hdrbuf + hdrlen; 2147 /* 2148 * XXX 2149 * IV must not duplicate during the lifetime of the key. 2150 * But no mechanism to renew keys is defined in IEEE 802.11 2151 * WEP. And IV may be duplicated between other stations 2152 * because of the session key itself is shared. 2153 * So we use pseudo random IV for now, though it is not the 2154 * right way. 2155 */ 2156 iv = arc4random(); 2157 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 2158 ivp[i] = iv; 2159 iv >>= 8; 2160 } 2161 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 2162 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2163 /* 2164 * The ICV length must be included into hdrlen and pktlen. 2165 */ 2166 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2167 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2168 } 2169 pktlen += IEEE80211_CRC_LEN; 2170 2171 /* 2172 * Load the DMA map so any coalescing is done. This 2173 * also calculates the number of descriptors we need. 2174 */ 2175 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2176 if (error != 0) { 2177 sc->sc_stats.ast_tx_busdma++; 2178 m_freem(m0); 2179 return error; 2180 } 2181 /* 2182 * Discard null packets and check for packets that 2183 * require too many TX descriptors. We try to convert 2184 * the latter to a cluster. 2185 */ 2186 if (bf->bf_nseg > ATH_TXDESC) { /* too many desc's, linearize */ 2187 sc->sc_stats.ast_tx_linear++; 2188 MGETHDR(m, M_DONTWAIT, MT_DATA); 2189 if (m == NULL) { 2190 sc->sc_stats.ast_tx_nombuf++; 2191 m_freem(m0); 2192 return ENOMEM; 2193 } 2194 #ifdef __FreeBSD__ 2195 M_MOVE_PKTHDR(m, m0); 2196 #else 2197 M_COPY_PKTHDR(m, m0); 2198 #endif 2199 MCLGET(m, M_DONTWAIT); 2200 if ((m->m_flags & M_EXT) == 0) { 2201 sc->sc_stats.ast_tx_nomcl++; 2202 m_freem(m0); 2203 m_free(m); 2204 return ENOMEM; 2205 } 2206 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2207 m_freem(m0); 2208 m->m_len = m->m_pkthdr.len; 2209 m0 = m; 2210 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2211 BUS_DMA_NOWAIT); 2212 if (error != 0) { 2213 sc->sc_stats.ast_tx_busdma++; 2214 m_freem(m0); 2215 return error; 2216 } 2217 KASSERT(bf->bf_nseg == 1, 2218 ("ath_tx_start: packet not one segment; nseg %u", 2219 bf->bf_nseg)); 2220 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2221 sc->sc_stats.ast_tx_nodata++; 2222 m_freem(m0); 2223 return EIO; 2224 } 2225 DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen)); 2226 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2227 bf->bf_m = m0; 2228 bf->bf_node = ni; /* NB: held reference */ 2229 2230 /* setup descriptors */ 2231 ds = bf->bf_desc; 2232 rt = sc->sc_currates; 2233 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2234 2235 /* 2236 * Calculate Atheros packet type from IEEE80211 packet header 2237 * and setup for rate calculations. 2238 */ 2239 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2240 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2241 case IEEE80211_FC0_TYPE_MGT: 2242 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2243 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2244 atype = HAL_PKT_TYPE_BEACON; 2245 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2246 atype = HAL_PKT_TYPE_PROBE_RESP; 2247 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2248 atype = HAL_PKT_TYPE_ATIM; 2249 rix = 0; /* XXX lowest rate */ 2250 break; 2251 case IEEE80211_FC0_TYPE_CTL: 2252 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2253 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2254 atype = HAL_PKT_TYPE_PSPOLL; 2255 rix = 0; /* XXX lowest rate */ 2256 break; 2257 default: 2258 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2259 IEEE80211_RATE_VAL]; 2260 if (rix == 0xff) { 2261 if_printf(ifp, "bogus xmit rate 0x%x\n", 2262 ni->ni_rates.rs_rates[ni->ni_txrate]); 2263 sc->sc_stats.ast_tx_badrate++; 2264 m_freem(m0); 2265 return EIO; 2266 } 2267 break; 2268 } 2269 /* 2270 * NB: the 802.11 layer marks whether or not we should 2271 * use short preamble based on the current mode and 2272 * negotiated parameters. 2273 */ 2274 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) { 2275 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2276 shortPreamble = AH_TRUE; 2277 sc->sc_stats.ast_tx_shortpre++; 2278 } else { 2279 txrate = rt->info[rix].rateCode; 2280 shortPreamble = AH_FALSE; 2281 } 2282 2283 /* 2284 * Calculate miscellaneous flags. 2285 */ 2286 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2287 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2288 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2289 sc->sc_stats.ast_tx_noack++; 2290 } else if (pktlen > ic->ic_rtsthreshold) { 2291 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2292 sc->sc_stats.ast_tx_rts++; 2293 } 2294 2295 /* 2296 * Calculate RTS/CTS rate and duration if needed. 2297 */ 2298 ctsduration = 0; 2299 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2300 /* 2301 * CTS transmit rate is derived from the transmit rate 2302 * by looking in the h/w rate table. We must also factor 2303 * in whether or not a short preamble is to be used. 2304 */ 2305 cix = rt->info[rix].controlRate; 2306 ctsrate = rt->info[cix].rateCode; 2307 if (shortPreamble) 2308 ctsrate |= rt->info[cix].shortPreamble; 2309 /* 2310 * Compute the transmit duration based on the size 2311 * of an ACK frame. We call into the HAL to do the 2312 * computation since it depends on the characteristics 2313 * of the actual PHY being used. 2314 */ 2315 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2316 ctsduration += ath_hal_computetxtime(ah, 2317 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2318 } 2319 /* SIFS + data */ 2320 ctsduration += ath_hal_computetxtime(ah, 2321 rt, pktlen, rix, shortPreamble); 2322 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2323 ctsduration += ath_hal_computetxtime(ah, 2324 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2325 } 2326 } else 2327 ctsrate = 0; 2328 2329 /* 2330 * For now use the antenna on which the last good 2331 * frame was received on. We assume this field is 2332 * initialized to 0 which gives us ``auto'' or the 2333 * ``default'' antenna. 2334 */ 2335 an = (struct ath_node *) ni; 2336 if (an->an_tx_antenna) 2337 antenna = an->an_tx_antenna; 2338 else 2339 antenna = an->an_rx_antenna; 2340 2341 /* 2342 * Formulate first tx descriptor with tx controls. 2343 */ 2344 /* XXX check return value? */ 2345 ath_hal_setuptxdesc(ah, ds 2346 , pktlen /* packet length */ 2347 , hdrlen /* header length */ 2348 , atype /* Atheros packet type */ 2349 , 60 /* txpower XXX */ 2350 , txrate, 1+10 /* series 0 rate/tries */ 2351 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2352 , antenna /* antenna mode */ 2353 , flags /* flags */ 2354 , ctsrate /* rts/cts rate */ 2355 , ctsduration /* rts/cts duration */ 2356 ); 2357 #ifdef notyet 2358 ath_hal_setupxtxdesc(ah, ds 2359 , AH_FALSE /* short preamble */ 2360 , 0, 0 /* series 1 rate/tries */ 2361 , 0, 0 /* series 2 rate/tries */ 2362 , 0, 0 /* series 3 rate/tries */ 2363 ); 2364 #endif 2365 /* 2366 * Fillin the remainder of the descriptor info. 2367 */ 2368 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2369 ds->ds_data = bf->bf_segs[i].ds_addr; 2370 if (i == bf->bf_nseg - 1) 2371 ds->ds_link = 0; 2372 else 2373 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2374 ath_hal_filltxdesc(ah, ds 2375 , bf->bf_segs[i].ds_len /* segment length */ 2376 , i == 0 /* first segment */ 2377 , i == bf->bf_nseg - 1 /* last segment */ 2378 ); 2379 DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n", 2380 i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1, 2381 ds->ds_hw[0], ds->ds_hw[1])); 2382 } 2383 2384 /* 2385 * Insert the frame on the outbound list and 2386 * pass it on to the hardware. 2387 */ 2388 ath_txq_critsect_begin(sc, s); 2389 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2390 if (sc->sc_txlink == NULL) { 2391 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2392 DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n", 2393 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2394 } else { 2395 *sc->sc_txlink = bf->bf_daddr; 2396 DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n", 2397 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2398 } 2399 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2400 ath_txq_critsect_end(sc, s); 2401 2402 ath_hal_txstart(ah, sc->sc_txhalq); 2403 return 0; 2404 } 2405 2406 static void 2407 ath_tx_proc(void *arg, int npending) 2408 { 2409 struct ath_softc *sc = arg; 2410 struct ath_hal *ah = sc->sc_ah; 2411 struct ath_buf *bf; 2412 struct ieee80211com *ic = &sc->sc_ic; 2413 struct ifnet *ifp = &ic->ic_if; 2414 struct ath_desc *ds; 2415 struct ieee80211_node *ni; 2416 struct ath_node *an; 2417 int sr, lr; 2418 HAL_STATUS status; 2419 ath_txq_critsect_decl(s); 2420 ath_txbuf_critsect_decl(s2); 2421 2422 DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n", 2423 npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2424 sc->sc_txlink)); 2425 for (;;) { 2426 ath_txq_critsect_begin(sc, s); 2427 bf = TAILQ_FIRST(&sc->sc_txq); 2428 if (bf == NULL) { 2429 sc->sc_txlink = NULL; 2430 ath_txq_critsect_end(sc, s); 2431 break; 2432 } 2433 /* only the last descriptor is needed */ 2434 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2435 status = ath_hal_txprocdesc(ah, ds); 2436 #ifdef AR_DEBUG 2437 if (ath_debug > 1) 2438 ath_printtxbuf(bf, status == HAL_OK); 2439 #endif 2440 if (status == HAL_EINPROGRESS) { 2441 ath_txq_critsect_end(sc, s); 2442 break; 2443 } 2444 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2445 ath_txq_critsect_end(sc, s); 2446 2447 ni = bf->bf_node; 2448 if (ni != NULL) { 2449 an = (struct ath_node *) ni; 2450 if (ds->ds_txstat.ts_status == 0) { 2451 an->an_tx_ok++; 2452 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2453 } else { 2454 an->an_tx_err++; 2455 ifp->if_oerrors++; 2456 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2457 sc->sc_stats.ast_tx_xretries++; 2458 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2459 sc->sc_stats.ast_tx_fifoerr++; 2460 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2461 sc->sc_stats.ast_tx_filtered++; 2462 an->an_tx_antenna = 0; /* invalidate */ 2463 } 2464 sr = ds->ds_txstat.ts_shortretry; 2465 lr = ds->ds_txstat.ts_longretry; 2466 sc->sc_stats.ast_tx_shortretry += sr; 2467 sc->sc_stats.ast_tx_longretry += lr; 2468 if (sr + lr) 2469 an->an_tx_retr++; 2470 /* 2471 * Reclaim reference to node. 2472 * 2473 * NB: the node may be reclaimed here if, for example 2474 * this is a DEAUTH message that was sent and the 2475 * node was timed out due to inactivity. 2476 */ 2477 if (ni != ic->ic_bss) 2478 ieee80211_free_node(ic, ni); 2479 } 2480 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2481 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2482 m_freem(bf->bf_m); 2483 bf->bf_m = NULL; 2484 bf->bf_node = NULL; 2485 2486 ath_txbuf_critsect_begin(sc, s2); 2487 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2488 ath_txbuf_critsect_end(sc, s2); 2489 } 2490 ifp->if_flags &= ~IFF_OACTIVE; 2491 sc->sc_tx_timer = 0; 2492 2493 ath_start(ifp); 2494 } 2495 2496 /* 2497 * Drain the transmit queue and reclaim resources. 2498 */ 2499 static void 2500 ath_draintxq(struct ath_softc *sc) 2501 { 2502 struct ath_hal *ah = sc->sc_ah; 2503 struct ifnet *ifp = &sc->sc_ic.ic_if; 2504 struct ath_buf *bf; 2505 ath_txq_critsect_decl(s); 2506 ath_txbuf_critsect_decl(s2); 2507 2508 /* XXX return value */ 2509 if (!sc->sc_invalid) { 2510 /* don't touch the hardware if marked invalid */ 2511 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2512 DPRINTF(("ath_draintxq: tx queue %p, link %p\n", 2513 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2514 sc->sc_txlink)); 2515 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2516 DPRINTF(("ath_draintxq: beacon queue %p\n", 2517 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2518 } 2519 for (;;) { 2520 ath_txq_critsect_begin(sc, s); 2521 bf = TAILQ_FIRST(&sc->sc_txq); 2522 if (bf == NULL) { 2523 sc->sc_txlink = NULL; 2524 ath_txq_critsect_end(sc, s); 2525 break; 2526 } 2527 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2528 ath_txq_critsect_end(sc, s); 2529 #ifdef AR_DEBUG 2530 if (ath_debug) 2531 ath_printtxbuf(bf, 2532 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2533 #endif /* AR_DEBUG */ 2534 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2535 m_freem(bf->bf_m); 2536 bf->bf_m = NULL; 2537 bf->bf_node = NULL; 2538 ath_txbuf_critsect_begin(sc, s2); 2539 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2540 ath_txbuf_critsect_end(sc, s2); 2541 } 2542 ifp->if_flags &= ~IFF_OACTIVE; 2543 sc->sc_tx_timer = 0; 2544 } 2545 2546 /* 2547 * Disable the receive h/w in preparation for a reset. 2548 */ 2549 static void 2550 ath_stoprecv(struct ath_softc *sc) 2551 { 2552 struct ath_hal *ah = sc->sc_ah; 2553 2554 ath_hal_stoppcurecv(ah); /* disable PCU */ 2555 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2556 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2557 DELAY(3000); /* long enough for 1 frame */ 2558 #ifdef AR_DEBUG 2559 if (ath_debug) { 2560 struct ath_buf *bf; 2561 2562 DPRINTF(("ath_stoprecv: rx queue %p, link %p\n", 2563 (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink)); 2564 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2565 if (ath_hal_rxprocdesc(ah, bf->bf_desc) == HAL_OK) 2566 ath_printrxbuf(bf, 1); 2567 } 2568 } 2569 #endif 2570 sc->sc_rxlink = NULL; /* just in case */ 2571 } 2572 2573 /* 2574 * Enable the receive h/w following a reset. 2575 */ 2576 static int 2577 ath_startrecv(struct ath_softc *sc) 2578 { 2579 struct ath_hal *ah = sc->sc_ah; 2580 struct ath_buf *bf; 2581 2582 sc->sc_rxlink = NULL; 2583 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2584 int error = ath_rxbuf_init(sc, bf); 2585 if (error != 0) { 2586 DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n", 2587 error)); 2588 return error; 2589 } 2590 } 2591 2592 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2593 ath_hal_putrxbuf(ah, bf->bf_daddr); 2594 ath_hal_rxena(ah); /* enable recv descriptors */ 2595 ath_mode_init(sc); /* set filters, etc. */ 2596 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2597 return 0; 2598 } 2599 2600 /* 2601 * Set/change channels. If the channel is really being changed, 2602 * it's done by resetting the chip. To accomplish this we must 2603 * first cleanup any pending DMA, then restart stuff after a la 2604 * ath_init. 2605 */ 2606 static int 2607 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 2608 { 2609 struct ath_hal *ah = sc->sc_ah; 2610 struct ieee80211com *ic = &sc->sc_ic; 2611 2612 DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n", 2613 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 2614 ic->ic_ibss_chan->ic_freq, 2615 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 2616 if (chan != ic->ic_ibss_chan) { 2617 HAL_STATUS status; 2618 HAL_CHANNEL hchan; 2619 enum ieee80211_phymode mode; 2620 2621 /* 2622 * To switch channels clear any pending DMA operations; 2623 * wait long enough for the RX fifo to drain, reset the 2624 * hardware at the new frequency, and then re-enable 2625 * the relevant bits of the h/w. 2626 */ 2627 ath_hal_intrset(ah, 0); /* disable interrupts */ 2628 ath_draintxq(sc); /* clear pending tx frames */ 2629 ath_stoprecv(sc); /* turn off frame recv */ 2630 /* 2631 * Convert to a HAL channel description with 2632 * the flags constrained to reflect the current 2633 * operating mode. 2634 */ 2635 hchan.channel = chan->ic_freq; 2636 hchan.channelFlags = ath_chan2flags(ic, chan); 2637 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 2638 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 2639 "channel %u (%u Mhz)\n", 2640 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 2641 return EIO; 2642 } 2643 /* 2644 * Re-enable rx framework. 2645 */ 2646 if (ath_startrecv(sc) != 0) { 2647 if_printf(&ic->ic_if, 2648 "ath_chan_set: unable to restart recv logic\n"); 2649 return EIO; 2650 } 2651 2652 /* 2653 * Update BPF state. 2654 */ 2655 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 2656 htole16(chan->ic_freq); 2657 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 2658 htole16(chan->ic_flags); 2659 2660 /* 2661 * Change channels and update the h/w rate map 2662 * if we're switching; e.g. 11a to 11b/g. 2663 */ 2664 ic->ic_ibss_chan = chan; 2665 mode = ieee80211_chan2mode(ic, chan); 2666 if (mode != sc->sc_curmode) 2667 ath_setcurmode(sc, mode); 2668 2669 /* 2670 * Re-enable interrupts. 2671 */ 2672 ath_hal_intrset(ah, sc->sc_imask); 2673 } 2674 return 0; 2675 } 2676 2677 static void 2678 ath_next_scan(void *arg) 2679 { 2680 struct ath_softc *sc = arg; 2681 struct ieee80211com *ic = &sc->sc_ic; 2682 struct ifnet *ifp = &ic->ic_if; 2683 int s; 2684 2685 /* don't call ath_start w/o network interrupts blocked */ 2686 s = splnet(); 2687 2688 if (ic->ic_state == IEEE80211_S_SCAN) 2689 ieee80211_next_scan(ifp); 2690 splx(s); 2691 } 2692 2693 /* 2694 * Periodically recalibrate the PHY to account 2695 * for temperature/environment changes. 2696 */ 2697 static void 2698 ath_calibrate(void *arg) 2699 { 2700 struct ath_softc *sc = arg; 2701 struct ath_hal *ah = sc->sc_ah; 2702 struct ieee80211com *ic = &sc->sc_ic; 2703 struct ieee80211_channel *c; 2704 HAL_CHANNEL hchan; 2705 2706 sc->sc_stats.ast_per_cal++; 2707 2708 /* 2709 * Convert to a HAL channel description with the flags 2710 * constrained to reflect the current operating mode. 2711 */ 2712 c = ic->ic_ibss_chan; 2713 hchan.channel = c->ic_freq; 2714 hchan.channelFlags = ath_chan2flags(ic, c); 2715 2716 DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 2717 2718 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 2719 /* 2720 * Rfgain is out of bounds, reset the chip 2721 * to load new gain values. 2722 */ 2723 sc->sc_stats.ast_per_rfgain++; 2724 ath_reset(sc); 2725 } 2726 if (!ath_hal_calibrate(ah, &hchan)) { 2727 DPRINTF(("%s: calibration of channel %u failed\n", 2728 __func__, c->ic_freq)); 2729 sc->sc_stats.ast_per_calfail++; 2730 } 2731 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 2732 } 2733 2734 static HAL_LED_STATE 2735 ath_state_to_led(enum ieee80211_state state) 2736 { 2737 switch (state) { 2738 case IEEE80211_S_INIT: 2739 return HAL_LED_INIT; 2740 case IEEE80211_S_SCAN: 2741 return HAL_LED_SCAN; 2742 case IEEE80211_S_AUTH: 2743 return HAL_LED_AUTH; 2744 case IEEE80211_S_ASSOC: 2745 return HAL_LED_ASSOC; 2746 case IEEE80211_S_RUN: 2747 return HAL_LED_RUN; 2748 default: 2749 panic("%s: unknown 802.11 state %d\n", __func__, state); 2750 return HAL_LED_INIT; 2751 } 2752 } 2753 2754 static int 2755 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 2756 { 2757 struct ifnet *ifp = &ic->ic_if; 2758 struct ath_softc *sc = ifp->if_softc; 2759 struct ath_hal *ah = sc->sc_ah; 2760 struct ieee80211_node *ni; 2761 int i, error; 2762 u_int8_t *bssid; 2763 u_int32_t rfilt; 2764 2765 DPRINTF(("%s: %s -> %s\n", __func__, 2766 ieee80211_state_name[ic->ic_state], 2767 ieee80211_state_name[nstate])); 2768 2769 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 2770 2771 if (nstate == IEEE80211_S_INIT) { 2772 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2773 ath_hal_intrset(ah, sc->sc_imask); 2774 callout_stop(&sc->sc_scan_ch); 2775 callout_stop(&sc->sc_cal_ch); 2776 return (*sc->sc_newstate)(ic, nstate, arg); 2777 } 2778 ni = ic->ic_bss; 2779 error = ath_chan_set(sc, ni->ni_chan); 2780 if (error != 0) 2781 goto bad; 2782 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 2783 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 2784 if (ic->ic_opmode != IEEE80211_M_STA) 2785 rfilt |= HAL_RX_FILTER_PROBEREQ; 2786 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2787 (ifp->if_flags & IFF_PROMISC)) 2788 rfilt |= HAL_RX_FILTER_PROM; 2789 if (nstate == IEEE80211_S_SCAN) { 2790 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 2791 ath_next_scan, sc); 2792 bssid = ifp->if_broadcastaddr; 2793 rfilt |= HAL_RX_FILTER_BEACON; 2794 } else { 2795 callout_stop(&sc->sc_scan_ch); 2796 bssid = ni->ni_bssid; 2797 } 2798 ath_hal_setrxfilter(ah, rfilt); 2799 DPRINTF(("%s: RX filter 0x%x bssid %s\n", 2800 __func__, rfilt, ether_sprintf(bssid))); 2801 2802 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 2803 ath_hal_setassocid(ah, bssid, ni->ni_associd); 2804 else 2805 ath_hal_setassocid(ah, bssid, 0); 2806 if (ic->ic_flags & IEEE80211_F_WEPON) { 2807 for (i = 0; i < IEEE80211_WEP_NKID; i++) 2808 if (ath_hal_keyisvalid(ah, i)) 2809 ath_hal_keysetmac(ah, i, bssid); 2810 } 2811 2812 if (nstate == IEEE80211_S_RUN) { 2813 DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 2814 "capinfo=0x%04x chan=%d\n" 2815 , __func__ 2816 , ic->ic_flags 2817 , ni->ni_intval 2818 , ether_sprintf(ni->ni_bssid) 2819 , ni->ni_capinfo 2820 , ieee80211_chan2ieee(ic, ni->ni_chan))); 2821 2822 /* 2823 * Allocate and setup the beacon frame for AP or adhoc mode. 2824 */ 2825 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 2826 ic->ic_opmode == IEEE80211_M_IBSS) { 2827 error = ath_beacon_alloc(sc, ni); 2828 if (error != 0) 2829 goto bad; 2830 } 2831 2832 /* 2833 * Configure the beacon and sleep timers. 2834 */ 2835 ath_beacon_config(sc); 2836 2837 /* start periodic recalibration timer */ 2838 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 2839 ath_calibrate, sc); 2840 } else { 2841 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2842 ath_hal_intrset(ah, sc->sc_imask); 2843 callout_stop(&sc->sc_cal_ch); /* no calibration */ 2844 } 2845 /* 2846 * Reset the rate control state. 2847 */ 2848 ath_rate_ctl_reset(sc, nstate); 2849 /* 2850 * Invoke the parent method to complete the work. 2851 */ 2852 return (*sc->sc_newstate)(ic, nstate, arg); 2853 bad: 2854 callout_stop(&sc->sc_scan_ch); 2855 callout_stop(&sc->sc_cal_ch); 2856 /* NB: do not invoke the parent */ 2857 return error; 2858 } 2859 2860 /* 2861 * Setup driver-specific state for a newly associated node. 2862 * Note that we're called also on a re-associate, the isnew 2863 * param tells us if this is the first time or not. 2864 */ 2865 static void 2866 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 2867 { 2868 if (isnew) { 2869 struct ath_node *an = (struct ath_node *) ni; 2870 2871 an->an_tx_ok = an->an_tx_err = 2872 an->an_tx_retr = an->an_tx_upper = 0; 2873 /* start with highest negotiated rate */ 2874 /* 2875 * XXX should do otherwise but only when 2876 * the rate control algorithm is better. 2877 */ 2878 KASSERT(ni->ni_rates.rs_nrates > 0, 2879 ("new association w/ no rates!")); 2880 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 2881 } 2882 } 2883 2884 static int 2885 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor) 2886 { 2887 struct ieee80211com *ic = &sc->sc_ic; 2888 struct ifnet *ifp = &ic->ic_if; 2889 struct ath_hal *ah = sc->sc_ah; 2890 HAL_CHANNEL *chans; 2891 int i, ix, nchan; 2892 2893 sc->sc_have11g = 0; 2894 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 2895 M_TEMP, M_NOWAIT); 2896 if (chans == NULL) { 2897 if_printf(ifp, "unable to allocate channel table\n"); 2898 return ENOMEM; 2899 } 2900 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 2901 cc, HAL_MODE_ALL, outdoor)) { 2902 if_printf(ifp, "unable to collect channel list from hal\n"); 2903 free(chans, M_TEMP); 2904 return EINVAL; 2905 } 2906 2907 /* 2908 * Convert HAL channels to ieee80211 ones and insert 2909 * them in the table according to their channel number. 2910 */ 2911 for (i = 0; i < nchan; i++) { 2912 HAL_CHANNEL *c = &chans[i]; 2913 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 2914 if (ix > IEEE80211_CHAN_MAX) { 2915 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 2916 ix, c->channel, c->channelFlags); 2917 continue; 2918 } 2919 /* NB: flags are known to be compatible */ 2920 if (ic->ic_channels[ix].ic_freq == 0) { 2921 ic->ic_channels[ix].ic_freq = c->channel; 2922 ic->ic_channels[ix].ic_flags = c->channelFlags; 2923 } else { 2924 /* channels overlap; e.g. 11g and 11b */ 2925 ic->ic_channels[ix].ic_flags |= c->channelFlags; 2926 } 2927 if ((c->channelFlags & CHANNEL_G) == CHANNEL_G) 2928 sc->sc_have11g = 1; 2929 } 2930 free(chans, M_TEMP); 2931 return 0; 2932 } 2933 2934 static int 2935 ath_rate_setup(struct ath_softc *sc, u_int mode) 2936 { 2937 struct ath_hal *ah = sc->sc_ah; 2938 struct ieee80211com *ic = &sc->sc_ic; 2939 const HAL_RATE_TABLE *rt; 2940 struct ieee80211_rateset *rs; 2941 int i, maxrates; 2942 2943 switch (mode) { 2944 case IEEE80211_MODE_11A: 2945 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 2946 break; 2947 case IEEE80211_MODE_11B: 2948 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 2949 break; 2950 case IEEE80211_MODE_11G: 2951 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 2952 break; 2953 case IEEE80211_MODE_TURBO: 2954 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 2955 break; 2956 default: 2957 DPRINTF(("%s: invalid mode %u\n", __func__, mode)); 2958 return 0; 2959 } 2960 rt = sc->sc_rates[mode]; 2961 if (rt == NULL) 2962 return 0; 2963 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 2964 DPRINTF(("%s: rate table too small (%u > %u)\n", 2965 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 2966 maxrates = IEEE80211_RATE_MAXSIZE; 2967 } else 2968 maxrates = rt->rateCount; 2969 rs = &ic->ic_sup_rates[mode]; 2970 for (i = 0; i < maxrates; i++) 2971 rs->rs_rates[i] = rt->info[i].dot11Rate; 2972 rs->rs_nrates = maxrates; 2973 return 1; 2974 } 2975 2976 static void 2977 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 2978 { 2979 const HAL_RATE_TABLE *rt; 2980 int i; 2981 2982 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 2983 rt = sc->sc_rates[mode]; 2984 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 2985 for (i = 0; i < rt->rateCount; i++) 2986 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 2987 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 2988 for (i = 0; i < 32; i++) 2989 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 2990 sc->sc_currates = rt; 2991 sc->sc_curmode = mode; 2992 } 2993 2994 /* 2995 * Reset the rate control state for each 802.11 state transition. 2996 */ 2997 static void 2998 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 2999 { 3000 struct ieee80211com *ic = &sc->sc_ic; 3001 struct ieee80211_node *ni; 3002 struct ath_node *an; 3003 3004 an = (struct ath_node *) ic->ic_bss; 3005 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3006 if (ic->ic_opmode == IEEE80211_M_STA) { 3007 ni = ic->ic_bss; 3008 if (state == IEEE80211_S_RUN) { 3009 /* start with highest negotiated rate */ 3010 KASSERT(ni->ni_rates.rs_nrates > 0, 3011 ("transition to RUN state w/ no rates!")); 3012 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3013 } else { 3014 /* use lowest rate */ 3015 ni->ni_txrate = 0; 3016 } 3017 } else { 3018 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3019 ni->ni_txrate = 0; /* use lowest rate */ 3020 an = (struct ath_node *) ni; 3021 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3022 an->an_tx_upper = 0; 3023 } 3024 } 3025 } 3026 3027 /* 3028 * Examine and potentially adjust the transmit rate. 3029 */ 3030 static void 3031 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3032 { 3033 struct ath_softc *sc = arg; 3034 struct ath_node *an = (struct ath_node *) ni; 3035 struct ieee80211_rateset *rs = &ni->ni_rates; 3036 int mod = 0, orate, enough; 3037 3038 /* 3039 * Rate control 3040 * XXX: very primitive version. 3041 */ 3042 sc->sc_stats.ast_rate_calls++; 3043 3044 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3045 3046 /* no packet reached -> down */ 3047 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3048 mod = -1; 3049 3050 /* all packets needs retry in average -> down */ 3051 if (enough && an->an_tx_ok < an->an_tx_retr) 3052 mod = -1; 3053 3054 /* no error and less than 10% of packets needs retry -> up */ 3055 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3056 mod = 1; 3057 3058 orate = ni->ni_txrate; 3059 switch (mod) { 3060 case 0: 3061 if (enough && an->an_tx_upper > 0) 3062 an->an_tx_upper--; 3063 break; 3064 case -1: 3065 if (ni->ni_txrate > 0) { 3066 ni->ni_txrate--; 3067 sc->sc_stats.ast_rate_drop++; 3068 } 3069 an->an_tx_upper = 0; 3070 break; 3071 case 1: 3072 if (++an->an_tx_upper < 2) 3073 break; 3074 an->an_tx_upper = 0; 3075 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3076 ni->ni_txrate++; 3077 sc->sc_stats.ast_rate_raise++; 3078 } 3079 break; 3080 } 3081 3082 if (ni->ni_txrate != orate) { 3083 printf("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3084 __func__, 3085 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3086 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3087 an->an_tx_ok, an->an_tx_err, an->an_tx_retr); 3088 } 3089 if (ni->ni_txrate != orate || enough) 3090 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3091 } 3092 3093 #ifdef AR_DEBUG 3094 #ifdef __FreeBSD__ 3095 static int 3096 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3097 { 3098 char dmode[64]; 3099 int error; 3100 3101 strncpy(dmode, "", sizeof(dmode) - 1); 3102 dmode[sizeof(dmode) - 1] = '\0'; 3103 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3104 3105 if (error == 0 && req->newptr != NULL) { 3106 struct ifnet *ifp; 3107 struct ath_softc *sc; 3108 3109 ifp = ifunit("ath0"); /* XXX */ 3110 if (!ifp) 3111 return EINVAL; 3112 sc = ifp->if_softc; 3113 if (strcmp(dmode, "hal") == 0) 3114 ath_hal_dumpstate(sc->sc_ah); 3115 else if (strcmp(dmode, "eeprom") == 0) 3116 ath_hal_dumpeeprom(sc->sc_ah); 3117 else if (strcmp(dmode, "rfgain") == 0) 3118 ath_hal_dumprfgain(sc->sc_ah); 3119 else if (strcmp(dmode, "ani") == 0) 3120 ath_hal_dumpani(sc->sc_ah); 3121 else 3122 return EINVAL; 3123 } 3124 return error; 3125 } 3126 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3127 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3128 #endif /* __FreeBSD__ */ 3129 3130 static void 3131 ath_printrxbuf(struct ath_buf *bf, int done) 3132 { 3133 struct ath_desc *ds; 3134 int i; 3135 3136 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3137 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3138 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3139 ds->ds_link, ds->ds_data, 3140 ds->ds_ctl0, ds->ds_ctl1, 3141 ds->ds_hw[0], ds->ds_hw[1], 3142 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3143 } 3144 } 3145 3146 static void 3147 ath_printtxbuf(struct ath_buf *bf, int done) 3148 { 3149 struct ath_desc *ds; 3150 int i; 3151 3152 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3153 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3154 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3155 ds->ds_link, ds->ds_data, 3156 ds->ds_ctl0, ds->ds_ctl1, 3157 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3158 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3159 } 3160 } 3161 #endif /* AR_DEBUG */ 3162
Indexes created Thu Oct 02 07:10:07 GMT 2025