ath.c revision 1.5
1 /*- 2 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 22 * 23 * NO WARRANTY 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 */ 36 37 #include <sys/cdefs.h> 38 #ifdef __FreeBSD__ 39 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.14 2003/09/05 22:22:49 sam Exp $"); 40 #endif 41 #ifdef __NetBSD__ 42 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.5 2003/10/15 03:04:03 enami Exp $"); 43 #endif 44 45 /* 46 * Driver for the Atheros Wireless LAN controller. 47 * 48 * This software is derived from work of Atsushi Onoe; his contribution 49 * is greatly appreciated. 50 */ 51 52 #include "opt_inet.h" 53 54 #ifdef __NetBSD__ 55 #include "bpfilter.h" 56 #endif /* __NetBSD__ */ 57 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/types.h> 61 #include <sys/sysctl.h> 62 #include <sys/mbuf.h> 63 #include <sys/malloc.h> 64 #include <sys/lock.h> 65 #ifdef __FreeBSD__ 66 #include <sys/mutex.h> 67 #endif 68 #include <sys/kernel.h> 69 #include <sys/socket.h> 70 #include <sys/sockio.h> 71 #include <sys/errno.h> 72 #include <sys/callout.h> 73 #ifdef __FreeBSD__ 74 #include <sys/bus.h> 75 #else 76 #include <machine/bus.h> 77 #endif 78 #include <sys/endian.h> 79 80 #include <machine/bus.h> 81 82 #include <net/if.h> 83 #include <net/if_dl.h> 84 #include <net/if_media.h> 85 #include <net/if_arp.h> 86 #ifdef __FreeBSD__ 87 #include <net/ethernet.h> 88 #else 89 #include <net/if_ether.h> 90 #endif 91 #include <net/if_llc.h> 92 93 #include <net80211/ieee80211_var.h> 94 #include <net80211/ieee80211_compat.h> 95 96 #if NBPFILTER > 0 97 #include <net/bpf.h> 98 #endif 99 100 #ifdef INET 101 #include <netinet/in.h> 102 #endif 103 104 #include <dev/ic/athcompat.h> 105 106 #define AR_DEBUG 107 #ifdef __FreeBSD__ 108 #include <dev/ath/if_athvar.h> 109 #include <contrib/dev/ath/ah_desc.h> 110 #else 111 #include <dev/ic/athvar.h> 112 #include <../contrib/sys/dev/ic/athhal_desc.h> 113 #endif 114 115 /* unalligned little endian access */ 116 #define LE_READ_2(p) \ 117 ((u_int16_t) \ 118 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 119 #define LE_READ_4(p) \ 120 ((u_int32_t) \ 121 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 122 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 123 124 #ifdef __FreeBSD__ 125 static void ath_init(void *); 126 #else 127 static int ath_init(struct ifnet *); 128 #endif 129 static int ath_init1(struct ath_softc *); 130 static int ath_intr1(struct ath_softc *); 131 static void ath_stop(struct ifnet *); 132 static void ath_start(struct ifnet *); 133 static void ath_reset(struct ath_softc *); 134 static int ath_media_change(struct ifnet *); 135 static void ath_watchdog(struct ifnet *); 136 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 137 static void ath_fatal_proc(void *, int); 138 static void ath_rxorn_proc(void *, int); 139 static void ath_bmiss_proc(void *, int); 140 static void ath_initkeytable(struct ath_softc *); 141 static void ath_mode_init(struct ath_softc *); 142 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 143 static void ath_beacon_proc(void *, int); 144 static void ath_beacon_free(struct ath_softc *); 145 static void ath_beacon_config(struct ath_softc *); 146 static int ath_desc_alloc(struct ath_softc *); 147 static void ath_desc_free(struct ath_softc *); 148 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 149 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 150 static void ath_node_copy(struct ieee80211com *, 151 struct ieee80211_node *, const struct ieee80211_node *); 152 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 153 static void ath_rx_proc(void *, int); 154 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 155 struct ath_buf *, struct mbuf *); 156 static void ath_tx_proc(void *, int); 157 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 158 static void ath_draintxq(struct ath_softc *); 159 static void ath_stoprecv(struct ath_softc *); 160 static int ath_startrecv(struct ath_softc *); 161 static void ath_next_scan(void *); 162 static void ath_calibrate(void *); 163 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 164 static void ath_newassoc(struct ieee80211com *, 165 struct ieee80211_node *, int); 166 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor); 167 168 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 169 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 170 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 171 static void ath_rate_ctl(void *, struct ieee80211_node *); 172 173 #ifdef __NetBSD__ 174 int ath_enable(struct ath_softc *); 175 void ath_disable(struct ath_softc *); 176 void ath_power(int, void *); 177 #endif 178 179 #ifdef __FreeBSD__ 180 SYSCTL_DECL(_hw_ath); 181 /* XXX validate sysctl values */ 182 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 183 0, "channel dwell time (ms) for AP/station scanning"); 184 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 185 0, "chip calibration interval (secs)"); 186 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 187 0, "enable/disable outdoor operation"); 188 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 189 0, "country code"); 190 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 191 0, "regulatory domain"); 192 #endif /* __FreeBSD__ */ 193 194 static int ath_dwelltime = 200; /* 5 channels/second */ 195 static int ath_calinterval = 30; /* calibrate every 30 secs */ 196 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 197 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 198 static int ath_regdomain = 0; /* regulatory domain */ 199 200 #ifdef AR_DEBUG 201 int ath_debug = 0; 202 #ifdef __FreeBSD__ 203 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 204 0, "control debugging printfs"); 205 #endif /* __FreeBSD__ */ 206 #define IFF_DUMPPKTS(_ifp) \ 207 (ath_debug || \ 208 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 209 static void ath_printrxbuf(struct ath_buf *bf, int); 210 static void ath_printtxbuf(struct ath_buf *bf, int); 211 #define DPRINTF(X) if (ath_debug) printf X 212 #define DPRINTF2(X) if (ath_debug > 1) printf X 213 #else 214 #define IFF_DUMPPKTS(_ifp) \ 215 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 216 #define DPRINTF(X) 217 #define DPRINTF2(X) 218 #endif 219 220 #ifdef __NetBSD__ 221 int 222 ath_activate(struct device *self, enum devact act) 223 { 224 struct ath_softc *sc = (struct ath_softc *)self; 225 int rv = 0, s; 226 227 s = splnet(); 228 switch (act) { 229 case DVACT_ACTIVATE: 230 rv = EOPNOTSUPP; 231 break; 232 case DVACT_DEACTIVATE: 233 if_deactivate(&sc->sc_ic.ic_if); 234 break; 235 } 236 splx(s); 237 return rv; 238 } 239 240 int 241 ath_enable(struct ath_softc *sc) 242 { 243 if (ATH_IS_ENABLED(sc) == 0) { 244 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 245 printf("%s: device enable failed\n", 246 sc->sc_dev.dv_xname); 247 return (EIO); 248 } 249 sc->sc_flags |= ATH_ENABLED; 250 } 251 return (0); 252 } 253 254 void 255 ath_disable(struct ath_softc *sc) 256 { 257 if (!ATH_IS_ENABLED(sc)) 258 return; 259 if (sc->sc_disable != NULL) 260 (*sc->sc_disable)(sc); 261 sc->sc_flags &= ~ATH_ENABLED; 262 } 263 #endif /* #ifdef __NetBSD__ */ 264 265 int 266 ath_attach(u_int16_t devid, struct ath_softc *sc) 267 { 268 struct ieee80211com *ic = &sc->sc_ic; 269 struct ifnet *ifp = &ic->ic_if; 270 struct ath_hal *ah; 271 HAL_STATUS status; 272 int error = 0; 273 274 DPRINTF(("ath_attach: devid 0x%x\n", devid)); 275 276 #ifdef __FreeBSD__ 277 /* set these up early for if_printf use */ 278 ifp->if_unit = device_get_unit(sc->sc_dev); 279 ifp->if_name = "ath"; 280 #else 281 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 282 #endif 283 284 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 285 if (ah == NULL) { 286 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 287 status); 288 error = ENXIO; 289 goto bad; 290 } 291 sc->sc_ah = ah; 292 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 293 294 /* 295 * Collect the channel list using the default country 296 * code and including outdoor channels. The 802.11 layer 297 * is resposible for filtering this list based on settings 298 * like the phy mode. 299 */ 300 error = ath_getchannels(sc, ath_countrycode, ath_outdoor); 301 if (error != 0) 302 goto bad; 303 /* 304 * Copy these back; they are set as a side effect 305 * of constructing the channel list. 306 */ 307 ath_regdomain = ath_hal_getregdomain(ah); 308 ath_countrycode = ath_hal_getcountrycode(ah); 309 310 /* 311 * Setup rate tables for all potential media types. 312 */ 313 ath_rate_setup(sc, IEEE80211_MODE_11A); 314 ath_rate_setup(sc, IEEE80211_MODE_11B); 315 ath_rate_setup(sc, IEEE80211_MODE_11G); 316 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 317 318 error = ath_desc_alloc(sc); 319 if (error != 0) { 320 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 321 goto bad; 322 } 323 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 324 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 325 326 #ifdef __FreeBSD__ 327 mtx_init(&sc->sc_txbuflock, 328 device_get_nameunit(sc->sc_dev), "xmit buf q", MTX_DEF); 329 mtx_init(&sc->sc_txqlock, 330 device_get_nameunit(sc->sc_dev), "xmit q", MTX_DEF); 331 #endif 332 333 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 334 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 335 ATH_TASK_INIT(&sc->sc_swbatask, ath_beacon_proc, sc); 336 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 337 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 338 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 339 340 /* 341 * For now just pre-allocate one data queue and one 342 * beacon queue. Note that the HAL handles resetting 343 * them at the needed time. Eventually we'll want to 344 * allocate more tx queues for splitting management 345 * frames and for QOS support. 346 */ 347 sc->sc_txhalq = ath_hal_setuptxqueue(ah, 348 HAL_TX_QUEUE_DATA, 349 AH_TRUE /* enable interrupts */ 350 ); 351 if (sc->sc_txhalq == (u_int) -1) { 352 if_printf(ifp, "unable to setup a data xmit queue!\n"); 353 goto bad; 354 } 355 sc->sc_bhalq = ath_hal_setuptxqueue(ah, 356 HAL_TX_QUEUE_BEACON, 357 AH_TRUE /* enable interrupts */ 358 ); 359 if (sc->sc_bhalq == (u_int) -1) { 360 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 361 goto bad; 362 } 363 364 ifp->if_softc = sc; 365 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 366 ifp->if_start = ath_start; 367 ifp->if_watchdog = ath_watchdog; 368 ifp->if_ioctl = ath_ioctl; 369 ifp->if_init = ath_init; 370 #ifdef __FreeBSD__ 371 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 372 #else 373 #if 0 374 ifp->if_stop = ath_stop; /* XXX */ 375 #endif 376 IFQ_SET_READY(&ifp->if_snd); 377 #endif 378 379 ic->ic_softc = sc; 380 ic->ic_newassoc = ath_newassoc; 381 /* XXX not right but it's not used anywhere important */ 382 ic->ic_phytype = IEEE80211_T_OFDM; 383 ic->ic_opmode = IEEE80211_M_STA; 384 ic->ic_caps = IEEE80211_C_WEP | IEEE80211_C_IBSS | IEEE80211_C_HOSTAP 385 | IEEE80211_C_MONITOR; 386 /* NB: 11g support is identified when we fetch the channel set */ 387 if (sc->sc_have11g) 388 ic->ic_caps |= IEEE80211_C_SHPREAMBLE; 389 390 /* get mac address from hardware */ 391 ath_hal_getmac(ah, ic->ic_myaddr); 392 393 #ifdef __NetBSD__ 394 if_attach(ifp); 395 #endif 396 /* call MI attach routine. */ 397 ieee80211_ifattach(ifp); 398 /* override default methods */ 399 ic->ic_node_alloc = ath_node_alloc; 400 ic->ic_node_free = ath_node_free; 401 ic->ic_node_copy = ath_node_copy; 402 sc->sc_newstate = ic->ic_newstate; 403 ic->ic_newstate = ath_newstate; 404 /* complete initialization */ 405 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 406 407 #if NBPFILTER > 0 408 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 409 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 410 &sc->sc_drvbpf); 411 #endif 412 /* 413 * Initialize constant fields. 414 * 415 * NB: the channel is setup each time we transition to the 416 * RUN state to avoid filling it in for each frame. 417 */ 418 sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th); 419 sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT; 420 421 sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th); 422 sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT; 423 424 if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr)); 425 426 #ifdef __NetBSD__ 427 sc->sc_flags |= ATH_ATTACHED; 428 /* 429 * Make sure the interface is shutdown during reboot. 430 */ 431 #if 0 432 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 433 if (sc->sc_sdhook == NULL) 434 printf("%s: WARNING: unable to establish shutdown hook\n", 435 sc->sc_dev.dv_xname); 436 #endif 437 sc->sc_powerhook = powerhook_establish(ath_power, sc); 438 if (sc->sc_powerhook == NULL) 439 printf("%s: WARNING: unable to establish power hook\n", 440 sc->sc_dev.dv_xname); 441 #endif 442 return 0; 443 bad: 444 if (ah) 445 ath_hal_detach(ah); 446 sc->sc_invalid = 1; 447 return error; 448 } 449 450 int 451 ath_detach(struct ath_softc *sc) 452 { 453 struct ifnet *ifp = &sc->sc_ic.ic_if; 454 ath_softc_critsect_decl(s); 455 456 DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags)); 457 if ((sc->sc_flags & ATH_ATTACHED) == 0) 458 return (0); 459 460 ath_softc_critsect_begin(sc, s); 461 ath_stop(ifp); 462 #if NBPFILTER > 0 463 bpfdetach(ifp); 464 #endif 465 ath_desc_free(sc); 466 ath_hal_detach(sc->sc_ah); 467 ieee80211_ifdetach(ifp); 468 #ifdef __NetBSD__ 469 if_detach(ifp); 470 #endif 471 ath_softc_critsect_end(sc, s); 472 return 0; 473 } 474 475 void 476 ath_power(int why, void *arg) 477 { 478 struct ath_softc *sc = arg; 479 int s; 480 481 DPRINTF(("ath_power(%d)\n", why)); 482 483 s = splnet(); 484 switch (why) { 485 case PWR_SUSPEND: 486 case PWR_STANDBY: 487 ath_suspend(sc, why); 488 break; 489 case PWR_RESUME: 490 ath_resume(sc, why); 491 break; 492 case PWR_SOFTSUSPEND: 493 case PWR_SOFTSTANDBY: 494 case PWR_SOFTRESUME: 495 break; 496 } 497 splx(s); 498 } 499 500 void 501 ath_suspend(struct ath_softc *sc, int why) 502 { 503 struct ifnet *ifp = &sc->sc_ic.ic_if; 504 505 DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags)); 506 507 ath_stop(ifp); 508 if (sc->sc_power != NULL) 509 (*sc->sc_power)(sc, why); 510 } 511 512 void 513 ath_resume(struct ath_softc *sc, int why) 514 { 515 struct ifnet *ifp = &sc->sc_ic.ic_if; 516 517 DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags)); 518 519 if (ifp->if_flags & IFF_UP) { 520 ath_init(ifp); 521 #if 0 522 (void)ath_intr(sc); 523 #endif 524 if (sc->sc_power != NULL) 525 (*sc->sc_power)(sc, why); 526 if (ifp->if_flags & IFF_RUNNING) 527 ath_start(ifp); 528 } 529 } 530 531 void 532 ath_shutdown(struct ath_softc *sc) 533 { 534 #if 1 535 return; 536 #else 537 struct ifnet *ifp = &sc->sc_ic.ic_if; 538 539 DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags)); 540 541 ath_stop(ifp); 542 #endif 543 } 544 545 #ifdef __NetBSD__ 546 int 547 ath_intr(void *arg) 548 { 549 return ath_intr1((struct ath_softc *)arg); 550 } 551 #else 552 void 553 ath_intr(void *arg) 554 { 555 (void)ath_intr1((struct ath_softc *)arg); 556 } 557 #endif 558 559 static int 560 ath_intr1(struct ath_softc *sc) 561 { 562 struct ieee80211com *ic = &sc->sc_ic; 563 struct ifnet *ifp = &ic->ic_if; 564 struct ath_hal *ah = sc->sc_ah; 565 HAL_INT status; 566 567 if (sc->sc_invalid) { 568 /* 569 * The hardware is not ready/present, don't touch anything. 570 * Note this can happen early on if the IRQ is shared. 571 */ 572 DPRINTF(("ath_intr: invalid; ignored\n")); 573 return 0; 574 } 575 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 576 DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags)); 577 ath_hal_getisr(ah, &status); /* clear ISR */ 578 ath_hal_intrset(ah, 0); /* disable further intr's */ 579 return 1; /* XXX */ 580 } 581 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 582 DPRINTF2(("ath_intr: status 0x%x\n", status)); 583 #ifdef AR_DEBUG 584 if (ath_debug && 585 (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) { 586 if_printf(ifp, "ath_intr: status 0x%x\n", status); 587 ath_hal_dumpstate(ah); 588 } 589 #endif /* AR_DEBUG */ 590 if (status & HAL_INT_FATAL) { 591 sc->sc_stats.ast_hardware++; 592 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 593 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 594 } else if (status & HAL_INT_RXORN) { 595 sc->sc_stats.ast_rxorn++; 596 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 597 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 598 } else { 599 if (status & HAL_INT_RXEOL) { 600 /* 601 * NB: the hardware should re-read the link when 602 * RXE bit is written, but it doesn't work at 603 * least on older hardware revs. 604 */ 605 sc->sc_stats.ast_rxeol++; 606 sc->sc_rxlink = NULL; 607 } 608 if (status & HAL_INT_TXURN) { 609 sc->sc_stats.ast_txurn++; 610 /* bump tx trigger level */ 611 ath_hal_updatetxtriglevel(ah, AH_TRUE); 612 } 613 if (status & HAL_INT_RX) 614 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 615 if (status & HAL_INT_TX) 616 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 617 if (status & HAL_INT_SWBA) 618 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_swbatask); 619 if (status & HAL_INT_BMISS) { 620 sc->sc_stats.ast_bmiss++; 621 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 622 } 623 } 624 return 1; 625 } 626 627 static void 628 ath_fatal_proc(void *arg, int pending) 629 { 630 struct ath_softc *sc = arg; 631 632 device_printf(sc->sc_dev, "hardware error; resetting\n"); 633 ath_reset(sc); 634 } 635 636 static void 637 ath_rxorn_proc(void *arg, int pending) 638 { 639 struct ath_softc *sc = arg; 640 641 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 642 ath_reset(sc); 643 } 644 645 static void 646 ath_bmiss_proc(void *arg, int pending) 647 { 648 struct ath_softc *sc = arg; 649 struct ieee80211com *ic = &sc->sc_ic; 650 651 DPRINTF(("ath_bmiss_proc: pending %u\n", pending)); 652 KASSERT(ic->ic_opmode == IEEE80211_M_STA, 653 ("unexpect operating mode %u", ic->ic_opmode)); 654 if (ic->ic_state == IEEE80211_S_RUN) 655 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 656 } 657 658 static u_int 659 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 660 { 661 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 662 663 switch (mode) { 664 case IEEE80211_MODE_AUTO: 665 return 0; 666 case IEEE80211_MODE_11A: 667 return CHANNEL_A; 668 case IEEE80211_MODE_11B: 669 return CHANNEL_B; 670 case IEEE80211_MODE_11G: 671 return CHANNEL_PUREG; 672 case IEEE80211_MODE_TURBO: 673 return CHANNEL_T; 674 default: 675 panic("%s: unsupported mode %d\n", __func__, mode); 676 return 0; 677 } 678 } 679 680 #ifdef __NetBSD__ 681 static int 682 ath_init(struct ifnet *ifp) 683 { 684 return ath_init1((struct ath_softc *)ifp->if_softc); 685 } 686 #else 687 static void 688 ath_init(void *arg) 689 { 690 (void)ath_init1((struct ath_softc *)arg); 691 } 692 #endif 693 694 static int 695 ath_init1(struct ath_softc *sc) 696 { 697 struct ieee80211com *ic = &sc->sc_ic; 698 struct ifnet *ifp = &ic->ic_if; 699 struct ieee80211_node *ni; 700 enum ieee80211_phymode mode; 701 struct ath_hal *ah = sc->sc_ah; 702 HAL_STATUS status; 703 HAL_CHANNEL hchan; 704 int error = 0; 705 ath_softc_critsect_decl(s); 706 707 DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags)); 708 709 #ifdef __NetBSD__ 710 if ((error = ath_enable(sc)) != 0) 711 return error; 712 #endif 713 714 ath_softc_critsect_begin(sc, s); 715 /* 716 * Stop anything previously setup. This is safe 717 * whether this is the first time through or not. 718 */ 719 ath_stop(ifp); 720 721 /* 722 * The basic interface to setting the hardware in a good 723 * state is ``reset''. On return the hardware is known to 724 * be powered up and with interrupts disabled. This must 725 * be followed by initialization of the appropriate bits 726 * and then setup of the interrupt mask. 727 */ 728 hchan.channel = ic->ic_ibss_chan->ic_freq; 729 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 730 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 731 if_printf(ifp, "unable to reset hardware; hal status %u\n", 732 status); 733 error = -1; 734 goto done; 735 } 736 737 /* 738 * Setup the hardware after reset: the key cache 739 * is filled as needed and the receive engine is 740 * set going. Frame transmit is handled entirely 741 * in the frame output path; there's nothing to do 742 * here except setup the interrupt mask. 743 */ 744 if (ic->ic_flags & IEEE80211_F_WEPON) 745 ath_initkeytable(sc); 746 if ((error = ath_startrecv(sc)) != 0) { 747 if_printf(ifp, "unable to start recv logic\n"); 748 goto done; 749 } 750 751 /* 752 * Enable interrupts. 753 */ 754 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 755 | HAL_INT_RXEOL | HAL_INT_RXORN 756 | HAL_INT_FATAL | HAL_INT_GLOBAL; 757 ath_hal_intrset(ah, sc->sc_imask); 758 759 ifp->if_flags |= IFF_RUNNING; 760 ic->ic_state = IEEE80211_S_INIT; 761 762 /* 763 * The hardware should be ready to go now so it's safe 764 * to kick the 802.11 state machine as it's likely to 765 * immediately call back to us to send mgmt frames. 766 */ 767 ni = ic->ic_bss; 768 ni->ni_chan = ic->ic_ibss_chan; 769 mode = ieee80211_chan2mode(ic, ni->ni_chan); 770 if (mode != sc->sc_curmode) 771 ath_setcurmode(sc, mode); 772 if (ic->ic_opmode != IEEE80211_M_MONITOR) 773 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 774 else 775 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 776 done: 777 ath_softc_critsect_end(sc, s); 778 return error; 779 } 780 781 static void 782 ath_stop(struct ifnet *ifp) 783 { 784 struct ieee80211com *ic = (struct ieee80211com *) ifp; 785 struct ath_softc *sc = ifp->if_softc; 786 struct ath_hal *ah = sc->sc_ah; 787 ath_softc_critsect_decl(s); 788 789 DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n", 790 sc->sc_invalid, ifp->if_flags)); 791 792 ath_softc_critsect_begin(sc, s); 793 if (ifp->if_flags & IFF_RUNNING) { 794 /* 795 * Shutdown the hardware and driver: 796 * disable interrupts 797 * turn off timers 798 * clear transmit machinery 799 * clear receive machinery 800 * drain and release tx queues 801 * reclaim beacon resources 802 * reset 802.11 state machine 803 * power down hardware 804 * 805 * Note that some of this work is not possible if the 806 * hardware is gone (invalid). 807 */ 808 ifp->if_flags &= ~IFF_RUNNING; 809 ifp->if_timer = 0; 810 if (!sc->sc_invalid) 811 ath_hal_intrset(ah, 0); 812 ath_draintxq(sc); 813 if (!sc->sc_invalid) 814 ath_stoprecv(sc); 815 else 816 sc->sc_rxlink = NULL; 817 #ifdef __FreeBSD__ 818 IF_DRAIN(&ifp->if_snd); 819 #else 820 IF_PURGE(&ifp->if_snd); 821 #endif 822 ath_beacon_free(sc); 823 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 824 if (!sc->sc_invalid) { 825 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 826 } 827 #ifdef __NetBSD__ 828 ath_disable(sc); 829 #endif 830 } 831 ath_softc_critsect_end(sc, s); 832 } 833 834 /* 835 * Reset the hardware w/o losing operational state. This is 836 * basically a more efficient way of doing ath_stop, ath_init, 837 * followed by state transitions to the current 802.11 838 * operational state. Used to recover from errors rx overrun 839 * and to reset the hardware when rf gain settings must be reset. 840 */ 841 static void 842 ath_reset(struct ath_softc *sc) 843 { 844 struct ieee80211com *ic = &sc->sc_ic; 845 struct ifnet *ifp = &ic->ic_if; 846 struct ath_hal *ah = sc->sc_ah; 847 struct ieee80211_channel *c; 848 HAL_STATUS status; 849 HAL_CHANNEL hchan; 850 851 /* 852 * Convert to a HAL channel description with the flags 853 * constrained to reflect the current operating mode. 854 */ 855 c = ic->ic_ibss_chan; 856 hchan.channel = c->ic_freq; 857 hchan.channelFlags = ath_chan2flags(ic, c); 858 859 ath_hal_intrset(ah, 0); /* disable interrupts */ 860 ath_draintxq(sc); /* stop xmit side */ 861 ath_stoprecv(sc); /* stop recv side */ 862 /* NB: indicate channel change so we do a full reset */ 863 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 864 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 865 __func__, status); 866 ath_hal_intrset(ah, sc->sc_imask); 867 if (ath_startrecv(sc) != 0) /* restart recv */ 868 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 869 ath_start(ifp); /* restart xmit */ 870 if (ic->ic_state == IEEE80211_S_RUN) 871 ath_beacon_config(sc); /* restart beacons */ 872 } 873 874 static void 875 ath_start(struct ifnet *ifp) 876 { 877 struct ath_softc *sc = ifp->if_softc; 878 struct ath_hal *ah = sc->sc_ah; 879 struct ieee80211com *ic = &sc->sc_ic; 880 struct ieee80211_node *ni; 881 struct ath_buf *bf; 882 struct mbuf *m; 883 struct ieee80211_frame *wh; 884 ath_txbuf_critsect_decl(s); 885 886 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 887 return; 888 for (;;) { 889 /* 890 * Grab a TX buffer and associated resources. 891 */ 892 ath_txbuf_critsect_begin(sc, s); 893 bf = TAILQ_FIRST(&sc->sc_txbuf); 894 if (bf != NULL) 895 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 896 ath_txbuf_critsect_end(sc, s); 897 if (bf == NULL) { 898 DPRINTF(("ath_start: out of xmit buffers\n")); 899 sc->sc_stats.ast_tx_qstop++; 900 ifp->if_flags |= IFF_OACTIVE; 901 break; 902 } 903 /* 904 * Poll the management queue for frames; they 905 * have priority over normal data frames. 906 */ 907 IF_DEQUEUE(&ic->ic_mgtq, m); 908 if (m == NULL) { 909 /* 910 * No data frames go out unless we're associated. 911 */ 912 if (ic->ic_state != IEEE80211_S_RUN) { 913 DPRINTF(("ath_start: ignore data packet, " 914 "state %u\n", ic->ic_state)); 915 sc->sc_stats.ast_tx_discard++; 916 ath_txbuf_critsect_begin(sc, s); 917 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 918 ath_txbuf_critsect_end(sc, s); 919 break; 920 } 921 IF_DEQUEUE(&ifp->if_snd, m); 922 if (m == NULL) { 923 ath_txbuf_critsect_begin(sc, s); 924 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 925 ath_txbuf_critsect_end(sc, s); 926 break; 927 } 928 ifp->if_opackets++; 929 930 #ifdef __NetBSD__ 931 #if NBPFILTER > 0 932 if (ifp->if_bpf) 933 bpf_mtap(ifp->if_bpf, m); 934 #endif 935 #endif 936 #ifdef __FreeBSD__ 937 BPF_MTAP(ifp, m); 938 #endif 939 /* 940 * Encapsulate the packet in prep for transmission. 941 */ 942 m = ieee80211_encap(ifp, m, &ni); 943 if (m == NULL) { 944 DPRINTF(("ath_start: encapsulation failure\n")); 945 sc->sc_stats.ast_tx_encap++; 946 goto bad; 947 } 948 wh = mtod(m, struct ieee80211_frame *); 949 if (ic->ic_flags & IEEE80211_F_WEPON) 950 wh->i_fc[1] |= IEEE80211_FC1_WEP; 951 } else { 952 /* 953 * Hack! The referenced node pointer is in the 954 * rcvif field of the packet header. This is 955 * placed there by ieee80211_mgmt_output because 956 * we need to hold the reference with the frame 957 * and there's no other way (other than packet 958 * tags which we consider too expensive to use) 959 * to pass it along. 960 */ 961 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 962 m->m_pkthdr.rcvif = NULL; 963 964 wh = mtod(m, struct ieee80211_frame *); 965 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 966 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 967 /* fill time stamp */ 968 u_int64_t tsf; 969 u_int32_t *tstamp; 970 971 tsf = ath_hal_gettsf64(ah); 972 /* XXX: adjust 100us delay to xmit */ 973 tsf += 100; 974 tstamp = (u_int32_t *)&wh[1]; 975 tstamp[0] = htole32(tsf & 0xffffffff); 976 tstamp[1] = htole32(tsf >> 32); 977 } 978 sc->sc_stats.ast_tx_mgmt++; 979 } 980 #if NBPFILTER > 0 981 if (ic->ic_rawbpf) 982 bpf_mtap(ic->ic_rawbpf, m); 983 #endif 984 985 #if NBPFILTER > 0 986 if (sc->sc_drvbpf) { 987 #ifdef __FreeBSD__ 988 struct mbuf *mb; 989 990 MGETHDR(mb, M_DONTWAIT, m->m_type); 991 if (mb != NULL) { 992 sc->sc_tx_th.wt_rate = 993 ni->ni_rates.rs_rates[ni->ni_txrate]; 994 995 mb->m_next = m; 996 mb->m_data = (caddr_t)&sc->sc_tx_th; 997 mb->m_len = sizeof(sc->sc_tx_th); 998 mb->m_pkthdr.len += mb->m_len; 999 bpf_mtap(sc->sc_drvbpf, mb); 1000 m_free(mb); 1001 } 1002 #else 1003 struct mbuf mb; 1004 1005 M_COPY_PKTHDR(&mb, m); 1006 sc->sc_tx_th.wt_rate = 1007 ni->ni_rates.rs_rates[ni->ni_txrate]; 1008 1009 mb.m_next = m; 1010 mb.m_data = (caddr_t)&sc->sc_tx_th; 1011 mb.m_len = sizeof(sc->sc_tx_th); 1012 mb.m_pkthdr.len += mb.m_len; 1013 bpf_mtap(sc->sc_drvbpf, &mb); 1014 #endif 1015 } 1016 #endif 1017 1018 /* 1019 * TODO: 1020 * The duration field of 802.11 header should be filled. 1021 * XXX This may be done in the ieee80211 layer, but the upper 1022 * doesn't know the detail of parameters such as IFS 1023 * for now.. 1024 */ 1025 if (ath_tx_start(sc, ni, bf, m)) { 1026 bad: 1027 ath_txbuf_critsect_begin(sc, s); 1028 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1029 ath_txbuf_critsect_end(sc, s); 1030 ifp->if_oerrors++; 1031 if (ni && ni != ic->ic_bss) 1032 ieee80211_free_node(ic, ni); 1033 continue; 1034 } 1035 1036 sc->sc_tx_timer = 5; 1037 ifp->if_timer = 1; 1038 } 1039 } 1040 1041 static int 1042 ath_media_change(struct ifnet *ifp) 1043 { 1044 int error; 1045 1046 error = ieee80211_media_change(ifp); 1047 if (error == ENETRESET) { 1048 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1049 (IFF_RUNNING|IFF_UP)) 1050 ath_init(ifp); /* XXX lose error */ 1051 error = 0; 1052 } 1053 return error; 1054 } 1055 1056 static void 1057 ath_watchdog(struct ifnet *ifp) 1058 { 1059 struct ath_softc *sc = ifp->if_softc; 1060 struct ieee80211com *ic = &sc->sc_ic; 1061 1062 ifp->if_timer = 0; 1063 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1064 return; 1065 if (sc->sc_tx_timer) { 1066 if (--sc->sc_tx_timer == 0) { 1067 if_printf(ifp, "device timeout\n"); 1068 #ifdef AR_DEBUG 1069 if (ath_debug) 1070 ath_hal_dumpstate(sc->sc_ah); 1071 #endif /* AR_DEBUG */ 1072 ath_init(ifp); /* XXX ath_reset??? */ 1073 ifp->if_oerrors++; 1074 sc->sc_stats.ast_watchdog++; 1075 return; 1076 } 1077 ifp->if_timer = 1; 1078 } 1079 if (ic->ic_fixed_rate == -1) { 1080 /* 1081 * Run the rate control algorithm if we're not 1082 * locked at a fixed rate. 1083 */ 1084 if (ic->ic_opmode == IEEE80211_M_STA) 1085 ath_rate_ctl(sc, ic->ic_bss); 1086 else 1087 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1088 } 1089 ieee80211_watchdog(ifp); 1090 } 1091 1092 static int 1093 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1094 { 1095 struct ath_softc *sc = ifp->if_softc; 1096 struct ifreq *ifr = (struct ifreq *)data; 1097 int error = 0; 1098 ath_softc_critsect_decl(s); 1099 1100 ath_softc_critsect_begin(sc, s); 1101 switch (cmd) { 1102 case SIOCSIFFLAGS: 1103 if (ifp->if_flags & IFF_UP) { 1104 if (ifp->if_flags & IFF_RUNNING) { 1105 /* 1106 * To avoid rescanning another access point, 1107 * do not call ath_init() here. Instead, 1108 * only reflect promisc mode settings. 1109 */ 1110 ath_mode_init(sc); 1111 } else 1112 ath_init(ifp); /* XXX lose error */ 1113 } else 1114 ath_stop(ifp); 1115 break; 1116 case SIOCADDMULTI: 1117 case SIOCDELMULTI: 1118 #ifdef __FreeBSD__ 1119 /* 1120 * The upper layer has already installed/removed 1121 * the multicast address(es), just recalculate the 1122 * multicast filter for the card. 1123 */ 1124 if (ifp->if_flags & IFF_RUNNING) 1125 ath_mode_init(sc); 1126 #endif 1127 #ifdef __NetBSD__ 1128 error = (cmd == SIOCADDMULTI) ? 1129 ether_addmulti(ifr, &sc->sc_ic.ic_ec) : 1130 ether_delmulti(ifr, &sc->sc_ic.ic_ec); 1131 if (error == ENETRESET) { 1132 if (ifp->if_flags & IFF_RUNNING) 1133 ath_mode_init(sc); 1134 } 1135 #endif 1136 break; 1137 case SIOCGATHSTATS: 1138 copyout(&sc->sc_stats, ifr->ifr_data, sizeof (sc->sc_stats)); 1139 break; 1140 default: 1141 error = ieee80211_ioctl(ifp, cmd, data); 1142 if (error == ENETRESET) { 1143 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1144 (IFF_RUNNING|IFF_UP)) 1145 ath_init(ifp); /* XXX lose error */ 1146 error = 0; 1147 } 1148 break; 1149 } 1150 ath_softc_critsect_end(sc, s); 1151 return error; 1152 } 1153 1154 /* 1155 * Fill the hardware key cache with key entries. 1156 */ 1157 static void 1158 ath_initkeytable(struct ath_softc *sc) 1159 { 1160 struct ieee80211com *ic = &sc->sc_ic; 1161 struct ath_hal *ah = sc->sc_ah; 1162 int i; 1163 1164 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1165 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1166 if (k->wk_len == 0) 1167 ath_hal_keyreset(ah, i); 1168 else 1169 /* XXX return value */ 1170 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 1171 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 1172 } 1173 } 1174 1175 static void 1176 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1177 { 1178 u_int32_t val; 1179 u_int8_t pos; 1180 1181 val = LE_READ_4(dl + 0); 1182 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1183 val = LE_READ_4(dl + 3); 1184 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1185 pos &= 0x3f; 1186 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1187 } 1188 1189 #ifdef __FreeBSD__ 1190 static void 1191 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1192 { 1193 struct ieee80211com *ic = &sc->sc_ic; 1194 struct ifnet *ifp = &ic->ic_if; 1195 struct ifmultiaddr *ifma; 1196 1197 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1198 caddr_t dl; 1199 1200 /* calculate XOR of eight 6bit values */ 1201 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1202 ath_mcastfilter_accum(dl, &mfilt); 1203 } 1204 } 1205 #else 1206 static void 1207 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1208 { 1209 struct ifnet *ifp = &sc->sc_ic.ic_if; 1210 struct ether_multi *enm; 1211 struct ether_multistep estep; 1212 1213 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1214 while (enm != NULL) { 1215 /* XXX Punt on ranges. */ 1216 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1217 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1218 ifp->if_flags |= IFF_ALLMULTI; 1219 return; 1220 } 1221 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1222 ETHER_NEXT_MULTI(estep, enm); 1223 } 1224 ifp->if_flags &= ~IFF_ALLMULTI; 1225 } 1226 #endif 1227 1228 static void 1229 ath_mode_init(struct ath_softc *sc) 1230 { 1231 struct ieee80211com *ic = &sc->sc_ic; 1232 struct ath_hal *ah = sc->sc_ah; 1233 struct ifnet *ifp = &ic->ic_if; 1234 u_int32_t rfilt, mfilt[2]; 1235 1236 /* configure operational mode */ 1237 ath_hal_setopmode(ah, ic->ic_opmode); 1238 1239 /* receive filter */ 1240 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1241 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1242 if (ic->ic_opmode != IEEE80211_M_STA) 1243 rfilt |= HAL_RX_FILTER_PROBEREQ; 1244 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 1245 (ifp->if_flags & IFF_PROMISC)) 1246 rfilt |= HAL_RX_FILTER_PROM; 1247 if (ic->ic_state == IEEE80211_S_SCAN) 1248 rfilt |= HAL_RX_FILTER_BEACON; 1249 ath_hal_setrxfilter(ah, rfilt); 1250 1251 /* calculate and install multicast filter */ 1252 #ifdef __FreeBSD__ 1253 if ((ifp->if_flags & IFF_ALLMULTI) == 0) { 1254 mfilt[0] = mfilt[1] = 0; 1255 ath_mcastfilter_compute(sc, &mfilt); 1256 } else { 1257 mfilt[0] = mfilt[1] = ~0; 1258 } 1259 #endif 1260 #ifdef __NetBSD__ 1261 mfilt[0] = mfilt[1] = 0; 1262 ath_mcastfilter_compute(sc, &mfilt); 1263 #endif 1264 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1265 DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n", 1266 rfilt, mfilt[0], mfilt[1])); 1267 } 1268 1269 #ifdef __FreeBSD__ 1270 static void 1271 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1272 { 1273 struct ath_buf *bf = arg; 1274 1275 KASSERT(nseg <= ATH_MAX_SCATTER, 1276 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1277 bf->bf_mapsize = mapsize; 1278 bf->bf_nseg = nseg; 1279 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1280 } 1281 #endif /* __FreeBSD__ */ 1282 1283 static struct mbuf * 1284 ath_getmbuf(int flags, int type, u_int pktlen) 1285 { 1286 struct mbuf *m; 1287 1288 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1289 #ifdef __FreeBSD__ 1290 if (pktlen <= MHLEN) 1291 MGETHDR(m, flags, type); 1292 else 1293 m = m_getcl(flags, type, M_PKTHDR); 1294 #else 1295 MGETHDR(m, flags, type); 1296 if (m != NULL && pktlen > MHLEN) 1297 MCLGET(m, flags); 1298 #endif 1299 return m; 1300 } 1301 1302 static int 1303 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1304 { 1305 struct ieee80211com *ic = &sc->sc_ic; 1306 struct ifnet *ifp = &ic->ic_if; 1307 struct ath_hal *ah = sc->sc_ah; 1308 struct ieee80211_frame *wh; 1309 struct ath_buf *bf; 1310 struct ath_desc *ds; 1311 struct mbuf *m; 1312 int error, pktlen; 1313 u_int8_t *frm, rate; 1314 u_int16_t capinfo; 1315 struct ieee80211_rateset *rs; 1316 const HAL_RATE_TABLE *rt; 1317 1318 bf = sc->sc_bcbuf; 1319 if (bf->bf_m != NULL) { 1320 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1321 m_freem(bf->bf_m); 1322 bf->bf_m = NULL; 1323 bf->bf_node = NULL; 1324 } 1325 /* 1326 * NB: the beacon data buffer must be 32-bit aligned; 1327 * we assume the mbuf routines will return us something 1328 * with this alignment (perhaps should assert). 1329 */ 1330 rs = &ni->ni_rates; 1331 pktlen = sizeof (struct ieee80211_frame) 1332 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 6; 1333 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1334 pktlen += 2; 1335 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1336 if (m == NULL) { 1337 DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n", 1338 pktlen)); 1339 sc->sc_stats.ast_be_nombuf++; 1340 return ENOMEM; 1341 } 1342 1343 wh = mtod(m, struct ieee80211_frame *); 1344 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1345 IEEE80211_FC0_SUBTYPE_BEACON; 1346 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1347 *(u_int16_t *)wh->i_dur = 0; 1348 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1349 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1350 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1351 *(u_int16_t *)wh->i_seq = 0; 1352 1353 /* 1354 * beacon frame format 1355 * [8] time stamp 1356 * [2] beacon interval 1357 * [2] cabability information 1358 * [tlv] ssid 1359 * [tlv] supported rates 1360 * [tlv] parameter set (IBSS) 1361 * [tlv] extended supported rates 1362 */ 1363 frm = (u_int8_t *)&wh[1]; 1364 memset(frm, 0, 8); /* timestamp is set by hardware */ 1365 frm += 8; 1366 *(u_int16_t *)frm = htole16(ni->ni_intval); 1367 frm += 2; 1368 if (ic->ic_opmode == IEEE80211_M_IBSS) 1369 capinfo = IEEE80211_CAPINFO_IBSS; 1370 else 1371 capinfo = IEEE80211_CAPINFO_ESS; 1372 if (ic->ic_flags & IEEE80211_F_WEPON) 1373 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1374 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1375 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1376 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1377 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1378 *(u_int16_t *)frm = htole16(capinfo); 1379 frm += 2; 1380 *frm++ = IEEE80211_ELEMID_SSID; 1381 *frm++ = ni->ni_esslen; 1382 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1383 frm += ni->ni_esslen; 1384 frm = ieee80211_add_rates(frm, rs); 1385 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1386 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1387 *frm++ = 2; 1388 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1389 } else { 1390 /* TODO: TIM */ 1391 *frm++ = IEEE80211_ELEMID_TIM; 1392 *frm++ = 4; /* length */ 1393 *frm++ = 0; /* DTIM count */ 1394 *frm++ = 1; /* DTIM period */ 1395 *frm++ = 0; /* bitmap control */ 1396 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1397 } 1398 frm = ieee80211_add_xrates(frm, rs); 1399 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1400 KASSERT(m->m_pkthdr.len <= pktlen, 1401 ("beacon bigger than expected, len %u calculated %u", 1402 m->m_pkthdr.len, pktlen)); 1403 1404 DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len)); 1405 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1406 if (error != 0) { 1407 m_freem(m); 1408 return error; 1409 } 1410 KASSERT(bf->bf_nseg == 1, 1411 ("ath_beacon_alloc: multi-segment packet; nseg %u", 1412 bf->bf_nseg)); 1413 bf->bf_m = m; 1414 1415 /* setup descriptors */ 1416 ds = bf->bf_desc; 1417 1418 ds->ds_link = 0; 1419 ds->ds_data = bf->bf_segs[0].ds_addr; 1420 1421 DPRINTF2(("%s: segaddr %p seglen %u\n", __func__, 1422 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1423 1424 /* 1425 * Calculate rate code. 1426 * XXX everything at min xmit rate 1427 */ 1428 rt = sc->sc_currates; 1429 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1430 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1431 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1432 else 1433 rate = rt->info[0].rateCode; 1434 if (!ath_hal_setuptxdesc(ah, ds 1435 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1436 , sizeof(struct ieee80211_frame) /* header length */ 1437 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1438 , 0x20 /* txpower XXX */ 1439 , rate, 1 /* series 0 rate/tries */ 1440 , HAL_TXKEYIX_INVALID /* no encryption */ 1441 , 0 /* antenna mode */ 1442 , HAL_TXDESC_NOACK /* no ack for beacons */ 1443 , 0 /* rts/cts rate */ 1444 , 0 /* rts/cts duration */ 1445 )) { 1446 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1447 return -1; 1448 } 1449 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1450 /* XXX verify mbuf data area covers this roundup */ 1451 if (!ath_hal_filltxdesc(ah, ds 1452 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1453 , AH_TRUE /* first segment */ 1454 , AH_TRUE /* last segment */ 1455 )) { 1456 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1457 return -1; 1458 } 1459 1460 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1461 1462 return 0; 1463 } 1464 1465 static void 1466 ath_beacon_proc(void *arg, int pending) 1467 { 1468 struct ath_softc *sc = arg; 1469 struct ieee80211com *ic = &sc->sc_ic; 1470 struct ath_buf *bf = sc->sc_bcbuf; 1471 struct ath_hal *ah = sc->sc_ah; 1472 1473 DPRINTF2(("%s: pending %u\n", __func__, pending)); 1474 if (ic->ic_opmode == IEEE80211_M_STA || 1475 bf == NULL || bf->bf_m == NULL) { 1476 DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n", 1477 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1478 return; 1479 } 1480 /* TODO: update beacon to reflect PS poll state */ 1481 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1482 DPRINTF(("%s: beacon queue %u did not stop?", 1483 __func__, sc->sc_bhalq)); 1484 return; /* busy, XXX is this right? */ 1485 } 1486 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1487 1488 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1489 ath_hal_txstart(ah, sc->sc_bhalq); 1490 DPRINTF2(("%s: BCDP%u = %p (%p)\n", __func__, 1491 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1492 } 1493 1494 static void 1495 ath_beacon_free(struct ath_softc *sc) 1496 { 1497 struct ath_buf *bf = sc->sc_bcbuf; 1498 1499 if (bf->bf_m != NULL) { 1500 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1501 m_freem(bf->bf_m); 1502 bf->bf_m = NULL; 1503 bf->bf_node = NULL; 1504 } 1505 } 1506 1507 /* 1508 * Configure the beacon and sleep timers. 1509 * 1510 * When operating as an AP this resets the TSF and sets 1511 * up the hardware to notify us when we need to issue beacons. 1512 * 1513 * When operating in station mode this sets up the beacon 1514 * timers according to the timestamp of the last received 1515 * beacon and the current TSF, configures PCF and DTIM 1516 * handling, programs the sleep registers so the hardware 1517 * will wakeup in time to receive beacons, and configures 1518 * the beacon miss handling so we'll receive a BMISS 1519 * interrupt when we stop seeing beacons from the AP 1520 * we've associated with. 1521 */ 1522 static void 1523 ath_beacon_config(struct ath_softc *sc) 1524 { 1525 struct ath_hal *ah = sc->sc_ah; 1526 struct ieee80211com *ic = &sc->sc_ic; 1527 struct ieee80211_node *ni = ic->ic_bss; 1528 u_int32_t nexttbtt; 1529 1530 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1531 (LE_READ_4(ni->ni_tstamp) >> 10); 1532 DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1533 nexttbtt += ni->ni_intval; 1534 if (ic->ic_opmode == IEEE80211_M_STA) { 1535 HAL_BEACON_STATE bs; 1536 u_int32_t bmisstime; 1537 1538 /* NB: no PCF support right now */ 1539 memset(&bs, 0, sizeof(bs)); 1540 bs.bs_intval = ni->ni_intval; 1541 bs.bs_nexttbtt = nexttbtt; 1542 bs.bs_dtimperiod = bs.bs_intval; 1543 bs.bs_nextdtim = nexttbtt; 1544 /* 1545 * Calculate the number of consecutive beacons to miss 1546 * before taking a BMISS interrupt. The configuration 1547 * is specified in ms, so we need to convert that to 1548 * TU's and then calculate based on the beacon interval. 1549 * Note that we clamp the result to at most 10 beacons. 1550 */ 1551 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1552 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1553 if (bs.bs_bmissthreshold > 10) 1554 bs.bs_bmissthreshold = 10; 1555 else if (bs.bs_bmissthreshold <= 0) 1556 bs.bs_bmissthreshold = 1; 1557 1558 /* 1559 * Calculate sleep duration. The configuration is 1560 * given in ms. We insure a multiple of the beacon 1561 * period is used. Also, if the sleep duration is 1562 * greater than the DTIM period then it makes senses 1563 * to make it a multiple of that. 1564 * 1565 * XXX fixed at 100ms 1566 */ 1567 bs.bs_sleepduration = 1568 roundup((100 * 1000) / 1024, bs.bs_intval); 1569 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1570 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1571 1572 DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1573 , __func__ 1574 , bs.bs_intval 1575 , bs.bs_nexttbtt 1576 , bs.bs_dtimperiod 1577 , bs.bs_nextdtim 1578 , bs.bs_bmissthreshold 1579 , bs.bs_sleepduration 1580 )); 1581 ath_hal_intrset(ah, 0); 1582 /* 1583 * Reset our tsf so the hardware will update the 1584 * tsf register to reflect timestamps found in 1585 * received beacons. 1586 */ 1587 ath_hal_resettsf(ah); 1588 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1589 sc->sc_imask |= HAL_INT_BMISS; 1590 ath_hal_intrset(ah, sc->sc_imask); 1591 } else { 1592 DPRINTF(("%s: intval %u nexttbtt %u\n", 1593 __func__, ni->ni_intval, nexttbtt)); 1594 ath_hal_intrset(ah, 0); 1595 ath_hal_beaconinit(ah, ic->ic_opmode, 1596 nexttbtt, ni->ni_intval); 1597 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1598 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1599 ath_hal_intrset(ah, sc->sc_imask); 1600 } 1601 } 1602 1603 #ifdef __FreeBSD__ 1604 static void 1605 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1606 { 1607 bus_addr_t *paddr = (bus_addr_t*) arg; 1608 *paddr = segs->ds_addr; 1609 } 1610 #endif 1611 1612 #ifdef __FreeBSD__ 1613 static int 1614 ath_desc_alloc(struct ath_softc *sc) 1615 { 1616 int i, bsize, error; 1617 struct ath_desc *ds; 1618 struct ath_buf *bf; 1619 1620 /* allocate descriptors */ 1621 sc->sc_desc_len = sizeof(struct ath_desc) * 1622 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1623 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1624 if (error != 0) 1625 return error; 1626 1627 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1628 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1629 1630 if (error != 0) 1631 goto fail0; 1632 1633 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1634 sc->sc_desc, sc->sc_desc_len, 1635 ath_load_cb, &sc->sc_desc_paddr, 1636 BUS_DMA_NOWAIT); 1637 if (error != 0) 1638 goto fail1; 1639 1640 ds = sc->sc_desc; 1641 DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n", 1642 ds, sc->sc_desc_len, 1643 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1644 1645 /* allocate buffers */ 1646 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1647 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1648 if (bf == NULL) { 1649 printf("%s: unable to allocate Tx/Rx buffers\n", 1650 sc->sc_dev.dv_xname); 1651 error = -1; 1652 goto fail2; 1653 } 1654 sc->sc_bufptr = bf; 1655 1656 TAILQ_INIT(&sc->sc_rxbuf); 1657 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1658 bf->bf_desc = ds; 1659 bf->bf_daddr = sc->sc_desc_paddr + 1660 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1661 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1662 &bf->bf_dmamap); 1663 if (error != 0) 1664 break; 1665 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1666 } 1667 1668 TAILQ_INIT(&sc->sc_txbuf); 1669 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1670 bf->bf_desc = ds; 1671 bf->bf_daddr = sc->sc_desc_paddr + 1672 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1673 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1674 &bf->bf_dmamap); 1675 if (error != 0) 1676 break; 1677 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1678 } 1679 TAILQ_INIT(&sc->sc_txq); 1680 1681 /* beacon buffer */ 1682 bf->bf_desc = ds; 1683 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1684 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1685 if (error != 0) 1686 return error; 1687 sc->sc_bcbuf = bf; 1688 return 0; 1689 1690 fail2: 1691 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1692 fail1: 1693 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1694 fail0: 1695 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1696 sc->sc_ddmamap = NULL; 1697 return error; 1698 } 1699 #else 1700 static int 1701 ath_desc_alloc(struct ath_softc *sc) 1702 { 1703 int i, bsize, error = -1; 1704 struct ath_desc *ds; 1705 struct ath_buf *bf; 1706 1707 /* allocate descriptors */ 1708 sc->sc_desc_len = sizeof(struct ath_desc) * 1709 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1710 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1711 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1712 printf("%s: unable to allocate control data, error = %d\n", 1713 sc->sc_dev.dv_xname, error); 1714 goto fail0; 1715 } 1716 1717 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1718 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1719 printf("%s: unable to map control data, error = %d\n", 1720 sc->sc_dev.dv_xname, error); 1721 goto fail1; 1722 } 1723 1724 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1725 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 1726 printf("%s: unable to create control data DMA map, " 1727 "error = %d\n", sc->sc_dev.dv_xname, error); 1728 goto fail2; 1729 } 1730 1731 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 1732 sc->sc_desc_len, NULL, 0)) != 0) { 1733 printf("%s: unable to load control data DMA map, error = %d\n", 1734 sc->sc_dev.dv_xname, error); 1735 goto fail3; 1736 } 1737 1738 ds = sc->sc_desc; 1739 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 1740 1741 DPRINTF(("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 1742 ds, (u_long)sc->sc_desc_len, 1743 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1744 1745 /* allocate buffers */ 1746 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1747 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1748 if (bf == NULL) { 1749 printf("%s: unable to allocate Tx/Rx buffers\n", 1750 sc->sc_dev.dv_xname); 1751 error = ENOMEM; 1752 goto fail3; 1753 } 1754 sc->sc_bufptr = bf; 1755 1756 TAILQ_INIT(&sc->sc_rxbuf); 1757 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1758 bf->bf_desc = ds; 1759 bf->bf_daddr = sc->sc_desc_paddr + 1760 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1761 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 1762 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1763 printf("%s: unable to create Rx dmamap, error = %d\n", 1764 sc->sc_dev.dv_xname, error); 1765 goto fail4; 1766 } 1767 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1768 } 1769 1770 TAILQ_INIT(&sc->sc_txbuf); 1771 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1772 bf->bf_desc = ds; 1773 bf->bf_daddr = sc->sc_desc_paddr + 1774 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1775 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1776 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1777 printf("%s: unable to create Tx dmamap, error = %d\n", 1778 sc->sc_dev.dv_xname, error); 1779 goto fail5; 1780 } 1781 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1782 } 1783 TAILQ_INIT(&sc->sc_txq); 1784 1785 /* beacon buffer */ 1786 bf->bf_desc = ds; 1787 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1788 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 1789 &bf->bf_dmamap)) != 0) { 1790 printf("%s: unable to create beacon dmamap, error = %d\n", 1791 sc->sc_dev.dv_xname, error); 1792 goto fail5; 1793 } 1794 sc->sc_bcbuf = bf; 1795 return 0; 1796 1797 fail5: 1798 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 1799 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1800 continue; 1801 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1802 } 1803 fail4: 1804 for (i = 0; i < ATH_RXBUF; i++) { 1805 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1806 continue; 1807 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1808 } 1809 fail3: 1810 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1811 fail2: 1812 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1813 sc->sc_ddmamap = NULL; 1814 fail1: 1815 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 1816 fail0: 1817 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1818 return error; 1819 } 1820 #endif 1821 1822 static void 1823 ath_desc_free(struct ath_softc *sc) 1824 { 1825 struct ath_buf *bf; 1826 1827 #ifdef __FreeBSD__ 1828 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1829 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1830 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1831 #else 1832 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1833 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1834 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1835 #endif 1836 1837 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1838 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1839 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1840 m_freem(bf->bf_m); 1841 } 1842 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 1843 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1844 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 1845 if (bf->bf_m) { 1846 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1847 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1848 m_freem(bf->bf_m); 1849 bf->bf_m = NULL; 1850 } 1851 } 1852 if (sc->sc_bcbuf != NULL) { 1853 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1854 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1855 sc->sc_bcbuf = NULL; 1856 } 1857 1858 TAILQ_INIT(&sc->sc_rxbuf); 1859 TAILQ_INIT(&sc->sc_txbuf); 1860 TAILQ_INIT(&sc->sc_txq); 1861 free(sc->sc_bufptr, M_DEVBUF); 1862 sc->sc_bufptr = NULL; 1863 } 1864 1865 static struct ieee80211_node * 1866 ath_node_alloc(struct ieee80211com *ic) 1867 { 1868 struct ath_node *an = 1869 malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1870 return an ? &an->an_node : NULL; 1871 } 1872 1873 static void 1874 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 1875 { 1876 struct ath_softc *sc = ic->ic_if.if_softc; 1877 struct ath_buf *bf; 1878 1879 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1880 if (bf->bf_node == ni) 1881 bf->bf_node = NULL; 1882 } 1883 free(ni, M_DEVBUF); 1884 } 1885 1886 static void 1887 ath_node_copy(struct ieee80211com *ic, 1888 struct ieee80211_node *dst, const struct ieee80211_node *src) 1889 { 1890 *(struct ath_node *)dst = *(const struct ath_node *)src; 1891 } 1892 1893 static int 1894 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 1895 { 1896 struct ath_hal *ah = sc->sc_ah; 1897 int error; 1898 struct mbuf *m; 1899 struct ath_desc *ds; 1900 1901 m = bf->bf_m; 1902 if (m == NULL) { 1903 /* 1904 * NB: by assigning a page to the rx dma buffer we 1905 * implicitly satisfy the Atheros requirement that 1906 * this buffer be cache-line-aligned and sized to be 1907 * multiple of the cache line size. Not doing this 1908 * causes weird stuff to happen (for the 5210 at least). 1909 */ 1910 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 1911 if (m == NULL) { 1912 DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n")); 1913 sc->sc_stats.ast_rx_nombuf++; 1914 return ENOMEM; 1915 } 1916 bf->bf_m = m; 1917 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 1918 1919 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 1920 BUS_DMA_NOWAIT); 1921 if (error != 0) { 1922 DPRINTF(("ath_rxbuf_init: ath_buf_dmamap_load_mbuf failed;" 1923 " error %d\n", error)); 1924 sc->sc_stats.ast_rx_busdma++; 1925 return error; 1926 } 1927 KASSERT(bf->bf_nseg == 1, 1928 ("ath_rxbuf_init: multi-segment packet; nseg %u", 1929 bf->bf_nseg)); 1930 } 1931 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 1932 1933 /* setup descriptors */ 1934 ds = bf->bf_desc; 1935 ds->ds_link = 0; 1936 ds->ds_data = bf->bf_segs[0].ds_addr; 1937 ath_hal_setuprxdesc(ah, ds 1938 , m->m_len /* buffer size */ 1939 , 0 1940 ); 1941 1942 if (sc->sc_rxlink != NULL) 1943 *sc->sc_rxlink = bf->bf_daddr; 1944 sc->sc_rxlink = &ds->ds_link; 1945 return 0; 1946 } 1947 1948 static void 1949 ath_rx_proc(void *arg, int npending) 1950 { 1951 struct ath_softc *sc = arg; 1952 struct ath_buf *bf; 1953 struct ieee80211com *ic = &sc->sc_ic; 1954 struct ifnet *ifp = &ic->ic_if; 1955 struct ath_hal *ah = sc->sc_ah; 1956 struct ath_desc *ds; 1957 struct mbuf *m; 1958 struct ieee80211_frame *wh, whbuf; 1959 struct ieee80211_node *ni; 1960 int len; 1961 u_int phyerr; 1962 HAL_STATUS status; 1963 1964 DPRINTF2(("ath_rx_proc: pending %u\n", npending)); 1965 do { 1966 bf = TAILQ_FIRST(&sc->sc_rxbuf); 1967 if (bf == NULL) { /* NB: shouldn't happen */ 1968 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 1969 break; 1970 } 1971 m = bf->bf_m; 1972 if (m == NULL) { /* NB: shouldn't happen */ 1973 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 1974 continue; 1975 } 1976 ds = bf->bf_desc; 1977 status = ath_hal_rxprocdesc(ah, ds); 1978 #ifdef AR_DEBUG 1979 if (ath_debug > 1) 1980 ath_printrxbuf(bf, status == HAL_OK); 1981 #endif 1982 if (status == HAL_EINPROGRESS) 1983 break; 1984 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 1985 if (ds->ds_rxstat.rs_status != 0) { 1986 ifp->if_ierrors++; 1987 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 1988 sc->sc_stats.ast_rx_crcerr++; 1989 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 1990 sc->sc_stats.ast_rx_fifoerr++; 1991 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 1992 sc->sc_stats.ast_rx_badcrypt++; 1993 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 1994 sc->sc_stats.ast_rx_phyerr++; 1995 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 1996 sc->sc_stats.ast_rx_phy[phyerr]++; 1997 } 1998 goto rx_next; 1999 } 2000 2001 len = ds->ds_rxstat.rs_datalen; 2002 if (len < sizeof(struct ieee80211_frame)) { 2003 DPRINTF(("ath_rx_proc: short packet %d\n", len)); 2004 sc->sc_stats.ast_rx_tooshort++; 2005 goto rx_next; 2006 } 2007 2008 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 2009 2010 wh = mtod(m, struct ieee80211_frame *); 2011 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 2012 IEEE80211_FC0_TYPE_CTL && 2013 ic->ic_opmode != IEEE80211_M_MONITOR) { 2014 /* 2015 * Discard control frame when not in monitor mode. 2016 */ 2017 DPRINTF(("ath_rx_proc: control frame\n")); 2018 sc->sc_stats.ast_rx_ctl++; 2019 goto rx_next; 2020 } 2021 2022 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2023 bf->bf_m = NULL; 2024 m->m_pkthdr.rcvif = ifp; 2025 m->m_pkthdr.len = m->m_len = len; 2026 2027 #if NBPFILTER > 0 2028 if (sc->sc_drvbpf) { 2029 #ifdef __FreeBSD__ 2030 struct mbuf *mb; 2031 2032 /* XXX pre-allocate space when setting up recv's */ 2033 MGETHDR(mb, M_DONTWAIT, m->m_type); 2034 if (mb != NULL) { 2035 sc->sc_rx_th.wr_rate = 2036 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2037 sc->sc_rx_th.wr_antsignal = 2038 ds->ds_rxstat.rs_rssi; 2039 sc->sc_rx_th.wr_antenna = 2040 ds->ds_rxstat.rs_antenna; 2041 /* XXX TSF */ 2042 2043 (void) m_dup_pkthdr(mb, m, M_DONTWAIT); 2044 mb->m_next = m; 2045 mb->m_data = (caddr_t)&sc->sc_rx_th; 2046 mb->m_len = sizeof(sc->sc_rx_th); 2047 mb->m_pkthdr.len += mb->m_len; 2048 bpf_mtap(sc->sc_drvbpf, mb); 2049 m_free(mb); 2050 } 2051 #else 2052 /* XXX pre-allocate space when setting up recv's */ 2053 struct mbuf mb; 2054 2055 sc->sc_rx_th.wr_rate = 2056 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2057 sc->sc_rx_th.wr_antsignal = 2058 ds->ds_rxstat.rs_rssi; 2059 sc->sc_rx_th.wr_antenna = 2060 ds->ds_rxstat.rs_antenna; 2061 /* XXX TSF */ 2062 2063 M_COPY_PKTHDR(&mb, m); 2064 mb.m_next = m; 2065 mb.m_data = (caddr_t)&sc->sc_rx_th; 2066 mb.m_len = sizeof(sc->sc_rx_th); 2067 mb.m_pkthdr.len += mb.m_len; 2068 bpf_mtap(sc->sc_drvbpf, &mb); 2069 #endif 2070 } 2071 #endif 2072 2073 m_adj(m, -IEEE80211_CRC_LEN); 2074 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2075 /* 2076 * WEP is decrypted by hardware. Clear WEP bit 2077 * and trim WEP header for ieee80211_input(). 2078 */ 2079 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2080 memcpy(&whbuf, wh, sizeof(whbuf)); 2081 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2082 memcpy(mtod(m, caddr_t), &whbuf, sizeof(whbuf)); 2083 /* 2084 * Also trim WEP ICV from the tail. 2085 */ 2086 m_adj(m, -IEEE80211_WEP_CRCLEN); 2087 } 2088 2089 /* 2090 * Locate the node for sender, track state, and 2091 * then pass this node (referenced) up to the 802.11 2092 * layer for its use. We are required to pass 2093 * something so we fall back to ic_bss when this frame 2094 * is from an unknown sender. 2095 */ 2096 if (ic->ic_opmode != IEEE80211_M_STA) { 2097 ni = ieee80211_find_node(ic, wh->i_addr2); 2098 if (ni == NULL) 2099 ni = ieee80211_ref_node(ic->ic_bss); 2100 } else 2101 ni = ieee80211_ref_node(ic->ic_bss); 2102 ATH_NODE(ni)->an_rx_antenna = ds->ds_rxstat.rs_antenna; 2103 /* 2104 * Send frame up for processing. 2105 */ 2106 ieee80211_input(ifp, m, ni, 2107 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2108 /* 2109 * The frame may have caused the node to be marked for 2110 * reclamation (e.g. in response to a DEAUTH message) 2111 * so use free_node here instead of unref_node. 2112 */ 2113 if (ni == ic->ic_bss) 2114 ieee80211_unref_node(&ni); 2115 else 2116 ieee80211_free_node(ic, ni); 2117 rx_next: 2118 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2119 } while (ath_rxbuf_init(sc, bf) == 0); 2120 2121 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2122 ath_hal_rxena(ah); /* in case of RXEOL */ 2123 } 2124 2125 /* 2126 * XXX Size of an ACK control frame in bytes. 2127 */ 2128 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2129 2130 static int 2131 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2132 struct mbuf *m0) 2133 { 2134 struct ieee80211com *ic = &sc->sc_ic; 2135 struct ath_hal *ah = sc->sc_ah; 2136 struct ifnet *ifp = &sc->sc_ic.ic_if; 2137 int i, error, iswep, hdrlen, pktlen; 2138 u_int8_t rix, cix, txrate, ctsrate; 2139 struct ath_desc *ds; 2140 struct mbuf *m; 2141 struct ieee80211_frame *wh; 2142 u_int32_t iv; 2143 u_int8_t *ivp; 2144 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2145 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2146 u_int subtype, flags, ctsduration, antenna; 2147 HAL_PKT_TYPE atype; 2148 const HAL_RATE_TABLE *rt; 2149 HAL_BOOL shortPreamble; 2150 struct ath_node *an; 2151 ath_txq_critsect_decl(s); 2152 2153 wh = mtod(m0, struct ieee80211_frame *); 2154 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2155 hdrlen = sizeof(struct ieee80211_frame); 2156 pktlen = m0->m_pkthdr.len; 2157 2158 if (iswep) { 2159 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2160 m_adj(m0, hdrlen); 2161 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2162 if (m0 == NULL) { 2163 sc->sc_stats.ast_tx_nombuf++; 2164 return ENOMEM; 2165 } 2166 ivp = hdrbuf + hdrlen; 2167 /* 2168 * XXX 2169 * IV must not duplicate during the lifetime of the key. 2170 * But no mechanism to renew keys is defined in IEEE 802.11 2171 * WEP. And IV may be duplicated between other stations 2172 * because of the session key itself is shared. 2173 * So we use pseudo random IV for now, though it is not the 2174 * right way. 2175 */ 2176 iv = arc4random(); 2177 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 2178 ivp[i] = iv; 2179 iv >>= 8; 2180 } 2181 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 2182 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2183 /* 2184 * The ICV length must be included into hdrlen and pktlen. 2185 */ 2186 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2187 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2188 } 2189 pktlen += IEEE80211_CRC_LEN; 2190 2191 /* 2192 * Load the DMA map so any coalescing is done. This 2193 * also calculates the number of descriptors we need. 2194 */ 2195 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2196 if (error != 0) { 2197 sc->sc_stats.ast_tx_busdma++; 2198 m_freem(m0); 2199 return error; 2200 } 2201 /* 2202 * Discard null packets and check for packets that 2203 * require too many TX descriptors. We try to convert 2204 * the latter to a cluster. 2205 */ 2206 if (bf->bf_nseg > ATH_TXDESC) { /* too many desc's, linearize */ 2207 sc->sc_stats.ast_tx_linear++; 2208 MGETHDR(m, M_DONTWAIT, MT_DATA); 2209 if (m == NULL) { 2210 sc->sc_stats.ast_tx_nombuf++; 2211 m_freem(m0); 2212 return ENOMEM; 2213 } 2214 #ifdef __FreeBSD__ 2215 M_MOVE_PKTHDR(m, m0); 2216 #else 2217 M_COPY_PKTHDR(m, m0); 2218 #endif 2219 MCLGET(m, M_DONTWAIT); 2220 if ((m->m_flags & M_EXT) == 0) { 2221 sc->sc_stats.ast_tx_nomcl++; 2222 m_freem(m0); 2223 m_free(m); 2224 return ENOMEM; 2225 } 2226 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2227 m_freem(m0); 2228 m->m_len = m->m_pkthdr.len; 2229 m0 = m; 2230 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2231 BUS_DMA_NOWAIT); 2232 if (error != 0) { 2233 sc->sc_stats.ast_tx_busdma++; 2234 m_freem(m0); 2235 return error; 2236 } 2237 KASSERT(bf->bf_nseg == 1, 2238 ("ath_tx_start: packet not one segment; nseg %u", 2239 bf->bf_nseg)); 2240 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2241 sc->sc_stats.ast_tx_nodata++; 2242 m_freem(m0); 2243 return EIO; 2244 } 2245 DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen)); 2246 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2247 bf->bf_m = m0; 2248 bf->bf_node = ni; /* NB: held reference */ 2249 2250 /* setup descriptors */ 2251 ds = bf->bf_desc; 2252 rt = sc->sc_currates; 2253 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2254 2255 /* 2256 * Calculate Atheros packet type from IEEE80211 packet header 2257 * and setup for rate calculations. 2258 */ 2259 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2260 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2261 case IEEE80211_FC0_TYPE_MGT: 2262 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2263 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2264 atype = HAL_PKT_TYPE_BEACON; 2265 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2266 atype = HAL_PKT_TYPE_PROBE_RESP; 2267 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2268 atype = HAL_PKT_TYPE_ATIM; 2269 rix = 0; /* XXX lowest rate */ 2270 break; 2271 case IEEE80211_FC0_TYPE_CTL: 2272 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2273 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2274 atype = HAL_PKT_TYPE_PSPOLL; 2275 rix = 0; /* XXX lowest rate */ 2276 break; 2277 default: 2278 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2279 IEEE80211_RATE_VAL]; 2280 if (rix == 0xff) { 2281 if_printf(ifp, "bogus xmit rate 0x%x\n", 2282 ni->ni_rates.rs_rates[ni->ni_txrate]); 2283 sc->sc_stats.ast_tx_badrate++; 2284 m_freem(m0); 2285 return EIO; 2286 } 2287 break; 2288 } 2289 /* 2290 * NB: the 802.11 layer marks whether or not we should 2291 * use short preamble based on the current mode and 2292 * negotiated parameters. 2293 */ 2294 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) { 2295 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2296 shortPreamble = AH_TRUE; 2297 sc->sc_stats.ast_tx_shortpre++; 2298 } else { 2299 txrate = rt->info[rix].rateCode; 2300 shortPreamble = AH_FALSE; 2301 } 2302 2303 /* 2304 * Calculate miscellaneous flags. 2305 */ 2306 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2307 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2308 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2309 sc->sc_stats.ast_tx_noack++; 2310 } else if (pktlen > ic->ic_rtsthreshold) { 2311 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2312 sc->sc_stats.ast_tx_rts++; 2313 } 2314 2315 /* 2316 * Calculate RTS/CTS rate and duration if needed. 2317 */ 2318 ctsduration = 0; 2319 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2320 /* 2321 * CTS transmit rate is derived from the transmit rate 2322 * by looking in the h/w rate table. We must also factor 2323 * in whether or not a short preamble is to be used. 2324 */ 2325 cix = rt->info[rix].controlRate; 2326 ctsrate = rt->info[cix].rateCode; 2327 if (shortPreamble) 2328 ctsrate |= rt->info[cix].shortPreamble; 2329 /* 2330 * Compute the transmit duration based on the size 2331 * of an ACK frame. We call into the HAL to do the 2332 * computation since it depends on the characteristics 2333 * of the actual PHY being used. 2334 */ 2335 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2336 ctsduration += ath_hal_computetxtime(ah, 2337 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2338 } 2339 /* SIFS + data */ 2340 ctsduration += ath_hal_computetxtime(ah, 2341 rt, pktlen, rix, shortPreamble); 2342 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2343 ctsduration += ath_hal_computetxtime(ah, 2344 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2345 } 2346 } else 2347 ctsrate = 0; 2348 2349 /* 2350 * For now use the antenna on which the last good 2351 * frame was received on. We assume this field is 2352 * initialized to 0 which gives us ``auto'' or the 2353 * ``default'' antenna. 2354 */ 2355 an = (struct ath_node *) ni; 2356 if (an->an_tx_antenna) 2357 antenna = an->an_tx_antenna; 2358 else 2359 antenna = an->an_rx_antenna; 2360 2361 /* 2362 * Formulate first tx descriptor with tx controls. 2363 */ 2364 /* XXX check return value? */ 2365 ath_hal_setuptxdesc(ah, ds 2366 , pktlen /* packet length */ 2367 , hdrlen /* header length */ 2368 , atype /* Atheros packet type */ 2369 , 60 /* txpower XXX */ 2370 , txrate, 1+10 /* series 0 rate/tries */ 2371 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2372 , antenna /* antenna mode */ 2373 , flags /* flags */ 2374 , ctsrate /* rts/cts rate */ 2375 , ctsduration /* rts/cts duration */ 2376 ); 2377 #ifdef notyet 2378 ath_hal_setupxtxdesc(ah, ds 2379 , AH_FALSE /* short preamble */ 2380 , 0, 0 /* series 1 rate/tries */ 2381 , 0, 0 /* series 2 rate/tries */ 2382 , 0, 0 /* series 3 rate/tries */ 2383 ); 2384 #endif 2385 /* 2386 * Fillin the remainder of the descriptor info. 2387 */ 2388 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2389 ds->ds_data = bf->bf_segs[i].ds_addr; 2390 if (i == bf->bf_nseg - 1) 2391 ds->ds_link = 0; 2392 else 2393 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2394 ath_hal_filltxdesc(ah, ds 2395 , bf->bf_segs[i].ds_len /* segment length */ 2396 , i == 0 /* first segment */ 2397 , i == bf->bf_nseg - 1 /* last segment */ 2398 ); 2399 DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n", 2400 i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1, 2401 ds->ds_hw[0], ds->ds_hw[1])); 2402 } 2403 2404 /* 2405 * Insert the frame on the outbound list and 2406 * pass it on to the hardware. 2407 */ 2408 ath_txq_critsect_begin(sc, s); 2409 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2410 if (sc->sc_txlink == NULL) { 2411 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2412 DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n", 2413 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2414 } else { 2415 *sc->sc_txlink = bf->bf_daddr; 2416 DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n", 2417 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2418 } 2419 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2420 ath_txq_critsect_end(sc, s); 2421 2422 ath_hal_txstart(ah, sc->sc_txhalq); 2423 return 0; 2424 } 2425 2426 static void 2427 ath_tx_proc(void *arg, int npending) 2428 { 2429 struct ath_softc *sc = arg; 2430 struct ath_hal *ah = sc->sc_ah; 2431 struct ath_buf *bf; 2432 struct ieee80211com *ic = &sc->sc_ic; 2433 struct ifnet *ifp = &ic->ic_if; 2434 struct ath_desc *ds; 2435 struct ieee80211_node *ni; 2436 struct ath_node *an; 2437 int sr, lr; 2438 HAL_STATUS status; 2439 ath_txq_critsect_decl(s); 2440 ath_txbuf_critsect_decl(s2); 2441 2442 DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n", 2443 npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2444 sc->sc_txlink)); 2445 for (;;) { 2446 ath_txq_critsect_begin(sc, s); 2447 bf = TAILQ_FIRST(&sc->sc_txq); 2448 if (bf == NULL) { 2449 sc->sc_txlink = NULL; 2450 ath_txq_critsect_end(sc, s); 2451 break; 2452 } 2453 /* only the last descriptor is needed */ 2454 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2455 status = ath_hal_txprocdesc(ah, ds); 2456 #ifdef AR_DEBUG 2457 if (ath_debug > 1) 2458 ath_printtxbuf(bf, status == HAL_OK); 2459 #endif 2460 if (status == HAL_EINPROGRESS) { 2461 ath_txq_critsect_end(sc, s); 2462 break; 2463 } 2464 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2465 ath_txq_critsect_end(sc, s); 2466 2467 ni = bf->bf_node; 2468 if (ni != NULL) { 2469 an = (struct ath_node *) ni; 2470 if (ds->ds_txstat.ts_status == 0) { 2471 an->an_tx_ok++; 2472 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2473 } else { 2474 an->an_tx_err++; 2475 ifp->if_oerrors++; 2476 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2477 sc->sc_stats.ast_tx_xretries++; 2478 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2479 sc->sc_stats.ast_tx_fifoerr++; 2480 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2481 sc->sc_stats.ast_tx_filtered++; 2482 an->an_tx_antenna = 0; /* invalidate */ 2483 } 2484 sr = ds->ds_txstat.ts_shortretry; 2485 lr = ds->ds_txstat.ts_longretry; 2486 sc->sc_stats.ast_tx_shortretry += sr; 2487 sc->sc_stats.ast_tx_longretry += lr; 2488 if (sr + lr) 2489 an->an_tx_retr++; 2490 /* 2491 * Reclaim reference to node. 2492 * 2493 * NB: the node may be reclaimed here if, for example 2494 * this is a DEAUTH message that was sent and the 2495 * node was timed out due to inactivity. 2496 */ 2497 if (ni != ic->ic_bss) 2498 ieee80211_free_node(ic, ni); 2499 } 2500 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2501 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2502 m_freem(bf->bf_m); 2503 bf->bf_m = NULL; 2504 bf->bf_node = NULL; 2505 2506 ath_txbuf_critsect_begin(sc, s2); 2507 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2508 ath_txbuf_critsect_end(sc, s2); 2509 } 2510 ifp->if_flags &= ~IFF_OACTIVE; 2511 sc->sc_tx_timer = 0; 2512 2513 ath_start(ifp); 2514 } 2515 2516 /* 2517 * Drain the transmit queue and reclaim resources. 2518 */ 2519 static void 2520 ath_draintxq(struct ath_softc *sc) 2521 { 2522 struct ath_hal *ah = sc->sc_ah; 2523 struct ifnet *ifp = &sc->sc_ic.ic_if; 2524 struct ath_buf *bf; 2525 ath_txq_critsect_decl(s); 2526 ath_txbuf_critsect_decl(s2); 2527 2528 /* XXX return value */ 2529 if (!sc->sc_invalid) { 2530 /* don't touch the hardware if marked invalid */ 2531 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2532 DPRINTF(("ath_draintxq: tx queue %p, link %p\n", 2533 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2534 sc->sc_txlink)); 2535 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2536 DPRINTF(("ath_draintxq: beacon queue %p\n", 2537 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2538 } 2539 for (;;) { 2540 ath_txq_critsect_begin(sc, s); 2541 bf = TAILQ_FIRST(&sc->sc_txq); 2542 if (bf == NULL) { 2543 sc->sc_txlink = NULL; 2544 ath_txq_critsect_end(sc, s); 2545 break; 2546 } 2547 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2548 ath_txq_critsect_end(sc, s); 2549 #ifdef AR_DEBUG 2550 if (ath_debug) 2551 ath_printtxbuf(bf, 2552 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2553 #endif /* AR_DEBUG */ 2554 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2555 m_freem(bf->bf_m); 2556 bf->bf_m = NULL; 2557 bf->bf_node = NULL; 2558 ath_txbuf_critsect_begin(sc, s2); 2559 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2560 ath_txbuf_critsect_end(sc, s2); 2561 } 2562 ifp->if_flags &= ~IFF_OACTIVE; 2563 sc->sc_tx_timer = 0; 2564 } 2565 2566 /* 2567 * Disable the receive h/w in preparation for a reset. 2568 */ 2569 static void 2570 ath_stoprecv(struct ath_softc *sc) 2571 { 2572 struct ath_hal *ah = sc->sc_ah; 2573 2574 ath_hal_stoppcurecv(ah); /* disable PCU */ 2575 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2576 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2577 DELAY(3000); /* long enough for 1 frame */ 2578 #ifdef AR_DEBUG 2579 if (ath_debug) { 2580 struct ath_buf *bf; 2581 2582 DPRINTF(("ath_stoprecv: rx queue %p, link %p\n", 2583 (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink)); 2584 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2585 if (ath_hal_rxprocdesc(ah, bf->bf_desc) == HAL_OK) 2586 ath_printrxbuf(bf, 1); 2587 } 2588 } 2589 #endif 2590 sc->sc_rxlink = NULL; /* just in case */ 2591 } 2592 2593 /* 2594 * Enable the receive h/w following a reset. 2595 */ 2596 static int 2597 ath_startrecv(struct ath_softc *sc) 2598 { 2599 struct ath_hal *ah = sc->sc_ah; 2600 struct ath_buf *bf; 2601 2602 sc->sc_rxlink = NULL; 2603 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2604 int error = ath_rxbuf_init(sc, bf); 2605 if (error != 0) { 2606 DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n", 2607 error)); 2608 return error; 2609 } 2610 } 2611 2612 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2613 ath_hal_putrxbuf(ah, bf->bf_daddr); 2614 ath_hal_rxena(ah); /* enable recv descriptors */ 2615 ath_mode_init(sc); /* set filters, etc. */ 2616 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2617 return 0; 2618 } 2619 2620 /* 2621 * Set/change channels. If the channel is really being changed, 2622 * it's done by resetting the chip. To accomplish this we must 2623 * first cleanup any pending DMA, then restart stuff after a la 2624 * ath_init. 2625 */ 2626 static int 2627 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 2628 { 2629 struct ath_hal *ah = sc->sc_ah; 2630 struct ieee80211com *ic = &sc->sc_ic; 2631 2632 DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n", 2633 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 2634 ic->ic_ibss_chan->ic_freq, 2635 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 2636 if (chan != ic->ic_ibss_chan) { 2637 HAL_STATUS status; 2638 HAL_CHANNEL hchan; 2639 enum ieee80211_phymode mode; 2640 2641 /* 2642 * To switch channels clear any pending DMA operations; 2643 * wait long enough for the RX fifo to drain, reset the 2644 * hardware at the new frequency, and then re-enable 2645 * the relevant bits of the h/w. 2646 */ 2647 ath_hal_intrset(ah, 0); /* disable interrupts */ 2648 ath_draintxq(sc); /* clear pending tx frames */ 2649 ath_stoprecv(sc); /* turn off frame recv */ 2650 /* 2651 * Convert to a HAL channel description with 2652 * the flags constrained to reflect the current 2653 * operating mode. 2654 */ 2655 hchan.channel = chan->ic_freq; 2656 hchan.channelFlags = ath_chan2flags(ic, chan); 2657 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 2658 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 2659 "channel %u (%u Mhz)\n", 2660 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 2661 return EIO; 2662 } 2663 /* 2664 * Re-enable rx framework. 2665 */ 2666 if (ath_startrecv(sc) != 0) { 2667 if_printf(&ic->ic_if, 2668 "ath_chan_set: unable to restart recv logic\n"); 2669 return EIO; 2670 } 2671 2672 /* 2673 * Update BPF state. 2674 */ 2675 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 2676 htole16(chan->ic_freq); 2677 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 2678 htole16(chan->ic_flags); 2679 2680 /* 2681 * Change channels and update the h/w rate map 2682 * if we're switching; e.g. 11a to 11b/g. 2683 */ 2684 ic->ic_ibss_chan = chan; 2685 mode = ieee80211_chan2mode(ic, chan); 2686 if (mode != sc->sc_curmode) 2687 ath_setcurmode(sc, mode); 2688 2689 /* 2690 * Re-enable interrupts. 2691 */ 2692 ath_hal_intrset(ah, sc->sc_imask); 2693 } 2694 return 0; 2695 } 2696 2697 static void 2698 ath_next_scan(void *arg) 2699 { 2700 struct ath_softc *sc = arg; 2701 struct ieee80211com *ic = &sc->sc_ic; 2702 struct ifnet *ifp = &ic->ic_if; 2703 int s; 2704 2705 /* don't call ath_start w/o network interrupts blocked */ 2706 s = splnet(); 2707 2708 if (ic->ic_state == IEEE80211_S_SCAN) 2709 ieee80211_next_scan(ifp); 2710 splx(s); 2711 } 2712 2713 /* 2714 * Periodically recalibrate the PHY to account 2715 * for temperature/environment changes. 2716 */ 2717 static void 2718 ath_calibrate(void *arg) 2719 { 2720 struct ath_softc *sc = arg; 2721 struct ath_hal *ah = sc->sc_ah; 2722 struct ieee80211com *ic = &sc->sc_ic; 2723 struct ieee80211_channel *c; 2724 HAL_CHANNEL hchan; 2725 2726 sc->sc_stats.ast_per_cal++; 2727 2728 /* 2729 * Convert to a HAL channel description with the flags 2730 * constrained to reflect the current operating mode. 2731 */ 2732 c = ic->ic_ibss_chan; 2733 hchan.channel = c->ic_freq; 2734 hchan.channelFlags = ath_chan2flags(ic, c); 2735 2736 DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 2737 2738 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 2739 /* 2740 * Rfgain is out of bounds, reset the chip 2741 * to load new gain values. 2742 */ 2743 sc->sc_stats.ast_per_rfgain++; 2744 ath_reset(sc); 2745 } 2746 if (!ath_hal_calibrate(ah, &hchan)) { 2747 DPRINTF(("%s: calibration of channel %u failed\n", 2748 __func__, c->ic_freq)); 2749 sc->sc_stats.ast_per_calfail++; 2750 } 2751 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 2752 } 2753 2754 static HAL_LED_STATE 2755 ath_state_to_led(enum ieee80211_state state) 2756 { 2757 switch (state) { 2758 case IEEE80211_S_INIT: 2759 return HAL_LED_INIT; 2760 case IEEE80211_S_SCAN: 2761 return HAL_LED_SCAN; 2762 case IEEE80211_S_AUTH: 2763 return HAL_LED_AUTH; 2764 case IEEE80211_S_ASSOC: 2765 return HAL_LED_ASSOC; 2766 case IEEE80211_S_RUN: 2767 return HAL_LED_RUN; 2768 default: 2769 panic("%s: unknown 802.11 state %d\n", __func__, state); 2770 return HAL_LED_INIT; 2771 } 2772 } 2773 2774 static int 2775 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 2776 { 2777 struct ifnet *ifp = &ic->ic_if; 2778 struct ath_softc *sc = ifp->if_softc; 2779 struct ath_hal *ah = sc->sc_ah; 2780 struct ieee80211_node *ni; 2781 int i, error; 2782 u_int8_t *bssid; 2783 u_int32_t rfilt; 2784 2785 DPRINTF(("%s: %s -> %s\n", __func__, 2786 ieee80211_state_name[ic->ic_state], 2787 ieee80211_state_name[nstate])); 2788 2789 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 2790 2791 if (nstate == IEEE80211_S_INIT) { 2792 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2793 ath_hal_intrset(ah, sc->sc_imask); 2794 callout_stop(&sc->sc_scan_ch); 2795 callout_stop(&sc->sc_cal_ch); 2796 return (*sc->sc_newstate)(ic, nstate, arg); 2797 } 2798 ni = ic->ic_bss; 2799 error = ath_chan_set(sc, ni->ni_chan); 2800 if (error != 0) 2801 goto bad; 2802 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 2803 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 2804 if (ic->ic_opmode != IEEE80211_M_STA) 2805 rfilt |= HAL_RX_FILTER_PROBEREQ; 2806 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2807 (ifp->if_flags & IFF_PROMISC)) 2808 rfilt |= HAL_RX_FILTER_PROM; 2809 if (nstate == IEEE80211_S_SCAN) { 2810 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 2811 ath_next_scan, sc); 2812 bssid = ifp->if_broadcastaddr; 2813 rfilt |= HAL_RX_FILTER_BEACON; 2814 } else { 2815 callout_stop(&sc->sc_scan_ch); 2816 bssid = ni->ni_bssid; 2817 } 2818 ath_hal_setrxfilter(ah, rfilt); 2819 DPRINTF(("%s: RX filter 0x%x bssid %s\n", 2820 __func__, rfilt, ether_sprintf(bssid))); 2821 2822 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 2823 ath_hal_setassocid(ah, bssid, ni->ni_associd); 2824 else 2825 ath_hal_setassocid(ah, bssid, 0); 2826 if (ic->ic_flags & IEEE80211_F_WEPON) { 2827 for (i = 0; i < IEEE80211_WEP_NKID; i++) 2828 if (ath_hal_keyisvalid(ah, i)) 2829 ath_hal_keysetmac(ah, i, bssid); 2830 } 2831 2832 if (nstate == IEEE80211_S_RUN) { 2833 DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 2834 "capinfo=0x%04x chan=%d\n" 2835 , __func__ 2836 , ic->ic_flags 2837 , ni->ni_intval 2838 , ether_sprintf(ni->ni_bssid) 2839 , ni->ni_capinfo 2840 , ieee80211_chan2ieee(ic, ni->ni_chan))); 2841 2842 /* 2843 * Allocate and setup the beacon frame for AP or adhoc mode. 2844 */ 2845 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 2846 ic->ic_opmode == IEEE80211_M_IBSS) { 2847 error = ath_beacon_alloc(sc, ni); 2848 if (error != 0) 2849 goto bad; 2850 } 2851 2852 /* 2853 * Configure the beacon and sleep timers. 2854 */ 2855 ath_beacon_config(sc); 2856 2857 /* start periodic recalibration timer */ 2858 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 2859 ath_calibrate, sc); 2860 } else { 2861 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2862 ath_hal_intrset(ah, sc->sc_imask); 2863 callout_stop(&sc->sc_cal_ch); /* no calibration */ 2864 } 2865 /* 2866 * Reset the rate control state. 2867 */ 2868 ath_rate_ctl_reset(sc, nstate); 2869 /* 2870 * Invoke the parent method to complete the work. 2871 */ 2872 return (*sc->sc_newstate)(ic, nstate, arg); 2873 bad: 2874 callout_stop(&sc->sc_scan_ch); 2875 callout_stop(&sc->sc_cal_ch); 2876 /* NB: do not invoke the parent */ 2877 return error; 2878 } 2879 2880 /* 2881 * Setup driver-specific state for a newly associated node. 2882 * Note that we're called also on a re-associate, the isnew 2883 * param tells us if this is the first time or not. 2884 */ 2885 static void 2886 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 2887 { 2888 if (isnew) { 2889 struct ath_node *an = (struct ath_node *) ni; 2890 2891 an->an_tx_ok = an->an_tx_err = 2892 an->an_tx_retr = an->an_tx_upper = 0; 2893 /* start with highest negotiated rate */ 2894 /* 2895 * XXX should do otherwise but only when 2896 * the rate control algorithm is better. 2897 */ 2898 KASSERT(ni->ni_rates.rs_nrates > 0, 2899 ("new association w/ no rates!")); 2900 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 2901 } 2902 } 2903 2904 static int 2905 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor) 2906 { 2907 struct ieee80211com *ic = &sc->sc_ic; 2908 struct ifnet *ifp = &ic->ic_if; 2909 struct ath_hal *ah = sc->sc_ah; 2910 HAL_CHANNEL *chans; 2911 int i, ix, nchan; 2912 2913 sc->sc_have11g = 0; 2914 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 2915 M_TEMP, M_NOWAIT); 2916 if (chans == NULL) { 2917 if_printf(ifp, "unable to allocate channel table\n"); 2918 return ENOMEM; 2919 } 2920 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 2921 cc, HAL_MODE_ALL, outdoor)) { 2922 if_printf(ifp, "unable to collect channel list from hal\n"); 2923 free(chans, M_TEMP); 2924 return EINVAL; 2925 } 2926 2927 /* 2928 * Convert HAL channels to ieee80211 ones and insert 2929 * them in the table according to their channel number. 2930 */ 2931 for (i = 0; i < nchan; i++) { 2932 HAL_CHANNEL *c = &chans[i]; 2933 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 2934 if (ix > IEEE80211_CHAN_MAX) { 2935 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 2936 ix, c->channel, c->channelFlags); 2937 continue; 2938 } 2939 /* NB: flags are known to be compatible */ 2940 if (ic->ic_channels[ix].ic_freq == 0) { 2941 ic->ic_channels[ix].ic_freq = c->channel; 2942 ic->ic_channels[ix].ic_flags = c->channelFlags; 2943 } else { 2944 /* channels overlap; e.g. 11g and 11b */ 2945 ic->ic_channels[ix].ic_flags |= c->channelFlags; 2946 } 2947 if ((c->channelFlags & CHANNEL_G) == CHANNEL_G) 2948 sc->sc_have11g = 1; 2949 } 2950 free(chans, M_TEMP); 2951 return 0; 2952 } 2953 2954 static int 2955 ath_rate_setup(struct ath_softc *sc, u_int mode) 2956 { 2957 struct ath_hal *ah = sc->sc_ah; 2958 struct ieee80211com *ic = &sc->sc_ic; 2959 const HAL_RATE_TABLE *rt; 2960 struct ieee80211_rateset *rs; 2961 int i, maxrates; 2962 2963 switch (mode) { 2964 case IEEE80211_MODE_11A: 2965 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 2966 break; 2967 case IEEE80211_MODE_11B: 2968 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 2969 break; 2970 case IEEE80211_MODE_11G: 2971 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 2972 break; 2973 case IEEE80211_MODE_TURBO: 2974 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 2975 break; 2976 default: 2977 DPRINTF(("%s: invalid mode %u\n", __func__, mode)); 2978 return 0; 2979 } 2980 rt = sc->sc_rates[mode]; 2981 if (rt == NULL) 2982 return 0; 2983 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 2984 DPRINTF(("%s: rate table too small (%u > %u)\n", 2985 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 2986 maxrates = IEEE80211_RATE_MAXSIZE; 2987 } else 2988 maxrates = rt->rateCount; 2989 rs = &ic->ic_sup_rates[mode]; 2990 for (i = 0; i < maxrates; i++) 2991 rs->rs_rates[i] = rt->info[i].dot11Rate; 2992 rs->rs_nrates = maxrates; 2993 return 1; 2994 } 2995 2996 static void 2997 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 2998 { 2999 const HAL_RATE_TABLE *rt; 3000 int i; 3001 3002 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 3003 rt = sc->sc_rates[mode]; 3004 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 3005 for (i = 0; i < rt->rateCount; i++) 3006 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 3007 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 3008 for (i = 0; i < 32; i++) 3009 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 3010 sc->sc_currates = rt; 3011 sc->sc_curmode = mode; 3012 } 3013 3014 /* 3015 * Reset the rate control state for each 802.11 state transition. 3016 */ 3017 static void 3018 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 3019 { 3020 struct ieee80211com *ic = &sc->sc_ic; 3021 struct ieee80211_node *ni; 3022 struct ath_node *an; 3023 3024 an = (struct ath_node *) ic->ic_bss; 3025 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3026 if (ic->ic_opmode == IEEE80211_M_STA) { 3027 ni = ic->ic_bss; 3028 if (state == IEEE80211_S_RUN) { 3029 /* start with highest negotiated rate */ 3030 KASSERT(ni->ni_rates.rs_nrates > 0, 3031 ("transition to RUN state w/ no rates!")); 3032 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3033 } else { 3034 /* use lowest rate */ 3035 ni->ni_txrate = 0; 3036 } 3037 } else { 3038 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3039 ni->ni_txrate = 0; /* use lowest rate */ 3040 an = (struct ath_node *) ni; 3041 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3042 an->an_tx_upper = 0; 3043 } 3044 } 3045 } 3046 3047 /* 3048 * Examine and potentially adjust the transmit rate. 3049 */ 3050 static void 3051 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3052 { 3053 struct ath_softc *sc = arg; 3054 struct ath_node *an = (struct ath_node *) ni; 3055 struct ieee80211_rateset *rs = &ni->ni_rates; 3056 int mod = 0, orate, enough; 3057 3058 /* 3059 * Rate control 3060 * XXX: very primitive version. 3061 */ 3062 sc->sc_stats.ast_rate_calls++; 3063 3064 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3065 3066 /* no packet reached -> down */ 3067 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3068 mod = -1; 3069 3070 /* all packets needs retry in average -> down */ 3071 if (enough && an->an_tx_ok < an->an_tx_retr) 3072 mod = -1; 3073 3074 /* no error and less than 10% of packets needs retry -> up */ 3075 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3076 mod = 1; 3077 3078 orate = ni->ni_txrate; 3079 switch (mod) { 3080 case 0: 3081 if (enough && an->an_tx_upper > 0) 3082 an->an_tx_upper--; 3083 break; 3084 case -1: 3085 if (ni->ni_txrate > 0) { 3086 ni->ni_txrate--; 3087 sc->sc_stats.ast_rate_drop++; 3088 } 3089 an->an_tx_upper = 0; 3090 break; 3091 case 1: 3092 if (++an->an_tx_upper < 2) 3093 break; 3094 an->an_tx_upper = 0; 3095 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3096 ni->ni_txrate++; 3097 sc->sc_stats.ast_rate_raise++; 3098 } 3099 break; 3100 } 3101 3102 if (ni->ni_txrate != orate) { 3103 printf("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3104 __func__, 3105 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3106 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3107 an->an_tx_ok, an->an_tx_err, an->an_tx_retr); 3108 } 3109 if (ni->ni_txrate != orate || enough) 3110 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3111 } 3112 3113 #ifdef AR_DEBUG 3114 #ifdef __FreeBSD__ 3115 static int 3116 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3117 { 3118 char dmode[64]; 3119 int error; 3120 3121 strncpy(dmode, "", sizeof(dmode) - 1); 3122 dmode[sizeof(dmode) - 1] = '\0'; 3123 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3124 3125 if (error == 0 && req->newptr != NULL) { 3126 struct ifnet *ifp; 3127 struct ath_softc *sc; 3128 3129 ifp = ifunit("ath0"); /* XXX */ 3130 if (!ifp) 3131 return EINVAL; 3132 sc = ifp->if_softc; 3133 if (strcmp(dmode, "hal") == 0) 3134 ath_hal_dumpstate(sc->sc_ah); 3135 else if (strcmp(dmode, "eeprom") == 0) 3136 ath_hal_dumpeeprom(sc->sc_ah); 3137 else if (strcmp(dmode, "rfgain") == 0) 3138 ath_hal_dumprfgain(sc->sc_ah); 3139 else if (strcmp(dmode, "ani") == 0) 3140 ath_hal_dumpani(sc->sc_ah); 3141 else 3142 return EINVAL; 3143 } 3144 return error; 3145 } 3146 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3147 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3148 #endif /* __FreeBSD__ */ 3149 3150 static void 3151 ath_printrxbuf(struct ath_buf *bf, int done) 3152 { 3153 struct ath_desc *ds; 3154 int i; 3155 3156 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3157 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3158 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3159 ds->ds_link, ds->ds_data, 3160 ds->ds_ctl0, ds->ds_ctl1, 3161 ds->ds_hw[0], ds->ds_hw[1], 3162 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3163 } 3164 } 3165 3166 static void 3167 ath_printtxbuf(struct ath_buf *bf, int done) 3168 { 3169 struct ath_desc *ds; 3170 int i; 3171 3172 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3173 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3174 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3175 ds->ds_link, ds->ds_data, 3176 ds->ds_ctl0, ds->ds_ctl1, 3177 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3178 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3179 } 3180 } 3181 #endif /* AR_DEBUG */ 3182
Indexes created Thu Oct 02 07:10:07 GMT 2025