ath.c revision 1.9
1 /* $NetBSD: ath.c,v 1.9 2003/10/15 23:23:39 itojun Exp $ */ 2 3 /*- 4 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath.c,v 1.14 2003/09/05 22:22:49 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: ath.c,v 1.9 2003/10/15 23:23:39 itojun Exp $"); 45 #endif 46 47 /* 48 * Driver for the Atheros Wireless LAN controller. 49 * 50 * This software is derived from work of Atsushi Onoe; his contribution 51 * is greatly appreciated. 52 */ 53 54 #include "opt_inet.h" 55 56 #ifdef __NetBSD__ 57 #include "bpfilter.h" 58 #endif /* __NetBSD__ */ 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/types.h> 63 #include <sys/sysctl.h> 64 #include <sys/mbuf.h> 65 #include <sys/malloc.h> 66 #include <sys/lock.h> 67 #ifdef __FreeBSD__ 68 #include <sys/mutex.h> 69 #endif 70 #include <sys/kernel.h> 71 #include <sys/socket.h> 72 #include <sys/sockio.h> 73 #include <sys/errno.h> 74 #include <sys/callout.h> 75 #ifdef __FreeBSD__ 76 #include <sys/bus.h> 77 #else 78 #include <machine/bus.h> 79 #endif 80 #include <sys/endian.h> 81 82 #include <machine/bus.h> 83 84 #include <net/if.h> 85 #include <net/if_dl.h> 86 #include <net/if_media.h> 87 #include <net/if_arp.h> 88 #ifdef __FreeBSD__ 89 #include <net/ethernet.h> 90 #else 91 #include <net/if_ether.h> 92 #endif 93 #include <net/if_llc.h> 94 95 #include <net80211/ieee80211_var.h> 96 #include <net80211/ieee80211_compat.h> 97 98 #if NBPFILTER > 0 99 #include <net/bpf.h> 100 #endif 101 102 #ifdef INET 103 #include <netinet/in.h> 104 #endif 105 106 #include <dev/ic/athcompat.h> 107 108 #define AR_DEBUG 109 #ifdef __FreeBSD__ 110 #include <dev/ath/if_athvar.h> 111 #include <contrib/dev/ath/ah_desc.h> 112 #else 113 #include <dev/ic/athvar.h> 114 #include <../contrib/sys/dev/ic/athhal_desc.h> 115 #endif 116 117 /* unalligned little endian access */ 118 #define LE_READ_2(p) \ 119 ((u_int16_t) \ 120 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 121 #define LE_READ_4(p) \ 122 ((u_int32_t) \ 123 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 124 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 125 126 #ifdef __FreeBSD__ 127 static void ath_init(void *); 128 #else 129 static int ath_init(struct ifnet *); 130 #endif 131 static int ath_init1(struct ath_softc *); 132 static int ath_intr1(struct ath_softc *); 133 static void ath_stop(struct ifnet *); 134 static void ath_start(struct ifnet *); 135 static void ath_reset(struct ath_softc *); 136 static int ath_media_change(struct ifnet *); 137 static void ath_watchdog(struct ifnet *); 138 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 139 static void ath_fatal_proc(void *, int); 140 static void ath_rxorn_proc(void *, int); 141 static void ath_bmiss_proc(void *, int); 142 static void ath_initkeytable(struct ath_softc *); 143 static void ath_mode_init(struct ath_softc *); 144 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 145 static void ath_beacon_proc(void *, int); 146 static void ath_beacon_free(struct ath_softc *); 147 static void ath_beacon_config(struct ath_softc *); 148 static int ath_desc_alloc(struct ath_softc *); 149 static void ath_desc_free(struct ath_softc *); 150 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 151 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 152 static void ath_node_copy(struct ieee80211com *, 153 struct ieee80211_node *, const struct ieee80211_node *); 154 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 155 static void ath_rx_proc(void *, int); 156 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 157 struct ath_buf *, struct mbuf *); 158 static void ath_tx_proc(void *, int); 159 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 160 static void ath_draintxq(struct ath_softc *); 161 static void ath_stoprecv(struct ath_softc *); 162 static int ath_startrecv(struct ath_softc *); 163 static void ath_next_scan(void *); 164 static void ath_calibrate(void *); 165 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 166 static void ath_newassoc(struct ieee80211com *, 167 struct ieee80211_node *, int); 168 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor); 169 170 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 171 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 172 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 173 static void ath_rate_ctl(void *, struct ieee80211_node *); 174 175 #ifdef __NetBSD__ 176 int ath_enable(struct ath_softc *); 177 void ath_disable(struct ath_softc *); 178 void ath_power(int, void *); 179 #endif 180 181 #ifdef __FreeBSD__ 182 SYSCTL_DECL(_hw_ath); 183 /* XXX validate sysctl values */ 184 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 185 0, "channel dwell time (ms) for AP/station scanning"); 186 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 187 0, "chip calibration interval (secs)"); 188 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 189 0, "enable/disable outdoor operation"); 190 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 191 0, "country code"); 192 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 193 0, "regulatory domain"); 194 #endif /* __FreeBSD__ */ 195 196 static int ath_dwelltime = 200; /* 5 channels/second */ 197 static int ath_calinterval = 30; /* calibrate every 30 secs */ 198 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 199 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 200 static int ath_regdomain = 0; /* regulatory domain */ 201 202 #ifdef AR_DEBUG 203 int ath_debug = 0; 204 #ifdef __FreeBSD__ 205 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 206 0, "control debugging printfs"); 207 #endif /* __FreeBSD__ */ 208 #define IFF_DUMPPKTS(_ifp) \ 209 (ath_debug || \ 210 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 211 static void ath_printrxbuf(struct ath_buf *bf, int); 212 static void ath_printtxbuf(struct ath_buf *bf, int); 213 #define DPRINTF(X) if (ath_debug) printf X 214 #define DPRINTF2(X) if (ath_debug > 1) printf X 215 #else 216 #define IFF_DUMPPKTS(_ifp) \ 217 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 218 #define DPRINTF(X) 219 #define DPRINTF2(X) 220 #endif 221 222 #ifdef __NetBSD__ 223 int 224 ath_activate(struct device *self, enum devact act) 225 { 226 struct ath_softc *sc = (struct ath_softc *)self; 227 int rv = 0, s; 228 229 s = splnet(); 230 switch (act) { 231 case DVACT_ACTIVATE: 232 rv = EOPNOTSUPP; 233 break; 234 case DVACT_DEACTIVATE: 235 if_deactivate(&sc->sc_ic.ic_if); 236 break; 237 } 238 splx(s); 239 return rv; 240 } 241 242 int 243 ath_enable(struct ath_softc *sc) 244 { 245 if (ATH_IS_ENABLED(sc) == 0) { 246 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 247 printf("%s: device enable failed\n", 248 sc->sc_dev.dv_xname); 249 return (EIO); 250 } 251 sc->sc_flags |= ATH_ENABLED; 252 } 253 return (0); 254 } 255 256 void 257 ath_disable(struct ath_softc *sc) 258 { 259 if (!ATH_IS_ENABLED(sc)) 260 return; 261 if (sc->sc_disable != NULL) 262 (*sc->sc_disable)(sc); 263 sc->sc_flags &= ~ATH_ENABLED; 264 } 265 #endif /* #ifdef __NetBSD__ */ 266 267 int 268 ath_attach(u_int16_t devid, struct ath_softc *sc) 269 { 270 struct ieee80211com *ic = &sc->sc_ic; 271 struct ifnet *ifp = &ic->ic_if; 272 struct ath_hal *ah; 273 HAL_STATUS status; 274 int error = 0; 275 276 DPRINTF(("ath_attach: devid 0x%x\n", devid)); 277 278 #ifdef __FreeBSD__ 279 /* set these up early for if_printf use */ 280 ifp->if_unit = device_get_unit(sc->sc_dev); 281 ifp->if_name = "ath"; 282 #else 283 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 284 #endif 285 286 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 287 if (ah == NULL) { 288 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 289 status); 290 error = ENXIO; 291 goto bad; 292 } 293 sc->sc_ah = ah; 294 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 295 296 /* 297 * Collect the channel list using the default country 298 * code and including outdoor channels. The 802.11 layer 299 * is resposible for filtering this list based on settings 300 * like the phy mode. 301 */ 302 error = ath_getchannels(sc, ath_countrycode, ath_outdoor); 303 if (error != 0) 304 goto bad; 305 /* 306 * Copy these back; they are set as a side effect 307 * of constructing the channel list. 308 */ 309 ath_regdomain = ath_hal_getregdomain(ah); 310 ath_countrycode = ath_hal_getcountrycode(ah); 311 312 /* 313 * Setup rate tables for all potential media types. 314 */ 315 ath_rate_setup(sc, IEEE80211_MODE_11A); 316 ath_rate_setup(sc, IEEE80211_MODE_11B); 317 ath_rate_setup(sc, IEEE80211_MODE_11G); 318 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 319 320 error = ath_desc_alloc(sc); 321 if (error != 0) { 322 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 323 goto bad; 324 } 325 ATH_CALLOUT_INIT(&sc->sc_scan_ch); 326 ATH_CALLOUT_INIT(&sc->sc_cal_ch); 327 328 #ifdef __FreeBSD__ 329 mtx_init(&sc->sc_txbuflock, 330 device_get_nameunit(sc->sc_dev), "xmit buf q", MTX_DEF); 331 mtx_init(&sc->sc_txqlock, 332 device_get_nameunit(sc->sc_dev), "xmit q", MTX_DEF); 333 #endif 334 335 ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc); 336 ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc); 337 ATH_TASK_INIT(&sc->sc_swbatask, ath_beacon_proc, sc); 338 ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc); 339 ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc); 340 ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc); 341 342 /* 343 * For now just pre-allocate one data queue and one 344 * beacon queue. Note that the HAL handles resetting 345 * them at the needed time. Eventually we'll want to 346 * allocate more tx queues for splitting management 347 * frames and for QOS support. 348 */ 349 sc->sc_txhalq = ath_hal_setuptxqueue(ah, 350 HAL_TX_QUEUE_DATA, 351 AH_TRUE /* enable interrupts */ 352 ); 353 if (sc->sc_txhalq == (u_int) -1) { 354 if_printf(ifp, "unable to setup a data xmit queue!\n"); 355 goto bad; 356 } 357 sc->sc_bhalq = ath_hal_setuptxqueue(ah, 358 HAL_TX_QUEUE_BEACON, 359 AH_TRUE /* enable interrupts */ 360 ); 361 if (sc->sc_bhalq == (u_int) -1) { 362 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 363 goto bad; 364 } 365 366 ifp->if_softc = sc; 367 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 368 ifp->if_start = ath_start; 369 ifp->if_watchdog = ath_watchdog; 370 ifp->if_ioctl = ath_ioctl; 371 ifp->if_init = ath_init; 372 #ifdef __FreeBSD__ 373 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 374 #else 375 #if 0 376 ifp->if_stop = ath_stop; /* XXX */ 377 #endif 378 IFQ_SET_READY(&ifp->if_snd); 379 #endif 380 381 ic->ic_softc = sc; 382 ic->ic_newassoc = ath_newassoc; 383 /* XXX not right but it's not used anywhere important */ 384 ic->ic_phytype = IEEE80211_T_OFDM; 385 ic->ic_opmode = IEEE80211_M_STA; 386 ic->ic_caps = IEEE80211_C_WEP | IEEE80211_C_IBSS | IEEE80211_C_HOSTAP 387 | IEEE80211_C_MONITOR; 388 /* NB: 11g support is identified when we fetch the channel set */ 389 if (sc->sc_have11g) 390 ic->ic_caps |= IEEE80211_C_SHPREAMBLE; 391 392 /* get mac address from hardware */ 393 ath_hal_getmac(ah, ic->ic_myaddr); 394 395 #ifdef __NetBSD__ 396 if_attach(ifp); 397 #endif 398 /* call MI attach routine. */ 399 ieee80211_ifattach(ifp); 400 /* override default methods */ 401 ic->ic_node_alloc = ath_node_alloc; 402 ic->ic_node_free = ath_node_free; 403 ic->ic_node_copy = ath_node_copy; 404 sc->sc_newstate = ic->ic_newstate; 405 ic->ic_newstate = ath_newstate; 406 /* complete initialization */ 407 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 408 409 #if NBPFILTER > 0 410 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 411 sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th), 412 &sc->sc_drvbpf); 413 #endif 414 /* 415 * Initialize constant fields. 416 * 417 * NB: the channel is setup each time we transition to the 418 * RUN state to avoid filling it in for each frame. 419 */ 420 sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th); 421 sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT; 422 423 sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th); 424 sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT; 425 426 if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr)); 427 428 #ifdef __NetBSD__ 429 sc->sc_flags |= ATH_ATTACHED; 430 /* 431 * Make sure the interface is shutdown during reboot. 432 */ 433 #if 0 434 sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc); 435 if (sc->sc_sdhook == NULL) 436 printf("%s: WARNING: unable to establish shutdown hook\n", 437 sc->sc_dev.dv_xname); 438 #endif 439 sc->sc_powerhook = powerhook_establish(ath_power, sc); 440 if (sc->sc_powerhook == NULL) 441 printf("%s: WARNING: unable to establish power hook\n", 442 sc->sc_dev.dv_xname); 443 #endif 444 return 0; 445 bad: 446 if (ah) 447 ath_hal_detach(ah); 448 sc->sc_invalid = 1; 449 return error; 450 } 451 452 int 453 ath_detach(struct ath_softc *sc) 454 { 455 struct ifnet *ifp = &sc->sc_ic.ic_if; 456 ath_softc_critsect_decl(s); 457 458 DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags)); 459 if ((sc->sc_flags & ATH_ATTACHED) == 0) 460 return (0); 461 462 ath_softc_critsect_begin(sc, s); 463 ath_stop(ifp); 464 #if NBPFILTER > 0 465 bpfdetach(ifp); 466 #endif 467 ath_desc_free(sc); 468 ath_hal_detach(sc->sc_ah); 469 ieee80211_ifdetach(ifp); 470 #ifdef __NetBSD__ 471 if_detach(ifp); 472 #endif 473 ath_softc_critsect_end(sc, s); 474 return 0; 475 } 476 477 void 478 ath_power(int why, void *arg) 479 { 480 struct ath_softc *sc = arg; 481 int s; 482 483 DPRINTF(("ath_power(%d)\n", why)); 484 485 s = splnet(); 486 switch (why) { 487 case PWR_SUSPEND: 488 case PWR_STANDBY: 489 ath_suspend(sc, why); 490 break; 491 case PWR_RESUME: 492 ath_resume(sc, why); 493 break; 494 case PWR_SOFTSUSPEND: 495 case PWR_SOFTSTANDBY: 496 case PWR_SOFTRESUME: 497 break; 498 } 499 splx(s); 500 } 501 502 void 503 ath_suspend(struct ath_softc *sc, int why) 504 { 505 struct ifnet *ifp = &sc->sc_ic.ic_if; 506 507 DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags)); 508 509 ath_stop(ifp); 510 if (sc->sc_power != NULL) 511 (*sc->sc_power)(sc, why); 512 } 513 514 void 515 ath_resume(struct ath_softc *sc, int why) 516 { 517 struct ifnet *ifp = &sc->sc_ic.ic_if; 518 519 DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags)); 520 521 if (ifp->if_flags & IFF_UP) { 522 ath_init(ifp); 523 #if 0 524 (void)ath_intr(sc); 525 #endif 526 if (sc->sc_power != NULL) 527 (*sc->sc_power)(sc, why); 528 if (ifp->if_flags & IFF_RUNNING) 529 ath_start(ifp); 530 } 531 } 532 533 void 534 ath_shutdown(struct ath_softc *sc) 535 { 536 #if 1 537 return; 538 #else 539 struct ifnet *ifp = &sc->sc_ic.ic_if; 540 541 DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags)); 542 543 ath_stop(ifp); 544 #endif 545 } 546 547 #ifdef __NetBSD__ 548 int 549 ath_intr(void *arg) 550 { 551 return ath_intr1((struct ath_softc *)arg); 552 } 553 #else 554 void 555 ath_intr(void *arg) 556 { 557 (void)ath_intr1((struct ath_softc *)arg); 558 } 559 #endif 560 561 static int 562 ath_intr1(struct ath_softc *sc) 563 { 564 struct ieee80211com *ic = &sc->sc_ic; 565 struct ifnet *ifp = &ic->ic_if; 566 struct ath_hal *ah = sc->sc_ah; 567 HAL_INT status; 568 569 if (sc->sc_invalid) { 570 /* 571 * The hardware is not ready/present, don't touch anything. 572 * Note this can happen early on if the IRQ is shared. 573 */ 574 DPRINTF(("ath_intr: invalid; ignored\n")); 575 return 0; 576 } 577 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 578 DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags)); 579 ath_hal_getisr(ah, &status); /* clear ISR */ 580 ath_hal_intrset(ah, 0); /* disable further intr's */ 581 return 1; /* XXX */ 582 } 583 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 584 DPRINTF2(("ath_intr: status 0x%x\n", status)); 585 #ifdef AR_DEBUG 586 if (ath_debug && 587 (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) { 588 if_printf(ifp, "ath_intr: status 0x%x\n", status); 589 ath_hal_dumpstate(ah); 590 } 591 #endif /* AR_DEBUG */ 592 if (status & HAL_INT_FATAL) { 593 sc->sc_stats.ast_hardware++; 594 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 595 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask); 596 } else if (status & HAL_INT_RXORN) { 597 sc->sc_stats.ast_rxorn++; 598 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 599 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask); 600 } else { 601 if (status & HAL_INT_RXEOL) { 602 /* 603 * NB: the hardware should re-read the link when 604 * RXE bit is written, but it doesn't work at 605 * least on older hardware revs. 606 */ 607 sc->sc_stats.ast_rxeol++; 608 sc->sc_rxlink = NULL; 609 } 610 if (status & HAL_INT_TXURN) { 611 sc->sc_stats.ast_txurn++; 612 /* bump tx trigger level */ 613 ath_hal_updatetxtriglevel(ah, AH_TRUE); 614 } 615 if (status & HAL_INT_RX) 616 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask); 617 if (status & HAL_INT_TX) 618 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask); 619 if (status & HAL_INT_SWBA) 620 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_swbatask); 621 if (status & HAL_INT_BMISS) { 622 sc->sc_stats.ast_bmiss++; 623 ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask); 624 } 625 } 626 return 1; 627 } 628 629 static void 630 ath_fatal_proc(void *arg, int pending) 631 { 632 struct ath_softc *sc = arg; 633 634 device_printf(sc->sc_dev, "hardware error; resetting\n"); 635 ath_reset(sc); 636 } 637 638 static void 639 ath_rxorn_proc(void *arg, int pending) 640 { 641 struct ath_softc *sc = arg; 642 643 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 644 ath_reset(sc); 645 } 646 647 static void 648 ath_bmiss_proc(void *arg, int pending) 649 { 650 struct ath_softc *sc = arg; 651 struct ieee80211com *ic = &sc->sc_ic; 652 653 DPRINTF(("ath_bmiss_proc: pending %u\n", pending)); 654 KASSERT(ic->ic_opmode == IEEE80211_M_STA, 655 ("unexpect operating mode %u", ic->ic_opmode)); 656 if (ic->ic_state == IEEE80211_S_RUN) 657 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 658 } 659 660 static u_int 661 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 662 { 663 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan); 664 665 switch (mode) { 666 case IEEE80211_MODE_AUTO: 667 return 0; 668 case IEEE80211_MODE_11A: 669 return CHANNEL_A; 670 case IEEE80211_MODE_11B: 671 return CHANNEL_B; 672 case IEEE80211_MODE_11G: 673 return CHANNEL_PUREG; 674 case IEEE80211_MODE_TURBO: 675 return CHANNEL_T; 676 default: 677 panic("%s: unsupported mode %d\n", __func__, mode); 678 return 0; 679 } 680 } 681 682 #ifdef __NetBSD__ 683 static int 684 ath_init(struct ifnet *ifp) 685 { 686 return ath_init1((struct ath_softc *)ifp->if_softc); 687 } 688 #else 689 static void 690 ath_init(void *arg) 691 { 692 (void)ath_init1((struct ath_softc *)arg); 693 } 694 #endif 695 696 static int 697 ath_init1(struct ath_softc *sc) 698 { 699 struct ieee80211com *ic = &sc->sc_ic; 700 struct ifnet *ifp = &ic->ic_if; 701 struct ieee80211_node *ni; 702 enum ieee80211_phymode mode; 703 struct ath_hal *ah = sc->sc_ah; 704 HAL_STATUS status; 705 HAL_CHANNEL hchan; 706 int error = 0; 707 ath_softc_critsect_decl(s); 708 709 DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags)); 710 711 #ifdef __NetBSD__ 712 if ((error = ath_enable(sc)) != 0) 713 return error; 714 #endif 715 716 ath_softc_critsect_begin(sc, s); 717 /* 718 * Stop anything previously setup. This is safe 719 * whether this is the first time through or not. 720 */ 721 ath_stop(ifp); 722 723 /* 724 * The basic interface to setting the hardware in a good 725 * state is ``reset''. On return the hardware is known to 726 * be powered up and with interrupts disabled. This must 727 * be followed by initialization of the appropriate bits 728 * and then setup of the interrupt mask. 729 */ 730 hchan.channel = ic->ic_ibss_chan->ic_freq; 731 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 732 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 733 if_printf(ifp, "unable to reset hardware; hal status %u\n", 734 status); 735 error = -1; 736 goto done; 737 } 738 739 /* 740 * Setup the hardware after reset: the key cache 741 * is filled as needed and the receive engine is 742 * set going. Frame transmit is handled entirely 743 * in the frame output path; there's nothing to do 744 * here except setup the interrupt mask. 745 */ 746 if (ic->ic_flags & IEEE80211_F_WEPON) 747 ath_initkeytable(sc); 748 if ((error = ath_startrecv(sc)) != 0) { 749 if_printf(ifp, "unable to start recv logic\n"); 750 goto done; 751 } 752 753 /* 754 * Enable interrupts. 755 */ 756 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 757 | HAL_INT_RXEOL | HAL_INT_RXORN 758 | HAL_INT_FATAL | HAL_INT_GLOBAL; 759 ath_hal_intrset(ah, sc->sc_imask); 760 761 ifp->if_flags |= IFF_RUNNING; 762 ic->ic_state = IEEE80211_S_INIT; 763 764 /* 765 * The hardware should be ready to go now so it's safe 766 * to kick the 802.11 state machine as it's likely to 767 * immediately call back to us to send mgmt frames. 768 */ 769 ni = ic->ic_bss; 770 ni->ni_chan = ic->ic_ibss_chan; 771 mode = ieee80211_chan2mode(ic, ni->ni_chan); 772 if (mode != sc->sc_curmode) 773 ath_setcurmode(sc, mode); 774 if (ic->ic_opmode != IEEE80211_M_MONITOR) 775 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 776 else 777 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 778 done: 779 ath_softc_critsect_end(sc, s); 780 return error; 781 } 782 783 static void 784 ath_stop(struct ifnet *ifp) 785 { 786 struct ieee80211com *ic = (struct ieee80211com *) ifp; 787 struct ath_softc *sc = ifp->if_softc; 788 struct ath_hal *ah = sc->sc_ah; 789 ath_softc_critsect_decl(s); 790 791 DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n", 792 sc->sc_invalid, ifp->if_flags)); 793 794 ath_softc_critsect_begin(sc, s); 795 if (ifp->if_flags & IFF_RUNNING) { 796 /* 797 * Shutdown the hardware and driver: 798 * disable interrupts 799 * turn off timers 800 * clear transmit machinery 801 * clear receive machinery 802 * drain and release tx queues 803 * reclaim beacon resources 804 * reset 802.11 state machine 805 * power down hardware 806 * 807 * Note that some of this work is not possible if the 808 * hardware is gone (invalid). 809 */ 810 ifp->if_flags &= ~IFF_RUNNING; 811 ifp->if_timer = 0; 812 if (!sc->sc_invalid) 813 ath_hal_intrset(ah, 0); 814 ath_draintxq(sc); 815 if (!sc->sc_invalid) 816 ath_stoprecv(sc); 817 else 818 sc->sc_rxlink = NULL; 819 #ifdef __FreeBSD__ 820 IF_DRAIN(&ifp->if_snd); 821 #else 822 IF_PURGE(&ifp->if_snd); 823 #endif 824 ath_beacon_free(sc); 825 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 826 if (!sc->sc_invalid) { 827 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 828 } 829 #ifdef __NetBSD__ 830 ath_disable(sc); 831 #endif 832 } 833 ath_softc_critsect_end(sc, s); 834 } 835 836 /* 837 * Reset the hardware w/o losing operational state. This is 838 * basically a more efficient way of doing ath_stop, ath_init, 839 * followed by state transitions to the current 802.11 840 * operational state. Used to recover from errors rx overrun 841 * and to reset the hardware when rf gain settings must be reset. 842 */ 843 static void 844 ath_reset(struct ath_softc *sc) 845 { 846 struct ieee80211com *ic = &sc->sc_ic; 847 struct ifnet *ifp = &ic->ic_if; 848 struct ath_hal *ah = sc->sc_ah; 849 struct ieee80211_channel *c; 850 HAL_STATUS status; 851 HAL_CHANNEL hchan; 852 853 /* 854 * Convert to a HAL channel description with the flags 855 * constrained to reflect the current operating mode. 856 */ 857 c = ic->ic_ibss_chan; 858 hchan.channel = c->ic_freq; 859 hchan.channelFlags = ath_chan2flags(ic, c); 860 861 ath_hal_intrset(ah, 0); /* disable interrupts */ 862 ath_draintxq(sc); /* stop xmit side */ 863 ath_stoprecv(sc); /* stop recv side */ 864 /* NB: indicate channel change so we do a full reset */ 865 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 866 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 867 __func__, status); 868 ath_hal_intrset(ah, sc->sc_imask); 869 if (ath_startrecv(sc) != 0) /* restart recv */ 870 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 871 ath_start(ifp); /* restart xmit */ 872 if (ic->ic_state == IEEE80211_S_RUN) 873 ath_beacon_config(sc); /* restart beacons */ 874 } 875 876 static void 877 ath_start(struct ifnet *ifp) 878 { 879 struct ath_softc *sc = ifp->if_softc; 880 struct ath_hal *ah = sc->sc_ah; 881 struct ieee80211com *ic = &sc->sc_ic; 882 struct ieee80211_node *ni; 883 struct ath_buf *bf; 884 struct mbuf *m; 885 struct ieee80211_frame *wh; 886 ath_txbuf_critsect_decl(s); 887 888 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 889 return; 890 for (;;) { 891 /* 892 * Grab a TX buffer and associated resources. 893 */ 894 ath_txbuf_critsect_begin(sc, s); 895 bf = TAILQ_FIRST(&sc->sc_txbuf); 896 if (bf != NULL) 897 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 898 ath_txbuf_critsect_end(sc, s); 899 if (bf == NULL) { 900 DPRINTF(("ath_start: out of xmit buffers\n")); 901 sc->sc_stats.ast_tx_qstop++; 902 ifp->if_flags |= IFF_OACTIVE; 903 break; 904 } 905 /* 906 * Poll the management queue for frames; they 907 * have priority over normal data frames. 908 */ 909 IF_DEQUEUE(&ic->ic_mgtq, m); 910 if (m == NULL) { 911 /* 912 * No data frames go out unless we're associated. 913 */ 914 if (ic->ic_state != IEEE80211_S_RUN) { 915 DPRINTF(("ath_start: ignore data packet, " 916 "state %u\n", ic->ic_state)); 917 sc->sc_stats.ast_tx_discard++; 918 ath_txbuf_critsect_begin(sc, s); 919 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 920 ath_txbuf_critsect_end(sc, s); 921 break; 922 } 923 IF_DEQUEUE(&ifp->if_snd, m); 924 if (m == NULL) { 925 ath_txbuf_critsect_begin(sc, s); 926 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 927 ath_txbuf_critsect_end(sc, s); 928 break; 929 } 930 ifp->if_opackets++; 931 932 #ifdef __NetBSD__ 933 #if NBPFILTER > 0 934 if (ifp->if_bpf) 935 bpf_mtap(ifp->if_bpf, m); 936 #endif 937 #endif 938 #ifdef __FreeBSD__ 939 BPF_MTAP(ifp, m); 940 #endif 941 /* 942 * Encapsulate the packet in prep for transmission. 943 */ 944 m = ieee80211_encap(ifp, m, &ni); 945 if (m == NULL) { 946 DPRINTF(("ath_start: encapsulation failure\n")); 947 sc->sc_stats.ast_tx_encap++; 948 goto bad; 949 } 950 wh = mtod(m, struct ieee80211_frame *); 951 if (ic->ic_flags & IEEE80211_F_WEPON) 952 wh->i_fc[1] |= IEEE80211_FC1_WEP; 953 } else { 954 /* 955 * Hack! The referenced node pointer is in the 956 * rcvif field of the packet header. This is 957 * placed there by ieee80211_mgmt_output because 958 * we need to hold the reference with the frame 959 * and there's no other way (other than packet 960 * tags which we consider too expensive to use) 961 * to pass it along. 962 */ 963 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 964 m->m_pkthdr.rcvif = NULL; 965 966 wh = mtod(m, struct ieee80211_frame *); 967 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 968 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 969 /* fill time stamp */ 970 u_int64_t tsf; 971 u_int32_t *tstamp; 972 973 tsf = ath_hal_gettsf64(ah); 974 /* XXX: adjust 100us delay to xmit */ 975 tsf += 100; 976 tstamp = (u_int32_t *)&wh[1]; 977 tstamp[0] = htole32(tsf & 0xffffffff); 978 tstamp[1] = htole32(tsf >> 32); 979 } 980 sc->sc_stats.ast_tx_mgmt++; 981 } 982 #if NBPFILTER > 0 983 if (ic->ic_rawbpf) 984 bpf_mtap(ic->ic_rawbpf, m); 985 #endif 986 987 #if NBPFILTER > 0 988 if (sc->sc_drvbpf) { 989 #ifdef __FreeBSD__ 990 struct mbuf *mb; 991 992 MGETHDR(mb, M_DONTWAIT, m->m_type); 993 if (mb != NULL) { 994 sc->sc_tx_th.wt_rate = 995 ni->ni_rates.rs_rates[ni->ni_txrate]; 996 997 mb->m_next = m; 998 mb->m_data = (caddr_t)&sc->sc_tx_th; 999 mb->m_len = sizeof(sc->sc_tx_th); 1000 mb->m_pkthdr.len += mb->m_len; 1001 bpf_mtap(sc->sc_drvbpf, mb); 1002 m_free(mb); 1003 } 1004 #else 1005 struct mbuf mb; 1006 1007 M_COPY_PKTHDR(&mb, m); 1008 sc->sc_tx_th.wt_rate = 1009 ni->ni_rates.rs_rates[ni->ni_txrate]; 1010 1011 mb.m_next = m; 1012 mb.m_data = (caddr_t)&sc->sc_tx_th; 1013 mb.m_len = sizeof(sc->sc_tx_th); 1014 mb.m_pkthdr.len += mb.m_len; 1015 bpf_mtap(sc->sc_drvbpf, &mb); 1016 #endif 1017 } 1018 #endif 1019 1020 /* 1021 * TODO: 1022 * The duration field of 802.11 header should be filled. 1023 * XXX This may be done in the ieee80211 layer, but the upper 1024 * doesn't know the detail of parameters such as IFS 1025 * for now.. 1026 */ 1027 if (ath_tx_start(sc, ni, bf, m)) { 1028 bad: 1029 ath_txbuf_critsect_begin(sc, s); 1030 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1031 ath_txbuf_critsect_end(sc, s); 1032 ifp->if_oerrors++; 1033 if (ni && ni != ic->ic_bss) 1034 ieee80211_free_node(ic, ni); 1035 continue; 1036 } 1037 1038 sc->sc_tx_timer = 5; 1039 ifp->if_timer = 1; 1040 } 1041 } 1042 1043 static int 1044 ath_media_change(struct ifnet *ifp) 1045 { 1046 int error; 1047 1048 error = ieee80211_media_change(ifp); 1049 if (error == ENETRESET) { 1050 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1051 (IFF_RUNNING|IFF_UP)) 1052 ath_init(ifp); /* XXX lose error */ 1053 error = 0; 1054 } 1055 return error; 1056 } 1057 1058 static void 1059 ath_watchdog(struct ifnet *ifp) 1060 { 1061 struct ath_softc *sc = ifp->if_softc; 1062 struct ieee80211com *ic = &sc->sc_ic; 1063 1064 ifp->if_timer = 0; 1065 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 1066 return; 1067 if (sc->sc_tx_timer) { 1068 if (--sc->sc_tx_timer == 0) { 1069 if_printf(ifp, "device timeout\n"); 1070 #ifdef AR_DEBUG 1071 if (ath_debug) 1072 ath_hal_dumpstate(sc->sc_ah); 1073 #endif /* AR_DEBUG */ 1074 ath_init(ifp); /* XXX ath_reset??? */ 1075 ifp->if_oerrors++; 1076 sc->sc_stats.ast_watchdog++; 1077 return; 1078 } 1079 ifp->if_timer = 1; 1080 } 1081 if (ic->ic_fixed_rate == -1) { 1082 /* 1083 * Run the rate control algorithm if we're not 1084 * locked at a fixed rate. 1085 */ 1086 if (ic->ic_opmode == IEEE80211_M_STA) 1087 ath_rate_ctl(sc, ic->ic_bss); 1088 else 1089 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 1090 } 1091 ieee80211_watchdog(ifp); 1092 } 1093 1094 static int 1095 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1096 { 1097 struct ath_softc *sc = ifp->if_softc; 1098 struct ifreq *ifr = (struct ifreq *)data; 1099 int error = 0; 1100 ath_softc_critsect_decl(s); 1101 1102 ath_softc_critsect_begin(sc, s); 1103 switch (cmd) { 1104 case SIOCSIFFLAGS: 1105 if (ifp->if_flags & IFF_UP) { 1106 if (ifp->if_flags & IFF_RUNNING) { 1107 /* 1108 * To avoid rescanning another access point, 1109 * do not call ath_init() here. Instead, 1110 * only reflect promisc mode settings. 1111 */ 1112 ath_mode_init(sc); 1113 } else 1114 ath_init(ifp); /* XXX lose error */ 1115 } else 1116 ath_stop(ifp); 1117 break; 1118 case SIOCADDMULTI: 1119 case SIOCDELMULTI: 1120 #ifdef __FreeBSD__ 1121 /* 1122 * The upper layer has already installed/removed 1123 * the multicast address(es), just recalculate the 1124 * multicast filter for the card. 1125 */ 1126 if (ifp->if_flags & IFF_RUNNING) 1127 ath_mode_init(sc); 1128 #endif 1129 #ifdef __NetBSD__ 1130 error = (cmd == SIOCADDMULTI) ? 1131 ether_addmulti(ifr, &sc->sc_ic.ic_ec) : 1132 ether_delmulti(ifr, &sc->sc_ic.ic_ec); 1133 if (error == ENETRESET) { 1134 if (ifp->if_flags & IFF_RUNNING) 1135 ath_mode_init(sc); 1136 error = 0; 1137 } 1138 #endif 1139 break; 1140 case SIOCGATHSTATS: 1141 copyout(&sc->sc_stats, ifr->ifr_data, sizeof (sc->sc_stats)); 1142 break; 1143 default: 1144 error = ieee80211_ioctl(ifp, cmd, data); 1145 if (error == ENETRESET) { 1146 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 1147 (IFF_RUNNING|IFF_UP)) 1148 ath_init(ifp); /* XXX lose error */ 1149 error = 0; 1150 } 1151 break; 1152 } 1153 ath_softc_critsect_end(sc, s); 1154 return error; 1155 } 1156 1157 /* 1158 * Fill the hardware key cache with key entries. 1159 */ 1160 static void 1161 ath_initkeytable(struct ath_softc *sc) 1162 { 1163 struct ieee80211com *ic = &sc->sc_ic; 1164 struct ath_hal *ah = sc->sc_ah; 1165 int i; 1166 1167 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1168 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 1169 if (k->wk_len == 0) 1170 ath_hal_keyreset(ah, i); 1171 else 1172 /* XXX return value */ 1173 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 1174 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 1175 } 1176 } 1177 1178 static void 1179 ath_mcastfilter_accum(caddr_t dl, u_int32_t (*mfilt)[2]) 1180 { 1181 u_int32_t val; 1182 u_int8_t pos; 1183 1184 val = LE_READ_4(dl + 0); 1185 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1186 val = LE_READ_4(dl + 3); 1187 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 1188 pos &= 0x3f; 1189 (*mfilt)[pos / 32] |= (1 << (pos % 32)); 1190 } 1191 1192 #ifdef __FreeBSD__ 1193 static void 1194 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1195 { 1196 struct ieee80211com *ic = &sc->sc_ic; 1197 struct ifnet *ifp = &ic->ic_if; 1198 struct ifmultiaddr *ifma; 1199 1200 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1201 caddr_t dl; 1202 1203 /* calculate XOR of eight 6bit values */ 1204 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1205 ath_mcastfilter_accum(dl, &mfilt); 1206 } 1207 } 1208 #else 1209 static void 1210 ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2]) 1211 { 1212 struct ifnet *ifp = &sc->sc_ic.ic_if; 1213 struct ether_multi *enm; 1214 struct ether_multistep estep; 1215 1216 ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ec, enm); 1217 while (enm != NULL) { 1218 /* XXX Punt on ranges. */ 1219 if (!IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) { 1220 (*mfilt)[0] = (*mfilt)[1] = ~((u_int32_t)0); 1221 ifp->if_flags |= IFF_ALLMULTI; 1222 return; 1223 } 1224 ath_mcastfilter_accum(enm->enm_addrlo, mfilt); 1225 ETHER_NEXT_MULTI(estep, enm); 1226 } 1227 ifp->if_flags &= ~IFF_ALLMULTI; 1228 } 1229 #endif 1230 1231 static void 1232 ath_mode_init(struct ath_softc *sc) 1233 { 1234 struct ieee80211com *ic = &sc->sc_ic; 1235 struct ath_hal *ah = sc->sc_ah; 1236 struct ifnet *ifp = &ic->ic_if; 1237 u_int32_t rfilt, mfilt[2]; 1238 1239 /* configure operational mode */ 1240 ath_hal_setopmode(ah, ic->ic_opmode); 1241 1242 /* receive filter */ 1243 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 1244 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 1245 if (ic->ic_opmode != IEEE80211_M_STA) 1246 rfilt |= HAL_RX_FILTER_PROBEREQ; 1247 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 1248 (ifp->if_flags & IFF_PROMISC)) 1249 rfilt |= HAL_RX_FILTER_PROM; 1250 if (ic->ic_state == IEEE80211_S_SCAN) 1251 rfilt |= HAL_RX_FILTER_BEACON; 1252 ath_hal_setrxfilter(ah, rfilt); 1253 1254 /* calculate and install multicast filter */ 1255 #ifdef __FreeBSD__ 1256 if ((ifp->if_flags & IFF_ALLMULTI) == 0) { 1257 mfilt[0] = mfilt[1] = 0; 1258 ath_mcastfilter_compute(sc, &mfilt); 1259 } else { 1260 mfilt[0] = mfilt[1] = ~0; 1261 } 1262 #endif 1263 #ifdef __NetBSD__ 1264 mfilt[0] = mfilt[1] = 0; 1265 ath_mcastfilter_compute(sc, &mfilt); 1266 #endif 1267 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 1268 DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n", 1269 rfilt, mfilt[0], mfilt[1])); 1270 } 1271 1272 #ifdef __FreeBSD__ 1273 static void 1274 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 1275 { 1276 struct ath_buf *bf = arg; 1277 1278 KASSERT(nseg <= ATH_MAX_SCATTER, 1279 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 1280 bf->bf_mapsize = mapsize; 1281 bf->bf_nseg = nseg; 1282 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 1283 } 1284 #endif /* __FreeBSD__ */ 1285 1286 static struct mbuf * 1287 ath_getmbuf(int flags, int type, u_int pktlen) 1288 { 1289 struct mbuf *m; 1290 1291 KASSERT(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen)); 1292 #ifdef __FreeBSD__ 1293 if (pktlen <= MHLEN) 1294 MGETHDR(m, flags, type); 1295 else 1296 m = m_getcl(flags, type, M_PKTHDR); 1297 #else 1298 MGETHDR(m, flags, type); 1299 if (m != NULL && pktlen > MHLEN) 1300 MCLGET(m, flags); 1301 #endif 1302 return m; 1303 } 1304 1305 static int 1306 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 1307 { 1308 struct ieee80211com *ic = &sc->sc_ic; 1309 struct ifnet *ifp = &ic->ic_if; 1310 struct ath_hal *ah = sc->sc_ah; 1311 struct ieee80211_frame *wh; 1312 struct ath_buf *bf; 1313 struct ath_desc *ds; 1314 struct mbuf *m; 1315 int error, pktlen; 1316 u_int8_t *frm, rate; 1317 u_int16_t capinfo; 1318 struct ieee80211_rateset *rs; 1319 const HAL_RATE_TABLE *rt; 1320 1321 bf = sc->sc_bcbuf; 1322 if (bf->bf_m != NULL) { 1323 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1324 m_freem(bf->bf_m); 1325 bf->bf_m = NULL; 1326 bf->bf_node = NULL; 1327 } 1328 /* 1329 * NB: the beacon data buffer must be 32-bit aligned; 1330 * we assume the mbuf routines will return us something 1331 * with this alignment (perhaps should assert). 1332 */ 1333 rs = &ni->ni_rates; 1334 pktlen = sizeof (struct ieee80211_frame) 1335 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 6; 1336 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 1337 pktlen += 2; 1338 m = ath_getmbuf(M_DONTWAIT, MT_DATA, pktlen); 1339 if (m == NULL) { 1340 DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n", 1341 pktlen)); 1342 sc->sc_stats.ast_be_nombuf++; 1343 return ENOMEM; 1344 } 1345 1346 wh = mtod(m, struct ieee80211_frame *); 1347 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1348 IEEE80211_FC0_SUBTYPE_BEACON; 1349 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1350 *(u_int16_t *)wh->i_dur = 0; 1351 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 1352 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1353 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 1354 *(u_int16_t *)wh->i_seq = 0; 1355 1356 /* 1357 * beacon frame format 1358 * [8] time stamp 1359 * [2] beacon interval 1360 * [2] cabability information 1361 * [tlv] ssid 1362 * [tlv] supported rates 1363 * [tlv] parameter set (IBSS) 1364 * [tlv] extended supported rates 1365 */ 1366 frm = (u_int8_t *)&wh[1]; 1367 memset(frm, 0, 8); /* timestamp is set by hardware */ 1368 frm += 8; 1369 *(u_int16_t *)frm = htole16(ni->ni_intval); 1370 frm += 2; 1371 if (ic->ic_opmode == IEEE80211_M_IBSS) 1372 capinfo = IEEE80211_CAPINFO_IBSS; 1373 else 1374 capinfo = IEEE80211_CAPINFO_ESS; 1375 if (ic->ic_flags & IEEE80211_F_WEPON) 1376 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1377 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1378 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1379 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1380 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1381 *(u_int16_t *)frm = htole16(capinfo); 1382 frm += 2; 1383 *frm++ = IEEE80211_ELEMID_SSID; 1384 *frm++ = ni->ni_esslen; 1385 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1386 frm += ni->ni_esslen; 1387 frm = ieee80211_add_rates(frm, rs); 1388 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1389 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1390 *frm++ = 2; 1391 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1392 } else { 1393 /* TODO: TIM */ 1394 *frm++ = IEEE80211_ELEMID_TIM; 1395 *frm++ = 4; /* length */ 1396 *frm++ = 0; /* DTIM count */ 1397 *frm++ = 1; /* DTIM period */ 1398 *frm++ = 0; /* bitmap control */ 1399 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1400 } 1401 frm = ieee80211_add_xrates(frm, rs); 1402 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1403 KASSERT(m->m_pkthdr.len <= pktlen, 1404 ("beacon bigger than expected, len %u calculated %u", 1405 m->m_pkthdr.len, pktlen)); 1406 1407 DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len)); 1408 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, BUS_DMA_NOWAIT); 1409 if (error != 0) { 1410 m_freem(m); 1411 return error; 1412 } 1413 KASSERT(bf->bf_nseg == 1, 1414 ("ath_beacon_alloc: multi-segment packet; nseg %u", 1415 bf->bf_nseg)); 1416 bf->bf_m = m; 1417 1418 /* setup descriptors */ 1419 ds = bf->bf_desc; 1420 1421 ds->ds_link = 0; 1422 ds->ds_data = bf->bf_segs[0].ds_addr; 1423 1424 DPRINTF2(("%s: segaddr %p seglen %u\n", __func__, 1425 (caddr_t)bf->bf_segs[0].ds_addr, (u_int)bf->bf_segs[0].ds_len)); 1426 1427 /* 1428 * Calculate rate code. 1429 * XXX everything at min xmit rate 1430 */ 1431 rt = sc->sc_currates; 1432 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1433 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1434 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1435 else 1436 rate = rt->info[0].rateCode; 1437 if (!ath_hal_setuptxdesc(ah, ds 1438 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1439 , sizeof(struct ieee80211_frame) /* header length */ 1440 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1441 , 0x20 /* txpower XXX */ 1442 , rate, 1 /* series 0 rate/tries */ 1443 , HAL_TXKEYIX_INVALID /* no encryption */ 1444 , 0 /* antenna mode */ 1445 , HAL_TXDESC_NOACK /* no ack for beacons */ 1446 , 0 /* rts/cts rate */ 1447 , 0 /* rts/cts duration */ 1448 )) { 1449 printf("%s: ath_hal_setuptxdesc failed\n", __func__); 1450 return -1; 1451 } 1452 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1453 /* XXX verify mbuf data area covers this roundup */ 1454 if (!ath_hal_filltxdesc(ah, ds 1455 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1456 , AH_TRUE /* first segment */ 1457 , AH_TRUE /* last segment */ 1458 )) { 1459 printf("%s: ath_hal_filltxdesc failed\n", __func__); 1460 return -1; 1461 } 1462 1463 /* XXX it is not appropriate to bus_dmamap_sync? -dcy */ 1464 1465 return 0; 1466 } 1467 1468 static void 1469 ath_beacon_proc(void *arg, int pending) 1470 { 1471 struct ath_softc *sc = arg; 1472 struct ieee80211com *ic = &sc->sc_ic; 1473 struct ath_buf *bf = sc->sc_bcbuf; 1474 struct ath_hal *ah = sc->sc_ah; 1475 1476 DPRINTF2(("%s: pending %u\n", __func__, pending)); 1477 if (ic->ic_opmode == IEEE80211_M_STA || 1478 bf == NULL || bf->bf_m == NULL) { 1479 DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n", 1480 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1481 return; 1482 } 1483 /* TODO: update beacon to reflect PS poll state */ 1484 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1485 DPRINTF(("%s: beacon queue %u did not stop?", 1486 __func__, sc->sc_bhalq)); 1487 return; /* busy, XXX is this right? */ 1488 } 1489 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 1490 1491 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1492 ath_hal_txstart(ah, sc->sc_bhalq); 1493 DPRINTF2(("%s: BCDP%u = %p (%p)\n", __func__, 1494 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1495 } 1496 1497 static void 1498 ath_beacon_free(struct ath_softc *sc) 1499 { 1500 struct ath_buf *bf = sc->sc_bcbuf; 1501 1502 if (bf->bf_m != NULL) { 1503 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1504 m_freem(bf->bf_m); 1505 bf->bf_m = NULL; 1506 bf->bf_node = NULL; 1507 } 1508 } 1509 1510 /* 1511 * Configure the beacon and sleep timers. 1512 * 1513 * When operating as an AP this resets the TSF and sets 1514 * up the hardware to notify us when we need to issue beacons. 1515 * 1516 * When operating in station mode this sets up the beacon 1517 * timers according to the timestamp of the last received 1518 * beacon and the current TSF, configures PCF and DTIM 1519 * handling, programs the sleep registers so the hardware 1520 * will wakeup in time to receive beacons, and configures 1521 * the beacon miss handling so we'll receive a BMISS 1522 * interrupt when we stop seeing beacons from the AP 1523 * we've associated with. 1524 */ 1525 static void 1526 ath_beacon_config(struct ath_softc *sc) 1527 { 1528 struct ath_hal *ah = sc->sc_ah; 1529 struct ieee80211com *ic = &sc->sc_ic; 1530 struct ieee80211_node *ni = ic->ic_bss; 1531 u_int32_t nexttbtt; 1532 1533 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1534 (LE_READ_4(ni->ni_tstamp) >> 10); 1535 DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1536 nexttbtt += ni->ni_intval; 1537 if (ic->ic_opmode == IEEE80211_M_STA) { 1538 HAL_BEACON_STATE bs; 1539 u_int32_t bmisstime; 1540 1541 /* NB: no PCF support right now */ 1542 memset(&bs, 0, sizeof(bs)); 1543 bs.bs_intval = ni->ni_intval; 1544 bs.bs_nexttbtt = nexttbtt; 1545 bs.bs_dtimperiod = bs.bs_intval; 1546 bs.bs_nextdtim = nexttbtt; 1547 /* 1548 * Calculate the number of consecutive beacons to miss 1549 * before taking a BMISS interrupt. The configuration 1550 * is specified in ms, so we need to convert that to 1551 * TU's and then calculate based on the beacon interval. 1552 * Note that we clamp the result to at most 10 beacons. 1553 */ 1554 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1555 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1556 if (bs.bs_bmissthreshold > 10) 1557 bs.bs_bmissthreshold = 10; 1558 else if (bs.bs_bmissthreshold <= 0) 1559 bs.bs_bmissthreshold = 1; 1560 1561 /* 1562 * Calculate sleep duration. The configuration is 1563 * given in ms. We insure a multiple of the beacon 1564 * period is used. Also, if the sleep duration is 1565 * greater than the DTIM period then it makes senses 1566 * to make it a multiple of that. 1567 * 1568 * XXX fixed at 100ms 1569 */ 1570 bs.bs_sleepduration = 1571 roundup((100 * 1000) / 1024, bs.bs_intval); 1572 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1573 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1574 1575 DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1576 , __func__ 1577 , bs.bs_intval 1578 , bs.bs_nexttbtt 1579 , bs.bs_dtimperiod 1580 , bs.bs_nextdtim 1581 , bs.bs_bmissthreshold 1582 , bs.bs_sleepduration 1583 )); 1584 ath_hal_intrset(ah, 0); 1585 /* 1586 * Reset our tsf so the hardware will update the 1587 * tsf register to reflect timestamps found in 1588 * received beacons. 1589 */ 1590 ath_hal_resettsf(ah); 1591 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1592 sc->sc_imask |= HAL_INT_BMISS; 1593 ath_hal_intrset(ah, sc->sc_imask); 1594 } else { 1595 DPRINTF(("%s: intval %u nexttbtt %u\n", 1596 __func__, ni->ni_intval, nexttbtt)); 1597 ath_hal_intrset(ah, 0); 1598 ath_hal_beaconinit(ah, ic->ic_opmode, 1599 nexttbtt, ni->ni_intval); 1600 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1601 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1602 ath_hal_intrset(ah, sc->sc_imask); 1603 } 1604 } 1605 1606 #ifdef __FreeBSD__ 1607 static void 1608 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1609 { 1610 bus_addr_t *paddr = (bus_addr_t*) arg; 1611 *paddr = segs->ds_addr; 1612 } 1613 #endif 1614 1615 #ifdef __FreeBSD__ 1616 static int 1617 ath_desc_alloc(struct ath_softc *sc) 1618 { 1619 int i, bsize, error; 1620 struct ath_desc *ds; 1621 struct ath_buf *bf; 1622 1623 /* allocate descriptors */ 1624 sc->sc_desc_len = sizeof(struct ath_desc) * 1625 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1626 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1627 if (error != 0) 1628 return error; 1629 1630 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1631 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1632 1633 if (error != 0) 1634 goto fail0; 1635 1636 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1637 sc->sc_desc, sc->sc_desc_len, 1638 ath_load_cb, &sc->sc_desc_paddr, 1639 BUS_DMA_NOWAIT); 1640 if (error != 0) 1641 goto fail1; 1642 1643 ds = sc->sc_desc; 1644 DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n", 1645 ds, sc->sc_desc_len, 1646 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1647 1648 /* allocate buffers */ 1649 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1650 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1651 if (bf == NULL) { 1652 printf("%s: unable to allocate Tx/Rx buffers\n", 1653 sc->sc_dev.dv_xname); 1654 error = -1; 1655 goto fail2; 1656 } 1657 sc->sc_bufptr = bf; 1658 1659 TAILQ_INIT(&sc->sc_rxbuf); 1660 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1661 bf->bf_desc = ds; 1662 bf->bf_daddr = sc->sc_desc_paddr + 1663 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1664 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1665 &bf->bf_dmamap); 1666 if (error != 0) 1667 break; 1668 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1669 } 1670 1671 TAILQ_INIT(&sc->sc_txbuf); 1672 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1673 bf->bf_desc = ds; 1674 bf->bf_daddr = sc->sc_desc_paddr + 1675 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1676 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1677 &bf->bf_dmamap); 1678 if (error != 0) 1679 break; 1680 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1681 } 1682 TAILQ_INIT(&sc->sc_txq); 1683 1684 /* beacon buffer */ 1685 bf->bf_desc = ds; 1686 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1687 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1688 if (error != 0) 1689 return error; 1690 sc->sc_bcbuf = bf; 1691 return 0; 1692 1693 fail2: 1694 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1695 fail1: 1696 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1697 fail0: 1698 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1699 sc->sc_ddmamap = NULL; 1700 return error; 1701 } 1702 #else 1703 static int 1704 ath_desc_alloc(struct ath_softc *sc) 1705 { 1706 int i, bsize, error = -1; 1707 struct ath_desc *ds; 1708 struct ath_buf *bf; 1709 1710 /* allocate descriptors */ 1711 sc->sc_desc_len = sizeof(struct ath_desc) * 1712 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1713 if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE, 1714 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) { 1715 printf("%s: unable to allocate control data, error = %d\n", 1716 sc->sc_dev.dv_xname, error); 1717 goto fail0; 1718 } 1719 1720 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg, 1721 sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) { 1722 printf("%s: unable to map control data, error = %d\n", 1723 sc->sc_dev.dv_xname, error); 1724 goto fail1; 1725 } 1726 1727 if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1, 1728 sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) { 1729 printf("%s: unable to create control data DMA map, " 1730 "error = %d\n", sc->sc_dev.dv_xname, error); 1731 goto fail2; 1732 } 1733 1734 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc, 1735 sc->sc_desc_len, NULL, 0)) != 0) { 1736 printf("%s: unable to load control data DMA map, error = %d\n", 1737 sc->sc_dev.dv_xname, error); 1738 goto fail3; 1739 } 1740 1741 ds = sc->sc_desc; 1742 sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr; 1743 1744 DPRINTF(("ath_desc_alloc: DMA map: %p (%lu) -> %p (%lu)\n", 1745 ds, (u_long)sc->sc_desc_len, 1746 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1747 1748 /* allocate buffers */ 1749 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1750 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1751 if (bf == NULL) { 1752 printf("%s: unable to allocate Tx/Rx buffers\n", 1753 sc->sc_dev.dv_xname); 1754 error = ENOMEM; 1755 goto fail3; 1756 } 1757 sc->sc_bufptr = bf; 1758 1759 TAILQ_INIT(&sc->sc_rxbuf); 1760 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1761 bf->bf_desc = ds; 1762 bf->bf_daddr = sc->sc_desc_paddr + 1763 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1764 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 1765 MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1766 printf("%s: unable to create Rx dmamap, error = %d\n", 1767 sc->sc_dev.dv_xname, error); 1768 goto fail4; 1769 } 1770 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1771 } 1772 1773 TAILQ_INIT(&sc->sc_txbuf); 1774 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1775 bf->bf_desc = ds; 1776 bf->bf_daddr = sc->sc_desc_paddr + 1777 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1778 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1779 ATH_TXDESC, MCLBYTES, 0, 0, &bf->bf_dmamap)) != 0) { 1780 printf("%s: unable to create Tx dmamap, error = %d\n", 1781 sc->sc_dev.dv_xname, error); 1782 goto fail5; 1783 } 1784 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1785 } 1786 TAILQ_INIT(&sc->sc_txq); 1787 1788 /* beacon buffer */ 1789 bf->bf_desc = ds; 1790 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1791 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0, 1792 &bf->bf_dmamap)) != 0) { 1793 printf("%s: unable to create beacon dmamap, error = %d\n", 1794 sc->sc_dev.dv_xname, error); 1795 goto fail5; 1796 } 1797 sc->sc_bcbuf = bf; 1798 return 0; 1799 1800 fail5: 1801 for (i = ATH_RXBUF; i < ATH_RXBUF + ATH_TXBUF; i++) { 1802 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1803 continue; 1804 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1805 } 1806 fail4: 1807 for (i = 0; i < ATH_RXBUF; i++) { 1808 if (sc->sc_bufptr[i].bf_dmamap == NULL) 1809 continue; 1810 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap); 1811 } 1812 fail3: 1813 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1814 fail2: 1815 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1816 sc->sc_ddmamap = NULL; 1817 fail1: 1818 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len); 1819 fail0: 1820 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1821 return error; 1822 } 1823 #endif 1824 1825 static void 1826 ath_desc_free(struct ath_softc *sc) 1827 { 1828 struct ath_buf *bf; 1829 1830 #ifdef __FreeBSD__ 1831 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1832 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1833 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1834 #else 1835 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1836 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1837 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg); 1838 #endif 1839 1840 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1841 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1842 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1843 m_freem(bf->bf_m); 1844 } 1845 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 1846 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1847 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 1848 if (bf->bf_m) { 1849 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1850 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1851 m_freem(bf->bf_m); 1852 bf->bf_m = NULL; 1853 } 1854 } 1855 if (sc->sc_bcbuf != NULL) { 1856 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1857 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1858 sc->sc_bcbuf = NULL; 1859 } 1860 1861 TAILQ_INIT(&sc->sc_rxbuf); 1862 TAILQ_INIT(&sc->sc_txbuf); 1863 TAILQ_INIT(&sc->sc_txq); 1864 free(sc->sc_bufptr, M_DEVBUF); 1865 sc->sc_bufptr = NULL; 1866 } 1867 1868 static struct ieee80211_node * 1869 ath_node_alloc(struct ieee80211com *ic) 1870 { 1871 struct ath_node *an = 1872 malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1873 return an ? &an->an_node : NULL; 1874 } 1875 1876 static void 1877 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 1878 { 1879 struct ath_softc *sc = ic->ic_if.if_softc; 1880 struct ath_buf *bf; 1881 1882 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1883 if (bf->bf_node == ni) 1884 bf->bf_node = NULL; 1885 } 1886 free(ni, M_DEVBUF); 1887 } 1888 1889 static void 1890 ath_node_copy(struct ieee80211com *ic, 1891 struct ieee80211_node *dst, const struct ieee80211_node *src) 1892 { 1893 *(struct ath_node *)dst = *(const struct ath_node *)src; 1894 } 1895 1896 static int 1897 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 1898 { 1899 struct ath_hal *ah = sc->sc_ah; 1900 int error; 1901 struct mbuf *m; 1902 struct ath_desc *ds; 1903 1904 m = bf->bf_m; 1905 if (m == NULL) { 1906 /* 1907 * NB: by assigning a page to the rx dma buffer we 1908 * implicitly satisfy the Atheros requirement that 1909 * this buffer be cache-line-aligned and sized to be 1910 * multiple of the cache line size. Not doing this 1911 * causes weird stuff to happen (for the 5210 at least). 1912 */ 1913 m = ath_getmbuf(M_DONTWAIT, MT_DATA, MCLBYTES); 1914 if (m == NULL) { 1915 DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n")); 1916 sc->sc_stats.ast_rx_nombuf++; 1917 return ENOMEM; 1918 } 1919 bf->bf_m = m; 1920 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 1921 1922 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m, 1923 BUS_DMA_NOWAIT); 1924 if (error != 0) { 1925 DPRINTF(("ath_rxbuf_init: ath_buf_dmamap_load_mbuf failed;" 1926 " error %d\n", error)); 1927 sc->sc_stats.ast_rx_busdma++; 1928 return error; 1929 } 1930 KASSERT(bf->bf_nseg == 1, 1931 ("ath_rxbuf_init: multi-segment packet; nseg %u", 1932 bf->bf_nseg)); 1933 } 1934 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREREAD); 1935 1936 /* setup descriptors */ 1937 ds = bf->bf_desc; 1938 ds->ds_link = 0; 1939 ds->ds_data = bf->bf_segs[0].ds_addr; 1940 ath_hal_setuprxdesc(ah, ds 1941 , m->m_len /* buffer size */ 1942 , 0 1943 ); 1944 1945 if (sc->sc_rxlink != NULL) 1946 *sc->sc_rxlink = bf->bf_daddr; 1947 sc->sc_rxlink = &ds->ds_link; 1948 return 0; 1949 } 1950 1951 static void 1952 ath_rx_proc(void *arg, int npending) 1953 { 1954 struct ath_softc *sc = arg; 1955 struct ath_buf *bf; 1956 struct ieee80211com *ic = &sc->sc_ic; 1957 struct ifnet *ifp = &ic->ic_if; 1958 struct ath_hal *ah = sc->sc_ah; 1959 struct ath_desc *ds; 1960 struct mbuf *m; 1961 struct ieee80211_frame *wh, whbuf; 1962 struct ieee80211_node *ni; 1963 int len; 1964 u_int phyerr; 1965 HAL_STATUS status; 1966 1967 DPRINTF2(("ath_rx_proc: pending %u\n", npending)); 1968 do { 1969 bf = TAILQ_FIRST(&sc->sc_rxbuf); 1970 if (bf == NULL) { /* NB: shouldn't happen */ 1971 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 1972 break; 1973 } 1974 m = bf->bf_m; 1975 if (m == NULL) { /* NB: shouldn't happen */ 1976 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 1977 continue; 1978 } 1979 ds = bf->bf_desc; 1980 status = ath_hal_rxprocdesc(ah, ds); 1981 #ifdef AR_DEBUG 1982 if (ath_debug > 1) 1983 ath_printrxbuf(bf, status == HAL_OK); 1984 #endif 1985 if (status == HAL_EINPROGRESS) 1986 break; 1987 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 1988 if (ds->ds_rxstat.rs_status != 0) { 1989 ifp->if_ierrors++; 1990 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 1991 sc->sc_stats.ast_rx_crcerr++; 1992 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 1993 sc->sc_stats.ast_rx_fifoerr++; 1994 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 1995 sc->sc_stats.ast_rx_badcrypt++; 1996 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 1997 sc->sc_stats.ast_rx_phyerr++; 1998 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 1999 sc->sc_stats.ast_rx_phy[phyerr]++; 2000 } 2001 goto rx_next; 2002 } 2003 2004 len = ds->ds_rxstat.rs_datalen; 2005 if (len < sizeof(struct ieee80211_frame)) { 2006 DPRINTF(("ath_rx_proc: short packet %d\n", len)); 2007 sc->sc_stats.ast_rx_tooshort++; 2008 goto rx_next; 2009 } 2010 2011 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTREAD); 2012 2013 wh = mtod(m, struct ieee80211_frame *); 2014 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 2015 IEEE80211_FC0_TYPE_CTL && 2016 ic->ic_opmode != IEEE80211_M_MONITOR) { 2017 /* 2018 * Discard control frame when not in monitor mode. 2019 */ 2020 DPRINTF(("ath_rx_proc: control frame\n")); 2021 sc->sc_stats.ast_rx_ctl++; 2022 goto rx_next; 2023 } 2024 2025 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2026 bf->bf_m = NULL; 2027 m->m_pkthdr.rcvif = ifp; 2028 m->m_pkthdr.len = m->m_len = len; 2029 2030 #if NBPFILTER > 0 2031 if (sc->sc_drvbpf) { 2032 #ifdef __FreeBSD__ 2033 struct mbuf *mb; 2034 2035 /* XXX pre-allocate space when setting up recv's */ 2036 MGETHDR(mb, M_DONTWAIT, m->m_type); 2037 if (mb != NULL) { 2038 sc->sc_rx_th.wr_rate = 2039 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2040 sc->sc_rx_th.wr_antsignal = 2041 ds->ds_rxstat.rs_rssi; 2042 sc->sc_rx_th.wr_antenna = 2043 ds->ds_rxstat.rs_antenna; 2044 /* XXX TSF */ 2045 2046 (void) m_dup_pkthdr(mb, m, M_DONTWAIT); 2047 mb->m_next = m; 2048 mb->m_data = (caddr_t)&sc->sc_rx_th; 2049 mb->m_len = sizeof(sc->sc_rx_th); 2050 mb->m_pkthdr.len += mb->m_len; 2051 bpf_mtap(sc->sc_drvbpf, mb); 2052 m_free(mb); 2053 } 2054 #else 2055 /* XXX pre-allocate space when setting up recv's */ 2056 struct mbuf mb; 2057 2058 sc->sc_rx_th.wr_rate = 2059 sc->sc_hwmap[ds->ds_rxstat.rs_rate]; 2060 sc->sc_rx_th.wr_antsignal = 2061 ds->ds_rxstat.rs_rssi; 2062 sc->sc_rx_th.wr_antenna = 2063 ds->ds_rxstat.rs_antenna; 2064 /* XXX TSF */ 2065 2066 M_COPY_PKTHDR(&mb, m); 2067 mb.m_next = m; 2068 mb.m_data = (caddr_t)&sc->sc_rx_th; 2069 mb.m_len = sizeof(sc->sc_rx_th); 2070 mb.m_pkthdr.len += mb.m_len; 2071 bpf_mtap(sc->sc_drvbpf, &mb); 2072 #endif 2073 } 2074 #endif 2075 2076 m_adj(m, -IEEE80211_CRC_LEN); 2077 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2078 /* 2079 * WEP is decrypted by hardware. Clear WEP bit 2080 * and trim WEP header for ieee80211_input(). 2081 */ 2082 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2083 memcpy(&whbuf, wh, sizeof(whbuf)); 2084 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 2085 memcpy(mtod(m, caddr_t), &whbuf, sizeof(whbuf)); 2086 /* 2087 * Also trim WEP ICV from the tail. 2088 */ 2089 m_adj(m, -IEEE80211_WEP_CRCLEN); 2090 /* 2091 * The header has probably moved. 2092 */ 2093 wh = mtod(m, struct ieee80211_frame *); 2094 } 2095 2096 /* 2097 * Locate the node for sender, track state, and 2098 * then pass this node (referenced) up to the 802.11 2099 * layer for its use. We are required to pass 2100 * something so we fall back to ic_bss when this frame 2101 * is from an unknown sender. 2102 */ 2103 if (ic->ic_opmode != IEEE80211_M_STA) { 2104 ni = ieee80211_find_node(ic, wh->i_addr2); 2105 if (ni == NULL) 2106 ni = ieee80211_ref_node(ic->ic_bss); 2107 } else 2108 ni = ieee80211_ref_node(ic->ic_bss); 2109 ATH_NODE(ni)->an_rx_antenna = ds->ds_rxstat.rs_antenna; 2110 /* 2111 * Send frame up for processing. 2112 */ 2113 ieee80211_input(ifp, m, ni, 2114 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 2115 /* 2116 * The frame may have caused the node to be marked for 2117 * reclamation (e.g. in response to a DEAUTH message) 2118 * so use free_node here instead of unref_node. 2119 */ 2120 if (ni == ic->ic_bss) 2121 ieee80211_unref_node(&ni); 2122 else 2123 ieee80211_free_node(ic, ni); 2124 rx_next: 2125 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 2126 } while (ath_rxbuf_init(sc, bf) == 0); 2127 2128 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 2129 ath_hal_rxena(ah); /* in case of RXEOL */ 2130 } 2131 2132 /* 2133 * XXX Size of an ACK control frame in bytes. 2134 */ 2135 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 2136 2137 static int 2138 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 2139 struct mbuf *m0) 2140 { 2141 struct ieee80211com *ic = &sc->sc_ic; 2142 struct ath_hal *ah = sc->sc_ah; 2143 struct ifnet *ifp = &sc->sc_ic.ic_if; 2144 int i, error, iswep, hdrlen, pktlen; 2145 u_int8_t rix, cix, txrate, ctsrate; 2146 struct ath_desc *ds; 2147 struct mbuf *m; 2148 struct ieee80211_frame *wh; 2149 u_int32_t iv; 2150 u_int8_t *ivp; 2151 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 2152 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 2153 u_int subtype, flags, ctsduration, antenna; 2154 HAL_PKT_TYPE atype; 2155 const HAL_RATE_TABLE *rt; 2156 HAL_BOOL shortPreamble; 2157 struct ath_node *an; 2158 ath_txq_critsect_decl(s); 2159 2160 wh = mtod(m0, struct ieee80211_frame *); 2161 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 2162 hdrlen = sizeof(struct ieee80211_frame); 2163 pktlen = m0->m_pkthdr.len; 2164 2165 if (iswep) { 2166 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 2167 m_adj(m0, hdrlen); 2168 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 2169 if (m0 == NULL) { 2170 sc->sc_stats.ast_tx_nombuf++; 2171 return ENOMEM; 2172 } 2173 ivp = hdrbuf + hdrlen; 2174 /* 2175 * XXX 2176 * IV must not duplicate during the lifetime of the key. 2177 * But no mechanism to renew keys is defined in IEEE 802.11 2178 * WEP. And IV may be duplicated between other stations 2179 * because of the session key itself is shared. 2180 * So we use pseudo random IV for now, though it is not the 2181 * right way. 2182 */ 2183 iv = arc4random(); 2184 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 2185 ivp[i] = iv; 2186 iv >>= 8; 2187 } 2188 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 2189 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 2190 /* 2191 * The ICV length must be included into hdrlen and pktlen. 2192 */ 2193 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 2194 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 2195 } 2196 pktlen += IEEE80211_CRC_LEN; 2197 2198 /* 2199 * Load the DMA map so any coalescing is done. This 2200 * also calculates the number of descriptors we need. 2201 */ 2202 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, BUS_DMA_NOWAIT); 2203 if (error != 0) { 2204 sc->sc_stats.ast_tx_busdma++; 2205 m_freem(m0); 2206 return error; 2207 } 2208 /* 2209 * Discard null packets and check for packets that 2210 * require too many TX descriptors. We try to convert 2211 * the latter to a cluster. 2212 */ 2213 if (bf->bf_nseg > ATH_TXDESC) { /* too many desc's, linearize */ 2214 sc->sc_stats.ast_tx_linear++; 2215 MGETHDR(m, M_DONTWAIT, MT_DATA); 2216 if (m == NULL) { 2217 sc->sc_stats.ast_tx_nombuf++; 2218 m_freem(m0); 2219 return ENOMEM; 2220 } 2221 #ifdef __FreeBSD__ 2222 M_MOVE_PKTHDR(m, m0); 2223 #else 2224 M_COPY_PKTHDR(m, m0); 2225 #endif 2226 MCLGET(m, M_DONTWAIT); 2227 if ((m->m_flags & M_EXT) == 0) { 2228 sc->sc_stats.ast_tx_nomcl++; 2229 m_freem(m0); 2230 m_free(m); 2231 return ENOMEM; 2232 } 2233 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 2234 m_freem(m0); 2235 m->m_len = m->m_pkthdr.len; 2236 m0 = m; 2237 error = ath_buf_dmamap_load_mbuf(sc->sc_dmat, bf, m0, 2238 BUS_DMA_NOWAIT); 2239 if (error != 0) { 2240 sc->sc_stats.ast_tx_busdma++; 2241 m_freem(m0); 2242 return error; 2243 } 2244 KASSERT(bf->bf_nseg == 1, 2245 ("ath_tx_start: packet not one segment; nseg %u", 2246 bf->bf_nseg)); 2247 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 2248 sc->sc_stats.ast_tx_nodata++; 2249 m_freem(m0); 2250 return EIO; 2251 } 2252 DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen)); 2253 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_PREWRITE); 2254 bf->bf_m = m0; 2255 bf->bf_node = ni; /* NB: held reference */ 2256 2257 /* setup descriptors */ 2258 ds = bf->bf_desc; 2259 rt = sc->sc_currates; 2260 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2261 2262 /* 2263 * Calculate Atheros packet type from IEEE80211 packet header 2264 * and setup for rate calculations. 2265 */ 2266 atype = HAL_PKT_TYPE_NORMAL; /* default */ 2267 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 2268 case IEEE80211_FC0_TYPE_MGT: 2269 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2270 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 2271 atype = HAL_PKT_TYPE_BEACON; 2272 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2273 atype = HAL_PKT_TYPE_PROBE_RESP; 2274 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 2275 atype = HAL_PKT_TYPE_ATIM; 2276 rix = 0; /* XXX lowest rate */ 2277 break; 2278 case IEEE80211_FC0_TYPE_CTL: 2279 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2280 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 2281 atype = HAL_PKT_TYPE_PSPOLL; 2282 rix = 0; /* XXX lowest rate */ 2283 break; 2284 default: 2285 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 2286 IEEE80211_RATE_VAL]; 2287 if (rix == 0xff) { 2288 if_printf(ifp, "bogus xmit rate 0x%x\n", 2289 ni->ni_rates.rs_rates[ni->ni_txrate]); 2290 sc->sc_stats.ast_tx_badrate++; 2291 m_freem(m0); 2292 return EIO; 2293 } 2294 break; 2295 } 2296 /* 2297 * NB: the 802.11 layer marks whether or not we should 2298 * use short preamble based on the current mode and 2299 * negotiated parameters. 2300 */ 2301 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) { 2302 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 2303 shortPreamble = AH_TRUE; 2304 sc->sc_stats.ast_tx_shortpre++; 2305 } else { 2306 txrate = rt->info[rix].rateCode; 2307 shortPreamble = AH_FALSE; 2308 } 2309 2310 /* 2311 * Calculate miscellaneous flags. 2312 */ 2313 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 2314 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2315 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 2316 sc->sc_stats.ast_tx_noack++; 2317 } else if (pktlen > ic->ic_rtsthreshold) { 2318 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 2319 sc->sc_stats.ast_tx_rts++; 2320 } 2321 2322 /* 2323 * Calculate RTS/CTS rate and duration if needed. 2324 */ 2325 ctsduration = 0; 2326 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 2327 /* 2328 * CTS transmit rate is derived from the transmit rate 2329 * by looking in the h/w rate table. We must also factor 2330 * in whether or not a short preamble is to be used. 2331 */ 2332 cix = rt->info[rix].controlRate; 2333 ctsrate = rt->info[cix].rateCode; 2334 if (shortPreamble) 2335 ctsrate |= rt->info[cix].shortPreamble; 2336 /* 2337 * Compute the transmit duration based on the size 2338 * of an ACK frame. We call into the HAL to do the 2339 * computation since it depends on the characteristics 2340 * of the actual PHY being used. 2341 */ 2342 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 2343 ctsduration += ath_hal_computetxtime(ah, 2344 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2345 } 2346 /* SIFS + data */ 2347 ctsduration += ath_hal_computetxtime(ah, 2348 rt, pktlen, rix, shortPreamble); 2349 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 2350 ctsduration += ath_hal_computetxtime(ah, 2351 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 2352 } 2353 } else 2354 ctsrate = 0; 2355 2356 /* 2357 * For now use the antenna on which the last good 2358 * frame was received on. We assume this field is 2359 * initialized to 0 which gives us ``auto'' or the 2360 * ``default'' antenna. 2361 */ 2362 an = (struct ath_node *) ni; 2363 if (an->an_tx_antenna) 2364 antenna = an->an_tx_antenna; 2365 else 2366 antenna = an->an_rx_antenna; 2367 2368 /* 2369 * Formulate first tx descriptor with tx controls. 2370 */ 2371 /* XXX check return value? */ 2372 ath_hal_setuptxdesc(ah, ds 2373 , pktlen /* packet length */ 2374 , hdrlen /* header length */ 2375 , atype /* Atheros packet type */ 2376 , 60 /* txpower XXX */ 2377 , txrate, 1+10 /* series 0 rate/tries */ 2378 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 2379 , antenna /* antenna mode */ 2380 , flags /* flags */ 2381 , ctsrate /* rts/cts rate */ 2382 , ctsduration /* rts/cts duration */ 2383 ); 2384 #ifdef notyet 2385 ath_hal_setupxtxdesc(ah, ds 2386 , AH_FALSE /* short preamble */ 2387 , 0, 0 /* series 1 rate/tries */ 2388 , 0, 0 /* series 2 rate/tries */ 2389 , 0, 0 /* series 3 rate/tries */ 2390 ); 2391 #endif 2392 /* 2393 * Fillin the remainder of the descriptor info. 2394 */ 2395 for (i = 0; i < bf->bf_nseg; i++, ds++) { 2396 ds->ds_data = bf->bf_segs[i].ds_addr; 2397 if (i == bf->bf_nseg - 1) 2398 ds->ds_link = 0; 2399 else 2400 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 2401 ath_hal_filltxdesc(ah, ds 2402 , bf->bf_segs[i].ds_len /* segment length */ 2403 , i == 0 /* first segment */ 2404 , i == bf->bf_nseg - 1 /* last segment */ 2405 ); 2406 DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n", 2407 i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1, 2408 ds->ds_hw[0], ds->ds_hw[1])); 2409 } 2410 2411 /* 2412 * Insert the frame on the outbound list and 2413 * pass it on to the hardware. 2414 */ 2415 ath_txq_critsect_begin(sc, s); 2416 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 2417 if (sc->sc_txlink == NULL) { 2418 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 2419 DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n", 2420 (caddr_t)bf->bf_daddr, bf->bf_desc)); 2421 } else { 2422 *sc->sc_txlink = bf->bf_daddr; 2423 DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n", 2424 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 2425 } 2426 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 2427 ath_txq_critsect_end(sc, s); 2428 2429 ath_hal_txstart(ah, sc->sc_txhalq); 2430 return 0; 2431 } 2432 2433 static void 2434 ath_tx_proc(void *arg, int npending) 2435 { 2436 struct ath_softc *sc = arg; 2437 struct ath_hal *ah = sc->sc_ah; 2438 struct ath_buf *bf; 2439 struct ieee80211com *ic = &sc->sc_ic; 2440 struct ifnet *ifp = &ic->ic_if; 2441 struct ath_desc *ds; 2442 struct ieee80211_node *ni; 2443 struct ath_node *an; 2444 int sr, lr; 2445 HAL_STATUS status; 2446 ath_txq_critsect_decl(s); 2447 ath_txbuf_critsect_decl(s2); 2448 2449 DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n", 2450 npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 2451 sc->sc_txlink)); 2452 for (;;) { 2453 ath_txq_critsect_begin(sc, s); 2454 bf = TAILQ_FIRST(&sc->sc_txq); 2455 if (bf == NULL) { 2456 sc->sc_txlink = NULL; 2457 ath_txq_critsect_end(sc, s); 2458 break; 2459 } 2460 /* only the last descriptor is needed */ 2461 ds = &bf->bf_desc[bf->bf_nseg - 1]; 2462 status = ath_hal_txprocdesc(ah, ds); 2463 #ifdef AR_DEBUG 2464 if (ath_debug > 1) 2465 ath_printtxbuf(bf, status == HAL_OK); 2466 #endif 2467 if (status == HAL_EINPROGRESS) { 2468 ath_txq_critsect_end(sc, s); 2469 break; 2470 } 2471 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2472 ath_txq_critsect_end(sc, s); 2473 2474 ni = bf->bf_node; 2475 if (ni != NULL) { 2476 an = (struct ath_node *) ni; 2477 if (ds->ds_txstat.ts_status == 0) { 2478 an->an_tx_ok++; 2479 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 2480 } else { 2481 an->an_tx_err++; 2482 ifp->if_oerrors++; 2483 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 2484 sc->sc_stats.ast_tx_xretries++; 2485 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 2486 sc->sc_stats.ast_tx_fifoerr++; 2487 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 2488 sc->sc_stats.ast_tx_filtered++; 2489 an->an_tx_antenna = 0; /* invalidate */ 2490 } 2491 sr = ds->ds_txstat.ts_shortretry; 2492 lr = ds->ds_txstat.ts_longretry; 2493 sc->sc_stats.ast_tx_shortretry += sr; 2494 sc->sc_stats.ast_tx_longretry += lr; 2495 if (sr + lr) 2496 an->an_tx_retr++; 2497 /* 2498 * Reclaim reference to node. 2499 * 2500 * NB: the node may be reclaimed here if, for example 2501 * this is a DEAUTH message that was sent and the 2502 * node was timed out due to inactivity. 2503 */ 2504 if (ni != ic->ic_bss) 2505 ieee80211_free_node(ic, ni); 2506 } 2507 ath_buf_dmamap_sync(sc->sc_dmat, bf, BUS_DMASYNC_POSTWRITE); 2508 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2509 m_freem(bf->bf_m); 2510 bf->bf_m = NULL; 2511 bf->bf_node = NULL; 2512 2513 ath_txbuf_critsect_begin(sc, s2); 2514 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2515 ath_txbuf_critsect_end(sc, s2); 2516 } 2517 ifp->if_flags &= ~IFF_OACTIVE; 2518 sc->sc_tx_timer = 0; 2519 2520 ath_start(ifp); 2521 } 2522 2523 /* 2524 * Drain the transmit queue and reclaim resources. 2525 */ 2526 static void 2527 ath_draintxq(struct ath_softc *sc) 2528 { 2529 struct ath_hal *ah = sc->sc_ah; 2530 struct ifnet *ifp = &sc->sc_ic.ic_if; 2531 struct ath_buf *bf; 2532 ath_txq_critsect_decl(s); 2533 ath_txbuf_critsect_decl(s2); 2534 2535 /* XXX return value */ 2536 if (!sc->sc_invalid) { 2537 /* don't touch the hardware if marked invalid */ 2538 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 2539 DPRINTF(("ath_draintxq: tx queue %p, link %p\n", 2540 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 2541 sc->sc_txlink)); 2542 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 2543 DPRINTF(("ath_draintxq: beacon queue %p\n", 2544 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 2545 } 2546 for (;;) { 2547 ath_txq_critsect_begin(sc, s); 2548 bf = TAILQ_FIRST(&sc->sc_txq); 2549 if (bf == NULL) { 2550 sc->sc_txlink = NULL; 2551 ath_txq_critsect_end(sc, s); 2552 break; 2553 } 2554 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2555 ath_txq_critsect_end(sc, s); 2556 #ifdef AR_DEBUG 2557 if (ath_debug) 2558 ath_printtxbuf(bf, 2559 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2560 #endif /* AR_DEBUG */ 2561 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2562 m_freem(bf->bf_m); 2563 bf->bf_m = NULL; 2564 bf->bf_node = NULL; 2565 ath_txbuf_critsect_begin(sc, s2); 2566 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2567 ath_txbuf_critsect_end(sc, s2); 2568 } 2569 ifp->if_flags &= ~IFF_OACTIVE; 2570 sc->sc_tx_timer = 0; 2571 } 2572 2573 /* 2574 * Disable the receive h/w in preparation for a reset. 2575 */ 2576 static void 2577 ath_stoprecv(struct ath_softc *sc) 2578 { 2579 struct ath_hal *ah = sc->sc_ah; 2580 2581 ath_hal_stoppcurecv(ah); /* disable PCU */ 2582 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2583 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2584 DELAY(3000); /* long enough for 1 frame */ 2585 #ifdef AR_DEBUG 2586 if (ath_debug) { 2587 struct ath_buf *bf; 2588 2589 DPRINTF(("ath_stoprecv: rx queue %p, link %p\n", 2590 (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink)); 2591 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2592 if (ath_hal_rxprocdesc(ah, bf->bf_desc) == HAL_OK) 2593 ath_printrxbuf(bf, 1); 2594 } 2595 } 2596 #endif 2597 sc->sc_rxlink = NULL; /* just in case */ 2598 } 2599 2600 /* 2601 * Enable the receive h/w following a reset. 2602 */ 2603 static int 2604 ath_startrecv(struct ath_softc *sc) 2605 { 2606 struct ath_hal *ah = sc->sc_ah; 2607 struct ath_buf *bf; 2608 2609 sc->sc_rxlink = NULL; 2610 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2611 int error = ath_rxbuf_init(sc, bf); 2612 if (error != 0) { 2613 DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n", 2614 error)); 2615 return error; 2616 } 2617 } 2618 2619 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2620 ath_hal_putrxbuf(ah, bf->bf_daddr); 2621 ath_hal_rxena(ah); /* enable recv descriptors */ 2622 ath_mode_init(sc); /* set filters, etc. */ 2623 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2624 return 0; 2625 } 2626 2627 /* 2628 * Set/change channels. If the channel is really being changed, 2629 * it's done by resetting the chip. To accomplish this we must 2630 * first cleanup any pending DMA, then restart stuff after a la 2631 * ath_init. 2632 */ 2633 static int 2634 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 2635 { 2636 struct ath_hal *ah = sc->sc_ah; 2637 struct ieee80211com *ic = &sc->sc_ic; 2638 2639 DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n", 2640 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 2641 ic->ic_ibss_chan->ic_freq, 2642 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 2643 if (chan != ic->ic_ibss_chan) { 2644 HAL_STATUS status; 2645 HAL_CHANNEL hchan; 2646 enum ieee80211_phymode mode; 2647 2648 /* 2649 * To switch channels clear any pending DMA operations; 2650 * wait long enough for the RX fifo to drain, reset the 2651 * hardware at the new frequency, and then re-enable 2652 * the relevant bits of the h/w. 2653 */ 2654 ath_hal_intrset(ah, 0); /* disable interrupts */ 2655 ath_draintxq(sc); /* clear pending tx frames */ 2656 ath_stoprecv(sc); /* turn off frame recv */ 2657 /* 2658 * Convert to a HAL channel description with 2659 * the flags constrained to reflect the current 2660 * operating mode. 2661 */ 2662 hchan.channel = chan->ic_freq; 2663 hchan.channelFlags = ath_chan2flags(ic, chan); 2664 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 2665 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 2666 "channel %u (%u Mhz)\n", 2667 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 2668 return EIO; 2669 } 2670 /* 2671 * Re-enable rx framework. 2672 */ 2673 if (ath_startrecv(sc) != 0) { 2674 if_printf(&ic->ic_if, 2675 "ath_chan_set: unable to restart recv logic\n"); 2676 return EIO; 2677 } 2678 2679 /* 2680 * Update BPF state. 2681 */ 2682 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq = 2683 htole16(chan->ic_freq); 2684 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags = 2685 htole16(chan->ic_flags); 2686 2687 /* 2688 * Change channels and update the h/w rate map 2689 * if we're switching; e.g. 11a to 11b/g. 2690 */ 2691 ic->ic_ibss_chan = chan; 2692 mode = ieee80211_chan2mode(ic, chan); 2693 if (mode != sc->sc_curmode) 2694 ath_setcurmode(sc, mode); 2695 2696 /* 2697 * Re-enable interrupts. 2698 */ 2699 ath_hal_intrset(ah, sc->sc_imask); 2700 } 2701 return 0; 2702 } 2703 2704 static void 2705 ath_next_scan(void *arg) 2706 { 2707 struct ath_softc *sc = arg; 2708 struct ieee80211com *ic = &sc->sc_ic; 2709 struct ifnet *ifp = &ic->ic_if; 2710 int s; 2711 2712 /* don't call ath_start w/o network interrupts blocked */ 2713 s = splnet(); 2714 2715 if (ic->ic_state == IEEE80211_S_SCAN) 2716 ieee80211_next_scan(ifp); 2717 splx(s); 2718 } 2719 2720 /* 2721 * Periodically recalibrate the PHY to account 2722 * for temperature/environment changes. 2723 */ 2724 static void 2725 ath_calibrate(void *arg) 2726 { 2727 struct ath_softc *sc = arg; 2728 struct ath_hal *ah = sc->sc_ah; 2729 struct ieee80211com *ic = &sc->sc_ic; 2730 struct ieee80211_channel *c; 2731 HAL_CHANNEL hchan; 2732 2733 sc->sc_stats.ast_per_cal++; 2734 2735 /* 2736 * Convert to a HAL channel description with the flags 2737 * constrained to reflect the current operating mode. 2738 */ 2739 c = ic->ic_ibss_chan; 2740 hchan.channel = c->ic_freq; 2741 hchan.channelFlags = ath_chan2flags(ic, c); 2742 2743 DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 2744 2745 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 2746 /* 2747 * Rfgain is out of bounds, reset the chip 2748 * to load new gain values. 2749 */ 2750 sc->sc_stats.ast_per_rfgain++; 2751 ath_reset(sc); 2752 } 2753 if (!ath_hal_calibrate(ah, &hchan)) { 2754 DPRINTF(("%s: calibration of channel %u failed\n", 2755 __func__, c->ic_freq)); 2756 sc->sc_stats.ast_per_calfail++; 2757 } 2758 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 2759 } 2760 2761 static HAL_LED_STATE 2762 ath_state_to_led(enum ieee80211_state state) 2763 { 2764 switch (state) { 2765 case IEEE80211_S_INIT: 2766 return HAL_LED_INIT; 2767 case IEEE80211_S_SCAN: 2768 return HAL_LED_SCAN; 2769 case IEEE80211_S_AUTH: 2770 return HAL_LED_AUTH; 2771 case IEEE80211_S_ASSOC: 2772 return HAL_LED_ASSOC; 2773 case IEEE80211_S_RUN: 2774 return HAL_LED_RUN; 2775 default: 2776 panic("%s: unknown 802.11 state %d\n", __func__, state); 2777 return HAL_LED_INIT; 2778 } 2779 } 2780 2781 static int 2782 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 2783 { 2784 struct ifnet *ifp = &ic->ic_if; 2785 struct ath_softc *sc = ifp->if_softc; 2786 struct ath_hal *ah = sc->sc_ah; 2787 struct ieee80211_node *ni; 2788 int i, error; 2789 u_int8_t *bssid; 2790 u_int32_t rfilt; 2791 2792 DPRINTF(("%s: %s -> %s\n", __func__, 2793 ieee80211_state_name[ic->ic_state], 2794 ieee80211_state_name[nstate])); 2795 2796 ath_hal_setledstate(ah, ath_state_to_led(nstate)); /* set LED */ 2797 2798 if (nstate == IEEE80211_S_INIT) { 2799 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2800 ath_hal_intrset(ah, sc->sc_imask); 2801 callout_stop(&sc->sc_scan_ch); 2802 callout_stop(&sc->sc_cal_ch); 2803 return (*sc->sc_newstate)(ic, nstate, arg); 2804 } 2805 ni = ic->ic_bss; 2806 error = ath_chan_set(sc, ni->ni_chan); 2807 if (error != 0) 2808 goto bad; 2809 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 2810 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 2811 if (ic->ic_opmode != IEEE80211_M_STA) 2812 rfilt |= HAL_RX_FILTER_PROBEREQ; 2813 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2814 (ifp->if_flags & IFF_PROMISC)) 2815 rfilt |= HAL_RX_FILTER_PROM; 2816 if (nstate == IEEE80211_S_SCAN) { 2817 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 2818 ath_next_scan, sc); 2819 bssid = ifp->if_broadcastaddr; 2820 rfilt |= HAL_RX_FILTER_BEACON; 2821 } else { 2822 callout_stop(&sc->sc_scan_ch); 2823 bssid = ni->ni_bssid; 2824 } 2825 ath_hal_setrxfilter(ah, rfilt); 2826 DPRINTF(("%s: RX filter 0x%x bssid %s\n", 2827 __func__, rfilt, ether_sprintf(bssid))); 2828 2829 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 2830 ath_hal_setassocid(ah, bssid, ni->ni_associd); 2831 else 2832 ath_hal_setassocid(ah, bssid, 0); 2833 if (ic->ic_flags & IEEE80211_F_WEPON) { 2834 for (i = 0; i < IEEE80211_WEP_NKID; i++) 2835 if (ath_hal_keyisvalid(ah, i)) 2836 ath_hal_keysetmac(ah, i, bssid); 2837 } 2838 2839 if (nstate == IEEE80211_S_RUN) { 2840 DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 2841 "capinfo=0x%04x chan=%d\n" 2842 , __func__ 2843 , ic->ic_flags 2844 , ni->ni_intval 2845 , ether_sprintf(ni->ni_bssid) 2846 , ni->ni_capinfo 2847 , ieee80211_chan2ieee(ic, ni->ni_chan))); 2848 2849 /* 2850 * Allocate and setup the beacon frame for AP or adhoc mode. 2851 */ 2852 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 2853 ic->ic_opmode == IEEE80211_M_IBSS) { 2854 error = ath_beacon_alloc(sc, ni); 2855 if (error != 0) 2856 goto bad; 2857 } 2858 2859 /* 2860 * Configure the beacon and sleep timers. 2861 */ 2862 ath_beacon_config(sc); 2863 2864 /* start periodic recalibration timer */ 2865 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 2866 ath_calibrate, sc); 2867 } else { 2868 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2869 ath_hal_intrset(ah, sc->sc_imask); 2870 callout_stop(&sc->sc_cal_ch); /* no calibration */ 2871 } 2872 /* 2873 * Reset the rate control state. 2874 */ 2875 ath_rate_ctl_reset(sc, nstate); 2876 /* 2877 * Invoke the parent method to complete the work. 2878 */ 2879 return (*sc->sc_newstate)(ic, nstate, arg); 2880 bad: 2881 callout_stop(&sc->sc_scan_ch); 2882 callout_stop(&sc->sc_cal_ch); 2883 /* NB: do not invoke the parent */ 2884 return error; 2885 } 2886 2887 /* 2888 * Setup driver-specific state for a newly associated node. 2889 * Note that we're called also on a re-associate, the isnew 2890 * param tells us if this is the first time or not. 2891 */ 2892 static void 2893 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 2894 { 2895 if (isnew) { 2896 struct ath_node *an = (struct ath_node *) ni; 2897 2898 an->an_tx_ok = an->an_tx_err = 2899 an->an_tx_retr = an->an_tx_upper = 0; 2900 /* start with highest negotiated rate */ 2901 /* 2902 * XXX should do otherwise but only when 2903 * the rate control algorithm is better. 2904 */ 2905 KASSERT(ni->ni_rates.rs_nrates > 0, 2906 ("new association w/ no rates!")); 2907 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 2908 } 2909 } 2910 2911 static int 2912 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor) 2913 { 2914 struct ieee80211com *ic = &sc->sc_ic; 2915 struct ifnet *ifp = &ic->ic_if; 2916 struct ath_hal *ah = sc->sc_ah; 2917 HAL_CHANNEL *chans; 2918 int i, ix, nchan; 2919 2920 sc->sc_have11g = 0; 2921 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 2922 M_TEMP, M_NOWAIT); 2923 if (chans == NULL) { 2924 if_printf(ifp, "unable to allocate channel table\n"); 2925 return ENOMEM; 2926 } 2927 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 2928 cc, HAL_MODE_ALL, outdoor)) { 2929 if_printf(ifp, "unable to collect channel list from hal\n"); 2930 free(chans, M_TEMP); 2931 return EINVAL; 2932 } 2933 2934 /* 2935 * Convert HAL channels to ieee80211 ones and insert 2936 * them in the table according to their channel number. 2937 */ 2938 for (i = 0; i < nchan; i++) { 2939 HAL_CHANNEL *c = &chans[i]; 2940 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 2941 if (ix > IEEE80211_CHAN_MAX) { 2942 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 2943 ix, c->channel, c->channelFlags); 2944 continue; 2945 } 2946 /* NB: flags are known to be compatible */ 2947 if (ic->ic_channels[ix].ic_freq == 0) { 2948 ic->ic_channels[ix].ic_freq = c->channel; 2949 ic->ic_channels[ix].ic_flags = c->channelFlags; 2950 } else { 2951 /* channels overlap; e.g. 11g and 11b */ 2952 ic->ic_channels[ix].ic_flags |= c->channelFlags; 2953 } 2954 if ((c->channelFlags & CHANNEL_G) == CHANNEL_G) 2955 sc->sc_have11g = 1; 2956 } 2957 free(chans, M_TEMP); 2958 return 0; 2959 } 2960 2961 static int 2962 ath_rate_setup(struct ath_softc *sc, u_int mode) 2963 { 2964 struct ath_hal *ah = sc->sc_ah; 2965 struct ieee80211com *ic = &sc->sc_ic; 2966 const HAL_RATE_TABLE *rt; 2967 struct ieee80211_rateset *rs; 2968 int i, maxrates; 2969 2970 switch (mode) { 2971 case IEEE80211_MODE_11A: 2972 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 2973 break; 2974 case IEEE80211_MODE_11B: 2975 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 2976 break; 2977 case IEEE80211_MODE_11G: 2978 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 2979 break; 2980 case IEEE80211_MODE_TURBO: 2981 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 2982 break; 2983 default: 2984 DPRINTF(("%s: invalid mode %u\n", __func__, mode)); 2985 return 0; 2986 } 2987 rt = sc->sc_rates[mode]; 2988 if (rt == NULL) 2989 return 0; 2990 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 2991 DPRINTF(("%s: rate table too small (%u > %u)\n", 2992 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 2993 maxrates = IEEE80211_RATE_MAXSIZE; 2994 } else 2995 maxrates = rt->rateCount; 2996 rs = &ic->ic_sup_rates[mode]; 2997 for (i = 0; i < maxrates; i++) 2998 rs->rs_rates[i] = rt->info[i].dot11Rate; 2999 rs->rs_nrates = maxrates; 3000 return 1; 3001 } 3002 3003 static void 3004 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 3005 { 3006 const HAL_RATE_TABLE *rt; 3007 int i; 3008 3009 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 3010 rt = sc->sc_rates[mode]; 3011 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 3012 for (i = 0; i < rt->rateCount; i++) 3013 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 3014 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 3015 for (i = 0; i < 32; i++) 3016 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 3017 sc->sc_currates = rt; 3018 sc->sc_curmode = mode; 3019 } 3020 3021 /* 3022 * Reset the rate control state for each 802.11 state transition. 3023 */ 3024 static void 3025 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 3026 { 3027 struct ieee80211com *ic = &sc->sc_ic; 3028 struct ieee80211_node *ni; 3029 struct ath_node *an; 3030 3031 an = (struct ath_node *) ic->ic_bss; 3032 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 3033 if (ic->ic_opmode == IEEE80211_M_STA) { 3034 ni = ic->ic_bss; 3035 if (state == IEEE80211_S_RUN) { 3036 /* start with highest negotiated rate */ 3037 KASSERT(ni->ni_rates.rs_nrates > 0, 3038 ("transition to RUN state w/ no rates!")); 3039 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 3040 } else { 3041 /* use lowest rate */ 3042 ni->ni_txrate = 0; 3043 } 3044 } else { 3045 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 3046 ni->ni_txrate = 0; /* use lowest rate */ 3047 an = (struct ath_node *) ni; 3048 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 3049 an->an_tx_upper = 0; 3050 } 3051 } 3052 } 3053 3054 /* 3055 * Examine and potentially adjust the transmit rate. 3056 */ 3057 static void 3058 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 3059 { 3060 struct ath_softc *sc = arg; 3061 struct ath_node *an = (struct ath_node *) ni; 3062 struct ieee80211_rateset *rs = &ni->ni_rates; 3063 int mod = 0, orate, enough; 3064 3065 /* 3066 * Rate control 3067 * XXX: very primitive version. 3068 */ 3069 sc->sc_stats.ast_rate_calls++; 3070 3071 enough = (an->an_tx_ok + an->an_tx_err >= 10); 3072 3073 /* no packet reached -> down */ 3074 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 3075 mod = -1; 3076 3077 /* all packets needs retry in average -> down */ 3078 if (enough && an->an_tx_ok < an->an_tx_retr) 3079 mod = -1; 3080 3081 /* no error and less than 10% of packets needs retry -> up */ 3082 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 3083 mod = 1; 3084 3085 orate = ni->ni_txrate; 3086 switch (mod) { 3087 case 0: 3088 if (enough && an->an_tx_upper > 0) 3089 an->an_tx_upper--; 3090 break; 3091 case -1: 3092 if (ni->ni_txrate > 0) { 3093 ni->ni_txrate--; 3094 sc->sc_stats.ast_rate_drop++; 3095 } 3096 an->an_tx_upper = 0; 3097 break; 3098 case 1: 3099 if (++an->an_tx_upper < 2) 3100 break; 3101 an->an_tx_upper = 0; 3102 if (ni->ni_txrate + 1 < rs->rs_nrates) { 3103 ni->ni_txrate++; 3104 sc->sc_stats.ast_rate_raise++; 3105 } 3106 break; 3107 } 3108 3109 if (ni->ni_txrate != orate) { 3110 DPRINTF(("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 3111 __func__, 3112 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 3113 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 3114 an->an_tx_ok, an->an_tx_err, an->an_tx_retr)); 3115 } 3116 if (ni->ni_txrate != orate || enough) 3117 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 3118 } 3119 3120 #ifdef AR_DEBUG 3121 #ifdef __FreeBSD__ 3122 static int 3123 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 3124 { 3125 char dmode[64]; 3126 int error; 3127 3128 strncpy(dmode, "", sizeof(dmode) - 1); 3129 dmode[sizeof(dmode) - 1] = '\0'; 3130 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 3131 3132 if (error == 0 && req->newptr != NULL) { 3133 struct ifnet *ifp; 3134 struct ath_softc *sc; 3135 3136 ifp = ifunit("ath0"); /* XXX */ 3137 if (!ifp) 3138 return EINVAL; 3139 sc = ifp->if_softc; 3140 if (strcmp(dmode, "hal") == 0) 3141 ath_hal_dumpstate(sc->sc_ah); 3142 else if (strcmp(dmode, "eeprom") == 0) 3143 ath_hal_dumpeeprom(sc->sc_ah); 3144 else if (strcmp(dmode, "rfgain") == 0) 3145 ath_hal_dumprfgain(sc->sc_ah); 3146 else if (strcmp(dmode, "ani") == 0) 3147 ath_hal_dumpani(sc->sc_ah); 3148 else 3149 return EINVAL; 3150 } 3151 return error; 3152 } 3153 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 3154 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 3155 #endif /* __FreeBSD__ */ 3156 3157 static void 3158 ath_printrxbuf(struct ath_buf *bf, int done) 3159 { 3160 struct ath_desc *ds; 3161 int i; 3162 3163 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3164 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 3165 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3166 ds->ds_link, ds->ds_data, 3167 ds->ds_ctl0, ds->ds_ctl1, 3168 ds->ds_hw[0], ds->ds_hw[1], 3169 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 3170 } 3171 } 3172 3173 static void 3174 ath_printtxbuf(struct ath_buf *bf, int done) 3175 { 3176 struct ath_desc *ds; 3177 int i; 3178 3179 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 3180 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 3181 i, ds, (struct ath_desc *)bf->bf_daddr + i, 3182 ds->ds_link, ds->ds_data, 3183 ds->ds_ctl0, ds->ds_ctl1, 3184 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 3185 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 3186 } 3187 } 3188 #endif /* AR_DEBUG */ 3189
Indexes created Thu Oct 02 07:10:07 GMT 2025