athvar.h revision 1.9.2.5
1 1.9.2.5 skrll /* $NetBSD: athvar.h,v 1.9.2.5 2004/09/21 13:27:53 skrll Exp $ */ 2 1.9.2.2 skrll 3 1.9.2.2 skrll /*- 4 1.9.2.2 skrll * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting 5 1.9.2.2 skrll * All rights reserved. 6 1.9.2.2 skrll * 7 1.9.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.9.2.2 skrll * modification, are permitted provided that the following conditions 9 1.9.2.2 skrll * are met: 10 1.9.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.9.2.2 skrll * notice, this list of conditions and the following disclaimer, 12 1.9.2.2 skrll * without modification. 13 1.9.2.2 skrll * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 1.9.2.2 skrll * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 1.9.2.2 skrll * redistribution must be conditioned upon including a substantially 16 1.9.2.2 skrll * similar Disclaimer requirement for further binary redistribution. 17 1.9.2.2 skrll * 3. Neither the names of the above-listed copyright holders nor the names 18 1.9.2.2 skrll * of any contributors may be used to endorse or promote products derived 19 1.9.2.2 skrll * from this software without specific prior written permission. 20 1.9.2.2 skrll * 21 1.9.2.2 skrll * Alternatively, this software may be distributed under the terms of the 22 1.9.2.2 skrll * GNU General Public License ("GPL") version 2 as published by the Free 23 1.9.2.2 skrll * Software Foundation. 24 1.9.2.2 skrll * 25 1.9.2.2 skrll * NO WARRANTY 26 1.9.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 1.9.2.2 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 1.9.2.2 skrll * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 1.9.2.2 skrll * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 1.9.2.2 skrll * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 1.9.2.2 skrll * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.9.2.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.9.2.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 1.9.2.2 skrll * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.9.2.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 1.9.2.2 skrll * THE POSSIBILITY OF SUCH DAMAGES. 37 1.9.2.2 skrll * 38 1.9.2.2 skrll * $FreeBSD: src/sys/dev/ath/if_athvar.h,v 1.14 2004/04/03 03:33:02 sam Exp $ 39 1.9.2.2 skrll */ 40 1.9.2.2 skrll 41 1.9.2.2 skrll /* 42 1.9.2.2 skrll * Defintions for the Atheros Wireless LAN controller driver. 43 1.9.2.2 skrll */ 44 1.9.2.2 skrll #ifndef _DEV_ATH_ATHVAR_H 45 1.9.2.2 skrll #define _DEV_ATH_ATHVAR_H 46 1.9.2.2 skrll 47 1.9.2.2 skrll #ifdef __FreeBSD__ 48 1.9.2.2 skrll #include <sys/taskqueue.h> 49 1.9.2.2 skrll 50 1.9.2.2 skrll #include <contrib/dev/ic/ah.h> 51 1.9.2.2 skrll #else 52 1.9.2.2 skrll #include <../contrib/sys/dev/ic/athhal.h> 53 1.9.2.2 skrll #endif 54 1.9.2.2 skrll #include <net80211/ieee80211_radiotap.h> 55 1.9.2.2 skrll #ifdef __FreeBSD__ 56 1.9.2.2 skrll #include <dev/ath/if_athioctl.h> 57 1.9.2.2 skrll #else 58 1.9.2.2 skrll #include <dev/ic/athioctl.h> 59 1.9.2.2 skrll #endif 60 1.9.2.2 skrll 61 1.9.2.2 skrll #define ATH_TIMEOUT 1000 62 1.9.2.2 skrll 63 1.9.2.2 skrll #define ATH_RXBUF 40 /* number of RX buffers */ 64 1.9.2.2 skrll #define ATH_TXBUF 60 /* number of TX buffers */ 65 1.9.2.2 skrll #define ATH_TXDESC 8 /* number of descriptors per buffer */ 66 1.9.2.2 skrll 67 1.9.2.2 skrll struct ath_recv_hist { 68 1.9.2.2 skrll int arh_ticks; /* sample time by system clock */ 69 1.9.2.2 skrll u_int8_t arh_rssi; /* rssi */ 70 1.9.2.2 skrll u_int8_t arh_antenna; /* antenna */ 71 1.9.2.2 skrll }; 72 1.9.2.2 skrll #define ATH_RHIST_SIZE 16 /* number of samples */ 73 1.9.2.2 skrll #define ATH_RHIST_NOTIME (~0) 74 1.9.2.2 skrll 75 1.9.2.2 skrll /* driver-specific node */ 76 1.9.2.2 skrll struct ath_node { 77 1.9.2.2 skrll struct ieee80211_node an_node; /* base class */ 78 1.9.2.2 skrll u_int an_tx_ok; /* tx ok pkt */ 79 1.9.2.2 skrll u_int an_tx_err; /* tx !ok pkt */ 80 1.9.2.2 skrll u_int an_tx_retr; /* tx retry count */ 81 1.9.2.2 skrll int an_tx_upper; /* tx upper rate req cnt */ 82 1.9.2.2 skrll u_int an_tx_antenna; /* antenna for last good frame */ 83 1.9.2.2 skrll u_int an_rx_antenna; /* antenna for last rcvd frame */ 84 1.9.2.2 skrll struct ath_recv_hist an_rx_hist[ATH_RHIST_SIZE]; 85 1.9.2.2 skrll u_int an_rx_hist_next;/* index of next ``free entry'' */ 86 1.9.2.2 skrll }; 87 1.9.2.2 skrll #define ATH_NODE(_n) ((struct ath_node *)(_n)) 88 1.9.2.2 skrll 89 1.9.2.2 skrll struct ath_buf { 90 1.9.2.2 skrll TAILQ_ENTRY(ath_buf) bf_list; 91 1.9.2.2 skrll bus_dmamap_t bf_dmamap; /* DMA map of the buffer */ 92 1.9.2.2 skrll #ifdef __FreeBSD__ 93 1.9.2.2 skrll int bf_nseg; 94 1.9.2.2 skrll bus_dma_segment_t bf_segs[ATH_MAX_SCATTER]; 95 1.9.2.2 skrll bus_size_t bf_mapsize; 96 1.9.2.2 skrll #else 97 1.9.2.2 skrll #define bf_nseg bf_dmamap->dm_nsegs 98 1.9.2.2 skrll #define bf_mapsize bf_dmamap->dm_mapsize 99 1.9.2.2 skrll #define bf_segs bf_dmamap->dm_segs 100 1.9.2.2 skrll #endif 101 1.9.2.2 skrll struct ath_desc *bf_desc; /* virtual addr of desc */ 102 1.9.2.2 skrll bus_addr_t bf_daddr; /* physical addr of desc */ 103 1.9.2.2 skrll struct mbuf *bf_m; /* mbuf for buf */ 104 1.9.2.2 skrll struct ieee80211_node *bf_node; /* pointer to the node */ 105 1.9.2.2 skrll #define ATH_MAX_SCATTER 64 106 1.9.2.2 skrll }; 107 1.9.2.2 skrll 108 1.9.2.2 skrll struct ath_softc { 109 1.9.2.2 skrll #ifdef __NetBSD__ 110 1.9.2.2 skrll struct device sc_dev; 111 1.9.2.2 skrll #endif 112 1.9.2.2 skrll struct ieee80211com sc_ic; /* IEEE 802.11 common */ 113 1.9.2.2 skrll #ifndef __FreeBSD__ 114 1.9.2.2 skrll int (*sc_enable)(struct ath_softc *); 115 1.9.2.2 skrll void (*sc_disable)(struct ath_softc *); 116 1.9.2.2 skrll void (*sc_power)(struct ath_softc *, int); 117 1.9.2.2 skrll #endif 118 1.9.2.2 skrll int (*sc_newstate)(struct ieee80211com *, 119 1.9.2.2 skrll enum ieee80211_state, int); 120 1.9.2.2 skrll void (*sc_node_free)(struct ieee80211com *, 121 1.9.2.2 skrll struct ieee80211_node *); 122 1.9.2.2 skrll void (*sc_node_copy)(struct ieee80211com *, 123 1.9.2.2 skrll struct ieee80211_node *, 124 1.9.2.2 skrll const struct ieee80211_node *); 125 1.9.2.3 skrll void (*sc_recv_mgmt)(struct ieee80211com *, 126 1.9.2.3 skrll struct mbuf *, struct ieee80211_node *, 127 1.9.2.3 skrll int, int, u_int32_t); 128 1.9.2.2 skrll #ifdef __FreeBSD__ 129 1.9.2.2 skrll device_t sc_dev; 130 1.9.2.2 skrll #endif 131 1.9.2.2 skrll bus_space_tag_t sc_st; /* bus space tag */ 132 1.9.2.2 skrll bus_space_handle_t sc_sh; /* bus space handle */ 133 1.9.2.2 skrll bus_dma_tag_t sc_dmat; /* bus DMA tag */ 134 1.9.2.2 skrll #ifdef __FreeBSD__ 135 1.9.2.2 skrll struct mtx sc_mtx; /* master lock (recursive) */ 136 1.9.2.2 skrll #endif 137 1.9.2.2 skrll struct ath_hal *sc_ah; /* Atheros HAL */ 138 1.9.2.2 skrll unsigned int sc_invalid : 1,/* disable hardware accesses */ 139 1.9.2.2 skrll sc_doani : 1,/* dynamic noise immunity */ 140 1.9.2.2 skrll sc_probing : 1;/* probing AP on beacon miss */ 141 1.9.2.2 skrll /* rate tables */ 142 1.9.2.2 skrll const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX]; 143 1.9.2.2 skrll const HAL_RATE_TABLE *sc_currates; /* current rate table */ 144 1.9.2.2 skrll enum ieee80211_phymode sc_curmode; /* current phy mode */ 145 1.9.2.2 skrll u_int8_t sc_rixmap[256]; /* IEEE to h/w rate table ix */ 146 1.9.2.2 skrll u_int8_t sc_hwmap[32]; /* h/w rate ix to IEEE table */ 147 1.9.2.2 skrll HAL_INT sc_imask; /* interrupt mask copy */ 148 1.9.2.2 skrll 149 1.9.2.2 skrll #ifdef __FreeBSD__ 150 1.9.2.2 skrll struct bpf_if *sc_drvbpf; 151 1.9.2.2 skrll #else 152 1.9.2.2 skrll caddr_t sc_drvbpf; 153 1.9.2.2 skrll #endif 154 1.9.2.2 skrll union { 155 1.9.2.2 skrll struct ath_tx_radiotap_header th; 156 1.9.2.2 skrll u_int8_t pad[64]; 157 1.9.2.2 skrll } u_tx_rt; 158 1.9.2.2 skrll int sc_tx_th_len; 159 1.9.2.2 skrll union { 160 1.9.2.2 skrll struct ath_rx_radiotap_header th; 161 1.9.2.2 skrll u_int8_t pad[64]; 162 1.9.2.2 skrll } u_rx_rt; 163 1.9.2.2 skrll int sc_rx_th_len; 164 1.9.2.2 skrll 165 1.9.2.2 skrll struct ath_desc *sc_desc; /* TX/RX descriptors */ 166 1.9.2.2 skrll bus_dma_segment_t sc_dseg; 167 1.9.2.2 skrll #ifdef __NetBSD__ 168 1.9.2.2 skrll int sc_dnseg; /* number of segments */ 169 1.9.2.2 skrll #endif 170 1.9.2.2 skrll bus_dmamap_t sc_ddmamap; /* DMA map for descriptors */ 171 1.9.2.2 skrll bus_addr_t sc_desc_paddr; /* physical addr of sc_desc */ 172 1.9.2.2 skrll bus_addr_t sc_desc_len; /* size of sc_desc */ 173 1.9.2.2 skrll 174 1.9.2.2 skrll ath_task_t sc_fataltask; /* fatal int processing */ 175 1.9.2.2 skrll ath_task_t sc_rxorntask; /* rxorn int processing */ 176 1.9.2.2 skrll 177 1.9.2.2 skrll TAILQ_HEAD(, ath_buf) sc_rxbuf; /* receive buffer */ 178 1.9.2.2 skrll u_int32_t *sc_rxlink; /* link ptr in last RX desc */ 179 1.9.2.2 skrll ath_task_t sc_rxtask; /* rx int processing */ 180 1.9.2.2 skrll 181 1.9.2.2 skrll u_int sc_txhalq; /* HAL q for outgoing frames */ 182 1.9.2.2 skrll u_int32_t *sc_txlink; /* link ptr in last TX desc */ 183 1.9.2.2 skrll int sc_tx_timer; /* transmit timeout */ 184 1.9.2.2 skrll TAILQ_HEAD(, ath_buf) sc_txbuf; /* transmit buffer */ 185 1.9.2.2 skrll #ifdef __FreeBSD__ 186 1.9.2.2 skrll struct mtx sc_txbuflock; /* txbuf lock */ 187 1.9.2.2 skrll #endif 188 1.9.2.2 skrll TAILQ_HEAD(, ath_buf) sc_txq; /* transmitting queue */ 189 1.9.2.2 skrll #ifdef __FreeBSD__ 190 1.9.2.2 skrll struct mtx sc_txqlock; /* lock on txq and txlink */ 191 1.9.2.2 skrll #endif 192 1.9.2.2 skrll ath_task_t sc_txtask; /* tx int processing */ 193 1.9.2.2 skrll 194 1.9.2.2 skrll u_int sc_bhalq; /* HAL q for outgoing beacons */ 195 1.9.2.2 skrll struct ath_buf *sc_bcbuf; /* beacon buffer */ 196 1.9.2.2 skrll struct ath_buf *sc_bufptr; /* allocated buffer ptr */ 197 1.9.2.2 skrll ath_task_t sc_swbatask; /* swba int processing */ 198 1.9.2.2 skrll ath_task_t sc_bmisstask; /* bmiss int processing */ 199 1.9.2.2 skrll 200 1.9.2.2 skrll struct callout sc_cal_ch; /* callout handle for cals */ 201 1.9.2.2 skrll struct callout sc_scan_ch; /* callout handle for scan */ 202 1.9.2.2 skrll struct ath_stats sc_stats; /* interface statistics */ 203 1.9.2.2 skrll 204 1.9.2.2 skrll #ifndef __FreeBSD__ 205 1.9.2.2 skrll void *sc_sdhook; /* shutdown hook */ 206 1.9.2.2 skrll void *sc_powerhook; /* power management hook */ 207 1.9.2.2 skrll u_int sc_flags; /* misc flags */ 208 1.9.2.2 skrll #endif 209 1.9.2.2 skrll }; 210 1.9.2.2 skrll #ifndef __FreeBSD__ 211 1.9.2.2 skrll #define ATH_ATTACHED 0x0001 /* attach has succeeded */ 212 1.9.2.2 skrll #define ATH_ENABLED 0x0002 /* chip is enabled */ 213 1.9.2.2 skrll 214 1.9.2.2 skrll #define ATH_IS_ENABLED(sc) ((sc)->sc_flags & ATH_ENABLED) 215 1.9.2.2 skrll #endif 216 1.9.2.2 skrll 217 1.9.2.2 skrll #define sc_tx_th u_tx_rt.th 218 1.9.2.2 skrll #define sc_rx_th u_rx_rt.th 219 1.9.2.2 skrll 220 1.9.2.2 skrll #define ATH_LOCK_INIT(_sc) \ 221 1.9.2.2 skrll mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \ 222 1.9.2.2 skrll MTX_NETWORK_LOCK, MTX_DEF | MTX_RECURSE) 223 1.9.2.2 skrll #define ATH_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) 224 1.9.2.2 skrll #define ATH_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 225 1.9.2.2 skrll #define ATH_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 226 1.9.2.2 skrll #define ATH_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED) 227 1.9.2.2 skrll 228 1.9.2.2 skrll #define ATH_TXBUF_LOCK_INIT(_sc) \ 229 1.9.2.2 skrll mtx_init(&(_sc)->sc_txbuflock, \ 230 1.9.2.2 skrll device_get_nameunit((_sc)->sc_dev), "xmit buf q", MTX_DEF) 231 1.9.2.2 skrll #define ATH_TXBUF_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_txbuflock) 232 1.9.2.2 skrll #define ATH_TXBUF_LOCK(_sc) mtx_lock(&(_sc)->sc_txbuflock) 233 1.9.2.2 skrll #define ATH_TXBUF_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_txbuflock) 234 1.9.2.2 skrll #define ATH_TXBUF_LOCK_ASSERT(_sc) \ 235 1.9.2.2 skrll mtx_assert(&(_sc)->sc_txbuflock, MA_OWNED) 236 1.9.2.2 skrll 237 1.9.2.2 skrll #define ATH_TXQ_LOCK_INIT(_sc) \ 238 1.9.2.2 skrll mtx_init(&(_sc)->sc_txqlock, \ 239 1.9.2.2 skrll device_get_nameunit((_sc)->sc_dev), "xmit q", MTX_DEF) 240 1.9.2.2 skrll #define ATH_TXQ_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_txqlock) 241 1.9.2.2 skrll #define ATH_TXQ_LOCK(_sc) mtx_lock(&(_sc)->sc_txqlock) 242 1.9.2.2 skrll #define ATH_TXQ_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_txqlock) 243 1.9.2.2 skrll #define ATH_TXQ_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_txqlock, MA_OWNED) 244 1.9.2.2 skrll 245 1.9.2.2 skrll int ath_attach(u_int16_t, struct ath_softc *); 246 1.9.2.2 skrll int ath_detach(struct ath_softc *); 247 1.9.2.2 skrll void ath_resume(struct ath_softc *, int); 248 1.9.2.2 skrll void ath_suspend(struct ath_softc *, int); 249 1.9.2.2 skrll #ifdef __NetBSD__ 250 1.9.2.2 skrll int ath_activate(struct device *, enum devact); 251 1.9.2.2 skrll void ath_power(int, void *); 252 1.9.2.2 skrll #endif 253 1.9.2.2 skrll #ifdef __FreeBSD__ 254 1.9.2.2 skrll void ath_shutdown(struct ath_softc *); 255 1.9.2.2 skrll void ath_intr(void *); 256 1.9.2.2 skrll #else 257 1.9.2.2 skrll void ath_shutdown(void *); 258 1.9.2.2 skrll int ath_intr(void *); 259 1.9.2.2 skrll #endif 260 1.9.2.2 skrll 261 1.9.2.2 skrll /* 262 1.9.2.2 skrll * HAL definitions to comply with local coding convention. 263 1.9.2.2 skrll */ 264 1.9.2.2 skrll #define ath_hal_reset(_ah, _opmode, _chan, _outdoor, _pstatus) \ 265 1.9.2.2 skrll ((*(_ah)->ah_reset)((_ah), (_opmode), (_chan), (_outdoor), (_pstatus))) 266 1.9.2.2 skrll #define ath_hal_getratetable(_ah, _mode) \ 267 1.9.2.2 skrll ((*(_ah)->ah_getRateTable)((_ah), (_mode))) 268 1.9.2.2 skrll #define ath_hal_getmac(_ah, _mac) \ 269 1.9.2.2 skrll ((*(_ah)->ah_getMacAddress)((_ah), (_mac))) 270 1.9.2.2 skrll #define ath_hal_setmac(_ah, _mac) \ 271 1.9.2.2 skrll ((*(_ah)->ah_setMacAddress)((_ah), (_mac))) 272 1.9.2.2 skrll #define ath_hal_intrset(_ah, _mask) \ 273 1.9.2.2 skrll ((*(_ah)->ah_setInterrupts)((_ah), (_mask))) 274 1.9.2.2 skrll #define ath_hal_intrget(_ah) \ 275 1.9.2.2 skrll ((*(_ah)->ah_getInterrupts)((_ah))) 276 1.9.2.2 skrll #define ath_hal_intrpend(_ah) \ 277 1.9.2.2 skrll ((*(_ah)->ah_isInterruptPending)((_ah))) 278 1.9.2.2 skrll #define ath_hal_getisr(_ah, _pmask) \ 279 1.9.2.2 skrll ((*(_ah)->ah_getPendingInterrupts)((_ah), (_pmask))) 280 1.9.2.2 skrll #define ath_hal_updatetxtriglevel(_ah, _inc) \ 281 1.9.2.2 skrll ((*(_ah)->ah_updateTxTrigLevel)((_ah), (_inc))) 282 1.9.2.2 skrll #define ath_hal_setpower(_ah, _mode, _sleepduration) \ 283 1.9.2.2 skrll ((*(_ah)->ah_setPowerMode)((_ah), (_mode), AH_TRUE, (_sleepduration))) 284 1.9.2.2 skrll #define ath_hal_keyreset(_ah, _ix) \ 285 1.9.2.2 skrll ((*(_ah)->ah_resetKeyCacheEntry)((_ah), (_ix))) 286 1.9.2.2 skrll #define ath_hal_keyset(_ah, _ix, _pk) \ 287 1.9.2.2 skrll ((*(_ah)->ah_setKeyCacheEntry)((_ah), (_ix), (_pk), NULL, AH_FALSE)) 288 1.9.2.2 skrll #define ath_hal_keyisvalid(_ah, _ix) \ 289 1.9.2.2 skrll (((*(_ah)->ah_isKeyCacheEntryValid)((_ah), (_ix)))) 290 1.9.2.2 skrll #define ath_hal_keysetmac(_ah, _ix, _mac) \ 291 1.9.2.2 skrll ((*(_ah)->ah_setKeyCacheEntryMac)((_ah), (_ix), (_mac))) 292 1.9.2.2 skrll #define ath_hal_getrxfilter(_ah) \ 293 1.9.2.2 skrll ((*(_ah)->ah_getRxFilter)((_ah))) 294 1.9.2.2 skrll #define ath_hal_setrxfilter(_ah, _filter) \ 295 1.9.2.2 skrll ((*(_ah)->ah_setRxFilter)((_ah), (_filter))) 296 1.9.2.2 skrll #define ath_hal_setmcastfilter(_ah, _mfilt0, _mfilt1) \ 297 1.9.2.2 skrll ((*(_ah)->ah_setMulticastFilter)((_ah), (_mfilt0), (_mfilt1))) 298 1.9.2.2 skrll #define ath_hal_waitforbeacon(_ah, _bf) \ 299 1.9.2.2 skrll ((*(_ah)->ah_waitForBeaconDone)((_ah), (_bf)->bf_daddr)) 300 1.9.2.2 skrll #define ath_hal_putrxbuf(_ah, _bufaddr) \ 301 1.9.2.2 skrll ((*(_ah)->ah_setRxDP)((_ah), (_bufaddr))) 302 1.9.2.2 skrll #define ath_hal_gettsf32(_ah) \ 303 1.9.2.2 skrll ((*(_ah)->ah_getTsf32)((_ah))) 304 1.9.2.2 skrll #define ath_hal_gettsf64(_ah) \ 305 1.9.2.2 skrll ((*(_ah)->ah_getTsf64)((_ah))) 306 1.9.2.2 skrll #define ath_hal_resettsf(_ah) \ 307 1.9.2.2 skrll ((*(_ah)->ah_resetTsf)((_ah))) 308 1.9.2.2 skrll #define ath_hal_rxena(_ah) \ 309 1.9.2.2 skrll ((*(_ah)->ah_enableReceive)((_ah))) 310 1.9.2.2 skrll #define ath_hal_puttxbuf(_ah, _q, _bufaddr) \ 311 1.9.2.2 skrll ((*(_ah)->ah_setTxDP)((_ah), (_q), (_bufaddr))) 312 1.9.2.2 skrll #define ath_hal_gettxbuf(_ah, _q) \ 313 1.9.2.2 skrll ((*(_ah)->ah_getTxDP)((_ah), (_q))) 314 1.9.2.2 skrll #define ath_hal_getrxbuf(_ah) \ 315 1.9.2.2 skrll ((*(_ah)->ah_getRxDP)((_ah))) 316 1.9.2.2 skrll #define ath_hal_txstart(_ah, _q) \ 317 1.9.2.2 skrll ((*(_ah)->ah_startTxDma)((_ah), (_q))) 318 1.9.2.2 skrll #define ath_hal_setchannel(_ah, _chan) \ 319 1.9.2.2 skrll ((*(_ah)->ah_setChannel)((_ah), (_chan))) 320 1.9.2.2 skrll #define ath_hal_calibrate(_ah, _chan) \ 321 1.9.2.2 skrll ((*(_ah)->ah_perCalibration)((_ah), (_chan))) 322 1.9.2.2 skrll #define ath_hal_setledstate(_ah, _state) \ 323 1.9.2.2 skrll ((*(_ah)->ah_setLedState)((_ah), (_state))) 324 1.9.2.2 skrll #define ath_hal_beaconinit(_ah, _nextb, _bperiod) \ 325 1.9.2.2 skrll ((*(_ah)->ah_beaconInit)((_ah), (_nextb), (_bperiod))) 326 1.9.2.2 skrll #define ath_hal_beaconreset(_ah) \ 327 1.9.2.2 skrll ((*(_ah)->ah_resetStationBeaconTimers)((_ah))) 328 1.9.2.2 skrll #define ath_hal_beacontimers(_ah, _bs, _tsf, _dc, _cc) \ 329 1.9.2.2 skrll ((*(_ah)->ah_setStationBeaconTimers)((_ah), (_bs), (_tsf), \ 330 1.9.2.2 skrll (_dc), (_cc))) 331 1.9.2.2 skrll #define ath_hal_setassocid(_ah, _bss, _associd) \ 332 1.9.2.2 skrll ((*(_ah)->ah_writeAssocid)((_ah), (_bss), (_associd), 0)) 333 1.9.2.2 skrll #define ath_hal_getcapability(_ah, _cap, _param, _result) \ 334 1.9.2.2 skrll ((*(_ah)->ah_getCapability)((_ah), (_cap), (_param), (_result))) 335 1.9.2.2 skrll #define ath_hal_getregdomain(_ah, _prd) \ 336 1.9.2.2 skrll ath_hal_getcapability(_ah, HAL_CAP_REG_DMN, 0, (_prd)) 337 1.9.2.2 skrll #define ath_hal_getcountrycode(_ah, _pcc) \ 338 1.9.2.2 skrll (*(_pcc) = (_ah)->ah_countryCode) 339 1.9.2.2 skrll #define ath_hal_detach(_ah) \ 340 1.9.2.2 skrll ((*(_ah)->ah_detach)(_ah)) 341 1.9.2.2 skrll 342 1.9.2.2 skrll #ifdef SOFTLED 343 1.9.2.2 skrll #define ath_hal_gpioCfgOutput(_ah, _gpio) \ 344 1.9.2.2 skrll ((*(_ah)->ah_gpioCfgOutput)((_ah), (_gpio))) 345 1.9.2.2 skrll #define ath_hal_gpioCfgInput(_ah, _gpio) \ 346 1.9.2.2 skrll ((*(_ah)->ah_gpioCfgInput)((_ah), (_gpio))) 347 1.9.2.2 skrll #define ath_hal_gpioGet(_ah, _gpio) \ 348 1.9.2.2 skrll ((*(_ah)->ah_gpioGet)((_ah), (_gpio))) 349 1.9.2.2 skrll #define ath_hal_gpioSet(_ah, _gpio, _b) \ 350 1.9.2.2 skrll ((*(_ah)->ah_gpioSet)((_ah), (_gpio), (_b))) 351 1.9.2.2 skrll #define ath_hal_gpioSetIntr(_ah, _gpioSel, _b) \ 352 1.9.2.2 skrll ((*(_ah)->ah_gpioSetIntr)((_ah), (_sel), (_b))) 353 1.9.2.2 skrll #endif 354 1.9.2.2 skrll 355 1.9.2.2 skrll #define ath_hal_setopmode(_ah) \ 356 1.9.2.2 skrll ((*(_ah)->ah_setPCUConfig)((_ah))) 357 1.9.2.2 skrll #define ath_hal_stoptxdma(_ah, _qnum) \ 358 1.9.2.2 skrll ((*(_ah)->ah_stopTxDma)((_ah), (_qnum))) 359 1.9.2.2 skrll #define ath_hal_stoppcurecv(_ah) \ 360 1.9.2.2 skrll ((*(_ah)->ah_stopPcuReceive)((_ah))) 361 1.9.2.2 skrll #define ath_hal_startpcurecv(_ah) \ 362 1.9.2.2 skrll ((*(_ah)->ah_startPcuReceive)((_ah))) 363 1.9.2.2 skrll #define ath_hal_stopdmarecv(_ah) \ 364 1.9.2.2 skrll ((*(_ah)->ah_stopDmaReceive)((_ah))) 365 1.9.2.2 skrll #define ath_hal_getdiagstate(_ah, _id, _indata, _insize, _outdata, _outsize) \ 366 1.9.2.2 skrll ((*(_ah)->ah_getDiagState)((_ah), (_id), \ 367 1.9.2.2 skrll (_indata), (_insize), (_outdata), (_outsize))) 368 1.9.2.2 skrll #define ath_hal_getregdomain(_ah, _prd) \ 369 1.9.2.2 skrll ath_hal_getcapability(_ah, HAL_CAP_REG_DMN, 0, (_prd)) 370 1.9.2.2 skrll #define ath_hal_getcountrycode(_ah, _pcc) \ 371 1.9.2.2 skrll (*(_pcc) = (_ah)->ah_countryCode) 372 1.9.2.2 skrll 373 1.9.2.2 skrll #define ath_hal_setuptxqueue(_ah, _type, _qinfo) \ 374 1.9.2.2 skrll ((*(_ah)->ah_setupTxQueue)((_ah), (_type), (_qinfo))) 375 1.9.2.2 skrll #define ath_hal_resettxqueue(_ah, _q) \ 376 1.9.2.2 skrll ((*(_ah)->ah_resetTxQueue)((_ah), (_q))) 377 1.9.2.2 skrll #define ath_hal_releasetxqueue(_ah, _q) \ 378 1.9.2.2 skrll ((*(_ah)->ah_releaseTxQueue)((_ah), (_q))) 379 1.9.2.2 skrll #define ath_hal_hasveol(_ah) \ 380 1.9.2.2 skrll ((*(_ah)->ah_hasVEOL)((_ah))) 381 1.9.2.2 skrll #define ath_hal_getrfgain(_ah) \ 382 1.9.2.2 skrll ((*(_ah)->ah_getRfGain)((_ah))) 383 1.9.2.2 skrll #define ath_hal_rxmonitor(_ah) \ 384 1.9.2.2 skrll ((*(_ah)->ah_rxMonitor)((_ah))) 385 1.9.2.2 skrll 386 1.9.2.2 skrll #define ath_hal_setuprxdesc(_ah, _ds, _size, _intreq) \ 387 1.9.2.2 skrll ((*(_ah)->ah_setupRxDesc)((_ah), (_ds), (_size), (_intreq))) 388 1.9.2.2 skrll #define ath_hal_rxprocdesc(_ah, _ds, _dspa, _dsnext) \ 389 1.9.2.2 skrll ((*(_ah)->ah_procRxDesc)((_ah), (_ds), (_dspa), (_dsnext))) 390 1.9.2.2 skrll #define ath_hal_setuptxdesc(_ah, _ds, _plen, _hlen, _atype, _txpow, \ 391 1.9.2.2 skrll _txr0, _txtr0, _keyix, _ant, _flags, \ 392 1.9.2.2 skrll _rtsrate, _rtsdura) \ 393 1.9.2.2 skrll ((*(_ah)->ah_setupTxDesc)((_ah), (_ds), (_plen), (_hlen), (_atype), \ 394 1.9.2.2 skrll (_txpow), (_txr0), (_txtr0), (_keyix), (_ant), \ 395 1.9.2.2 skrll (_flags), (_rtsrate), (_rtsdura))) 396 1.9.2.2 skrll #define ath_hal_setupxtxdesc(_ah, _ds, \ 397 1.9.2.2 skrll _txr1, _txtr1, _txr2, _txtr2, _txr3, _txtr3) \ 398 1.9.2.2 skrll ((*(_ah)->ah_setupXTxDesc)((_ah), (_ds), \ 399 1.9.2.2 skrll (_txr1), (_txtr1), (_txr2), (_txtr2), (_txr3), (_txtr3))) 400 1.9.2.2 skrll #define ath_hal_filltxdesc(_ah, _ds, _l, _first, _last) \ 401 1.9.2.2 skrll ((*(_ah)->ah_fillTxDesc)((_ah), (_ds), (_l), (_first), (_last))) 402 1.9.2.2 skrll #define ath_hal_txprocdesc(_ah, _ds) \ 403 1.9.2.2 skrll ((*(_ah)->ah_procTxDesc)((_ah), (_ds))) 404 1.9.2.2 skrll 405 1.9.2.2 skrll #endif /* _DEV_ATH_ATHVAR_H */ 406
Indexes created Tue Oct 21 16:10:11 GMT 2025