athvar.h revision 1.2
1 /* $NetBSD: athvar.h,v 1.2 2003/10/13 05:23:07 dyoung Exp $ */ 2 /*- 3 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer, 11 * without modification. 12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14 * redistribution must be conditioned upon including a substantially 15 * similar Disclaimer requirement for further binary redistribution. 16 * 3. Neither the names of the above-listed copyright holders nor the names 17 * of any contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * Alternatively, this software may be distributed under the terms of the 21 * GNU General Public License ("GPL") version 2 as published by the Free 22 * Software Foundation. 23 * 24 * NO WARRANTY 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 28 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 29 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 30 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 33 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 35 * THE POSSIBILITY OF SUCH DAMAGES. 36 * 37 * $FreeBSD: src/sys/dev/ath/if_athvar.h,v 1.6 2003/09/05 22:22:49 sam Exp $ 38 */ 39 40 /* 41 * Defintions for the Atheros Wireless LAN controller driver. 42 */ 43 #ifndef _DEV_ATH_ATHVAR_H 44 #define _DEV_ATH_ATHVAR_H 45 46 #ifdef __FreeBSD__ 47 #include <sys/taskqueue.h> 48 49 #include <contrib/dev/ic/ah.h> 50 #else 51 #include <../contrib/sys/dev/ic/athhal.h> 52 #endif 53 #include <net80211/ieee80211_radiotap.h> 54 #ifdef __FreeBSD__ 55 #include <dev/ath/if_athioctl.h> 56 #else 57 #include <dev/ic/athioctl.h> 58 #endif 59 60 #define ATH_TIMEOUT 1000 61 62 #define ATH_RXBUF 40 /* number of RX buffers */ 63 #define ATH_TXBUF 60 /* number of TX buffers */ 64 #define ATH_TXDESC 8 /* number of descriptors per buffer */ 65 66 /* driver-specific node */ 67 struct ath_node { 68 struct ieee80211_node an_node; /* base class */ 69 u_int an_tx_ok; /* tx ok pkt */ 70 u_int an_tx_err; /* tx !ok pkt */ 71 u_int an_tx_retr; /* tx retry count */ 72 int an_tx_upper; /* tx upper rate req cnt */ 73 u_int an_tx_antenna; /* antenna for last good frame */ 74 u_int an_rx_antenna; /* antenna for last rcvd frame */ 75 }; 76 #define ATH_NODE(_n) ((struct ath_node *)(_n)) 77 78 struct ath_buf { 79 TAILQ_ENTRY(ath_buf) bf_list; 80 bus_dmamap_t bf_dmamap; /* DMA map of the buffer */ 81 #ifdef __FreeBSD__ 82 int bf_nseg; 83 bus_dma_segment_t bf_segs[ATH_MAX_SCATTER]; 84 bus_size_t bf_mapsize; 85 #else 86 #define bf_nseg bf_dmamap->dm_nsegs 87 #define bf_mapsize bf_dmamap->dm_mapsize 88 #define bf_segs bf_dmamap->dm_segs 89 #endif 90 struct ath_desc *bf_desc; /* virtual addr of desc */ 91 bus_addr_t bf_daddr; /* physical addr of desc */ 92 struct mbuf *bf_m; /* mbuf for buf */ 93 struct ieee80211_node *bf_node; /* pointer to the node */ 94 #define ATH_MAX_SCATTER 64 95 }; 96 97 struct ath_softc { 98 #ifdef __NetBSD__ 99 struct device sc_dev; 100 #endif 101 struct ieee80211com sc_ic; /* IEEE 802.11 common */ 102 int (*sc_newstate)(struct ieee80211com *, 103 enum ieee80211_state, int); 104 #ifdef __FreeBSD__ 105 device_t sc_dev; 106 #endif 107 bus_space_tag_t sc_st; /* bus space tag */ 108 bus_space_handle_t sc_sh; /* bus space handle */ 109 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 110 #ifdef __FreeBSD__ 111 struct mtx sc_mtx; /* master lock (recursive) */ 112 #endif 113 struct ath_hal *sc_ah; /* Atheros HAL */ 114 unsigned int sc_invalid : 1,/* disable hardware accesses */ 115 sc_have11g : 1,/* have 11g support */ 116 sc_doani : 1,/* dynamic noise immunity */ 117 sc_probing : 1;/* probing AP on beacon miss */ 118 /* rate tables */ 119 const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX]; 120 const HAL_RATE_TABLE *sc_currates; /* current rate table */ 121 enum ieee80211_phymode sc_curmode; /* current phy mode */ 122 u_int8_t sc_rixmap[256]; /* IEEE to h/w rate table ix */ 123 u_int8_t sc_hwmap[32]; /* h/w rate ix to IEEE table */ 124 HAL_INT sc_imask; /* interrupt mask copy */ 125 126 #ifdef __FreeBSD__ 127 struct bpf_if *sc_drvbpf; 128 #else 129 caddr_t sc_drvbpf; 130 #endif 131 union { 132 struct ath_tx_radiotap_header th; 133 u_int8_t pad[64]; 134 } u_tx_rt; 135 union { 136 struct ath_rx_radiotap_header th; 137 u_int8_t pad[64]; 138 } u_rx_rt; 139 140 struct ath_desc *sc_desc; /* TX/RX descriptors */ 141 bus_dma_segment_t sc_dseg; 142 #ifdef __NetBSD__ 143 int sc_dnseg; /* number of segments */ 144 #endif 145 bus_dmamap_t sc_ddmamap; /* DMA map for descriptors */ 146 bus_addr_t sc_desc_paddr; /* physical addr of sc_desc */ 147 bus_addr_t sc_desc_len; /* size of sc_desc */ 148 149 ath_task_t sc_fataltask; /* fatal int processing */ 150 ath_task_t sc_rxorntask; /* rxorn int processing */ 151 152 TAILQ_HEAD(, ath_buf) sc_rxbuf; /* receive buffer */ 153 u_int32_t *sc_rxlink; /* link ptr in last RX desc */ 154 ath_task_t sc_rxtask; /* rx int processing */ 155 156 u_int sc_txhalq; /* HAL q for outgoing frames */ 157 u_int32_t *sc_txlink; /* link ptr in last TX desc */ 158 int sc_tx_timer; /* transmit timeout */ 159 TAILQ_HEAD(, ath_buf) sc_txbuf; /* transmit buffer */ 160 #ifdef __FreeBSD__ 161 struct mtx sc_txbuflock; /* txbuf lock */ 162 #endif 163 TAILQ_HEAD(, ath_buf) sc_txq; /* transmitting queue */ 164 #ifdef __FreeBSD__ 165 struct mtx sc_txqlock; /* lock on txq and txlink */ 166 #endif 167 ath_task_t sc_txtask; /* tx int processing */ 168 169 u_int sc_bhalq; /* HAL q for outgoing beacons */ 170 struct ath_buf *sc_bcbuf; /* beacon buffer */ 171 struct ath_buf *sc_bufptr; /* allocated buffer ptr */ 172 ath_task_t sc_swbatask; /* swba int processing */ 173 ath_task_t sc_bmisstask; /* bmiss int processing */ 174 175 struct callout sc_cal_ch; /* callout handle for cals */ 176 struct callout sc_scan_ch; /* callout handle for scan */ 177 struct ath_stats sc_stats; /* interface statistics */ 178 }; 179 #define sc_tx_th u_tx_rt.th 180 #define sc_rx_th u_rx_rt.th 181 182 int ath_attach(u_int16_t, struct ath_softc *); 183 int ath_detach(struct ath_softc *); 184 void ath_resume(struct ath_softc *); 185 void ath_suspend(struct ath_softc *); 186 void ath_shutdown(struct ath_softc *); 187 #ifdef __FreeBSD__ 188 void ath_intr(void *); 189 #else 190 int ath_intr(void *); 191 #endif 192 193 /* 194 * HAL definitions to comply with local coding convention. 195 */ 196 #define ath_hal_reset(_ah, _opmode, _chan, _outdoor, _pstatus) \ 197 ((*(_ah)->ah_reset)((_ah), (_opmode), (_chan), (_outdoor), (_pstatus))) 198 #define ath_hal_getratetable(_ah, _mode) \ 199 ((*(_ah)->ah_getRateTable)((_ah), (_mode))) 200 #define ath_hal_getregdomain(_ah) \ 201 ((*(_ah)->ah_getRegDomain)((_ah))) 202 #define ath_hal_getcountrycode(_ah) (_ah)->ah_countryCode 203 #define ath_hal_getmac(_ah, _mac) \ 204 ((*(_ah)->ah_getMacAddress)((_ah), (_mac))) 205 #define ath_hal_detach(_ah) \ 206 ((*(_ah)->ah_detach)((_ah))) 207 #define ath_hal_intrset(_ah, _mask) \ 208 ((*(_ah)->ah_setInterrupts)((_ah), (_mask))) 209 #define ath_hal_intrget(_ah) \ 210 ((*(_ah)->ah_getInterrupts)((_ah))) 211 #define ath_hal_intrpend(_ah) \ 212 ((*(_ah)->ah_isInterruptPending)((_ah))) 213 #define ath_hal_getisr(_ah, _pmask) \ 214 ((*(_ah)->ah_getPendingInterrupts)((_ah), (_pmask))) 215 #define ath_hal_updatetxtriglevel(_ah, _inc) \ 216 ((*(_ah)->ah_updateTxTrigLevel)((_ah), (_inc))) 217 #define ath_hal_setpower(_ah, _mode, _sleepduration) \ 218 ((*(_ah)->ah_setPowerMode)((_ah), (_mode), AH_TRUE, (_sleepduration))) 219 #define ath_hal_keyreset(_ah, _ix) \ 220 ((*(_ah)->ah_resetKeyCacheEntry)((_ah), (_ix))) 221 #define ath_hal_keyset(_ah, _ix, _pk) \ 222 ((*(_ah)->ah_setKeyCacheEntry)((_ah), (_ix), (_pk), NULL, AH_FALSE)) 223 #define ath_hal_keyisvalid(_ah, _ix) \ 224 (((*(_ah)->ah_isKeyCacheEntryValid)((_ah), (_ix)))) 225 #define ath_hal_keysetmac(_ah, _ix, _mac) \ 226 ((*(_ah)->ah_setKeyCacheEntryMac)((_ah), (_ix), (_mac))) 227 #define ath_hal_getrxfilter(_ah) \ 228 ((*(_ah)->ah_getRxFilter)((_ah))) 229 #define ath_hal_setrxfilter(_ah, _filter) \ 230 ((*(_ah)->ah_setRxFilter)((_ah), (_filter))) 231 #define ath_hal_setmcastfilter(_ah, _mfilt0, _mfilt1) \ 232 ((*(_ah)->ah_setMulticastFilter)((_ah), (_mfilt0), (_mfilt1))) 233 #define ath_hal_waitforbeacon(_ah, _bf) \ 234 ((*(_ah)->ah_waitForBeaconDone)((_ah), (_bf)->bf_daddr)) 235 #define ath_hal_putrxbuf(_ah, _bufaddr) \ 236 ((*(_ah)->ah_setRxDP)((_ah), (_bufaddr))) 237 #define ath_hal_gettsf32(_ah) \ 238 ((*(_ah)->ah_getTsf32)((_ah))) 239 #define ath_hal_gettsf64(_ah) \ 240 ((*(_ah)->ah_getTsf64)((_ah))) 241 #define ath_hal_resettsf(_ah) \ 242 ((*(_ah)->ah_resetTsf)((_ah))) 243 #define ath_hal_rxena(_ah) \ 244 ((*(_ah)->ah_enableReceive)((_ah))) 245 #define ath_hal_puttxbuf(_ah, _q, _bufaddr) \ 246 ((*(_ah)->ah_setTxDP)((_ah), (_q), (_bufaddr))) 247 #define ath_hal_gettxbuf(_ah, _q) \ 248 ((*(_ah)->ah_getTxDP)((_ah), (_q))) 249 #define ath_hal_getrxbuf(_ah) \ 250 ((*(_ah)->ah_getRxDP)((_ah))) 251 #define ath_hal_txstart(_ah, _q) \ 252 ((*(_ah)->ah_startTxDma)((_ah), (_q))) 253 #define ath_hal_setchannel(_ah, _chan) \ 254 ((*(_ah)->ah_setChannel)((_ah), (_chan))) 255 #define ath_hal_calibrate(_ah, _chan) \ 256 ((*(_ah)->ah_perCalibration)((_ah), (_chan))) 257 #define ath_hal_setledstate(_ah, _state) \ 258 ((*(_ah)->ah_setLedState)((_ah), (_state))) 259 #define ath_hal_beaconinit(_ah, _opmode, _nextb, _bperiod) \ 260 ((*(_ah)->ah_beaconInit)((_ah), (_opmode), (_nextb), (_bperiod))) 261 #define ath_hal_beaconreset(_ah) \ 262 ((*(_ah)->ah_resetStationBeaconTimers)((_ah))) 263 #define ath_hal_beacontimers(_ah, _bs, _tsf, _dc, _cc) \ 264 ((*(_ah)->ah_setStationBeaconTimers)((_ah), (_bs), (_tsf), \ 265 (_dc), (_cc))) 266 #define ath_hal_setassocid(_ah, _bss, _associd) \ 267 ((*(_ah)->ah_writeAssocid)((_ah), (_bss), (_associd), 0)) 268 #define ath_hal_setopmode(_ah, _opmode) \ 269 ((*(_ah)->ah_setPCUConfig)((_ah), (_opmode))) 270 #define ath_hal_stoptxdma(_ah, _qnum) \ 271 ((*(_ah)->ah_stopTxDma)((_ah), (_qnum))) 272 #define ath_hal_stoppcurecv(_ah) \ 273 ((*(_ah)->ah_stopPcuReceive)((_ah))) 274 #define ath_hal_startpcurecv(_ah) \ 275 ((*(_ah)->ah_startPcuReceive)((_ah))) 276 #define ath_hal_stopdmarecv(_ah) \ 277 ((*(_ah)->ah_stopDmaReceive)((_ah))) 278 #define ath_hal_dumpstate(_ah) \ 279 ((*(_ah)->ah_dumpState)((_ah))) 280 #define ath_hal_dumpeeprom(_ah) \ 281 ((*(_ah)->ah_dumpEeprom)((_ah))) 282 #define ath_hal_dumprfgain(_ah) \ 283 ((*(_ah)->ah_dumpRfGain)((_ah))) 284 #define ath_hal_dumpani(_ah) \ 285 ((*(_ah)->ah_dumpAni)((_ah))) 286 #define ath_hal_setuptxqueue(_ah, _type, _irq) \ 287 ((*(_ah)->ah_setupTxQueue)((_ah), (_type), (_irq))) 288 #define ath_hal_resettxqueue(_ah, _q) \ 289 ((*(_ah)->ah_resetTxQueue)((_ah), (_q))) 290 #define ath_hal_releasetxqueue(_ah, _q) \ 291 ((*(_ah)->ah_releaseTxQueue)((_ah), (_q))) 292 #define ath_hal_hasveol(_ah) \ 293 ((*(_ah)->ah_hasVEOL)((_ah))) 294 #define ath_hal_getrfgain(_ah) \ 295 ((*(_ah)->ah_getRfGain)((_ah))) 296 #define ath_hal_rxmonitor(_ah) \ 297 ((*(_ah)->ah_rxMonitor)((_ah))) 298 299 #define ath_hal_setupbeacondesc(_ah, _ds, _opmode, _flen, _hlen, \ 300 _rate, _antmode) \ 301 ((*(_ah)->ah_setupBeaconDesc)((_ah), (_ds), (_opmode), \ 302 (_flen), (_hlen), (_rate), (_antmode))) 303 #define ath_hal_setuprxdesc(_ah, _ds, _size, _intreq) \ 304 ((*(_ah)->ah_setupRxDesc)((_ah), (_ds), (_size), (_intreq))) 305 #define ath_hal_rxprocdesc(_ah, _ds) \ 306 ((*(_ah)->ah_procRxDesc)((_ah), (_ds))) 307 #define ath_hal_setuptxdesc(_ah, _ds, _plen, _hlen, _atype, _txpow, \ 308 _txr0, _txtr0, _keyix, _ant, _flags, \ 309 _rtsrate, _rtsdura) \ 310 ((*(_ah)->ah_setupTxDesc)((_ah), (_ds), (_plen), (_hlen), (_atype), \ 311 (_txpow), (_txr0), (_txtr0), (_keyix), (_ant), \ 312 (_flags), (_rtsrate), (_rtsdura))) 313 #define ath_hal_setupxtxdesc(_ah, _ds, _short, \ 314 _txr1, _txtr1, _txr2, _txtr2, _txr3, _txtr3) \ 315 ((*(_ah)->ah_setupXTxDesc)((_ah), (_ds), (_short), \ 316 (_txr1), (_txtr1), (_txr2), (_txtr2), (_txr3), (_txtr3))) 317 #define ath_hal_filltxdesc(_ah, _ds, _l, _first, _last) \ 318 ((*(_ah)->ah_fillTxDesc)((_ah), (_ds), (_l), (_first), (_last))) 319 #define ath_hal_txprocdesc(_ah, _ds) \ 320 ((*(_ah)->ah_procTxDesc)((_ah), (_ds))) 321 322 #endif /* _DEV_ATH_ATHVAR_H */ 323
Indexes created Thu Sep 25 16:09:42 GMT 2025