athvar.h revision 1.4
1 /* $NetBSD: athvar.h,v 1.4 2003/10/15 23:23:39 itojun Exp $ */ 2 3 /*- 4 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 * 38 * $FreeBSD: src/sys/dev/ath/if_athvar.h,v 1.6 2003/09/05 22:22:49 sam Exp $ 39 */ 40 41 /* 42 * Defintions for the Atheros Wireless LAN controller driver. 43 */ 44 #ifndef _DEV_ATH_ATHVAR_H 45 #define _DEV_ATH_ATHVAR_H 46 47 #ifdef __FreeBSD__ 48 #include <sys/taskqueue.h> 49 50 #include <contrib/dev/ic/ah.h> 51 #else 52 #include <../contrib/sys/dev/ic/athhal.h> 53 #endif 54 #include <net80211/ieee80211_radiotap.h> 55 #ifdef __FreeBSD__ 56 #include <dev/ath/if_athioctl.h> 57 #else 58 #include <dev/ic/athioctl.h> 59 #endif 60 61 #define ATH_TIMEOUT 1000 62 63 #define ATH_RXBUF 40 /* number of RX buffers */ 64 #define ATH_TXBUF 60 /* number of TX buffers */ 65 #define ATH_TXDESC 8 /* number of descriptors per buffer */ 66 67 /* driver-specific node */ 68 struct ath_node { 69 struct ieee80211_node an_node; /* base class */ 70 u_int an_tx_ok; /* tx ok pkt */ 71 u_int an_tx_err; /* tx !ok pkt */ 72 u_int an_tx_retr; /* tx retry count */ 73 int an_tx_upper; /* tx upper rate req cnt */ 74 u_int an_tx_antenna; /* antenna for last good frame */ 75 u_int an_rx_antenna; /* antenna for last rcvd frame */ 76 }; 77 #define ATH_NODE(_n) ((struct ath_node *)(_n)) 78 79 struct ath_buf { 80 TAILQ_ENTRY(ath_buf) bf_list; 81 bus_dmamap_t bf_dmamap; /* DMA map of the buffer */ 82 #ifdef __FreeBSD__ 83 int bf_nseg; 84 bus_dma_segment_t bf_segs[ATH_MAX_SCATTER]; 85 bus_size_t bf_mapsize; 86 #else 87 #define bf_nseg bf_dmamap->dm_nsegs 88 #define bf_mapsize bf_dmamap->dm_mapsize 89 #define bf_segs bf_dmamap->dm_segs 90 #endif 91 struct ath_desc *bf_desc; /* virtual addr of desc */ 92 bus_addr_t bf_daddr; /* physical addr of desc */ 93 struct mbuf *bf_m; /* mbuf for buf */ 94 struct ieee80211_node *bf_node; /* pointer to the node */ 95 #define ATH_MAX_SCATTER 64 96 }; 97 98 struct ath_softc { 99 #ifdef __NetBSD__ 100 struct device sc_dev; 101 #endif 102 struct ieee80211com sc_ic; /* IEEE 802.11 common */ 103 #ifndef __FreeBSD__ 104 int (*sc_enable)(struct ath_softc *); 105 void (*sc_disable)(struct ath_softc *); 106 void (*sc_power)(struct ath_softc *, int); 107 #endif 108 int (*sc_newstate)(struct ieee80211com *, 109 enum ieee80211_state, int); 110 #ifdef __FreeBSD__ 111 device_t sc_dev; 112 #endif 113 bus_space_tag_t sc_st; /* bus space tag */ 114 bus_space_handle_t sc_sh; /* bus space handle */ 115 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 116 #ifdef __FreeBSD__ 117 struct mtx sc_mtx; /* master lock (recursive) */ 118 #endif 119 struct ath_hal *sc_ah; /* Atheros HAL */ 120 unsigned int sc_invalid : 1,/* disable hardware accesses */ 121 sc_have11g : 1,/* have 11g support */ 122 sc_doani : 1,/* dynamic noise immunity */ 123 sc_probing : 1;/* probing AP on beacon miss */ 124 /* rate tables */ 125 const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX]; 126 const HAL_RATE_TABLE *sc_currates; /* current rate table */ 127 enum ieee80211_phymode sc_curmode; /* current phy mode */ 128 u_int8_t sc_rixmap[256]; /* IEEE to h/w rate table ix */ 129 u_int8_t sc_hwmap[32]; /* h/w rate ix to IEEE table */ 130 HAL_INT sc_imask; /* interrupt mask copy */ 131 132 #ifdef __FreeBSD__ 133 struct bpf_if *sc_drvbpf; 134 #else 135 caddr_t sc_drvbpf; 136 #endif 137 union { 138 struct ath_tx_radiotap_header th; 139 u_int8_t pad[64]; 140 } u_tx_rt; 141 union { 142 struct ath_rx_radiotap_header th; 143 u_int8_t pad[64]; 144 } u_rx_rt; 145 146 struct ath_desc *sc_desc; /* TX/RX descriptors */ 147 bus_dma_segment_t sc_dseg; 148 #ifdef __NetBSD__ 149 int sc_dnseg; /* number of segments */ 150 #endif 151 bus_dmamap_t sc_ddmamap; /* DMA map for descriptors */ 152 bus_addr_t sc_desc_paddr; /* physical addr of sc_desc */ 153 bus_addr_t sc_desc_len; /* size of sc_desc */ 154 155 ath_task_t sc_fataltask; /* fatal int processing */ 156 ath_task_t sc_rxorntask; /* rxorn int processing */ 157 158 TAILQ_HEAD(, ath_buf) sc_rxbuf; /* receive buffer */ 159 u_int32_t *sc_rxlink; /* link ptr in last RX desc */ 160 ath_task_t sc_rxtask; /* rx int processing */ 161 162 u_int sc_txhalq; /* HAL q for outgoing frames */ 163 u_int32_t *sc_txlink; /* link ptr in last TX desc */ 164 int sc_tx_timer; /* transmit timeout */ 165 TAILQ_HEAD(, ath_buf) sc_txbuf; /* transmit buffer */ 166 #ifdef __FreeBSD__ 167 struct mtx sc_txbuflock; /* txbuf lock */ 168 #endif 169 TAILQ_HEAD(, ath_buf) sc_txq; /* transmitting queue */ 170 #ifdef __FreeBSD__ 171 struct mtx sc_txqlock; /* lock on txq and txlink */ 172 #endif 173 ath_task_t sc_txtask; /* tx int processing */ 174 175 u_int sc_bhalq; /* HAL q for outgoing beacons */ 176 struct ath_buf *sc_bcbuf; /* beacon buffer */ 177 struct ath_buf *sc_bufptr; /* allocated buffer ptr */ 178 ath_task_t sc_swbatask; /* swba int processing */ 179 ath_task_t sc_bmisstask; /* bmiss int processing */ 180 181 struct callout sc_cal_ch; /* callout handle for cals */ 182 struct callout sc_scan_ch; /* callout handle for scan */ 183 struct ath_stats sc_stats; /* interface statistics */ 184 185 #ifndef __FreeBSD__ 186 void *sc_sdhook; /* shutdown hook */ 187 void *sc_powerhook; /* power management hook */ 188 u_int sc_flags; /* misc flags */ 189 #endif 190 }; 191 #ifndef __FreeBSD__ 192 #define ATH_ATTACHED 0x0001 /* attach has succeeded */ 193 #define ATH_ENABLED 0x0002 /* chip is enabled */ 194 195 #define ATH_IS_ENABLED(sc) ((sc)->sc_flags & ATH_ENABLED) 196 #endif 197 198 #define sc_tx_th u_tx_rt.th 199 #define sc_rx_th u_rx_rt.th 200 201 int ath_attach(u_int16_t, struct ath_softc *); 202 int ath_detach(struct ath_softc *); 203 void ath_resume(struct ath_softc *, int); 204 void ath_suspend(struct ath_softc *, int); 205 void ath_shutdown(struct ath_softc *); 206 #ifndef __FreeBSD__ 207 int ath_activate(struct device *, enum devact); 208 void ath_power(int, void *); 209 #endif 210 #ifdef __FreeBSD__ 211 void ath_intr(void *); 212 #else 213 int ath_intr(void *); 214 #endif 215 216 /* 217 * HAL definitions to comply with local coding convention. 218 */ 219 #define ath_hal_reset(_ah, _opmode, _chan, _outdoor, _pstatus) \ 220 ((*(_ah)->ah_reset)((_ah), (_opmode), (_chan), (_outdoor), (_pstatus))) 221 #define ath_hal_getratetable(_ah, _mode) \ 222 ((*(_ah)->ah_getRateTable)((_ah), (_mode))) 223 #define ath_hal_getregdomain(_ah) \ 224 ((*(_ah)->ah_getRegDomain)((_ah))) 225 #define ath_hal_getcountrycode(_ah) (_ah)->ah_countryCode 226 #define ath_hal_getmac(_ah, _mac) \ 227 ((*(_ah)->ah_getMacAddress)((_ah), (_mac))) 228 #define ath_hal_detach(_ah) \ 229 ((*(_ah)->ah_detach)((_ah))) 230 #define ath_hal_intrset(_ah, _mask) \ 231 ((*(_ah)->ah_setInterrupts)((_ah), (_mask))) 232 #define ath_hal_intrget(_ah) \ 233 ((*(_ah)->ah_getInterrupts)((_ah))) 234 #define ath_hal_intrpend(_ah) \ 235 ((*(_ah)->ah_isInterruptPending)((_ah))) 236 #define ath_hal_getisr(_ah, _pmask) \ 237 ((*(_ah)->ah_getPendingInterrupts)((_ah), (_pmask))) 238 #define ath_hal_updatetxtriglevel(_ah, _inc) \ 239 ((*(_ah)->ah_updateTxTrigLevel)((_ah), (_inc))) 240 #define ath_hal_setpower(_ah, _mode, _sleepduration) \ 241 ((*(_ah)->ah_setPowerMode)((_ah), (_mode), AH_TRUE, (_sleepduration))) 242 #define ath_hal_keyreset(_ah, _ix) \ 243 ((*(_ah)->ah_resetKeyCacheEntry)((_ah), (_ix))) 244 #define ath_hal_keyset(_ah, _ix, _pk) \ 245 ((*(_ah)->ah_setKeyCacheEntry)((_ah), (_ix), (_pk), NULL, AH_FALSE)) 246 #define ath_hal_keyisvalid(_ah, _ix) \ 247 (((*(_ah)->ah_isKeyCacheEntryValid)((_ah), (_ix)))) 248 #define ath_hal_keysetmac(_ah, _ix, _mac) \ 249 ((*(_ah)->ah_setKeyCacheEntryMac)((_ah), (_ix), (_mac))) 250 #define ath_hal_getrxfilter(_ah) \ 251 ((*(_ah)->ah_getRxFilter)((_ah))) 252 #define ath_hal_setrxfilter(_ah, _filter) \ 253 ((*(_ah)->ah_setRxFilter)((_ah), (_filter))) 254 #define ath_hal_setmcastfilter(_ah, _mfilt0, _mfilt1) \ 255 ((*(_ah)->ah_setMulticastFilter)((_ah), (_mfilt0), (_mfilt1))) 256 #define ath_hal_waitforbeacon(_ah, _bf) \ 257 ((*(_ah)->ah_waitForBeaconDone)((_ah), (_bf)->bf_daddr)) 258 #define ath_hal_putrxbuf(_ah, _bufaddr) \ 259 ((*(_ah)->ah_setRxDP)((_ah), (_bufaddr))) 260 #define ath_hal_gettsf32(_ah) \ 261 ((*(_ah)->ah_getTsf32)((_ah))) 262 #define ath_hal_gettsf64(_ah) \ 263 ((*(_ah)->ah_getTsf64)((_ah))) 264 #define ath_hal_resettsf(_ah) \ 265 ((*(_ah)->ah_resetTsf)((_ah))) 266 #define ath_hal_rxena(_ah) \ 267 ((*(_ah)->ah_enableReceive)((_ah))) 268 #define ath_hal_puttxbuf(_ah, _q, _bufaddr) \ 269 ((*(_ah)->ah_setTxDP)((_ah), (_q), (_bufaddr))) 270 #define ath_hal_gettxbuf(_ah, _q) \ 271 ((*(_ah)->ah_getTxDP)((_ah), (_q))) 272 #define ath_hal_getrxbuf(_ah) \ 273 ((*(_ah)->ah_getRxDP)((_ah))) 274 #define ath_hal_txstart(_ah, _q) \ 275 ((*(_ah)->ah_startTxDma)((_ah), (_q))) 276 #define ath_hal_setchannel(_ah, _chan) \ 277 ((*(_ah)->ah_setChannel)((_ah), (_chan))) 278 #define ath_hal_calibrate(_ah, _chan) \ 279 ((*(_ah)->ah_perCalibration)((_ah), (_chan))) 280 #define ath_hal_setledstate(_ah, _state) \ 281 ((*(_ah)->ah_setLedState)((_ah), (_state))) 282 #define ath_hal_beaconinit(_ah, _opmode, _nextb, _bperiod) \ 283 ((*(_ah)->ah_beaconInit)((_ah), (_opmode), (_nextb), (_bperiod))) 284 #define ath_hal_beaconreset(_ah) \ 285 ((*(_ah)->ah_resetStationBeaconTimers)((_ah))) 286 #define ath_hal_beacontimers(_ah, _bs, _tsf, _dc, _cc) \ 287 ((*(_ah)->ah_setStationBeaconTimers)((_ah), (_bs), (_tsf), \ 288 (_dc), (_cc))) 289 #define ath_hal_setassocid(_ah, _bss, _associd) \ 290 ((*(_ah)->ah_writeAssocid)((_ah), (_bss), (_associd), 0)) 291 #define ath_hal_setopmode(_ah, _opmode) \ 292 ((*(_ah)->ah_setPCUConfig)((_ah), (_opmode))) 293 #define ath_hal_stoptxdma(_ah, _qnum) \ 294 ((*(_ah)->ah_stopTxDma)((_ah), (_qnum))) 295 #define ath_hal_stoppcurecv(_ah) \ 296 ((*(_ah)->ah_stopPcuReceive)((_ah))) 297 #define ath_hal_startpcurecv(_ah) \ 298 ((*(_ah)->ah_startPcuReceive)((_ah))) 299 #define ath_hal_stopdmarecv(_ah) \ 300 ((*(_ah)->ah_stopDmaReceive)((_ah))) 301 #define ath_hal_dumpstate(_ah) \ 302 ((*(_ah)->ah_dumpState)((_ah))) 303 #define ath_hal_dumpeeprom(_ah) \ 304 ((*(_ah)->ah_dumpEeprom)((_ah))) 305 #define ath_hal_dumprfgain(_ah) \ 306 ((*(_ah)->ah_dumpRfGain)((_ah))) 307 #define ath_hal_dumpani(_ah) \ 308 ((*(_ah)->ah_dumpAni)((_ah))) 309 #define ath_hal_setuptxqueue(_ah, _type, _irq) \ 310 ((*(_ah)->ah_setupTxQueue)((_ah), (_type), (_irq))) 311 #define ath_hal_resettxqueue(_ah, _q) \ 312 ((*(_ah)->ah_resetTxQueue)((_ah), (_q))) 313 #define ath_hal_releasetxqueue(_ah, _q) \ 314 ((*(_ah)->ah_releaseTxQueue)((_ah), (_q))) 315 #define ath_hal_hasveol(_ah) \ 316 ((*(_ah)->ah_hasVEOL)((_ah))) 317 #define ath_hal_getrfgain(_ah) \ 318 ((*(_ah)->ah_getRfGain)((_ah))) 319 #define ath_hal_rxmonitor(_ah) \ 320 ((*(_ah)->ah_rxMonitor)((_ah))) 321 322 #define ath_hal_setupbeacondesc(_ah, _ds, _opmode, _flen, _hlen, \ 323 _rate, _antmode) \ 324 ((*(_ah)->ah_setupBeaconDesc)((_ah), (_ds), (_opmode), \ 325 (_flen), (_hlen), (_rate), (_antmode))) 326 #define ath_hal_setuprxdesc(_ah, _ds, _size, _intreq) \ 327 ((*(_ah)->ah_setupRxDesc)((_ah), (_ds), (_size), (_intreq))) 328 #define ath_hal_rxprocdesc(_ah, _ds) \ 329 ((*(_ah)->ah_procRxDesc)((_ah), (_ds))) 330 #define ath_hal_setuptxdesc(_ah, _ds, _plen, _hlen, _atype, _txpow, \ 331 _txr0, _txtr0, _keyix, _ant, _flags, \ 332 _rtsrate, _rtsdura) \ 333 ((*(_ah)->ah_setupTxDesc)((_ah), (_ds), (_plen), (_hlen), (_atype), \ 334 (_txpow), (_txr0), (_txtr0), (_keyix), (_ant), \ 335 (_flags), (_rtsrate), (_rtsdura))) 336 #define ath_hal_setupxtxdesc(_ah, _ds, _short, \ 337 _txr1, _txtr1, _txr2, _txtr2, _txr3, _txtr3) \ 338 ((*(_ah)->ah_setupXTxDesc)((_ah), (_ds), (_short), \ 339 (_txr1), (_txtr1), (_txr2), (_txtr2), (_txr3), (_txtr3))) 340 #define ath_hal_filltxdesc(_ah, _ds, _l, _first, _last) \ 341 ((*(_ah)->ah_fillTxDesc)((_ah), (_ds), (_l), (_first), (_last))) 342 #define ath_hal_txprocdesc(_ah, _ds) \ 343 ((*(_ah)->ah_procTxDesc)((_ah), (_ds))) 344 345 #endif /* _DEV_ATH_ATHVAR_H */ 346
Indexes created Fri Sep 26 08:10:20 GMT 2025