athvar.h revision 1.9.2.4
1 /* $NetBSD: athvar.h,v 1.9.2.4 2004/09/18 14:45:56 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 * 38 * $FreeBSD: src/sys/dev/ath/if_athvar.h,v 1.14 2004/04/03 03:33:02 sam Exp $ 39 */ 40 41 /* 42 * Defintions for the Atheros Wireless LAN controller driver. 43 */ 44 #ifndef _DEV_ATH_ATHVAR_H 45 #define _DEV_ATH_ATHVAR_H 46 47 #ifdef __FreeBSD__ 48 #include <sys/taskqueue.h> 49 50 #include <contrib/dev/ic/ah.h> 51 #else 52 #include <../contrib/sys/dev/ic/athhal.h> 53 #endif 54 #include <net80211/ieee80211_radiotap.h> 55 #ifdef __FreeBSD__ 56 #include <dev/ath/if_athioctl.h> 57 #else 58 #include <dev/ic/athioctl.h> 59 #endif 60 61 #define ATH_TIMEOUT 1000 62 63 #define ATH_RXBUF 40 /* number of RX buffers */ 64 #define ATH_TXBUF 60 /* number of TX buffers */ 65 #define ATH_TXDESC 8 /* number of descriptors per buffer */ 66 67 struct ath_recv_hist { 68 int arh_ticks; /* sample time by system clock */ 69 u_int8_t arh_rssi; /* rssi */ 70 u_int8_t arh_antenna; /* antenna */ 71 }; 72 #define ATH_RHIST_SIZE 16 /* number of samples */ 73 #define ATH_RHIST_NOTIME (~0) 74 75 /* driver-specific node */ 76 struct ath_node { 77 struct ieee80211_node an_node; /* base class */ 78 u_int an_tx_ok; /* tx ok pkt */ 79 u_int an_tx_err; /* tx !ok pkt */ 80 u_int an_tx_retr; /* tx retry count */ 81 int an_tx_upper; /* tx upper rate req cnt */ 82 u_int an_tx_antenna; /* antenna for last good frame */ 83 u_int an_rx_antenna; /* antenna for last rcvd frame */ 84 struct ath_recv_hist an_rx_hist[ATH_RHIST_SIZE]; 85 u_int an_rx_hist_next;/* index of next ``free entry'' */ 86 }; 87 #define ATH_NODE(_n) ((struct ath_node *)(_n)) 88 89 struct ath_buf { 90 TAILQ_ENTRY(ath_buf) bf_list; 91 bus_dmamap_t bf_dmamap; /* DMA map of the buffer */ 92 #ifdef __FreeBSD__ 93 int bf_nseg; 94 bus_dma_segment_t bf_segs[ATH_MAX_SCATTER]; 95 bus_size_t bf_mapsize; 96 #else 97 #define bf_nseg bf_dmamap->dm_nsegs 98 #define bf_mapsize bf_dmamap->dm_mapsize 99 #define bf_segs bf_dmamap->dm_segs 100 #endif 101 struct ath_desc *bf_desc; /* virtual addr of desc */ 102 bus_addr_t bf_daddr; /* physical addr of desc */ 103 struct mbuf *bf_m; /* mbuf for buf */ 104 struct ieee80211_node *bf_node; /* pointer to the node */ 105 #define ATH_MAX_SCATTER 64 106 }; 107 108 struct ath_softc { 109 #ifdef __NetBSD__ 110 struct device sc_dev; 111 #endif 112 struct ieee80211com sc_ic; /* IEEE 802.11 common */ 113 #ifndef __FreeBSD__ 114 int (*sc_enable)(struct ath_softc *); 115 void (*sc_disable)(struct ath_softc *); 116 void (*sc_power)(struct ath_softc *, int); 117 #endif 118 int (*sc_newstate)(struct ieee80211com *, 119 enum ieee80211_state, int); 120 void (*sc_node_free)(struct ieee80211com *, 121 struct ieee80211_node *); 122 void (*sc_node_copy)(struct ieee80211com *, 123 struct ieee80211_node *, 124 const struct ieee80211_node *); 125 void (*sc_recv_mgmt)(struct ieee80211com *, 126 struct mbuf *, struct ieee80211_node *, 127 int, int, u_int32_t); 128 #ifdef __FreeBSD__ 129 device_t sc_dev; 130 #endif 131 bus_space_tag_t sc_st; /* bus space tag */ 132 bus_space_handle_t sc_sh; /* bus space handle */ 133 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 134 #ifdef __FreeBSD__ 135 struct mtx sc_mtx; /* master lock (recursive) */ 136 #endif 137 struct ath_hal *sc_ah; /* Atheros HAL */ 138 unsigned int sc_invalid : 1,/* disable hardware accesses */ 139 sc_doani : 1,/* dynamic noise immunity */ 140 sc_probing : 1;/* probing AP on beacon miss */ 141 /* rate tables */ 142 const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX]; 143 const HAL_RATE_TABLE *sc_currates; /* current rate table */ 144 enum ieee80211_phymode sc_curmode; /* current phy mode */ 145 u_int8_t sc_rixmap[256]; /* IEEE to h/w rate table ix */ 146 u_int8_t sc_hwmap[32]; /* h/w rate ix to IEEE table */ 147 HAL_INT sc_imask; /* interrupt mask copy */ 148 149 #ifdef __FreeBSD__ 150 struct bpf_if *sc_drvbpf; 151 #else 152 caddr_t sc_drvbpf; 153 #endif 154 union { 155 struct ath_tx_radiotap_header th; 156 u_int8_t pad[64]; 157 } u_tx_rt; 158 int sc_tx_th_len; 159 union { 160 struct ath_rx_radiotap_header th; 161 u_int8_t pad[64]; 162 } u_rx_rt; 163 int sc_rx_th_len; 164 165 struct ath_desc *sc_desc; /* TX/RX descriptors */ 166 bus_dma_segment_t sc_dseg; 167 #ifdef __NetBSD__ 168 int sc_dnseg; /* number of segments */ 169 #endif 170 bus_dmamap_t sc_ddmamap; /* DMA map for descriptors */ 171 bus_addr_t sc_desc_paddr; /* physical addr of sc_desc */ 172 bus_addr_t sc_desc_len; /* size of sc_desc */ 173 174 ath_task_t sc_fataltask; /* fatal int processing */ 175 ath_task_t sc_rxorntask; /* rxorn int processing */ 176 177 TAILQ_HEAD(, ath_buf) sc_rxbuf; /* receive buffer */ 178 u_int32_t *sc_rxlink; /* link ptr in last RX desc */ 179 ath_task_t sc_rxtask; /* rx int processing */ 180 181 u_int sc_txhalq; /* HAL q for outgoing frames */ 182 u_int32_t *sc_txlink; /* link ptr in last TX desc */ 183 int sc_tx_timer; /* transmit timeout */ 184 TAILQ_HEAD(, ath_buf) sc_txbuf; /* transmit buffer */ 185 #ifdef __FreeBSD__ 186 struct mtx sc_txbuflock; /* txbuf lock */ 187 #endif 188 TAILQ_HEAD(, ath_buf) sc_txq; /* transmitting queue */ 189 #ifdef __FreeBSD__ 190 struct mtx sc_txqlock; /* lock on txq and txlink */ 191 #endif 192 ath_task_t sc_txtask; /* tx int processing */ 193 194 u_int sc_bhalq; /* HAL q for outgoing beacons */ 195 struct ath_buf *sc_bcbuf; /* beacon buffer */ 196 struct ath_buf *sc_bufptr; /* allocated buffer ptr */ 197 ath_task_t sc_swbatask; /* swba int processing */ 198 ath_task_t sc_bmisstask; /* bmiss int processing */ 199 200 struct callout sc_cal_ch; /* callout handle for cals */ 201 struct callout sc_scan_ch; /* callout handle for scan */ 202 struct ath_stats sc_stats; /* interface statistics */ 203 204 #ifndef __FreeBSD__ 205 void *sc_sdhook; /* shutdown hook */ 206 void *sc_powerhook; /* power management hook */ 207 u_int sc_flags; /* misc flags */ 208 #endif 209 }; 210 #ifndef __FreeBSD__ 211 #define ATH_ATTACHED 0x0001 /* attach has succeeded */ 212 #define ATH_ENABLED 0x0002 /* chip is enabled */ 213 214 #define ATH_IS_ENABLED(sc) ((sc)->sc_flags & ATH_ENABLED) 215 #endif 216 217 #define sc_tx_th u_tx_rt.th 218 #define sc_rx_th u_rx_rt.th 219 220 #define ATH_LOCK_INIT(_sc) \ 221 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \ 222 MTX_NETWORK_LOCK, MTX_DEF | MTX_RECURSE) 223 #define ATH_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) 224 #define ATH_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 225 #define ATH_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 226 #define ATH_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED) 227 228 #define ATH_TXBUF_LOCK_INIT(_sc) \ 229 mtx_init(&(_sc)->sc_txbuflock, \ 230 device_get_nameunit((_sc)->sc_dev), "xmit buf q", MTX_DEF) 231 #define ATH_TXBUF_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_txbuflock) 232 #define ATH_TXBUF_LOCK(_sc) mtx_lock(&(_sc)->sc_txbuflock) 233 #define ATH_TXBUF_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_txbuflock) 234 #define ATH_TXBUF_LOCK_ASSERT(_sc) \ 235 mtx_assert(&(_sc)->sc_txbuflock, MA_OWNED) 236 237 #define ATH_TXQ_LOCK_INIT(_sc) \ 238 mtx_init(&(_sc)->sc_txqlock, \ 239 device_get_nameunit((_sc)->sc_dev), "xmit q", MTX_DEF) 240 #define ATH_TXQ_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_txqlock) 241 #define ATH_TXQ_LOCK(_sc) mtx_lock(&(_sc)->sc_txqlock) 242 #define ATH_TXQ_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_txqlock) 243 #define ATH_TXQ_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_txqlock, MA_OWNED) 244 245 int ath_attach(u_int16_t, struct ath_softc *); 246 int ath_detach(struct ath_softc *); 247 void ath_resume(struct ath_softc *, int); 248 void ath_suspend(struct ath_softc *, int); 249 #ifdef __NetBSD__ 250 int ath_activate(struct device *, enum devact); 251 void ath_power(int, void *); 252 #endif 253 #ifdef __FreeBSD__ 254 void ath_shutdown(struct ath_softc *); 255 void ath_intr(void *); 256 #else 257 void ath_shutdown(void *); 258 int ath_intr(void *); 259 #endif 260 261 /* 262 * HAL definitions to comply with local coding convention. 263 */ 264 #define ath_hal_reset(_ah, _opmode, _chan, _outdoor, _pstatus) \ 265 ((*(_ah)->ah_reset)((_ah), (_opmode), (_chan), (_outdoor), (_pstatus))) 266 #define ath_hal_getratetable(_ah, _mode) \ 267 ((*(_ah)->ah_getRateTable)((_ah), (_mode))) 268 #define ath_hal_getmac(_ah, _mac) \ 269 ((*(_ah)->ah_getMacAddress)((_ah), (_mac))) 270 #define ath_hal_setmac(_ah, _mac) \ 271 ((*(_ah)->ah_setMacAddress)((_ah), (_mac))) 272 #define ath_hal_intrset(_ah, _mask) \ 273 ((*(_ah)->ah_setInterrupts)((_ah), (_mask))) 274 #define ath_hal_intrget(_ah) \ 275 ((*(_ah)->ah_getInterrupts)((_ah))) 276 #define ath_hal_intrpend(_ah) \ 277 ((*(_ah)->ah_isInterruptPending)((_ah))) 278 #define ath_hal_getisr(_ah, _pmask) \ 279 ((*(_ah)->ah_getPendingInterrupts)((_ah), (_pmask))) 280 #define ath_hal_updatetxtriglevel(_ah, _inc) \ 281 ((*(_ah)->ah_updateTxTrigLevel)((_ah), (_inc))) 282 #define ath_hal_setpower(_ah, _mode, _sleepduration) \ 283 ((*(_ah)->ah_setPowerMode)((_ah), (_mode), AH_TRUE, (_sleepduration))) 284 #define ath_hal_keyreset(_ah, _ix) \ 285 ((*(_ah)->ah_resetKeyCacheEntry)((_ah), (_ix))) 286 #define ath_hal_keyset(_ah, _ix, _pk) \ 287 ((*(_ah)->ah_setKeyCacheEntry)((_ah), (_ix), (_pk), NULL, AH_FALSE)) 288 #define ath_hal_keyisvalid(_ah, _ix) \ 289 (((*(_ah)->ah_isKeyCacheEntryValid)((_ah), (_ix)))) 290 #define ath_hal_keysetmac(_ah, _ix, _mac) \ 291 ((*(_ah)->ah_setKeyCacheEntryMac)((_ah), (_ix), (_mac))) 292 #define ath_hal_getrxfilter(_ah) \ 293 ((*(_ah)->ah_getRxFilter)((_ah))) 294 #define ath_hal_setrxfilter(_ah, _filter) \ 295 ((*(_ah)->ah_setRxFilter)((_ah), (_filter))) 296 #define ath_hal_setmcastfilter(_ah, _mfilt0, _mfilt1) \ 297 ((*(_ah)->ah_setMulticastFilter)((_ah), (_mfilt0), (_mfilt1))) 298 #define ath_hal_waitforbeacon(_ah, _bf) \ 299 ((*(_ah)->ah_waitForBeaconDone)((_ah), (_bf)->bf_daddr)) 300 #define ath_hal_putrxbuf(_ah, _bufaddr) \ 301 ((*(_ah)->ah_setRxDP)((_ah), (_bufaddr))) 302 #define ath_hal_gettsf32(_ah) \ 303 ((*(_ah)->ah_getTsf32)((_ah))) 304 #define ath_hal_gettsf64(_ah) \ 305 ((*(_ah)->ah_getTsf64)((_ah))) 306 #define ath_hal_resettsf(_ah) \ 307 ((*(_ah)->ah_resetTsf)((_ah))) 308 #define ath_hal_rxena(_ah) \ 309 ((*(_ah)->ah_enableReceive)((_ah))) 310 #define ath_hal_puttxbuf(_ah, _q, _bufaddr) \ 311 ((*(_ah)->ah_setTxDP)((_ah), (_q), (_bufaddr))) 312 #define ath_hal_gettxbuf(_ah, _q) \ 313 ((*(_ah)->ah_getTxDP)((_ah), (_q))) 314 #define ath_hal_getrxbuf(_ah) \ 315 ((*(_ah)->ah_getRxDP)((_ah))) 316 #define ath_hal_txstart(_ah, _q) \ 317 ((*(_ah)->ah_startTxDma)((_ah), (_q))) 318 #define ath_hal_setchannel(_ah, _chan) \ 319 ((*(_ah)->ah_setChannel)((_ah), (_chan))) 320 #define ath_hal_calibrate(_ah, _chan) \ 321 ((*(_ah)->ah_perCalibration)((_ah), (_chan))) 322 #define ath_hal_setledstate(_ah, _state) \ 323 ((*(_ah)->ah_setLedState)((_ah), (_state))) 324 #define ath_hal_beaconinit(_ah, _nextb, _bperiod) \ 325 ((*(_ah)->ah_beaconInit)((_ah), (_nextb), (_bperiod))) 326 #define ath_hal_beaconreset(_ah) \ 327 ((*(_ah)->ah_resetStationBeaconTimers)((_ah))) 328 #define ath_hal_beacontimers(_ah, _bs, _tsf, _dc, _cc) \ 329 ((*(_ah)->ah_setStationBeaconTimers)((_ah), (_bs), (_tsf), \ 330 (_dc), (_cc))) 331 #define ath_hal_setassocid(_ah, _bss, _associd) \ 332 ((*(_ah)->ah_writeAssocid)((_ah), (_bss), (_associd), 0)) 333 #define ath_hal_getcapability(_ah, _cap, _param, _result) \ 334 ((*(_ah)->ah_getCapability)((_ah), (_cap), (_param), (_result))) 335 #define ath_hal_getregdomain(_ah, _prd) \ 336 ath_hal_getcapability(_ah, HAL_CAP_REG_DMN, 0, (_prd)) 337 #define ath_hal_getcountrycode(_ah, _pcc) \ 338 (*(_pcc) = (_ah)->ah_countryCode) 339 #define ath_hal_detach(_ah) \ 340 ((*(_ah)->ah_detach)(_ah)) 341 342 #ifdef SOFTLED 343 #define ath_hal_gpioCfgOutput(_ah, _gpio) \ 344 ((*(_ah)->ah_gpioCfgOutput)((_ah), (_gpio))) 345 #define ath_hal_gpioCfgInput(_ah, _gpio) \ 346 ((*(_ah)->ah_gpioCfgInput)((_ah), (_gpio))) 347 #define ath_hal_gpioGet(_ah, _gpio) \ 348 ((*(_ah)->ah_gpioGet)((_ah), (_gpio))) 349 #define ath_hal_gpioSet(_ah, _gpio, _b) \ 350 ((*(_ah)->ah_gpioSet)((_ah), (_gpio), (_b))) 351 #define ath_hal_gpioSetIntr(_ah, _gpioSel, _b) \ 352 ((*(_ah)->ah_gpioSetIntr)((_ah), (_sel), (_b))) 353 #endif 354 355 #define ath_hal_setopmode(_ah) \ 356 ((*(_ah)->ah_setPCUConfig)((_ah))) 357 #define ath_hal_stoptxdma(_ah, _qnum) \ 358 ((*(_ah)->ah_stopTxDma)((_ah), (_qnum))) 359 #define ath_hal_stoppcurecv(_ah) \ 360 ((*(_ah)->ah_stopPcuReceive)((_ah))) 361 #define ath_hal_startpcurecv(_ah) \ 362 ((*(_ah)->ah_startPcuReceive)((_ah))) 363 #define ath_hal_stopdmarecv(_ah) \ 364 ((*(_ah)->ah_stopDmaReceive)((_ah))) 365 #define ath_hal_getdiagstate(_ah, _id, _indata, _insize, _outdata, _outsize) \ 366 ((*(_ah)->ah_getDiagState)((_ah), (_id), \ 367 (_indata), (_insize), (_outdata), (_outsize))) 368 #define ath_hal_getregdomain(_ah, _prd) \ 369 ath_hal_getcapability(_ah, HAL_CAP_REG_DMN, 0, (_prd)) 370 #define ath_hal_getcountrycode(_ah, _pcc) \ 371 (*(_pcc) = (_ah)->ah_countryCode) 372 373 #define ath_hal_setuptxqueue(_ah, _type, _qinfo) \ 374 ((*(_ah)->ah_setupTxQueue)((_ah), (_type), (_qinfo))) 375 #define ath_hal_resettxqueue(_ah, _q) \ 376 ((*(_ah)->ah_resetTxQueue)((_ah), (_q))) 377 #define ath_hal_releasetxqueue(_ah, _q) \ 378 ((*(_ah)->ah_releaseTxQueue)((_ah), (_q))) 379 #define ath_hal_hasveol(_ah) \ 380 ((*(_ah)->ah_hasVEOL)((_ah))) 381 #define ath_hal_getrfgain(_ah) \ 382 ((*(_ah)->ah_getRfGain)((_ah))) 383 #define ath_hal_rxmonitor(_ah) \ 384 ((*(_ah)->ah_rxMonitor)((_ah))) 385 386 #define ath_hal_setuprxdesc(_ah, _ds, _size, _intreq) \ 387 ((*(_ah)->ah_setupRxDesc)((_ah), (_ds), (_size), (_intreq))) 388 #define ath_hal_rxprocdesc(_ah, _ds, _dspa, _dsnext) \ 389 ((*(_ah)->ah_procRxDesc)((_ah), (_ds), (_dspa), (_dsnext))) 390 #define ath_hal_setuptxdesc(_ah, _ds, _plen, _hlen, _atype, _txpow, \ 391 _txr0, _txtr0, _keyix, _ant, _flags, \ 392 _rtsrate, _rtsdura) \ 393 ((*(_ah)->ah_setupTxDesc)((_ah), (_ds), (_plen), (_hlen), (_atype), \ 394 (_txpow), (_txr0), (_txtr0), (_keyix), (_ant), \ 395 (_flags), (_rtsrate), (_rtsdura))) 396 #define ath_hal_setupxtxdesc(_ah, _ds, \ 397 _txr1, _txtr1, _txr2, _txtr2, _txr3, _txtr3) \ 398 ((*(_ah)->ah_setupXTxDesc)((_ah), (_ds), \ 399 (_txr1), (_txtr1), (_txr2), (_txtr2), (_txr3), (_txtr3))) 400 #define ath_hal_filltxdesc(_ah, _ds, _l, _first, _last) \ 401 ((*(_ah)->ah_fillTxDesc)((_ah), (_ds), (_l), (_first), (_last))) 402 #define ath_hal_txprocdesc(_ah, _ds) \ 403 ((*(_ah)->ah_procTxDesc)((_ah), (_ds))) 404 405 #endif /* _DEV_ATH_ATHVAR_H */ 406
Indexes created Sat Oct 18 17:09:52 GMT 2025