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awi.c revision 1.30.2.4
      1  1.30.2.4   nathanw /*	$NetBSD: awi.c,v 1.30.2.4 2002/06/24 22:09:55 nathanw Exp $	*/
      2       1.3  sommerfe 
      3      1.19      onoe /*-
      4  1.30.2.2   nathanw  * Copyright (c) 1999,2000,2001 The NetBSD Foundation, Inc.
      5       1.1  sommerfe  * All rights reserved.
      6       1.1  sommerfe  *
      7       1.1  sommerfe  * This code is derived from software contributed to The NetBSD Foundation
      8      1.19      onoe  * by Bill Sommerfeld
      9       1.1  sommerfe  *
     10       1.1  sommerfe  * Redistribution and use in source and binary forms, with or without
     11       1.1  sommerfe  * modification, are permitted provided that the following conditions
     12       1.1  sommerfe  * are met:
     13       1.1  sommerfe  * 1. Redistributions of source code must retain the above copyright
     14       1.1  sommerfe  *    notice, this list of conditions and the following disclaimer.
     15       1.1  sommerfe  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1  sommerfe  *    notice, this list of conditions and the following disclaimer in the
     17       1.1  sommerfe  *    documentation and/or other materials provided with the distribution.
     18       1.1  sommerfe  * 3. All advertising materials mentioning features or use of this software
     19       1.1  sommerfe  *    must display the following acknowledgement:
     20      1.19      onoe  *        This product includes software developed by the NetBSD
     21      1.19      onoe  *        Foundation, Inc. and its contributors.
     22       1.1  sommerfe  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1  sommerfe  *    contributors may be used to endorse or promote products derived
     24       1.1  sommerfe  *    from this software without specific prior written permission.
     25       1.1  sommerfe  *
     26       1.1  sommerfe  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1  sommerfe  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1  sommerfe  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1  sommerfe  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1  sommerfe  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1  sommerfe  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1  sommerfe  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1  sommerfe  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1  sommerfe  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1  sommerfe  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1  sommerfe  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1  sommerfe  */
     38      1.19      onoe /*
     39      1.19      onoe  * Driver for AMD 802.11 firmware.
     40      1.19      onoe  * Uses am79c930 chip driver to talk to firmware running on the am79c930.
     41      1.19      onoe  *
     42      1.19      onoe  * More-or-less a generic ethernet-like if driver, with 802.11 gorp added.
     43      1.19      onoe  */
     44      1.19      onoe 
     45      1.19      onoe /*
     46      1.19      onoe  * todo:
     47      1.19      onoe  *	- flush tx queue on resynch.
     48      1.19      onoe  *	- clear oactive on "down".
     49      1.19      onoe  *	- rewrite copy-into-mbuf code
     50      1.19      onoe  *	- mgmt state machine gets stuck retransmitting assoc requests.
     51      1.19      onoe  *	- multicast filter.
     52      1.19      onoe  *	- fix device reset so it's more likely to work
     53      1.19      onoe  *	- show status goo through ifmedia.
     54      1.19      onoe  *
     55      1.19      onoe  * more todo:
     56      1.19      onoe  *	- deal with more 802.11 frames.
     57      1.19      onoe  *		- send reassoc request
     58      1.19      onoe  *		- deal with reassoc response
     59      1.19      onoe  *		- send/deal with disassociation
     60      1.19      onoe  *	- deal with "full" access points (no room for me).
     61      1.19      onoe  *	- power save mode
     62      1.19      onoe  *
     63      1.19      onoe  * later:
     64      1.19      onoe  *	- SSID preferences
     65      1.19      onoe  *	- need ioctls for poking at the MIBs
     66      1.19      onoe  *	- implement ad-hoc mode (including bss creation).
     67      1.19      onoe  *	- decide when to do "ad hoc" vs. infrastructure mode (IFF_LINK flags?)
     68      1.19      onoe  *		(focus on inf. mode since that will be needed for ietf)
     69      1.19      onoe  *	- deal with DH vs. FH versions of the card
     70      1.19      onoe  *	- deal with faster cards (2mb/s)
     71      1.19      onoe  *	- ?WEP goo (mmm, rc4) (it looks not particularly useful).
     72      1.19      onoe  *	- ifmedia revision.
     73      1.19      onoe  *	- common 802.11 mibish things.
     74      1.19      onoe  *	- common 802.11 media layer.
     75      1.19      onoe  */
     76      1.10      onoe 
     77       1.1  sommerfe /*
     78      1.10      onoe  * Driver for AMD 802.11 PCnetMobile firmware.
     79       1.1  sommerfe  * Uses am79c930 chip driver to talk to firmware running on the am79c930.
     80       1.1  sommerfe  *
     81      1.10      onoe  * The initial version of the driver was written by
     82      1.10      onoe  * Bill Sommerfeld <sommerfeld (at) netbsd.org>.
     83      1.10      onoe  * Then the driver module completely rewritten to support cards with DS phy
     84      1.10      onoe  * and to support adhoc mode by Atsushi Onoe <onoe (at) netbsd.org>
     85       1.1  sommerfe  */
     86  1.30.2.3   nathanw 
     87  1.30.2.3   nathanw #include <sys/cdefs.h>
     88  1.30.2.4   nathanw __KERNEL_RCSID(0, "$NetBSD: awi.c,v 1.30.2.4 2002/06/24 22:09:55 nathanw Exp $");
     89       1.1  sommerfe 
     90       1.1  sommerfe #include "opt_inet.h"
     91      1.10      onoe #include "bpfilter.h"
     92       1.1  sommerfe 
     93       1.1  sommerfe #include <sys/param.h>
     94       1.1  sommerfe #include <sys/systm.h>
     95       1.1  sommerfe #include <sys/kernel.h>
     96       1.1  sommerfe #include <sys/mbuf.h>
     97      1.10      onoe #include <sys/malloc.h>
     98      1.10      onoe #include <sys/proc.h>
     99       1.1  sommerfe #include <sys/socket.h>
    100      1.10      onoe #include <sys/sockio.h>
    101       1.1  sommerfe #include <sys/errno.h>
    102       1.1  sommerfe #include <sys/device.h>
    103       1.1  sommerfe 
    104       1.1  sommerfe #include <net/if.h>
    105       1.1  sommerfe #include <net/if_dl.h>
    106       1.1  sommerfe #include <net/if_ether.h>
    107       1.1  sommerfe #include <net/if_media.h>
    108      1.10      onoe #include <net/if_llc.h>
    109      1.10      onoe #include <net/if_ieee80211.h>
    110       1.1  sommerfe 
    111       1.1  sommerfe #ifdef INET
    112       1.1  sommerfe #include <netinet/in.h>
    113       1.1  sommerfe #include <netinet/in_systm.h>
    114      1.10      onoe #ifdef __NetBSD__
    115       1.1  sommerfe #include <netinet/if_inarp.h>
    116      1.10      onoe #else
    117      1.10      onoe #include <netinet/if_ether.h>
    118      1.10      onoe #endif
    119       1.1  sommerfe #endif
    120       1.1  sommerfe 
    121       1.1  sommerfe #if NBPFILTER > 0
    122       1.1  sommerfe #include <net/bpf.h>
    123       1.1  sommerfe #endif
    124       1.1  sommerfe 
    125       1.1  sommerfe #include <machine/cpu.h>
    126       1.1  sommerfe #include <machine/bus.h>
    127       1.1  sommerfe #include <machine/intr.h>
    128       1.1  sommerfe 
    129       1.1  sommerfe #include <dev/ic/am79c930reg.h>
    130       1.1  sommerfe #include <dev/ic/am79c930var.h>
    131       1.1  sommerfe #include <dev/ic/awireg.h>
    132       1.1  sommerfe #include <dev/ic/awivar.h>
    133      1.10      onoe 
    134  1.30.2.2   nathanw static int  awi_init(struct ifnet *);
    135  1.30.2.2   nathanw static void awi_stop(struct ifnet *, int);
    136  1.30.2.2   nathanw static void awi_start(struct ifnet *);
    137  1.30.2.2   nathanw static void awi_watchdog(struct ifnet *);
    138  1.30.2.2   nathanw static int  awi_ioctl(struct ifnet *, u_long, caddr_t);
    139  1.30.2.2   nathanw static int  awi_media_change(struct ifnet *);
    140  1.30.2.2   nathanw static void awi_media_status(struct ifnet *, struct ifmediareq *);
    141  1.30.2.2   nathanw static int  awi_mode_init(struct awi_softc *);
    142  1.30.2.2   nathanw static int  awi_media_rate2opt(struct awi_softc *, int);
    143  1.30.2.2   nathanw static int  awi_media_opt2rate(struct awi_softc *, int);
    144  1.30.2.2   nathanw static void awi_rx_int(struct awi_softc *);
    145  1.30.2.2   nathanw static void awi_tx_int(struct awi_softc *);
    146  1.30.2.2   nathanw static struct mbuf *awi_devget(struct awi_softc *, u_int32_t, u_int16_t);
    147  1.30.2.2   nathanw static int  awi_hw_init(struct awi_softc *);
    148  1.30.2.2   nathanw static int  awi_init_mibs(struct awi_softc *);
    149  1.30.2.2   nathanw static int  awi_chan_check(void *, u_char *);
    150  1.30.2.2   nathanw static int  awi_mib(struct awi_softc *, u_int8_t, u_int8_t, int);
    151  1.30.2.2   nathanw static int  awi_cmd(struct awi_softc *, u_int8_t, int);
    152  1.30.2.2   nathanw static int  awi_cmd_wait(struct awi_softc *);
    153  1.30.2.2   nathanw static void awi_cmd_done(struct awi_softc *);
    154  1.30.2.2   nathanw static int  awi_next_txd(struct awi_softc *, int, u_int32_t *, u_int32_t *);
    155  1.30.2.2   nathanw static int  awi_lock(struct awi_softc *);
    156  1.30.2.2   nathanw static void awi_unlock(struct awi_softc *);
    157  1.30.2.2   nathanw static int  awi_intr_lock(struct awi_softc *);
    158  1.30.2.2   nathanw static void awi_intr_unlock(struct awi_softc *);
    159  1.30.2.2   nathanw static int  awi_newstate(void *, enum ieee80211_state);
    160  1.30.2.2   nathanw static struct mbuf *awi_ether_encap(struct awi_softc *, struct mbuf *);
    161  1.30.2.2   nathanw static struct mbuf *awi_ether_modcap(struct awi_softc *, struct mbuf *);
    162  1.30.2.2   nathanw 
    163  1.30.2.2   nathanw /* unalligned little endian access */
    164  1.30.2.2   nathanw #define LE_READ_2(p)							\
    165  1.30.2.2   nathanw 	((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8))
    166  1.30.2.2   nathanw #define LE_READ_4(p)							\
    167  1.30.2.2   nathanw 	((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8) |	\
    168  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))
    169  1.30.2.2   nathanw #define LE_WRITE_2(p, v)						\
    170  1.30.2.2   nathanw 	((((u_int8_t *)(p))[0] = (((u_int32_t)(v)      ) & 0xff)),	\
    171  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[1] = (((u_int32_t)(v) >>  8) & 0xff)))
    172  1.30.2.2   nathanw #define LE_WRITE_4(p, v)						\
    173  1.30.2.2   nathanw 	((((u_int8_t *)(p))[0] = (((u_int32_t)(v)      ) & 0xff)),	\
    174  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[1] = (((u_int32_t)(v) >>  8) & 0xff)),	\
    175  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[2] = (((u_int32_t)(v) >> 16) & 0xff)),	\
    176  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[3] = (((u_int32_t)(v) >> 24) & 0xff)))
    177  1.30.2.2   nathanw 
    178  1.30.2.2   nathanw struct awi_chanset awi_chanset[] = {
    179  1.30.2.2   nathanw     /* PHY type        domain            min max def */
    180  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_JP,  6, 17,  6 },
    181  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_ES,  0, 26,  1 },
    182  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_FR,  0, 32,  1 },
    183  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_US,  0, 77,  1 },
    184  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_CA,  0, 77,  1 },
    185  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_EU,  0, 77,  1 },
    186  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_JP, 14, 14, 14 },
    187  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_ES, 10, 11, 10 },
    188  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_FR, 10, 13, 10 },
    189  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_US,  1, 11,  3 },
    190  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_CA,  1, 11,  3 },
    191  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_EU,  1, 13,  3 },
    192  1.30.2.2   nathanw     { 0, 0 }
    193  1.30.2.2   nathanw };
    194      1.10      onoe 
    195      1.10      onoe #ifdef AWI_DEBUG
    196  1.30.2.2   nathanw int awi_debug;
    197       1.1  sommerfe 
    198  1.30.2.2   nathanw #define	DPRINTF(X)	if (awi_debug) printf X
    199  1.30.2.2   nathanw #define	DPRINTF2(X)	if (awi_debug > 1) printf X
    200      1.10      onoe #else
    201  1.30.2.2   nathanw #define	DPRINTF(X)
    202  1.30.2.2   nathanw #define	DPRINTF2(X)
    203      1.10      onoe #endif
    204       1.1  sommerfe 
    205      1.10      onoe int
    206  1.30.2.2   nathanw awi_attach(struct awi_softc *sc)
    207       1.1  sommerfe {
    208  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    209  1.30.2.2   nathanw 	struct ifnet *ifp = &ic->ic_if;
    210  1.30.2.2   nathanw 	int s, i, error, nrate;
    211      1.10      onoe 	int mword;
    212      1.10      onoe 	struct ifmediareq imr;
    213       1.1  sommerfe 
    214      1.10      onoe 	s = splnet();
    215      1.10      onoe 	sc->sc_busy = 1;
    216  1.30.2.2   nathanw 	ic->ic_state = IEEE80211_S_INIT;
    217  1.30.2.2   nathanw 	sc->sc_substate = AWI_ST_NONE;
    218  1.30.2.2   nathanw 	if ((error = awi_hw_init(sc)) != 0) {
    219      1.10      onoe 		sc->sc_invalid = 1;
    220      1.10      onoe 		splx(s);
    221      1.10      onoe 		return error;
    222      1.10      onoe 	}
    223      1.10      onoe 	error = awi_init_mibs(sc);
    224  1.30.2.2   nathanw 	if (error != 0) {
    225      1.10      onoe 		sc->sc_invalid = 1;
    226  1.30.2.2   nathanw 		splx(s);
    227      1.10      onoe 		return error;
    228      1.10      onoe 	}
    229      1.10      onoe 	ifp->if_softc = sc;
    230  1.30.2.2   nathanw 	ifp->if_flags =
    231  1.30.2.2   nathanw 	    IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST | IFF_NOTRAILERS;
    232      1.10      onoe 	ifp->if_ioctl = awi_ioctl;
    233  1.30.2.2   nathanw 	ifp->if_start = awi_start;
    234  1.30.2.1   nathanw 	ifp->if_init = awi_init;
    235  1.30.2.1   nathanw 	ifp->if_stop = awi_stop;
    236  1.30.2.2   nathanw 	ifp->if_watchdog = awi_watchdog;
    237      1.29   thorpej 	IFQ_SET_READY(&ifp->if_snd);
    238  1.30.2.2   nathanw 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
    239  1.30.2.2   nathanw 
    240  1.30.2.2   nathanw 	ic->ic_flags = IEEE80211_F_HASWEP | IEEE80211_F_HASIBSS;
    241  1.30.2.2   nathanw 	ic->ic_newstate = awi_newstate;
    242  1.30.2.2   nathanw 	ic->ic_chancheck = awi_chan_check;
    243  1.30.2.2   nathanw 	nrate = sc->sc_mib_phy.aSuprt_Data_Rates[1];
    244  1.30.2.2   nathanw 	memcpy(ic->ic_sup_rates, sc->sc_mib_phy.aSuprt_Data_Rates + 2, nrate);
    245  1.30.2.2   nathanw 	memcpy(ic->ic_myaddr, sc->sc_mib_addr.aMAC_Address, IEEE80211_ADDR_LEN);
    246       1.1  sommerfe 
    247      1.18      onoe 	printf("%s: IEEE802.11 %s %dMbps (firmware %s)\n",
    248      1.10      onoe 	    sc->sc_dev.dv_xname,
    249      1.10      onoe 	    sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH ? "FH" : "DS",
    250  1.30.2.2   nathanw 	    (ic->ic_sup_rates[nrate - 1] & IEEE80211_RATE_VAL) / 2,
    251  1.30.2.2   nathanw 	    sc->sc_banner);
    252  1.30.2.2   nathanw 	printf("%s: 802.11 address: %s\n", sc->sc_dev.dv_xname,
    253  1.30.2.2   nathanw 	    ether_sprintf(ic->ic_myaddr));
    254  1.30.2.2   nathanw 
    255      1.10      onoe 	if_attach(ifp);
    256  1.30.2.2   nathanw 	ieee80211_ifattach(ifp);
    257       1.1  sommerfe 
    258      1.10      onoe 	ifmedia_init(&sc->sc_media, 0, awi_media_change, awi_media_status);
    259  1.30.2.2   nathanw 	mword = IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0);
    260  1.30.2.2   nathanw 	ifmedia_add(&sc->sc_media, mword, 0, NULL);
    261  1.30.2.2   nathanw 	ifmedia_add(&sc->sc_media, mword | IFM_FLAG0, 0, NULL);
    262  1.30.2.2   nathanw 	mword |= IFM_IEEE80211_ADHOC;
    263  1.30.2.2   nathanw 	ifmedia_add(&sc->sc_media, mword, 0, NULL);
    264  1.30.2.2   nathanw 	ifmedia_add(&sc->sc_media, mword | IFM_FLAG0, 0, NULL);
    265  1.30.2.2   nathanw 	for (i = 0; i < nrate; i++) {
    266  1.30.2.2   nathanw 		mword = awi_media_rate2opt(sc, ic->ic_sup_rates[i]);
    267      1.10      onoe 		if (mword == 0)
    268      1.10      onoe 			continue;
    269      1.10      onoe 		mword |= IFM_IEEE80211;
    270      1.10      onoe 		ifmedia_add(&sc->sc_media, mword, 0, NULL);
    271  1.30.2.2   nathanw 		ifmedia_add(&sc->sc_media, mword | IFM_FLAG0, 0, NULL);
    272  1.30.2.2   nathanw 		mword |= IFM_IEEE80211_ADHOC;
    273  1.30.2.2   nathanw 		ifmedia_add(&sc->sc_media, mword, 0, NULL);
    274      1.20      onoe 		if (sc->sc_mib_phy.IEEE_PHY_Type != AWI_PHY_TYPE_FH)
    275  1.30.2.2   nathanw 			ifmedia_add(&sc->sc_media, mword | IFM_FLAG0, 0, NULL);
    276       1.1  sommerfe 	}
    277      1.10      onoe 	awi_media_status(ifp, &imr);
    278      1.10      onoe 	ifmedia_set(&sc->sc_media, imr.ifm_active);
    279  1.30.2.2   nathanw 
    280  1.30.2.2   nathanw 	if ((sc->sc_sdhook = shutdownhook_establish(awi_shutdown, sc)) == NULL)
    281  1.30.2.2   nathanw 		printf("%s: WARNING: unable to establish shutdown hook\n",
    282  1.30.2.2   nathanw 		    sc->sc_dev.dv_xname);
    283  1.30.2.2   nathanw 	if ((sc->sc_powerhook = powerhook_establish(awi_power, sc)) == NULL)
    284  1.30.2.2   nathanw 		printf("%s: WARNING: unable to establish power hook\n",
    285  1.30.2.2   nathanw 		    sc->sc_dev.dv_xname);
    286  1.30.2.2   nathanw 	sc->sc_attached = 1;
    287  1.30.2.2   nathanw 	splx(s);
    288       1.1  sommerfe 
    289      1.10      onoe 	/* ready to accept ioctl */
    290      1.10      onoe 	awi_unlock(sc);
    291      1.17     jhawk 
    292      1.10      onoe 	return 0;
    293       1.1  sommerfe }
    294       1.1  sommerfe 
    295      1.10      onoe int
    296  1.30.2.2   nathanw awi_detach(struct awi_softc *sc)
    297       1.1  sommerfe {
    298  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    299      1.10      onoe 	int s;
    300      1.17     jhawk 
    301      1.17     jhawk 	if (!sc->sc_attached)
    302  1.30.2.2   nathanw 		return 0;
    303       1.1  sommerfe 
    304      1.10      onoe 	s = splnet();
    305      1.10      onoe 	sc->sc_invalid = 1;
    306  1.30.2.1   nathanw 	awi_stop(ifp, 1);
    307      1.10      onoe 	while (sc->sc_sleep_cnt > 0) {
    308      1.10      onoe 		wakeup(sc);
    309      1.10      onoe 		(void)tsleep(sc, PWAIT, "awidet", 1);
    310       1.1  sommerfe 	}
    311      1.10      onoe 	ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY);
    312  1.30.2.2   nathanw 	ieee80211_ifdetach(ifp);
    313      1.10      onoe 	if_detach(ifp);
    314  1.30.2.2   nathanw 	shutdownhook_disestablish(sc->sc_sdhook);
    315  1.30.2.2   nathanw 	powerhook_disestablish(sc->sc_powerhook);
    316      1.10      onoe 	splx(s);
    317      1.10      onoe 	return 0;
    318       1.1  sommerfe }
    319       1.1  sommerfe 
    320       1.1  sommerfe int
    321  1.30.2.2   nathanw awi_activate(struct device *self, enum devact act)
    322       1.1  sommerfe {
    323      1.10      onoe 	struct awi_softc *sc = (struct awi_softc *)self;
    324  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    325      1.10      onoe 	int s, error = 0;
    326      1.10      onoe 
    327      1.10      onoe 	s = splnet();
    328      1.10      onoe 	switch (act) {
    329      1.10      onoe 	case DVACT_ACTIVATE:
    330      1.10      onoe 		error = EOPNOTSUPP;
    331      1.10      onoe 		break;
    332      1.10      onoe 	case DVACT_DEACTIVATE:
    333      1.10      onoe 		sc->sc_invalid = 1;
    334  1.30.2.2   nathanw 		if_deactivate(ifp);
    335      1.10      onoe 		break;
    336       1.1  sommerfe 	}
    337      1.10      onoe 	splx(s);
    338      1.10      onoe 	return error;
    339       1.1  sommerfe }
    340       1.1  sommerfe 
    341       1.1  sommerfe void
    342  1.30.2.2   nathanw awi_power(int why, void *arg)
    343       1.1  sommerfe {
    344  1.30.2.2   nathanw 	struct awi_softc *sc = arg;
    345  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    346      1.10      onoe 	int s;
    347      1.18      onoe 	int ocansleep;
    348      1.10      onoe 
    349  1.30.2.2   nathanw 	DPRINTF(("awi_power: %d\n", why));
    350      1.10      onoe 	s = splnet();
    351      1.18      onoe 	ocansleep = sc->sc_cansleep;
    352      1.18      onoe 	sc->sc_cansleep = 0;
    353      1.28  takemura 	switch (why) {
    354      1.28  takemura 	case PWR_SUSPEND:
    355      1.28  takemura 	case PWR_STANDBY:
    356  1.30.2.1   nathanw 		awi_stop(ifp, 1);
    357      1.28  takemura 		break;
    358      1.28  takemura 	case PWR_RESUME:
    359  1.30.2.1   nathanw 		if (ifp->if_flags & IFF_UP) {
    360  1.30.2.1   nathanw 			awi_init(ifp);
    361  1.30.2.2   nathanw 			(void)awi_intr(sc);	/* make sure */
    362  1.30.2.1   nathanw 		}
    363      1.28  takemura 		break;
    364      1.28  takemura 	case PWR_SOFTSUSPEND:
    365      1.28  takemura 	case PWR_SOFTSTANDBY:
    366      1.28  takemura 	case PWR_SOFTRESUME:
    367      1.28  takemura 		break;
    368      1.18      onoe 	}
    369      1.18      onoe 	sc->sc_cansleep = ocansleep;
    370      1.10      onoe 	splx(s);
    371       1.1  sommerfe }
    372       1.1  sommerfe 
    373  1.30.2.2   nathanw void
    374  1.30.2.2   nathanw awi_shutdown(void *arg)
    375       1.1  sommerfe {
    376  1.30.2.2   nathanw 	struct awi_softc *sc = arg;
    377  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    378       1.1  sommerfe 
    379  1.30.2.2   nathanw 	if (sc->sc_attached)
    380  1.30.2.2   nathanw 		awi_stop(ifp, 1);
    381       1.1  sommerfe }
    382       1.1  sommerfe 
    383       1.1  sommerfe int
    384  1.30.2.2   nathanw awi_intr(void *arg)
    385       1.1  sommerfe {
    386       1.1  sommerfe 	struct awi_softc *sc = arg;
    387      1.10      onoe 	u_int16_t status;
    388      1.10      onoe 	int error, handled = 0, ocansleep;
    389  1.30.2.2   nathanw #ifdef AWI_DEBUG
    390  1.30.2.2   nathanw 	static const char *intname[] = {
    391  1.30.2.2   nathanw 	    "CMD", "RX", "TX", "SCAN_CMPLT",
    392  1.30.2.2   nathanw 	    "CFP_START", "DTIM", "CFP_ENDING", "GROGGY",
    393  1.30.2.2   nathanw 	    "TXDATA", "TXBCAST", "TXPS", "TXCF",
    394  1.30.2.2   nathanw 	    "TXMGT", "#13", "RXDATA", "RXMGT"
    395  1.30.2.2   nathanw 	};
    396  1.30.2.2   nathanw #endif
    397       1.1  sommerfe 
    398      1.15      onoe 	if (!sc->sc_enabled || !sc->sc_enab_intr || sc->sc_invalid)
    399      1.10      onoe 		return 0;
    400       1.1  sommerfe 
    401      1.10      onoe 	am79c930_gcr_setbits(&sc->sc_chip,
    402      1.10      onoe 	    AM79C930_GCR_DISPWDN | AM79C930_GCR_ECINT);
    403       1.1  sommerfe 	awi_write_1(sc, AWI_DIS_PWRDN, 1);
    404      1.10      onoe 	ocansleep = sc->sc_cansleep;
    405      1.10      onoe 	sc->sc_cansleep = 0;
    406      1.10      onoe 
    407       1.1  sommerfe 	for (;;) {
    408  1.30.2.2   nathanw 		if ((error = awi_intr_lock(sc)) != 0)
    409      1.10      onoe 			break;
    410      1.10      onoe 		status = awi_read_1(sc, AWI_INTSTAT);
    411      1.10      onoe 		awi_write_1(sc, AWI_INTSTAT, 0);
    412      1.10      onoe 		awi_write_1(sc, AWI_INTSTAT, 0);
    413      1.10      onoe 		status |= awi_read_1(sc, AWI_INTSTAT2) << 8;
    414      1.10      onoe 		awi_write_1(sc, AWI_INTSTAT2, 0);
    415      1.10      onoe 		DELAY(10);
    416      1.10      onoe 		awi_intr_unlock(sc);
    417      1.10      onoe 		if (!sc->sc_cmd_inprog)
    418      1.10      onoe 			status &= ~AWI_INT_CMD;	/* make sure */
    419      1.10      onoe 		if (status == 0)
    420       1.1  sommerfe 			break;
    421  1.30.2.2   nathanw #ifdef AWI_DEBUG
    422  1.30.2.2   nathanw 		if (awi_debug > 1) {
    423  1.30.2.2   nathanw 			int i;
    424  1.30.2.2   nathanw 
    425  1.30.2.2   nathanw 			printf("awi_intr: status 0x%04x", status);
    426  1.30.2.2   nathanw 			for (i = 0; i < sizeof(intname)/sizeof(intname[0]);
    427  1.30.2.2   nathanw 			    i++) {
    428  1.30.2.2   nathanw 				if (status & (1 << i))
    429  1.30.2.2   nathanw 					printf(" %s", intname[i]);
    430  1.30.2.2   nathanw 			}
    431  1.30.2.2   nathanw 			printf("\n");
    432  1.30.2.2   nathanw 		}
    433  1.30.2.2   nathanw #endif
    434       1.1  sommerfe 		handled = 1;
    435      1.10      onoe 		if (status & AWI_INT_RX)
    436  1.30.2.2   nathanw 			awi_rx_int(sc);
    437      1.10      onoe 		if (status & AWI_INT_TX)
    438  1.30.2.2   nathanw 			awi_tx_int(sc);
    439      1.10      onoe 		if (status & AWI_INT_CMD)
    440      1.10      onoe 			awi_cmd_done(sc);
    441      1.10      onoe 		if (status & AWI_INT_SCAN_CMPLT) {
    442  1.30.2.2   nathanw 			if (sc->sc_ic.ic_state == IEEE80211_S_SCAN)
    443  1.30.2.2   nathanw 				ieee80211_next_scan(&sc->sc_ic.ic_if);
    444       1.1  sommerfe 		}
    445       1.1  sommerfe 	}
    446      1.10      onoe 	sc->sc_cansleep = ocansleep;
    447       1.1  sommerfe 	am79c930_gcr_clearbits(&sc->sc_chip, AM79C930_GCR_DISPWDN);
    448       1.1  sommerfe 	awi_write_1(sc, AWI_DIS_PWRDN, 0);
    449       1.1  sommerfe 	return handled;
    450       1.1  sommerfe }
    451       1.1  sommerfe 
    452  1.30.2.2   nathanw static int
    453  1.30.2.2   nathanw awi_init(struct ifnet *ifp)
    454       1.8  sommerfe {
    455  1.30.2.1   nathanw 	struct awi_softc *sc = ifp->if_softc;
    456  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    457  1.30.2.2   nathanw 	struct ieee80211_bss *bs = &ic->ic_bss;
    458  1.30.2.2   nathanw 	int i, error;
    459       1.8  sommerfe 
    460  1.30.2.2   nathanw 	DPRINTF(("awi_init: enabled=%d\n", sc->sc_enabled));
    461  1.30.2.2   nathanw 	if (sc->sc_enabled) {
    462  1.30.2.2   nathanw 		awi_stop(ifp, 0);
    463  1.30.2.2   nathanw 	} else {
    464      1.10      onoe 		if (sc->sc_enable)
    465      1.10      onoe 			(*sc->sc_enable)(sc);
    466  1.30.2.2   nathanw 		sc->sc_enabled = 1;
    467  1.30.2.2   nathanw 		if ((error = awi_hw_init(sc)) != 0) {
    468  1.30.2.1   nathanw 			awi_stop(ifp, 1);
    469      1.10      onoe 			return error;
    470  1.30.2.1   nathanw 		}
    471      1.10      onoe 	}
    472  1.30.2.2   nathanw 	ic->ic_state = IEEE80211_S_INIT;
    473  1.30.2.2   nathanw 
    474  1.30.2.2   nathanw 	sc->sc_mib_local.Network_Mode =
    475  1.30.2.2   nathanw 	    (ic->ic_flags & IEEE80211_F_ADHOC) ? 0 : 1;
    476  1.30.2.2   nathanw 
    477  1.30.2.2   nathanw 	if ((error = awi_mode_init(sc)) != 0) {
    478  1.30.2.2   nathanw 		DPRINTF(("awi_init: awi_mode_init failed %d\n", error));
    479  1.30.2.1   nathanw 		awi_stop(ifp, 1);
    480      1.10      onoe 		return error;
    481      1.10      onoe 	}
    482       1.8  sommerfe 
    483  1.30.2.2   nathanw 	/* start transmitter */
    484  1.30.2.2   nathanw 	sc->sc_txdone = sc->sc_txnext = sc->sc_txbase;
    485  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_START, 0);
    486  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_NEXT, 0);
    487  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_LENGTH, 0);
    488  1.30.2.2   nathanw 	awi_write_1(sc, sc->sc_txbase + AWI_TXD_RATE, 0);
    489  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_NDA, 0);
    490  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_NRA, 0);
    491  1.30.2.2   nathanw 	awi_write_1(sc, sc->sc_txbase + AWI_TXD_STATE, 0);
    492  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_DATA, sc->sc_txbase);
    493  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_MGT, 0);
    494  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_BCAST, 0);
    495  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_PS, 0);
    496  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_CF, 0);
    497  1.30.2.2   nathanw 	if ((error = awi_cmd(sc, AWI_CMD_INIT_TX, AWI_WAIT)) != 0) {
    498  1.30.2.2   nathanw 		DPRINTF(("awi_init: failed to start transmitter: %d\n", error));
    499  1.30.2.2   nathanw 		awi_stop(ifp, 1);
    500  1.30.2.2   nathanw 		return error;
    501      1.10      onoe 	}
    502  1.30.2.2   nathanw 
    503  1.30.2.2   nathanw 	/* start receiver */
    504  1.30.2.2   nathanw 	if ((error = awi_cmd(sc, AWI_CMD_INIT_RX, AWI_WAIT)) != 0) {
    505  1.30.2.2   nathanw 		DPRINTF(("awi_init: failed to start receiver: %d\n", error));
    506  1.30.2.2   nathanw 		awi_stop(ifp, 1);
    507  1.30.2.2   nathanw 		return error;
    508      1.18      onoe 	}
    509  1.30.2.2   nathanw 	sc->sc_rxdoff = awi_read_4(sc, AWI_CA_IRX_DATA_DESC);
    510  1.30.2.2   nathanw 	sc->sc_rxmoff = awi_read_4(sc, AWI_CA_IRX_PS_DESC);
    511  1.30.2.2   nathanw 
    512  1.30.2.2   nathanw 	ifp->if_flags |= IFF_RUNNING;
    513  1.30.2.2   nathanw 	ifp->if_flags &= ~IFF_OACTIVE;
    514  1.30.2.2   nathanw 
    515  1.30.2.2   nathanw 	if ((sc->sc_ic.ic_flags & IEEE80211_F_ADHOC) && sc->sc_no_bssid) {
    516  1.30.2.2   nathanw 		bs->bs_chan = ic->ic_ibss_chan;
    517  1.30.2.2   nathanw 		bs->bs_intval = ic->ic_lintval;
    518  1.30.2.2   nathanw 		bs->bs_nrate = 0;
    519  1.30.2.2   nathanw 		for (i = 0; i < IEEE80211_RATE_SIZE; i++) {
    520  1.30.2.2   nathanw 			if (ic->ic_sup_rates[i])
    521  1.30.2.2   nathanw 				bs->bs_rates[bs->bs_nrate++] =
    522  1.30.2.2   nathanw 				    ic->ic_sup_rates[i];
    523  1.30.2.2   nathanw 		}
    524  1.30.2.2   nathanw 		memcpy(bs->bs_macaddr, ic->ic_myaddr, IEEE80211_ADDR_LEN);
    525  1.30.2.2   nathanw 		memset(bs->bs_bssid, 0, IEEE80211_ADDR_LEN);
    526  1.30.2.2   nathanw 		bs->bs_esslen = 0;
    527  1.30.2.2   nathanw 		ic->ic_flags |= IEEE80211_F_SIBSS;
    528  1.30.2.2   nathanw 		ic->ic_state = IEEE80211_S_SCAN;	/*XXX*/
    529  1.30.2.2   nathanw 		sc->sc_substate = AWI_ST_NONE;
    530  1.30.2.2   nathanw 		ieee80211_new_state(&ic->ic_if, IEEE80211_S_RUN, -1);
    531  1.30.2.2   nathanw 	} else {
    532  1.30.2.2   nathanw 		bs->bs_chan = sc->sc_cur_chan;
    533  1.30.2.2   nathanw 		ieee80211_new_state(&ic->ic_if, IEEE80211_S_SCAN, -1);
    534  1.30.2.1   nathanw 	}
    535  1.30.2.2   nathanw 	return 0;
    536       1.1  sommerfe }
    537       1.1  sommerfe 
    538      1.10      onoe static void
    539  1.30.2.2   nathanw awi_stop(struct ifnet *ifp, int disable)
    540       1.1  sommerfe {
    541       1.1  sommerfe 	struct awi_softc *sc = ifp->if_softc;
    542       1.1  sommerfe 
    543  1.30.2.2   nathanw 	if (!sc->sc_enabled)
    544       1.1  sommerfe 		return;
    545       1.1  sommerfe 
    546  1.30.2.2   nathanw 	DPRINTF(("awi_stop(%d)\n", disable));
    547  1.30.2.2   nathanw 
    548  1.30.2.2   nathanw 	ieee80211_new_state(&sc->sc_ic.ic_if, IEEE80211_S_INIT, -1);
    549  1.30.2.2   nathanw 
    550  1.30.2.2   nathanw 	if (!sc->sc_invalid) {
    551  1.30.2.2   nathanw 		if (sc->sc_cmd_inprog)
    552  1.30.2.2   nathanw 			(void)awi_cmd_wait(sc);
    553  1.30.2.2   nathanw 		(void)awi_cmd(sc, AWI_CMD_KILL_RX, AWI_WAIT);
    554  1.30.2.2   nathanw 		sc->sc_cmd_inprog = AWI_CMD_FLUSH_TX;
    555  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_DATA, 1);
    556  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_MGT, 0);
    557  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_BCAST, 0);
    558  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_PS, 0);
    559  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_CF, 0);
    560  1.30.2.2   nathanw 		(void)awi_cmd(sc, AWI_CMD_FLUSH_TX, AWI_WAIT);
    561  1.30.2.2   nathanw 	}
    562  1.30.2.2   nathanw 	ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
    563  1.30.2.2   nathanw 	ifp->if_timer = 0;
    564  1.30.2.2   nathanw 	sc->sc_tx_timer = sc->sc_rx_timer = 0;
    565  1.30.2.2   nathanw 	if (sc->sc_rxpend != NULL) {
    566  1.30.2.2   nathanw 		m_freem(sc->sc_rxpend);
    567  1.30.2.2   nathanw 		sc->sc_rxpend = NULL;
    568       1.1  sommerfe 	}
    569  1.30.2.2   nathanw 	IFQ_PURGE(&ifp->if_snd);
    570       1.1  sommerfe 
    571  1.30.2.2   nathanw 	if (disable) {
    572  1.30.2.2   nathanw 		if (sc->sc_disable)
    573  1.30.2.2   nathanw 			(*sc->sc_disable)(sc);
    574  1.30.2.2   nathanw 		sc->sc_enabled = 0;
    575  1.30.2.2   nathanw 	}
    576       1.1  sommerfe }
    577       1.1  sommerfe 
    578      1.10      onoe static void
    579  1.30.2.2   nathanw awi_start(struct ifnet *ifp)
    580       1.1  sommerfe {
    581       1.1  sommerfe 	struct awi_softc *sc = ifp->if_softc;
    582  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    583  1.30.2.2   nathanw 	struct mbuf *m, *m0;
    584  1.30.2.2   nathanw 	int len;
    585      1.10      onoe 	u_int32_t txd, frame, ntxd;
    586      1.10      onoe 	u_int8_t rate;
    587  1.30.2.2   nathanw 
    588  1.30.2.2   nathanw 	if (!sc->sc_enabled || sc->sc_invalid)
    589  1.30.2.2   nathanw 		return;
    590       1.1  sommerfe 
    591      1.10      onoe 	for (;;) {
    592      1.10      onoe 		txd = sc->sc_txnext;
    593  1.30.2.2   nathanw 		IF_POLL(&ic->ic_mgtq, m0);
    594      1.10      onoe 		if (m0 != NULL) {
    595      1.10      onoe 			if (awi_next_txd(sc, m0->m_pkthdr.len, &frame, &ntxd)) {
    596      1.10      onoe 				ifp->if_flags |= IFF_OACTIVE;
    597      1.10      onoe 				break;
    598      1.10      onoe 			}
    599  1.30.2.2   nathanw 			IF_DEQUEUE(&ic->ic_mgtq, m0);
    600      1.10      onoe 		} else {
    601  1.30.2.2   nathanw 			if (ic->ic_state != IEEE80211_S_RUN)
    602      1.10      onoe 				break;
    603      1.29   thorpej 			IFQ_POLL(&ifp->if_snd, m0);
    604      1.10      onoe 			if (m0 == NULL)
    605      1.10      onoe 				break;
    606  1.30.2.2   nathanw 			/*
    607  1.30.2.2   nathanw 			 * Need to calculate the real length to determine
    608  1.30.2.2   nathanw 			 * if the transmit buffer has a room for the packet.
    609  1.30.2.2   nathanw 			 */
    610      1.18      onoe 			len = m0->m_pkthdr.len + sizeof(struct ieee80211_frame);
    611  1.30.2.2   nathanw 			if (!(ifp->if_flags & IFF_LINK0) && !sc->sc_adhoc_ap)
    612      1.18      onoe 				len += sizeof(struct llc) -
    613      1.18      onoe 				    sizeof(struct ether_header);
    614  1.30.2.2   nathanw 			if (ic->ic_flags & IEEE80211_F_WEPON)
    615      1.18      onoe 				len += IEEE80211_WEP_IVLEN +
    616      1.18      onoe 				    IEEE80211_WEP_KIDLEN + IEEE80211_WEP_CRCLEN;
    617      1.18      onoe 			if (awi_next_txd(sc, len, &frame, &ntxd)) {
    618      1.10      onoe 				ifp->if_flags |= IFF_OACTIVE;
    619       1.1  sommerfe 				break;
    620      1.10      onoe 			}
    621      1.29   thorpej 			IFQ_DEQUEUE(&ifp->if_snd, m0);
    622  1.30.2.2   nathanw 			ifp->if_opackets++;
    623  1.30.2.2   nathanw #if NBPFILTER > 0
    624  1.30.2.2   nathanw 			if (ifp->if_bpf)
    625  1.30.2.2   nathanw 				bpf_mtap(ifp->if_bpf, m0);
    626  1.30.2.1   nathanw #endif
    627  1.30.2.2   nathanw 			if ((ifp->if_flags & IFF_LINK0) || sc->sc_adhoc_ap)
    628  1.30.2.2   nathanw 				m0 = awi_ether_encap(sc, m0);
    629  1.30.2.2   nathanw 			else
    630  1.30.2.2   nathanw 				m0 = ieee80211_encap(ifp, m0);
    631  1.30.2.2   nathanw 			if ((ic->ic_flags & IEEE80211_F_WEPON) && m0 != NULL)
    632  1.30.2.2   nathanw 				m0 = ieee80211_wep_crypt(ifp, m0, 1);
    633      1.10      onoe 			if (m0 == NULL) {
    634      1.10      onoe 				ifp->if_oerrors++;
    635      1.10      onoe 				continue;
    636      1.10      onoe 			}
    637  1.30.2.2   nathanw #ifdef DIAGNOSTIC
    638  1.30.2.2   nathanw 			if (m0->m_pkthdr.len != len) {
    639  1.30.2.2   nathanw 				printf("%s: length %d should be %d\n",
    640  1.30.2.2   nathanw 				    ifp->if_xname, m0->m_pkthdr.len, len);
    641  1.30.2.2   nathanw 				m_freem(m0);
    642  1.30.2.2   nathanw 				ifp->if_oerrors++;
    643  1.30.2.2   nathanw 				continue;
    644  1.30.2.2   nathanw 			}
    645  1.30.2.2   nathanw #endif
    646       1.1  sommerfe 		}
    647  1.30.2.2   nathanw 
    648  1.30.2.2   nathanw 		if ((ifp->if_flags & IFF_DEBUG) && (ifp->if_flags & IFF_LINK2))
    649  1.30.2.2   nathanw 			ieee80211_dump_pkt(m0->m_data, m0->m_len,
    650  1.30.2.2   nathanw 			    ic->ic_bss.bs_rates[ic->ic_bss.bs_txrate] &
    651  1.30.2.2   nathanw 			    IEEE80211_RATE_VAL, -1);
    652  1.30.2.2   nathanw 
    653  1.30.2.2   nathanw 		for (m = m0, len = 0; m != NULL; m = m->m_next) {
    654      1.10      onoe 			awi_write_bytes(sc, frame + len, mtod(m, u_int8_t *),
    655      1.10      onoe 			    m->m_len);
    656      1.10      onoe 			len += m->m_len;
    657       1.4  sommerfe 		}
    658      1.10      onoe 		m_freem(m0);
    659  1.30.2.2   nathanw 		rate = (ic->ic_bss.bs_rates[ic->ic_bss.bs_txrate] &
    660  1.30.2.2   nathanw 		    IEEE80211_RATE_VAL) * 5;
    661      1.10      onoe 		awi_write_1(sc, ntxd + AWI_TXD_STATE, 0);
    662      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_START, frame);
    663      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_NEXT, ntxd);
    664      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_LENGTH, len);
    665      1.10      onoe 		awi_write_1(sc, txd + AWI_TXD_RATE, rate);
    666      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_NDA, 0);
    667      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_NRA, 0);
    668      1.10      onoe 		awi_write_1(sc, txd + AWI_TXD_STATE, AWI_TXD_ST_OWN);
    669      1.10      onoe 		sc->sc_txnext = ntxd;
    670  1.30.2.2   nathanw 
    671  1.30.2.2   nathanw 		sc->sc_tx_timer = 5;
    672      1.10      onoe 		ifp->if_timer = 1;
    673       1.1  sommerfe 	}
    674       1.1  sommerfe }
    675       1.1  sommerfe 
    676      1.10      onoe static void
    677  1.30.2.2   nathanw awi_watchdog(struct ifnet *ifp)
    678       1.1  sommerfe {
    679  1.30.2.2   nathanw 	struct awi_softc *sc = ifp->if_softc;
    680  1.30.2.2   nathanw 	u_int32_t prevdone;
    681  1.30.2.2   nathanw 	int ocansleep;
    682       1.9  sommerfe 
    683  1.30.2.2   nathanw 	ifp->if_timer = 0;
    684  1.30.2.2   nathanw 	if (!sc->sc_enabled || sc->sc_invalid)
    685  1.30.2.2   nathanw 		return;
    686  1.30.2.2   nathanw 
    687  1.30.2.2   nathanw 	ocansleep = sc->sc_cansleep;
    688  1.30.2.2   nathanw 	sc->sc_cansleep = 0;
    689  1.30.2.2   nathanw 	if (sc->sc_tx_timer) {
    690  1.30.2.2   nathanw 		if (--sc->sc_tx_timer == 0) {
    691  1.30.2.2   nathanw 			printf("%s: device timeout\n", ifp->if_xname);
    692  1.30.2.2   nathanw 			prevdone = sc->sc_txdone;
    693  1.30.2.2   nathanw 			awi_tx_int(sc);
    694  1.30.2.2   nathanw 			if (sc->sc_txdone == prevdone) {
    695  1.30.2.2   nathanw 				ifp->if_oerrors++;
    696  1.30.2.2   nathanw 				awi_init(ifp);
    697  1.30.2.2   nathanw 				goto out;
    698  1.30.2.2   nathanw 			}
    699  1.30.2.2   nathanw 		}
    700  1.30.2.2   nathanw 		ifp->if_timer = 1;
    701      1.10      onoe 	}
    702  1.30.2.2   nathanw 	if (sc->sc_rx_timer) {
    703  1.30.2.2   nathanw 		if (--sc->sc_rx_timer == 0) {
    704  1.30.2.2   nathanw 			if (sc->sc_ic.ic_state == IEEE80211_S_RUN) {
    705  1.30.2.2   nathanw 				ieee80211_new_state(ifp, IEEE80211_S_SCAN, -1);
    706  1.30.2.2   nathanw 				goto out;
    707  1.30.2.2   nathanw 			}
    708  1.30.2.2   nathanw 		} else
    709  1.30.2.2   nathanw 			ifp->if_timer = 1;
    710  1.30.2.2   nathanw 	}
    711  1.30.2.2   nathanw 	/* TODO: rate control */
    712  1.30.2.2   nathanw 	ieee80211_watchdog(ifp);
    713  1.30.2.2   nathanw   out:
    714  1.30.2.2   nathanw 	sc->sc_cansleep = ocansleep;
    715      1.10      onoe }
    716       1.9  sommerfe 
    717  1.30.2.2   nathanw static int
    718  1.30.2.2   nathanw awi_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
    719      1.10      onoe {
    720  1.30.2.2   nathanw 	struct awi_softc *sc = ifp->if_softc;
    721  1.30.2.2   nathanw 	struct ifreq *ifr = (struct ifreq *)data;
    722  1.30.2.2   nathanw 	int s, error;
    723      1.10      onoe 
    724  1.30.2.2   nathanw 	s = splnet();
    725  1.30.2.2   nathanw 	/* serialize ioctl, since we may sleep */
    726  1.30.2.2   nathanw 	if ((error = awi_lock(sc)) != 0)
    727  1.30.2.2   nathanw 		goto cantlock;
    728       1.1  sommerfe 
    729  1.30.2.2   nathanw 	switch (cmd) {
    730  1.30.2.2   nathanw 	case SIOCSIFFLAGS:
    731  1.30.2.2   nathanw 		if (ifp->if_flags & IFF_UP) {
    732  1.30.2.2   nathanw 			if (sc->sc_enabled) {
    733  1.30.2.2   nathanw 				/*
    734  1.30.2.2   nathanw 				 * To avoid rescanning another access point,
    735  1.30.2.2   nathanw 				 * do not call awi_init() here.  Instead,
    736  1.30.2.2   nathanw 				 * only reflect promisc mode settings.
    737  1.30.2.2   nathanw 				 */
    738  1.30.2.2   nathanw 				error = awi_mode_init(sc);
    739  1.30.2.2   nathanw 			} else
    740  1.30.2.2   nathanw 				error = awi_init(ifp);
    741  1.30.2.2   nathanw 		} else if (sc->sc_enabled)
    742  1.30.2.2   nathanw 			awi_stop(ifp, 1);
    743  1.30.2.2   nathanw 		break;
    744  1.30.2.2   nathanw 	case SIOCSIFMEDIA:
    745  1.30.2.2   nathanw 	case SIOCGIFMEDIA:
    746  1.30.2.2   nathanw 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
    747  1.30.2.2   nathanw 		break;
    748  1.30.2.2   nathanw 	case SIOCADDMULTI:
    749  1.30.2.2   nathanw 	case SIOCDELMULTI:
    750  1.30.2.2   nathanw 		error = (cmd == SIOCADDMULTI) ?
    751  1.30.2.2   nathanw 		    ether_addmulti(ifr, &sc->sc_ic.ic_ec) :
    752  1.30.2.2   nathanw 		    ether_delmulti(ifr, &sc->sc_ic.ic_ec);
    753  1.30.2.2   nathanw 		if (error == ENETRESET) {
    754  1.30.2.2   nathanw 			/* do not rescan */
    755  1.30.2.2   nathanw 			if (sc->sc_enabled)
    756  1.30.2.2   nathanw 				error = awi_mode_init(sc);
    757  1.30.2.2   nathanw 			else
    758  1.30.2.2   nathanw 				error = 0;
    759  1.30.2.2   nathanw 		}
    760  1.30.2.2   nathanw 		break;
    761  1.30.2.2   nathanw 	default:
    762  1.30.2.2   nathanw 		error = ieee80211_ioctl(ifp, cmd, data);
    763  1.30.2.2   nathanw 		if (error == ENETRESET) {
    764  1.30.2.2   nathanw 			if (sc->sc_enabled)
    765  1.30.2.2   nathanw 				error = awi_init(ifp);
    766  1.30.2.2   nathanw 			else
    767  1.30.2.2   nathanw 				error = 0;
    768  1.30.2.2   nathanw 		}
    769  1.30.2.2   nathanw 		break;
    770       1.1  sommerfe 	}
    771  1.30.2.2   nathanw 	awi_unlock(sc);
    772  1.30.2.2   nathanw   cantlock:
    773  1.30.2.2   nathanw 	splx(s);
    774  1.30.2.2   nathanw 	return error;
    775      1.10      onoe }
    776       1.9  sommerfe 
    777  1.30.2.2   nathanw /*
    778  1.30.2.2   nathanw  * Called from ifmedia_ioctl via awi_ioctl with lock obtained.
    779  1.30.2.2   nathanw  */
    780  1.30.2.2   nathanw static int
    781  1.30.2.2   nathanw awi_media_change(struct ifnet *ifp)
    782      1.10      onoe {
    783  1.30.2.2   nathanw 	struct awi_softc *sc = ifp->if_softc;
    784  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    785  1.30.2.2   nathanw 	struct ifmedia_entry *ime;
    786  1.30.2.2   nathanw 	int i, rate, error = 0;
    787       1.1  sommerfe 
    788  1.30.2.2   nathanw 	ime = sc->sc_media.ifm_cur;
    789  1.30.2.2   nathanw 	if (IFM_SUBTYPE(ime->ifm_media) == IFM_AUTO) {
    790  1.30.2.2   nathanw 		ic->ic_fixed_rate = -1;
    791  1.30.2.2   nathanw 	} else {
    792  1.30.2.2   nathanw 		rate = awi_media_opt2rate(sc, ime->ifm_media);
    793  1.30.2.2   nathanw 		if (rate == 0)
    794  1.30.2.2   nathanw 			return EINVAL;
    795  1.30.2.2   nathanw 		for (i = 0; i < IEEE80211_RATE_SIZE; i++) {
    796  1.30.2.2   nathanw 			if ((ic->ic_sup_rates[i] & IEEE80211_RATE_VAL) == rate)
    797  1.30.2.2   nathanw 				break;
    798  1.30.2.2   nathanw 		}
    799  1.30.2.2   nathanw 		if (i == IEEE80211_RATE_SIZE)
    800  1.30.2.2   nathanw 			return EINVAL;
    801  1.30.2.2   nathanw 		ic->ic_fixed_rate = i;
    802      1.10      onoe 	}
    803  1.30.2.2   nathanw 
    804  1.30.2.2   nathanw 	/*
    805  1.30.2.2   nathanw 	 *  ADHOC,-FLAG0	ADHOC,  !no_bssid, !adhoc_ap	IBSS
    806  1.30.2.2   nathanw 	 *  ADHOC, FLAG0	ADHOC    no_bssid, !adhoc_ap	WaveLAN adhoc
    807  1.30.2.2   nathanw 	 * -ADHOC,-FLAG0	~ADHOC, !no_bssid, !adhoc_ap	Infra
    808  1.30.2.2   nathanw 	 * -ADHOC, FLAG0	ADHOC,  !no_bssid,  adhoc_ap	Melco old AP
    809  1.30.2.2   nathanw 	 *						also LINK0
    810  1.30.2.2   nathanw 	 */
    811  1.30.2.2   nathanw 	if (ime->ifm_media & IFM_IEEE80211_ADHOC) {
    812  1.30.2.2   nathanw 		if ((ic->ic_flags & IEEE80211_F_ADHOC) == 0) {
    813  1.30.2.2   nathanw 			ic->ic_flags |= IEEE80211_F_ADHOC;
    814  1.30.2.2   nathanw 			error = ENETRESET;
    815  1.30.2.2   nathanw 		}
    816  1.30.2.2   nathanw 		ic->ic_flags |= IEEE80211_F_IBSSON;
    817  1.30.2.2   nathanw 		if (sc->sc_mib_phy.IEEE_PHY_Type != AWI_PHY_TYPE_FH &&
    818  1.30.2.2   nathanw 		    (ime->ifm_media & IFM_FLAG0)) {
    819  1.30.2.2   nathanw 			if (sc->sc_no_bssid == 0) {
    820  1.30.2.2   nathanw 				sc->sc_no_bssid = 1;
    821  1.30.2.2   nathanw 				error = ENETRESET;
    822  1.30.2.2   nathanw 			}
    823  1.30.2.2   nathanw 		} else {
    824  1.30.2.2   nathanw 			if (sc->sc_no_bssid) {
    825  1.30.2.2   nathanw 				sc->sc_no_bssid = 0;
    826  1.30.2.2   nathanw 				error = ENETRESET;
    827  1.30.2.2   nathanw 			}
    828  1.30.2.2   nathanw 		}
    829  1.30.2.2   nathanw 		if (sc->sc_adhoc_ap) {
    830  1.30.2.2   nathanw 			sc->sc_adhoc_ap = 0;
    831  1.30.2.2   nathanw 			error = ENETRESET;
    832      1.10      onoe 		}
    833      1.10      onoe 	} else {
    834  1.30.2.2   nathanw 		ic->ic_flags &= ~IEEE80211_F_IBSSON;
    835  1.30.2.2   nathanw 		if (sc->sc_no_bssid) {
    836  1.30.2.2   nathanw 			sc->sc_no_bssid = 0;
    837  1.30.2.2   nathanw 			error = ENETRESET;
    838  1.30.2.2   nathanw 		}
    839  1.30.2.2   nathanw 		if (ime->ifm_media & IFM_FLAG0) {
    840  1.30.2.2   nathanw 			if ((ic->ic_flags & IEEE80211_F_ADHOC) == 0) {
    841  1.30.2.2   nathanw 				ic->ic_flags |= IEEE80211_F_ADHOC;
    842  1.30.2.2   nathanw 				error = ENETRESET;
    843  1.30.2.2   nathanw 			}
    844  1.30.2.2   nathanw 			if (!sc->sc_adhoc_ap) {
    845  1.30.2.2   nathanw 				sc->sc_adhoc_ap = 1;
    846  1.30.2.2   nathanw 				error = ENETRESET;
    847  1.30.2.2   nathanw 			}
    848  1.30.2.2   nathanw 		} else {
    849  1.30.2.2   nathanw 			if (ic->ic_flags & IEEE80211_F_ADHOC) {
    850  1.30.2.2   nathanw 				ic->ic_flags &= ~IEEE80211_F_ADHOC;
    851  1.30.2.2   nathanw 				error = ENETRESET;
    852  1.30.2.2   nathanw 			}
    853  1.30.2.2   nathanw 			if (sc->sc_adhoc_ap) {
    854  1.30.2.2   nathanw 				sc->sc_adhoc_ap = 0;
    855  1.30.2.2   nathanw 				error = ENETRESET;
    856      1.20      onoe 			}
    857      1.20      onoe 		}
    858      1.20      onoe 	}
    859  1.30.2.2   nathanw 	if (error == ENETRESET) {
    860  1.30.2.2   nathanw 		if (sc->sc_enabled)
    861  1.30.2.2   nathanw 			error = awi_init(ifp);
    862  1.30.2.2   nathanw 		else
    863  1.30.2.2   nathanw 			error = 0;
    864  1.30.2.2   nathanw 	}
    865  1.30.2.2   nathanw 	return error;
    866       1.1  sommerfe }
    867       1.1  sommerfe 
    868      1.10      onoe static void
    869  1.30.2.2   nathanw awi_media_status(struct ifnet *ifp, struct ifmediareq *imr)
    870       1.1  sommerfe {
    871  1.30.2.2   nathanw 	struct awi_softc *sc = ifp->if_softc;
    872  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    873  1.30.2.2   nathanw 	int rate;
    874       1.1  sommerfe 
    875  1.30.2.2   nathanw 	imr->ifm_status = IFM_AVALID;
    876  1.30.2.2   nathanw 	if (ic->ic_state == IEEE80211_S_RUN)
    877  1.30.2.2   nathanw 		imr->ifm_status |= IFM_ACTIVE;
    878  1.30.2.2   nathanw 	imr->ifm_active = IFM_IEEE80211;
    879  1.30.2.2   nathanw 	if (ic->ic_state == IEEE80211_S_RUN)
    880  1.30.2.2   nathanw 		rate = ic->ic_bss.bs_rates[ic->ic_bss.bs_txrate] &
    881  1.30.2.2   nathanw 		    IEEE80211_RATE_VAL;
    882  1.30.2.2   nathanw 	else {
    883  1.30.2.2   nathanw 		if (ic->ic_fixed_rate == -1)
    884  1.30.2.2   nathanw 			rate = 0;
    885  1.30.2.2   nathanw 		else
    886  1.30.2.2   nathanw 			rate = ic->ic_sup_rates[ic->ic_fixed_rate] &
    887  1.30.2.2   nathanw 			    IEEE80211_RATE_VAL;
    888      1.10      onoe 	}
    889  1.30.2.2   nathanw 	imr->ifm_active |= awi_media_rate2opt(sc, rate);
    890  1.30.2.2   nathanw 	if (ic->ic_flags & IEEE80211_F_ADHOC) {
    891  1.30.2.2   nathanw 		if (sc->sc_adhoc_ap)
    892  1.30.2.2   nathanw 			imr->ifm_active |= IFM_FLAG0;
    893  1.30.2.2   nathanw 		else {
    894  1.30.2.2   nathanw 			imr->ifm_active |= IFM_IEEE80211_ADHOC;
    895  1.30.2.2   nathanw 			if (sc->sc_no_bssid)
    896  1.30.2.2   nathanw 				imr->ifm_active |= IFM_FLAG0;
    897      1.18      onoe 		}
    898      1.18      onoe 	}
    899  1.30.2.2   nathanw }
    900      1.10      onoe 
    901  1.30.2.2   nathanw static int
    902  1.30.2.2   nathanw awi_mode_init(struct awi_softc *sc)
    903  1.30.2.2   nathanw {
    904  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    905  1.30.2.2   nathanw 	int n, error;
    906  1.30.2.2   nathanw 	struct ether_multi *enm;
    907  1.30.2.2   nathanw 	struct ether_multistep step;
    908  1.30.2.2   nathanw 
    909  1.30.2.2   nathanw 	/* reinitialize muticast filter */
    910  1.30.2.2   nathanw 	n = 0;
    911  1.30.2.2   nathanw 	sc->sc_mib_local.Accept_All_Multicast_Dis = 0;
    912  1.30.2.2   nathanw 	if (ifp->if_flags & IFF_PROMISC) {
    913  1.30.2.2   nathanw 		sc->sc_mib_mac.aPromiscuous_Enable = 1;
    914  1.30.2.2   nathanw 		goto set_mib;
    915      1.10      onoe 	}
    916  1.30.2.2   nathanw 	sc->sc_mib_mac.aPromiscuous_Enable = 0;
    917  1.30.2.2   nathanw 	ETHER_FIRST_MULTI(step, &sc->sc_ic.ic_ec, enm);
    918  1.30.2.2   nathanw 	while (enm != NULL) {
    919  1.30.2.2   nathanw 		if (n == AWI_GROUP_ADDR_SIZE ||
    920  1.30.2.2   nathanw 		    memcmp(enm->enm_addrlo, enm->enm_addrhi, IEEE80211_ADDR_LEN)
    921  1.30.2.2   nathanw 		    != 0)
    922  1.30.2.2   nathanw 			goto set_mib;
    923  1.30.2.2   nathanw 		memcpy(sc->sc_mib_addr.aGroup_Addresses[n], enm->enm_addrlo,
    924  1.30.2.2   nathanw 		    IEEE80211_ADDR_LEN);
    925  1.30.2.2   nathanw 		n++;
    926  1.30.2.2   nathanw 		ETHER_NEXT_MULTI(step, enm);
    927  1.30.2.2   nathanw 	}
    928  1.30.2.2   nathanw 	for (; n < AWI_GROUP_ADDR_SIZE; n++)
    929  1.30.2.2   nathanw 		memset(sc->sc_mib_addr.aGroup_Addresses[n], 0, IEEE80211_ADDR_LEN);
    930  1.30.2.2   nathanw 	sc->sc_mib_local.Accept_All_Multicast_Dis = 1;
    931  1.30.2.2   nathanw 
    932  1.30.2.2   nathanw   set_mib:
    933  1.30.2.2   nathanw 	if (sc->sc_mib_local.Accept_All_Multicast_Dis)
    934  1.30.2.2   nathanw 		ifp->if_flags &= ~IFF_ALLMULTI;
    935  1.30.2.2   nathanw 	else
    936  1.30.2.2   nathanw 		ifp->if_flags |= IFF_ALLMULTI;
    937  1.30.2.2   nathanw 	sc->sc_mib_mgt.Wep_Required =
    938  1.30.2.2   nathanw 	    (sc->sc_ic.ic_flags & IEEE80211_F_WEPON) ? 1 : 0;
    939  1.30.2.2   nathanw 
    940  1.30.2.2   nathanw 	if ((error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_LOCAL, AWI_WAIT)) ||
    941  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_ADDR, AWI_WAIT)) ||
    942  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MAC, AWI_WAIT)) ||
    943  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MGT, AWI_WAIT)) ||
    944  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_PHY, AWI_WAIT))) {
    945  1.30.2.2   nathanw 		DPRINTF(("awi_mode_init: MIB set failed: %d\n", error));
    946  1.30.2.2   nathanw 		return error;
    947  1.30.2.2   nathanw 	}
    948  1.30.2.2   nathanw 	return 0;
    949  1.30.2.2   nathanw }
    950  1.30.2.2   nathanw 
    951  1.30.2.2   nathanw /* XXX should be moved to if_ieee80211subr.c ? */
    952  1.30.2.2   nathanw static int
    953  1.30.2.2   nathanw awi_media_rate2opt(struct awi_softc *sc, int rate)
    954  1.30.2.2   nathanw {
    955  1.30.2.2   nathanw 	int mword;
    956  1.30.2.2   nathanw 
    957  1.30.2.2   nathanw 	mword = 0;
    958  1.30.2.2   nathanw 	switch (rate & IEEE80211_RATE_VAL) {
    959  1.30.2.2   nathanw 	case 2:
    960  1.30.2.2   nathanw 		if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
    961  1.30.2.2   nathanw 			mword = IFM_IEEE80211_FH1;
    962  1.30.2.2   nathanw 		else
    963  1.30.2.2   nathanw 			mword = IFM_IEEE80211_DS1;
    964      1.10      onoe 		break;
    965  1.30.2.2   nathanw 	case 4:
    966  1.30.2.2   nathanw 		if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
    967  1.30.2.2   nathanw 			mword = IFM_IEEE80211_FH2;
    968  1.30.2.2   nathanw 		else
    969  1.30.2.2   nathanw 			mword = IFM_IEEE80211_DS2;
    970      1.10      onoe 		break;
    971  1.30.2.2   nathanw 	case 11:
    972  1.30.2.2   nathanw 		if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_DS)
    973  1.30.2.2   nathanw 			mword = IFM_IEEE80211_DS5;
    974  1.30.2.2   nathanw 		break;
    975  1.30.2.2   nathanw 	case 22:
    976  1.30.2.2   nathanw 		if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_DS)
    977  1.30.2.2   nathanw 			mword = IFM_IEEE80211_DS11;
    978  1.30.2.2   nathanw 		break;
    979  1.30.2.2   nathanw 	}
    980  1.30.2.2   nathanw 	return mword;
    981  1.30.2.2   nathanw }
    982  1.30.2.2   nathanw 
    983  1.30.2.2   nathanw static int
    984  1.30.2.2   nathanw awi_media_opt2rate(struct awi_softc *sc, int opt)
    985  1.30.2.2   nathanw {
    986  1.30.2.2   nathanw 	int rate;
    987  1.30.2.2   nathanw 
    988  1.30.2.2   nathanw 	rate = 0;
    989  1.30.2.2   nathanw 	switch (IFM_SUBTYPE(opt)) {
    990  1.30.2.2   nathanw 	case IFM_IEEE80211_FH1:
    991  1.30.2.2   nathanw 	case IFM_IEEE80211_FH2:
    992  1.30.2.2   nathanw 		if (sc->sc_mib_phy.IEEE_PHY_Type != AWI_PHY_TYPE_FH)
    993  1.30.2.2   nathanw 			return 0;
    994  1.30.2.2   nathanw 		break;
    995  1.30.2.2   nathanw 	case IFM_IEEE80211_DS1:
    996  1.30.2.2   nathanw 	case IFM_IEEE80211_DS2:
    997  1.30.2.2   nathanw 	case IFM_IEEE80211_DS5:
    998  1.30.2.2   nathanw 	case IFM_IEEE80211_DS11:
    999  1.30.2.2   nathanw 		if (sc->sc_mib_phy.IEEE_PHY_Type != AWI_PHY_TYPE_DS)
   1000  1.30.2.2   nathanw 			return 0;
   1001  1.30.2.2   nathanw 		break;
   1002  1.30.2.2   nathanw 	}
   1003  1.30.2.2   nathanw 
   1004  1.30.2.2   nathanw 	switch (IFM_SUBTYPE(opt)) {
   1005  1.30.2.2   nathanw 	case IFM_IEEE80211_FH1:
   1006  1.30.2.2   nathanw 	case IFM_IEEE80211_DS1:
   1007  1.30.2.2   nathanw 		rate = 2;
   1008  1.30.2.2   nathanw 		break;
   1009  1.30.2.2   nathanw 	case IFM_IEEE80211_FH2:
   1010  1.30.2.2   nathanw 	case IFM_IEEE80211_DS2:
   1011  1.30.2.2   nathanw 		rate = 4;
   1012  1.30.2.2   nathanw 		break;
   1013  1.30.2.2   nathanw 	case IFM_IEEE80211_DS5:
   1014  1.30.2.2   nathanw 		rate = 11;
   1015  1.30.2.2   nathanw 		break;
   1016  1.30.2.2   nathanw 	case IFM_IEEE80211_DS11:
   1017  1.30.2.2   nathanw 		rate = 22;
   1018      1.10      onoe 		break;
   1019      1.10      onoe 	}
   1020  1.30.2.2   nathanw 	return rate;
   1021       1.1  sommerfe }
   1022       1.9  sommerfe 
   1023      1.10      onoe static void
   1024  1.30.2.2   nathanw awi_rx_int(struct awi_softc *sc)
   1025       1.9  sommerfe {
   1026  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1027      1.10      onoe 	u_int8_t state, rate, rssi;
   1028      1.10      onoe 	u_int16_t len;
   1029  1.30.2.2   nathanw 	u_int32_t frame, next, timoff, rxoff;
   1030      1.10      onoe 	struct mbuf *m;
   1031      1.10      onoe 
   1032      1.10      onoe 	rxoff = sc->sc_rxdoff;
   1033      1.10      onoe 	for (;;) {
   1034      1.10      onoe 		state = awi_read_1(sc, rxoff + AWI_RXD_HOST_DESC_STATE);
   1035      1.10      onoe 		if (state & AWI_RXD_ST_OWN)
   1036      1.10      onoe 			break;
   1037      1.10      onoe 		if (!(state & AWI_RXD_ST_CONSUMED)) {
   1038  1.30.2.2   nathanw 			if (state & AWI_RXD_ST_RXERROR) {
   1039  1.30.2.2   nathanw 				ifp->if_ierrors++;
   1040  1.30.2.2   nathanw 				goto rx_next;
   1041  1.30.2.2   nathanw 			}
   1042  1.30.2.2   nathanw 			len    = awi_read_2(sc, rxoff + AWI_RXD_LEN);
   1043  1.30.2.2   nathanw 			rate   = awi_read_1(sc, rxoff + AWI_RXD_RATE);
   1044  1.30.2.2   nathanw 			rssi   = awi_read_1(sc, rxoff + AWI_RXD_RSSI);
   1045  1.30.2.2   nathanw 			frame  = awi_read_4(sc, rxoff + AWI_RXD_START_FRAME) &
   1046  1.30.2.2   nathanw 			    0x7fff;
   1047  1.30.2.2   nathanw 			timoff = awi_read_4(sc, rxoff + AWI_RXD_LOCALTIME);
   1048  1.30.2.2   nathanw 			m = awi_devget(sc, frame, len);
   1049  1.30.2.2   nathanw 			if (m == NULL) {
   1050  1.30.2.2   nathanw 				ifp->if_ierrors++;
   1051  1.30.2.2   nathanw 				goto rx_next;
   1052      1.10      onoe 			}
   1053  1.30.2.2   nathanw 			if (state & AWI_RXD_ST_LF) {
   1054  1.30.2.2   nathanw 				/* TODO check my bss */
   1055  1.30.2.2   nathanw 				if (!(sc->sc_ic.ic_flags & IEEE80211_F_SIBSS) &&
   1056  1.30.2.2   nathanw 				    sc->sc_ic.ic_state == IEEE80211_S_RUN) {
   1057  1.30.2.2   nathanw 					sc->sc_rx_timer = 10;
   1058  1.30.2.2   nathanw 					ifp->if_timer = 1;
   1059  1.30.2.2   nathanw 				}
   1060  1.30.2.2   nathanw 				if ((ifp->if_flags & IFF_DEBUG) &&
   1061  1.30.2.2   nathanw 				    (ifp->if_flags & IFF_LINK2))
   1062  1.30.2.2   nathanw 					ieee80211_dump_pkt(m->m_data, m->m_len,
   1063  1.30.2.2   nathanw 					    rate / 5, rssi);
   1064  1.30.2.2   nathanw 				if ((ifp->if_flags & IFF_LINK0) ||
   1065  1.30.2.2   nathanw 				    sc->sc_adhoc_ap)
   1066  1.30.2.2   nathanw 					m = awi_ether_modcap(sc, m);
   1067  1.30.2.2   nathanw 				if (m == NULL)
   1068  1.30.2.2   nathanw 					ifp->if_ierrors++;
   1069  1.30.2.2   nathanw 				else
   1070  1.30.2.2   nathanw 					ieee80211_input(ifp, m, rssi, timoff);
   1071  1.30.2.2   nathanw 			} else
   1072  1.30.2.2   nathanw 				sc->sc_rxpend = m;
   1073  1.30.2.2   nathanw   rx_next:
   1074      1.10      onoe 			state |= AWI_RXD_ST_CONSUMED;
   1075      1.10      onoe 			awi_write_1(sc, rxoff + AWI_RXD_HOST_DESC_STATE, state);
   1076      1.10      onoe 		}
   1077  1.30.2.2   nathanw 		next = awi_read_4(sc, rxoff + AWI_RXD_NEXT);
   1078      1.10      onoe 		if (next & AWI_RXD_NEXT_LAST)
   1079      1.10      onoe 			break;
   1080      1.10      onoe 		/* make sure the next pointer is correct */
   1081      1.10      onoe 		if (next != awi_read_4(sc, rxoff + AWI_RXD_NEXT))
   1082      1.10      onoe 			break;
   1083  1.30.2.2   nathanw 		state |= AWI_RXD_ST_OWN;
   1084  1.30.2.2   nathanw 		awi_write_1(sc, rxoff + AWI_RXD_HOST_DESC_STATE, state);
   1085  1.30.2.2   nathanw 		rxoff = next & 0x7fff;
   1086  1.30.2.2   nathanw 	}
   1087  1.30.2.2   nathanw 	sc->sc_rxdoff = rxoff;
   1088  1.30.2.2   nathanw }
   1089  1.30.2.2   nathanw 
   1090  1.30.2.2   nathanw static void
   1091  1.30.2.2   nathanw awi_tx_int(struct awi_softc *sc)
   1092  1.30.2.2   nathanw {
   1093  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1094  1.30.2.2   nathanw 	u_int8_t flags;
   1095  1.30.2.2   nathanw 
   1096  1.30.2.2   nathanw 	while (sc->sc_txdone != sc->sc_txnext) {
   1097  1.30.2.2   nathanw 		flags = awi_read_1(sc, sc->sc_txdone + AWI_TXD_STATE);
   1098  1.30.2.2   nathanw 		if ((flags & AWI_TXD_ST_OWN) || !(flags & AWI_TXD_ST_DONE))
   1099  1.30.2.2   nathanw 			break;
   1100  1.30.2.2   nathanw 		if (flags & AWI_TXD_ST_ERROR)
   1101  1.30.2.2   nathanw 			ifp->if_oerrors++;
   1102  1.30.2.2   nathanw 		sc->sc_txdone = awi_read_4(sc, sc->sc_txdone + AWI_TXD_NEXT) &
   1103  1.30.2.2   nathanw 		    0x7fff;
   1104      1.10      onoe 	}
   1105  1.30.2.2   nathanw 	DPRINTF2(("awi_txint: txdone %d txnext %d txbase %d txend %d\n",
   1106  1.30.2.2   nathanw 	    sc->sc_txdone, sc->sc_txnext, sc->sc_txbase, sc->sc_txend));
   1107  1.30.2.2   nathanw 	sc->sc_tx_timer = 0;
   1108  1.30.2.2   nathanw 	ifp->if_flags &= ~IFF_OACTIVE;
   1109  1.30.2.2   nathanw 	awi_start(ifp);
   1110       1.9  sommerfe }
   1111       1.9  sommerfe 
   1112      1.18      onoe static struct mbuf *
   1113  1.30.2.2   nathanw awi_devget(struct awi_softc *sc, u_int32_t off, u_int16_t len)
   1114       1.1  sommerfe {
   1115  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1116      1.10      onoe 	struct mbuf *m;
   1117      1.18      onoe 	struct mbuf *top, **mp;
   1118      1.10      onoe 	u_int tlen;
   1119      1.10      onoe 
   1120      1.10      onoe 	top = sc->sc_rxpend;
   1121      1.18      onoe 	mp = &top;
   1122      1.10      onoe 	if (top != NULL) {
   1123      1.10      onoe 		sc->sc_rxpend = NULL;
   1124      1.10      onoe 		top->m_pkthdr.len += len;
   1125      1.20      onoe 		m = top;
   1126      1.18      onoe 		while (*mp != NULL) {
   1127      1.18      onoe 			m = *mp;
   1128      1.10      onoe 			mp = &m->m_next;
   1129      1.18      onoe 		}
   1130      1.10      onoe 		if (m->m_flags & M_EXT)
   1131      1.10      onoe 			tlen = m->m_ext.ext_size;
   1132      1.10      onoe 		else if (m->m_flags & M_PKTHDR)
   1133      1.10      onoe 			tlen = MHLEN;
   1134      1.10      onoe 		else
   1135      1.10      onoe 			tlen = MLEN;
   1136      1.10      onoe 		tlen -= m->m_len;
   1137      1.10      onoe 		if (tlen > len)
   1138      1.10      onoe 			tlen = len;
   1139      1.10      onoe 		awi_read_bytes(sc, off, mtod(m, u_int8_t *) + m->m_len, tlen);
   1140      1.10      onoe 		off += tlen;
   1141      1.10      onoe 		len -= tlen;
   1142      1.10      onoe 	}
   1143      1.10      onoe 
   1144      1.10      onoe 	while (len > 0) {
   1145      1.10      onoe 		if (top == NULL) {
   1146      1.10      onoe 			MGETHDR(m, M_DONTWAIT, MT_DATA);
   1147      1.10      onoe 			if (m == NULL)
   1148      1.10      onoe 				return NULL;
   1149  1.30.2.2   nathanw 			m->m_pkthdr.rcvif = ifp;
   1150      1.10      onoe 			m->m_pkthdr.len = len;
   1151      1.10      onoe 			m->m_len = MHLEN;
   1152  1.30.2.2   nathanw 			m->m_flags |= M_HASFCS;
   1153      1.10      onoe 		} else {
   1154      1.10      onoe 			MGET(m, M_DONTWAIT, MT_DATA);
   1155      1.10      onoe 			if (m == NULL) {
   1156      1.10      onoe 				m_freem(top);
   1157      1.10      onoe 				return NULL;
   1158      1.10      onoe 			}
   1159      1.10      onoe 			m->m_len = MLEN;
   1160      1.10      onoe 		}
   1161      1.10      onoe 		if (len >= MINCLSIZE) {
   1162      1.10      onoe 			MCLGET(m, M_DONTWAIT);
   1163      1.10      onoe 			if (m->m_flags & M_EXT)
   1164      1.10      onoe 				m->m_len = m->m_ext.ext_size;
   1165      1.10      onoe 		}
   1166      1.20      onoe 		if (top == NULL) {
   1167      1.20      onoe 			int hdrlen = sizeof(struct ieee80211_frame) +
   1168  1.30.2.2   nathanw 			    sizeof(struct llc);
   1169      1.20      onoe 			caddr_t newdata = (caddr_t)
   1170      1.20      onoe 			    ALIGN(m->m_data + hdrlen) - hdrlen;
   1171      1.20      onoe 			m->m_len -= newdata - m->m_data;
   1172      1.20      onoe 			m->m_data = newdata;
   1173      1.20      onoe 		}
   1174      1.10      onoe 		if (m->m_len > len)
   1175      1.10      onoe 			m->m_len = len;
   1176      1.10      onoe 		awi_read_bytes(sc, off, mtod(m, u_int8_t *), m->m_len);
   1177      1.10      onoe 		off += m->m_len;
   1178      1.10      onoe 		len -= m->m_len;
   1179      1.10      onoe 		*mp = m;
   1180      1.10      onoe 		mp = &m->m_next;
   1181      1.10      onoe 	}
   1182      1.10      onoe 	return top;
   1183       1.1  sommerfe }
   1184       1.1  sommerfe 
   1185      1.10      onoe /*
   1186      1.10      onoe  * Initialize hardware and start firmware to accept commands.
   1187      1.10      onoe  * Called everytime after power on firmware.
   1188      1.10      onoe  */
   1189      1.10      onoe 
   1190      1.10      onoe static int
   1191  1.30.2.2   nathanw awi_hw_init(struct awi_softc *sc)
   1192       1.1  sommerfe {
   1193      1.10      onoe 	u_int8_t status;
   1194      1.10      onoe 	u_int16_t intmask;
   1195      1.10      onoe 	int i, error;
   1196       1.1  sommerfe 
   1197      1.15      onoe 	sc->sc_enab_intr = 0;
   1198      1.20      onoe 	sc->sc_invalid = 0;	/* XXX: really? */
   1199      1.10      onoe 	awi_drvstate(sc, AWI_DRV_RESET);
   1200       1.1  sommerfe 
   1201      1.10      onoe 	/* reset firmware */
   1202      1.10      onoe 	am79c930_gcr_setbits(&sc->sc_chip, AM79C930_GCR_CORESET);
   1203      1.10      onoe 	DELAY(100);
   1204      1.10      onoe 	awi_write_1(sc, AWI_SELFTEST, 0);
   1205      1.20      onoe 	awi_write_1(sc, AWI_CMD, 0);
   1206      1.20      onoe 	awi_write_1(sc, AWI_BANNER, 0);
   1207      1.10      onoe 	am79c930_gcr_clearbits(&sc->sc_chip, AM79C930_GCR_CORESET);
   1208      1.10      onoe 	DELAY(100);
   1209      1.10      onoe 
   1210      1.10      onoe 	/* wait for selftest completion */
   1211      1.10      onoe 	for (i = 0; ; i++) {
   1212      1.10      onoe 		if (i >= AWI_SELFTEST_TIMEOUT*hz/1000) {
   1213      1.10      onoe 			printf("%s: failed to complete selftest (timeout)\n",
   1214      1.10      onoe 			    sc->sc_dev.dv_xname);
   1215      1.10      onoe 			return ENXIO;
   1216      1.10      onoe 		}
   1217      1.10      onoe 		status = awi_read_1(sc, AWI_SELFTEST);
   1218      1.10      onoe 		if ((status & 0xf0) == 0xf0)
   1219      1.10      onoe 			break;
   1220      1.10      onoe 		if (sc->sc_cansleep) {
   1221      1.10      onoe 			sc->sc_sleep_cnt++;
   1222      1.10      onoe 			(void)tsleep(sc, PWAIT, "awitst", 1);
   1223      1.10      onoe 			sc->sc_sleep_cnt--;
   1224      1.10      onoe 		} else {
   1225      1.10      onoe 			DELAY(1000*1000/hz);
   1226      1.10      onoe 		}
   1227      1.10      onoe 	}
   1228      1.10      onoe 	if (status != AWI_SELFTEST_PASSED) {
   1229      1.10      onoe 		printf("%s: failed to complete selftest (code %x)\n",
   1230      1.10      onoe 		    sc->sc_dev.dv_xname, status);
   1231      1.10      onoe 		return ENXIO;
   1232      1.10      onoe 	}
   1233       1.1  sommerfe 
   1234      1.10      onoe 	/* check banner to confirm firmware write it */
   1235      1.18      onoe 	awi_read_bytes(sc, AWI_BANNER, sc->sc_banner, AWI_BANNER_LEN);
   1236      1.18      onoe 	if (memcmp(sc->sc_banner, "PCnetMobile:", 12) != 0) {
   1237      1.10      onoe 		printf("%s: failed to complete selftest (bad banner)\n",
   1238      1.10      onoe 		    sc->sc_dev.dv_xname);
   1239      1.10      onoe 		for (i = 0; i < AWI_BANNER_LEN; i++)
   1240      1.18      onoe 			printf("%s%02x", i ? ":" : "\t", sc->sc_banner[i]);
   1241      1.10      onoe 		printf("\n");
   1242      1.10      onoe 		return ENXIO;
   1243      1.10      onoe 	}
   1244       1.1  sommerfe 
   1245      1.10      onoe 	/* initializing interrupt */
   1246      1.15      onoe 	sc->sc_enab_intr = 1;
   1247      1.10      onoe 	error = awi_intr_lock(sc);
   1248      1.10      onoe 	if (error)
   1249      1.10      onoe 		return error;
   1250      1.10      onoe 	intmask = AWI_INT_GROGGY | AWI_INT_SCAN_CMPLT |
   1251      1.10      onoe 	    AWI_INT_TX | AWI_INT_RX | AWI_INT_CMD;
   1252      1.10      onoe 	awi_write_1(sc, AWI_INTMASK, ~intmask & 0xff);
   1253      1.10      onoe 	awi_write_1(sc, AWI_INTMASK2, 0);
   1254      1.10      onoe 	awi_write_1(sc, AWI_INTSTAT, 0);
   1255      1.10      onoe 	awi_write_1(sc, AWI_INTSTAT2, 0);
   1256      1.10      onoe 	awi_intr_unlock(sc);
   1257      1.10      onoe 	am79c930_gcr_setbits(&sc->sc_chip, AM79C930_GCR_ENECINT);
   1258       1.1  sommerfe 
   1259  1.30.2.1   nathanw 	/* issuing interface test command */
   1260  1.30.2.2   nathanw 	error = awi_cmd(sc, AWI_CMD_NOP, AWI_WAIT);
   1261      1.10      onoe 	if (error) {
   1262      1.10      onoe 		printf("%s: failed to complete selftest", sc->sc_dev.dv_xname);
   1263      1.20      onoe 		if (error == ENXIO)
   1264      1.20      onoe 			printf(" (no hardware)\n");
   1265      1.20      onoe 		else if (error != EWOULDBLOCK)
   1266      1.10      onoe 			printf(" (error %d)\n", error);
   1267      1.10      onoe 		else if (sc->sc_cansleep)
   1268      1.10      onoe 			printf(" (lost interrupt)\n");
   1269      1.10      onoe 		else
   1270      1.10      onoe 			printf(" (command timeout)\n");
   1271      1.10      onoe 	}
   1272      1.10      onoe 	return error;
   1273      1.10      onoe }
   1274       1.1  sommerfe 
   1275      1.10      onoe /*
   1276      1.10      onoe  * Extract the factory default MIB value from firmware and assign the driver
   1277      1.10      onoe  * default value.
   1278      1.10      onoe  * Called once at attaching the interface.
   1279  1.30.2.2   nathanw  */
   1280       1.1  sommerfe 
   1281  1.30.2.2   nathanw static int
   1282  1.30.2.2   nathanw awi_init_mibs(struct awi_softc *sc)
   1283       1.1  sommerfe {
   1284  1.30.2.2   nathanw 	int i, error;
   1285  1.30.2.2   nathanw 	struct awi_chanset *cs;
   1286       1.1  sommerfe 
   1287  1.30.2.2   nathanw 	if ((error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_LOCAL, AWI_WAIT)) ||
   1288  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_ADDR, AWI_WAIT)) ||
   1289  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_MAC, AWI_WAIT)) ||
   1290  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_MGT, AWI_WAIT)) ||
   1291  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_PHY, AWI_WAIT))) {
   1292  1.30.2.2   nathanw 		printf("%s: failed to get default mib value (error %d)\n",
   1293  1.30.2.2   nathanw 		    sc->sc_dev.dv_xname, error);
   1294  1.30.2.2   nathanw 		return error;
   1295  1.30.2.2   nathanw 	}
   1296      1.10      onoe 
   1297  1.30.2.2   nathanw 	memset(&sc->sc_ic.ic_chan_avail, 0, sizeof(sc->sc_ic.ic_chan_avail));
   1298  1.30.2.2   nathanw 	for (cs = awi_chanset; ; cs++) {
   1299  1.30.2.2   nathanw 		if (cs->cs_type == 0) {
   1300  1.30.2.2   nathanw 			printf("%s: failed to set available channel\n",
   1301  1.30.2.2   nathanw 			    sc->sc_dev.dv_xname);
   1302  1.30.2.2   nathanw 			return ENXIO;
   1303  1.30.2.2   nathanw 		}
   1304  1.30.2.2   nathanw 		if (cs->cs_type == sc->sc_mib_phy.IEEE_PHY_Type &&
   1305  1.30.2.2   nathanw 		    cs->cs_region == sc->sc_mib_phy.aCurrent_Reg_Domain)
   1306  1.30.2.2   nathanw 			break;
   1307  1.30.2.2   nathanw 	}
   1308  1.30.2.2   nathanw 	if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
   1309  1.30.2.2   nathanw 		for (i = cs->cs_min; i <= cs->cs_max; i++) {
   1310  1.30.2.2   nathanw 			setbit(sc->sc_ic.ic_chan_avail,
   1311  1.30.2.2   nathanw 			    IEEE80211_FH_CHAN(i % 3 + 1, i));
   1312  1.30.2.2   nathanw 			/*
   1313  1.30.2.2   nathanw 			 * According to the IEEE 802.11 specification,
   1314  1.30.2.2   nathanw 			 * hop pattern parameter for FH phy should be
   1315  1.30.2.2   nathanw 			 * incremented by 3 for given hop chanset, i.e.,
   1316  1.30.2.2   nathanw 			 * the chanset parameter is calculated for given
   1317  1.30.2.2   nathanw 			 * hop patter.  However, BayStack 650 Access Points
   1318  1.30.2.2   nathanw 			 * apparently use fixed hop chanset parameter value
   1319  1.30.2.2   nathanw 			 * 1 for any hop pattern.  So we also try this
   1320  1.30.2.2   nathanw 			 * combination of hop chanset and pattern.
   1321  1.30.2.2   nathanw 			 */
   1322  1.30.2.2   nathanw 			setbit(sc->sc_ic.ic_chan_avail,
   1323  1.30.2.2   nathanw 			    IEEE80211_FH_CHAN(1, i));
   1324  1.30.2.2   nathanw 		}
   1325  1.30.2.2   nathanw 	} else {
   1326  1.30.2.2   nathanw 		for (i = cs->cs_min; i <= cs->cs_max; i++)
   1327  1.30.2.2   nathanw 			setbit(sc->sc_ic.ic_chan_avail, i);
   1328  1.30.2.2   nathanw 	}
   1329  1.30.2.2   nathanw 	sc->sc_cur_chan = cs->cs_def;
   1330       1.1  sommerfe 
   1331  1.30.2.2   nathanw 	memset(&sc->sc_mib_mac.aDesired_ESS_ID, 0, AWI_ESS_ID_SIZE);
   1332  1.30.2.2   nathanw 	sc->sc_mib_mac.aDesired_ESS_ID[0] = IEEE80211_ELEMID_SSID;
   1333  1.30.2.2   nathanw 	sc->sc_mib_local.Fragmentation_Dis = 1;
   1334  1.30.2.2   nathanw 	sc->sc_mib_local.Accept_All_Multicast_Dis = 1;
   1335  1.30.2.2   nathanw 	sc->sc_mib_local.Power_Saving_Mode_Dis = 1;
   1336       1.1  sommerfe 
   1337  1.30.2.2   nathanw 	/* allocate buffers */
   1338  1.30.2.2   nathanw 	sc->sc_txbase = AWI_BUFFERS;
   1339  1.30.2.2   nathanw 	sc->sc_txend = sc->sc_txbase +
   1340  1.30.2.2   nathanw 	    (AWI_TXD_SIZE + sizeof(struct ieee80211_frame) +
   1341  1.30.2.2   nathanw 	    sizeof(struct ether_header) + ETHERMTU) * AWI_NTXBUFS;
   1342  1.30.2.2   nathanw 	LE_WRITE_4(&sc->sc_mib_local.Tx_Buffer_Offset, sc->sc_txbase);
   1343  1.30.2.2   nathanw 	LE_WRITE_4(&sc->sc_mib_local.Tx_Buffer_Size,
   1344  1.30.2.2   nathanw 	    sc->sc_txend - sc->sc_txbase);
   1345  1.30.2.2   nathanw 	LE_WRITE_4(&sc->sc_mib_local.Rx_Buffer_Offset, sc->sc_txend);
   1346  1.30.2.2   nathanw 	LE_WRITE_4(&sc->sc_mib_local.Rx_Buffer_Size,
   1347  1.30.2.2   nathanw 	    AWI_BUFFERS_END - sc->sc_txend);
   1348  1.30.2.2   nathanw 	sc->sc_mib_local.Network_Mode = 1;
   1349  1.30.2.2   nathanw 	sc->sc_mib_local.Acting_as_AP = 0;
   1350  1.30.2.2   nathanw 	return 0;
   1351       1.1  sommerfe }
   1352       1.1  sommerfe 
   1353  1.30.2.2   nathanw static int
   1354  1.30.2.2   nathanw awi_chan_check(void *arg, u_char *chanreq)
   1355       1.1  sommerfe {
   1356  1.30.2.2   nathanw 	struct awi_softc *sc = arg;
   1357  1.30.2.2   nathanw 	int i;
   1358  1.30.2.2   nathanw 	struct awi_chanset *cs;
   1359  1.30.2.2   nathanw 	u_char chanlist[(IEEE80211_CHAN_MAX+1)/NBBY];
   1360       1.1  sommerfe 
   1361  1.30.2.2   nathanw 	for (cs = awi_chanset; cs->cs_type != 0; cs++) {
   1362  1.30.2.2   nathanw 		if (cs->cs_type != sc->sc_mib_phy.IEEE_PHY_Type)
   1363      1.10      onoe 			continue;
   1364  1.30.2.2   nathanw 		memset(chanlist, 0, sizeof(chanlist));
   1365  1.30.2.2   nathanw 		for (i = 0; ; i++) {
   1366  1.30.2.2   nathanw 			if (i == IEEE80211_CHAN_MAX) {
   1367  1.30.2.2   nathanw 				sc->sc_mib_phy.aCurrent_Reg_Domain =
   1368  1.30.2.2   nathanw 				    cs->cs_region;
   1369  1.30.2.2   nathanw 				memcpy(sc->sc_ic.ic_chan_avail, chanlist,
   1370  1.30.2.2   nathanw 				    sizeof(sc->sc_ic.ic_chan_avail));
   1371  1.30.2.2   nathanw 				sc->sc_cur_chan = cs->cs_def;
   1372  1.30.2.2   nathanw 				return 0;
   1373  1.30.2.2   nathanw 			}
   1374  1.30.2.2   nathanw 			if (i >= cs->cs_min && i <= cs->cs_max)
   1375  1.30.2.2   nathanw 				setbit(chanlist, i);
   1376  1.30.2.2   nathanw 			else if (isset(chanreq, i))
   1377  1.30.2.2   nathanw 				break;
   1378      1.10      onoe 		}
   1379      1.10      onoe 	}
   1380  1.30.2.2   nathanw 	return EINVAL;
   1381       1.1  sommerfe }
   1382       1.1  sommerfe 
   1383      1.10      onoe static int
   1384  1.30.2.2   nathanw awi_mib(struct awi_softc *sc, u_int8_t cmd, u_int8_t mib, int wflag)
   1385       1.1  sommerfe {
   1386      1.10      onoe 	int error;
   1387      1.10      onoe 	u_int8_t size, *ptr;
   1388       1.1  sommerfe 
   1389      1.10      onoe 	switch (mib) {
   1390      1.10      onoe 	case AWI_MIB_LOCAL:
   1391      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_local;
   1392      1.10      onoe 		size = sizeof(sc->sc_mib_local);
   1393      1.10      onoe 		break;
   1394      1.10      onoe 	case AWI_MIB_ADDR:
   1395      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_addr;
   1396      1.10      onoe 		size = sizeof(sc->sc_mib_addr);
   1397      1.10      onoe 		break;
   1398      1.10      onoe 	case AWI_MIB_MAC:
   1399      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_mac;
   1400      1.10      onoe 		size = sizeof(sc->sc_mib_mac);
   1401      1.10      onoe 		break;
   1402      1.10      onoe 	case AWI_MIB_STAT:
   1403      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_stat;
   1404      1.10      onoe 		size = sizeof(sc->sc_mib_stat);
   1405      1.10      onoe 		break;
   1406      1.10      onoe 	case AWI_MIB_MGT:
   1407      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_mgt;
   1408      1.10      onoe 		size = sizeof(sc->sc_mib_mgt);
   1409      1.10      onoe 		break;
   1410      1.10      onoe 	case AWI_MIB_PHY:
   1411      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_phy;
   1412      1.10      onoe 		size = sizeof(sc->sc_mib_phy);
   1413      1.10      onoe 		break;
   1414      1.10      onoe 	default:
   1415      1.10      onoe 		return EINVAL;
   1416       1.1  sommerfe 	}
   1417      1.10      onoe 	if (sc->sc_cmd_inprog) {
   1418  1.30.2.2   nathanw 		if ((error = awi_cmd_wait(sc)) != 0) {
   1419      1.20      onoe 			if (error == EWOULDBLOCK)
   1420  1.30.2.2   nathanw 				DPRINTF(("awi_mib: cmd %d inprog",
   1421  1.30.2.2   nathanw 				    sc->sc_cmd_inprog));
   1422      1.10      onoe 			return error;
   1423      1.10      onoe 		}
   1424      1.10      onoe 	}
   1425      1.20      onoe 	sc->sc_cmd_inprog = cmd;
   1426      1.10      onoe 	if (cmd == AWI_CMD_SET_MIB)
   1427  1.30.2.2   nathanw 		awi_write_bytes(sc, AWI_CA_MIB_DATA, ptr, size);
   1428  1.30.2.2   nathanw 	awi_write_1(sc, AWI_CA_MIB_TYPE, mib);
   1429  1.30.2.2   nathanw 	awi_write_1(sc, AWI_CA_MIB_SIZE, size);
   1430  1.30.2.2   nathanw 	awi_write_1(sc, AWI_CA_MIB_INDEX, 0);
   1431  1.30.2.2   nathanw 	if ((error = awi_cmd(sc, cmd, wflag)) != 0)
   1432      1.10      onoe 		return error;
   1433      1.10      onoe 	if (cmd == AWI_CMD_GET_MIB) {
   1434  1.30.2.2   nathanw 		awi_read_bytes(sc, AWI_CA_MIB_DATA, ptr, size);
   1435      1.10      onoe #ifdef AWI_DEBUG
   1436  1.30.2.2   nathanw 		if (awi_debug) {
   1437      1.10      onoe 			int i;
   1438       1.1  sommerfe 
   1439      1.10      onoe 			printf("awi_mib: #%d:", mib);
   1440      1.10      onoe 			for (i = 0; i < size; i++)
   1441      1.10      onoe 				printf(" %02x", ptr[i]);
   1442      1.10      onoe 			printf("\n");
   1443      1.10      onoe 		}
   1444       1.1  sommerfe #endif
   1445      1.10      onoe 	}
   1446      1.10      onoe 	return 0;
   1447       1.1  sommerfe }
   1448       1.1  sommerfe 
   1449      1.10      onoe static int
   1450  1.30.2.2   nathanw awi_cmd(struct awi_softc *sc, u_int8_t cmd, int wflag)
   1451       1.1  sommerfe {
   1452      1.10      onoe 	u_int8_t status;
   1453      1.10      onoe 	int error = 0;
   1454  1.30.2.2   nathanw #ifdef AWI_DEBUG
   1455  1.30.2.2   nathanw 	static const char *cmdname[] = {
   1456  1.30.2.2   nathanw 	    "IDLE", "NOP", "SET_MIB", "INIT_TX", "FLUSH_TX", "INIT_RX",
   1457  1.30.2.2   nathanw 	    "KILL_RX", "SLEEP", "WAKE", "GET_MIB", "SCAN", "SYNC", "RESUME"
   1458  1.30.2.2   nathanw 	};
   1459  1.30.2.2   nathanw #endif
   1460      1.10      onoe 
   1461  1.30.2.2   nathanw #ifdef AWI_DEBUG
   1462  1.30.2.2   nathanw 	if (awi_debug > 1) {
   1463  1.30.2.2   nathanw 		if (cmd >= sizeof(cmdname)/sizeof(cmdname[0]))
   1464  1.30.2.2   nathanw 			printf("awi_cmd: #%d", cmd);
   1465  1.30.2.2   nathanw 		else
   1466  1.30.2.2   nathanw 			printf("awi_cmd: %s", cmdname[cmd]);
   1467  1.30.2.2   nathanw 		printf(" %s\n", wflag == AWI_NOWAIT ? "nowait" : "wait");
   1468  1.30.2.2   nathanw 	}
   1469  1.30.2.2   nathanw #endif
   1470      1.20      onoe 	sc->sc_cmd_inprog = cmd;
   1471      1.10      onoe 	awi_write_1(sc, AWI_CMD_STATUS, AWI_STAT_IDLE);
   1472      1.10      onoe 	awi_write_1(sc, AWI_CMD, cmd);
   1473  1.30.2.2   nathanw 	if (wflag == AWI_NOWAIT)
   1474  1.30.2.2   nathanw 		return EINPROGRESS;
   1475  1.30.2.2   nathanw 	if ((error = awi_cmd_wait(sc)) != 0)
   1476      1.10      onoe 		return error;
   1477      1.10      onoe 	status = awi_read_1(sc, AWI_CMD_STATUS);
   1478      1.10      onoe 	awi_write_1(sc, AWI_CMD, 0);
   1479      1.10      onoe 	switch (status) {
   1480      1.10      onoe 	case AWI_STAT_OK:
   1481      1.10      onoe 		break;
   1482      1.10      onoe 	case AWI_STAT_BADPARM:
   1483      1.10      onoe 		return EINVAL;
   1484      1.10      onoe 	default:
   1485      1.10      onoe 		printf("%s: command %d failed %x\n",
   1486      1.10      onoe 		    sc->sc_dev.dv_xname, cmd, status);
   1487      1.10      onoe 		return ENXIO;
   1488      1.10      onoe 	}
   1489      1.10      onoe 	return 0;
   1490       1.1  sommerfe }
   1491       1.1  sommerfe 
   1492  1.30.2.2   nathanw static int
   1493  1.30.2.2   nathanw awi_cmd_wait(struct awi_softc *sc)
   1494  1.30.2.2   nathanw {
   1495  1.30.2.2   nathanw 	int i, error = 0;
   1496  1.30.2.2   nathanw 
   1497  1.30.2.2   nathanw 	i = 0;
   1498  1.30.2.2   nathanw 	while (sc->sc_cmd_inprog) {
   1499  1.30.2.2   nathanw 		if (sc->sc_invalid)
   1500  1.30.2.2   nathanw 			return ENXIO;
   1501  1.30.2.2   nathanw 		if (awi_read_1(sc, AWI_CMD) != sc->sc_cmd_inprog) {
   1502  1.30.2.2   nathanw 			printf("%s: failed to access hardware\n",
   1503  1.30.2.2   nathanw 			    sc->sc_dev.dv_xname);
   1504  1.30.2.2   nathanw 			sc->sc_invalid = 1;
   1505  1.30.2.2   nathanw 			return ENXIO;
   1506  1.30.2.2   nathanw 		}
   1507  1.30.2.2   nathanw 		if (sc->sc_cansleep) {
   1508  1.30.2.2   nathanw 			sc->sc_sleep_cnt++;
   1509  1.30.2.2   nathanw 			error = tsleep(sc, PWAIT, "awicmd",
   1510  1.30.2.2   nathanw 			    AWI_CMD_TIMEOUT*hz/1000);
   1511  1.30.2.2   nathanw 			sc->sc_sleep_cnt--;
   1512  1.30.2.2   nathanw 		} else {
   1513  1.30.2.2   nathanw 			if (awi_read_1(sc, AWI_CMD_STATUS) != AWI_STAT_IDLE) {
   1514  1.30.2.2   nathanw 				awi_cmd_done(sc);
   1515  1.30.2.2   nathanw 				break;
   1516  1.30.2.2   nathanw 			}
   1517  1.30.2.2   nathanw 			if (i++ >= AWI_CMD_TIMEOUT*1000/10)
   1518  1.30.2.2   nathanw 				error = EWOULDBLOCK;
   1519  1.30.2.2   nathanw 			else
   1520  1.30.2.2   nathanw 				DELAY(10);
   1521  1.30.2.2   nathanw 		}
   1522  1.30.2.2   nathanw 		if (error)
   1523  1.30.2.2   nathanw 			break;
   1524  1.30.2.2   nathanw 	}
   1525  1.30.2.2   nathanw 	if (error) {
   1526  1.30.2.2   nathanw 		DPRINTF(("awi_cmd_wait: cmd 0x%x, error %d\n",
   1527  1.30.2.2   nathanw 		    sc->sc_cmd_inprog, error));
   1528  1.30.2.2   nathanw 	}
   1529  1.30.2.2   nathanw 	return error;
   1530  1.30.2.2   nathanw }
   1531  1.30.2.2   nathanw 
   1532      1.10      onoe static void
   1533  1.30.2.2   nathanw awi_cmd_done(struct awi_softc *sc)
   1534       1.1  sommerfe {
   1535      1.10      onoe 	u_int8_t cmd, status;
   1536      1.10      onoe 
   1537      1.10      onoe 	status = awi_read_1(sc, AWI_CMD_STATUS);
   1538      1.10      onoe 	if (status == AWI_STAT_IDLE)
   1539      1.10      onoe 		return;		/* stray interrupt */
   1540      1.10      onoe 
   1541      1.20      onoe 	cmd = sc->sc_cmd_inprog;
   1542      1.10      onoe 	sc->sc_cmd_inprog = 0;
   1543  1.30.2.2   nathanw 	wakeup(sc);
   1544      1.10      onoe 	awi_write_1(sc, AWI_CMD, 0);
   1545      1.10      onoe 
   1546      1.10      onoe 	if (status != AWI_STAT_OK) {
   1547      1.10      onoe 		printf("%s: command %d failed %x\n",
   1548      1.10      onoe 		    sc->sc_dev.dv_xname, cmd, status);
   1549  1.30.2.2   nathanw 		sc->sc_substate = AWI_ST_NONE;
   1550      1.10      onoe 		return;
   1551      1.10      onoe 	}
   1552  1.30.2.2   nathanw 	if (sc->sc_substate != AWI_ST_NONE)
   1553  1.30.2.2   nathanw 		(void)ieee80211_new_state(&sc->sc_ic.ic_if, sc->sc_nstate, -1);
   1554       1.1  sommerfe }
   1555       1.1  sommerfe 
   1556      1.10      onoe static int
   1557  1.30.2.2   nathanw awi_next_txd(struct awi_softc *sc, int len, u_int32_t *framep, u_int32_t *ntxdp)
   1558       1.1  sommerfe {
   1559      1.10      onoe 	u_int32_t txd, ntxd, frame;
   1560       1.1  sommerfe 
   1561      1.10      onoe 	txd = sc->sc_txnext;
   1562      1.10      onoe 	frame = txd + AWI_TXD_SIZE;
   1563      1.10      onoe 	if (frame + len > sc->sc_txend)
   1564      1.10      onoe 		frame = sc->sc_txbase;
   1565      1.10      onoe 	ntxd = frame + len;
   1566      1.10      onoe 	if (ntxd + AWI_TXD_SIZE > sc->sc_txend)
   1567      1.10      onoe 		ntxd = sc->sc_txbase;
   1568      1.10      onoe 	*framep = frame;
   1569      1.10      onoe 	*ntxdp = ntxd;
   1570      1.10      onoe 	/*
   1571      1.10      onoe 	 * Determine if there are any room in ring buffer.
   1572      1.10      onoe 	 *		--- send wait,  === new data,  +++ conflict (ENOBUFS)
   1573      1.10      onoe 	 *   base........................end
   1574      1.10      onoe 	 *	   done----txd=====ntxd		OK
   1575      1.10      onoe 	 *	 --txd=====done++++ntxd--	full
   1576      1.10      onoe 	 *	 --txd=====ntxd    done--	OK
   1577      1.10      onoe 	 *	 ==ntxd    done----txd===	OK
   1578      1.10      onoe 	 *	 ==done++++ntxd----txd===	full
   1579      1.10      onoe 	 *	 ++ntxd    txd=====done++	full
   1580      1.10      onoe 	 */
   1581      1.10      onoe 	if (txd < ntxd) {
   1582      1.10      onoe 		if (txd < sc->sc_txdone && ntxd + AWI_TXD_SIZE > sc->sc_txdone)
   1583      1.10      onoe 			return ENOBUFS;
   1584      1.10      onoe 	} else {
   1585      1.10      onoe 		if (txd < sc->sc_txdone || ntxd + AWI_TXD_SIZE > sc->sc_txdone)
   1586      1.10      onoe 			return ENOBUFS;
   1587       1.1  sommerfe 	}
   1588      1.10      onoe 	return 0;
   1589       1.1  sommerfe }
   1590       1.1  sommerfe 
   1591      1.10      onoe static int
   1592  1.30.2.2   nathanw awi_lock(struct awi_softc *sc)
   1593       1.1  sommerfe {
   1594      1.10      onoe 	int error = 0;
   1595       1.1  sommerfe 
   1596  1.30.2.4   nathanw 	if (curlwp == NULL) {
   1597      1.10      onoe 		/*
   1598      1.10      onoe 		 * XXX
   1599      1.10      onoe 		 * Though driver ioctl should be called with context,
   1600      1.10      onoe 		 * KAME ipv6 stack calls ioctl in interrupt for now.
   1601      1.10      onoe 		 * We simply abort the request if there are other
   1602      1.10      onoe 		 * ioctl requests in progress.
   1603      1.10      onoe 		 */
   1604      1.20      onoe 		if (sc->sc_busy) {
   1605      1.10      onoe 			return EWOULDBLOCK;
   1606      1.20      onoe 			if (sc->sc_invalid)
   1607      1.20      onoe 				return ENXIO;
   1608      1.20      onoe 		}
   1609      1.10      onoe 		sc->sc_busy = 1;
   1610      1.10      onoe 		sc->sc_cansleep = 0;
   1611      1.10      onoe 		return 0;
   1612       1.1  sommerfe 	}
   1613      1.10      onoe 	while (sc->sc_busy) {
   1614      1.20      onoe 		if (sc->sc_invalid)
   1615      1.20      onoe 			return ENXIO;
   1616      1.10      onoe 		sc->sc_sleep_cnt++;
   1617      1.10      onoe 		error = tsleep(sc, PWAIT | PCATCH, "awilck", 0);
   1618      1.10      onoe 		sc->sc_sleep_cnt--;
   1619      1.10      onoe 		if (error)
   1620      1.10      onoe 			return error;
   1621       1.6  sommerfe 	}
   1622      1.10      onoe 	sc->sc_busy = 1;
   1623      1.10      onoe 	sc->sc_cansleep = 1;
   1624      1.10      onoe 	return 0;
   1625      1.10      onoe }
   1626       1.1  sommerfe 
   1627      1.10      onoe static void
   1628  1.30.2.2   nathanw awi_unlock(struct awi_softc *sc)
   1629      1.10      onoe {
   1630      1.10      onoe 	sc->sc_busy = 0;
   1631      1.10      onoe 	sc->sc_cansleep = 0;
   1632      1.10      onoe 	if (sc->sc_sleep_cnt)
   1633      1.10      onoe 		wakeup(sc);
   1634       1.1  sommerfe }
   1635       1.1  sommerfe 
   1636      1.10      onoe static int
   1637  1.30.2.2   nathanw awi_intr_lock(struct awi_softc *sc)
   1638      1.10      onoe {
   1639       1.1  sommerfe 	u_int8_t status;
   1640      1.10      onoe 	int i, retry;
   1641      1.10      onoe 
   1642      1.10      onoe 	status = 1;
   1643      1.10      onoe 	for (retry = 0; retry < 10; retry++) {
   1644      1.10      onoe 		for (i = 0; i < AWI_LOCKOUT_TIMEOUT*1000/5; i++) {
   1645  1.30.2.2   nathanw 			if ((status = awi_read_1(sc, AWI_LOCKOUT_HOST)) == 0)
   1646      1.10      onoe 				break;
   1647      1.10      onoe 			DELAY(5);
   1648      1.10      onoe 		}
   1649      1.10      onoe 		if (status != 0)
   1650      1.10      onoe 			break;
   1651      1.10      onoe 		awi_write_1(sc, AWI_LOCKOUT_MAC, 1);
   1652  1.30.2.2   nathanw 		if ((status = awi_read_1(sc, AWI_LOCKOUT_HOST)) == 0)
   1653      1.10      onoe 			break;
   1654      1.10      onoe 		awi_write_1(sc, AWI_LOCKOUT_MAC, 0);
   1655       1.1  sommerfe 	}
   1656      1.10      onoe 	if (status != 0) {
   1657      1.10      onoe 		printf("%s: failed to lock interrupt\n",
   1658       1.6  sommerfe 		    sc->sc_dev.dv_xname);
   1659      1.10      onoe 		return ENXIO;
   1660       1.6  sommerfe 	}
   1661      1.10      onoe 	return 0;
   1662       1.1  sommerfe }
   1663       1.1  sommerfe 
   1664      1.10      onoe static void
   1665  1.30.2.2   nathanw awi_intr_unlock(struct awi_softc *sc)
   1666       1.1  sommerfe {
   1667       1.1  sommerfe 
   1668      1.10      onoe 	awi_write_1(sc, AWI_LOCKOUT_MAC, 0);
   1669       1.1  sommerfe }
   1670       1.1  sommerfe 
   1671      1.10      onoe static int
   1672  1.30.2.2   nathanw awi_newstate(void *arg, enum ieee80211_state nstate)
   1673       1.1  sommerfe {
   1674  1.30.2.2   nathanw 	struct awi_softc *sc = arg;
   1675  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
   1676  1.30.2.2   nathanw 	struct ieee80211_bss *bs = &ic->ic_bss;
   1677  1.30.2.2   nathanw 	struct ifnet *ifp = &ic->ic_if;
   1678  1.30.2.2   nathanw 	int error;
   1679  1.30.2.2   nathanw 	u_int8_t newmode;
   1680  1.30.2.2   nathanw 	enum ieee80211_state ostate;
   1681  1.30.2.2   nathanw #ifdef AWI_DEBUG
   1682  1.30.2.2   nathanw 	static const char *stname[] =
   1683  1.30.2.2   nathanw 	    { "INIT", "SCAN", "AUTH", "ASSOC", "RUN" };
   1684  1.30.2.2   nathanw 	static const char *substname[] =
   1685  1.30.2.2   nathanw 	    { "NONE", "SCAN_INIT", "SCAN_SETMIB", "SCAN_SCCMD",
   1686  1.30.2.2   nathanw 	      "SUB_INIT", "SUB_SETSS", "SUB_SYNC" };
   1687  1.30.2.2   nathanw #endif /* AWI_DEBUG */
   1688  1.30.2.2   nathanw 
   1689  1.30.2.2   nathanw 	ostate = ic->ic_state;
   1690  1.30.2.2   nathanw 	DPRINTF(("awi_newstate: %s (%s/%s) -> %s\n", stname[ostate],
   1691  1.30.2.2   nathanw 	    stname[sc->sc_nstate], substname[sc->sc_substate], stname[nstate]));
   1692  1.30.2.2   nathanw 
   1693  1.30.2.2   nathanw 	/* set LED */
   1694  1.30.2.2   nathanw 	switch (nstate) {
   1695  1.30.2.2   nathanw 	case IEEE80211_S_INIT:
   1696  1.30.2.2   nathanw 		awi_drvstate(sc, AWI_DRV_RESET);
   1697  1.30.2.2   nathanw 		break;
   1698  1.30.2.2   nathanw 	case IEEE80211_S_SCAN:
   1699  1.30.2.2   nathanw 		if (ic->ic_flags & IEEE80211_F_ADHOC)
   1700  1.30.2.2   nathanw 			awi_drvstate(sc, AWI_DRV_ADHSC);
   1701  1.30.2.2   nathanw 		else
   1702  1.30.2.2   nathanw 			awi_drvstate(sc, AWI_DRV_INFSY);
   1703  1.30.2.2   nathanw 		break;
   1704  1.30.2.2   nathanw 	case IEEE80211_S_AUTH:
   1705  1.30.2.2   nathanw 		awi_drvstate(sc, AWI_DRV_INFSY);
   1706  1.30.2.2   nathanw 		break;
   1707  1.30.2.2   nathanw 	case IEEE80211_S_ASSOC:
   1708  1.30.2.2   nathanw 		awi_drvstate(sc, AWI_DRV_INFAUTH);
   1709  1.30.2.2   nathanw 		break;
   1710  1.30.2.2   nathanw 	case IEEE80211_S_RUN:
   1711  1.30.2.2   nathanw 		if (ic->ic_flags & IEEE80211_F_ADHOC)
   1712  1.30.2.2   nathanw 			awi_drvstate(sc, AWI_DRV_ADHSY);
   1713  1.30.2.2   nathanw 		else
   1714  1.30.2.2   nathanw 			awi_drvstate(sc, AWI_DRV_INFASSOC);
   1715  1.30.2.2   nathanw 		break;
   1716  1.30.2.2   nathanw 	}
   1717      1.10      onoe 
   1718  1.30.2.2   nathanw 	if (nstate == IEEE80211_S_INIT) {
   1719  1.30.2.2   nathanw 		sc->sc_substate = AWI_ST_NONE;
   1720  1.30.2.2   nathanw 		ic->ic_flags &= ~IEEE80211_F_SIBSS;
   1721  1.30.2.2   nathanw 		return 0;
   1722  1.30.2.2   nathanw 	}
   1723  1.30.2.2   nathanw 
   1724  1.30.2.2   nathanw 	/* state transition */
   1725  1.30.2.2   nathanw 	if (nstate == IEEE80211_S_SCAN) {
   1726  1.30.2.2   nathanw 		/* SCAN substate */
   1727  1.30.2.2   nathanw 		if (sc->sc_substate == AWI_ST_NONE) {
   1728  1.30.2.2   nathanw 			sc->sc_nstate = nstate;	/* next state in transition */
   1729  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SCAN_INIT;
   1730  1.30.2.2   nathanw 		}
   1731  1.30.2.2   nathanw 		switch (sc->sc_substate) {
   1732  1.30.2.2   nathanw 		case AWI_ST_SCAN_INIT:
   1733  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SCAN_SETMIB;
   1734  1.30.2.2   nathanw 			switch (ostate) {
   1735  1.30.2.2   nathanw 			case IEEE80211_S_RUN:
   1736  1.30.2.2   nathanw 				/* beacon miss */
   1737  1.30.2.2   nathanw 				if (ifp->if_flags & IFF_DEBUG)
   1738  1.30.2.2   nathanw 					printf("%s: no recent beacons from %s;"
   1739  1.30.2.2   nathanw 					    " rescanning\n",
   1740  1.30.2.2   nathanw 					    ifp->if_xname,
   1741  1.30.2.2   nathanw 					    ether_sprintf(ic->ic_bss.bs_bssid));
   1742  1.30.2.2   nathanw 				/* FALLTHRU */
   1743  1.30.2.2   nathanw 			case IEEE80211_S_AUTH:
   1744  1.30.2.2   nathanw 			case IEEE80211_S_ASSOC:
   1745  1.30.2.2   nathanw 				/* timeout restart scan */
   1746  1.30.2.2   nathanw 				ieee80211_free_scan(ifp);
   1747  1.30.2.2   nathanw 				/* FALLTHRU */
   1748  1.30.2.2   nathanw 			case IEEE80211_S_INIT:
   1749  1.30.2.2   nathanw 				ic->ic_flags |= IEEE80211_F_ASCAN;
   1750  1.30.2.2   nathanw 				ic->ic_scan_timer = 0;
   1751  1.30.2.2   nathanw 				/* FALLTHRU */
   1752  1.30.2.2   nathanw 			case IEEE80211_S_SCAN:
   1753  1.30.2.2   nathanw 				/* scan next */
   1754      1.10      onoe 				break;
   1755      1.10      onoe 			}
   1756  1.30.2.2   nathanw 			if (ic->ic_flags & IEEE80211_F_ASCAN)
   1757  1.30.2.2   nathanw 				newmode = AWI_SCAN_ACTIVE;
   1758      1.10      onoe 			else
   1759  1.30.2.2   nathanw 				newmode = AWI_SCAN_PASSIVE;
   1760  1.30.2.2   nathanw 			if (sc->sc_mib_mgt.aScan_Mode != newmode) {
   1761  1.30.2.2   nathanw 				sc->sc_mib_mgt.aScan_Mode = newmode;
   1762  1.30.2.2   nathanw 				if ((error = awi_mib(sc, AWI_CMD_SET_MIB,
   1763  1.30.2.2   nathanw 				    AWI_MIB_MGT, AWI_NOWAIT)) != 0)
   1764  1.30.2.2   nathanw 					break;
   1765  1.30.2.2   nathanw 			}
   1766  1.30.2.2   nathanw 			/* FALLTHRU */
   1767  1.30.2.2   nathanw 		case AWI_ST_SCAN_SETMIB:
   1768  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SCAN_SCCMD;
   1769  1.30.2.2   nathanw 			if (sc->sc_cmd_inprog) {
   1770  1.30.2.2   nathanw 				if ((error = awi_cmd_wait(sc)) != 0)
   1771  1.30.2.2   nathanw 					break;
   1772  1.30.2.2   nathanw 			}
   1773  1.30.2.2   nathanw 			sc->sc_cmd_inprog = AWI_CMD_SCAN;
   1774  1.30.2.2   nathanw 			awi_write_2(sc, AWI_CA_SCAN_DURATION,
   1775  1.30.2.2   nathanw 			    (ic->ic_flags & IEEE80211_F_ASCAN) ?
   1776  1.30.2.2   nathanw 			    AWI_ASCAN_DURATION : AWI_PSCAN_DURATION);
   1777  1.30.2.2   nathanw 			if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
   1778  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_SET,
   1779  1.30.2.2   nathanw 				    IEEE80211_FH_CHANSET(bs->bs_chan));
   1780  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_PATTERN,
   1781  1.30.2.2   nathanw 				    IEEE80211_FH_CHANPAT(bs->bs_chan));
   1782  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_IDX, 1);
   1783  1.30.2.2   nathanw 			} else {
   1784  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_SET, bs->bs_chan);
   1785  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_PATTERN, 0);
   1786  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_IDX, 0);
   1787  1.30.2.2   nathanw 			}
   1788  1.30.2.2   nathanw 			awi_write_1(sc, AWI_CA_SCAN_SUSP, 0);
   1789  1.30.2.2   nathanw 			sc->sc_cur_chan = bs->bs_chan;
   1790  1.30.2.2   nathanw 			if ((error = awi_cmd(sc, AWI_CMD_SCAN, AWI_NOWAIT))
   1791  1.30.2.2   nathanw 			    != 0)
   1792  1.30.2.2   nathanw 				break;
   1793  1.30.2.2   nathanw 			/* FALLTHRU */
   1794  1.30.2.2   nathanw 		case AWI_ST_SCAN_SCCMD:
   1795  1.30.2.2   nathanw 			if (ic->ic_scan_timer == 0)
   1796  1.30.2.2   nathanw 				ic->ic_scan_timer =
   1797  1.30.2.2   nathanw 				    (ic->ic_flags & IEEE80211_F_ASCAN) ?
   1798  1.30.2.2   nathanw 				    IEEE80211_ASCAN_WAIT : IEEE80211_PSCAN_WAIT;
   1799  1.30.2.2   nathanw 			ifp->if_timer = 1;
   1800  1.30.2.2   nathanw 			ic->ic_state = nstate;
   1801  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_NONE;
   1802  1.30.2.2   nathanw 			error = EINPROGRESS;
   1803  1.30.2.2   nathanw 			break;
   1804  1.30.2.2   nathanw 		default:
   1805  1.30.2.2   nathanw 			DPRINTF(("awi_newstate: unexpected state %s/%s\n",
   1806  1.30.2.2   nathanw 			    stname[nstate], substname[sc->sc_substate]));
   1807  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_NONE;
   1808  1.30.2.2   nathanw 			error = EIO;
   1809  1.30.2.2   nathanw 			break;
   1810      1.10      onoe 		}
   1811  1.30.2.2   nathanw 		return error;
   1812  1.30.2.2   nathanw 	}
   1813  1.30.2.2   nathanw 
   1814  1.30.2.2   nathanw 	if (ostate == IEEE80211_S_SCAN) {
   1815  1.30.2.2   nathanw 		/* set SSID and channel */
   1816  1.30.2.2   nathanw 		/* substate */
   1817  1.30.2.2   nathanw 		if (sc->sc_substate == AWI_ST_NONE) {
   1818  1.30.2.2   nathanw 			sc->sc_nstate = nstate;	/* next state in transition */
   1819  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SUB_INIT;
   1820  1.30.2.2   nathanw 		}
   1821  1.30.2.2   nathanw 		switch (sc->sc_substate) {
   1822  1.30.2.2   nathanw 		case AWI_ST_SUB_INIT:
   1823  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SUB_SETSS;
   1824  1.30.2.2   nathanw 			memcpy(&sc->sc_mib_mgt.aCurrent_BSS_ID, bs->bs_bssid,
   1825  1.30.2.2   nathanw 			    IEEE80211_ADDR_LEN);
   1826  1.30.2.2   nathanw 			memset(&sc->sc_mib_mgt.aCurrent_ESS_ID, 0,
   1827  1.30.2.2   nathanw 			    AWI_ESS_ID_SIZE);
   1828  1.30.2.2   nathanw 			sc->sc_mib_mgt.aCurrent_ESS_ID[0] =
   1829  1.30.2.2   nathanw 			    IEEE80211_ELEMID_SSID;
   1830  1.30.2.2   nathanw 			sc->sc_mib_mgt.aCurrent_ESS_ID[1] = bs->bs_esslen;
   1831  1.30.2.2   nathanw 			memcpy(&sc->sc_mib_mgt.aCurrent_ESS_ID[2],
   1832  1.30.2.2   nathanw 			    bs->bs_essid, bs->bs_esslen);
   1833  1.30.2.2   nathanw 			LE_WRITE_2(&sc->sc_mib_mgt.aBeacon_Period,
   1834  1.30.2.2   nathanw 			    bs->bs_intval);
   1835  1.30.2.2   nathanw 			if ((error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MGT,
   1836  1.30.2.2   nathanw 			    AWI_NOWAIT)) != 0)
   1837  1.30.2.2   nathanw 				break;
   1838  1.30.2.2   nathanw 			/* FALLTHRU */
   1839  1.30.2.2   nathanw 		case AWI_ST_SUB_SETSS:
   1840  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SUB_SYNC;
   1841  1.30.2.2   nathanw 			if (sc->sc_cmd_inprog) {
   1842  1.30.2.2   nathanw 				if (awi_cmd_wait(sc))
   1843  1.30.2.2   nathanw 					break;
   1844  1.30.2.2   nathanw 			}
   1845  1.30.2.2   nathanw 			sc->sc_cmd_inprog = AWI_CMD_SYNC;
   1846  1.30.2.2   nathanw 			if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
   1847  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_SET,
   1848  1.30.2.2   nathanw 				    IEEE80211_FH_CHANSET(bs->bs_chan));
   1849  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_PATTERN,
   1850  1.30.2.2   nathanw 				    IEEE80211_FH_CHANPAT(bs->bs_chan));
   1851  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_IDX,
   1852  1.30.2.2   nathanw 				    bs->bs_fhindex);
   1853  1.30.2.2   nathanw 				awi_write_2(sc, AWI_CA_SYNC_DWELL,
   1854  1.30.2.2   nathanw 				    bs->bs_fhdwell);
   1855  1.30.2.2   nathanw 			} else {
   1856  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_SET, bs->bs_chan);
   1857  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_PATTERN, 0);
   1858  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_IDX, 0);
   1859  1.30.2.2   nathanw 				awi_write_2(sc, AWI_CA_SYNC_DWELL, 0);
   1860  1.30.2.2   nathanw 			}
   1861  1.30.2.2   nathanw 			if ((ic->ic_flags & IEEE80211_F_SIBSS) &&
   1862  1.30.2.2   nathanw 			    !sc->sc_no_bssid)
   1863  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_STARTBSS, 1);
   1864  1.30.2.2   nathanw 			else
   1865  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_STARTBSS, 0);
   1866  1.30.2.2   nathanw 			awi_write_2(sc, AWI_CA_SYNC_MBZ, 0);
   1867  1.30.2.2   nathanw 			awi_write_bytes(sc, AWI_CA_SYNC_TIMESTAMP,
   1868  1.30.2.2   nathanw 			    bs->bs_tstamp, 8);
   1869  1.30.2.2   nathanw 			awi_write_4(sc, AWI_CA_SYNC_REFTIME, bs->bs_timoff);
   1870  1.30.2.2   nathanw 			sc->sc_cur_chan = bs->bs_chan;
   1871  1.30.2.2   nathanw 			if ((error = awi_cmd(sc, AWI_CMD_SYNC, AWI_NOWAIT))
   1872  1.30.2.2   nathanw 			    != 0)
   1873  1.30.2.2   nathanw 				break;
   1874  1.30.2.2   nathanw 			/* FALLTHRU */
   1875  1.30.2.2   nathanw 		case AWI_ST_SUB_SYNC:
   1876  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_NONE;
   1877  1.30.2.2   nathanw 			if (ic->ic_flags & IEEE80211_F_SIBSS) {
   1878  1.30.2.2   nathanw 				if ((error = awi_mib(sc, AWI_CMD_GET_MIB,
   1879  1.30.2.2   nathanw 				    AWI_MIB_MGT, AWI_WAIT)) != 0)
   1880  1.30.2.2   nathanw 					break;
   1881  1.30.2.2   nathanw 				memcpy(bs->bs_bssid,
   1882  1.30.2.2   nathanw 				    &sc->sc_mib_mgt.aCurrent_BSS_ID,
   1883  1.30.2.2   nathanw 				    IEEE80211_ADDR_LEN);
   1884  1.30.2.2   nathanw 			} else {
   1885  1.30.2.2   nathanw 				if (nstate == IEEE80211_S_RUN) {
   1886  1.30.2.2   nathanw 					sc->sc_rx_timer = 10;
   1887  1.30.2.2   nathanw 					ifp->if_timer = 1;
   1888  1.30.2.2   nathanw 				}
   1889  1.30.2.2   nathanw 			}
   1890  1.30.2.2   nathanw 			error = 0;
   1891      1.10      onoe 			break;
   1892  1.30.2.2   nathanw 		default:
   1893  1.30.2.2   nathanw 			DPRINTF(("awi_newstate: unexpected state %s/%s\n",
   1894  1.30.2.2   nathanw 			    stname[nstate], substname[sc->sc_substate]));
   1895  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_NONE;
   1896  1.30.2.2   nathanw 			error = EIO;
   1897  1.30.2.2   nathanw 			break;
   1898  1.30.2.2   nathanw 		}
   1899  1.30.2.2   nathanw 		return error;
   1900       1.1  sommerfe 	}
   1901  1.30.2.2   nathanw 
   1902  1.30.2.2   nathanw 	sc->sc_substate = AWI_ST_NONE;
   1903  1.30.2.2   nathanw 
   1904  1.30.2.2   nathanw 	return 0;
   1905       1.1  sommerfe }
   1906       1.1  sommerfe 
   1907  1.30.2.2   nathanw static struct mbuf *
   1908  1.30.2.2   nathanw awi_ether_encap(struct awi_softc *sc, struct mbuf *m)
   1909      1.20      onoe {
   1910  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
   1911  1.30.2.2   nathanw 	struct ieee80211_bss *bs = &ic->ic_bss;
   1912  1.30.2.2   nathanw 	struct ether_header *eh;
   1913  1.30.2.2   nathanw 	struct ieee80211_frame *wh;
   1914      1.20      onoe 
   1915  1.30.2.2   nathanw 	if (m->m_len < sizeof(struct ether_header)) {
   1916  1.30.2.2   nathanw 		m = m_pullup(m, sizeof(struct ether_header));
   1917  1.30.2.2   nathanw 		if (m == NULL)
   1918  1.30.2.2   nathanw 			return NULL;
   1919      1.20      onoe 	}
   1920  1.30.2.2   nathanw 	eh = mtod(m, struct ether_header *);
   1921  1.30.2.2   nathanw 	M_PREPEND(m, sizeof(struct ieee80211_frame), M_DONTWAIT);
   1922  1.30.2.2   nathanw 	if (m == NULL)
   1923  1.30.2.2   nathanw 		return NULL;
   1924  1.30.2.2   nathanw 	wh = mtod(m, struct ieee80211_frame *);
   1925  1.30.2.2   nathanw 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_DATA;
   1926  1.30.2.2   nathanw 	*(u_int16_t *)wh->i_dur = 0;
   1927  1.30.2.2   nathanw 	*(u_int16_t *)wh->i_seq =
   1928  1.30.2.2   nathanw 	    htole16(bs->bs_txseq << IEEE80211_SEQ_SEQ_SHIFT);
   1929  1.30.2.2   nathanw 	bs->bs_txseq++;
   1930  1.30.2.2   nathanw 	if (ic->ic_flags & IEEE80211_F_ADHOC) {
   1931  1.30.2.2   nathanw 		wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
   1932  1.30.2.2   nathanw 		if (sc->sc_adhoc_ap)
   1933  1.30.2.2   nathanw 			memcpy(wh->i_addr1, bs->bs_macaddr, IEEE80211_ADDR_LEN);
   1934  1.30.2.2   nathanw 		else
   1935  1.30.2.2   nathanw 			memcpy(wh->i_addr1, eh->ether_dhost,
   1936  1.30.2.2   nathanw 			    IEEE80211_ADDR_LEN);
   1937  1.30.2.2   nathanw 		memcpy(wh->i_addr2, eh->ether_shost, IEEE80211_ADDR_LEN);
   1938  1.30.2.2   nathanw 		memcpy(wh->i_addr3, bs->bs_bssid, IEEE80211_ADDR_LEN);
   1939      1.20      onoe 	} else {
   1940  1.30.2.2   nathanw 		wh->i_fc[1] = IEEE80211_FC1_DIR_TODS;
   1941  1.30.2.2   nathanw 		memcpy(wh->i_addr1, bs->bs_bssid, IEEE80211_ADDR_LEN);
   1942  1.30.2.2   nathanw 		memcpy(wh->i_addr2, eh->ether_shost, IEEE80211_ADDR_LEN);
   1943  1.30.2.2   nathanw 		memcpy(wh->i_addr3, eh->ether_dhost, IEEE80211_ADDR_LEN);
   1944      1.20      onoe 	}
   1945  1.30.2.2   nathanw 	return m;
   1946      1.20      onoe }
   1947      1.20      onoe 
   1948  1.30.2.2   nathanw static struct mbuf *
   1949  1.30.2.2   nathanw awi_ether_modcap(struct awi_softc *sc, struct mbuf *m)
   1950       1.1  sommerfe {
   1951  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
   1952  1.30.2.2   nathanw 	struct ether_header eh;
   1953  1.30.2.2   nathanw 	struct ieee80211_frame wh;
   1954  1.30.2.2   nathanw 	struct llc *llc;
   1955       1.1  sommerfe 
   1956  1.30.2.2   nathanw 	if (m->m_len < sizeof(wh) + sizeof(eh)) {
   1957  1.30.2.2   nathanw 		m = m_pullup(m, sizeof(wh) + sizeof(eh));
   1958  1.30.2.2   nathanw 		if (m == NULL)
   1959  1.30.2.2   nathanw 			return NULL;
   1960      1.10      onoe 	}
   1961  1.30.2.2   nathanw 	memcpy(&wh, mtod(m, caddr_t), sizeof(wh));
   1962  1.30.2.2   nathanw 	if (wh.i_fc[0] != (IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_DATA))
   1963  1.30.2.2   nathanw 		return m;
   1964  1.30.2.2   nathanw 	memcpy(&eh, mtod(m, caddr_t) + sizeof(wh), sizeof(eh));
   1965  1.30.2.2   nathanw 	m_adj(m, sizeof(eh) - sizeof(*llc));
   1966  1.30.2.2   nathanw 	if (ic->ic_flags & IEEE80211_F_ADHOC)
   1967  1.30.2.2   nathanw 		memcpy(wh.i_addr2, eh.ether_shost, IEEE80211_ADDR_LEN);
   1968  1.30.2.2   nathanw 	memcpy(mtod(m, caddr_t), &wh, sizeof(wh));
   1969  1.30.2.2   nathanw 	llc = (struct llc *)(mtod(m, caddr_t) + sizeof(wh));
   1970  1.30.2.2   nathanw 	llc->llc_dsap = llc->llc_ssap = LLC_SNAP_LSAP;
   1971  1.30.2.2   nathanw 	llc->llc_control = LLC_UI;
   1972  1.30.2.2   nathanw 	llc->llc_snap.org_code[0] = 0;
   1973  1.30.2.2   nathanw 	llc->llc_snap.org_code[1] = 0;
   1974  1.30.2.2   nathanw 	llc->llc_snap.org_code[2] = 0;
   1975  1.30.2.2   nathanw 	llc->llc_snap.ether_type = eh.ether_type;
   1976  1.30.2.2   nathanw 	return m;
   1977       1.1  sommerfe }
   1978