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awi.c revision 1.30.2.8
      1  1.30.2.5   nathanw /*	$NetBSD: awi.c,v 1.30.2.8 2002/10/18 02:41:48 nathanw Exp $	*/
      2       1.3  sommerfe 
      3      1.19      onoe /*-
      4  1.30.2.2   nathanw  * Copyright (c) 1999,2000,2001 The NetBSD Foundation, Inc.
      5       1.1  sommerfe  * All rights reserved.
      6       1.1  sommerfe  *
      7       1.1  sommerfe  * This code is derived from software contributed to The NetBSD Foundation
      8      1.19      onoe  * by Bill Sommerfeld
      9       1.1  sommerfe  *
     10       1.1  sommerfe  * Redistribution and use in source and binary forms, with or without
     11       1.1  sommerfe  * modification, are permitted provided that the following conditions
     12       1.1  sommerfe  * are met:
     13       1.1  sommerfe  * 1. Redistributions of source code must retain the above copyright
     14       1.1  sommerfe  *    notice, this list of conditions and the following disclaimer.
     15       1.1  sommerfe  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1  sommerfe  *    notice, this list of conditions and the following disclaimer in the
     17       1.1  sommerfe  *    documentation and/or other materials provided with the distribution.
     18       1.1  sommerfe  * 3. All advertising materials mentioning features or use of this software
     19       1.1  sommerfe  *    must display the following acknowledgement:
     20      1.19      onoe  *        This product includes software developed by the NetBSD
     21      1.19      onoe  *        Foundation, Inc. and its contributors.
     22       1.1  sommerfe  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1  sommerfe  *    contributors may be used to endorse or promote products derived
     24       1.1  sommerfe  *    from this software without specific prior written permission.
     25       1.1  sommerfe  *
     26       1.1  sommerfe  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1  sommerfe  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1  sommerfe  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1  sommerfe  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1  sommerfe  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1  sommerfe  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1  sommerfe  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1  sommerfe  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1  sommerfe  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1  sommerfe  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1  sommerfe  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1  sommerfe  */
     38      1.19      onoe /*
     39      1.19      onoe  * Driver for AMD 802.11 firmware.
     40      1.19      onoe  * Uses am79c930 chip driver to talk to firmware running on the am79c930.
     41      1.19      onoe  *
     42      1.19      onoe  * More-or-less a generic ethernet-like if driver, with 802.11 gorp added.
     43      1.19      onoe  */
     44      1.19      onoe 
     45      1.19      onoe /*
     46      1.19      onoe  * todo:
     47      1.19      onoe  *	- flush tx queue on resynch.
     48      1.19      onoe  *	- clear oactive on "down".
     49      1.19      onoe  *	- rewrite copy-into-mbuf code
     50      1.19      onoe  *	- mgmt state machine gets stuck retransmitting assoc requests.
     51      1.19      onoe  *	- multicast filter.
     52      1.19      onoe  *	- fix device reset so it's more likely to work
     53      1.19      onoe  *	- show status goo through ifmedia.
     54      1.19      onoe  *
     55      1.19      onoe  * more todo:
     56      1.19      onoe  *	- deal with more 802.11 frames.
     57      1.19      onoe  *		- send reassoc request
     58      1.19      onoe  *		- deal with reassoc response
     59      1.19      onoe  *		- send/deal with disassociation
     60      1.19      onoe  *	- deal with "full" access points (no room for me).
     61      1.19      onoe  *	- power save mode
     62      1.19      onoe  *
     63      1.19      onoe  * later:
     64      1.19      onoe  *	- SSID preferences
     65      1.19      onoe  *	- need ioctls for poking at the MIBs
     66      1.19      onoe  *	- implement ad-hoc mode (including bss creation).
     67      1.19      onoe  *	- decide when to do "ad hoc" vs. infrastructure mode (IFF_LINK flags?)
     68      1.19      onoe  *		(focus on inf. mode since that will be needed for ietf)
     69      1.19      onoe  *	- deal with DH vs. FH versions of the card
     70      1.19      onoe  *	- deal with faster cards (2mb/s)
     71      1.19      onoe  *	- ?WEP goo (mmm, rc4) (it looks not particularly useful).
     72      1.19      onoe  *	- ifmedia revision.
     73      1.19      onoe  *	- common 802.11 mibish things.
     74      1.19      onoe  *	- common 802.11 media layer.
     75      1.19      onoe  */
     76      1.10      onoe 
     77       1.1  sommerfe /*
     78      1.10      onoe  * Driver for AMD 802.11 PCnetMobile firmware.
     79       1.1  sommerfe  * Uses am79c930 chip driver to talk to firmware running on the am79c930.
     80       1.1  sommerfe  *
     81      1.10      onoe  * The initial version of the driver was written by
     82      1.10      onoe  * Bill Sommerfeld <sommerfeld (at) netbsd.org>.
     83      1.10      onoe  * Then the driver module completely rewritten to support cards with DS phy
     84      1.10      onoe  * and to support adhoc mode by Atsushi Onoe <onoe (at) netbsd.org>
     85       1.1  sommerfe  */
     86  1.30.2.3   nathanw 
     87  1.30.2.3   nathanw #include <sys/cdefs.h>
     88  1.30.2.5   nathanw __KERNEL_RCSID(0, "$NetBSD: awi.c,v 1.30.2.8 2002/10/18 02:41:48 nathanw Exp $");
     89       1.1  sommerfe 
     90       1.1  sommerfe #include "opt_inet.h"
     91      1.10      onoe #include "bpfilter.h"
     92       1.1  sommerfe 
     93       1.1  sommerfe #include <sys/param.h>
     94       1.1  sommerfe #include <sys/systm.h>
     95       1.1  sommerfe #include <sys/kernel.h>
     96       1.1  sommerfe #include <sys/mbuf.h>
     97      1.10      onoe #include <sys/malloc.h>
     98      1.10      onoe #include <sys/proc.h>
     99       1.1  sommerfe #include <sys/socket.h>
    100      1.10      onoe #include <sys/sockio.h>
    101       1.1  sommerfe #include <sys/errno.h>
    102       1.1  sommerfe #include <sys/device.h>
    103       1.1  sommerfe 
    104       1.1  sommerfe #include <net/if.h>
    105       1.1  sommerfe #include <net/if_dl.h>
    106       1.1  sommerfe #include <net/if_ether.h>
    107       1.1  sommerfe #include <net/if_media.h>
    108      1.10      onoe #include <net/if_llc.h>
    109      1.10      onoe #include <net/if_ieee80211.h>
    110       1.1  sommerfe 
    111       1.1  sommerfe #ifdef INET
    112       1.1  sommerfe #include <netinet/in.h>
    113       1.1  sommerfe #include <netinet/in_systm.h>
    114      1.10      onoe #ifdef __NetBSD__
    115       1.1  sommerfe #include <netinet/if_inarp.h>
    116      1.10      onoe #else
    117      1.10      onoe #include <netinet/if_ether.h>
    118      1.10      onoe #endif
    119       1.1  sommerfe #endif
    120       1.1  sommerfe 
    121       1.1  sommerfe #if NBPFILTER > 0
    122       1.1  sommerfe #include <net/bpf.h>
    123       1.1  sommerfe #endif
    124       1.1  sommerfe 
    125       1.1  sommerfe #include <machine/cpu.h>
    126       1.1  sommerfe #include <machine/bus.h>
    127       1.1  sommerfe #include <machine/intr.h>
    128       1.1  sommerfe 
    129       1.1  sommerfe #include <dev/ic/am79c930reg.h>
    130       1.1  sommerfe #include <dev/ic/am79c930var.h>
    131       1.1  sommerfe #include <dev/ic/awireg.h>
    132       1.1  sommerfe #include <dev/ic/awivar.h>
    133      1.10      onoe 
    134  1.30.2.2   nathanw static int  awi_init(struct ifnet *);
    135  1.30.2.2   nathanw static void awi_stop(struct ifnet *, int);
    136  1.30.2.2   nathanw static void awi_start(struct ifnet *);
    137  1.30.2.2   nathanw static void awi_watchdog(struct ifnet *);
    138  1.30.2.2   nathanw static int  awi_ioctl(struct ifnet *, u_long, caddr_t);
    139  1.30.2.2   nathanw static int  awi_media_change(struct ifnet *);
    140  1.30.2.2   nathanw static void awi_media_status(struct ifnet *, struct ifmediareq *);
    141  1.30.2.2   nathanw static int  awi_mode_init(struct awi_softc *);
    142  1.30.2.2   nathanw static void awi_rx_int(struct awi_softc *);
    143  1.30.2.2   nathanw static void awi_tx_int(struct awi_softc *);
    144  1.30.2.2   nathanw static struct mbuf *awi_devget(struct awi_softc *, u_int32_t, u_int16_t);
    145  1.30.2.2   nathanw static int  awi_hw_init(struct awi_softc *);
    146  1.30.2.2   nathanw static int  awi_init_mibs(struct awi_softc *);
    147  1.30.2.2   nathanw static int  awi_chan_check(void *, u_char *);
    148  1.30.2.2   nathanw static int  awi_mib(struct awi_softc *, u_int8_t, u_int8_t, int);
    149  1.30.2.2   nathanw static int  awi_cmd(struct awi_softc *, u_int8_t, int);
    150  1.30.2.2   nathanw static int  awi_cmd_wait(struct awi_softc *);
    151  1.30.2.2   nathanw static void awi_cmd_done(struct awi_softc *);
    152  1.30.2.2   nathanw static int  awi_next_txd(struct awi_softc *, int, u_int32_t *, u_int32_t *);
    153  1.30.2.2   nathanw static int  awi_lock(struct awi_softc *);
    154  1.30.2.2   nathanw static void awi_unlock(struct awi_softc *);
    155  1.30.2.2   nathanw static int  awi_intr_lock(struct awi_softc *);
    156  1.30.2.2   nathanw static void awi_intr_unlock(struct awi_softc *);
    157  1.30.2.2   nathanw static int  awi_newstate(void *, enum ieee80211_state);
    158  1.30.2.2   nathanw static struct mbuf *awi_ether_encap(struct awi_softc *, struct mbuf *);
    159  1.30.2.2   nathanw static struct mbuf *awi_ether_modcap(struct awi_softc *, struct mbuf *);
    160  1.30.2.2   nathanw 
    161  1.30.2.2   nathanw /* unalligned little endian access */
    162  1.30.2.2   nathanw #define LE_READ_2(p)							\
    163  1.30.2.2   nathanw 	((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8))
    164  1.30.2.2   nathanw #define LE_READ_4(p)							\
    165  1.30.2.2   nathanw 	((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8) |	\
    166  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))
    167  1.30.2.2   nathanw #define LE_WRITE_2(p, v)						\
    168  1.30.2.2   nathanw 	((((u_int8_t *)(p))[0] = (((u_int32_t)(v)      ) & 0xff)),	\
    169  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[1] = (((u_int32_t)(v) >>  8) & 0xff)))
    170  1.30.2.2   nathanw #define LE_WRITE_4(p, v)						\
    171  1.30.2.2   nathanw 	((((u_int8_t *)(p))[0] = (((u_int32_t)(v)      ) & 0xff)),	\
    172  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[1] = (((u_int32_t)(v) >>  8) & 0xff)),	\
    173  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[2] = (((u_int32_t)(v) >> 16) & 0xff)),	\
    174  1.30.2.2   nathanw 	 (((u_int8_t *)(p))[3] = (((u_int32_t)(v) >> 24) & 0xff)))
    175  1.30.2.2   nathanw 
    176  1.30.2.2   nathanw struct awi_chanset awi_chanset[] = {
    177  1.30.2.2   nathanw     /* PHY type        domain            min max def */
    178  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_JP,  6, 17,  6 },
    179  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_ES,  0, 26,  1 },
    180  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_FR,  0, 32,  1 },
    181  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_US,  0, 77,  1 },
    182  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_CA,  0, 77,  1 },
    183  1.30.2.2   nathanw     { AWI_PHY_TYPE_FH, AWI_REG_DOMAIN_EU,  0, 77,  1 },
    184  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_JP, 14, 14, 14 },
    185  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_ES, 10, 11, 10 },
    186  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_FR, 10, 13, 10 },
    187  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_US,  1, 11,  3 },
    188  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_CA,  1, 11,  3 },
    189  1.30.2.2   nathanw     { AWI_PHY_TYPE_DS, AWI_REG_DOMAIN_EU,  1, 13,  3 },
    190  1.30.2.2   nathanw     { 0, 0 }
    191  1.30.2.2   nathanw };
    192      1.10      onoe 
    193      1.10      onoe #ifdef AWI_DEBUG
    194  1.30.2.2   nathanw int awi_debug;
    195       1.1  sommerfe 
    196  1.30.2.2   nathanw #define	DPRINTF(X)	if (awi_debug) printf X
    197  1.30.2.2   nathanw #define	DPRINTF2(X)	if (awi_debug > 1) printf X
    198      1.10      onoe #else
    199  1.30.2.2   nathanw #define	DPRINTF(X)
    200  1.30.2.2   nathanw #define	DPRINTF2(X)
    201      1.10      onoe #endif
    202       1.1  sommerfe 
    203      1.10      onoe int
    204  1.30.2.2   nathanw awi_attach(struct awi_softc *sc)
    205       1.1  sommerfe {
    206  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    207  1.30.2.2   nathanw 	struct ifnet *ifp = &ic->ic_if;
    208  1.30.2.2   nathanw 	int s, i, error, nrate;
    209      1.10      onoe 	int mword;
    210      1.10      onoe 	struct ifmediareq imr;
    211       1.1  sommerfe 
    212      1.10      onoe 	s = splnet();
    213      1.10      onoe 	sc->sc_busy = 1;
    214  1.30.2.2   nathanw 	sc->sc_substate = AWI_ST_NONE;
    215  1.30.2.2   nathanw 	if ((error = awi_hw_init(sc)) != 0) {
    216      1.10      onoe 		sc->sc_invalid = 1;
    217      1.10      onoe 		splx(s);
    218      1.10      onoe 		return error;
    219      1.10      onoe 	}
    220      1.10      onoe 	error = awi_init_mibs(sc);
    221  1.30.2.2   nathanw 	if (error != 0) {
    222      1.10      onoe 		sc->sc_invalid = 1;
    223  1.30.2.2   nathanw 		splx(s);
    224      1.10      onoe 		return error;
    225      1.10      onoe 	}
    226      1.10      onoe 	ifp->if_softc = sc;
    227  1.30.2.2   nathanw 	ifp->if_flags =
    228  1.30.2.2   nathanw 	    IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST | IFF_NOTRAILERS;
    229      1.10      onoe 	ifp->if_ioctl = awi_ioctl;
    230  1.30.2.2   nathanw 	ifp->if_start = awi_start;
    231  1.30.2.1   nathanw 	ifp->if_init = awi_init;
    232  1.30.2.1   nathanw 	ifp->if_stop = awi_stop;
    233  1.30.2.2   nathanw 	ifp->if_watchdog = awi_watchdog;
    234      1.29   thorpej 	IFQ_SET_READY(&ifp->if_snd);
    235  1.30.2.2   nathanw 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
    236  1.30.2.2   nathanw 
    237  1.30.2.8   nathanw 	ic->ic_flags =
    238  1.30.2.8   nathanw 	    IEEE80211_F_HASWEP | IEEE80211_F_HASIBSS | IEEE80211_F_HASHOSTAP;
    239  1.30.2.6   nathanw 	if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
    240  1.30.2.8   nathanw 		ic->ic_phytype = IEEE80211_T_FH;
    241  1.30.2.8   nathanw 	else {
    242  1.30.2.8   nathanw 		ic->ic_phytype = IEEE80211_T_DS;
    243  1.30.2.8   nathanw 		ic->ic_flags |= IEEE80211_F_HASAHDEMO;
    244  1.30.2.8   nathanw 	}
    245  1.30.2.8   nathanw 	ic->ic_opmode = IEEE80211_M_STA;
    246  1.30.2.6   nathanw 	ic->ic_state = IEEE80211_S_INIT;
    247  1.30.2.2   nathanw 	ic->ic_newstate = awi_newstate;
    248  1.30.2.2   nathanw 	ic->ic_chancheck = awi_chan_check;
    249  1.30.2.2   nathanw 	nrate = sc->sc_mib_phy.aSuprt_Data_Rates[1];
    250  1.30.2.2   nathanw 	memcpy(ic->ic_sup_rates, sc->sc_mib_phy.aSuprt_Data_Rates + 2, nrate);
    251  1.30.2.8   nathanw 	IEEE80211_ADDR_COPY(ic->ic_myaddr, sc->sc_mib_addr.aMAC_Address);
    252       1.1  sommerfe 
    253      1.18      onoe 	printf("%s: IEEE802.11 %s %dMbps (firmware %s)\n",
    254      1.10      onoe 	    sc->sc_dev.dv_xname,
    255      1.10      onoe 	    sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH ? "FH" : "DS",
    256  1.30.2.2   nathanw 	    (ic->ic_sup_rates[nrate - 1] & IEEE80211_RATE_VAL) / 2,
    257  1.30.2.2   nathanw 	    sc->sc_banner);
    258  1.30.2.2   nathanw 	printf("%s: 802.11 address: %s\n", sc->sc_dev.dv_xname,
    259  1.30.2.2   nathanw 	    ether_sprintf(ic->ic_myaddr));
    260  1.30.2.2   nathanw 
    261      1.10      onoe 	if_attach(ifp);
    262  1.30.2.2   nathanw 	ieee80211_ifattach(ifp);
    263       1.1  sommerfe 
    264  1.30.2.6   nathanw 	/* probe request is handled by hardware */
    265  1.30.2.6   nathanw 	ic->ic_send_mgmt[IEEE80211_FC0_SUBTYPE_PROBE_REQ
    266  1.30.2.6   nathanw 	    >> IEEE80211_FC0_SUBTYPE_SHIFT] = NULL;
    267  1.30.2.6   nathanw 	ic->ic_recv_mgmt[IEEE80211_FC0_SUBTYPE_PROBE_REQ
    268  1.30.2.6   nathanw 	    >> IEEE80211_FC0_SUBTYPE_SHIFT] = NULL;
    269  1.30.2.6   nathanw 
    270      1.10      onoe 	ifmedia_init(&sc->sc_media, 0, awi_media_change, awi_media_status);
    271  1.30.2.7   nathanw #define	ADD(s, o)	ifmedia_add(&sc->sc_media, \
    272  1.30.2.7   nathanw 	IFM_MAKEWORD(IFM_IEEE80211, (s), (o), 0), 0, NULL)
    273  1.30.2.7   nathanw 	ADD(IFM_AUTO, 0);				/* infra mode */
    274  1.30.2.7   nathanw 	ADD(IFM_AUTO, IFM_FLAG0);			/* melco compat mode */
    275  1.30.2.7   nathanw 	ADD(IFM_AUTO, IFM_IEEE80211_ADHOC);		/* IBSS mode */
    276  1.30.2.7   nathanw 	if (sc->sc_mib_phy.IEEE_PHY_Type != AWI_PHY_TYPE_FH)
    277  1.30.2.7   nathanw 		ADD(IFM_AUTO, IFM_IEEE80211_ADHOC | IFM_FLAG0);
    278  1.30.2.7   nathanw 							/* lucent compat mode */
    279  1.30.2.7   nathanw 	ADD(IFM_AUTO, IFM_IEEE80211_HOSTAP);
    280  1.30.2.2   nathanw 	for (i = 0; i < nrate; i++) {
    281  1.30.2.7   nathanw 		mword = ieee80211_rate2media(ic->ic_sup_rates[i],
    282  1.30.2.8   nathanw 		    ic->ic_phytype);
    283      1.10      onoe 		if (mword == 0)
    284      1.10      onoe 			continue;
    285  1.30.2.7   nathanw 		ADD(mword, 0);
    286  1.30.2.7   nathanw 		ADD(mword, IFM_FLAG0);
    287  1.30.2.7   nathanw 		ADD(mword, IFM_IEEE80211_ADHOC);
    288      1.20      onoe 		if (sc->sc_mib_phy.IEEE_PHY_Type != AWI_PHY_TYPE_FH)
    289  1.30.2.7   nathanw 			ADD(mword, IFM_IEEE80211_ADHOC | IFM_FLAG0);
    290  1.30.2.7   nathanw 		ADD(mword, IFM_IEEE80211_HOSTAP);
    291       1.1  sommerfe 	}
    292  1.30.2.7   nathanw #undef	ADD
    293      1.10      onoe 	awi_media_status(ifp, &imr);
    294      1.10      onoe 	ifmedia_set(&sc->sc_media, imr.ifm_active);
    295  1.30.2.2   nathanw 
    296  1.30.2.2   nathanw 	if ((sc->sc_sdhook = shutdownhook_establish(awi_shutdown, sc)) == NULL)
    297  1.30.2.2   nathanw 		printf("%s: WARNING: unable to establish shutdown hook\n",
    298  1.30.2.2   nathanw 		    sc->sc_dev.dv_xname);
    299  1.30.2.2   nathanw 	if ((sc->sc_powerhook = powerhook_establish(awi_power, sc)) == NULL)
    300  1.30.2.2   nathanw 		printf("%s: WARNING: unable to establish power hook\n",
    301  1.30.2.2   nathanw 		    sc->sc_dev.dv_xname);
    302  1.30.2.2   nathanw 	sc->sc_attached = 1;
    303  1.30.2.2   nathanw 	splx(s);
    304       1.1  sommerfe 
    305      1.10      onoe 	/* ready to accept ioctl */
    306      1.10      onoe 	awi_unlock(sc);
    307      1.17     jhawk 
    308      1.10      onoe 	return 0;
    309       1.1  sommerfe }
    310       1.1  sommerfe 
    311      1.10      onoe int
    312  1.30.2.2   nathanw awi_detach(struct awi_softc *sc)
    313       1.1  sommerfe {
    314  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    315      1.10      onoe 	int s;
    316      1.17     jhawk 
    317      1.17     jhawk 	if (!sc->sc_attached)
    318  1.30.2.2   nathanw 		return 0;
    319       1.1  sommerfe 
    320      1.10      onoe 	s = splnet();
    321      1.10      onoe 	sc->sc_invalid = 1;
    322  1.30.2.1   nathanw 	awi_stop(ifp, 1);
    323      1.10      onoe 	while (sc->sc_sleep_cnt > 0) {
    324      1.10      onoe 		wakeup(sc);
    325      1.10      onoe 		(void)tsleep(sc, PWAIT, "awidet", 1);
    326       1.1  sommerfe 	}
    327      1.10      onoe 	ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY);
    328  1.30.2.2   nathanw 	ieee80211_ifdetach(ifp);
    329      1.10      onoe 	if_detach(ifp);
    330  1.30.2.2   nathanw 	shutdownhook_disestablish(sc->sc_sdhook);
    331  1.30.2.2   nathanw 	powerhook_disestablish(sc->sc_powerhook);
    332      1.10      onoe 	splx(s);
    333      1.10      onoe 	return 0;
    334       1.1  sommerfe }
    335       1.1  sommerfe 
    336       1.1  sommerfe int
    337  1.30.2.2   nathanw awi_activate(struct device *self, enum devact act)
    338       1.1  sommerfe {
    339      1.10      onoe 	struct awi_softc *sc = (struct awi_softc *)self;
    340  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    341      1.10      onoe 	int s, error = 0;
    342      1.10      onoe 
    343      1.10      onoe 	s = splnet();
    344      1.10      onoe 	switch (act) {
    345      1.10      onoe 	case DVACT_ACTIVATE:
    346      1.10      onoe 		error = EOPNOTSUPP;
    347      1.10      onoe 		break;
    348      1.10      onoe 	case DVACT_DEACTIVATE:
    349      1.10      onoe 		sc->sc_invalid = 1;
    350  1.30.2.2   nathanw 		if_deactivate(ifp);
    351      1.10      onoe 		break;
    352       1.1  sommerfe 	}
    353      1.10      onoe 	splx(s);
    354      1.10      onoe 	return error;
    355       1.1  sommerfe }
    356       1.1  sommerfe 
    357       1.1  sommerfe void
    358  1.30.2.2   nathanw awi_power(int why, void *arg)
    359       1.1  sommerfe {
    360  1.30.2.2   nathanw 	struct awi_softc *sc = arg;
    361  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    362      1.10      onoe 	int s;
    363      1.18      onoe 	int ocansleep;
    364      1.10      onoe 
    365  1.30.2.2   nathanw 	DPRINTF(("awi_power: %d\n", why));
    366      1.10      onoe 	s = splnet();
    367      1.18      onoe 	ocansleep = sc->sc_cansleep;
    368      1.18      onoe 	sc->sc_cansleep = 0;
    369      1.28  takemura 	switch (why) {
    370      1.28  takemura 	case PWR_SUSPEND:
    371      1.28  takemura 	case PWR_STANDBY:
    372  1.30.2.1   nathanw 		awi_stop(ifp, 1);
    373      1.28  takemura 		break;
    374      1.28  takemura 	case PWR_RESUME:
    375  1.30.2.1   nathanw 		if (ifp->if_flags & IFF_UP) {
    376  1.30.2.1   nathanw 			awi_init(ifp);
    377  1.30.2.2   nathanw 			(void)awi_intr(sc);	/* make sure */
    378  1.30.2.1   nathanw 		}
    379      1.28  takemura 		break;
    380      1.28  takemura 	case PWR_SOFTSUSPEND:
    381      1.28  takemura 	case PWR_SOFTSTANDBY:
    382      1.28  takemura 	case PWR_SOFTRESUME:
    383      1.28  takemura 		break;
    384      1.18      onoe 	}
    385      1.18      onoe 	sc->sc_cansleep = ocansleep;
    386      1.10      onoe 	splx(s);
    387       1.1  sommerfe }
    388       1.1  sommerfe 
    389  1.30.2.2   nathanw void
    390  1.30.2.2   nathanw awi_shutdown(void *arg)
    391       1.1  sommerfe {
    392  1.30.2.2   nathanw 	struct awi_softc *sc = arg;
    393  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    394       1.1  sommerfe 
    395  1.30.2.2   nathanw 	if (sc->sc_attached)
    396  1.30.2.2   nathanw 		awi_stop(ifp, 1);
    397       1.1  sommerfe }
    398       1.1  sommerfe 
    399       1.1  sommerfe int
    400  1.30.2.2   nathanw awi_intr(void *arg)
    401       1.1  sommerfe {
    402       1.1  sommerfe 	struct awi_softc *sc = arg;
    403      1.10      onoe 	u_int16_t status;
    404      1.10      onoe 	int error, handled = 0, ocansleep;
    405  1.30.2.2   nathanw #ifdef AWI_DEBUG
    406  1.30.2.2   nathanw 	static const char *intname[] = {
    407  1.30.2.2   nathanw 	    "CMD", "RX", "TX", "SCAN_CMPLT",
    408  1.30.2.2   nathanw 	    "CFP_START", "DTIM", "CFP_ENDING", "GROGGY",
    409  1.30.2.2   nathanw 	    "TXDATA", "TXBCAST", "TXPS", "TXCF",
    410  1.30.2.2   nathanw 	    "TXMGT", "#13", "RXDATA", "RXMGT"
    411  1.30.2.2   nathanw 	};
    412  1.30.2.2   nathanw #endif
    413       1.1  sommerfe 
    414      1.15      onoe 	if (!sc->sc_enabled || !sc->sc_enab_intr || sc->sc_invalid)
    415      1.10      onoe 		return 0;
    416       1.1  sommerfe 
    417      1.10      onoe 	am79c930_gcr_setbits(&sc->sc_chip,
    418      1.10      onoe 	    AM79C930_GCR_DISPWDN | AM79C930_GCR_ECINT);
    419       1.1  sommerfe 	awi_write_1(sc, AWI_DIS_PWRDN, 1);
    420      1.10      onoe 	ocansleep = sc->sc_cansleep;
    421      1.10      onoe 	sc->sc_cansleep = 0;
    422      1.10      onoe 
    423       1.1  sommerfe 	for (;;) {
    424  1.30.2.2   nathanw 		if ((error = awi_intr_lock(sc)) != 0)
    425      1.10      onoe 			break;
    426      1.10      onoe 		status = awi_read_1(sc, AWI_INTSTAT);
    427      1.10      onoe 		awi_write_1(sc, AWI_INTSTAT, 0);
    428      1.10      onoe 		awi_write_1(sc, AWI_INTSTAT, 0);
    429      1.10      onoe 		status |= awi_read_1(sc, AWI_INTSTAT2) << 8;
    430      1.10      onoe 		awi_write_1(sc, AWI_INTSTAT2, 0);
    431      1.10      onoe 		DELAY(10);
    432      1.10      onoe 		awi_intr_unlock(sc);
    433      1.10      onoe 		if (!sc->sc_cmd_inprog)
    434      1.10      onoe 			status &= ~AWI_INT_CMD;	/* make sure */
    435      1.10      onoe 		if (status == 0)
    436       1.1  sommerfe 			break;
    437  1.30.2.2   nathanw #ifdef AWI_DEBUG
    438  1.30.2.2   nathanw 		if (awi_debug > 1) {
    439  1.30.2.2   nathanw 			int i;
    440  1.30.2.2   nathanw 
    441  1.30.2.2   nathanw 			printf("awi_intr: status 0x%04x", status);
    442  1.30.2.2   nathanw 			for (i = 0; i < sizeof(intname)/sizeof(intname[0]);
    443  1.30.2.2   nathanw 			    i++) {
    444  1.30.2.2   nathanw 				if (status & (1 << i))
    445  1.30.2.2   nathanw 					printf(" %s", intname[i]);
    446  1.30.2.2   nathanw 			}
    447  1.30.2.2   nathanw 			printf("\n");
    448  1.30.2.2   nathanw 		}
    449  1.30.2.2   nathanw #endif
    450       1.1  sommerfe 		handled = 1;
    451      1.10      onoe 		if (status & AWI_INT_RX)
    452  1.30.2.2   nathanw 			awi_rx_int(sc);
    453      1.10      onoe 		if (status & AWI_INT_TX)
    454  1.30.2.2   nathanw 			awi_tx_int(sc);
    455      1.10      onoe 		if (status & AWI_INT_CMD)
    456      1.10      onoe 			awi_cmd_done(sc);
    457      1.10      onoe 		if (status & AWI_INT_SCAN_CMPLT) {
    458  1.30.2.6   nathanw 			if (sc->sc_ic.ic_state == IEEE80211_S_SCAN &&
    459  1.30.2.6   nathanw 			    sc->sc_substate == AWI_ST_NONE)
    460  1.30.2.2   nathanw 				ieee80211_next_scan(&sc->sc_ic.ic_if);
    461       1.1  sommerfe 		}
    462       1.1  sommerfe 	}
    463      1.10      onoe 	sc->sc_cansleep = ocansleep;
    464       1.1  sommerfe 	am79c930_gcr_clearbits(&sc->sc_chip, AM79C930_GCR_DISPWDN);
    465       1.1  sommerfe 	awi_write_1(sc, AWI_DIS_PWRDN, 0);
    466       1.1  sommerfe 	return handled;
    467       1.1  sommerfe }
    468       1.1  sommerfe 
    469  1.30.2.2   nathanw static int
    470  1.30.2.2   nathanw awi_init(struct ifnet *ifp)
    471       1.8  sommerfe {
    472  1.30.2.1   nathanw 	struct awi_softc *sc = ifp->if_softc;
    473  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    474  1.30.2.8   nathanw 	struct ieee80211_node *ni = &ic->ic_bss;
    475  1.30.2.2   nathanw 	int i, error;
    476       1.8  sommerfe 
    477  1.30.2.2   nathanw 	DPRINTF(("awi_init: enabled=%d\n", sc->sc_enabled));
    478  1.30.2.2   nathanw 	if (sc->sc_enabled) {
    479  1.30.2.2   nathanw 		awi_stop(ifp, 0);
    480  1.30.2.2   nathanw 	} else {
    481      1.10      onoe 		if (sc->sc_enable)
    482      1.10      onoe 			(*sc->sc_enable)(sc);
    483  1.30.2.2   nathanw 		sc->sc_enabled = 1;
    484  1.30.2.2   nathanw 		if ((error = awi_hw_init(sc)) != 0) {
    485  1.30.2.1   nathanw 			awi_stop(ifp, 1);
    486      1.10      onoe 			return error;
    487  1.30.2.1   nathanw 		}
    488      1.10      onoe 	}
    489  1.30.2.2   nathanw 	ic->ic_state = IEEE80211_S_INIT;
    490  1.30.2.2   nathanw 
    491  1.30.2.8   nathanw 	ic->ic_flags &= ~IEEE80211_F_IBSSON;
    492  1.30.2.8   nathanw 	switch (ic->ic_opmode) {
    493  1.30.2.8   nathanw 	case IEEE80211_M_STA:
    494  1.30.2.8   nathanw 		sc->sc_mib_local.Network_Mode = 1;
    495  1.30.2.8   nathanw 		sc->sc_mib_local.Acting_as_AP = 0;
    496  1.30.2.8   nathanw 		break;
    497  1.30.2.8   nathanw 	case IEEE80211_M_IBSS:
    498  1.30.2.8   nathanw 		ic->ic_flags |= IEEE80211_F_IBSSON;
    499  1.30.2.8   nathanw 	case IEEE80211_M_AHDEMO:
    500  1.30.2.8   nathanw 		sc->sc_mib_local.Network_Mode = 0;
    501  1.30.2.8   nathanw 		sc->sc_mib_local.Acting_as_AP = 0;
    502  1.30.2.8   nathanw 		break;
    503  1.30.2.8   nathanw 	case IEEE80211_M_HOSTAP:
    504  1.30.2.8   nathanw 		sc->sc_mib_local.Network_Mode = 1;
    505  1.30.2.8   nathanw 		sc->sc_mib_local.Acting_as_AP = 1;
    506  1.30.2.8   nathanw 		break;
    507  1.30.2.8   nathanw 	}
    508  1.30.2.8   nathanw 	IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
    509  1.30.2.5   nathanw 	memset(&sc->sc_mib_mac.aDesired_ESS_ID, 0, AWI_ESS_ID_SIZE);
    510  1.30.2.5   nathanw 	sc->sc_mib_mac.aDesired_ESS_ID[0] = IEEE80211_ELEMID_SSID;
    511  1.30.2.7   nathanw 	sc->sc_mib_mac.aDesired_ESS_ID[1] = ic->ic_des_esslen;
    512  1.30.2.7   nathanw 	memcpy(&sc->sc_mib_mac.aDesired_ESS_ID[2], ic->ic_des_essid,
    513  1.30.2.7   nathanw 	    ic->ic_des_esslen);
    514  1.30.2.2   nathanw 
    515  1.30.2.2   nathanw 	if ((error = awi_mode_init(sc)) != 0) {
    516  1.30.2.2   nathanw 		DPRINTF(("awi_init: awi_mode_init failed %d\n", error));
    517  1.30.2.1   nathanw 		awi_stop(ifp, 1);
    518      1.10      onoe 		return error;
    519      1.10      onoe 	}
    520       1.8  sommerfe 
    521  1.30.2.2   nathanw 	/* start transmitter */
    522  1.30.2.2   nathanw 	sc->sc_txdone = sc->sc_txnext = sc->sc_txbase;
    523  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_START, 0);
    524  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_NEXT, 0);
    525  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_LENGTH, 0);
    526  1.30.2.2   nathanw 	awi_write_1(sc, sc->sc_txbase + AWI_TXD_RATE, 0);
    527  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_NDA, 0);
    528  1.30.2.2   nathanw 	awi_write_4(sc, sc->sc_txbase + AWI_TXD_NRA, 0);
    529  1.30.2.2   nathanw 	awi_write_1(sc, sc->sc_txbase + AWI_TXD_STATE, 0);
    530  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_DATA, sc->sc_txbase);
    531  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_MGT, 0);
    532  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_BCAST, 0);
    533  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_PS, 0);
    534  1.30.2.2   nathanw 	awi_write_4(sc, AWI_CA_TX_CF, 0);
    535  1.30.2.2   nathanw 	if ((error = awi_cmd(sc, AWI_CMD_INIT_TX, AWI_WAIT)) != 0) {
    536  1.30.2.2   nathanw 		DPRINTF(("awi_init: failed to start transmitter: %d\n", error));
    537  1.30.2.2   nathanw 		awi_stop(ifp, 1);
    538  1.30.2.2   nathanw 		return error;
    539      1.10      onoe 	}
    540  1.30.2.2   nathanw 
    541  1.30.2.2   nathanw 	/* start receiver */
    542  1.30.2.2   nathanw 	if ((error = awi_cmd(sc, AWI_CMD_INIT_RX, AWI_WAIT)) != 0) {
    543  1.30.2.2   nathanw 		DPRINTF(("awi_init: failed to start receiver: %d\n", error));
    544  1.30.2.2   nathanw 		awi_stop(ifp, 1);
    545  1.30.2.2   nathanw 		return error;
    546      1.18      onoe 	}
    547  1.30.2.2   nathanw 	sc->sc_rxdoff = awi_read_4(sc, AWI_CA_IRX_DATA_DESC);
    548  1.30.2.2   nathanw 	sc->sc_rxmoff = awi_read_4(sc, AWI_CA_IRX_PS_DESC);
    549  1.30.2.2   nathanw 
    550  1.30.2.2   nathanw 	ifp->if_flags |= IFF_RUNNING;
    551  1.30.2.2   nathanw 	ifp->if_flags &= ~IFF_OACTIVE;
    552  1.30.2.2   nathanw 
    553  1.30.2.8   nathanw 	if (ic->ic_opmode == IEEE80211_M_AHDEMO ||
    554  1.30.2.8   nathanw 	    ic->ic_opmode == IEEE80211_M_HOSTAP) {
    555  1.30.2.8   nathanw 		ni->ni_chan = ic->ic_ibss_chan;
    556  1.30.2.8   nathanw 		ni->ni_intval = ic->ic_lintval;
    557  1.30.2.8   nathanw 		ni->ni_rssi = 0;
    558  1.30.2.8   nathanw 		ni->ni_rstamp = 0;
    559  1.30.2.8   nathanw 		memset(ni->ni_tstamp, 0, sizeof(ni->ni_tstamp));
    560  1.30.2.8   nathanw 		ni->ni_nrate = 0;
    561  1.30.2.2   nathanw 		for (i = 0; i < IEEE80211_RATE_SIZE; i++) {
    562  1.30.2.2   nathanw 			if (ic->ic_sup_rates[i])
    563  1.30.2.8   nathanw 				ni->ni_rates[ni->ni_nrate++] =
    564  1.30.2.2   nathanw 				    ic->ic_sup_rates[i];
    565  1.30.2.2   nathanw 		}
    566  1.30.2.8   nathanw 		IEEE80211_ADDR_COPY(ni->ni_macaddr, ic->ic_myaddr);
    567  1.30.2.8   nathanw 		if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
    568  1.30.2.8   nathanw 			IEEE80211_ADDR_COPY(ni->ni_bssid, ic->ic_myaddr);
    569  1.30.2.8   nathanw 			ni->ni_esslen = ic->ic_des_esslen;
    570  1.30.2.8   nathanw 			memcpy(ni->ni_essid, ic->ic_des_essid, ni->ni_esslen);
    571  1.30.2.8   nathanw 			ni->ni_capinfo = IEEE80211_CAPINFO_ESS;
    572  1.30.2.8   nathanw 			if (ic->ic_phytype == IEEE80211_T_FH) {
    573  1.30.2.8   nathanw 				ni->ni_fhdwell = 200;   /* XXX */
    574  1.30.2.8   nathanw 				ni->ni_fhindex = 1;
    575  1.30.2.7   nathanw 			}
    576  1.30.2.7   nathanw 		} else {
    577  1.30.2.8   nathanw 			ni->ni_capinfo = IEEE80211_CAPINFO_IBSS;
    578  1.30.2.8   nathanw 			memset(ni->ni_bssid, 0, IEEE80211_ADDR_LEN);
    579  1.30.2.8   nathanw 			ni->ni_esslen = 0;
    580  1.30.2.7   nathanw 		}
    581  1.30.2.7   nathanw 		if (ic->ic_flags & IEEE80211_F_WEPON)
    582  1.30.2.8   nathanw 			ni->ni_capinfo |= IEEE80211_CAPINFO_PRIVACY;
    583  1.30.2.8   nathanw 		if (ic->ic_opmode != IEEE80211_M_AHDEMO)
    584  1.30.2.8   nathanw 			ic->ic_flags |= IEEE80211_F_SIBSS;
    585  1.30.2.2   nathanw 		ic->ic_state = IEEE80211_S_SCAN;	/*XXX*/
    586  1.30.2.2   nathanw 		sc->sc_substate = AWI_ST_NONE;
    587  1.30.2.2   nathanw 		ieee80211_new_state(&ic->ic_if, IEEE80211_S_RUN, -1);
    588  1.30.2.2   nathanw 	} else {
    589  1.30.2.8   nathanw 		ni->ni_chan = sc->sc_cur_chan;
    590  1.30.2.2   nathanw 		ieee80211_new_state(&ic->ic_if, IEEE80211_S_SCAN, -1);
    591  1.30.2.1   nathanw 	}
    592  1.30.2.2   nathanw 	return 0;
    593       1.1  sommerfe }
    594       1.1  sommerfe 
    595      1.10      onoe static void
    596  1.30.2.2   nathanw awi_stop(struct ifnet *ifp, int disable)
    597       1.1  sommerfe {
    598       1.1  sommerfe 	struct awi_softc *sc = ifp->if_softc;
    599       1.1  sommerfe 
    600  1.30.2.2   nathanw 	if (!sc->sc_enabled)
    601       1.1  sommerfe 		return;
    602       1.1  sommerfe 
    603  1.30.2.2   nathanw 	DPRINTF(("awi_stop(%d)\n", disable));
    604  1.30.2.2   nathanw 
    605  1.30.2.2   nathanw 	ieee80211_new_state(&sc->sc_ic.ic_if, IEEE80211_S_INIT, -1);
    606  1.30.2.2   nathanw 
    607  1.30.2.2   nathanw 	if (!sc->sc_invalid) {
    608  1.30.2.2   nathanw 		if (sc->sc_cmd_inprog)
    609  1.30.2.2   nathanw 			(void)awi_cmd_wait(sc);
    610  1.30.2.2   nathanw 		(void)awi_cmd(sc, AWI_CMD_KILL_RX, AWI_WAIT);
    611  1.30.2.2   nathanw 		sc->sc_cmd_inprog = AWI_CMD_FLUSH_TX;
    612  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_DATA, 1);
    613  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_MGT, 0);
    614  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_BCAST, 0);
    615  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_PS, 0);
    616  1.30.2.2   nathanw 		awi_write_1(sc, AWI_CA_FTX_CF, 0);
    617  1.30.2.2   nathanw 		(void)awi_cmd(sc, AWI_CMD_FLUSH_TX, AWI_WAIT);
    618  1.30.2.2   nathanw 	}
    619  1.30.2.2   nathanw 	ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
    620  1.30.2.2   nathanw 	ifp->if_timer = 0;
    621  1.30.2.2   nathanw 	sc->sc_tx_timer = sc->sc_rx_timer = 0;
    622  1.30.2.2   nathanw 	if (sc->sc_rxpend != NULL) {
    623  1.30.2.2   nathanw 		m_freem(sc->sc_rxpend);
    624  1.30.2.2   nathanw 		sc->sc_rxpend = NULL;
    625       1.1  sommerfe 	}
    626  1.30.2.2   nathanw 	IFQ_PURGE(&ifp->if_snd);
    627       1.1  sommerfe 
    628  1.30.2.2   nathanw 	if (disable) {
    629  1.30.2.2   nathanw 		if (sc->sc_disable)
    630  1.30.2.2   nathanw 			(*sc->sc_disable)(sc);
    631  1.30.2.2   nathanw 		sc->sc_enabled = 0;
    632  1.30.2.2   nathanw 	}
    633       1.1  sommerfe }
    634       1.1  sommerfe 
    635      1.10      onoe static void
    636  1.30.2.2   nathanw awi_start(struct ifnet *ifp)
    637       1.1  sommerfe {
    638       1.1  sommerfe 	struct awi_softc *sc = ifp->if_softc;
    639  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    640  1.30.2.8   nathanw 	struct ieee80211_frame *wh;
    641  1.30.2.2   nathanw 	struct mbuf *m, *m0;
    642  1.30.2.6   nathanw 	int len, dowep;
    643      1.10      onoe 	u_int32_t txd, frame, ntxd;
    644      1.10      onoe 	u_int8_t rate;
    645  1.30.2.2   nathanw 
    646  1.30.2.2   nathanw 	if (!sc->sc_enabled || sc->sc_invalid)
    647  1.30.2.2   nathanw 		return;
    648       1.1  sommerfe 
    649      1.10      onoe 	for (;;) {
    650      1.10      onoe 		txd = sc->sc_txnext;
    651  1.30.2.2   nathanw 		IF_POLL(&ic->ic_mgtq, m0);
    652  1.30.2.6   nathanw 		dowep = 0;
    653      1.10      onoe 		if (m0 != NULL) {
    654  1.30.2.6   nathanw 			len = m0->m_pkthdr.len;
    655  1.30.2.6   nathanw 			if (awi_next_txd(sc, len, &frame, &ntxd)) {
    656      1.10      onoe 				ifp->if_flags |= IFF_OACTIVE;
    657      1.10      onoe 				break;
    658      1.10      onoe 			}
    659  1.30.2.2   nathanw 			IF_DEQUEUE(&ic->ic_mgtq, m0);
    660      1.10      onoe 		} else {
    661  1.30.2.2   nathanw 			if (ic->ic_state != IEEE80211_S_RUN)
    662      1.10      onoe 				break;
    663      1.29   thorpej 			IFQ_POLL(&ifp->if_snd, m0);
    664      1.10      onoe 			if (m0 == NULL)
    665      1.10      onoe 				break;
    666  1.30.2.2   nathanw 			/*
    667  1.30.2.2   nathanw 			 * Need to calculate the real length to determine
    668  1.30.2.2   nathanw 			 * if the transmit buffer has a room for the packet.
    669  1.30.2.2   nathanw 			 */
    670      1.18      onoe 			len = m0->m_pkthdr.len + sizeof(struct ieee80211_frame);
    671  1.30.2.2   nathanw 			if (!(ifp->if_flags & IFF_LINK0) && !sc->sc_adhoc_ap)
    672      1.18      onoe 				len += sizeof(struct llc) -
    673      1.18      onoe 				    sizeof(struct ether_header);
    674  1.30.2.6   nathanw 			if (ic->ic_flags & IEEE80211_F_WEPON) {
    675  1.30.2.6   nathanw 				dowep = 1;
    676      1.18      onoe 				len += IEEE80211_WEP_IVLEN +
    677      1.18      onoe 				    IEEE80211_WEP_KIDLEN + IEEE80211_WEP_CRCLEN;
    678  1.30.2.6   nathanw 			}
    679      1.18      onoe 			if (awi_next_txd(sc, len, &frame, &ntxd)) {
    680      1.10      onoe 				ifp->if_flags |= IFF_OACTIVE;
    681       1.1  sommerfe 				break;
    682      1.10      onoe 			}
    683      1.29   thorpej 			IFQ_DEQUEUE(&ifp->if_snd, m0);
    684  1.30.2.2   nathanw 			ifp->if_opackets++;
    685  1.30.2.2   nathanw #if NBPFILTER > 0
    686  1.30.2.2   nathanw 			if (ifp->if_bpf)
    687  1.30.2.2   nathanw 				bpf_mtap(ifp->if_bpf, m0);
    688  1.30.2.1   nathanw #endif
    689  1.30.2.2   nathanw 			if ((ifp->if_flags & IFF_LINK0) || sc->sc_adhoc_ap)
    690  1.30.2.2   nathanw 				m0 = awi_ether_encap(sc, m0);
    691  1.30.2.2   nathanw 			else
    692  1.30.2.2   nathanw 				m0 = ieee80211_encap(ifp, m0);
    693      1.10      onoe 			if (m0 == NULL) {
    694      1.10      onoe 				ifp->if_oerrors++;
    695      1.10      onoe 				continue;
    696      1.10      onoe 			}
    697  1.30.2.8   nathanw 			wh = mtod(m0, struct ieee80211_frame *);
    698  1.30.2.8   nathanw 			if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
    699  1.30.2.8   nathanw 			    (ic->ic_opmode == IEEE80211_M_HOSTAP ||
    700  1.30.2.8   nathanw 			     ic->ic_opmode == IEEE80211_M_IBSS) &&
    701  1.30.2.8   nathanw 			    sc->sc_adhoc_ap == 0 &&
    702  1.30.2.8   nathanw 			    (ifp->if_flags & IFF_LINK0) == 0 &&
    703  1.30.2.8   nathanw 			    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
    704  1.30.2.8   nathanw 			    IEEE80211_FC0_TYPE_DATA &&
    705  1.30.2.8   nathanw 			    ieee80211_find_node(ic, wh->i_addr1) == NULL) {
    706  1.30.2.8   nathanw 				m_freem(m0);
    707  1.30.2.8   nathanw 				ifp->if_oerrors++;
    708  1.30.2.8   nathanw 				continue;
    709  1.30.2.8   nathanw 			}
    710  1.30.2.6   nathanw 		}
    711  1.30.2.7   nathanw #if NBPFILTER > 0
    712  1.30.2.7   nathanw 		if (ic->ic_rawbpf)
    713  1.30.2.7   nathanw 			bpf_mtap(ic->ic_rawbpf, m0);
    714  1.30.2.7   nathanw #endif
    715  1.30.2.6   nathanw 		if (dowep) {
    716  1.30.2.6   nathanw 			if ((m0 = ieee80211_wep_crypt(ifp, m0, 1)) == NULL) {
    717  1.30.2.2   nathanw 				ifp->if_oerrors++;
    718  1.30.2.2   nathanw 				continue;
    719  1.30.2.2   nathanw 			}
    720       1.1  sommerfe 		}
    721  1.30.2.6   nathanw #ifdef DIAGNOSTIC
    722  1.30.2.6   nathanw 		if (m0->m_pkthdr.len != len) {
    723  1.30.2.6   nathanw 			printf("%s: length %d should be %d\n",
    724  1.30.2.6   nathanw 			    ifp->if_xname, m0->m_pkthdr.len, len);
    725  1.30.2.6   nathanw 			m_freem(m0);
    726  1.30.2.6   nathanw 			ifp->if_oerrors++;
    727  1.30.2.6   nathanw 			continue;
    728  1.30.2.6   nathanw 		}
    729  1.30.2.6   nathanw #endif
    730  1.30.2.2   nathanw 
    731  1.30.2.2   nathanw 		if ((ifp->if_flags & IFF_DEBUG) && (ifp->if_flags & IFF_LINK2))
    732  1.30.2.2   nathanw 			ieee80211_dump_pkt(m0->m_data, m0->m_len,
    733  1.30.2.8   nathanw 			    ic->ic_bss.ni_rates[ic->ic_bss.ni_txrate] &
    734  1.30.2.2   nathanw 			    IEEE80211_RATE_VAL, -1);
    735  1.30.2.2   nathanw 
    736  1.30.2.2   nathanw 		for (m = m0, len = 0; m != NULL; m = m->m_next) {
    737      1.10      onoe 			awi_write_bytes(sc, frame + len, mtod(m, u_int8_t *),
    738      1.10      onoe 			    m->m_len);
    739      1.10      onoe 			len += m->m_len;
    740       1.4  sommerfe 		}
    741      1.10      onoe 		m_freem(m0);
    742  1.30.2.8   nathanw 		rate = (ic->ic_bss.ni_rates[ic->ic_bss.ni_txrate] &
    743  1.30.2.2   nathanw 		    IEEE80211_RATE_VAL) * 5;
    744      1.10      onoe 		awi_write_1(sc, ntxd + AWI_TXD_STATE, 0);
    745      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_START, frame);
    746      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_NEXT, ntxd);
    747      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_LENGTH, len);
    748      1.10      onoe 		awi_write_1(sc, txd + AWI_TXD_RATE, rate);
    749      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_NDA, 0);
    750      1.10      onoe 		awi_write_4(sc, txd + AWI_TXD_NRA, 0);
    751      1.10      onoe 		awi_write_1(sc, txd + AWI_TXD_STATE, AWI_TXD_ST_OWN);
    752      1.10      onoe 		sc->sc_txnext = ntxd;
    753  1.30.2.2   nathanw 
    754  1.30.2.2   nathanw 		sc->sc_tx_timer = 5;
    755      1.10      onoe 		ifp->if_timer = 1;
    756       1.1  sommerfe 	}
    757       1.1  sommerfe }
    758       1.1  sommerfe 
    759      1.10      onoe static void
    760  1.30.2.2   nathanw awi_watchdog(struct ifnet *ifp)
    761       1.1  sommerfe {
    762  1.30.2.2   nathanw 	struct awi_softc *sc = ifp->if_softc;
    763  1.30.2.2   nathanw 	u_int32_t prevdone;
    764  1.30.2.2   nathanw 	int ocansleep;
    765       1.9  sommerfe 
    766  1.30.2.2   nathanw 	ifp->if_timer = 0;
    767  1.30.2.2   nathanw 	if (!sc->sc_enabled || sc->sc_invalid)
    768  1.30.2.2   nathanw 		return;
    769  1.30.2.2   nathanw 
    770  1.30.2.2   nathanw 	ocansleep = sc->sc_cansleep;
    771  1.30.2.2   nathanw 	sc->sc_cansleep = 0;
    772  1.30.2.2   nathanw 	if (sc->sc_tx_timer) {
    773  1.30.2.2   nathanw 		if (--sc->sc_tx_timer == 0) {
    774  1.30.2.2   nathanw 			printf("%s: device timeout\n", ifp->if_xname);
    775  1.30.2.2   nathanw 			prevdone = sc->sc_txdone;
    776  1.30.2.2   nathanw 			awi_tx_int(sc);
    777  1.30.2.2   nathanw 			if (sc->sc_txdone == prevdone) {
    778  1.30.2.2   nathanw 				ifp->if_oerrors++;
    779  1.30.2.2   nathanw 				awi_init(ifp);
    780  1.30.2.2   nathanw 				goto out;
    781  1.30.2.2   nathanw 			}
    782  1.30.2.2   nathanw 		}
    783  1.30.2.2   nathanw 		ifp->if_timer = 1;
    784      1.10      onoe 	}
    785  1.30.2.2   nathanw 	if (sc->sc_rx_timer) {
    786  1.30.2.2   nathanw 		if (--sc->sc_rx_timer == 0) {
    787  1.30.2.2   nathanw 			if (sc->sc_ic.ic_state == IEEE80211_S_RUN) {
    788  1.30.2.2   nathanw 				ieee80211_new_state(ifp, IEEE80211_S_SCAN, -1);
    789  1.30.2.2   nathanw 				goto out;
    790  1.30.2.2   nathanw 			}
    791  1.30.2.2   nathanw 		} else
    792  1.30.2.2   nathanw 			ifp->if_timer = 1;
    793  1.30.2.2   nathanw 	}
    794  1.30.2.2   nathanw 	/* TODO: rate control */
    795  1.30.2.2   nathanw 	ieee80211_watchdog(ifp);
    796  1.30.2.2   nathanw   out:
    797  1.30.2.2   nathanw 	sc->sc_cansleep = ocansleep;
    798      1.10      onoe }
    799       1.9  sommerfe 
    800  1.30.2.2   nathanw static int
    801  1.30.2.2   nathanw awi_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
    802      1.10      onoe {
    803  1.30.2.2   nathanw 	struct awi_softc *sc = ifp->if_softc;
    804  1.30.2.2   nathanw 	struct ifreq *ifr = (struct ifreq *)data;
    805  1.30.2.2   nathanw 	int s, error;
    806      1.10      onoe 
    807  1.30.2.2   nathanw 	s = splnet();
    808  1.30.2.2   nathanw 	/* serialize ioctl, since we may sleep */
    809  1.30.2.2   nathanw 	if ((error = awi_lock(sc)) != 0)
    810  1.30.2.2   nathanw 		goto cantlock;
    811       1.1  sommerfe 
    812  1.30.2.2   nathanw 	switch (cmd) {
    813  1.30.2.2   nathanw 	case SIOCSIFFLAGS:
    814  1.30.2.2   nathanw 		if (ifp->if_flags & IFF_UP) {
    815  1.30.2.2   nathanw 			if (sc->sc_enabled) {
    816  1.30.2.2   nathanw 				/*
    817  1.30.2.2   nathanw 				 * To avoid rescanning another access point,
    818  1.30.2.2   nathanw 				 * do not call awi_init() here.  Instead,
    819  1.30.2.2   nathanw 				 * only reflect promisc mode settings.
    820  1.30.2.2   nathanw 				 */
    821  1.30.2.2   nathanw 				error = awi_mode_init(sc);
    822  1.30.2.2   nathanw 			} else
    823  1.30.2.2   nathanw 				error = awi_init(ifp);
    824  1.30.2.2   nathanw 		} else if (sc->sc_enabled)
    825  1.30.2.2   nathanw 			awi_stop(ifp, 1);
    826  1.30.2.2   nathanw 		break;
    827  1.30.2.2   nathanw 	case SIOCSIFMEDIA:
    828  1.30.2.2   nathanw 	case SIOCGIFMEDIA:
    829  1.30.2.2   nathanw 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
    830  1.30.2.2   nathanw 		break;
    831  1.30.2.2   nathanw 	case SIOCADDMULTI:
    832  1.30.2.2   nathanw 	case SIOCDELMULTI:
    833  1.30.2.2   nathanw 		error = (cmd == SIOCADDMULTI) ?
    834  1.30.2.2   nathanw 		    ether_addmulti(ifr, &sc->sc_ic.ic_ec) :
    835  1.30.2.2   nathanw 		    ether_delmulti(ifr, &sc->sc_ic.ic_ec);
    836  1.30.2.2   nathanw 		if (error == ENETRESET) {
    837  1.30.2.2   nathanw 			/* do not rescan */
    838  1.30.2.2   nathanw 			if (sc->sc_enabled)
    839  1.30.2.2   nathanw 				error = awi_mode_init(sc);
    840  1.30.2.2   nathanw 			else
    841  1.30.2.2   nathanw 				error = 0;
    842  1.30.2.2   nathanw 		}
    843  1.30.2.2   nathanw 		break;
    844  1.30.2.2   nathanw 	default:
    845  1.30.2.2   nathanw 		error = ieee80211_ioctl(ifp, cmd, data);
    846  1.30.2.2   nathanw 		if (error == ENETRESET) {
    847  1.30.2.2   nathanw 			if (sc->sc_enabled)
    848  1.30.2.2   nathanw 				error = awi_init(ifp);
    849  1.30.2.2   nathanw 			else
    850  1.30.2.2   nathanw 				error = 0;
    851  1.30.2.2   nathanw 		}
    852  1.30.2.2   nathanw 		break;
    853       1.1  sommerfe 	}
    854  1.30.2.2   nathanw 	awi_unlock(sc);
    855  1.30.2.2   nathanw   cantlock:
    856  1.30.2.2   nathanw 	splx(s);
    857  1.30.2.2   nathanw 	return error;
    858      1.10      onoe }
    859       1.9  sommerfe 
    860  1.30.2.2   nathanw /*
    861  1.30.2.2   nathanw  * Called from ifmedia_ioctl via awi_ioctl with lock obtained.
    862  1.30.2.2   nathanw  */
    863  1.30.2.2   nathanw static int
    864  1.30.2.2   nathanw awi_media_change(struct ifnet *ifp)
    865      1.10      onoe {
    866  1.30.2.2   nathanw 	struct awi_softc *sc = ifp->if_softc;
    867  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    868  1.30.2.2   nathanw 	struct ifmedia_entry *ime;
    869  1.30.2.8   nathanw 	enum ieee80211_opmode newmode;
    870  1.30.2.8   nathanw 	int i, rate, newadhoc_ap, error = 0;
    871       1.1  sommerfe 
    872  1.30.2.2   nathanw 	ime = sc->sc_media.ifm_cur;
    873  1.30.2.2   nathanw 	if (IFM_SUBTYPE(ime->ifm_media) == IFM_AUTO) {
    874  1.30.2.8   nathanw 		i = -1;
    875  1.30.2.2   nathanw 	} else {
    876  1.30.2.8   nathanw 		rate = ieee80211_media2rate(ime->ifm_media, ic->ic_phytype);
    877  1.30.2.2   nathanw 		if (rate == 0)
    878  1.30.2.2   nathanw 			return EINVAL;
    879  1.30.2.2   nathanw 		for (i = 0; i < IEEE80211_RATE_SIZE; i++) {
    880  1.30.2.2   nathanw 			if ((ic->ic_sup_rates[i] & IEEE80211_RATE_VAL) == rate)
    881  1.30.2.2   nathanw 				break;
    882  1.30.2.2   nathanw 		}
    883  1.30.2.2   nathanw 		if (i == IEEE80211_RATE_SIZE)
    884  1.30.2.2   nathanw 			return EINVAL;
    885  1.30.2.8   nathanw 	}
    886  1.30.2.8   nathanw 	if (ic->ic_fixed_rate != i) {
    887  1.30.2.2   nathanw 		ic->ic_fixed_rate = i;
    888  1.30.2.8   nathanw 		error = ENETRESET;
    889      1.10      onoe 	}
    890  1.30.2.2   nathanw 
    891  1.30.2.2   nathanw 	/*
    892  1.30.2.8   nathanw 	 * combination of mediaopt
    893  1.30.2.8   nathanw 	 *
    894  1.30.2.8   nathanw 	 * hostap adhoc flag0	opmode  adhoc_ap	comment
    895  1.30.2.8   nathanw 	 *   +      -     -	HOSTAP      0		HostAP
    896  1.30.2.8   nathanw 	 *   -      +     -	IBSS        0		IBSS
    897  1.30.2.8   nathanw 	 *   -      +     +	AHDEMO      0		WaveLAN adhoc
    898  1.30.2.8   nathanw 	 *   -      -     +	IBSS        1		Melco old Sta
    899  1.30.2.8   nathanw 	 *							also LINK0
    900  1.30.2.8   nathanw 	 *   -      -     -	STA         0		Infra Station
    901  1.30.2.2   nathanw 	 */
    902  1.30.2.8   nathanw 	newadhoc_ap = 0;
    903  1.30.2.8   nathanw 	if (ime->ifm_media & IFM_IEEE80211_HOSTAP)
    904  1.30.2.8   nathanw 		newmode = IEEE80211_M_HOSTAP;
    905  1.30.2.8   nathanw 	else if (ime->ifm_media & IFM_IEEE80211_ADHOC) {
    906  1.30.2.8   nathanw 		if (ic->ic_phytype == IEEE80211_T_DS &&
    907  1.30.2.8   nathanw 		    (ime->ifm_media & IFM_FLAG0))
    908  1.30.2.8   nathanw 			newmode = IEEE80211_M_AHDEMO;
    909  1.30.2.8   nathanw 		else
    910  1.30.2.8   nathanw 			newmode = IEEE80211_M_IBSS;
    911  1.30.2.7   nathanw 	} else if (ime->ifm_media & IFM_FLAG0) {
    912  1.30.2.8   nathanw 		newmode = IEEE80211_M_IBSS;
    913  1.30.2.8   nathanw 		newadhoc_ap = 1;
    914  1.30.2.8   nathanw 	} else
    915  1.30.2.8   nathanw 		newmode = IEEE80211_M_STA;
    916  1.30.2.8   nathanw 	if (ic->ic_opmode != newmode || sc->sc_adhoc_ap != newadhoc_ap) {
    917  1.30.2.8   nathanw 		ic->ic_opmode = newmode;
    918  1.30.2.8   nathanw 		sc->sc_adhoc_ap = newadhoc_ap;
    919  1.30.2.8   nathanw 		error = ENETRESET;
    920      1.20      onoe 	}
    921  1.30.2.8   nathanw 
    922  1.30.2.2   nathanw 	if (error == ENETRESET) {
    923  1.30.2.2   nathanw 		if (sc->sc_enabled)
    924  1.30.2.2   nathanw 			error = awi_init(ifp);
    925  1.30.2.2   nathanw 		else
    926  1.30.2.2   nathanw 			error = 0;
    927  1.30.2.2   nathanw 	}
    928  1.30.2.2   nathanw 	return error;
    929       1.1  sommerfe }
    930       1.1  sommerfe 
    931      1.10      onoe static void
    932  1.30.2.2   nathanw awi_media_status(struct ifnet *ifp, struct ifmediareq *imr)
    933       1.1  sommerfe {
    934  1.30.2.2   nathanw 	struct awi_softc *sc = ifp->if_softc;
    935  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
    936  1.30.2.2   nathanw 	int rate;
    937       1.1  sommerfe 
    938  1.30.2.2   nathanw 	imr->ifm_status = IFM_AVALID;
    939  1.30.2.2   nathanw 	if (ic->ic_state == IEEE80211_S_RUN)
    940  1.30.2.2   nathanw 		imr->ifm_status |= IFM_ACTIVE;
    941  1.30.2.2   nathanw 	imr->ifm_active = IFM_IEEE80211;
    942  1.30.2.2   nathanw 	if (ic->ic_state == IEEE80211_S_RUN)
    943  1.30.2.8   nathanw 		rate = ic->ic_bss.ni_rates[ic->ic_bss.ni_txrate] &
    944  1.30.2.2   nathanw 		    IEEE80211_RATE_VAL;
    945  1.30.2.2   nathanw 	else {
    946  1.30.2.2   nathanw 		if (ic->ic_fixed_rate == -1)
    947  1.30.2.2   nathanw 			rate = 0;
    948  1.30.2.2   nathanw 		else
    949  1.30.2.2   nathanw 			rate = ic->ic_sup_rates[ic->ic_fixed_rate] &
    950  1.30.2.2   nathanw 			    IEEE80211_RATE_VAL;
    951      1.10      onoe 	}
    952  1.30.2.8   nathanw 	imr->ifm_active |= ieee80211_rate2media(rate, ic->ic_phytype);
    953  1.30.2.8   nathanw 	switch (ic->ic_opmode) {
    954  1.30.2.8   nathanw 	case IEEE80211_M_STA:
    955  1.30.2.8   nathanw 		break;
    956  1.30.2.8   nathanw 	case IEEE80211_M_IBSS:
    957  1.30.2.2   nathanw 		if (sc->sc_adhoc_ap)
    958  1.30.2.2   nathanw 			imr->ifm_active |= IFM_FLAG0;
    959  1.30.2.8   nathanw 		else
    960  1.30.2.2   nathanw 			imr->ifm_active |= IFM_IEEE80211_ADHOC;
    961  1.30.2.8   nathanw 		break;
    962  1.30.2.8   nathanw 	case IEEE80211_M_AHDEMO:
    963  1.30.2.8   nathanw 		imr->ifm_active |= IFM_IEEE80211_ADHOC | IFM_FLAG0;
    964  1.30.2.8   nathanw 		break;
    965  1.30.2.8   nathanw 	case IEEE80211_M_HOSTAP:
    966  1.30.2.8   nathanw 		imr->ifm_active |= IFM_IEEE80211_HOSTAP;
    967  1.30.2.8   nathanw 		break;
    968      1.18      onoe 	}
    969  1.30.2.2   nathanw }
    970      1.10      onoe 
    971  1.30.2.2   nathanw static int
    972  1.30.2.2   nathanw awi_mode_init(struct awi_softc *sc)
    973  1.30.2.2   nathanw {
    974  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
    975  1.30.2.2   nathanw 	int n, error;
    976  1.30.2.2   nathanw 	struct ether_multi *enm;
    977  1.30.2.2   nathanw 	struct ether_multistep step;
    978  1.30.2.2   nathanw 
    979  1.30.2.2   nathanw 	/* reinitialize muticast filter */
    980  1.30.2.2   nathanw 	n = 0;
    981  1.30.2.2   nathanw 	sc->sc_mib_local.Accept_All_Multicast_Dis = 0;
    982  1.30.2.8   nathanw 	if (sc->sc_ic.ic_opmode != IEEE80211_M_HOSTAP &&
    983  1.30.2.7   nathanw 	    (ifp->if_flags & IFF_PROMISC)) {
    984  1.30.2.2   nathanw 		sc->sc_mib_mac.aPromiscuous_Enable = 1;
    985  1.30.2.2   nathanw 		goto set_mib;
    986      1.10      onoe 	}
    987  1.30.2.2   nathanw 	sc->sc_mib_mac.aPromiscuous_Enable = 0;
    988  1.30.2.2   nathanw 	ETHER_FIRST_MULTI(step, &sc->sc_ic.ic_ec, enm);
    989  1.30.2.2   nathanw 	while (enm != NULL) {
    990  1.30.2.2   nathanw 		if (n == AWI_GROUP_ADDR_SIZE ||
    991  1.30.2.8   nathanw 		    !IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi))
    992  1.30.2.2   nathanw 			goto set_mib;
    993  1.30.2.8   nathanw 		IEEE80211_ADDR_COPY(sc->sc_mib_addr.aGroup_Addresses[n],
    994  1.30.2.8   nathanw 		    enm->enm_addrlo);
    995  1.30.2.2   nathanw 		n++;
    996  1.30.2.2   nathanw 		ETHER_NEXT_MULTI(step, enm);
    997  1.30.2.2   nathanw 	}
    998  1.30.2.2   nathanw 	for (; n < AWI_GROUP_ADDR_SIZE; n++)
    999  1.30.2.8   nathanw 		memset(sc->sc_mib_addr.aGroup_Addresses[n], 0,
   1000  1.30.2.8   nathanw 		    IEEE80211_ADDR_LEN);
   1001  1.30.2.2   nathanw 	sc->sc_mib_local.Accept_All_Multicast_Dis = 1;
   1002  1.30.2.2   nathanw 
   1003  1.30.2.2   nathanw   set_mib:
   1004  1.30.2.2   nathanw 	if (sc->sc_mib_local.Accept_All_Multicast_Dis)
   1005  1.30.2.2   nathanw 		ifp->if_flags &= ~IFF_ALLMULTI;
   1006  1.30.2.2   nathanw 	else
   1007  1.30.2.2   nathanw 		ifp->if_flags |= IFF_ALLMULTI;
   1008  1.30.2.2   nathanw 	sc->sc_mib_mgt.Wep_Required =
   1009  1.30.2.6   nathanw 	    (sc->sc_ic.ic_flags & IEEE80211_F_WEPON) ? AWI_WEP_ON : AWI_WEP_OFF;
   1010  1.30.2.2   nathanw 
   1011  1.30.2.2   nathanw 	if ((error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_LOCAL, AWI_WAIT)) ||
   1012  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_ADDR, AWI_WAIT)) ||
   1013  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MAC, AWI_WAIT)) ||
   1014  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MGT, AWI_WAIT)) ||
   1015  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_PHY, AWI_WAIT))) {
   1016  1.30.2.2   nathanw 		DPRINTF(("awi_mode_init: MIB set failed: %d\n", error));
   1017  1.30.2.2   nathanw 		return error;
   1018  1.30.2.2   nathanw 	}
   1019  1.30.2.2   nathanw 	return 0;
   1020  1.30.2.2   nathanw }
   1021  1.30.2.2   nathanw 
   1022      1.10      onoe static void
   1023  1.30.2.2   nathanw awi_rx_int(struct awi_softc *sc)
   1024       1.9  sommerfe {
   1025  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1026      1.10      onoe 	u_int8_t state, rate, rssi;
   1027      1.10      onoe 	u_int16_t len;
   1028  1.30.2.6   nathanw 	u_int32_t frame, next, rstamp, rxoff;
   1029      1.10      onoe 	struct mbuf *m;
   1030      1.10      onoe 
   1031      1.10      onoe 	rxoff = sc->sc_rxdoff;
   1032      1.10      onoe 	for (;;) {
   1033      1.10      onoe 		state = awi_read_1(sc, rxoff + AWI_RXD_HOST_DESC_STATE);
   1034      1.10      onoe 		if (state & AWI_RXD_ST_OWN)
   1035      1.10      onoe 			break;
   1036      1.10      onoe 		if (!(state & AWI_RXD_ST_CONSUMED)) {
   1037  1.30.2.6   nathanw 			if (sc->sc_substate != AWI_ST_NONE)
   1038  1.30.2.6   nathanw 				goto rx_next;
   1039  1.30.2.2   nathanw 			if (state & AWI_RXD_ST_RXERROR) {
   1040  1.30.2.2   nathanw 				ifp->if_ierrors++;
   1041  1.30.2.2   nathanw 				goto rx_next;
   1042  1.30.2.2   nathanw 			}
   1043  1.30.2.2   nathanw 			len    = awi_read_2(sc, rxoff + AWI_RXD_LEN);
   1044  1.30.2.2   nathanw 			rate   = awi_read_1(sc, rxoff + AWI_RXD_RATE);
   1045  1.30.2.2   nathanw 			rssi   = awi_read_1(sc, rxoff + AWI_RXD_RSSI);
   1046  1.30.2.2   nathanw 			frame  = awi_read_4(sc, rxoff + AWI_RXD_START_FRAME) &
   1047  1.30.2.2   nathanw 			    0x7fff;
   1048  1.30.2.6   nathanw 			rstamp = awi_read_4(sc, rxoff + AWI_RXD_LOCALTIME);
   1049  1.30.2.2   nathanw 			m = awi_devget(sc, frame, len);
   1050  1.30.2.2   nathanw 			if (m == NULL) {
   1051  1.30.2.2   nathanw 				ifp->if_ierrors++;
   1052  1.30.2.2   nathanw 				goto rx_next;
   1053      1.10      onoe 			}
   1054  1.30.2.2   nathanw 			if (state & AWI_RXD_ST_LF) {
   1055  1.30.2.2   nathanw 				/* TODO check my bss */
   1056  1.30.2.2   nathanw 				if (!(sc->sc_ic.ic_flags & IEEE80211_F_SIBSS) &&
   1057  1.30.2.2   nathanw 				    sc->sc_ic.ic_state == IEEE80211_S_RUN) {
   1058  1.30.2.2   nathanw 					sc->sc_rx_timer = 10;
   1059  1.30.2.2   nathanw 					ifp->if_timer = 1;
   1060  1.30.2.2   nathanw 				}
   1061  1.30.2.2   nathanw 				if ((ifp->if_flags & IFF_DEBUG) &&
   1062  1.30.2.2   nathanw 				    (ifp->if_flags & IFF_LINK2))
   1063  1.30.2.2   nathanw 					ieee80211_dump_pkt(m->m_data, m->m_len,
   1064  1.30.2.2   nathanw 					    rate / 5, rssi);
   1065  1.30.2.2   nathanw 				if ((ifp->if_flags & IFF_LINK0) ||
   1066  1.30.2.2   nathanw 				    sc->sc_adhoc_ap)
   1067  1.30.2.2   nathanw 					m = awi_ether_modcap(sc, m);
   1068  1.30.2.2   nathanw 				if (m == NULL)
   1069  1.30.2.2   nathanw 					ifp->if_ierrors++;
   1070  1.30.2.2   nathanw 				else
   1071  1.30.2.6   nathanw 					ieee80211_input(ifp, m, rssi, rstamp);
   1072  1.30.2.2   nathanw 			} else
   1073  1.30.2.2   nathanw 				sc->sc_rxpend = m;
   1074  1.30.2.2   nathanw   rx_next:
   1075      1.10      onoe 			state |= AWI_RXD_ST_CONSUMED;
   1076      1.10      onoe 			awi_write_1(sc, rxoff + AWI_RXD_HOST_DESC_STATE, state);
   1077      1.10      onoe 		}
   1078  1.30.2.2   nathanw 		next = awi_read_4(sc, rxoff + AWI_RXD_NEXT);
   1079      1.10      onoe 		if (next & AWI_RXD_NEXT_LAST)
   1080      1.10      onoe 			break;
   1081      1.10      onoe 		/* make sure the next pointer is correct */
   1082      1.10      onoe 		if (next != awi_read_4(sc, rxoff + AWI_RXD_NEXT))
   1083      1.10      onoe 			break;
   1084  1.30.2.2   nathanw 		state |= AWI_RXD_ST_OWN;
   1085  1.30.2.2   nathanw 		awi_write_1(sc, rxoff + AWI_RXD_HOST_DESC_STATE, state);
   1086  1.30.2.2   nathanw 		rxoff = next & 0x7fff;
   1087  1.30.2.2   nathanw 	}
   1088  1.30.2.2   nathanw 	sc->sc_rxdoff = rxoff;
   1089  1.30.2.2   nathanw }
   1090  1.30.2.2   nathanw 
   1091  1.30.2.2   nathanw static void
   1092  1.30.2.2   nathanw awi_tx_int(struct awi_softc *sc)
   1093  1.30.2.2   nathanw {
   1094  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1095  1.30.2.2   nathanw 	u_int8_t flags;
   1096  1.30.2.2   nathanw 
   1097  1.30.2.2   nathanw 	while (sc->sc_txdone != sc->sc_txnext) {
   1098  1.30.2.2   nathanw 		flags = awi_read_1(sc, sc->sc_txdone + AWI_TXD_STATE);
   1099  1.30.2.2   nathanw 		if ((flags & AWI_TXD_ST_OWN) || !(flags & AWI_TXD_ST_DONE))
   1100  1.30.2.2   nathanw 			break;
   1101  1.30.2.2   nathanw 		if (flags & AWI_TXD_ST_ERROR)
   1102  1.30.2.2   nathanw 			ifp->if_oerrors++;
   1103  1.30.2.2   nathanw 		sc->sc_txdone = awi_read_4(sc, sc->sc_txdone + AWI_TXD_NEXT) &
   1104  1.30.2.2   nathanw 		    0x7fff;
   1105      1.10      onoe 	}
   1106  1.30.2.2   nathanw 	DPRINTF2(("awi_txint: txdone %d txnext %d txbase %d txend %d\n",
   1107  1.30.2.2   nathanw 	    sc->sc_txdone, sc->sc_txnext, sc->sc_txbase, sc->sc_txend));
   1108  1.30.2.2   nathanw 	sc->sc_tx_timer = 0;
   1109  1.30.2.2   nathanw 	ifp->if_flags &= ~IFF_OACTIVE;
   1110  1.30.2.2   nathanw 	awi_start(ifp);
   1111       1.9  sommerfe }
   1112       1.9  sommerfe 
   1113      1.18      onoe static struct mbuf *
   1114  1.30.2.2   nathanw awi_devget(struct awi_softc *sc, u_int32_t off, u_int16_t len)
   1115       1.1  sommerfe {
   1116  1.30.2.2   nathanw 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   1117      1.10      onoe 	struct mbuf *m;
   1118      1.18      onoe 	struct mbuf *top, **mp;
   1119      1.10      onoe 	u_int tlen;
   1120      1.10      onoe 
   1121      1.10      onoe 	top = sc->sc_rxpend;
   1122      1.18      onoe 	mp = &top;
   1123      1.10      onoe 	if (top != NULL) {
   1124      1.10      onoe 		sc->sc_rxpend = NULL;
   1125      1.10      onoe 		top->m_pkthdr.len += len;
   1126      1.20      onoe 		m = top;
   1127      1.18      onoe 		while (*mp != NULL) {
   1128      1.18      onoe 			m = *mp;
   1129      1.10      onoe 			mp = &m->m_next;
   1130      1.18      onoe 		}
   1131      1.10      onoe 		if (m->m_flags & M_EXT)
   1132      1.10      onoe 			tlen = m->m_ext.ext_size;
   1133      1.10      onoe 		else if (m->m_flags & M_PKTHDR)
   1134      1.10      onoe 			tlen = MHLEN;
   1135      1.10      onoe 		else
   1136      1.10      onoe 			tlen = MLEN;
   1137      1.10      onoe 		tlen -= m->m_len;
   1138      1.10      onoe 		if (tlen > len)
   1139      1.10      onoe 			tlen = len;
   1140      1.10      onoe 		awi_read_bytes(sc, off, mtod(m, u_int8_t *) + m->m_len, tlen);
   1141      1.10      onoe 		off += tlen;
   1142      1.10      onoe 		len -= tlen;
   1143      1.10      onoe 	}
   1144      1.10      onoe 
   1145      1.10      onoe 	while (len > 0) {
   1146      1.10      onoe 		if (top == NULL) {
   1147      1.10      onoe 			MGETHDR(m, M_DONTWAIT, MT_DATA);
   1148      1.10      onoe 			if (m == NULL)
   1149      1.10      onoe 				return NULL;
   1150  1.30.2.2   nathanw 			m->m_pkthdr.rcvif = ifp;
   1151      1.10      onoe 			m->m_pkthdr.len = len;
   1152      1.10      onoe 			m->m_len = MHLEN;
   1153  1.30.2.2   nathanw 			m->m_flags |= M_HASFCS;
   1154      1.10      onoe 		} else {
   1155      1.10      onoe 			MGET(m, M_DONTWAIT, MT_DATA);
   1156      1.10      onoe 			if (m == NULL) {
   1157      1.10      onoe 				m_freem(top);
   1158      1.10      onoe 				return NULL;
   1159      1.10      onoe 			}
   1160      1.10      onoe 			m->m_len = MLEN;
   1161      1.10      onoe 		}
   1162      1.10      onoe 		if (len >= MINCLSIZE) {
   1163      1.10      onoe 			MCLGET(m, M_DONTWAIT);
   1164      1.10      onoe 			if (m->m_flags & M_EXT)
   1165      1.10      onoe 				m->m_len = m->m_ext.ext_size;
   1166      1.10      onoe 		}
   1167      1.20      onoe 		if (top == NULL) {
   1168      1.20      onoe 			int hdrlen = sizeof(struct ieee80211_frame) +
   1169  1.30.2.2   nathanw 			    sizeof(struct llc);
   1170      1.20      onoe 			caddr_t newdata = (caddr_t)
   1171      1.20      onoe 			    ALIGN(m->m_data + hdrlen) - hdrlen;
   1172      1.20      onoe 			m->m_len -= newdata - m->m_data;
   1173      1.20      onoe 			m->m_data = newdata;
   1174      1.20      onoe 		}
   1175      1.10      onoe 		if (m->m_len > len)
   1176      1.10      onoe 			m->m_len = len;
   1177      1.10      onoe 		awi_read_bytes(sc, off, mtod(m, u_int8_t *), m->m_len);
   1178      1.10      onoe 		off += m->m_len;
   1179      1.10      onoe 		len -= m->m_len;
   1180      1.10      onoe 		*mp = m;
   1181      1.10      onoe 		mp = &m->m_next;
   1182      1.10      onoe 	}
   1183      1.10      onoe 	return top;
   1184       1.1  sommerfe }
   1185       1.1  sommerfe 
   1186      1.10      onoe /*
   1187      1.10      onoe  * Initialize hardware and start firmware to accept commands.
   1188      1.10      onoe  * Called everytime after power on firmware.
   1189      1.10      onoe  */
   1190      1.10      onoe 
   1191      1.10      onoe static int
   1192  1.30.2.2   nathanw awi_hw_init(struct awi_softc *sc)
   1193       1.1  sommerfe {
   1194      1.10      onoe 	u_int8_t status;
   1195      1.10      onoe 	u_int16_t intmask;
   1196      1.10      onoe 	int i, error;
   1197       1.1  sommerfe 
   1198      1.15      onoe 	sc->sc_enab_intr = 0;
   1199      1.20      onoe 	sc->sc_invalid = 0;	/* XXX: really? */
   1200      1.10      onoe 	awi_drvstate(sc, AWI_DRV_RESET);
   1201       1.1  sommerfe 
   1202      1.10      onoe 	/* reset firmware */
   1203      1.10      onoe 	am79c930_gcr_setbits(&sc->sc_chip, AM79C930_GCR_CORESET);
   1204      1.10      onoe 	DELAY(100);
   1205      1.10      onoe 	awi_write_1(sc, AWI_SELFTEST, 0);
   1206      1.20      onoe 	awi_write_1(sc, AWI_CMD, 0);
   1207      1.20      onoe 	awi_write_1(sc, AWI_BANNER, 0);
   1208      1.10      onoe 	am79c930_gcr_clearbits(&sc->sc_chip, AM79C930_GCR_CORESET);
   1209      1.10      onoe 	DELAY(100);
   1210      1.10      onoe 
   1211      1.10      onoe 	/* wait for selftest completion */
   1212      1.10      onoe 	for (i = 0; ; i++) {
   1213      1.10      onoe 		if (i >= AWI_SELFTEST_TIMEOUT*hz/1000) {
   1214      1.10      onoe 			printf("%s: failed to complete selftest (timeout)\n",
   1215      1.10      onoe 			    sc->sc_dev.dv_xname);
   1216      1.10      onoe 			return ENXIO;
   1217      1.10      onoe 		}
   1218      1.10      onoe 		status = awi_read_1(sc, AWI_SELFTEST);
   1219      1.10      onoe 		if ((status & 0xf0) == 0xf0)
   1220      1.10      onoe 			break;
   1221      1.10      onoe 		if (sc->sc_cansleep) {
   1222      1.10      onoe 			sc->sc_sleep_cnt++;
   1223      1.10      onoe 			(void)tsleep(sc, PWAIT, "awitst", 1);
   1224      1.10      onoe 			sc->sc_sleep_cnt--;
   1225      1.10      onoe 		} else {
   1226      1.10      onoe 			DELAY(1000*1000/hz);
   1227      1.10      onoe 		}
   1228      1.10      onoe 	}
   1229      1.10      onoe 	if (status != AWI_SELFTEST_PASSED) {
   1230      1.10      onoe 		printf("%s: failed to complete selftest (code %x)\n",
   1231      1.10      onoe 		    sc->sc_dev.dv_xname, status);
   1232      1.10      onoe 		return ENXIO;
   1233      1.10      onoe 	}
   1234       1.1  sommerfe 
   1235      1.10      onoe 	/* check banner to confirm firmware write it */
   1236      1.18      onoe 	awi_read_bytes(sc, AWI_BANNER, sc->sc_banner, AWI_BANNER_LEN);
   1237      1.18      onoe 	if (memcmp(sc->sc_banner, "PCnetMobile:", 12) != 0) {
   1238      1.10      onoe 		printf("%s: failed to complete selftest (bad banner)\n",
   1239      1.10      onoe 		    sc->sc_dev.dv_xname);
   1240      1.10      onoe 		for (i = 0; i < AWI_BANNER_LEN; i++)
   1241      1.18      onoe 			printf("%s%02x", i ? ":" : "\t", sc->sc_banner[i]);
   1242      1.10      onoe 		printf("\n");
   1243      1.10      onoe 		return ENXIO;
   1244      1.10      onoe 	}
   1245       1.1  sommerfe 
   1246      1.10      onoe 	/* initializing interrupt */
   1247      1.15      onoe 	sc->sc_enab_intr = 1;
   1248      1.10      onoe 	error = awi_intr_lock(sc);
   1249      1.10      onoe 	if (error)
   1250      1.10      onoe 		return error;
   1251      1.10      onoe 	intmask = AWI_INT_GROGGY | AWI_INT_SCAN_CMPLT |
   1252      1.10      onoe 	    AWI_INT_TX | AWI_INT_RX | AWI_INT_CMD;
   1253      1.10      onoe 	awi_write_1(sc, AWI_INTMASK, ~intmask & 0xff);
   1254      1.10      onoe 	awi_write_1(sc, AWI_INTMASK2, 0);
   1255      1.10      onoe 	awi_write_1(sc, AWI_INTSTAT, 0);
   1256      1.10      onoe 	awi_write_1(sc, AWI_INTSTAT2, 0);
   1257      1.10      onoe 	awi_intr_unlock(sc);
   1258      1.10      onoe 	am79c930_gcr_setbits(&sc->sc_chip, AM79C930_GCR_ENECINT);
   1259       1.1  sommerfe 
   1260  1.30.2.1   nathanw 	/* issuing interface test command */
   1261  1.30.2.2   nathanw 	error = awi_cmd(sc, AWI_CMD_NOP, AWI_WAIT);
   1262      1.10      onoe 	if (error) {
   1263      1.10      onoe 		printf("%s: failed to complete selftest", sc->sc_dev.dv_xname);
   1264      1.20      onoe 		if (error == ENXIO)
   1265      1.20      onoe 			printf(" (no hardware)\n");
   1266      1.20      onoe 		else if (error != EWOULDBLOCK)
   1267      1.10      onoe 			printf(" (error %d)\n", error);
   1268      1.10      onoe 		else if (sc->sc_cansleep)
   1269      1.10      onoe 			printf(" (lost interrupt)\n");
   1270      1.10      onoe 		else
   1271      1.10      onoe 			printf(" (command timeout)\n");
   1272  1.30.2.7   nathanw 		return error;
   1273      1.10      onoe 	}
   1274  1.30.2.7   nathanw 
   1275  1.30.2.7   nathanw 	/* Initialize VBM */
   1276  1.30.2.7   nathanw 	awi_write_1(sc, AWI_VBM_OFFSET, 0);
   1277  1.30.2.7   nathanw 	awi_write_1(sc, AWI_VBM_LENGTH, 1);
   1278  1.30.2.7   nathanw 	awi_write_1(sc, AWI_VBM_BITMAP, 0);
   1279  1.30.2.7   nathanw 	return 0;
   1280      1.10      onoe }
   1281       1.1  sommerfe 
   1282      1.10      onoe /*
   1283      1.10      onoe  * Extract the factory default MIB value from firmware and assign the driver
   1284      1.10      onoe  * default value.
   1285      1.10      onoe  * Called once at attaching the interface.
   1286  1.30.2.2   nathanw  */
   1287       1.1  sommerfe 
   1288  1.30.2.2   nathanw static int
   1289  1.30.2.2   nathanw awi_init_mibs(struct awi_softc *sc)
   1290       1.1  sommerfe {
   1291  1.30.2.2   nathanw 	int i, error;
   1292  1.30.2.2   nathanw 	struct awi_chanset *cs;
   1293       1.1  sommerfe 
   1294  1.30.2.2   nathanw 	if ((error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_LOCAL, AWI_WAIT)) ||
   1295  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_ADDR, AWI_WAIT)) ||
   1296  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_MAC, AWI_WAIT)) ||
   1297  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_MGT, AWI_WAIT)) ||
   1298  1.30.2.2   nathanw 	    (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_PHY, AWI_WAIT))) {
   1299  1.30.2.2   nathanw 		printf("%s: failed to get default mib value (error %d)\n",
   1300  1.30.2.2   nathanw 		    sc->sc_dev.dv_xname, error);
   1301  1.30.2.2   nathanw 		return error;
   1302  1.30.2.2   nathanw 	}
   1303      1.10      onoe 
   1304  1.30.2.2   nathanw 	memset(&sc->sc_ic.ic_chan_avail, 0, sizeof(sc->sc_ic.ic_chan_avail));
   1305  1.30.2.2   nathanw 	for (cs = awi_chanset; ; cs++) {
   1306  1.30.2.2   nathanw 		if (cs->cs_type == 0) {
   1307  1.30.2.2   nathanw 			printf("%s: failed to set available channel\n",
   1308  1.30.2.2   nathanw 			    sc->sc_dev.dv_xname);
   1309  1.30.2.2   nathanw 			return ENXIO;
   1310  1.30.2.2   nathanw 		}
   1311  1.30.2.2   nathanw 		if (cs->cs_type == sc->sc_mib_phy.IEEE_PHY_Type &&
   1312  1.30.2.2   nathanw 		    cs->cs_region == sc->sc_mib_phy.aCurrent_Reg_Domain)
   1313  1.30.2.2   nathanw 			break;
   1314  1.30.2.2   nathanw 	}
   1315  1.30.2.2   nathanw 	if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
   1316  1.30.2.2   nathanw 		for (i = cs->cs_min; i <= cs->cs_max; i++) {
   1317  1.30.2.2   nathanw 			setbit(sc->sc_ic.ic_chan_avail,
   1318  1.30.2.2   nathanw 			    IEEE80211_FH_CHAN(i % 3 + 1, i));
   1319  1.30.2.2   nathanw 			/*
   1320  1.30.2.2   nathanw 			 * According to the IEEE 802.11 specification,
   1321  1.30.2.2   nathanw 			 * hop pattern parameter for FH phy should be
   1322  1.30.2.2   nathanw 			 * incremented by 3 for given hop chanset, i.e.,
   1323  1.30.2.2   nathanw 			 * the chanset parameter is calculated for given
   1324  1.30.2.2   nathanw 			 * hop patter.  However, BayStack 650 Access Points
   1325  1.30.2.2   nathanw 			 * apparently use fixed hop chanset parameter value
   1326  1.30.2.2   nathanw 			 * 1 for any hop pattern.  So we also try this
   1327  1.30.2.2   nathanw 			 * combination of hop chanset and pattern.
   1328  1.30.2.2   nathanw 			 */
   1329  1.30.2.2   nathanw 			setbit(sc->sc_ic.ic_chan_avail,
   1330  1.30.2.2   nathanw 			    IEEE80211_FH_CHAN(1, i));
   1331  1.30.2.2   nathanw 		}
   1332  1.30.2.2   nathanw 	} else {
   1333  1.30.2.2   nathanw 		for (i = cs->cs_min; i <= cs->cs_max; i++)
   1334  1.30.2.2   nathanw 			setbit(sc->sc_ic.ic_chan_avail, i);
   1335  1.30.2.2   nathanw 	}
   1336  1.30.2.2   nathanw 	sc->sc_cur_chan = cs->cs_def;
   1337       1.1  sommerfe 
   1338  1.30.2.2   nathanw 	sc->sc_mib_local.Fragmentation_Dis = 1;
   1339  1.30.2.7   nathanw 	sc->sc_mib_local.Add_PLCP_Dis = 0;
   1340  1.30.2.7   nathanw 	sc->sc_mib_local.MAC_Hdr_Prsv = 1;
   1341  1.30.2.7   nathanw 	sc->sc_mib_local.Rx_Mgmt_Que_En = 0;
   1342  1.30.2.7   nathanw 	sc->sc_mib_local.Re_Assembly_Dis = 1;
   1343  1.30.2.7   nathanw 	sc->sc_mib_local.Strip_PLCP_Dis = 0;
   1344  1.30.2.2   nathanw 	sc->sc_mib_local.Power_Saving_Mode_Dis = 1;
   1345  1.30.2.7   nathanw 	sc->sc_mib_local.Accept_All_Multicast_Dis = 1;
   1346  1.30.2.7   nathanw 	sc->sc_mib_local.Check_Seq_Cntl_Dis = 1;
   1347  1.30.2.7   nathanw 	sc->sc_mib_local.Flush_CFP_Queue_On_CF_End = 0;
   1348  1.30.2.7   nathanw 	sc->sc_mib_local.Network_Mode = 1;
   1349  1.30.2.7   nathanw 	sc->sc_mib_local.PWD_Lvl = 0;
   1350  1.30.2.7   nathanw 	sc->sc_mib_local.CFP_Mode = 0;
   1351       1.1  sommerfe 
   1352  1.30.2.2   nathanw 	/* allocate buffers */
   1353  1.30.2.2   nathanw 	sc->sc_txbase = AWI_BUFFERS;
   1354  1.30.2.2   nathanw 	sc->sc_txend = sc->sc_txbase +
   1355  1.30.2.2   nathanw 	    (AWI_TXD_SIZE + sizeof(struct ieee80211_frame) +
   1356  1.30.2.2   nathanw 	    sizeof(struct ether_header) + ETHERMTU) * AWI_NTXBUFS;
   1357  1.30.2.2   nathanw 	LE_WRITE_4(&sc->sc_mib_local.Tx_Buffer_Offset, sc->sc_txbase);
   1358  1.30.2.2   nathanw 	LE_WRITE_4(&sc->sc_mib_local.Tx_Buffer_Size,
   1359  1.30.2.2   nathanw 	    sc->sc_txend - sc->sc_txbase);
   1360  1.30.2.2   nathanw 	LE_WRITE_4(&sc->sc_mib_local.Rx_Buffer_Offset, sc->sc_txend);
   1361  1.30.2.2   nathanw 	LE_WRITE_4(&sc->sc_mib_local.Rx_Buffer_Size,
   1362  1.30.2.2   nathanw 	    AWI_BUFFERS_END - sc->sc_txend);
   1363  1.30.2.2   nathanw 	sc->sc_mib_local.Acting_as_AP = 0;
   1364  1.30.2.7   nathanw 	sc->sc_mib_local.Fill_CFP = 0;
   1365  1.30.2.7   nathanw 
   1366  1.30.2.7   nathanw 	memset(&sc->sc_mib_mac.aDesired_ESS_ID, 0, AWI_ESS_ID_SIZE);
   1367  1.30.2.7   nathanw 	sc->sc_mib_mac.aDesired_ESS_ID[0] = IEEE80211_ELEMID_SSID;
   1368  1.30.2.7   nathanw 
   1369  1.30.2.7   nathanw 	sc->sc_mib_mgt.aPower_Mgt_Mode = 0;
   1370  1.30.2.7   nathanw 	sc->sc_mib_mgt.aDTIM_Period = 1;
   1371  1.30.2.7   nathanw 	LE_WRITE_2(&sc->sc_mib_mgt.aATIM_Window, 0);
   1372  1.30.2.2   nathanw 	return 0;
   1373       1.1  sommerfe }
   1374       1.1  sommerfe 
   1375  1.30.2.2   nathanw static int
   1376  1.30.2.2   nathanw awi_chan_check(void *arg, u_char *chanreq)
   1377       1.1  sommerfe {
   1378  1.30.2.2   nathanw 	struct awi_softc *sc = arg;
   1379  1.30.2.2   nathanw 	int i;
   1380  1.30.2.2   nathanw 	struct awi_chanset *cs;
   1381  1.30.2.2   nathanw 	u_char chanlist[(IEEE80211_CHAN_MAX+1)/NBBY];
   1382       1.1  sommerfe 
   1383  1.30.2.2   nathanw 	for (cs = awi_chanset; cs->cs_type != 0; cs++) {
   1384  1.30.2.2   nathanw 		if (cs->cs_type != sc->sc_mib_phy.IEEE_PHY_Type)
   1385      1.10      onoe 			continue;
   1386  1.30.2.2   nathanw 		memset(chanlist, 0, sizeof(chanlist));
   1387  1.30.2.2   nathanw 		for (i = 0; ; i++) {
   1388  1.30.2.2   nathanw 			if (i == IEEE80211_CHAN_MAX) {
   1389  1.30.2.2   nathanw 				sc->sc_mib_phy.aCurrent_Reg_Domain =
   1390  1.30.2.2   nathanw 				    cs->cs_region;
   1391  1.30.2.2   nathanw 				memcpy(sc->sc_ic.ic_chan_avail, chanlist,
   1392  1.30.2.2   nathanw 				    sizeof(sc->sc_ic.ic_chan_avail));
   1393  1.30.2.8   nathanw 				sc->sc_ic.ic_bss.ni_chan = cs->cs_def;
   1394  1.30.2.2   nathanw 				sc->sc_cur_chan = cs->cs_def;
   1395  1.30.2.2   nathanw 				return 0;
   1396  1.30.2.2   nathanw 			}
   1397  1.30.2.2   nathanw 			if (i >= cs->cs_min && i <= cs->cs_max)
   1398  1.30.2.2   nathanw 				setbit(chanlist, i);
   1399  1.30.2.2   nathanw 			else if (isset(chanreq, i))
   1400  1.30.2.2   nathanw 				break;
   1401      1.10      onoe 		}
   1402      1.10      onoe 	}
   1403  1.30.2.2   nathanw 	return EINVAL;
   1404       1.1  sommerfe }
   1405       1.1  sommerfe 
   1406      1.10      onoe static int
   1407  1.30.2.2   nathanw awi_mib(struct awi_softc *sc, u_int8_t cmd, u_int8_t mib, int wflag)
   1408       1.1  sommerfe {
   1409      1.10      onoe 	int error;
   1410      1.10      onoe 	u_int8_t size, *ptr;
   1411       1.1  sommerfe 
   1412      1.10      onoe 	switch (mib) {
   1413      1.10      onoe 	case AWI_MIB_LOCAL:
   1414      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_local;
   1415      1.10      onoe 		size = sizeof(sc->sc_mib_local);
   1416      1.10      onoe 		break;
   1417      1.10      onoe 	case AWI_MIB_ADDR:
   1418      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_addr;
   1419      1.10      onoe 		size = sizeof(sc->sc_mib_addr);
   1420      1.10      onoe 		break;
   1421      1.10      onoe 	case AWI_MIB_MAC:
   1422      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_mac;
   1423      1.10      onoe 		size = sizeof(sc->sc_mib_mac);
   1424      1.10      onoe 		break;
   1425      1.10      onoe 	case AWI_MIB_STAT:
   1426      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_stat;
   1427      1.10      onoe 		size = sizeof(sc->sc_mib_stat);
   1428      1.10      onoe 		break;
   1429      1.10      onoe 	case AWI_MIB_MGT:
   1430      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_mgt;
   1431      1.10      onoe 		size = sizeof(sc->sc_mib_mgt);
   1432      1.10      onoe 		break;
   1433      1.10      onoe 	case AWI_MIB_PHY:
   1434      1.10      onoe 		ptr = (u_int8_t *)&sc->sc_mib_phy;
   1435      1.10      onoe 		size = sizeof(sc->sc_mib_phy);
   1436      1.10      onoe 		break;
   1437      1.10      onoe 	default:
   1438      1.10      onoe 		return EINVAL;
   1439       1.1  sommerfe 	}
   1440      1.10      onoe 	if (sc->sc_cmd_inprog) {
   1441  1.30.2.2   nathanw 		if ((error = awi_cmd_wait(sc)) != 0) {
   1442      1.20      onoe 			if (error == EWOULDBLOCK)
   1443  1.30.2.2   nathanw 				DPRINTF(("awi_mib: cmd %d inprog",
   1444  1.30.2.2   nathanw 				    sc->sc_cmd_inprog));
   1445      1.10      onoe 			return error;
   1446      1.10      onoe 		}
   1447      1.10      onoe 	}
   1448      1.20      onoe 	sc->sc_cmd_inprog = cmd;
   1449      1.10      onoe 	if (cmd == AWI_CMD_SET_MIB)
   1450  1.30.2.2   nathanw 		awi_write_bytes(sc, AWI_CA_MIB_DATA, ptr, size);
   1451  1.30.2.2   nathanw 	awi_write_1(sc, AWI_CA_MIB_TYPE, mib);
   1452  1.30.2.2   nathanw 	awi_write_1(sc, AWI_CA_MIB_SIZE, size);
   1453  1.30.2.2   nathanw 	awi_write_1(sc, AWI_CA_MIB_INDEX, 0);
   1454  1.30.2.2   nathanw 	if ((error = awi_cmd(sc, cmd, wflag)) != 0)
   1455      1.10      onoe 		return error;
   1456      1.10      onoe 	if (cmd == AWI_CMD_GET_MIB) {
   1457  1.30.2.2   nathanw 		awi_read_bytes(sc, AWI_CA_MIB_DATA, ptr, size);
   1458      1.10      onoe #ifdef AWI_DEBUG
   1459  1.30.2.2   nathanw 		if (awi_debug) {
   1460      1.10      onoe 			int i;
   1461       1.1  sommerfe 
   1462      1.10      onoe 			printf("awi_mib: #%d:", mib);
   1463      1.10      onoe 			for (i = 0; i < size; i++)
   1464      1.10      onoe 				printf(" %02x", ptr[i]);
   1465      1.10      onoe 			printf("\n");
   1466      1.10      onoe 		}
   1467       1.1  sommerfe #endif
   1468      1.10      onoe 	}
   1469      1.10      onoe 	return 0;
   1470       1.1  sommerfe }
   1471       1.1  sommerfe 
   1472      1.10      onoe static int
   1473  1.30.2.2   nathanw awi_cmd(struct awi_softc *sc, u_int8_t cmd, int wflag)
   1474       1.1  sommerfe {
   1475      1.10      onoe 	u_int8_t status;
   1476      1.10      onoe 	int error = 0;
   1477  1.30.2.2   nathanw #ifdef AWI_DEBUG
   1478  1.30.2.2   nathanw 	static const char *cmdname[] = {
   1479  1.30.2.2   nathanw 	    "IDLE", "NOP", "SET_MIB", "INIT_TX", "FLUSH_TX", "INIT_RX",
   1480  1.30.2.2   nathanw 	    "KILL_RX", "SLEEP", "WAKE", "GET_MIB", "SCAN", "SYNC", "RESUME"
   1481  1.30.2.2   nathanw 	};
   1482  1.30.2.2   nathanw #endif
   1483      1.10      onoe 
   1484  1.30.2.2   nathanw #ifdef AWI_DEBUG
   1485  1.30.2.2   nathanw 	if (awi_debug > 1) {
   1486  1.30.2.2   nathanw 		if (cmd >= sizeof(cmdname)/sizeof(cmdname[0]))
   1487  1.30.2.2   nathanw 			printf("awi_cmd: #%d", cmd);
   1488  1.30.2.2   nathanw 		else
   1489  1.30.2.2   nathanw 			printf("awi_cmd: %s", cmdname[cmd]);
   1490  1.30.2.2   nathanw 		printf(" %s\n", wflag == AWI_NOWAIT ? "nowait" : "wait");
   1491  1.30.2.2   nathanw 	}
   1492  1.30.2.2   nathanw #endif
   1493      1.20      onoe 	sc->sc_cmd_inprog = cmd;
   1494      1.10      onoe 	awi_write_1(sc, AWI_CMD_STATUS, AWI_STAT_IDLE);
   1495      1.10      onoe 	awi_write_1(sc, AWI_CMD, cmd);
   1496  1.30.2.2   nathanw 	if (wflag == AWI_NOWAIT)
   1497  1.30.2.2   nathanw 		return EINPROGRESS;
   1498  1.30.2.2   nathanw 	if ((error = awi_cmd_wait(sc)) != 0)
   1499      1.10      onoe 		return error;
   1500      1.10      onoe 	status = awi_read_1(sc, AWI_CMD_STATUS);
   1501      1.10      onoe 	awi_write_1(sc, AWI_CMD, 0);
   1502      1.10      onoe 	switch (status) {
   1503      1.10      onoe 	case AWI_STAT_OK:
   1504      1.10      onoe 		break;
   1505      1.10      onoe 	case AWI_STAT_BADPARM:
   1506      1.10      onoe 		return EINVAL;
   1507      1.10      onoe 	default:
   1508      1.10      onoe 		printf("%s: command %d failed %x\n",
   1509      1.10      onoe 		    sc->sc_dev.dv_xname, cmd, status);
   1510      1.10      onoe 		return ENXIO;
   1511      1.10      onoe 	}
   1512      1.10      onoe 	return 0;
   1513       1.1  sommerfe }
   1514       1.1  sommerfe 
   1515  1.30.2.2   nathanw static int
   1516  1.30.2.2   nathanw awi_cmd_wait(struct awi_softc *sc)
   1517  1.30.2.2   nathanw {
   1518  1.30.2.2   nathanw 	int i, error = 0;
   1519  1.30.2.2   nathanw 
   1520  1.30.2.2   nathanw 	i = 0;
   1521  1.30.2.2   nathanw 	while (sc->sc_cmd_inprog) {
   1522  1.30.2.2   nathanw 		if (sc->sc_invalid)
   1523  1.30.2.2   nathanw 			return ENXIO;
   1524  1.30.2.2   nathanw 		if (awi_read_1(sc, AWI_CMD) != sc->sc_cmd_inprog) {
   1525  1.30.2.2   nathanw 			printf("%s: failed to access hardware\n",
   1526  1.30.2.2   nathanw 			    sc->sc_dev.dv_xname);
   1527  1.30.2.2   nathanw 			sc->sc_invalid = 1;
   1528  1.30.2.2   nathanw 			return ENXIO;
   1529  1.30.2.2   nathanw 		}
   1530  1.30.2.2   nathanw 		if (sc->sc_cansleep) {
   1531  1.30.2.2   nathanw 			sc->sc_sleep_cnt++;
   1532  1.30.2.2   nathanw 			error = tsleep(sc, PWAIT, "awicmd",
   1533  1.30.2.2   nathanw 			    AWI_CMD_TIMEOUT*hz/1000);
   1534  1.30.2.2   nathanw 			sc->sc_sleep_cnt--;
   1535  1.30.2.2   nathanw 		} else {
   1536  1.30.2.2   nathanw 			if (awi_read_1(sc, AWI_CMD_STATUS) != AWI_STAT_IDLE) {
   1537  1.30.2.2   nathanw 				awi_cmd_done(sc);
   1538  1.30.2.2   nathanw 				break;
   1539  1.30.2.2   nathanw 			}
   1540  1.30.2.2   nathanw 			if (i++ >= AWI_CMD_TIMEOUT*1000/10)
   1541  1.30.2.2   nathanw 				error = EWOULDBLOCK;
   1542  1.30.2.2   nathanw 			else
   1543  1.30.2.2   nathanw 				DELAY(10);
   1544  1.30.2.2   nathanw 		}
   1545  1.30.2.2   nathanw 		if (error)
   1546  1.30.2.2   nathanw 			break;
   1547  1.30.2.2   nathanw 	}
   1548  1.30.2.2   nathanw 	if (error) {
   1549  1.30.2.2   nathanw 		DPRINTF(("awi_cmd_wait: cmd 0x%x, error %d\n",
   1550  1.30.2.2   nathanw 		    sc->sc_cmd_inprog, error));
   1551  1.30.2.2   nathanw 	}
   1552  1.30.2.2   nathanw 	return error;
   1553  1.30.2.2   nathanw }
   1554  1.30.2.2   nathanw 
   1555      1.10      onoe static void
   1556  1.30.2.2   nathanw awi_cmd_done(struct awi_softc *sc)
   1557       1.1  sommerfe {
   1558      1.10      onoe 	u_int8_t cmd, status;
   1559      1.10      onoe 
   1560      1.10      onoe 	status = awi_read_1(sc, AWI_CMD_STATUS);
   1561      1.10      onoe 	if (status == AWI_STAT_IDLE)
   1562      1.10      onoe 		return;		/* stray interrupt */
   1563      1.10      onoe 
   1564      1.20      onoe 	cmd = sc->sc_cmd_inprog;
   1565      1.10      onoe 	sc->sc_cmd_inprog = 0;
   1566  1.30.2.2   nathanw 	wakeup(sc);
   1567      1.10      onoe 	awi_write_1(sc, AWI_CMD, 0);
   1568      1.10      onoe 
   1569      1.10      onoe 	if (status != AWI_STAT_OK) {
   1570      1.10      onoe 		printf("%s: command %d failed %x\n",
   1571      1.10      onoe 		    sc->sc_dev.dv_xname, cmd, status);
   1572  1.30.2.2   nathanw 		sc->sc_substate = AWI_ST_NONE;
   1573      1.10      onoe 		return;
   1574      1.10      onoe 	}
   1575  1.30.2.2   nathanw 	if (sc->sc_substate != AWI_ST_NONE)
   1576  1.30.2.2   nathanw 		(void)ieee80211_new_state(&sc->sc_ic.ic_if, sc->sc_nstate, -1);
   1577       1.1  sommerfe }
   1578       1.1  sommerfe 
   1579      1.10      onoe static int
   1580  1.30.2.2   nathanw awi_next_txd(struct awi_softc *sc, int len, u_int32_t *framep, u_int32_t *ntxdp)
   1581       1.1  sommerfe {
   1582      1.10      onoe 	u_int32_t txd, ntxd, frame;
   1583       1.1  sommerfe 
   1584      1.10      onoe 	txd = sc->sc_txnext;
   1585      1.10      onoe 	frame = txd + AWI_TXD_SIZE;
   1586      1.10      onoe 	if (frame + len > sc->sc_txend)
   1587      1.10      onoe 		frame = sc->sc_txbase;
   1588      1.10      onoe 	ntxd = frame + len;
   1589      1.10      onoe 	if (ntxd + AWI_TXD_SIZE > sc->sc_txend)
   1590      1.10      onoe 		ntxd = sc->sc_txbase;
   1591      1.10      onoe 	*framep = frame;
   1592      1.10      onoe 	*ntxdp = ntxd;
   1593      1.10      onoe 	/*
   1594      1.10      onoe 	 * Determine if there are any room in ring buffer.
   1595      1.10      onoe 	 *		--- send wait,  === new data,  +++ conflict (ENOBUFS)
   1596      1.10      onoe 	 *   base........................end
   1597      1.10      onoe 	 *	   done----txd=====ntxd		OK
   1598      1.10      onoe 	 *	 --txd=====done++++ntxd--	full
   1599      1.10      onoe 	 *	 --txd=====ntxd    done--	OK
   1600      1.10      onoe 	 *	 ==ntxd    done----txd===	OK
   1601      1.10      onoe 	 *	 ==done++++ntxd----txd===	full
   1602      1.10      onoe 	 *	 ++ntxd    txd=====done++	full
   1603      1.10      onoe 	 */
   1604      1.10      onoe 	if (txd < ntxd) {
   1605      1.10      onoe 		if (txd < sc->sc_txdone && ntxd + AWI_TXD_SIZE > sc->sc_txdone)
   1606      1.10      onoe 			return ENOBUFS;
   1607      1.10      onoe 	} else {
   1608      1.10      onoe 		if (txd < sc->sc_txdone || ntxd + AWI_TXD_SIZE > sc->sc_txdone)
   1609      1.10      onoe 			return ENOBUFS;
   1610       1.1  sommerfe 	}
   1611      1.10      onoe 	return 0;
   1612       1.1  sommerfe }
   1613       1.1  sommerfe 
   1614      1.10      onoe static int
   1615  1.30.2.2   nathanw awi_lock(struct awi_softc *sc)
   1616       1.1  sommerfe {
   1617      1.10      onoe 	int error = 0;
   1618       1.1  sommerfe 
   1619  1.30.2.4   nathanw 	if (curlwp == NULL) {
   1620      1.10      onoe 		/*
   1621      1.10      onoe 		 * XXX
   1622      1.10      onoe 		 * Though driver ioctl should be called with context,
   1623      1.10      onoe 		 * KAME ipv6 stack calls ioctl in interrupt for now.
   1624      1.10      onoe 		 * We simply abort the request if there are other
   1625      1.10      onoe 		 * ioctl requests in progress.
   1626      1.10      onoe 		 */
   1627      1.20      onoe 		if (sc->sc_busy) {
   1628      1.10      onoe 			return EWOULDBLOCK;
   1629      1.20      onoe 			if (sc->sc_invalid)
   1630      1.20      onoe 				return ENXIO;
   1631      1.20      onoe 		}
   1632      1.10      onoe 		sc->sc_busy = 1;
   1633      1.10      onoe 		sc->sc_cansleep = 0;
   1634      1.10      onoe 		return 0;
   1635       1.1  sommerfe 	}
   1636      1.10      onoe 	while (sc->sc_busy) {
   1637      1.20      onoe 		if (sc->sc_invalid)
   1638      1.20      onoe 			return ENXIO;
   1639      1.10      onoe 		sc->sc_sleep_cnt++;
   1640      1.10      onoe 		error = tsleep(sc, PWAIT | PCATCH, "awilck", 0);
   1641      1.10      onoe 		sc->sc_sleep_cnt--;
   1642      1.10      onoe 		if (error)
   1643      1.10      onoe 			return error;
   1644       1.6  sommerfe 	}
   1645      1.10      onoe 	sc->sc_busy = 1;
   1646      1.10      onoe 	sc->sc_cansleep = 1;
   1647      1.10      onoe 	return 0;
   1648      1.10      onoe }
   1649       1.1  sommerfe 
   1650      1.10      onoe static void
   1651  1.30.2.2   nathanw awi_unlock(struct awi_softc *sc)
   1652      1.10      onoe {
   1653      1.10      onoe 	sc->sc_busy = 0;
   1654      1.10      onoe 	sc->sc_cansleep = 0;
   1655      1.10      onoe 	if (sc->sc_sleep_cnt)
   1656      1.10      onoe 		wakeup(sc);
   1657       1.1  sommerfe }
   1658       1.1  sommerfe 
   1659      1.10      onoe static int
   1660  1.30.2.2   nathanw awi_intr_lock(struct awi_softc *sc)
   1661      1.10      onoe {
   1662       1.1  sommerfe 	u_int8_t status;
   1663      1.10      onoe 	int i, retry;
   1664      1.10      onoe 
   1665      1.10      onoe 	status = 1;
   1666      1.10      onoe 	for (retry = 0; retry < 10; retry++) {
   1667      1.10      onoe 		for (i = 0; i < AWI_LOCKOUT_TIMEOUT*1000/5; i++) {
   1668  1.30.2.2   nathanw 			if ((status = awi_read_1(sc, AWI_LOCKOUT_HOST)) == 0)
   1669      1.10      onoe 				break;
   1670      1.10      onoe 			DELAY(5);
   1671      1.10      onoe 		}
   1672      1.10      onoe 		if (status != 0)
   1673      1.10      onoe 			break;
   1674      1.10      onoe 		awi_write_1(sc, AWI_LOCKOUT_MAC, 1);
   1675  1.30.2.2   nathanw 		if ((status = awi_read_1(sc, AWI_LOCKOUT_HOST)) == 0)
   1676      1.10      onoe 			break;
   1677      1.10      onoe 		awi_write_1(sc, AWI_LOCKOUT_MAC, 0);
   1678       1.1  sommerfe 	}
   1679      1.10      onoe 	if (status != 0) {
   1680      1.10      onoe 		printf("%s: failed to lock interrupt\n",
   1681       1.6  sommerfe 		    sc->sc_dev.dv_xname);
   1682      1.10      onoe 		return ENXIO;
   1683       1.6  sommerfe 	}
   1684      1.10      onoe 	return 0;
   1685       1.1  sommerfe }
   1686       1.1  sommerfe 
   1687      1.10      onoe static void
   1688  1.30.2.2   nathanw awi_intr_unlock(struct awi_softc *sc)
   1689       1.1  sommerfe {
   1690       1.1  sommerfe 
   1691      1.10      onoe 	awi_write_1(sc, AWI_LOCKOUT_MAC, 0);
   1692       1.1  sommerfe }
   1693       1.1  sommerfe 
   1694      1.10      onoe static int
   1695  1.30.2.2   nathanw awi_newstate(void *arg, enum ieee80211_state nstate)
   1696       1.1  sommerfe {
   1697  1.30.2.2   nathanw 	struct awi_softc *sc = arg;
   1698  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
   1699  1.30.2.8   nathanw 	struct ieee80211_node *ni;
   1700  1.30.2.2   nathanw 	struct ifnet *ifp = &ic->ic_if;
   1701  1.30.2.2   nathanw 	int error;
   1702  1.30.2.2   nathanw 	u_int8_t newmode;
   1703  1.30.2.2   nathanw 	enum ieee80211_state ostate;
   1704  1.30.2.2   nathanw #ifdef AWI_DEBUG
   1705  1.30.2.2   nathanw 	static const char *stname[] =
   1706  1.30.2.2   nathanw 	    { "INIT", "SCAN", "AUTH", "ASSOC", "RUN" };
   1707  1.30.2.2   nathanw 	static const char *substname[] =
   1708  1.30.2.2   nathanw 	    { "NONE", "SCAN_INIT", "SCAN_SETMIB", "SCAN_SCCMD",
   1709  1.30.2.2   nathanw 	      "SUB_INIT", "SUB_SETSS", "SUB_SYNC" };
   1710  1.30.2.2   nathanw #endif /* AWI_DEBUG */
   1711  1.30.2.2   nathanw 
   1712  1.30.2.2   nathanw 	ostate = ic->ic_state;
   1713  1.30.2.2   nathanw 	DPRINTF(("awi_newstate: %s (%s/%s) -> %s\n", stname[ostate],
   1714  1.30.2.2   nathanw 	    stname[sc->sc_nstate], substname[sc->sc_substate], stname[nstate]));
   1715  1.30.2.2   nathanw 
   1716  1.30.2.2   nathanw 	/* set LED */
   1717  1.30.2.2   nathanw 	switch (nstate) {
   1718  1.30.2.2   nathanw 	case IEEE80211_S_INIT:
   1719  1.30.2.2   nathanw 		awi_drvstate(sc, AWI_DRV_RESET);
   1720  1.30.2.2   nathanw 		break;
   1721  1.30.2.2   nathanw 	case IEEE80211_S_SCAN:
   1722  1.30.2.8   nathanw 		if (ic->ic_opmode == IEEE80211_M_IBSS ||
   1723  1.30.2.8   nathanw 		    ic->ic_opmode == IEEE80211_M_AHDEMO)
   1724  1.30.2.2   nathanw 			awi_drvstate(sc, AWI_DRV_ADHSC);
   1725  1.30.2.2   nathanw 		else
   1726  1.30.2.2   nathanw 			awi_drvstate(sc, AWI_DRV_INFSY);
   1727  1.30.2.2   nathanw 		break;
   1728  1.30.2.2   nathanw 	case IEEE80211_S_AUTH:
   1729  1.30.2.2   nathanw 		awi_drvstate(sc, AWI_DRV_INFSY);
   1730  1.30.2.2   nathanw 		break;
   1731  1.30.2.2   nathanw 	case IEEE80211_S_ASSOC:
   1732  1.30.2.2   nathanw 		awi_drvstate(sc, AWI_DRV_INFAUTH);
   1733  1.30.2.2   nathanw 		break;
   1734  1.30.2.2   nathanw 	case IEEE80211_S_RUN:
   1735  1.30.2.8   nathanw 		if (ic->ic_opmode == IEEE80211_M_IBSS ||
   1736  1.30.2.8   nathanw 		    ic->ic_opmode == IEEE80211_M_AHDEMO)
   1737  1.30.2.2   nathanw 			awi_drvstate(sc, AWI_DRV_ADHSY);
   1738  1.30.2.2   nathanw 		else
   1739  1.30.2.2   nathanw 			awi_drvstate(sc, AWI_DRV_INFASSOC);
   1740  1.30.2.2   nathanw 		break;
   1741  1.30.2.2   nathanw 	}
   1742      1.10      onoe 
   1743  1.30.2.2   nathanw 	if (nstate == IEEE80211_S_INIT) {
   1744  1.30.2.2   nathanw 		sc->sc_substate = AWI_ST_NONE;
   1745  1.30.2.2   nathanw 		ic->ic_flags &= ~IEEE80211_F_SIBSS;
   1746  1.30.2.2   nathanw 		return 0;
   1747  1.30.2.2   nathanw 	}
   1748  1.30.2.2   nathanw 
   1749  1.30.2.2   nathanw 	/* state transition */
   1750  1.30.2.2   nathanw 	if (nstate == IEEE80211_S_SCAN) {
   1751  1.30.2.2   nathanw 		/* SCAN substate */
   1752  1.30.2.2   nathanw 		if (sc->sc_substate == AWI_ST_NONE) {
   1753  1.30.2.2   nathanw 			sc->sc_nstate = nstate;	/* next state in transition */
   1754  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SCAN_INIT;
   1755  1.30.2.2   nathanw 		}
   1756  1.30.2.2   nathanw 		switch (sc->sc_substate) {
   1757  1.30.2.2   nathanw 		case AWI_ST_SCAN_INIT:
   1758  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SCAN_SETMIB;
   1759  1.30.2.2   nathanw 			switch (ostate) {
   1760  1.30.2.2   nathanw 			case IEEE80211_S_RUN:
   1761  1.30.2.2   nathanw 				/* beacon miss */
   1762  1.30.2.2   nathanw 				if (ifp->if_flags & IFF_DEBUG)
   1763  1.30.2.2   nathanw 					printf("%s: no recent beacons from %s;"
   1764  1.30.2.2   nathanw 					    " rescanning\n",
   1765  1.30.2.2   nathanw 					    ifp->if_xname,
   1766  1.30.2.8   nathanw 					    ether_sprintf(ic->ic_bss.ni_bssid));
   1767  1.30.2.2   nathanw 				/* FALLTHRU */
   1768  1.30.2.2   nathanw 			case IEEE80211_S_AUTH:
   1769  1.30.2.2   nathanw 			case IEEE80211_S_ASSOC:
   1770  1.30.2.2   nathanw 				/* timeout restart scan */
   1771  1.30.2.8   nathanw 				ieee80211_free_allnodes(ic);
   1772  1.30.2.2   nathanw 				/* FALLTHRU */
   1773  1.30.2.2   nathanw 			case IEEE80211_S_INIT:
   1774  1.30.2.2   nathanw 				ic->ic_flags |= IEEE80211_F_ASCAN;
   1775  1.30.2.2   nathanw 				ic->ic_scan_timer = 0;
   1776  1.30.2.2   nathanw 				/* FALLTHRU */
   1777  1.30.2.2   nathanw 			case IEEE80211_S_SCAN:
   1778  1.30.2.2   nathanw 				/* scan next */
   1779      1.10      onoe 				break;
   1780      1.10      onoe 			}
   1781  1.30.2.2   nathanw 			if (ic->ic_flags & IEEE80211_F_ASCAN)
   1782  1.30.2.2   nathanw 				newmode = AWI_SCAN_ACTIVE;
   1783      1.10      onoe 			else
   1784  1.30.2.2   nathanw 				newmode = AWI_SCAN_PASSIVE;
   1785  1.30.2.2   nathanw 			if (sc->sc_mib_mgt.aScan_Mode != newmode) {
   1786  1.30.2.2   nathanw 				sc->sc_mib_mgt.aScan_Mode = newmode;
   1787  1.30.2.2   nathanw 				if ((error = awi_mib(sc, AWI_CMD_SET_MIB,
   1788  1.30.2.2   nathanw 				    AWI_MIB_MGT, AWI_NOWAIT)) != 0)
   1789  1.30.2.2   nathanw 					break;
   1790  1.30.2.2   nathanw 			}
   1791  1.30.2.2   nathanw 			/* FALLTHRU */
   1792  1.30.2.2   nathanw 		case AWI_ST_SCAN_SETMIB:
   1793  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SCAN_SCCMD;
   1794  1.30.2.2   nathanw 			if (sc->sc_cmd_inprog) {
   1795  1.30.2.2   nathanw 				if ((error = awi_cmd_wait(sc)) != 0)
   1796  1.30.2.2   nathanw 					break;
   1797  1.30.2.2   nathanw 			}
   1798  1.30.2.2   nathanw 			sc->sc_cmd_inprog = AWI_CMD_SCAN;
   1799  1.30.2.8   nathanw 			ni = &ic->ic_bss;
   1800  1.30.2.2   nathanw 			awi_write_2(sc, AWI_CA_SCAN_DURATION,
   1801  1.30.2.2   nathanw 			    (ic->ic_flags & IEEE80211_F_ASCAN) ?
   1802  1.30.2.2   nathanw 			    AWI_ASCAN_DURATION : AWI_PSCAN_DURATION);
   1803  1.30.2.2   nathanw 			if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
   1804  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_SET,
   1805  1.30.2.8   nathanw 				    IEEE80211_FH_CHANSET(ni->ni_chan));
   1806  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_PATTERN,
   1807  1.30.2.8   nathanw 				    IEEE80211_FH_CHANPAT(ni->ni_chan));
   1808  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_IDX, 1);
   1809  1.30.2.2   nathanw 			} else {
   1810  1.30.2.8   nathanw 				awi_write_1(sc, AWI_CA_SCAN_SET, ni->ni_chan);
   1811  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_PATTERN, 0);
   1812  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SCAN_IDX, 0);
   1813  1.30.2.2   nathanw 			}
   1814  1.30.2.2   nathanw 			awi_write_1(sc, AWI_CA_SCAN_SUSP, 0);
   1815  1.30.2.8   nathanw 			sc->sc_cur_chan = ni->ni_chan;
   1816  1.30.2.2   nathanw 			if ((error = awi_cmd(sc, AWI_CMD_SCAN, AWI_NOWAIT))
   1817  1.30.2.2   nathanw 			    != 0)
   1818  1.30.2.2   nathanw 				break;
   1819  1.30.2.2   nathanw 			/* FALLTHRU */
   1820  1.30.2.2   nathanw 		case AWI_ST_SCAN_SCCMD:
   1821  1.30.2.2   nathanw 			if (ic->ic_scan_timer == 0)
   1822  1.30.2.2   nathanw 				ic->ic_scan_timer =
   1823  1.30.2.2   nathanw 				    (ic->ic_flags & IEEE80211_F_ASCAN) ?
   1824  1.30.2.2   nathanw 				    IEEE80211_ASCAN_WAIT : IEEE80211_PSCAN_WAIT;
   1825  1.30.2.2   nathanw 			ifp->if_timer = 1;
   1826  1.30.2.2   nathanw 			ic->ic_state = nstate;
   1827  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_NONE;
   1828  1.30.2.2   nathanw 			error = EINPROGRESS;
   1829  1.30.2.2   nathanw 			break;
   1830  1.30.2.2   nathanw 		default:
   1831  1.30.2.2   nathanw 			DPRINTF(("awi_newstate: unexpected state %s/%s\n",
   1832  1.30.2.2   nathanw 			    stname[nstate], substname[sc->sc_substate]));
   1833  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_NONE;
   1834  1.30.2.2   nathanw 			error = EIO;
   1835  1.30.2.2   nathanw 			break;
   1836      1.10      onoe 		}
   1837  1.30.2.2   nathanw 		return error;
   1838  1.30.2.2   nathanw 	}
   1839  1.30.2.2   nathanw 
   1840  1.30.2.2   nathanw 	if (ostate == IEEE80211_S_SCAN) {
   1841  1.30.2.2   nathanw 		/* set SSID and channel */
   1842  1.30.2.2   nathanw 		/* substate */
   1843  1.30.2.2   nathanw 		if (sc->sc_substate == AWI_ST_NONE) {
   1844  1.30.2.2   nathanw 			sc->sc_nstate = nstate;	/* next state in transition */
   1845  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SUB_INIT;
   1846  1.30.2.2   nathanw 		}
   1847  1.30.2.8   nathanw 		ni = &ic->ic_bss;
   1848  1.30.2.2   nathanw 		switch (sc->sc_substate) {
   1849  1.30.2.2   nathanw 		case AWI_ST_SUB_INIT:
   1850  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SUB_SETSS;
   1851  1.30.2.8   nathanw 			IEEE80211_ADDR_COPY(&sc->sc_mib_mgt.aCurrent_BSS_ID,
   1852  1.30.2.8   nathanw 			    ni->ni_bssid);
   1853  1.30.2.2   nathanw 			memset(&sc->sc_mib_mgt.aCurrent_ESS_ID, 0,
   1854  1.30.2.2   nathanw 			    AWI_ESS_ID_SIZE);
   1855  1.30.2.2   nathanw 			sc->sc_mib_mgt.aCurrent_ESS_ID[0] =
   1856  1.30.2.2   nathanw 			    IEEE80211_ELEMID_SSID;
   1857  1.30.2.8   nathanw 			sc->sc_mib_mgt.aCurrent_ESS_ID[1] = ni->ni_esslen;
   1858  1.30.2.2   nathanw 			memcpy(&sc->sc_mib_mgt.aCurrent_ESS_ID[2],
   1859  1.30.2.8   nathanw 			    ni->ni_essid, ni->ni_esslen);
   1860  1.30.2.2   nathanw 			LE_WRITE_2(&sc->sc_mib_mgt.aBeacon_Period,
   1861  1.30.2.8   nathanw 			    ni->ni_intval);
   1862  1.30.2.2   nathanw 			if ((error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MGT,
   1863  1.30.2.2   nathanw 			    AWI_NOWAIT)) != 0)
   1864  1.30.2.2   nathanw 				break;
   1865  1.30.2.2   nathanw 			/* FALLTHRU */
   1866  1.30.2.2   nathanw 		case AWI_ST_SUB_SETSS:
   1867  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_SUB_SYNC;
   1868  1.30.2.2   nathanw 			if (sc->sc_cmd_inprog) {
   1869  1.30.2.6   nathanw 				if ((error = awi_cmd_wait(sc)) != 0)
   1870  1.30.2.2   nathanw 					break;
   1871  1.30.2.2   nathanw 			}
   1872  1.30.2.2   nathanw 			sc->sc_cmd_inprog = AWI_CMD_SYNC;
   1873  1.30.2.2   nathanw 			if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
   1874  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_SET,
   1875  1.30.2.8   nathanw 				    IEEE80211_FH_CHANSET(ni->ni_chan));
   1876  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_PATTERN,
   1877  1.30.2.8   nathanw 				    IEEE80211_FH_CHANPAT(ni->ni_chan));
   1878  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_IDX,
   1879  1.30.2.8   nathanw 				    ni->ni_fhindex);
   1880  1.30.2.2   nathanw 				awi_write_2(sc, AWI_CA_SYNC_DWELL,
   1881  1.30.2.8   nathanw 				    ni->ni_fhdwell);
   1882  1.30.2.2   nathanw 			} else {
   1883  1.30.2.8   nathanw 				awi_write_1(sc, AWI_CA_SYNC_SET, ni->ni_chan);
   1884  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_PATTERN, 0);
   1885  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_IDX, 0);
   1886  1.30.2.2   nathanw 				awi_write_2(sc, AWI_CA_SYNC_DWELL, 0);
   1887  1.30.2.2   nathanw 			}
   1888  1.30.2.8   nathanw 			if (ic->ic_flags & IEEE80211_F_SIBSS)
   1889  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_STARTBSS, 1);
   1890  1.30.2.2   nathanw 			else
   1891  1.30.2.2   nathanw 				awi_write_1(sc, AWI_CA_SYNC_STARTBSS, 0);
   1892  1.30.2.2   nathanw 			awi_write_2(sc, AWI_CA_SYNC_MBZ, 0);
   1893  1.30.2.2   nathanw 			awi_write_bytes(sc, AWI_CA_SYNC_TIMESTAMP,
   1894  1.30.2.8   nathanw 			    ni->ni_tstamp, 8);
   1895  1.30.2.8   nathanw 			awi_write_4(sc, AWI_CA_SYNC_REFTIME, ni->ni_rstamp);
   1896  1.30.2.8   nathanw 			sc->sc_cur_chan = ni->ni_chan;
   1897  1.30.2.2   nathanw 			if ((error = awi_cmd(sc, AWI_CMD_SYNC, AWI_NOWAIT))
   1898  1.30.2.2   nathanw 			    != 0)
   1899  1.30.2.2   nathanw 				break;
   1900  1.30.2.2   nathanw 			/* FALLTHRU */
   1901  1.30.2.2   nathanw 		case AWI_ST_SUB_SYNC:
   1902  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_NONE;
   1903  1.30.2.2   nathanw 			if (ic->ic_flags & IEEE80211_F_SIBSS) {
   1904  1.30.2.2   nathanw 				if ((error = awi_mib(sc, AWI_CMD_GET_MIB,
   1905  1.30.2.2   nathanw 				    AWI_MIB_MGT, AWI_WAIT)) != 0)
   1906  1.30.2.2   nathanw 					break;
   1907  1.30.2.8   nathanw 				IEEE80211_ADDR_COPY(ni->ni_bssid,
   1908  1.30.2.8   nathanw 				    &sc->sc_mib_mgt.aCurrent_BSS_ID);
   1909  1.30.2.2   nathanw 			} else {
   1910  1.30.2.2   nathanw 				if (nstate == IEEE80211_S_RUN) {
   1911  1.30.2.2   nathanw 					sc->sc_rx_timer = 10;
   1912  1.30.2.2   nathanw 					ifp->if_timer = 1;
   1913  1.30.2.2   nathanw 				}
   1914  1.30.2.2   nathanw 			}
   1915  1.30.2.2   nathanw 			error = 0;
   1916      1.10      onoe 			break;
   1917  1.30.2.2   nathanw 		default:
   1918  1.30.2.2   nathanw 			DPRINTF(("awi_newstate: unexpected state %s/%s\n",
   1919  1.30.2.2   nathanw 			    stname[nstate], substname[sc->sc_substate]));
   1920  1.30.2.2   nathanw 			sc->sc_substate = AWI_ST_NONE;
   1921  1.30.2.2   nathanw 			error = EIO;
   1922  1.30.2.2   nathanw 			break;
   1923  1.30.2.2   nathanw 		}
   1924  1.30.2.2   nathanw 		return error;
   1925       1.1  sommerfe 	}
   1926  1.30.2.2   nathanw 
   1927  1.30.2.2   nathanw 	sc->sc_substate = AWI_ST_NONE;
   1928  1.30.2.2   nathanw 
   1929  1.30.2.2   nathanw 	return 0;
   1930       1.1  sommerfe }
   1931       1.1  sommerfe 
   1932  1.30.2.2   nathanw static struct mbuf *
   1933  1.30.2.2   nathanw awi_ether_encap(struct awi_softc *sc, struct mbuf *m)
   1934      1.20      onoe {
   1935  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
   1936  1.30.2.8   nathanw 	struct ieee80211_node *ni = &ic->ic_bss;
   1937  1.30.2.2   nathanw 	struct ether_header *eh;
   1938  1.30.2.2   nathanw 	struct ieee80211_frame *wh;
   1939      1.20      onoe 
   1940  1.30.2.2   nathanw 	if (m->m_len < sizeof(struct ether_header)) {
   1941  1.30.2.2   nathanw 		m = m_pullup(m, sizeof(struct ether_header));
   1942  1.30.2.2   nathanw 		if (m == NULL)
   1943  1.30.2.2   nathanw 			return NULL;
   1944      1.20      onoe 	}
   1945  1.30.2.2   nathanw 	eh = mtod(m, struct ether_header *);
   1946  1.30.2.2   nathanw 	M_PREPEND(m, sizeof(struct ieee80211_frame), M_DONTWAIT);
   1947  1.30.2.2   nathanw 	if (m == NULL)
   1948  1.30.2.2   nathanw 		return NULL;
   1949  1.30.2.2   nathanw 	wh = mtod(m, struct ieee80211_frame *);
   1950  1.30.2.2   nathanw 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_DATA;
   1951  1.30.2.2   nathanw 	*(u_int16_t *)wh->i_dur = 0;
   1952  1.30.2.2   nathanw 	*(u_int16_t *)wh->i_seq =
   1953  1.30.2.8   nathanw 	    htole16(ni->ni_txseq << IEEE80211_SEQ_SEQ_SHIFT);
   1954  1.30.2.8   nathanw 	ni->ni_txseq++;
   1955  1.30.2.8   nathanw 	if (ic->ic_opmode == IEEE80211_M_IBSS ||
   1956  1.30.2.8   nathanw 	    ic->ic_opmode == IEEE80211_M_AHDEMO) {
   1957  1.30.2.2   nathanw 		wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
   1958  1.30.2.2   nathanw 		if (sc->sc_adhoc_ap)
   1959  1.30.2.8   nathanw 			IEEE80211_ADDR_COPY(wh->i_addr1, ni->ni_macaddr);
   1960  1.30.2.2   nathanw 		else
   1961  1.30.2.8   nathanw 			IEEE80211_ADDR_COPY(wh->i_addr1, eh->ether_dhost);
   1962  1.30.2.8   nathanw 		IEEE80211_ADDR_COPY(wh->i_addr2, eh->ether_shost);
   1963  1.30.2.8   nathanw 		IEEE80211_ADDR_COPY(wh->i_addr3, ni->ni_bssid);
   1964      1.20      onoe 	} else {
   1965  1.30.2.2   nathanw 		wh->i_fc[1] = IEEE80211_FC1_DIR_TODS;
   1966  1.30.2.8   nathanw 		IEEE80211_ADDR_COPY(wh->i_addr1, ni->ni_bssid);
   1967  1.30.2.8   nathanw 		IEEE80211_ADDR_COPY(wh->i_addr2, eh->ether_shost);
   1968  1.30.2.8   nathanw 		IEEE80211_ADDR_COPY(wh->i_addr3, eh->ether_dhost);
   1969      1.20      onoe 	}
   1970  1.30.2.2   nathanw 	return m;
   1971      1.20      onoe }
   1972      1.20      onoe 
   1973  1.30.2.2   nathanw static struct mbuf *
   1974  1.30.2.2   nathanw awi_ether_modcap(struct awi_softc *sc, struct mbuf *m)
   1975       1.1  sommerfe {
   1976  1.30.2.2   nathanw 	struct ieee80211com *ic = &sc->sc_ic;
   1977  1.30.2.2   nathanw 	struct ether_header eh;
   1978  1.30.2.2   nathanw 	struct ieee80211_frame wh;
   1979  1.30.2.2   nathanw 	struct llc *llc;
   1980       1.1  sommerfe 
   1981  1.30.2.2   nathanw 	if (m->m_len < sizeof(wh) + sizeof(eh)) {
   1982  1.30.2.2   nathanw 		m = m_pullup(m, sizeof(wh) + sizeof(eh));
   1983  1.30.2.2   nathanw 		if (m == NULL)
   1984  1.30.2.2   nathanw 			return NULL;
   1985      1.10      onoe 	}
   1986  1.30.2.2   nathanw 	memcpy(&wh, mtod(m, caddr_t), sizeof(wh));
   1987  1.30.2.2   nathanw 	if (wh.i_fc[0] != (IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_DATA))
   1988  1.30.2.2   nathanw 		return m;
   1989  1.30.2.2   nathanw 	memcpy(&eh, mtod(m, caddr_t) + sizeof(wh), sizeof(eh));
   1990  1.30.2.2   nathanw 	m_adj(m, sizeof(eh) - sizeof(*llc));
   1991  1.30.2.8   nathanw 	if (ic->ic_opmode == IEEE80211_M_IBSS ||
   1992  1.30.2.8   nathanw 	    ic->ic_opmode == IEEE80211_M_AHDEMO)
   1993  1.30.2.8   nathanw 		IEEE80211_ADDR_COPY(wh.i_addr2, eh.ether_shost);
   1994  1.30.2.2   nathanw 	memcpy(mtod(m, caddr_t), &wh, sizeof(wh));
   1995  1.30.2.2   nathanw 	llc = (struct llc *)(mtod(m, caddr_t) + sizeof(wh));
   1996  1.30.2.2   nathanw 	llc->llc_dsap = llc->llc_ssap = LLC_SNAP_LSAP;
   1997  1.30.2.2   nathanw 	llc->llc_control = LLC_UI;
   1998  1.30.2.2   nathanw 	llc->llc_snap.org_code[0] = 0;
   1999  1.30.2.2   nathanw 	llc->llc_snap.org_code[1] = 0;
   2000  1.30.2.2   nathanw 	llc->llc_snap.org_code[2] = 0;
   2001  1.30.2.2   nathanw 	llc->llc_snap.ether_type = eh.ether_type;
   2002  1.30.2.2   nathanw 	return m;
   2003       1.1  sommerfe }
   2004