bcmgenetreg.h revision 1.2.6.2
1 1.2.6.2 martin /* $NetBSD: bcmgenetreg.h,v 1.2.6.2 2020/04/08 14:08:06 martin Exp $ */ 2 1.2.6.2 martin 3 1.2.6.2 martin /*- 4 1.2.6.2 martin * Copyright (c) 2020 Jared McNeill <jmcneill (at) invisible.ca> 5 1.2.6.2 martin * All rights reserved. 6 1.2.6.2 martin * 7 1.2.6.2 martin * Redistribution and use in source and binary forms, with or without 8 1.2.6.2 martin * modification, are permitted provided that the following conditions 9 1.2.6.2 martin * are met: 10 1.2.6.2 martin * 1. Redistributions of source code must retain the above copyright 11 1.2.6.2 martin * notice, this list of conditions and the following disclaimer. 12 1.2.6.2 martin * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.6.2 martin * notice, this list of conditions and the following disclaimer in the 14 1.2.6.2 martin * documentation and/or other materials provided with the distribution. 15 1.2.6.2 martin * 16 1.2.6.2 martin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.2.6.2 martin * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.2.6.2 martin * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.2.6.2 martin * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.2.6.2 martin * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.2.6.2 martin * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.2.6.2 martin * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.2.6.2 martin * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.2.6.2 martin * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.2.6.2 martin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.2.6.2 martin * SUCH DAMAGE. 27 1.2.6.2 martin */ 28 1.2.6.2 martin 29 1.2.6.2 martin /* 30 1.2.6.2 martin * Broadcom GENETv5 31 1.2.6.2 martin */ 32 1.2.6.2 martin 33 1.2.6.2 martin #ifndef _BCMGENETREG_H 34 1.2.6.2 martin #define _BCMGENETREG_H 35 1.2.6.2 martin 36 1.2.6.2 martin #define GENET_SYS_REV_CTRL 0x000 37 1.2.6.2 martin #define SYS_REV_MAJOR __BITS(27,24) 38 1.2.6.2 martin #define SYS_REV_MINOR __BITS(19,16) 39 1.2.6.2 martin #define GENET_SYS_PORT_CTRL 0x004 40 1.2.6.2 martin #define GENET_SYS_PORT_MODE_EXT_GPHY 3 41 1.2.6.2 martin #define GENET_SYS_RBUF_FLUSH_CTRL 0x008 42 1.2.6.2 martin #define GENET_SYS_RBUF_FLUSH_RESET __BIT(1) 43 1.2.6.2 martin #define GENET_SYS_TBUF_FLUSH_CTRL 0x00c 44 1.2.6.2 martin #define GENET_EXT_RGMII_OOB_CTRL 0x08c 45 1.2.6.2 martin #define GENET_EXT_RGMII_OOB_ID_MODE_DISABLE __BIT(16) 46 1.2.6.2 martin #define GENET_EXT_RGMII_OOB_RGMII_MODE_EN __BIT(6) 47 1.2.6.2 martin #define GENET_EXT_RGMII_OOB_OOB_DISABLE __BIT(5) 48 1.2.6.2 martin #define GENET_EXT_RGMII_OOB_RGMII_LINK __BIT(4) 49 1.2.6.2 martin #define GENET_INTRL2_CPU_STAT 0x200 50 1.2.6.2 martin #define GENET_INTRL2_CPU_CLEAR 0x208 51 1.2.6.2 martin #define GENET_INTRL2_CPU_STAT_MASK 0x20c 52 1.2.6.2 martin #define GENET_INTRL2_CPU_SET_MASK 0x210 53 1.2.6.2 martin #define GENET_INTRL2_CPU_CLEAR_MASK 0x214 54 1.2.6.2 martin #define GENET_IRQ_MDIO_ERROR __BIT(24) 55 1.2.6.2 martin #define GENET_IRQ_MDIO_DONE __BIT(23) 56 1.2.6.2 martin #define GENET_IRQ_TXDMA_DONE __BIT(16) 57 1.2.6.2 martin #define GENET_IRQ_RXDMA_DONE __BIT(13) 58 1.2.6.2 martin #define GENET_RBUF_CTRL 0x300 59 1.2.6.2 martin #define GENET_RBUF_BAD_DIS __BIT(2) 60 1.2.6.2 martin #define GENET_RBUF_ALIGN_2B __BIT(1) 61 1.2.6.2 martin #define GENET_RBUF_64B_EN __BIT(0) 62 1.2.6.2 martin #define GENET_RBUF_TBUF_SIZE_CTRL 0x3b4 63 1.2.6.2 martin #define GENET_UMAC_CMD 0x808 64 1.2.6.2 martin #define GENET_UMAC_CMD_LCL_LOOP_EN __BIT(15) 65 1.2.6.2 martin #define GENET_UMAC_CMD_SW_RESET __BIT(13) 66 1.2.6.2 martin #define GENET_UMAC_CMD_PROMISC __BIT(4) 67 1.2.6.2 martin #define GENET_UMAC_CMD_SPEED __BITS(3,2) 68 1.2.6.2 martin #define GENET_UMAC_CMD_SPEED_10 0 69 1.2.6.2 martin #define GENET_UMAC_CMD_SPEED_100 1 70 1.2.6.2 martin #define GENET_UMAC_CMD_SPEED_1000 2 71 1.2.6.2 martin #define GENET_UMAC_CMD_RXEN __BIT(1) 72 1.2.6.2 martin #define GENET_UMAC_CMD_TXEN __BIT(0) 73 1.2.6.2 martin #define GENET_UMAC_MAC0 0x80c 74 1.2.6.2 martin #define GENET_UMAC_MAC1 0x810 75 1.2.6.2 martin #define GENET_UMAC_MAX_FRAME_LEN 0x814 76 1.2.6.2 martin #define GENET_UMAC_TX_FLUSH 0xb34 77 1.2.6.2 martin #define GENET_UMAC_MIB_CTRL 0xd80 78 1.2.6.2 martin #define GENET_UMAC_MIB_RESET_TX __BIT(2) 79 1.2.6.2 martin #define GENET_UMAC_MIB_RESET_RUNT __BIT(1) 80 1.2.6.2 martin #define GENET_UMAC_MIB_RESET_RX __BIT(0) 81 1.2.6.2 martin #define GENET_MDIO_CMD 0xe14 82 1.2.6.2 martin #define GENET_MDIO_START_BUSY __BIT(29) 83 1.2.6.2 martin #define GENET_MDIO_READ __BIT(27) 84 1.2.6.2 martin #define GENET_MDIO_WRITE __BIT(26) 85 1.2.6.2 martin #define GENET_MDIO_PMD __BITS(25,21) 86 1.2.6.2 martin #define GENET_MDIO_REG __BITS(20,16) 87 1.2.6.2 martin #define GENET_UMAC_MDF_CTRL 0xe50 88 1.2.6.2 martin #define GENET_UMAC_MDF_ADDR0(n) (0xe54 + (n) * 0x8) 89 1.2.6.2 martin #define GENET_UMAC_MDF_ADDR1(n) (0xe58 + (n) * 0x8) 90 1.2.6.2 martin 91 1.2.6.2 martin #define GENET_DMA_DESC_COUNT 256 92 1.2.6.2 martin #define GENET_DMA_DESC_SIZE 12 93 1.2.6.2 martin #define GENET_DMA_DEFAULT_QUEUE 16 94 1.2.6.2 martin 95 1.2.6.2 martin #define GENET_DMA_RING_SIZE 0x40 96 1.2.6.2 martin #define GENET_DMA_RINGS_SIZE (GENET_DMA_RING_SIZE * (GENET_DMA_DEFAULT_QUEUE + 1)) 97 1.2.6.2 martin 98 1.2.6.2 martin #define GENET_RX_BASE 0x2000 99 1.2.6.2 martin #define GENET_TX_BASE 0x4000 100 1.2.6.2 martin 101 1.2.6.2 martin #define GENET_RX_DMA_RINGBASE(qid) (GENET_RX_BASE + 0xc00 + GENET_DMA_RING_SIZE * (qid)) 102 1.2.6.2 martin #define GENET_RX_DMA_WRITE_PTR_LO(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x00) 103 1.2.6.2 martin #define GENET_RX_DMA_WRITE_PTR_HI(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x04) 104 1.2.6.2 martin #define GENET_RX_DMA_PROD_INDEX(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x08) 105 1.2.6.2 martin #define GENET_RX_DMA_CONS_INDEX(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x0c) 106 1.2.6.2 martin #define GENET_RX_DMA_RING_BUF_SIZE(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x10) 107 1.2.6.2 martin #define GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT __BITS(31,16) 108 1.2.6.2 martin #define GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH __BITS(15,0) 109 1.2.6.2 martin #define GENET_RX_DMA_START_ADDR_LO(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x14) 110 1.2.6.2 martin #define GENET_RX_DMA_START_ADDR_HI(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x18) 111 1.2.6.2 martin #define GENET_RX_DMA_END_ADDR_LO(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x1c) 112 1.2.6.2 martin #define GENET_RX_DMA_END_ADDR_HI(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x20) 113 1.2.6.2 martin #define GENET_RX_DMA_XON_XOFF_THRES(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x28) 114 1.2.6.2 martin #define GENET_RX_DMA_XON_XOFF_THRES_LO __BITS(31,16) 115 1.2.6.2 martin #define GENET_RX_DMA_XON_XOFF_THRES_HI __BITS(15,0) 116 1.2.6.2 martin #define GENET_RX_DMA_READ_PTR_LO(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x2c) 117 1.2.6.2 martin #define GENET_RX_DMA_READ_PTR_HI(qid) (GENET_RX_DMA_RINGBASE(qid) + 0x30) 118 1.2.6.2 martin 119 1.2.6.2 martin #define GENET_TX_DMA_RINGBASE(qid) (GENET_TX_BASE + 0xc00 + GENET_DMA_RING_SIZE * (qid)) 120 1.2.6.2 martin #define GENET_TX_DMA_READ_PTR_LO(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x00) 121 1.2.6.2 martin #define GENET_TX_DMA_READ_PTR_HI(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x04) 122 1.2.6.2 martin #define GENET_TX_DMA_CONS_INDEX(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x08) 123 1.2.6.2 martin #define GENET_TX_DMA_PROD_INDEX(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x0c) 124 1.2.6.2 martin #define GENET_TX_DMA_RING_BUF_SIZE(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x10) 125 1.2.6.2 martin #define GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT __BITS(31,16) 126 1.2.6.2 martin #define GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH __BITS(15,0) 127 1.2.6.2 martin #define GENET_TX_DMA_START_ADDR_LO(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x14) 128 1.2.6.2 martin #define GENET_TX_DMA_START_ADDR_HI(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x18) 129 1.2.6.2 martin #define GENET_TX_DMA_END_ADDR_LO(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x1c) 130 1.2.6.2 martin #define GENET_TX_DMA_END_ADDR_HI(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x20) 131 1.2.6.2 martin #define GENET_TX_DMA_MBUF_DONE_THRES(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x24) 132 1.2.6.2 martin #define GENET_TX_DMA_FLOW_PERIOD(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x28) 133 1.2.6.2 martin #define GENET_TX_DMA_WRITE_PTR_LO(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x2c) 134 1.2.6.2 martin #define GENET_TX_DMA_WRITE_PTR_HI(qid) (GENET_TX_DMA_RINGBASE(qid) + 0x30) 135 1.2.6.2 martin 136 1.2.6.2 martin #define GENET_RX_DESC_STATUS(idx) (GENET_RX_BASE + GENET_DMA_DESC_SIZE * (idx) + 0x00) 137 1.2.6.2 martin #define GENET_RX_DESC_STATUS_BUFLEN __BITS(27,16) 138 1.2.6.2 martin #define GENET_RX_DESC_STATUS_OWN __BIT(15) 139 1.2.6.2 martin #define GENET_RX_DESC_STATUS_EOP __BIT(14) 140 1.2.6.2 martin #define GENET_RX_DESC_STATUS_SOP __BIT(13) 141 1.2.6.2 martin #define GENET_RX_DESC_STATUS_RX_ERROR __BIT(2) 142 1.2.6.2 martin #define GENET_RX_DESC_ADDRESS_LO(idx) (GENET_RX_BASE + GENET_DMA_DESC_SIZE * (idx) + 0x04) 143 1.2.6.2 martin #define GENET_RX_DESC_ADDRESS_HI(idx) (GENET_RX_BASE + GENET_DMA_DESC_SIZE * (idx) + 0x08) 144 1.2.6.2 martin 145 1.2.6.2 martin #define GENET_TX_DESC_STATUS(idx) (GENET_TX_BASE + GENET_DMA_DESC_SIZE * (idx) + 0x00) 146 1.2.6.2 martin #define GENET_TX_DESC_STATUS_BUFLEN __BITS(27,16) 147 1.2.6.2 martin #define GENET_TX_DESC_STATUS_OWN __BIT(15) 148 1.2.6.2 martin #define GENET_TX_DESC_STATUS_EOP __BIT(14) 149 1.2.6.2 martin #define GENET_TX_DESC_STATUS_SOP __BIT(13) 150 1.2.6.2 martin #define GENET_TX_DESC_STATUS_QTAG __BITS(12,7) 151 1.2.6.2 martin #define GENET_TX_DESC_STATUS_CRC __BIT(6) 152 1.2.6.2 martin #define GENET_TX_DESC_ADDRESS_LO(idx) (GENET_TX_BASE + GENET_DMA_DESC_SIZE * (idx) + 0x04) 153 1.2.6.2 martin #define GENET_TX_DESC_ADDRESS_HI(idx) (GENET_TX_BASE + GENET_DMA_DESC_SIZE * (idx) + 0x08) 154 1.2.6.2 martin 155 1.2.6.2 martin #define GENET_RX_DMA_RING_CFG (GENET_RX_BASE + 0x1040 + 0x00) 156 1.2.6.2 martin #define GENET_RX_DMA_CTRL (GENET_RX_BASE + 0x1040 + 0x04) 157 1.2.6.2 martin #define GENET_RX_DMA_CTRL_RBUF_EN(qid) __BIT((qid) + 1) 158 1.2.6.2 martin #define GENET_RX_DMA_CTRL_EN __BIT(0) 159 1.2.6.2 martin #define GENET_RX_SCB_BURST_SIZE (GENET_RX_BASE + 0x1040 + 0x0c) 160 1.2.6.2 martin 161 1.2.6.2 martin #define GENET_TX_DMA_RING_CFG (GENET_TX_BASE + 0x1040 + 0x00) 162 1.2.6.2 martin #define GENET_TX_DMA_CTRL (GENET_TX_BASE + 0x1040 + 0x04) 163 1.2.6.2 martin #define GENET_TX_DMA_CTRL_RBUF_EN(qid) __BIT((qid) + 1) 164 1.2.6.2 martin #define GENET_TX_DMA_CTRL_EN __BIT(0) 165 1.2.6.2 martin #define GENET_TX_SCB_BURST_SIZE (GENET_TX_BASE + 0x1040 + 0x0c) 166 1.2.6.2 martin 167 1.2.6.2 martin #endif /* !_BCMGENETREG_H */ 168
Indexes created Wed Oct 22 13:09:56 GMT 2025