bha.c revision 1.34 1 /* $NetBSD: bha.c,v 1.34 2000/02/12 19:12:53 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
9 * Simulation Facility, NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Originally written by Julian Elischer (julian (at) tfs.com)
42 * for TRW Financial Systems for use under the MACH(2.5) operating system.
43 *
44 * TRW Financial Systems, in accordance with their agreement with Carnegie
45 * Mellon University, makes this software available to CMU to distribute
46 * or use in any manner that they see fit as long as this message is kept with
47 * the software. For this reason TFS also grants any other persons or
48 * organisations permission to use or modify this software.
49 *
50 * TFS supplies this software to be publicly redistributed
51 * on the understanding that TFS is not responsible for the correct
52 * functioning of this software in any circumstances.
53 */
54
55 #include "opt_ddb.h"
56
57 #include <sys/types.h>
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/kernel.h>
61 #include <sys/errno.h>
62 #include <sys/ioctl.h>
63 #include <sys/device.h>
64 #include <sys/malloc.h>
65 #include <sys/buf.h>
66 #include <sys/proc.h>
67 #include <sys/user.h>
68
69 #include <vm/vm.h> /* for PAGE_SIZE */
70
71 #include <machine/bus.h>
72 #include <machine/intr.h>
73
74 #include <dev/scsipi/scsi_all.h>
75 #include <dev/scsipi/scsipi_all.h>
76 #include <dev/scsipi/scsiconf.h>
77
78 #include <dev/ic/bhareg.h>
79 #include <dev/ic/bhavar.h>
80
81 #ifndef DDB
82 #define Debugger() panic("should call debugger here (bha.c)")
83 #endif /* ! DDB */
84
85 #define BHA_MAXXFER ((BHA_NSEG - 1) << PGSHIFT)
86
87 #ifdef BHADEBUG
88 int bha_debug = 0;
89 #endif /* BHADEBUG */
90
91 int bha_cmd __P((bus_space_tag_t, bus_space_handle_t, struct bha_softc *,
92 int, u_char *, int, u_char *));
93
94 int bha_scsi_cmd __P((struct scsipi_xfer *));
95 void bha_minphys __P((struct buf *));
96
97 void bha_done __P((struct bha_softc *, struct bha_ccb *));
98 int bha_poll __P((struct bha_softc *, struct scsipi_xfer *, int));
99 void bha_timeout __P((void *arg));
100
101 int bha_init __P((struct bha_softc *));
102
103 int bha_create_mailbox __P((struct bha_softc *));
104 void bha_collect_mbo __P((struct bha_softc *));
105
106 void bha_queue_ccb __P((struct bha_softc *, struct bha_ccb *));
107 void bha_start_ccbs __P((struct bha_softc *));
108 void bha_finish_ccbs __P((struct bha_softc *));
109
110 struct bha_ccb *bha_ccb_phys_kv __P((struct bha_softc *, bus_addr_t));
111 void bha_create_ccbs __P((struct bha_softc *, int));
112 int bha_init_ccb __P((struct bha_softc *, struct bha_ccb *));
113 struct bha_ccb *bha_get_ccb __P((struct bha_softc *, int));
114 void bha_free_ccb __P((struct bha_softc *, struct bha_ccb *));
115
116 /* the below structure is so we have a default dev struct for out link struct */
117 struct scsipi_device bha_dev = {
118 NULL, /* Use default error handler */
119 NULL, /* have a queue, served by this */
120 NULL, /* have no async handler */
121 NULL, /* Use default 'done' routine */
122 };
123
124 #define BHA_RESET_TIMEOUT 2000 /* time to wait for reset (mSec) */
125 #define BHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */
126
127 /*
128 * Number of CCBs in an allocation group; must be computed at run-time.
129 */
130 int bha_ccbs_per_group;
131
132 __inline struct bha_mbx_out *bha_nextmbo __P((struct bha_softc *,
133 struct bha_mbx_out *));
134 __inline struct bha_mbx_in *bha_nextmbi __P((struct bha_softc *,
135 struct bha_mbx_in *));
136
137 __inline struct bha_mbx_out *
138 bha_nextmbo(sc, mbo)
139 struct bha_softc *sc;
140 struct bha_mbx_out *mbo;
141 {
142
143 if (mbo == &sc->sc_mbo[sc->sc_mbox_count - 1])
144 return (&sc->sc_mbo[0]);
145 return (mbo + 1);
146 }
147
148 __inline struct bha_mbx_in *
149 bha_nextmbi(sc, mbi)
150 struct bha_softc *sc;
151 struct bha_mbx_in *mbi;
152 {
153
154 if (mbi == &sc->sc_mbi[sc->sc_mbox_count - 1])
155 return (&sc->sc_mbi[0]);
156 return (mbi + 1);
157 }
158
159 /*
160 * bha_attach:
161 *
162 * Finish attaching a Buslogic controller, and configure children.
163 */
164 void
165 bha_attach(sc, bpd)
166 struct bha_softc *sc;
167 struct bha_probe_data *bpd;
168 {
169 int initial_ccbs;
170
171 /*
172 * Initialize the number of CCBs per group.
173 */
174 if (bha_ccbs_per_group == 0)
175 bha_ccbs_per_group = BHA_CCBS_PER_GROUP;
176
177 initial_ccbs = bha_info(sc);
178 if (initial_ccbs == 0) {
179 printf("%s: unable to get adapter info\n",
180 sc->sc_dev.dv_xname);
181 return;
182 }
183
184 /*
185 * Fill in the adapter.
186 */
187 sc->sc_adapter.scsipi_cmd = bha_scsi_cmd;
188 sc->sc_adapter.scsipi_minphys = bha_minphys;
189
190 /*
191 * fill in the prototype scsipi_link.
192 */
193 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
194 sc->sc_link.adapter_softc = sc;
195 sc->sc_link.scsipi_scsi.adapter_target = sc->sc_scsi_id;
196 sc->sc_link.adapter = &sc->sc_adapter;
197 sc->sc_link.device = &bha_dev;
198 sc->sc_link.openings = 4;
199 sc->sc_link.scsipi_scsi.max_target =
200 (sc->sc_flags & BHAF_WIDE) ? 15 : 7;
201 sc->sc_link.scsipi_scsi.max_lun =
202 (sc->sc_flags & BHAF_WIDE_LUN) ? 31 : 7;
203 sc->sc_link.type = BUS_SCSI;
204
205 TAILQ_INIT(&sc->sc_free_ccb);
206 TAILQ_INIT(&sc->sc_waiting_ccb);
207 TAILQ_INIT(&sc->sc_allocating_ccbs);
208 TAILQ_INIT(&sc->sc_queue);
209
210 if (bha_create_mailbox(sc) != 0)
211 return;
212
213 bha_create_ccbs(sc, initial_ccbs);
214 if (sc->sc_cur_ccbs < 2) {
215 printf("%s: not enough CCBs to run\n",
216 sc->sc_dev.dv_xname);
217 return;
218 }
219
220 if (bha_init(sc) != 0)
221 return;
222
223 (void) config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
224 }
225
226 /*
227 * bha_intr:
228 *
229 * Interrupt service routine.
230 */
231 int
232 bha_intr(arg)
233 void *arg;
234 {
235 struct bha_softc *sc = arg;
236 bus_space_tag_t iot = sc->sc_iot;
237 bus_space_handle_t ioh = sc->sc_ioh;
238 u_char sts;
239
240 #ifdef BHADEBUG
241 printf("%s: bha_intr ", sc->sc_dev.dv_xname);
242 #endif /* BHADEBUG */
243
244 /*
245 * First acknowlege the interrupt, Then if it's not telling about
246 * a completed operation just return.
247 */
248 sts = bus_space_read_1(iot, ioh, BHA_INTR_PORT);
249 if ((sts & BHA_INTR_ANYINTR) == 0)
250 return (0);
251 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_IRST);
252
253 #ifdef BHADIAG
254 /* Make sure we clear CCB_SENDING before finishing a CCB. */
255 bha_collect_mbo(sc);
256 #endif
257
258 /* Mail box out empty? */
259 if (sts & BHA_INTR_MBOA) {
260 struct bha_toggle toggle;
261
262 toggle.cmd.opcode = BHA_MBO_INTR_EN;
263 toggle.cmd.enable = 0;
264 bha_cmd(iot, ioh, sc,
265 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
266 0, (u_char *)0);
267 bha_start_ccbs(sc);
268 }
269
270 /* Mail box in full? */
271 if (sts & BHA_INTR_MBIF)
272 bha_finish_ccbs(sc);
273
274 return (1);
275 }
276
277 /*****************************************************************************
278 * SCSI interface routines
279 *****************************************************************************/
280
281 /*
282 * bha_scsi_cmd:
283 *
284 * Start a SCSI operation.
285 */
286 int
287 bha_scsi_cmd(xs)
288 struct scsipi_xfer *xs;
289 {
290 struct scsipi_link *sc_link = xs->sc_link;
291 struct bha_softc *sc = sc_link->adapter_softc;
292 bus_dma_tag_t dmat = sc->sc_dmat;
293 struct bha_ccb *ccb;
294 int error, seg, flags, s;
295 int fromqueue = 0, dontqueue = 0, nowait = 0;
296
297 SC_DEBUG(sc_link, SDEV_DB2, ("bha_scsi_cmd\n"));
298
299 s = splbio(); /* protect the queue */
300
301 /*
302 * If we're running the queue from bha_done(), we've been
303 * called with the first queue entry as our argument.
304 */
305 if (xs == TAILQ_FIRST(&sc->sc_queue)) {
306 TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q);
307 fromqueue = 1;
308 nowait = 1;
309 goto get_ccb;
310 }
311
312 /* Polled requests can't be queued for later. */
313 dontqueue = xs->xs_control & XS_CTL_POLL;
314
315 /*
316 * If there are jobs in the queue, run them first.
317 */
318 if (TAILQ_FIRST(&sc->sc_queue) != NULL) {
319 /*
320 * If we can't queue, we have to abort, since
321 * we have to preserve order.
322 */
323 if (dontqueue) {
324 splx(s);
325 xs->error = XS_DRIVER_STUFFUP;
326 return (TRY_AGAIN_LATER);
327 }
328
329 /*
330 * Swap with the first queue entry.
331 */
332 TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q);
333 xs = TAILQ_FIRST(&sc->sc_queue);
334 TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q);
335 fromqueue = 1;
336 }
337
338 get_ccb:
339 /*
340 * get a ccb to use. If the transfer
341 * is from a buf (possibly from interrupt time)
342 * then we can't allow it to sleep
343 */
344 flags = xs->xs_control;
345 if (nowait)
346 flags |= XS_CTL_NOSLEEP;
347 if ((ccb = bha_get_ccb(sc, flags)) == NULL) {
348 /*
349 * If we can't queue, we lose.
350 */
351 if (dontqueue) {
352 splx(s);
353 xs->error = XS_DRIVER_STUFFUP;
354 return (TRY_AGAIN_LATER);
355 }
356
357 /*
358 * Stuff ourselves into the queue, in front
359 * if we came off in the first place.
360 */
361 if (fromqueue)
362 TAILQ_INSERT_HEAD(&sc->sc_queue, xs, adapter_q);
363 else
364 TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q);
365 splx(s);
366 return (SUCCESSFULLY_QUEUED);
367 }
368
369 splx(s); /* done playing with the queue */
370
371 ccb->xs = xs;
372 ccb->timeout = xs->timeout;
373
374 /*
375 * Put all the arguments for the xfer in the ccb
376 */
377 if (flags & XS_CTL_RESET) {
378 ccb->opcode = BHA_RESET_CCB;
379 ccb->scsi_cmd_length = 0;
380 } else {
381 /* can't use S/G if zero length */
382 ccb->opcode = (xs->datalen ? BHA_INIT_SCAT_GATH_CCB
383 : BHA_INITIATOR_CCB);
384 bcopy(xs->cmd, &ccb->scsi_cmd,
385 ccb->scsi_cmd_length = xs->cmdlen);
386 }
387
388 if (xs->datalen) {
389 /*
390 * Map the DMA transfer.
391 */
392 #ifdef TFS
393 if (flags & XS_CTL_DATA_UIO) {
394 error = bus_dmamap_load_uio(dmat,
395 ccb->dmamap_xfer, (struct uio *)xs->data,
396 (flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
397 BUS_DMA_WAITOK);
398 } else
399 #endif /* TFS */
400 {
401 error = bus_dmamap_load(dmat,
402 ccb->dmamap_xfer, xs->data, xs->datalen, NULL,
403 (flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
404 BUS_DMA_WAITOK);
405 }
406
407 if (error) {
408 if (error == EFBIG) {
409 printf("%s: bha_scsi_cmd, more than %d"
410 " dma segments\n",
411 sc->sc_dev.dv_xname, BHA_NSEG);
412 } else {
413 printf("%s: bha_scsi_cmd, error %d loading"
414 " dma map\n",
415 sc->sc_dev.dv_xname, error);
416 }
417 goto bad;
418 }
419
420 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
421 ccb->dmamap_xfer->dm_mapsize,
422 (flags & XS_CTL_DATA_IN) ? BUS_DMASYNC_PREREAD :
423 BUS_DMASYNC_PREWRITE);
424
425 /*
426 * Load the hardware scatter/gather map with the
427 * contents of the DMA map.
428 */
429 for (seg = 0; seg < ccb->dmamap_xfer->dm_nsegs; seg++) {
430 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_addr,
431 ccb->scat_gath[seg].seg_addr);
432 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_len,
433 ccb->scat_gath[seg].seg_len);
434 }
435
436 ltophys(ccb->hashkey + offsetof(struct bha_ccb, scat_gath),
437 ccb->data_addr);
438 ltophys(ccb->dmamap_xfer->dm_nsegs *
439 sizeof(struct bha_scat_gath), ccb->data_length);
440 } else {
441 /*
442 * No data xfer, use non S/G values.
443 */
444 ltophys(0, ccb->data_addr);
445 ltophys(0, ccb->data_length);
446 }
447
448 ccb->data_out = 0;
449 ccb->data_in = 0;
450 ccb->target = sc_link->scsipi_scsi.target;
451 ccb->lun = sc_link->scsipi_scsi.lun;
452 ltophys(ccb->hashkey + offsetof(struct bha_ccb, scsi_sense),
453 ccb->sense_ptr);
454 ccb->req_sense_length = sizeof(ccb->scsi_sense);
455 ccb->host_stat = 0x00;
456 ccb->target_stat = 0x00;
457 ccb->link_id = 0;
458 ltophys(0, ccb->link_addr);
459
460 BHA_CCB_SYNC(sc, ccb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
461
462 s = splbio();
463 bha_queue_ccb(sc, ccb);
464 splx(s);
465
466 SC_DEBUG(sc_link, SDEV_DB3, ("cmd_sent\n"));
467 if ((flags & XS_CTL_POLL) == 0)
468 return (SUCCESSFULLY_QUEUED);
469
470 /*
471 * If we can't use interrupts, poll on completion
472 */
473 if (bha_poll(sc, xs, ccb->timeout)) {
474 bha_timeout(ccb);
475 if (bha_poll(sc, xs, ccb->timeout))
476 bha_timeout(ccb);
477 }
478 return (COMPLETE);
479
480 bad:
481 xs->error = XS_DRIVER_STUFFUP;
482 bha_free_ccb(sc, ccb);
483 return (COMPLETE);
484 }
485
486 /*
487 * bha_minphys:
488 *
489 * Limit a transfer to our maximum transfer size.
490 */
491 void
492 bha_minphys(bp)
493 struct buf *bp;
494 {
495
496 if (bp->b_bcount > BHA_MAXXFER)
497 bp->b_bcount = BHA_MAXXFER;
498 minphys(bp);
499 }
500
501 /*****************************************************************************
502 * SCSI job execution helper routines
503 *****************************************************************************/
504
505 /*
506 * bha_done:
507 *
508 * A CCB has completed execution. Pass the status back to the
509 * upper layer.
510 */
511 void
512 bha_done(sc, ccb)
513 struct bha_softc *sc;
514 struct bha_ccb *ccb;
515 {
516 bus_dma_tag_t dmat = sc->sc_dmat;
517 struct scsipi_xfer *xs = ccb->xs;
518
519 SC_DEBUG(xs->sc_link, SDEV_DB2, ("bha_done\n"));
520
521 #ifdef BHADIAG
522 if (ccb->flags & CCB_SENDING) {
523 printf("%s: exiting ccb still in transit!\n",
524 sc->sc_dev.dv_xname);
525 Debugger();
526 return;
527 }
528 #endif
529 if ((ccb->flags & CCB_ALLOC) == 0) {
530 printf("%s: exiting ccb not allocated!\n",
531 sc->sc_dev.dv_xname);
532 Debugger();
533 return;
534 }
535
536 /*
537 * If we were a data transfer, unload the map that described
538 * the data buffer.
539 */
540 if (xs->datalen) {
541 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
542 ccb->dmamap_xfer->dm_mapsize,
543 (xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMASYNC_POSTREAD :
544 BUS_DMASYNC_POSTWRITE);
545 bus_dmamap_unload(dmat, ccb->dmamap_xfer);
546 }
547
548 if (xs->error == XS_NOERROR) {
549 if (ccb->host_stat != BHA_OK) {
550 switch (ccb->host_stat) {
551 case BHA_SEL_TIMEOUT: /* No response */
552 xs->error = XS_SELTIMEOUT;
553 break;
554 default: /* Other scsi protocol messes */
555 printf("%s: host_stat %x\n",
556 sc->sc_dev.dv_xname, ccb->host_stat);
557 xs->error = XS_DRIVER_STUFFUP;
558 break;
559 }
560 } else if (ccb->target_stat != SCSI_OK) {
561 switch (ccb->target_stat) {
562 case SCSI_CHECK:
563 memcpy(&xs->sense.scsi_sense,
564 &ccb->scsi_sense,
565 sizeof(xs->sense.scsi_sense));
566 xs->error = XS_SENSE;
567 break;
568 case SCSI_BUSY:
569 xs->error = XS_BUSY;
570 break;
571 default:
572 printf("%s: target_stat %x\n",
573 sc->sc_dev.dv_xname, ccb->target_stat);
574 xs->error = XS_DRIVER_STUFFUP;
575 break;
576 }
577 } else
578 xs->resid = 0;
579 }
580
581 bha_free_ccb(sc, ccb);
582
583 xs->xs_status |= XS_STS_DONE;
584 scsipi_done(xs);
585
586 /*
587 * If there are queue entries in the software queue, try to
588 * run the first one. We should be more or less guaranteed
589 * to succeed, since we just freed a CCB.
590 *
591 * NOTE: bha_scsi_cmd() relies on our calling it with
592 * the first entry in the queue.
593 */
594 if ((xs = TAILQ_FIRST(&sc->sc_queue)) != NULL)
595 (void) bha_scsi_cmd(xs);
596 }
597
598 /*
599 * bha_poll:
600 *
601 * Poll for completion of the specified job.
602 */
603 int
604 bha_poll(sc, xs, count)
605 struct bha_softc *sc;
606 struct scsipi_xfer *xs;
607 int count;
608 {
609 bus_space_tag_t iot = sc->sc_iot;
610 bus_space_handle_t ioh = sc->sc_ioh;
611
612 /* timeouts are in msec, so we loop in 1000 usec cycles */
613 while (count) {
614 /*
615 * If we had interrupts enabled, would we
616 * have got an interrupt?
617 */
618 if (bus_space_read_1(iot, ioh, BHA_INTR_PORT) &
619 BHA_INTR_ANYINTR)
620 bha_intr(sc);
621 if (xs->xs_status & XS_STS_DONE)
622 return (0);
623 delay(1000); /* only happens in boot so ok */
624 count--;
625 }
626 return (1);
627 }
628
629 /*
630 * bha_timeout:
631 *
632 * CCB timeout handler.
633 */
634 void
635 bha_timeout(arg)
636 void *arg;
637 {
638 struct bha_ccb *ccb = arg;
639 struct scsipi_xfer *xs = ccb->xs;
640 struct scsipi_link *sc_link = xs->sc_link;
641 struct bha_softc *sc = sc_link->adapter_softc;
642 int s;
643
644 scsi_print_addr(sc_link);
645 printf("timed out");
646
647 s = splbio();
648
649 #ifdef BHADIAG
650 /*
651 * If the ccb's mbx is not free, then the board has gone Far East?
652 */
653 bha_collect_mbo(sc);
654 if (ccb->flags & CCB_SENDING) {
655 printf("%s: not taking commands!\n", sc->sc_dev.dv_xname);
656 Debugger();
657 }
658 #endif
659
660 /*
661 * If it has been through before, then
662 * a previous abort has failed, don't
663 * try abort again
664 */
665 if (ccb->flags & CCB_ABORT) {
666 /* abort timed out */
667 printf(" AGAIN\n");
668 /* XXX Must reset! */
669 } else {
670 /* abort the operation that has timed out */
671 printf("\n");
672 ccb->xs->error = XS_TIMEOUT;
673 ccb->timeout = BHA_ABORT_TIMEOUT;
674 ccb->flags |= CCB_ABORT;
675 bha_queue_ccb(sc, ccb);
676 }
677
678 splx(s);
679 }
680
681 /*****************************************************************************
682 * Misc. subroutines.
683 *****************************************************************************/
684
685 /*
686 * bha_cmd:
687 *
688 * Send a command to the Buglogic controller.
689 */
690 int
691 bha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf)
692 bus_space_tag_t iot;
693 bus_space_handle_t ioh;
694 struct bha_softc *sc;
695 int icnt, ocnt;
696 u_char *ibuf, *obuf;
697 {
698 const char *name;
699 register int i;
700 int wait;
701 u_char sts;
702 u_char opcode = ibuf[0];
703
704 if (sc != NULL)
705 name = sc->sc_dev.dv_xname;
706 else
707 name = "(bha probe)";
708
709 /*
710 * Calculate a reasonable timeout for the command.
711 */
712 switch (opcode) {
713 case BHA_INQUIRE_DEVICES:
714 case BHA_INQUIRE_DEVICES_2:
715 wait = 90 * 20000;
716 break;
717 default:
718 wait = 1 * 20000;
719 break;
720 }
721
722 /*
723 * Wait for the adapter to go idle, unless it's one of
724 * the commands which don't need this
725 */
726 if (opcode != BHA_MBO_INTR_EN) {
727 for (i = 20000; i; i--) { /* 1 sec? */
728 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
729 if (sts & BHA_STAT_IDLE)
730 break;
731 delay(50);
732 }
733 if (!i) {
734 printf("%s: bha_cmd, host not idle(0x%x)\n",
735 name, sts);
736 return (1);
737 }
738 }
739
740 /*
741 * Now that it is idle, if we expect output, preflush the
742 * queue feeding to us.
743 */
744 if (ocnt) {
745 while ((bus_space_read_1(iot, ioh, BHA_STAT_PORT)) &
746 BHA_STAT_DF)
747 bus_space_read_1(iot, ioh, BHA_DATA_PORT);
748 }
749
750 /*
751 * Output the command and the number of arguments given
752 * for each byte, first check the port is empty.
753 */
754 while (icnt--) {
755 for (i = wait; i; i--) {
756 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
757 if (!(sts & BHA_STAT_CDF))
758 break;
759 delay(50);
760 }
761 if (!i) {
762 if (opcode != BHA_INQUIRE_REVISION)
763 printf("%s: bha_cmd, cmd/data port full\n",
764 name);
765 goto bad;
766 }
767 bus_space_write_1(iot, ioh, BHA_CMD_PORT, *ibuf++);
768 }
769
770 /*
771 * If we expect input, loop that many times, each time,
772 * looking for the data register to have valid data
773 */
774 while (ocnt--) {
775 for (i = wait; i; i--) {
776 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
777 if (sts & BHA_STAT_DF)
778 break;
779 delay(50);
780 }
781 if (!i) {
782 if (opcode != BHA_INQUIRE_REVISION)
783 printf("%s: bha_cmd, cmd/data port empty %d\n",
784 name, ocnt);
785 goto bad;
786 }
787 *obuf++ = bus_space_read_1(iot, ioh, BHA_DATA_PORT);
788 }
789
790 /*
791 * Wait for the board to report a finished instruction.
792 * We may get an extra interrupt for the HACC signal, but this is
793 * unimportant.
794 */
795 if (opcode != BHA_MBO_INTR_EN && opcode != BHA_MODIFY_IOPORT) {
796 for (i = 20000; i; i--) { /* 1 sec? */
797 sts = bus_space_read_1(iot, ioh, BHA_INTR_PORT);
798 /* XXX Need to save this in the interrupt handler? */
799 if (sts & BHA_INTR_HACC)
800 break;
801 delay(50);
802 }
803 if (!i) {
804 printf("%s: bha_cmd, host not finished(0x%x)\n",
805 name, sts);
806 return (1);
807 }
808 }
809 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_IRST);
810 return (0);
811
812 bad:
813 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_SRST);
814 return (1);
815 }
816
817 /*
818 * bha_find:
819 *
820 * Find the board and determine it's irq/drq.
821 */
822 int
823 bha_find(iot, ioh, sc)
824 bus_space_tag_t iot;
825 bus_space_handle_t ioh;
826 struct bha_probe_data *sc;
827 {
828 int i;
829 u_char sts;
830 struct bha_extended_inquire inquire;
831 struct bha_config config;
832 int irq, drq;
833
834 /* Check something is at the ports we need to access */
835 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
836 if (sts == 0xFF)
837 return (0);
838
839 /*
840 * Reset board, If it doesn't respond, assume
841 * that it's not there.. good for the probe
842 */
843
844 bus_space_write_1(iot, ioh, BHA_CTRL_PORT,
845 BHA_CTRL_HRST | BHA_CTRL_SRST);
846
847 delay(100);
848 for (i = BHA_RESET_TIMEOUT; i; i--) {
849 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
850 if (sts == (BHA_STAT_IDLE | BHA_STAT_INIT))
851 break;
852 delay(1000);
853 }
854 if (!i) {
855 #ifdef BHADEBUG
856 if (bha_debug)
857 printf("bha_find: No answer from buslogic board\n");
858 #endif /* BHADEBUG */
859 return (0);
860 }
861
862 /*
863 * The BusLogic cards implement an Adaptec 1542 (aha)-compatible
864 * interface. The native bha interface is not compatible with
865 * an aha. 1542. We need to ensure that we never match an
866 * Adaptec 1542. We must also avoid sending Adaptec-compatible
867 * commands to a real bha, lest it go into 1542 emulation mode.
868 * (On an indirect bus like ISA, we should always probe for BusLogic
869 * interfaces before Adaptec interfaces).
870 */
871
872 /*
873 * Make sure we don't match an AHA-1542A or AHA-1542B, by checking
874 * for an extended-geometry register. The 1542[AB] don't have one.
875 */
876 sts = bus_space_read_1(iot, ioh, BHA_EXTGEOM_PORT);
877 if (sts == 0xFF)
878 return (0);
879
880 /*
881 * Check that we actually know how to use this board.
882 */
883 delay(1000);
884 inquire.cmd.opcode = BHA_INQUIRE_EXTENDED;
885 inquire.cmd.len = sizeof(inquire.reply);
886 i = bha_cmd(iot, ioh, (struct bha_softc *)0,
887 sizeof(inquire.cmd), (u_char *)&inquire.cmd,
888 sizeof(inquire.reply), (u_char *)&inquire.reply);
889
890 /*
891 * Some 1542Cs (CP, perhaps not CF, may depend on firmware rev)
892 * have the extended-geometry register and also respond to
893 * BHA_INQUIRE_EXTENDED. Make sure we never match such cards,
894 * by checking the size of the reply is what a BusLogic card returns.
895 */
896 if (i) {
897 #ifdef BHADEBUG
898 printf("bha_find: board returned %d instead of %d to %s\n",
899 i, sizeof(inquire.reply), "INQUIRE_EXTENDED");
900 #endif
901 return (0);
902 }
903
904 /* OK, we know we've found a buslogic adaptor. */
905
906 switch (inquire.reply.bus_type) {
907 case BHA_BUS_TYPE_24BIT:
908 case BHA_BUS_TYPE_32BIT:
909 break;
910 case BHA_BUS_TYPE_MCA:
911 /* We don't grok MicroChannel (yet). */
912 return (0);
913 default:
914 printf("bha_find: illegal bus type %c\n",
915 inquire.reply.bus_type);
916 return (0);
917 }
918
919 /*
920 * Assume we have a board at this stage setup dma channel from
921 * jumpers and save int level
922 */
923 delay(1000);
924 config.cmd.opcode = BHA_INQUIRE_CONFIG;
925 bha_cmd(iot, ioh, (struct bha_softc *)0,
926 sizeof(config.cmd), (u_char *)&config.cmd,
927 sizeof(config.reply), (u_char *)&config.reply);
928 switch (config.reply.chan) {
929 case EISADMA:
930 drq = -1;
931 break;
932 case CHAN0:
933 drq = 0;
934 break;
935 case CHAN5:
936 drq = 5;
937 break;
938 case CHAN6:
939 drq = 6;
940 break;
941 case CHAN7:
942 drq = 7;
943 break;
944 default:
945 printf("bha_find: illegal drq setting %x\n",
946 config.reply.chan);
947 return (0);
948 }
949
950 switch (config.reply.intr) {
951 case INT9:
952 irq = 9;
953 break;
954 case INT10:
955 irq = 10;
956 break;
957 case INT11:
958 irq = 11;
959 break;
960 case INT12:
961 irq = 12;
962 break;
963 case INT14:
964 irq = 14;
965 break;
966 case INT15:
967 irq = 15;
968 break;
969 default:
970 printf("bha_find: illegal irq setting %x\n",
971 config.reply.intr);
972 return (0);
973 }
974
975 /* if we want to fill in softc, do so now */
976 if (sc != NULL) {
977 sc->sc_irq = irq;
978 sc->sc_drq = drq;
979 }
980
981 return (1);
982 }
983
984 /*
985 * bha_disable_isacompat:
986 *
987 * Disable the ISA-compatiblity ioports on PCI bha devices,
988 * to ensure they're not autoconfigured a second time as an ISA bha.
989 */
990 int
991 bha_disable_isacompat(sc)
992 struct bha_softc *sc;
993 {
994 struct bha_isadisable isa_disable;
995
996 isa_disable.cmd.opcode = BHA_MODIFY_IOPORT;
997 isa_disable.cmd.modifier = BHA_IOMODIFY_DISABLE1;
998 bha_cmd(sc->sc_iot, sc->sc_ioh, sc,
999 sizeof(isa_disable.cmd), (u_char*)&isa_disable.cmd,
1000 0, (u_char *)0);
1001 return (0);
1002 }
1003
1004 /*
1005 * bha_info:
1006 *
1007 * Get information about the board, and report it. We
1008 * return the initial number of CCBs, 0 if we failed.
1009 */
1010 int
1011 bha_info(sc)
1012 struct bha_softc *sc;
1013 {
1014 bus_space_tag_t iot = sc->sc_iot;
1015 bus_space_handle_t ioh = sc->sc_ioh;
1016 struct bha_extended_inquire inquire;
1017 struct bha_config config;
1018 struct bha_devices devices;
1019 struct bha_setup setup;
1020 struct bha_model model;
1021 struct bha_revision revision;
1022 struct bha_digit digit;
1023 int i, j, initial_ccbs, rlen;
1024 char *p;
1025
1026 /*
1027 * Fetch the extended inquire information.
1028 */
1029 inquire.cmd.opcode = BHA_INQUIRE_EXTENDED;
1030 inquire.cmd.len = sizeof(inquire.reply);
1031 bha_cmd(iot, ioh, sc,
1032 sizeof(inquire.cmd), (u_char *)&inquire.cmd,
1033 sizeof(inquire.reply), (u_char *)&inquire.reply);
1034
1035 /*
1036 * Fetch the configuration information.
1037 */
1038 config.cmd.opcode = BHA_INQUIRE_CONFIG;
1039 bha_cmd(iot, ioh, sc,
1040 sizeof(config.cmd), (u_char *)&config.cmd,
1041 sizeof(config.reply), (u_char *)&config.reply);
1042
1043 sc->sc_scsi_id = config.reply.scsi_dev;
1044
1045 /*
1046 * Get the firmware revision.
1047 */
1048 p = sc->sc_firmware;
1049 revision.cmd.opcode = BHA_INQUIRE_REVISION;
1050 bha_cmd(iot, ioh, sc,
1051 sizeof(revision.cmd), (u_char *)&revision.cmd,
1052 sizeof(revision.reply), (u_char *)&revision.reply);
1053 *p++ = revision.reply.firm_revision;
1054 *p++ = '.';
1055 *p++ = revision.reply.firm_version;
1056 digit.cmd.opcode = BHA_INQUIRE_REVISION_3;
1057 bha_cmd(iot, ioh, sc,
1058 sizeof(digit.cmd), (u_char *)&digit.cmd,
1059 sizeof(digit.reply), (u_char *)&digit.reply);
1060 *p++ = digit.reply.digit;
1061 if (revision.reply.firm_revision >= '3' ||
1062 (revision.reply.firm_revision == '3' &&
1063 revision.reply.firm_version >= '3')) {
1064 digit.cmd.opcode = BHA_INQUIRE_REVISION_4;
1065 bha_cmd(iot, ioh, sc,
1066 sizeof(digit.cmd), (u_char *)&digit.cmd,
1067 sizeof(digit.reply), (u_char *)&digit.reply);
1068 *p++ = digit.reply.digit;
1069 }
1070 while (p > sc->sc_firmware && (p[-1] == ' ' || p[-1] == '\0'))
1071 p--;
1072 *p = '\0';
1073
1074 /*
1075 * Get the model number.
1076 *
1077 * Some boards do not handle the Inquire Board Model Number
1078 * command correctly, or don't give correct information.
1079 *
1080 * So, we use the Firmware Revision and Extended Setup
1081 * information to fixup the model number in these cases.
1082 *
1083 * The firmware version indicates:
1084 *
1085 * 5.xx BusLogic "W" Series Hose Adapters
1086 * BT-948/958/958D
1087 *
1088 * 4.xx BusLogic "C" Series Host Adapters
1089 * BT-946C/956C/956CD/747C/757C/757CD/445C/545C/540CF
1090 *
1091 * 3.xx BusLogic "S" Series Host Adapters
1092 * BT-747S/747D/757S/757D/445S/545S/542D
1093 * BT-542B/742A (revision H)
1094 *
1095 * 2.xx BusLogic "A" Series Host Adapters
1096 * BT-542B/742A (revision G and below)
1097 *
1098 * 0.xx AMI FastDisk VLB/EISA BusLogic Clone Host Adapter
1099 */
1100 if (inquire.reply.bus_type == BHA_BUS_TYPE_24BIT &&
1101 sc->sc_firmware[0] < '3')
1102 sprintf(sc->sc_model, "542B");
1103 else if (inquire.reply.bus_type == BHA_BUS_TYPE_32BIT &&
1104 sc->sc_firmware[0] == '2' &&
1105 (sc->sc_firmware[2] == '1' ||
1106 (sc->sc_firmware[2] == '2' && sc->sc_firmware[3] == '0')))
1107 sprintf(sc->sc_model, "742A");
1108 else if (inquire.reply.bus_type == BHA_BUS_TYPE_32BIT &&
1109 sc->sc_firmware[0] == '0')
1110 sprintf(sc->sc_model, "747A");
1111 else {
1112 p = sc->sc_model;
1113 model.cmd.opcode = BHA_INQUIRE_MODEL;
1114 model.cmd.len = sizeof(model.reply);
1115 bha_cmd(iot, ioh, sc,
1116 sizeof(model.cmd), (u_char *)&model.cmd,
1117 sizeof(model.reply), (u_char *)&model.reply);
1118 *p++ = model.reply.id[0];
1119 *p++ = model.reply.id[1];
1120 *p++ = model.reply.id[2];
1121 *p++ = model.reply.id[3];
1122 while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0'))
1123 p--;
1124 *p++ = model.reply.version[0];
1125 *p++ = model.reply.version[1];
1126 while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0'))
1127 p--;
1128 *p = '\0';
1129 }
1130
1131 /* Enable round-robin scheme - appeared at firmware rev. 3.31. */
1132 if (strcmp(sc->sc_firmware, "3.31") >= 0)
1133 sc->sc_flags |= BHAF_STRICT_ROUND_ROBIN;
1134
1135 /*
1136 * Determine some characteristics about our bus.
1137 */
1138 if (inquire.reply.scsi_flags & BHA_SCSI_WIDE)
1139 sc->sc_flags |= BHAF_WIDE;
1140 if (inquire.reply.scsi_flags & BHA_SCSI_DIFFERENTIAL)
1141 sc->sc_flags |= BHAF_DIFFERENTIAL;
1142 if (inquire.reply.scsi_flags & BHA_SCSI_ULTRA)
1143 sc->sc_flags |= BHAF_ULTRA;
1144
1145 /*
1146 * Determine some characterists of the board.
1147 */
1148 sc->sc_max_dmaseg = inquire.reply.sg_limit;
1149
1150 /*
1151 * Determine the maximum CCB cound and whether or not
1152 * tagged queueing is available on this host adapter.
1153 *
1154 * Tagged queueing works on:
1155 *
1156 * "W" Series adapters
1157 * "C" Series adapters with firmware >= 4.22
1158 * "S" Series adapters with firmware >= 3.35
1159 *
1160 * The internal CCB counts are:
1161 *
1162 * 192 BT-948/958/958D
1163 * 100 BT-946C/956C/956CD/747C/757C/757CD/445C
1164 * 50 BT-545C/540CF
1165 * 30 BT-747S/747D/757S/757D/445S/545S/542D/542B/742A
1166 */
1167 switch (sc->sc_firmware[0]) {
1168 case '5':
1169 sc->sc_hw_ccbs = 192;
1170 sc->sc_flags |= BHAF_TAGGED_QUEUEING;
1171 break;
1172
1173 case '4':
1174 if (sc->sc_model[0] == '5')
1175 sc->sc_hw_ccbs = 50;
1176 else
1177 sc->sc_hw_ccbs = 100;
1178 if (strcmp(sc->sc_firmware, "4.22") >= 0)
1179 sc->sc_flags |= BHAF_TAGGED_QUEUEING;
1180 break;
1181
1182 case '3':
1183 if (strcmp(sc->sc_firmware, "3.35") >= 0)
1184 sc->sc_flags |= BHAF_TAGGED_QUEUEING;
1185 /* FALLTHROUGH */
1186
1187 default:
1188 sc->sc_hw_ccbs = 30;
1189 }
1190
1191 /*
1192 * Set the mailbox size to be just larger than the internal
1193 * CCB count.
1194 *
1195 * XXX We should consider making this a large number on
1196 * boards with strict round-robin mode, as it would allow
1197 * us to expand the openings available to the upper layer.
1198 * The CCB count is what the host adapter can process
1199 * concurrently, but we can queue up to 255 in the mailbox
1200 * regardless.
1201 */
1202 if (sc->sc_flags & BHAF_STRICT_ROUND_ROBIN) {
1203 #if 0
1204 sc->sc_mbox_count = 255;
1205 #else
1206 sc->sc_mbox_count = sc->sc_hw_ccbs + 8;
1207 #endif
1208 } else {
1209 /*
1210 * Only 32 in this case; non-strict round-robin must
1211 * scan the entire mailbox for new commands, which
1212 * is not very efficient.
1213 */
1214 sc->sc_mbox_count = 32;
1215 }
1216
1217 /*
1218 * The maximum number of CCBs we allow is the number we can
1219 * enqueue.
1220 */
1221 sc->sc_max_ccbs = sc->sc_mbox_count;
1222
1223 /*
1224 * Obtain setup information.
1225 */
1226 rlen = sizeof(setup.reply) +
1227 ((sc->sc_flags & BHAF_WIDE) ? sizeof(setup.reply_w) : 0);
1228 setup.cmd.opcode = BHA_INQUIRE_SETUP;
1229 setup.cmd.len = rlen;
1230 bha_cmd(iot, ioh, sc,
1231 sizeof(setup.cmd), (u_char *)&setup.cmd,
1232 rlen, (u_char *)&setup.reply);
1233
1234 printf("%s: model BT-%s, firmware %s\n", sc->sc_dev.dv_xname,
1235 sc->sc_model, sc->sc_firmware);
1236
1237 printf("%s: %d H/W CCBs", sc->sc_dev.dv_xname, sc->sc_hw_ccbs);
1238 if (setup.reply.sync_neg)
1239 printf(", sync");
1240 if (setup.reply.parity)
1241 printf(", parity");
1242 if (sc->sc_flags & BHAF_TAGGED_QUEUEING)
1243 printf(", tagged queueing");
1244 if (sc->sc_flags & BHAF_WIDE_LUN)
1245 printf(", wide LUN support");
1246 printf("\n");
1247
1248 /*
1249 * Poll targets 0 - 7.
1250 */
1251 devices.cmd.opcode = BHA_INQUIRE_DEVICES;
1252 bha_cmd(iot, ioh, sc,
1253 sizeof(devices.cmd), (u_char *)&devices.cmd,
1254 sizeof(devices.reply), (u_char *)&devices.reply);
1255
1256 /* Count installed units. */
1257 initial_ccbs = 0;
1258 for (i = 0; i < 8; i++) {
1259 for (j = 0; j < 8; j++) {
1260 if (((devices.reply.lun_map[i] >> j) & 1) == 1)
1261 initial_ccbs++;
1262 }
1263 }
1264
1265 /*
1266 * Poll targets 8 - 15 if we have a wide bus.
1267 */
1268 if (sc->sc_flags & BHAF_WIDE) {
1269 devices.cmd.opcode = BHA_INQUIRE_DEVICES_2;
1270 bha_cmd(iot, ioh, sc,
1271 sizeof(devices.cmd), (u_char *)&devices.cmd,
1272 sizeof(devices.reply), (u_char *)&devices.reply);
1273
1274 for (i = 0; i < 8; i++) {
1275 for (j = 0; j < 8; j++) {
1276 if (((devices.reply.lun_map[i] >> j) & 1) == 1)
1277 initial_ccbs++;
1278 }
1279 }
1280 }
1281
1282 /*
1283 * Double the initial CCB count, for good measure.
1284 */
1285 initial_ccbs *= 2;
1286
1287 /*
1288 * Sanity check the initial CCB count; don't create more than
1289 * we can enqueue (sc_max_ccbs), and make sure there are some
1290 * at all.
1291 */
1292 if (initial_ccbs > sc->sc_max_ccbs)
1293 initial_ccbs = sc->sc_max_ccbs;
1294 if (initial_ccbs == 0)
1295 initial_ccbs = 2;
1296
1297 return (initial_ccbs);
1298 }
1299
1300 /*
1301 * bha_init:
1302 *
1303 * Initialize the board.
1304 */
1305 int
1306 bha_init(sc)
1307 struct bha_softc *sc;
1308 {
1309 struct bha_toggle toggle;
1310 struct bha_mailbox mailbox;
1311 struct bha_mbx_out *mbo;
1312 struct bha_mbx_in *mbi;
1313 int i;
1314
1315 /*
1316 * Set up the mailbox. We always run the mailbox in round-robin.
1317 */
1318 for (i = 0; i < sc->sc_mbox_count; i++) {
1319 mbo = &sc->sc_mbo[i];
1320 mbi = &sc->sc_mbi[i];
1321
1322 mbo->cmd = BHA_MBO_FREE;
1323 BHA_MBO_SYNC(sc, mbo, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1324
1325 mbi->comp_stat = BHA_MBI_FREE;
1326 BHA_MBI_SYNC(sc, mbi, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1327 }
1328
1329 sc->sc_cmbo = sc->sc_tmbo = &sc->sc_mbo[0];
1330 sc->sc_tmbi = &sc->sc_mbi[0];
1331
1332 sc->sc_mbofull = 0;
1333
1334 /*
1335 * If the board supports strict round-robin, enable that.
1336 */
1337 if (sc->sc_flags & BHAF_STRICT_ROUND_ROBIN) {
1338 toggle.cmd.opcode = BHA_ROUND_ROBIN;
1339 toggle.cmd.enable = 1;
1340 bha_cmd(sc->sc_iot, sc->sc_ioh, sc,
1341 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
1342 0, NULL);
1343 }
1344
1345 /*
1346 * Give the mailbox to the board.
1347 */
1348 mailbox.cmd.opcode = BHA_MBX_INIT_EXTENDED;
1349 mailbox.cmd.nmbx = sc->sc_mbox_count;
1350 ltophys(sc->sc_dmamap_mbox->dm_segs[0].ds_addr, mailbox.cmd.addr);
1351 bha_cmd(sc->sc_iot, sc->sc_ioh, sc,
1352 sizeof(mailbox.cmd), (u_char *)&mailbox.cmd,
1353 0, (u_char *)0);
1354
1355 return (0);
1356 }
1357
1358 /*****************************************************************************
1359 * CCB execution engine
1360 *****************************************************************************/
1361
1362 /*
1363 * bha_queue_ccb:
1364 *
1365 * Queue a CCB to be sent to the controller, and send it if possible.
1366 */
1367 void
1368 bha_queue_ccb(sc, ccb)
1369 struct bha_softc *sc;
1370 struct bha_ccb *ccb;
1371 {
1372
1373 TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
1374 bha_start_ccbs(sc);
1375 }
1376
1377 /*
1378 * bha_start_ccbs:
1379 *
1380 * Send as many CCBs as we have empty mailboxes for.
1381 */
1382 void
1383 bha_start_ccbs(sc)
1384 struct bha_softc *sc;
1385 {
1386 bus_space_tag_t iot = sc->sc_iot;
1387 bus_space_handle_t ioh = sc->sc_ioh;
1388 struct bha_ccb_group *bcg;
1389 struct bha_mbx_out *mbo;
1390 struct bha_ccb *ccb;
1391
1392 mbo = sc->sc_tmbo;
1393
1394 while ((ccb = TAILQ_FIRST(&sc->sc_waiting_ccb)) != NULL) {
1395 if (sc->sc_mbofull >= sc->sc_mbox_count) {
1396 #ifdef DIAGNOSTIC
1397 if (sc->sc_mbofull > sc->sc_mbox_count)
1398 panic("bha_start_ccbs: mbofull > mbox_count");
1399 #endif
1400 /*
1401 * No mailboxes available; attempt to collect ones
1402 * that have already been used.
1403 */
1404 bha_collect_mbo(sc);
1405 if (sc->sc_mbofull == sc->sc_mbox_count) {
1406 /*
1407 * Still no more available; have the
1408 * controller interrupt us when it
1409 * frees one.
1410 */
1411 struct bha_toggle toggle;
1412
1413 toggle.cmd.opcode = BHA_MBO_INTR_EN;
1414 toggle.cmd.enable = 1;
1415 bha_cmd(iot, ioh, sc,
1416 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
1417 0, (u_char *)0);
1418 break;
1419 }
1420 }
1421
1422 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
1423 #ifdef BHADIAG
1424 ccb->flags |= CCB_SENDING;
1425 #endif
1426
1427 /*
1428 * Put the CCB in the mailbox.
1429 */
1430 bcg = BHA_CCB_GROUP(ccb);
1431 ltophys(bcg->bcg_dmamap->dm_segs[0].ds_addr +
1432 BHA_CCB_OFFSET(ccb), mbo->ccb_addr);
1433 if (ccb->flags & CCB_ABORT)
1434 mbo->cmd = BHA_MBO_ABORT;
1435 else
1436 mbo->cmd = BHA_MBO_START;
1437
1438 BHA_MBO_SYNC(sc, mbo,
1439 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1440
1441 /* Tell the card to poll immediately. */
1442 bus_space_write_1(iot, ioh, BHA_CMD_PORT, BHA_START_SCSI);
1443
1444 if ((ccb->xs->xs_control & XS_CTL_POLL) == 0)
1445 timeout(bha_timeout, ccb, (ccb->timeout * hz) / 1000);
1446
1447 ++sc->sc_mbofull;
1448 mbo = bha_nextmbo(sc, mbo);
1449 }
1450
1451 sc->sc_tmbo = mbo;
1452 }
1453
1454 /*
1455 * bha_finish_ccbs:
1456 *
1457 * Finalize the execution of CCBs in our incoming mailbox.
1458 */
1459 void
1460 bha_finish_ccbs(sc)
1461 struct bha_softc *sc;
1462 {
1463 struct bha_mbx_in *mbi;
1464 struct bha_ccb *ccb;
1465 int i;
1466
1467 mbi = sc->sc_tmbi;
1468
1469 BHA_MBI_SYNC(sc, mbi, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1470
1471 if (mbi->comp_stat == BHA_MBI_FREE) {
1472 for (i = 0; i < sc->sc_mbox_count; i++) {
1473 if (mbi->comp_stat != BHA_MBI_FREE) {
1474 printf("%s: mbi not in round-robin order\n",
1475 sc->sc_dev.dv_xname);
1476 goto again;
1477 }
1478 mbi = bha_nextmbi(sc, mbi);
1479 BHA_MBI_SYNC(sc, mbi,
1480 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1481 }
1482 #ifdef BHADIAGnot
1483 printf("%s: mbi interrupt with no full mailboxes\n",
1484 sc->sc_dev.dv_xname);
1485 #endif
1486 return;
1487 }
1488
1489 again:
1490 do {
1491 ccb = bha_ccb_phys_kv(sc, phystol(mbi->ccb_addr));
1492 if (ccb == NULL) {
1493 printf("%s: bad mbi ccb pointer 0x%08x; skipping\n",
1494 sc->sc_dev.dv_xname, phystol(mbi->ccb_addr));
1495 goto next;
1496 }
1497
1498 BHA_CCB_SYNC(sc, ccb,
1499 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1500
1501 #ifdef BHADEBUG
1502 if (bha_debug) {
1503 struct scsi_generic *cmd = &ccb->scsi_cmd;
1504 printf("op=%x %x %x %x %x %x\n",
1505 cmd->opcode, cmd->bytes[0], cmd->bytes[1],
1506 cmd->bytes[2], cmd->bytes[3], cmd->bytes[4]);
1507 printf("comp_stat %x for mbi addr = 0x%p, ",
1508 mbi->comp_stat, mbi);
1509 printf("ccb addr = %p\n", ccb);
1510 }
1511 #endif /* BHADEBUG */
1512
1513 switch (mbi->comp_stat) {
1514 case BHA_MBI_OK:
1515 case BHA_MBI_ERROR:
1516 if ((ccb->flags & CCB_ABORT) != 0) {
1517 /*
1518 * If we already started an abort, wait for it
1519 * to complete before clearing the CCB. We
1520 * could instead just clear CCB_SENDING, but
1521 * what if the mailbox was already received?
1522 * The worst that happens here is that we clear
1523 * the CCB a bit later than we need to. BFD.
1524 */
1525 goto next;
1526 }
1527 break;
1528
1529 case BHA_MBI_ABORT:
1530 case BHA_MBI_UNKNOWN:
1531 /*
1532 * Even if the CCB wasn't found, we clear it anyway.
1533 * See preceeding comment.
1534 */
1535 break;
1536
1537 default:
1538 printf("%s: bad mbi comp_stat %02x; skipping\n",
1539 sc->sc_dev.dv_xname, mbi->comp_stat);
1540 goto next;
1541 }
1542
1543 untimeout(bha_timeout, ccb);
1544 bha_done(sc, ccb);
1545
1546 next:
1547 mbi->comp_stat = BHA_MBI_FREE;
1548 BHA_CCB_SYNC(sc, ccb,
1549 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1550
1551 mbi = bha_nextmbi(sc, mbi);
1552 BHA_MBI_SYNC(sc, mbi,
1553 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1554 } while (mbi->comp_stat != BHA_MBI_FREE);
1555
1556 sc->sc_tmbi = mbi;
1557 }
1558
1559 /*****************************************************************************
1560 * Mailbox management functions.
1561 *****************************************************************************/
1562
1563 /*
1564 * bha_create_mailbox:
1565 *
1566 * Create the mailbox structures. Helper function for bha_attach().
1567 *
1568 * NOTE: The Buslogic hardware only gets one DMA address for the
1569 * mailbox! It expects:
1570 *
1571 * mailbox_out[mailbox_size]
1572 * mailbox_in[mailbox_size]
1573 */
1574 int
1575 bha_create_mailbox(sc)
1576 struct bha_softc *sc;
1577 {
1578 bus_dma_segment_t seg;
1579 size_t size;
1580 int error, rseg;
1581
1582 size = (sizeof(struct bha_mbx_out) * sc->sc_mbox_count) +
1583 (sizeof(struct bha_mbx_in) * sc->sc_mbox_count);
1584
1585 error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg,
1586 1, &rseg, sc->sc_dmaflags);
1587 if (error) {
1588 printf("%s: unable to allocate mailboxes, error = %d\n",
1589 sc->sc_dev.dv_xname, error);
1590 goto bad_0;
1591 }
1592
1593 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
1594 (caddr_t *)&sc->sc_mbo, sc->sc_dmaflags | BUS_DMA_COHERENT);
1595 if (error) {
1596 printf("%s: unable to map mailboxes, error = %d\n",
1597 sc->sc_dev.dv_xname, error);
1598 goto bad_1;
1599 }
1600
1601 memset(sc->sc_mbo, 0, size);
1602
1603 error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
1604 sc->sc_dmaflags, &sc->sc_dmamap_mbox);
1605 if (error) {
1606 printf("%s: unable to create mailbox DMA map, error = %d\n",
1607 sc->sc_dev.dv_xname, error);
1608 goto bad_2;
1609 }
1610
1611 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_mbox,
1612 sc->sc_mbo, size, NULL, 0);
1613 if (error) {
1614 printf("%s: unable to load mailbox DMA map, error = %d\n",
1615 sc->sc_dev.dv_xname, error);
1616 goto bad_3;
1617 }
1618
1619 sc->sc_mbi = (struct bha_mbx_in *)(sc->sc_mbo + sc->sc_mbox_count);
1620
1621 return (0);
1622
1623 bad_3:
1624 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap_mbox);
1625 bad_2:
1626 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_mbo, size);
1627 bad_1:
1628 bus_dmamem_free(sc->sc_dmat, &seg, rseg);
1629 bad_0:
1630 return (error);
1631 }
1632
1633 /*
1634 * bha_collect_mbo:
1635 *
1636 * Garbage collect mailboxes that are no longer in use.
1637 */
1638 void
1639 bha_collect_mbo(sc)
1640 struct bha_softc *sc;
1641 {
1642 struct bha_mbx_out *mbo;
1643 #ifdef BHADIAG
1644 struct bha_ccb *ccb;
1645 #endif
1646
1647 mbo = sc->sc_cmbo;
1648
1649 while (sc->sc_mbofull > 0) {
1650 BHA_MBO_SYNC(sc, mbo,
1651 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1652 if (mbo->cmd != BHA_MBO_FREE)
1653 break;
1654
1655 #ifdef BHADIAG
1656 ccb = bha_ccb_phys_kv(sc, phystol(mbo->ccb_addr));
1657 ccb->flags &= ~CCB_SENDING;
1658 #endif
1659
1660 --sc->sc_mbofull;
1661 mbo = bha_nextmbo(sc, mbo);
1662 }
1663
1664 sc->sc_cmbo = mbo;
1665 }
1666
1667 /*****************************************************************************
1668 * CCB management functions
1669 *****************************************************************************/
1670
1671 __inline void bha_reset_ccb __P((struct bha_ccb *));
1672
1673 __inline void
1674 bha_reset_ccb(ccb)
1675 struct bha_ccb *ccb;
1676 {
1677
1678 ccb->flags = 0;
1679 }
1680
1681 /*
1682 * bha_create_ccbs:
1683 *
1684 * Create a set of CCBs.
1685 *
1686 * We determine the target CCB count, and then keep creating them
1687 * until we reach the target, or fail. CCBs that are allocated
1688 * but not "created" are left on the allocating list.
1689 */
1690 void
1691 bha_create_ccbs(sc, count)
1692 struct bha_softc *sc;
1693 int count;
1694 {
1695 struct bha_ccb_group *bcg;
1696 struct bha_ccb *ccb;
1697 bus_dma_segment_t seg;
1698 bus_dmamap_t ccbmap;
1699 int target, i, error, rseg;
1700
1701 /*
1702 * If the current CCB count is already the max number we're
1703 * allowed to have, bail out now.
1704 */
1705 if (sc->sc_cur_ccbs == sc->sc_max_ccbs)
1706 return;
1707
1708 /*
1709 * Compute our target count, and clamp it down to the max
1710 * number we're allowed to have.
1711 */
1712 target = sc->sc_cur_ccbs + count;
1713 if (target > sc->sc_max_ccbs)
1714 target = sc->sc_max_ccbs;
1715
1716 /*
1717 * If there are CCBs on the allocating list, don't allocate a
1718 * CCB group yet.
1719 */
1720 if (TAILQ_FIRST(&sc->sc_allocating_ccbs) != NULL)
1721 goto have_allocating_ccbs;
1722
1723 allocate_group:
1724 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE,
1725 PAGE_SIZE, 0, &seg, 1, &rseg, sc->sc_dmaflags | BUS_DMA_NOWAIT);
1726 if (error) {
1727 printf("%s: unable to allocate CCB group, error = %d\n",
1728 sc->sc_dev.dv_xname, error);
1729 goto bad_0;
1730 }
1731
1732 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE,
1733 (caddr_t *)&bcg,
1734 sc->sc_dmaflags | BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
1735 if (error) {
1736 printf("%s: unable to map CCB group, error = %d\n",
1737 sc->sc_dev.dv_xname, error);
1738 goto bad_1;
1739 }
1740
1741 memset(bcg, 0, PAGE_SIZE);
1742
1743 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE,
1744 1, PAGE_SIZE, 0, sc->sc_dmaflags | BUS_DMA_NOWAIT, &ccbmap);
1745 if (error) {
1746 printf("%s: unable to create CCB group DMA map, error = %d\n",
1747 sc->sc_dev.dv_xname, error);
1748 goto bad_2;
1749 }
1750
1751 error = bus_dmamap_load(sc->sc_dmat, ccbmap, bcg, PAGE_SIZE, NULL,
1752 sc->sc_dmaflags | BUS_DMA_NOWAIT);
1753 if (error) {
1754 printf("%s: unable to load CCB group DMA map, error = %d\n",
1755 sc->sc_dev.dv_xname, error);
1756 goto bad_3;
1757 }
1758
1759 bcg->bcg_dmamap = ccbmap;
1760
1761 #ifdef DIAGNOSTIC
1762 if (BHA_CCB_GROUP(&bcg->bcg_ccbs[0]) !=
1763 BHA_CCB_GROUP(&bcg->bcg_ccbs[bha_ccbs_per_group - 1]))
1764 panic("bha_create_ccbs: CCB group size botch");
1765 #endif
1766
1767 /*
1768 * Add all of the CCBs in this group to the allocating list.
1769 */
1770 for (i = 0; i < bha_ccbs_per_group; i++) {
1771 ccb = &bcg->bcg_ccbs[i];
1772 TAILQ_INSERT_TAIL(&sc->sc_allocating_ccbs, ccb, chain);
1773 }
1774
1775 have_allocating_ccbs:
1776 /*
1777 * Loop over the allocating list until we reach our CCB target.
1778 * If we run out on the list, we'll allocate another group's
1779 * worth.
1780 */
1781 while (sc->sc_cur_ccbs < target) {
1782 ccb = TAILQ_FIRST(&sc->sc_allocating_ccbs);
1783 if (ccb == NULL)
1784 goto allocate_group;
1785 if (bha_init_ccb(sc, ccb) != 0) {
1786 /*
1787 * We were unable to initialize the CCB.
1788 * This is likely due to a resource shortage,
1789 * so bail out now.
1790 */
1791 return;
1792 }
1793 }
1794
1795 /*
1796 * If we got here, we've reached our target!
1797 */
1798 return;
1799
1800 bad_3:
1801 bus_dmamap_destroy(sc->sc_dmat, ccbmap);
1802 bad_2:
1803 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)bcg, PAGE_SIZE);
1804 bad_1:
1805 bus_dmamem_free(sc->sc_dmat, &seg, rseg);
1806 bad_0:
1807 return;
1808 }
1809
1810 /*
1811 * bha_init_ccb:
1812 *
1813 * Initialize a CCB; helper function for bha_create_ccbs().
1814 */
1815 int
1816 bha_init_ccb(sc, ccb)
1817 struct bha_softc *sc;
1818 struct bha_ccb *ccb;
1819 {
1820 struct bha_ccb_group *bcg = BHA_CCB_GROUP(ccb);
1821 int hashnum, error;
1822
1823 /*
1824 * Create the DMA map for this CCB.
1825 *
1826 * XXX ALLOCNOW is a hack to prevent bounce buffer shortages
1827 * XXX in the ISA case. A better solution is needed.
1828 */
1829 error = bus_dmamap_create(sc->sc_dmat, BHA_MAXXFER, BHA_NSEG,
1830 BHA_MAXXFER, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW | sc->sc_dmaflags,
1831 &ccb->dmamap_xfer);
1832 if (error) {
1833 printf("%s: unable to create CCB DMA map, error = %d\n",
1834 sc->sc_dev.dv_xname, error);
1835 return (error);
1836 }
1837
1838 TAILQ_REMOVE(&sc->sc_allocating_ccbs, ccb, chain);
1839
1840 /*
1841 * Put the CCB into the phystokv hash table.
1842 */
1843 ccb->hashkey = bcg->bcg_dmamap->dm_segs[0].ds_addr +
1844 BHA_CCB_OFFSET(ccb);
1845 hashnum = CCB_HASH(ccb->hashkey);
1846 ccb->nexthash = sc->sc_ccbhash[hashnum];
1847 sc->sc_ccbhash[hashnum] = ccb;
1848 bha_reset_ccb(ccb);
1849
1850 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
1851 sc->sc_cur_ccbs++;
1852
1853 return (0);
1854 }
1855
1856 /*
1857 * bha_get_ccb:
1858 *
1859 * Get a CCB for the SCSI operation. If there are none left,
1860 * wait until one becomes available, if we can.
1861 */
1862 struct bha_ccb *
1863 bha_get_ccb(sc, flags)
1864 struct bha_softc *sc;
1865 int flags;
1866 {
1867 struct bha_ccb *ccb;
1868 int s;
1869
1870 s = splbio();
1871
1872 for (;;) {
1873 ccb = TAILQ_FIRST(&sc->sc_free_ccb);
1874 if (ccb) {
1875 TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
1876 break;
1877 }
1878 if ((flags & XS_CTL_NOSLEEP) != 0)
1879 goto out;
1880 tsleep(&sc->sc_free_ccb, PRIBIO, "bhaccb", 0);
1881 }
1882
1883 ccb->flags |= CCB_ALLOC;
1884
1885 out:
1886 splx(s);
1887 return (ccb);
1888 }
1889
1890 /*
1891 * bha_free_ccb:
1892 *
1893 * Put a CCB back onto the free list.
1894 */
1895 void
1896 bha_free_ccb(sc, ccb)
1897 struct bha_softc *sc;
1898 struct bha_ccb *ccb;
1899 {
1900 int s;
1901
1902 s = splbio();
1903
1904 bha_reset_ccb(ccb);
1905 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
1906
1907 /*
1908 * If there were none, wake anybody waiting for one to come free,
1909 * starting with queued entries.
1910 */
1911 if (TAILQ_NEXT(ccb, chain) == NULL)
1912 wakeup(&sc->sc_free_ccb);
1913
1914 splx(s);
1915 }
1916
1917 /*
1918 * bha_ccb_phys_kv:
1919 *
1920 * Given a CCB DMA address, locate the CCB in kernel virtual space.
1921 */
1922 struct bha_ccb *
1923 bha_ccb_phys_kv(sc, ccb_phys)
1924 struct bha_softc *sc;
1925 bus_addr_t ccb_phys;
1926 {
1927 int hashnum = CCB_HASH(ccb_phys);
1928 struct bha_ccb *ccb = sc->sc_ccbhash[hashnum];
1929
1930 while (ccb) {
1931 if (ccb->hashkey == ccb_phys)
1932 break;
1933 ccb = ccb->nexthash;
1934 }
1935 return (ccb);
1936 }
1937