bha.c revision 1.42 1 /* $NetBSD: bha.c,v 1.42 2001/04/25 17:53:31 bouyer Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
9 * Simulation Facility, NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Originally written by Julian Elischer (julian (at) tfs.com)
42 * for TRW Financial Systems for use under the MACH(2.5) operating system.
43 *
44 * TRW Financial Systems, in accordance with their agreement with Carnegie
45 * Mellon University, makes this software available to CMU to distribute
46 * or use in any manner that they see fit as long as this message is kept with
47 * the software. For this reason TFS also grants any other persons or
48 * organisations permission to use or modify this software.
49 *
50 * TFS supplies this software to be publicly redistributed
51 * on the understanding that TFS is not responsible for the correct
52 * functioning of this software in any circumstances.
53 */
54
55 #include "opt_ddb.h"
56
57 #include <sys/types.h>
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/callout.h>
61 #include <sys/kernel.h>
62 #include <sys/errno.h>
63 #include <sys/ioctl.h>
64 #include <sys/device.h>
65 #include <sys/malloc.h>
66 #include <sys/buf.h>
67 #include <sys/proc.h>
68 #include <sys/user.h>
69
70 #include <uvm/uvm_extern.h>
71
72 #include <machine/bus.h>
73 #include <machine/intr.h>
74
75 #include <dev/scsipi/scsi_all.h>
76 #include <dev/scsipi/scsipi_all.h>
77 #include <dev/scsipi/scsiconf.h>
78
79 #include <dev/ic/bhareg.h>
80 #include <dev/ic/bhavar.h>
81
82 #ifndef DDB
83 #define Debugger() panic("should call debugger here (bha.c)")
84 #endif /* ! DDB */
85
86 #define BHA_MAXXFER ((BHA_NSEG - 1) << PGSHIFT)
87
88 #ifdef BHADEBUG
89 int bha_debug = 0;
90 #endif /* BHADEBUG */
91
92 int bha_cmd __P((bus_space_tag_t, bus_space_handle_t, struct bha_softc *,
93 int, u_char *, int, u_char *));
94
95 void bha_scsipi_request __P((struct scsipi_channel *,
96 scsipi_adapter_req_t, void *));
97 void bha_minphys __P((struct buf *));
98
99 void bha_get_xfer_mode __P((struct bha_softc *, struct scsipi_xfer_mode *));
100
101 void bha_done __P((struct bha_softc *, struct bha_ccb *));
102 int bha_poll __P((struct bha_softc *, struct scsipi_xfer *, int));
103 void bha_timeout __P((void *arg));
104
105 int bha_init __P((struct bha_softc *));
106
107 int bha_create_mailbox __P((struct bha_softc *));
108 void bha_collect_mbo __P((struct bha_softc *));
109
110 void bha_queue_ccb __P((struct bha_softc *, struct bha_ccb *));
111 void bha_start_ccbs __P((struct bha_softc *));
112 void bha_finish_ccbs __P((struct bha_softc *));
113
114 struct bha_ccb *bha_ccb_phys_kv __P((struct bha_softc *, bus_addr_t));
115 void bha_create_ccbs __P((struct bha_softc *, int));
116 int bha_init_ccb __P((struct bha_softc *, struct bha_ccb *));
117 struct bha_ccb *bha_get_ccb __P((struct bha_softc *));
118 void bha_free_ccb __P((struct bha_softc *, struct bha_ccb *));
119
120 #define BHA_RESET_TIMEOUT 2000 /* time to wait for reset (mSec) */
121 #define BHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */
122
123 /*
124 * Number of CCBs in an allocation group; must be computed at run-time.
125 */
126 int bha_ccbs_per_group;
127
128 __inline struct bha_mbx_out *bha_nextmbo __P((struct bha_softc *,
129 struct bha_mbx_out *));
130 __inline struct bha_mbx_in *bha_nextmbi __P((struct bha_softc *,
131 struct bha_mbx_in *));
132
133 __inline struct bha_mbx_out *
134 bha_nextmbo(sc, mbo)
135 struct bha_softc *sc;
136 struct bha_mbx_out *mbo;
137 {
138
139 if (mbo == &sc->sc_mbo[sc->sc_mbox_count - 1])
140 return (&sc->sc_mbo[0]);
141 return (mbo + 1);
142 }
143
144 __inline struct bha_mbx_in *
145 bha_nextmbi(sc, mbi)
146 struct bha_softc *sc;
147 struct bha_mbx_in *mbi;
148 {
149 if (mbi == &sc->sc_mbi[sc->sc_mbox_count - 1])
150 return (&sc->sc_mbi[0]);
151 return (mbi + 1);
152 }
153
154 /*
155 * bha_attach:
156 *
157 * Finish attaching a Buslogic controller, and configure children.
158 */
159 void
160 bha_attach(sc, bpd)
161 struct bha_softc *sc;
162 struct bha_probe_data *bpd;
163 {
164 struct scsipi_adapter *adapt = &sc->sc_adapter;
165 struct scsipi_channel *chan = &sc->sc_channel;
166 int initial_ccbs;
167
168 /*
169 * Initialize the number of CCBs per group.
170 */
171 if (bha_ccbs_per_group == 0)
172 bha_ccbs_per_group = BHA_CCBS_PER_GROUP;
173
174 initial_ccbs = bha_info(sc);
175 if (initial_ccbs == 0) {
176 printf("%s: unable to get adapter info\n",
177 sc->sc_dev.dv_xname);
178 return;
179 }
180
181 /*
182 * Fill in the scsipi_adapter.
183 */
184 memset(adapt, 0, sizeof(*adapt));
185 adapt->adapt_dev = &sc->sc_dev;
186 adapt->adapt_nchannels = 1;
187 /* adapt_openings initialized below */
188 adapt->adapt_max_periph = sc->sc_mbox_count;
189 adapt->adapt_request = bha_scsipi_request;
190 adapt->adapt_minphys = bha_minphys;
191
192 /*
193 * Fill in the scsipi_channel.
194 */
195 memset(chan, 0, sizeof(*chan));
196 chan->chan_adapter = adapt;
197 chan->chan_bustype = &scsi_bustype;
198 chan->chan_channel = 0;
199 chan->chan_flags = SCSIPI_CHAN_CANGROW;
200 chan->chan_ntargets = (sc->sc_flags & BHAF_WIDE) ? 16 : 8;
201 chan->chan_nluns = (sc->sc_flags & BHAF_WIDE_LUN) ? 32 : 8;
202 chan->chan_id = sc->sc_scsi_id;
203
204 TAILQ_INIT(&sc->sc_free_ccb);
205 TAILQ_INIT(&sc->sc_waiting_ccb);
206 TAILQ_INIT(&sc->sc_allocating_ccbs);
207
208 if (bha_create_mailbox(sc) != 0)
209 return;
210
211 bha_create_ccbs(sc, initial_ccbs);
212 if (sc->sc_cur_ccbs < 2) {
213 printf("%s: not enough CCBs to run\n",
214 sc->sc_dev.dv_xname);
215 return;
216 }
217
218 adapt->adapt_openings = sc->sc_cur_ccbs;
219
220 if (bha_init(sc) != 0)
221 return;
222
223 (void) config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
224 }
225
226 /*
227 * bha_intr:
228 *
229 * Interrupt service routine.
230 */
231 int
232 bha_intr(arg)
233 void *arg;
234 {
235 struct bha_softc *sc = arg;
236 bus_space_tag_t iot = sc->sc_iot;
237 bus_space_handle_t ioh = sc->sc_ioh;
238 u_char sts;
239
240 #ifdef BHADEBUG
241 printf("%s: bha_intr ", sc->sc_dev.dv_xname);
242 #endif /* BHADEBUG */
243
244 /*
245 * First acknowlege the interrupt, Then if it's not telling about
246 * a completed operation just return.
247 */
248 sts = bus_space_read_1(iot, ioh, BHA_INTR_PORT);
249 if ((sts & BHA_INTR_ANYINTR) == 0)
250 return (0);
251 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_IRST);
252
253 #ifdef BHADIAG
254 /* Make sure we clear CCB_SENDING before finishing a CCB. */
255 bha_collect_mbo(sc);
256 #endif
257
258 /* Mail box out empty? */
259 if (sts & BHA_INTR_MBOA) {
260 struct bha_toggle toggle;
261
262 toggle.cmd.opcode = BHA_MBO_INTR_EN;
263 toggle.cmd.enable = 0;
264 bha_cmd(iot, ioh, sc,
265 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
266 0, (u_char *)0);
267 bha_start_ccbs(sc);
268 }
269
270 /* Mail box in full? */
271 if (sts & BHA_INTR_MBIF)
272 bha_finish_ccbs(sc);
273
274 return (1);
275 }
276
277 /*****************************************************************************
278 * SCSI interface routines
279 *****************************************************************************/
280
281 /*
282 * bha_scsipi_request:
283 *
284 * Perform a request for the SCSIPI layer.
285 */
286 void
287 bha_scsipi_request(chan, req, arg)
288 struct scsipi_channel *chan;
289 scsipi_adapter_req_t req;
290 void *arg;
291 {
292 struct scsipi_adapter *adapt = chan->chan_adapter;
293 struct bha_softc *sc = (void *)adapt->adapt_dev;
294 struct scsipi_xfer *xs;
295 struct scsipi_periph *periph;
296 bus_dma_tag_t dmat = sc->sc_dmat;
297 struct bha_ccb *ccb;
298 int error, seg, flags, s;
299
300 switch (req) {
301 case ADAPTER_REQ_RUN_XFER:
302 xs = arg;
303 periph = xs->xs_periph;
304 flags = xs->xs_control;
305
306 SC_DEBUG(periph, SCSIPI_DB2, ("bha_scsipi_request\n"));
307
308 /* Get a CCB to use. */
309 ccb = bha_get_ccb(sc);
310 #ifdef DIAGNOSTIC
311 /*
312 * This should never happen as we track the resources
313 * in the mid-layer.
314 */
315 if (ccb == NULL) {
316 scsipi_printaddr(periph);
317 printf("unable to allocate ccb\n");
318 panic("bha_scsipi_request");
319 }
320 #endif
321
322 ccb->xs = xs;
323 ccb->timeout = xs->timeout;
324
325 /*
326 * Put all the arguments for the xfer in the ccb
327 */
328 if (flags & XS_CTL_RESET) {
329 ccb->opcode = BHA_RESET_CCB;
330 ccb->scsi_cmd_length = 0;
331 } else {
332 /* can't use S/G if zero length */
333 ccb->opcode = (xs->datalen ? BHA_INIT_SCAT_GATH_CCB
334 : BHA_INITIATOR_CCB);
335 bcopy(xs->cmd, &ccb->scsi_cmd,
336 ccb->scsi_cmd_length = xs->cmdlen);
337 }
338
339 if (xs->datalen) {
340 /*
341 * Map the DMA transfer.
342 */
343 #ifdef TFS
344 if (flags & XS_CTL_DATA_UIO) {
345 error = bus_dmamap_load_uio(dmat,
346 ccb->dmamap_xfer, (struct uio *)xs->data,
347 ((flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
348 BUS_DMA_WAITOK) | BUS_DMA_STREAMING);
349 } else
350 #endif /* TFS */
351 {
352 error = bus_dmamap_load(dmat,
353 ccb->dmamap_xfer, xs->data, xs->datalen,
354 NULL,
355 ((flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
356 BUS_DMA_WAITOK) | BUS_DMA_STREAMING);
357 }
358
359 switch (error) {
360 case 0:
361 break;
362
363 case ENOMEM:
364 case EAGAIN:
365 xs->error = XS_RESOURCE_SHORTAGE;
366 goto out_bad;
367
368 default:
369 xs->error = XS_DRIVER_STUFFUP;
370 printf("%s: error %d loading DMA map\n",
371 sc->sc_dev.dv_xname, error);
372 out_bad:
373 bha_free_ccb(sc, ccb);
374 scsipi_done(xs);
375 return;
376 }
377
378 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
379 ccb->dmamap_xfer->dm_mapsize,
380 (flags & XS_CTL_DATA_IN) ? BUS_DMASYNC_PREREAD :
381 BUS_DMASYNC_PREWRITE);
382
383 /*
384 * Load the hardware scatter/gather map with the
385 * contents of the DMA map.
386 */
387 for (seg = 0; seg < ccb->dmamap_xfer->dm_nsegs; seg++) {
388 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_addr,
389 ccb->scat_gath[seg].seg_addr);
390 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_len,
391 ccb->scat_gath[seg].seg_len);
392 }
393
394 ltophys(ccb->hashkey + offsetof(struct bha_ccb,
395 scat_gath), ccb->data_addr);
396 ltophys(ccb->dmamap_xfer->dm_nsegs *
397 sizeof(struct bha_scat_gath), ccb->data_length);
398 } else {
399 /*
400 * No data xfer, use non S/G values.
401 */
402 ltophys(0, ccb->data_addr);
403 ltophys(0, ccb->data_length);
404 }
405
406 if (XS_CTL_TAGTYPE(xs) != 0) {
407 ccb->tag_enable = 1;
408 ccb->tag_type = xs->xs_tag_type & 0x03;
409 } else {
410 ccb->tag_enable = 0;
411 ccb->tag_type = 0;
412 }
413
414 ccb->data_out = 0;
415 ccb->data_in = 0;
416 ccb->target = periph->periph_target;
417 ccb->lun = periph->periph_lun;
418 ltophys(ccb->hashkey + offsetof(struct bha_ccb, scsi_sense),
419 ccb->sense_ptr);
420 ccb->req_sense_length = sizeof(ccb->scsi_sense);
421 ccb->host_stat = 0x00;
422 ccb->target_stat = 0x00;
423 ccb->link_id = 0;
424 ltophys(0, ccb->link_addr);
425
426 BHA_CCB_SYNC(sc, ccb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
427
428 s = splbio();
429 bha_queue_ccb(sc, ccb);
430 splx(s);
431
432 SC_DEBUG(periph, SCSIPI_DB3, ("cmd_sent\n"));
433 if ((flags & XS_CTL_POLL) == 0)
434 return;
435
436 /*
437 * If we can't use interrupts, poll on completion
438 */
439 if (bha_poll(sc, xs, ccb->timeout)) {
440 bha_timeout(ccb);
441 if (bha_poll(sc, xs, ccb->timeout))
442 bha_timeout(ccb);
443 }
444 return;
445
446 case ADAPTER_REQ_GROW_RESOURCES:
447 if (sc->sc_cur_ccbs == sc->sc_max_ccbs) {
448 chan->chan_flags &= ~SCSIPI_CHAN_CANGROW;
449 return;
450 }
451 seg = sc->sc_cur_ccbs;
452 bha_create_ccbs(sc, bha_ccbs_per_group);
453 adapt->adapt_openings += sc->sc_cur_ccbs - seg;
454 return;
455
456 case ADAPTER_REQ_SET_XFER_MODE:
457 /*
458 * Can't really do this on the Buslogic. It has its
459 * own setup info. But we do know how to query what
460 * the settings are.
461 */
462 bha_get_xfer_mode(sc, (struct scsipi_xfer_mode *)arg);
463 return;
464 }
465 }
466
467 /*
468 * bha_minphys:
469 *
470 * Limit a transfer to our maximum transfer size.
471 */
472 void
473 bha_minphys(bp)
474 struct buf *bp;
475 {
476
477 if (bp->b_bcount > BHA_MAXXFER)
478 bp->b_bcount = BHA_MAXXFER;
479 minphys(bp);
480 }
481
482 /*****************************************************************************
483 * SCSI job execution helper routines
484 *****************************************************************************/
485
486 /*
487 * bha_get_xfer_mode;
488 *
489 * Negotiate the xfer mode for the specified periph, and report
490 * back the mode to the midlayer.
491 *
492 * NOTE: we must be called at splbio().
493 */
494 void
495 bha_get_xfer_mode(sc, xm)
496 struct bha_softc *sc;
497 struct scsipi_xfer_mode *xm;
498 {
499 struct bha_setup hwsetup;
500 struct bha_period hwperiod;
501 struct bha_sync *bs;
502 int toff = xm->xm_target & 7, tmask = (1 << toff);
503 int wide, period, offset, rlen;
504
505 /*
506 * Issue an Inquire Setup Information. We can extract
507 * sync and wide information from here.
508 */
509 rlen = sizeof(hwsetup.reply) +
510 ((sc->sc_flags & BHAF_WIDE) ? sizeof(hwsetup.reply_w) : 0);
511 hwsetup.cmd.opcode = BHA_INQUIRE_SETUP;
512 hwsetup.cmd.len = rlen;
513 bha_cmd(sc->sc_iot, sc->sc_ioh, sc,
514 sizeof(hwsetup.cmd), (u_char *)&hwsetup.cmd,
515 rlen, (u_char *)&hwsetup.reply);
516
517 xm->xm_mode = 0;
518 xm->xm_period = 0;
519 xm->xm_offset = 0;
520
521 /*
522 * First check for wide. On later boards, we can check
523 * directly in the setup info if wide is currently active.
524 *
525 * On earlier boards, we have to make an educated guess.
526 */
527 if (sc->sc_flags & BHAF_WIDE) {
528 if (strcmp(sc->sc_firmware, "5.06L") >= 0) {
529 if (xm->xm_target > 7) {
530 wide =
531 hwsetup.reply_w.high_wide_active & tmask;
532 } else {
533 wide =
534 hwsetup.reply_w.low_wide_active & tmask;
535 }
536 if (wide)
537 xm->xm_mode |= PERIPH_CAP_WIDE16;
538 } else {
539 /* XXX Check `wide permitted' in the config info. */
540 xm->xm_mode |= PERIPH_CAP_WIDE16;
541 }
542 }
543
544 /*
545 * Now get basic sync info.
546 */
547 bs = (xm->xm_target > 7) ?
548 &hwsetup.reply_w.sync_high[toff] :
549 &hwsetup.reply.sync_low[toff];
550
551 if (bs->valid) {
552 xm->xm_mode |= PERIPH_CAP_SYNC;
553 period = (bs->period * 50) + 20;
554 offset = bs->offset;
555
556 /*
557 * On boards that can do Fast and Ultra, use the Inquire Period
558 * command to get the period.
559 */
560 if (sc->sc_firmware[0] >= '3') {
561 rlen = sizeof(hwperiod.reply) +
562 ((sc->sc_flags & BHAF_WIDE) ?
563 sizeof(hwperiod.reply_w) : 0);
564 hwperiod.cmd.opcode = BHA_INQUIRE_PERIOD;
565 hwperiod.cmd.len = rlen;
566 bha_cmd(sc->sc_iot, sc->sc_ioh, sc,
567 sizeof(hwperiod.cmd), (u_char *)&hwperiod.cmd,
568 rlen, (u_char *)&hwperiod.reply);
569
570 if (xm->xm_target > 7)
571 period = hwperiod.reply_w.period[toff];
572 else
573 period = hwperiod.reply.period[toff];
574
575 period *= 10;
576 }
577
578 xm->xm_period =
579 scsipi_sync_period_to_factor(period * 10);
580 xm->xm_offset = offset;
581 }
582
583 /*
584 * Now check for tagged queueing support.
585 *
586 * XXX Check `tags permitted' in the config info.
587 */
588 if (sc->sc_flags & BHAF_TAGGED_QUEUEING)
589 xm->xm_mode |= PERIPH_CAP_TQING;
590
591 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, xm);
592 }
593
594 /*
595 * bha_done:
596 *
597 * A CCB has completed execution. Pass the status back to the
598 * upper layer.
599 */
600 void
601 bha_done(sc, ccb)
602 struct bha_softc *sc;
603 struct bha_ccb *ccb;
604 {
605 bus_dma_tag_t dmat = sc->sc_dmat;
606 struct scsipi_xfer *xs = ccb->xs;
607
608 SC_DEBUG(xs->xs_periph, SCSIPI_DB2, ("bha_done\n"));
609
610 #ifdef BHADIAG
611 if (ccb->flags & CCB_SENDING) {
612 printf("%s: exiting ccb still in transit!\n",
613 sc->sc_dev.dv_xname);
614 Debugger();
615 return;
616 }
617 #endif
618 if ((ccb->flags & CCB_ALLOC) == 0) {
619 printf("%s: exiting ccb not allocated!\n",
620 sc->sc_dev.dv_xname);
621 Debugger();
622 return;
623 }
624
625 /*
626 * If we were a data transfer, unload the map that described
627 * the data buffer.
628 */
629 if (xs->datalen) {
630 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
631 ccb->dmamap_xfer->dm_mapsize,
632 (xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMASYNC_POSTREAD :
633 BUS_DMASYNC_POSTWRITE);
634 bus_dmamap_unload(dmat, ccb->dmamap_xfer);
635 }
636
637 if (xs->error == XS_NOERROR) {
638 if (ccb->host_stat != BHA_OK) {
639 switch (ccb->host_stat) {
640 case BHA_SEL_TIMEOUT: /* No response */
641 xs->error = XS_SELTIMEOUT;
642 break;
643 default: /* Other scsi protocol messes */
644 printf("%s: host_stat %x\n",
645 sc->sc_dev.dv_xname, ccb->host_stat);
646 xs->error = XS_DRIVER_STUFFUP;
647 break;
648 }
649 } else if (ccb->target_stat != SCSI_OK) {
650 switch (ccb->target_stat) {
651 case SCSI_CHECK:
652 memcpy(&xs->sense.scsi_sense,
653 &ccb->scsi_sense,
654 sizeof(xs->sense.scsi_sense));
655 xs->error = XS_SENSE;
656 break;
657 case SCSI_BUSY:
658 xs->error = XS_BUSY;
659 break;
660 default:
661 printf("%s: target_stat %x\n",
662 sc->sc_dev.dv_xname, ccb->target_stat);
663 xs->error = XS_DRIVER_STUFFUP;
664 break;
665 }
666 } else
667 xs->resid = 0;
668 }
669
670 bha_free_ccb(sc, ccb);
671 scsipi_done(xs);
672 }
673
674 /*
675 * bha_poll:
676 *
677 * Poll for completion of the specified job.
678 */
679 int
680 bha_poll(sc, xs, count)
681 struct bha_softc *sc;
682 struct scsipi_xfer *xs;
683 int count;
684 {
685 bus_space_tag_t iot = sc->sc_iot;
686 bus_space_handle_t ioh = sc->sc_ioh;
687
688 /* timeouts are in msec, so we loop in 1000 usec cycles */
689 while (count) {
690 /*
691 * If we had interrupts enabled, would we
692 * have got an interrupt?
693 */
694 if (bus_space_read_1(iot, ioh, BHA_INTR_PORT) &
695 BHA_INTR_ANYINTR)
696 bha_intr(sc);
697 if (xs->xs_status & XS_STS_DONE)
698 return (0);
699 delay(1000); /* only happens in boot so ok */
700 count--;
701 }
702 return (1);
703 }
704
705 /*
706 * bha_timeout:
707 *
708 * CCB timeout handler.
709 */
710 void
711 bha_timeout(arg)
712 void *arg;
713 {
714 struct bha_ccb *ccb = arg;
715 struct scsipi_xfer *xs = ccb->xs;
716 struct scsipi_periph *periph = xs->xs_periph;
717 struct bha_softc *sc =
718 (void *)periph->periph_channel->chan_adapter->adapt_dev;
719 int s;
720
721 scsipi_printaddr(periph);
722 printf("timed out");
723
724 s = splbio();
725
726 #ifdef BHADIAG
727 /*
728 * If the ccb's mbx is not free, then the board has gone Far East?
729 */
730 bha_collect_mbo(sc);
731 if (ccb->flags & CCB_SENDING) {
732 printf("%s: not taking commands!\n", sc->sc_dev.dv_xname);
733 Debugger();
734 }
735 #endif
736
737 /*
738 * If it has been through before, then
739 * a previous abort has failed, don't
740 * try abort again
741 */
742 if (ccb->flags & CCB_ABORT) {
743 /* abort timed out */
744 printf(" AGAIN\n");
745 /* XXX Must reset! */
746 } else {
747 /* abort the operation that has timed out */
748 printf("\n");
749 ccb->xs->error = XS_TIMEOUT;
750 ccb->timeout = BHA_ABORT_TIMEOUT;
751 ccb->flags |= CCB_ABORT;
752 bha_queue_ccb(sc, ccb);
753 }
754
755 splx(s);
756 }
757
758 /*****************************************************************************
759 * Misc. subroutines.
760 *****************************************************************************/
761
762 /*
763 * bha_cmd:
764 *
765 * Send a command to the Buglogic controller.
766 */
767 int
768 bha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf)
769 bus_space_tag_t iot;
770 bus_space_handle_t ioh;
771 struct bha_softc *sc;
772 int icnt, ocnt;
773 u_char *ibuf, *obuf;
774 {
775 const char *name;
776 int i;
777 int wait;
778 u_char sts;
779 u_char opcode = ibuf[0];
780
781 if (sc != NULL)
782 name = sc->sc_dev.dv_xname;
783 else
784 name = "(bha probe)";
785
786 /*
787 * Calculate a reasonable timeout for the command.
788 */
789 switch (opcode) {
790 case BHA_INQUIRE_DEVICES:
791 case BHA_INQUIRE_DEVICES_2:
792 wait = 90 * 20000;
793 break;
794 default:
795 wait = 1 * 20000;
796 break;
797 }
798
799 /*
800 * Wait for the adapter to go idle, unless it's one of
801 * the commands which don't need this
802 */
803 if (opcode != BHA_MBO_INTR_EN) {
804 for (i = 20000; i; i--) { /* 1 sec? */
805 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
806 if (sts & BHA_STAT_IDLE)
807 break;
808 delay(50);
809 }
810 if (!i) {
811 printf("%s: bha_cmd, host not idle(0x%x)\n",
812 name, sts);
813 return (1);
814 }
815 }
816
817 /*
818 * Now that it is idle, if we expect output, preflush the
819 * queue feeding to us.
820 */
821 if (ocnt) {
822 while ((bus_space_read_1(iot, ioh, BHA_STAT_PORT)) &
823 BHA_STAT_DF)
824 bus_space_read_1(iot, ioh, BHA_DATA_PORT);
825 }
826
827 /*
828 * Output the command and the number of arguments given
829 * for each byte, first check the port is empty.
830 */
831 while (icnt--) {
832 for (i = wait; i; i--) {
833 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
834 if (!(sts & BHA_STAT_CDF))
835 break;
836 delay(50);
837 }
838 if (!i) {
839 if (opcode != BHA_INQUIRE_REVISION)
840 printf("%s: bha_cmd, cmd/data port full\n",
841 name);
842 goto bad;
843 }
844 bus_space_write_1(iot, ioh, BHA_CMD_PORT, *ibuf++);
845 }
846
847 /*
848 * If we expect input, loop that many times, each time,
849 * looking for the data register to have valid data
850 */
851 while (ocnt--) {
852 for (i = wait; i; i--) {
853 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
854 if (sts & BHA_STAT_DF)
855 break;
856 delay(50);
857 }
858 if (!i) {
859 #ifdef BHADEBUG
860 if (opcode != BHA_INQUIRE_REVISION)
861 printf("%s: bha_cmd, cmd/data port empty %d\n",
862 name, ocnt);
863 #endif /* BHADEBUG */
864 goto bad;
865 }
866 *obuf++ = bus_space_read_1(iot, ioh, BHA_DATA_PORT);
867 }
868
869 /*
870 * Wait for the board to report a finished instruction.
871 * We may get an extra interrupt for the HACC signal, but this is
872 * unimportant.
873 */
874 if (opcode != BHA_MBO_INTR_EN && opcode != BHA_MODIFY_IOPORT) {
875 for (i = 20000; i; i--) { /* 1 sec? */
876 sts = bus_space_read_1(iot, ioh, BHA_INTR_PORT);
877 /* XXX Need to save this in the interrupt handler? */
878 if (sts & BHA_INTR_HACC)
879 break;
880 delay(50);
881 }
882 if (!i) {
883 printf("%s: bha_cmd, host not finished(0x%x)\n",
884 name, sts);
885 return (1);
886 }
887 }
888 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_IRST);
889 return (0);
890
891 bad:
892 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_SRST);
893 return (1);
894 }
895
896 /*
897 * bha_find:
898 *
899 * Find the board and determine it's irq/drq.
900 */
901 int
902 bha_find(iot, ioh, sc)
903 bus_space_tag_t iot;
904 bus_space_handle_t ioh;
905 struct bha_probe_data *sc;
906 {
907 int i;
908 u_char sts;
909 struct bha_extended_inquire inquire;
910 struct bha_config config;
911 int irq, drq;
912
913 /* Check something is at the ports we need to access */
914 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
915 if (sts == 0xFF)
916 return (0);
917
918 /*
919 * Reset board, If it doesn't respond, assume
920 * that it's not there.. good for the probe
921 */
922
923 bus_space_write_1(iot, ioh, BHA_CTRL_PORT,
924 BHA_CTRL_HRST | BHA_CTRL_SRST);
925
926 delay(100);
927 for (i = BHA_RESET_TIMEOUT; i; i--) {
928 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
929 if (sts == (BHA_STAT_IDLE | BHA_STAT_INIT))
930 break;
931 delay(1000);
932 }
933 if (!i) {
934 #ifdef BHADEBUG
935 if (bha_debug)
936 printf("bha_find: No answer from buslogic board\n");
937 #endif /* BHADEBUG */
938 return (0);
939 }
940
941 /*
942 * The BusLogic cards implement an Adaptec 1542 (aha)-compatible
943 * interface. The native bha interface is not compatible with
944 * an aha. 1542. We need to ensure that we never match an
945 * Adaptec 1542. We must also avoid sending Adaptec-compatible
946 * commands to a real bha, lest it go into 1542 emulation mode.
947 * (On an indirect bus like ISA, we should always probe for BusLogic
948 * interfaces before Adaptec interfaces).
949 */
950
951 /*
952 * Make sure we don't match an AHA-1542A or AHA-1542B, by checking
953 * for an extended-geometry register. The 1542[AB] don't have one.
954 */
955 sts = bus_space_read_1(iot, ioh, BHA_EXTGEOM_PORT);
956 if (sts == 0xFF)
957 return (0);
958
959 /*
960 * Check that we actually know how to use this board.
961 */
962 delay(1000);
963 inquire.cmd.opcode = BHA_INQUIRE_EXTENDED;
964 inquire.cmd.len = sizeof(inquire.reply);
965 i = bha_cmd(iot, ioh, (struct bha_softc *)0,
966 sizeof(inquire.cmd), (u_char *)&inquire.cmd,
967 sizeof(inquire.reply), (u_char *)&inquire.reply);
968
969 /*
970 * Some 1542Cs (CP, perhaps not CF, may depend on firmware rev)
971 * have the extended-geometry register and also respond to
972 * BHA_INQUIRE_EXTENDED. Make sure we never match such cards,
973 * by checking the size of the reply is what a BusLogic card returns.
974 */
975 if (i) {
976 #ifdef BHADEBUG
977 printf("bha_find: board returned %d instead of %d to %s\n",
978 i, sizeof(inquire.reply), "INQUIRE_EXTENDED");
979 #endif
980 return (0);
981 }
982
983 /* OK, we know we've found a buslogic adaptor. */
984
985 switch (inquire.reply.bus_type) {
986 case BHA_BUS_TYPE_24BIT:
987 case BHA_BUS_TYPE_32BIT:
988 break;
989 case BHA_BUS_TYPE_MCA:
990 /* We don't grok MicroChannel (yet). */
991 return (0);
992 default:
993 printf("bha_find: illegal bus type %c\n",
994 inquire.reply.bus_type);
995 return (0);
996 }
997
998 /*
999 * Assume we have a board at this stage setup dma channel from
1000 * jumpers and save int level
1001 */
1002 delay(1000);
1003 config.cmd.opcode = BHA_INQUIRE_CONFIG;
1004 bha_cmd(iot, ioh, (struct bha_softc *)0,
1005 sizeof(config.cmd), (u_char *)&config.cmd,
1006 sizeof(config.reply), (u_char *)&config.reply);
1007 switch (config.reply.chan) {
1008 case EISADMA:
1009 drq = -1;
1010 break;
1011 case CHAN0:
1012 drq = 0;
1013 break;
1014 case CHAN5:
1015 drq = 5;
1016 break;
1017 case CHAN6:
1018 drq = 6;
1019 break;
1020 case CHAN7:
1021 drq = 7;
1022 break;
1023 default:
1024 printf("bha_find: illegal drq setting %x\n",
1025 config.reply.chan);
1026 return (0);
1027 }
1028
1029 switch (config.reply.intr) {
1030 case INT9:
1031 irq = 9;
1032 break;
1033 case INT10:
1034 irq = 10;
1035 break;
1036 case INT11:
1037 irq = 11;
1038 break;
1039 case INT12:
1040 irq = 12;
1041 break;
1042 case INT14:
1043 irq = 14;
1044 break;
1045 case INT15:
1046 irq = 15;
1047 break;
1048 default:
1049 printf("bha_find: illegal irq setting %x\n",
1050 config.reply.intr);
1051 return (0);
1052 }
1053
1054 /* if we want to fill in softc, do so now */
1055 if (sc != NULL) {
1056 sc->sc_irq = irq;
1057 sc->sc_drq = drq;
1058 }
1059
1060 return (1);
1061 }
1062
1063 /*
1064 * bha_disable_isacompat:
1065 *
1066 * Disable the ISA-compatiblity ioports on PCI bha devices,
1067 * to ensure they're not autoconfigured a second time as an ISA bha.
1068 */
1069 int
1070 bha_disable_isacompat(sc)
1071 struct bha_softc *sc;
1072 {
1073 struct bha_isadisable isa_disable;
1074
1075 isa_disable.cmd.opcode = BHA_MODIFY_IOPORT;
1076 isa_disable.cmd.modifier = BHA_IOMODIFY_DISABLE1;
1077 bha_cmd(sc->sc_iot, sc->sc_ioh, sc,
1078 sizeof(isa_disable.cmd), (u_char*)&isa_disable.cmd,
1079 0, (u_char *)0);
1080 return (0);
1081 }
1082
1083 /*
1084 * bha_info:
1085 *
1086 * Get information about the board, and report it. We
1087 * return the initial number of CCBs, 0 if we failed.
1088 */
1089 int
1090 bha_info(sc)
1091 struct bha_softc *sc;
1092 {
1093 bus_space_tag_t iot = sc->sc_iot;
1094 bus_space_handle_t ioh = sc->sc_ioh;
1095 struct bha_extended_inquire inquire;
1096 struct bha_config config;
1097 struct bha_devices devices;
1098 struct bha_setup setup;
1099 struct bha_model model;
1100 struct bha_revision revision;
1101 struct bha_digit digit;
1102 int i, j, initial_ccbs, rlen;
1103 char *p;
1104
1105 /*
1106 * Fetch the extended inquire information.
1107 */
1108 inquire.cmd.opcode = BHA_INQUIRE_EXTENDED;
1109 inquire.cmd.len = sizeof(inquire.reply);
1110 bha_cmd(iot, ioh, sc,
1111 sizeof(inquire.cmd), (u_char *)&inquire.cmd,
1112 sizeof(inquire.reply), (u_char *)&inquire.reply);
1113
1114 /*
1115 * Fetch the configuration information.
1116 */
1117 config.cmd.opcode = BHA_INQUIRE_CONFIG;
1118 bha_cmd(iot, ioh, sc,
1119 sizeof(config.cmd), (u_char *)&config.cmd,
1120 sizeof(config.reply), (u_char *)&config.reply);
1121
1122 sc->sc_scsi_id = config.reply.scsi_dev;
1123
1124 /*
1125 * Get the firmware revision.
1126 */
1127 p = sc->sc_firmware;
1128 revision.cmd.opcode = BHA_INQUIRE_REVISION;
1129 bha_cmd(iot, ioh, sc,
1130 sizeof(revision.cmd), (u_char *)&revision.cmd,
1131 sizeof(revision.reply), (u_char *)&revision.reply);
1132 *p++ = revision.reply.firm_revision;
1133 *p++ = '.';
1134 *p++ = revision.reply.firm_version;
1135 digit.cmd.opcode = BHA_INQUIRE_REVISION_3;
1136 bha_cmd(iot, ioh, sc,
1137 sizeof(digit.cmd), (u_char *)&digit.cmd,
1138 sizeof(digit.reply), (u_char *)&digit.reply);
1139 *p++ = digit.reply.digit;
1140 if (revision.reply.firm_revision >= '3' ||
1141 (revision.reply.firm_revision == '3' &&
1142 revision.reply.firm_version >= '3')) {
1143 digit.cmd.opcode = BHA_INQUIRE_REVISION_4;
1144 bha_cmd(iot, ioh, sc,
1145 sizeof(digit.cmd), (u_char *)&digit.cmd,
1146 sizeof(digit.reply), (u_char *)&digit.reply);
1147 *p++ = digit.reply.digit;
1148 }
1149 while (p > sc->sc_firmware && (p[-1] == ' ' || p[-1] == '\0'))
1150 p--;
1151 *p = '\0';
1152
1153 /*
1154 * Get the model number.
1155 *
1156 * Some boards do not handle the Inquire Board Model Number
1157 * command correctly, or don't give correct information.
1158 *
1159 * So, we use the Firmware Revision and Extended Setup
1160 * information to fixup the model number in these cases.
1161 *
1162 * The firmware version indicates:
1163 *
1164 * 5.xx BusLogic "W" Series Host Adapters
1165 * BT-948/958/958D
1166 *
1167 * 4.xx BusLogic "C" Series Host Adapters
1168 * BT-946C/956C/956CD/747C/757C/757CD/445C/545C/540CF
1169 *
1170 * 3.xx BusLogic "S" Series Host Adapters
1171 * BT-747S/747D/757S/757D/445S/545S/542D
1172 * BT-542B/742A (revision H)
1173 *
1174 * 2.xx BusLogic "A" Series Host Adapters
1175 * BT-542B/742A (revision G and below)
1176 *
1177 * 0.xx AMI FastDisk VLB/EISA BusLogic Clone Host Adapter
1178 */
1179 if (inquire.reply.bus_type == BHA_BUS_TYPE_24BIT &&
1180 sc->sc_firmware[0] < '3')
1181 sprintf(sc->sc_model, "542B");
1182 else if (inquire.reply.bus_type == BHA_BUS_TYPE_32BIT &&
1183 sc->sc_firmware[0] == '2' &&
1184 (sc->sc_firmware[2] == '1' ||
1185 (sc->sc_firmware[2] == '2' && sc->sc_firmware[3] == '0')))
1186 sprintf(sc->sc_model, "742A");
1187 else if (inquire.reply.bus_type == BHA_BUS_TYPE_32BIT &&
1188 sc->sc_firmware[0] == '0')
1189 sprintf(sc->sc_model, "747A");
1190 else {
1191 p = sc->sc_model;
1192 model.cmd.opcode = BHA_INQUIRE_MODEL;
1193 model.cmd.len = sizeof(model.reply);
1194 bha_cmd(iot, ioh, sc,
1195 sizeof(model.cmd), (u_char *)&model.cmd,
1196 sizeof(model.reply), (u_char *)&model.reply);
1197 *p++ = model.reply.id[0];
1198 *p++ = model.reply.id[1];
1199 *p++ = model.reply.id[2];
1200 *p++ = model.reply.id[3];
1201 while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0'))
1202 p--;
1203 *p++ = model.reply.version[0];
1204 *p++ = model.reply.version[1];
1205 while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0'))
1206 p--;
1207 *p = '\0';
1208 }
1209
1210 /* Enable round-robin scheme - appeared at firmware rev. 3.31. */
1211 if (strcmp(sc->sc_firmware, "3.31") >= 0)
1212 sc->sc_flags |= BHAF_STRICT_ROUND_ROBIN;
1213
1214 /*
1215 * Determine some characteristics about our bus.
1216 */
1217 if (inquire.reply.scsi_flags & BHA_SCSI_WIDE)
1218 sc->sc_flags |= BHAF_WIDE;
1219 if (inquire.reply.scsi_flags & BHA_SCSI_DIFFERENTIAL)
1220 sc->sc_flags |= BHAF_DIFFERENTIAL;
1221 if (inquire.reply.scsi_flags & BHA_SCSI_ULTRA)
1222 sc->sc_flags |= BHAF_ULTRA;
1223
1224 /*
1225 * Determine some characterists of the board.
1226 */
1227 sc->sc_max_dmaseg = inquire.reply.sg_limit;
1228
1229 /*
1230 * Determine the maximum CCB count and whether or not
1231 * tagged queueing is available on this host adapter.
1232 *
1233 * Tagged queueing works on:
1234 *
1235 * "W" Series adapters
1236 * "C" Series adapters with firmware >= 4.22
1237 * "S" Series adapters with firmware >= 3.35
1238 *
1239 * The internal CCB counts are:
1240 *
1241 * 192 BT-948/958/958D
1242 * 100 BT-946C/956C/956CD/747C/757C/757CD/445C
1243 * 50 BT-545C/540CF
1244 * 30 BT-747S/747D/757S/757D/445S/545S/542D/542B/742A
1245 */
1246 switch (sc->sc_firmware[0]) {
1247 case '5':
1248 sc->sc_max_ccbs = 192;
1249 sc->sc_flags |= BHAF_TAGGED_QUEUEING;
1250 break;
1251
1252 case '4':
1253 if (sc->sc_model[0] == '5')
1254 sc->sc_max_ccbs = 50;
1255 else
1256 sc->sc_max_ccbs = 100;
1257 if (strcmp(sc->sc_firmware, "4.22") >= 0)
1258 sc->sc_flags |= BHAF_TAGGED_QUEUEING;
1259 break;
1260
1261 case '3':
1262 if (strcmp(sc->sc_firmware, "3.35") >= 0)
1263 sc->sc_flags |= BHAF_TAGGED_QUEUEING;
1264 /* FALLTHROUGH */
1265
1266 default:
1267 sc->sc_max_ccbs = 30;
1268 }
1269
1270 /*
1271 * Set the mailbox count to precisely the number of HW CCBs
1272 * available. A mailbox isn't required while a CCB is executing,
1273 * but this allows us to actually enqueue up to our resource
1274 * limit.
1275 *
1276 * This will keep the mailbox count small on boards which don't
1277 * have strict round-robin (they have to scan the entire set of
1278 * mailboxes each time they run a command).
1279 */
1280 sc->sc_mbox_count = sc->sc_max_ccbs;
1281
1282 /*
1283 * Obtain setup information.
1284 */
1285 rlen = sizeof(setup.reply) +
1286 ((sc->sc_flags & BHAF_WIDE) ? sizeof(setup.reply_w) : 0);
1287 setup.cmd.opcode = BHA_INQUIRE_SETUP;
1288 setup.cmd.len = rlen;
1289 bha_cmd(iot, ioh, sc,
1290 sizeof(setup.cmd), (u_char *)&setup.cmd,
1291 rlen, (u_char *)&setup.reply);
1292
1293 printf("%s: model BT-%s, firmware %s\n", sc->sc_dev.dv_xname,
1294 sc->sc_model, sc->sc_firmware);
1295
1296 printf("%s: %d H/W CCBs", sc->sc_dev.dv_xname, sc->sc_max_ccbs);
1297 if (setup.reply.sync_neg)
1298 printf(", sync");
1299 if (setup.reply.parity)
1300 printf(", parity");
1301 if (sc->sc_flags & BHAF_TAGGED_QUEUEING)
1302 printf(", tagged queueing");
1303 if (sc->sc_flags & BHAF_WIDE_LUN)
1304 printf(", wide LUN support");
1305 printf("\n");
1306
1307 /*
1308 * Poll targets 0 - 7.
1309 */
1310 devices.cmd.opcode = BHA_INQUIRE_DEVICES;
1311 bha_cmd(iot, ioh, sc,
1312 sizeof(devices.cmd), (u_char *)&devices.cmd,
1313 sizeof(devices.reply), (u_char *)&devices.reply);
1314
1315 /* Count installed units. */
1316 initial_ccbs = 0;
1317 for (i = 0; i < 8; i++) {
1318 for (j = 0; j < 8; j++) {
1319 if (((devices.reply.lun_map[i] >> j) & 1) == 1)
1320 initial_ccbs++;
1321 }
1322 }
1323
1324 /*
1325 * Poll targets 8 - 15 if we have a wide bus.
1326 */
1327 if (sc->sc_flags & BHAF_WIDE) {
1328 devices.cmd.opcode = BHA_INQUIRE_DEVICES_2;
1329 bha_cmd(iot, ioh, sc,
1330 sizeof(devices.cmd), (u_char *)&devices.cmd,
1331 sizeof(devices.reply), (u_char *)&devices.reply);
1332
1333 for (i = 0; i < 8; i++) {
1334 for (j = 0; j < 8; j++) {
1335 if (((devices.reply.lun_map[i] >> j) & 1) == 1)
1336 initial_ccbs++;
1337 }
1338 }
1339 }
1340
1341 /*
1342 * Double the initial CCB count, for good measure.
1343 */
1344 initial_ccbs *= 2;
1345
1346 /*
1347 * Sanity check the initial CCB count; don't create more than
1348 * we can enqueue (sc_max_ccbs), and make sure there are some
1349 * at all.
1350 */
1351 if (initial_ccbs > sc->sc_max_ccbs)
1352 initial_ccbs = sc->sc_max_ccbs;
1353 if (initial_ccbs == 0)
1354 initial_ccbs = 2;
1355
1356 return (initial_ccbs);
1357 }
1358
1359 /*
1360 * bha_init:
1361 *
1362 * Initialize the board.
1363 */
1364 int
1365 bha_init(sc)
1366 struct bha_softc *sc;
1367 {
1368 struct bha_toggle toggle;
1369 struct bha_mailbox mailbox;
1370 struct bha_mbx_out *mbo;
1371 struct bha_mbx_in *mbi;
1372 int i;
1373
1374 /*
1375 * Set up the mailbox. We always run the mailbox in round-robin.
1376 */
1377 for (i = 0; i < sc->sc_mbox_count; i++) {
1378 mbo = &sc->sc_mbo[i];
1379 mbi = &sc->sc_mbi[i];
1380
1381 mbo->cmd = BHA_MBO_FREE;
1382 BHA_MBO_SYNC(sc, mbo, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1383
1384 mbi->comp_stat = BHA_MBI_FREE;
1385 BHA_MBI_SYNC(sc, mbi, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1386 }
1387
1388 sc->sc_cmbo = sc->sc_tmbo = &sc->sc_mbo[0];
1389 sc->sc_tmbi = &sc->sc_mbi[0];
1390
1391 sc->sc_mbofull = 0;
1392
1393 /*
1394 * If the board supports strict round-robin, enable that.
1395 */
1396 if (sc->sc_flags & BHAF_STRICT_ROUND_ROBIN) {
1397 toggle.cmd.opcode = BHA_ROUND_ROBIN;
1398 toggle.cmd.enable = 1;
1399 bha_cmd(sc->sc_iot, sc->sc_ioh, sc,
1400 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
1401 0, NULL);
1402 }
1403
1404 /*
1405 * Give the mailbox to the board.
1406 */
1407 mailbox.cmd.opcode = BHA_MBX_INIT_EXTENDED;
1408 mailbox.cmd.nmbx = sc->sc_mbox_count;
1409 ltophys(sc->sc_dmamap_mbox->dm_segs[0].ds_addr, mailbox.cmd.addr);
1410 bha_cmd(sc->sc_iot, sc->sc_ioh, sc,
1411 sizeof(mailbox.cmd), (u_char *)&mailbox.cmd,
1412 0, (u_char *)0);
1413
1414 return (0);
1415 }
1416
1417 /*****************************************************************************
1418 * CCB execution engine
1419 *****************************************************************************/
1420
1421 /*
1422 * bha_queue_ccb:
1423 *
1424 * Queue a CCB to be sent to the controller, and send it if possible.
1425 */
1426 void
1427 bha_queue_ccb(sc, ccb)
1428 struct bha_softc *sc;
1429 struct bha_ccb *ccb;
1430 {
1431
1432 TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
1433 bha_start_ccbs(sc);
1434 }
1435
1436 /*
1437 * bha_start_ccbs:
1438 *
1439 * Send as many CCBs as we have empty mailboxes for.
1440 */
1441 void
1442 bha_start_ccbs(sc)
1443 struct bha_softc *sc;
1444 {
1445 bus_space_tag_t iot = sc->sc_iot;
1446 bus_space_handle_t ioh = sc->sc_ioh;
1447 struct bha_ccb_group *bcg;
1448 struct bha_mbx_out *mbo;
1449 struct bha_ccb *ccb;
1450
1451 mbo = sc->sc_tmbo;
1452
1453 while ((ccb = TAILQ_FIRST(&sc->sc_waiting_ccb)) != NULL) {
1454 if (sc->sc_mbofull >= sc->sc_mbox_count) {
1455 #ifdef DIAGNOSTIC
1456 if (sc->sc_mbofull > sc->sc_mbox_count)
1457 panic("bha_start_ccbs: mbofull > mbox_count");
1458 #endif
1459 /*
1460 * No mailboxes available; attempt to collect ones
1461 * that have already been used.
1462 */
1463 bha_collect_mbo(sc);
1464 if (sc->sc_mbofull == sc->sc_mbox_count) {
1465 /*
1466 * Still no more available; have the
1467 * controller interrupt us when it
1468 * frees one.
1469 */
1470 struct bha_toggle toggle;
1471
1472 toggle.cmd.opcode = BHA_MBO_INTR_EN;
1473 toggle.cmd.enable = 1;
1474 bha_cmd(iot, ioh, sc,
1475 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
1476 0, (u_char *)0);
1477 break;
1478 }
1479 }
1480
1481 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
1482 #ifdef BHADIAG
1483 ccb->flags |= CCB_SENDING;
1484 #endif
1485
1486 /*
1487 * Put the CCB in the mailbox.
1488 */
1489 bcg = BHA_CCB_GROUP(ccb);
1490 ltophys(bcg->bcg_dmamap->dm_segs[0].ds_addr +
1491 BHA_CCB_OFFSET(ccb), mbo->ccb_addr);
1492 if (ccb->flags & CCB_ABORT)
1493 mbo->cmd = BHA_MBO_ABORT;
1494 else
1495 mbo->cmd = BHA_MBO_START;
1496
1497 BHA_MBO_SYNC(sc, mbo,
1498 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1499
1500 /* Tell the card to poll immediately. */
1501 bus_space_write_1(iot, ioh, BHA_CMD_PORT, BHA_START_SCSI);
1502
1503 if ((ccb->xs->xs_control & XS_CTL_POLL) == 0)
1504 callout_reset(&ccb->xs->xs_callout,
1505 (ccb->timeout * hz) / 1000, bha_timeout, ccb);
1506
1507 ++sc->sc_mbofull;
1508 mbo = bha_nextmbo(sc, mbo);
1509 }
1510
1511 sc->sc_tmbo = mbo;
1512 }
1513
1514 /*
1515 * bha_finish_ccbs:
1516 *
1517 * Finalize the execution of CCBs in our incoming mailbox.
1518 */
1519 void
1520 bha_finish_ccbs(sc)
1521 struct bha_softc *sc;
1522 {
1523 struct bha_mbx_in *mbi;
1524 struct bha_ccb *ccb;
1525 int i;
1526
1527 mbi = sc->sc_tmbi;
1528
1529 BHA_MBI_SYNC(sc, mbi, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1530
1531 if (mbi->comp_stat == BHA_MBI_FREE) {
1532 for (i = 0; i < sc->sc_mbox_count; i++) {
1533 if (mbi->comp_stat != BHA_MBI_FREE) {
1534 #ifdef BHADIAG
1535 /*
1536 * This can happen in normal operation if
1537 * we use all mailbox slots.
1538 */
1539 printf("%s: mbi not in round-robin order\n",
1540 sc->sc_dev.dv_xname);
1541 #endif
1542 goto again;
1543 }
1544 mbi = bha_nextmbi(sc, mbi);
1545 BHA_MBI_SYNC(sc, mbi,
1546 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1547 }
1548 #ifdef BHADIAGnot
1549 printf("%s: mbi interrupt with no full mailboxes\n",
1550 sc->sc_dev.dv_xname);
1551 #endif
1552 return;
1553 }
1554
1555 again:
1556 do {
1557 ccb = bha_ccb_phys_kv(sc, phystol(mbi->ccb_addr));
1558 if (ccb == NULL) {
1559 printf("%s: bad mbi ccb pointer 0x%08x; skipping\n",
1560 sc->sc_dev.dv_xname, phystol(mbi->ccb_addr));
1561 goto next;
1562 }
1563
1564 BHA_CCB_SYNC(sc, ccb,
1565 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1566
1567 #ifdef BHADEBUG
1568 if (bha_debug) {
1569 struct scsi_generic *cmd = &ccb->scsi_cmd;
1570 printf("op=%x %x %x %x %x %x\n",
1571 cmd->opcode, cmd->bytes[0], cmd->bytes[1],
1572 cmd->bytes[2], cmd->bytes[3], cmd->bytes[4]);
1573 printf("comp_stat %x for mbi addr = 0x%p, ",
1574 mbi->comp_stat, mbi);
1575 printf("ccb addr = %p\n", ccb);
1576 }
1577 #endif /* BHADEBUG */
1578
1579 switch (mbi->comp_stat) {
1580 case BHA_MBI_OK:
1581 case BHA_MBI_ERROR:
1582 if ((ccb->flags & CCB_ABORT) != 0) {
1583 /*
1584 * If we already started an abort, wait for it
1585 * to complete before clearing the CCB. We
1586 * could instead just clear CCB_SENDING, but
1587 * what if the mailbox was already received?
1588 * The worst that happens here is that we clear
1589 * the CCB a bit later than we need to. BFD.
1590 */
1591 goto next;
1592 }
1593 break;
1594
1595 case BHA_MBI_ABORT:
1596 case BHA_MBI_UNKNOWN:
1597 /*
1598 * Even if the CCB wasn't found, we clear it anyway.
1599 * See preceeding comment.
1600 */
1601 break;
1602
1603 default:
1604 printf("%s: bad mbi comp_stat %02x; skipping\n",
1605 sc->sc_dev.dv_xname, mbi->comp_stat);
1606 goto next;
1607 }
1608
1609 callout_stop(&ccb->xs->xs_callout);
1610 bha_done(sc, ccb);
1611
1612 next:
1613 mbi->comp_stat = BHA_MBI_FREE;
1614 BHA_CCB_SYNC(sc, ccb,
1615 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1616
1617 mbi = bha_nextmbi(sc, mbi);
1618 BHA_MBI_SYNC(sc, mbi,
1619 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1620 } while (mbi->comp_stat != BHA_MBI_FREE);
1621
1622 sc->sc_tmbi = mbi;
1623 }
1624
1625 /*****************************************************************************
1626 * Mailbox management functions.
1627 *****************************************************************************/
1628
1629 /*
1630 * bha_create_mailbox:
1631 *
1632 * Create the mailbox structures. Helper function for bha_attach().
1633 *
1634 * NOTE: The Buslogic hardware only gets one DMA address for the
1635 * mailbox! It expects:
1636 *
1637 * mailbox_out[mailbox_size]
1638 * mailbox_in[mailbox_size]
1639 */
1640 int
1641 bha_create_mailbox(sc)
1642 struct bha_softc *sc;
1643 {
1644 bus_dma_segment_t seg;
1645 size_t size;
1646 int error, rseg;
1647
1648 size = (sizeof(struct bha_mbx_out) * sc->sc_mbox_count) +
1649 (sizeof(struct bha_mbx_in) * sc->sc_mbox_count);
1650
1651 error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg,
1652 1, &rseg, sc->sc_dmaflags);
1653 if (error) {
1654 printf("%s: unable to allocate mailboxes, error = %d\n",
1655 sc->sc_dev.dv_xname, error);
1656 goto bad_0;
1657 }
1658
1659 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
1660 (caddr_t *)&sc->sc_mbo, sc->sc_dmaflags | BUS_DMA_COHERENT);
1661 if (error) {
1662 printf("%s: unable to map mailboxes, error = %d\n",
1663 sc->sc_dev.dv_xname, error);
1664 goto bad_1;
1665 }
1666
1667 memset(sc->sc_mbo, 0, size);
1668
1669 error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
1670 sc->sc_dmaflags, &sc->sc_dmamap_mbox);
1671 if (error) {
1672 printf("%s: unable to create mailbox DMA map, error = %d\n",
1673 sc->sc_dev.dv_xname, error);
1674 goto bad_2;
1675 }
1676
1677 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_mbox,
1678 sc->sc_mbo, size, NULL, 0);
1679 if (error) {
1680 printf("%s: unable to load mailbox DMA map, error = %d\n",
1681 sc->sc_dev.dv_xname, error);
1682 goto bad_3;
1683 }
1684
1685 sc->sc_mbi = (struct bha_mbx_in *)(sc->sc_mbo + sc->sc_mbox_count);
1686
1687 return (0);
1688
1689 bad_3:
1690 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap_mbox);
1691 bad_2:
1692 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_mbo, size);
1693 bad_1:
1694 bus_dmamem_free(sc->sc_dmat, &seg, rseg);
1695 bad_0:
1696 return (error);
1697 }
1698
1699 /*
1700 * bha_collect_mbo:
1701 *
1702 * Garbage collect mailboxes that are no longer in use.
1703 */
1704 void
1705 bha_collect_mbo(sc)
1706 struct bha_softc *sc;
1707 {
1708 struct bha_mbx_out *mbo;
1709 #ifdef BHADIAG
1710 struct bha_ccb *ccb;
1711 #endif
1712
1713 mbo = sc->sc_cmbo;
1714
1715 while (sc->sc_mbofull > 0) {
1716 BHA_MBO_SYNC(sc, mbo,
1717 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1718 if (mbo->cmd != BHA_MBO_FREE)
1719 break;
1720
1721 #ifdef BHADIAG
1722 ccb = bha_ccb_phys_kv(sc, phystol(mbo->ccb_addr));
1723 ccb->flags &= ~CCB_SENDING;
1724 #endif
1725
1726 --sc->sc_mbofull;
1727 mbo = bha_nextmbo(sc, mbo);
1728 }
1729
1730 sc->sc_cmbo = mbo;
1731 }
1732
1733 /*****************************************************************************
1734 * CCB management functions
1735 *****************************************************************************/
1736
1737 __inline void bha_reset_ccb __P((struct bha_ccb *));
1738
1739 __inline void
1740 bha_reset_ccb(ccb)
1741 struct bha_ccb *ccb;
1742 {
1743
1744 ccb->flags = 0;
1745 }
1746
1747 /*
1748 * bha_create_ccbs:
1749 *
1750 * Create a set of CCBs.
1751 *
1752 * We determine the target CCB count, and then keep creating them
1753 * until we reach the target, or fail. CCBs that are allocated
1754 * but not "created" are left on the allocating list.
1755 */
1756 void
1757 bha_create_ccbs(sc, count)
1758 struct bha_softc *sc;
1759 int count;
1760 {
1761 struct bha_ccb_group *bcg;
1762 struct bha_ccb *ccb;
1763 bus_dma_segment_t seg;
1764 bus_dmamap_t ccbmap;
1765 int target, i, error, rseg;
1766
1767 /*
1768 * If the current CCB count is already the max number we're
1769 * allowed to have, bail out now.
1770 */
1771 if (sc->sc_cur_ccbs == sc->sc_max_ccbs)
1772 return;
1773
1774 /*
1775 * Compute our target count, and clamp it down to the max
1776 * number we're allowed to have.
1777 */
1778 target = sc->sc_cur_ccbs + count;
1779 if (target > sc->sc_max_ccbs)
1780 target = sc->sc_max_ccbs;
1781
1782 /*
1783 * If there are CCBs on the allocating list, don't allocate a
1784 * CCB group yet.
1785 */
1786 if (TAILQ_FIRST(&sc->sc_allocating_ccbs) != NULL)
1787 goto have_allocating_ccbs;
1788
1789 allocate_group:
1790 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE,
1791 PAGE_SIZE, 0, &seg, 1, &rseg, sc->sc_dmaflags | BUS_DMA_NOWAIT);
1792 if (error) {
1793 printf("%s: unable to allocate CCB group, error = %d\n",
1794 sc->sc_dev.dv_xname, error);
1795 goto bad_0;
1796 }
1797
1798 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE,
1799 (caddr_t *)&bcg,
1800 sc->sc_dmaflags | BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
1801 if (error) {
1802 printf("%s: unable to map CCB group, error = %d\n",
1803 sc->sc_dev.dv_xname, error);
1804 goto bad_1;
1805 }
1806
1807 memset(bcg, 0, PAGE_SIZE);
1808
1809 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE,
1810 1, PAGE_SIZE, 0, sc->sc_dmaflags | BUS_DMA_NOWAIT, &ccbmap);
1811 if (error) {
1812 printf("%s: unable to create CCB group DMA map, error = %d\n",
1813 sc->sc_dev.dv_xname, error);
1814 goto bad_2;
1815 }
1816
1817 error = bus_dmamap_load(sc->sc_dmat, ccbmap, bcg, PAGE_SIZE, NULL,
1818 sc->sc_dmaflags | BUS_DMA_NOWAIT);
1819 if (error) {
1820 printf("%s: unable to load CCB group DMA map, error = %d\n",
1821 sc->sc_dev.dv_xname, error);
1822 goto bad_3;
1823 }
1824
1825 bcg->bcg_dmamap = ccbmap;
1826
1827 #ifdef DIAGNOSTIC
1828 if (BHA_CCB_GROUP(&bcg->bcg_ccbs[0]) !=
1829 BHA_CCB_GROUP(&bcg->bcg_ccbs[bha_ccbs_per_group - 1]))
1830 panic("bha_create_ccbs: CCB group size botch");
1831 #endif
1832
1833 /*
1834 * Add all of the CCBs in this group to the allocating list.
1835 */
1836 for (i = 0; i < bha_ccbs_per_group; i++) {
1837 ccb = &bcg->bcg_ccbs[i];
1838 TAILQ_INSERT_TAIL(&sc->sc_allocating_ccbs, ccb, chain);
1839 }
1840
1841 have_allocating_ccbs:
1842 /*
1843 * Loop over the allocating list until we reach our CCB target.
1844 * If we run out on the list, we'll allocate another group's
1845 * worth.
1846 */
1847 while (sc->sc_cur_ccbs < target) {
1848 ccb = TAILQ_FIRST(&sc->sc_allocating_ccbs);
1849 if (ccb == NULL)
1850 goto allocate_group;
1851 if (bha_init_ccb(sc, ccb) != 0) {
1852 /*
1853 * We were unable to initialize the CCB.
1854 * This is likely due to a resource shortage,
1855 * so bail out now.
1856 */
1857 return;
1858 }
1859 }
1860
1861 /*
1862 * If we got here, we've reached our target!
1863 */
1864 return;
1865
1866 bad_3:
1867 bus_dmamap_destroy(sc->sc_dmat, ccbmap);
1868 bad_2:
1869 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)bcg, PAGE_SIZE);
1870 bad_1:
1871 bus_dmamem_free(sc->sc_dmat, &seg, rseg);
1872 bad_0:
1873 return;
1874 }
1875
1876 /*
1877 * bha_init_ccb:
1878 *
1879 * Initialize a CCB; helper function for bha_create_ccbs().
1880 */
1881 int
1882 bha_init_ccb(sc, ccb)
1883 struct bha_softc *sc;
1884 struct bha_ccb *ccb;
1885 {
1886 struct bha_ccb_group *bcg = BHA_CCB_GROUP(ccb);
1887 int hashnum, error;
1888
1889 /*
1890 * Create the DMA map for this CCB.
1891 *
1892 * XXX ALLOCNOW is a hack to prevent bounce buffer shortages
1893 * XXX in the ISA case. A better solution is needed.
1894 */
1895 error = bus_dmamap_create(sc->sc_dmat, BHA_MAXXFER, BHA_NSEG,
1896 BHA_MAXXFER, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW | sc->sc_dmaflags,
1897 &ccb->dmamap_xfer);
1898 if (error) {
1899 printf("%s: unable to create CCB DMA map, error = %d\n",
1900 sc->sc_dev.dv_xname, error);
1901 return (error);
1902 }
1903
1904 TAILQ_REMOVE(&sc->sc_allocating_ccbs, ccb, chain);
1905
1906 /*
1907 * Put the CCB into the phystokv hash table.
1908 */
1909 ccb->hashkey = bcg->bcg_dmamap->dm_segs[0].ds_addr +
1910 BHA_CCB_OFFSET(ccb);
1911 hashnum = CCB_HASH(ccb->hashkey);
1912 ccb->nexthash = sc->sc_ccbhash[hashnum];
1913 sc->sc_ccbhash[hashnum] = ccb;
1914 bha_reset_ccb(ccb);
1915
1916 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
1917 sc->sc_cur_ccbs++;
1918
1919 return (0);
1920 }
1921
1922 /*
1923 * bha_get_ccb:
1924 *
1925 * Get a CCB for the SCSI operation. If there are none left,
1926 * wait until one becomes available, if we can.
1927 */
1928 struct bha_ccb *
1929 bha_get_ccb(sc)
1930 struct bha_softc *sc;
1931 {
1932 struct bha_ccb *ccb;
1933 int s;
1934
1935 s = splbio();
1936 ccb = TAILQ_FIRST(&sc->sc_free_ccb);
1937 if (ccb != NULL) {
1938 TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
1939 ccb->flags |= CCB_ALLOC;
1940 }
1941 splx(s);
1942 return (ccb);
1943 }
1944
1945 /*
1946 * bha_free_ccb:
1947 *
1948 * Put a CCB back onto the free list.
1949 */
1950 void
1951 bha_free_ccb(sc, ccb)
1952 struct bha_softc *sc;
1953 struct bha_ccb *ccb;
1954 {
1955 int s;
1956
1957 s = splbio();
1958 bha_reset_ccb(ccb);
1959 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
1960 splx(s);
1961 }
1962
1963 /*
1964 * bha_ccb_phys_kv:
1965 *
1966 * Given a CCB DMA address, locate the CCB in kernel virtual space.
1967 */
1968 struct bha_ccb *
1969 bha_ccb_phys_kv(sc, ccb_phys)
1970 struct bha_softc *sc;
1971 bus_addr_t ccb_phys;
1972 {
1973 int hashnum = CCB_HASH(ccb_phys);
1974 struct bha_ccb *ccb = sc->sc_ccbhash[hashnum];
1975
1976 while (ccb) {
1977 if (ccb->hashkey == ccb_phys)
1978 break;
1979 ccb = ccb->nexthash;
1980 }
1981 return (ccb);
1982 }
1983