bha.c revision 1.44 1 /* $NetBSD: bha.c,v 1.44 2001/07/07 15:53:17 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
9 * Simulation Facility, NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Originally written by Julian Elischer (julian (at) tfs.com)
42 * for TRW Financial Systems for use under the MACH(2.5) operating system.
43 *
44 * TRW Financial Systems, in accordance with their agreement with Carnegie
45 * Mellon University, makes this software available to CMU to distribute
46 * or use in any manner that they see fit as long as this message is kept with
47 * the software. For this reason TFS also grants any other persons or
48 * organisations permission to use or modify this software.
49 *
50 * TFS supplies this software to be publicly redistributed
51 * on the understanding that TFS is not responsible for the correct
52 * functioning of this software in any circumstances.
53 */
54
55 #include "opt_ddb.h"
56
57 #include <sys/types.h>
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/callout.h>
61 #include <sys/kernel.h>
62 #include <sys/errno.h>
63 #include <sys/ioctl.h>
64 #include <sys/device.h>
65 #include <sys/malloc.h>
66 #include <sys/buf.h>
67 #include <sys/proc.h>
68 #include <sys/user.h>
69
70 #include <uvm/uvm_extern.h>
71
72 #include <machine/bus.h>
73 #include <machine/intr.h>
74
75 #include <dev/scsipi/scsi_all.h>
76 #include <dev/scsipi/scsipi_all.h>
77 #include <dev/scsipi/scsiconf.h>
78
79 #include <dev/ic/bhareg.h>
80 #include <dev/ic/bhavar.h>
81
82 #ifndef DDB
83 #define Debugger() panic("should call debugger here (bha.c)")
84 #endif /* ! DDB */
85
86 #define BHA_MAXXFER ((BHA_NSEG - 1) << PGSHIFT)
87
88 #ifdef BHADEBUG
89 int bha_debug = 0;
90 #endif /* BHADEBUG */
91
92 static int bha_cmd __P((bus_space_tag_t, bus_space_handle_t, char *, int,
93 u_char *, int, u_char *));
94
95 static void bha_scsipi_request __P((struct scsipi_channel *,
96 scsipi_adapter_req_t, void *));
97 static void bha_minphys __P((struct buf *));
98
99 static void bha_get_xfer_mode __P((struct bha_softc *,
100 struct scsipi_xfer_mode *));
101
102 static void bha_done __P((struct bha_softc *, struct bha_ccb *));
103 int bha_poll __P((struct bha_softc *, struct scsipi_xfer *, int));
104 static void bha_timeout __P((void *arg));
105
106 static int bha_init __P((struct bha_softc *));
107
108 static int bha_create_mailbox __P((struct bha_softc *));
109 static void bha_collect_mbo __P((struct bha_softc *));
110
111 static void bha_queue_ccb __P((struct bha_softc *, struct bha_ccb *));
112 static void bha_start_ccbs __P((struct bha_softc *));
113 static void bha_finish_ccbs __P((struct bha_softc *));
114
115 struct bha_ccb *bha_ccb_phys_kv __P((struct bha_softc *, bus_addr_t));
116 void bha_create_ccbs __P((struct bha_softc *, int));
117 int bha_init_ccb __P((struct bha_softc *, struct bha_ccb *));
118 struct bha_ccb *bha_get_ccb __P((struct bha_softc *));
119 void bha_free_ccb __P((struct bha_softc *, struct bha_ccb *));
120
121 #define BHA_RESET_TIMEOUT 2000 /* time to wait for reset (mSec) */
122 #define BHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */
123
124 /*
125 * Number of CCBs in an allocation group; must be computed at run-time.
126 */
127 int bha_ccbs_per_group;
128
129 __inline struct bha_mbx_out *bha_nextmbo __P((struct bha_softc *,
130 struct bha_mbx_out *));
131 __inline struct bha_mbx_in *bha_nextmbi __P((struct bha_softc *,
132 struct bha_mbx_in *));
133
134 __inline struct bha_mbx_out *
135 bha_nextmbo(sc, mbo)
136 struct bha_softc *sc;
137 struct bha_mbx_out *mbo;
138 {
139
140 if (mbo == &sc->sc_mbo[sc->sc_mbox_count - 1])
141 return (&sc->sc_mbo[0]);
142 return (mbo + 1);
143 }
144
145 __inline struct bha_mbx_in *
146 bha_nextmbi(sc, mbi)
147 struct bha_softc *sc;
148 struct bha_mbx_in *mbi;
149 {
150 if (mbi == &sc->sc_mbi[sc->sc_mbox_count - 1])
151 return (&sc->sc_mbi[0]);
152 return (mbi + 1);
153 }
154
155 /*
156 * bha_attach:
157 *
158 * Finish attaching a Buslogic controller, and configure children.
159 */
160 void
161 bha_attach(sc)
162 struct bha_softc *sc;
163 {
164 struct scsipi_adapter *adapt = &sc->sc_adapter;
165 struct scsipi_channel *chan = &sc->sc_channel;
166 int initial_ccbs;
167
168 /*
169 * Initialize the number of CCBs per group.
170 */
171 if (bha_ccbs_per_group == 0)
172 bha_ccbs_per_group = BHA_CCBS_PER_GROUP;
173
174 initial_ccbs = bha_info(sc);
175 if (initial_ccbs == 0) {
176 printf("%s: unable to get adapter info\n",
177 sc->sc_dev.dv_xname);
178 return;
179 }
180
181 /*
182 * Fill in the scsipi_adapter.
183 */
184 memset(adapt, 0, sizeof(*adapt));
185 adapt->adapt_dev = &sc->sc_dev;
186 adapt->adapt_nchannels = 1;
187 /* adapt_openings initialized below */
188 adapt->adapt_max_periph = sc->sc_mbox_count;
189 adapt->adapt_request = bha_scsipi_request;
190 adapt->adapt_minphys = bha_minphys;
191
192 /*
193 * Fill in the scsipi_channel.
194 */
195 memset(chan, 0, sizeof(*chan));
196 chan->chan_adapter = adapt;
197 chan->chan_bustype = &scsi_bustype;
198 chan->chan_channel = 0;
199 chan->chan_flags = SCSIPI_CHAN_CANGROW;
200 chan->chan_ntargets = (sc->sc_flags & BHAF_WIDE) ? 16 : 8;
201 chan->chan_nluns = (sc->sc_flags & BHAF_WIDE_LUN) ? 32 : 8;
202 chan->chan_id = sc->sc_scsi_id;
203
204 TAILQ_INIT(&sc->sc_free_ccb);
205 TAILQ_INIT(&sc->sc_waiting_ccb);
206 TAILQ_INIT(&sc->sc_allocating_ccbs);
207
208 if (bha_create_mailbox(sc) != 0)
209 return;
210
211 bha_create_ccbs(sc, initial_ccbs);
212 if (sc->sc_cur_ccbs < 2) {
213 printf("%s: not enough CCBs to run\n",
214 sc->sc_dev.dv_xname);
215 return;
216 }
217
218 adapt->adapt_openings = sc->sc_cur_ccbs;
219
220 if (bha_init(sc) != 0)
221 return;
222
223 (void) config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
224 }
225
226 /*
227 * bha_intr:
228 *
229 * Interrupt service routine.
230 */
231 int
232 bha_intr(arg)
233 void *arg;
234 {
235 struct bha_softc *sc = arg;
236 bus_space_tag_t iot = sc->sc_iot;
237 bus_space_handle_t ioh = sc->sc_ioh;
238 u_char sts;
239
240 #ifdef BHADEBUG
241 printf("%s: bha_intr ", sc->sc_dev.dv_xname);
242 #endif /* BHADEBUG */
243
244 /*
245 * First acknowlege the interrupt, Then if it's not telling about
246 * a completed operation just return.
247 */
248 sts = bus_space_read_1(iot, ioh, BHA_INTR_PORT);
249 if ((sts & BHA_INTR_ANYINTR) == 0)
250 return (0);
251 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_IRST);
252
253 #ifdef BHADIAG
254 /* Make sure we clear CCB_SENDING before finishing a CCB. */
255 bha_collect_mbo(sc);
256 #endif
257
258 /* Mail box out empty? */
259 if (sts & BHA_INTR_MBOA) {
260 struct bha_toggle toggle;
261
262 toggle.cmd.opcode = BHA_MBO_INTR_EN;
263 toggle.cmd.enable = 0;
264 bha_cmd(iot, ioh, sc->sc_dev.dv_xname,
265 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
266 0, (u_char *)0);
267 bha_start_ccbs(sc);
268 }
269
270 /* Mail box in full? */
271 if (sts & BHA_INTR_MBIF)
272 bha_finish_ccbs(sc);
273
274 return (1);
275 }
276
277 /*****************************************************************************
278 * SCSI interface routines
279 *****************************************************************************/
280
281 /*
282 * bha_scsipi_request:
283 *
284 * Perform a request for the SCSIPI layer.
285 */
286 void
287 bha_scsipi_request(chan, req, arg)
288 struct scsipi_channel *chan;
289 scsipi_adapter_req_t req;
290 void *arg;
291 {
292 struct scsipi_adapter *adapt = chan->chan_adapter;
293 struct bha_softc *sc = (void *)adapt->adapt_dev;
294 struct scsipi_xfer *xs;
295 struct scsipi_periph *periph;
296 bus_dma_tag_t dmat = sc->sc_dmat;
297 struct bha_ccb *ccb;
298 int error, seg, flags, s;
299
300 switch (req) {
301 case ADAPTER_REQ_RUN_XFER:
302 xs = arg;
303 periph = xs->xs_periph;
304 flags = xs->xs_control;
305
306 SC_DEBUG(periph, SCSIPI_DB2, ("bha_scsipi_request\n"));
307
308 /* Get a CCB to use. */
309 ccb = bha_get_ccb(sc);
310 #ifdef DIAGNOSTIC
311 /*
312 * This should never happen as we track the resources
313 * in the mid-layer.
314 */
315 if (ccb == NULL) {
316 scsipi_printaddr(periph);
317 printf("unable to allocate ccb\n");
318 panic("bha_scsipi_request");
319 }
320 #endif
321
322 ccb->xs = xs;
323 ccb->timeout = xs->timeout;
324
325 /*
326 * Put all the arguments for the xfer in the ccb
327 */
328 if (flags & XS_CTL_RESET) {
329 ccb->opcode = BHA_RESET_CCB;
330 ccb->scsi_cmd_length = 0;
331 } else {
332 /* can't use S/G if zero length */
333 ccb->opcode = (xs->datalen ? BHA_INIT_SCAT_GATH_CCB
334 : BHA_INITIATOR_CCB);
335 memcpy(&ccb->scsi_cmd, xs->cmd,
336 ccb->scsi_cmd_length = xs->cmdlen);
337 }
338
339 if (xs->datalen) {
340 /*
341 * Map the DMA transfer.
342 */
343 #ifdef TFS
344 if (flags & XS_CTL_DATA_UIO) {
345 error = bus_dmamap_load_uio(dmat,
346 ccb->dmamap_xfer, (struct uio *)xs->data,
347 ((flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
348 BUS_DMA_WAITOK) | BUS_DMA_STREAMING);
349 } else
350 #endif /* TFS */
351 {
352 error = bus_dmamap_load(dmat,
353 ccb->dmamap_xfer, xs->data, xs->datalen,
354 NULL,
355 ((flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
356 BUS_DMA_WAITOK) | BUS_DMA_STREAMING);
357 }
358
359 switch (error) {
360 case 0:
361 break;
362
363 case ENOMEM:
364 case EAGAIN:
365 xs->error = XS_RESOURCE_SHORTAGE;
366 goto out_bad;
367
368 default:
369 xs->error = XS_DRIVER_STUFFUP;
370 printf("%s: error %d loading DMA map\n",
371 sc->sc_dev.dv_xname, error);
372 out_bad:
373 bha_free_ccb(sc, ccb);
374 scsipi_done(xs);
375 return;
376 }
377
378 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
379 ccb->dmamap_xfer->dm_mapsize,
380 (flags & XS_CTL_DATA_IN) ? BUS_DMASYNC_PREREAD :
381 BUS_DMASYNC_PREWRITE);
382
383 /*
384 * Load the hardware scatter/gather map with the
385 * contents of the DMA map.
386 */
387 for (seg = 0; seg < ccb->dmamap_xfer->dm_nsegs; seg++) {
388 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_addr,
389 ccb->scat_gath[seg].seg_addr);
390 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_len,
391 ccb->scat_gath[seg].seg_len);
392 }
393
394 ltophys(ccb->hashkey + offsetof(struct bha_ccb,
395 scat_gath), ccb->data_addr);
396 ltophys(ccb->dmamap_xfer->dm_nsegs *
397 sizeof(struct bha_scat_gath), ccb->data_length);
398 } else {
399 /*
400 * No data xfer, use non S/G values.
401 */
402 ltophys(0, ccb->data_addr);
403 ltophys(0, ccb->data_length);
404 }
405
406 if (XS_CTL_TAGTYPE(xs) != 0) {
407 ccb->tag_enable = 1;
408 ccb->tag_type = xs->xs_tag_type & 0x03;
409 } else {
410 ccb->tag_enable = 0;
411 ccb->tag_type = 0;
412 }
413
414 ccb->data_out = 0;
415 ccb->data_in = 0;
416 ccb->target = periph->periph_target;
417 ccb->lun = periph->periph_lun;
418 ltophys(ccb->hashkey + offsetof(struct bha_ccb, scsi_sense),
419 ccb->sense_ptr);
420 ccb->req_sense_length = sizeof(ccb->scsi_sense);
421 ccb->host_stat = 0x00;
422 ccb->target_stat = 0x00;
423 ccb->link_id = 0;
424 ltophys(0, ccb->link_addr);
425
426 BHA_CCB_SYNC(sc, ccb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
427
428 s = splbio();
429 bha_queue_ccb(sc, ccb);
430 splx(s);
431
432 SC_DEBUG(periph, SCSIPI_DB3, ("cmd_sent\n"));
433 if ((flags & XS_CTL_POLL) == 0)
434 return;
435
436 /*
437 * If we can't use interrupts, poll on completion
438 */
439 if (bha_poll(sc, xs, ccb->timeout)) {
440 bha_timeout(ccb);
441 if (bha_poll(sc, xs, ccb->timeout))
442 bha_timeout(ccb);
443 }
444 return;
445
446 case ADAPTER_REQ_GROW_RESOURCES:
447 if (sc->sc_cur_ccbs == sc->sc_max_ccbs) {
448 chan->chan_flags &= ~SCSIPI_CHAN_CANGROW;
449 return;
450 }
451 seg = sc->sc_cur_ccbs;
452 bha_create_ccbs(sc, bha_ccbs_per_group);
453 adapt->adapt_openings += sc->sc_cur_ccbs - seg;
454 return;
455
456 case ADAPTER_REQ_SET_XFER_MODE:
457 /*
458 * Can't really do this on the Buslogic. It has its
459 * own setup info. But we do know how to query what
460 * the settings are.
461 */
462 bha_get_xfer_mode(sc, (struct scsipi_xfer_mode *)arg);
463 return;
464 }
465 }
466
467 /*
468 * bha_minphys:
469 *
470 * Limit a transfer to our maximum transfer size.
471 */
472 void
473 bha_minphys(bp)
474 struct buf *bp;
475 {
476
477 if (bp->b_bcount > BHA_MAXXFER)
478 bp->b_bcount = BHA_MAXXFER;
479 minphys(bp);
480 }
481
482 /*****************************************************************************
483 * SCSI job execution helper routines
484 *****************************************************************************/
485
486 /*
487 * bha_get_xfer_mode;
488 *
489 * Negotiate the xfer mode for the specified periph, and report
490 * back the mode to the midlayer.
491 *
492 * NOTE: we must be called at splbio().
493 */
494 void
495 bha_get_xfer_mode(sc, xm)
496 struct bha_softc *sc;
497 struct scsipi_xfer_mode *xm;
498 {
499 struct bha_setup hwsetup;
500 struct bha_period hwperiod;
501 struct bha_sync *bs;
502 int toff = xm->xm_target & 7, tmask = (1 << toff);
503 int wide, period, offset, rlen;
504
505 /*
506 * Issue an Inquire Setup Information. We can extract
507 * sync and wide information from here.
508 */
509 rlen = sizeof(hwsetup.reply) +
510 ((sc->sc_flags & BHAF_WIDE) ? sizeof(hwsetup.reply_w) : 0);
511 hwsetup.cmd.opcode = BHA_INQUIRE_SETUP;
512 hwsetup.cmd.len = rlen;
513 bha_cmd(sc->sc_iot, sc->sc_ioh, sc->sc_dev.dv_xname,
514 sizeof(hwsetup.cmd), (u_char *)&hwsetup.cmd,
515 rlen, (u_char *)&hwsetup.reply);
516
517 xm->xm_mode = 0;
518 xm->xm_period = 0;
519 xm->xm_offset = 0;
520
521 /*
522 * First check for wide. On later boards, we can check
523 * directly in the setup info if wide is currently active.
524 *
525 * On earlier boards, we have to make an educated guess.
526 */
527 if (sc->sc_flags & BHAF_WIDE) {
528 if (strcmp(sc->sc_firmware, "5.06L") >= 0) {
529 if (xm->xm_target > 7) {
530 wide =
531 hwsetup.reply_w.high_wide_active & tmask;
532 } else {
533 wide =
534 hwsetup.reply_w.low_wide_active & tmask;
535 }
536 if (wide)
537 xm->xm_mode |= PERIPH_CAP_WIDE16;
538 } else {
539 /* XXX Check `wide permitted' in the config info. */
540 xm->xm_mode |= PERIPH_CAP_WIDE16;
541 }
542 }
543
544 /*
545 * Now get basic sync info.
546 */
547 bs = (xm->xm_target > 7) ?
548 &hwsetup.reply_w.sync_high[toff] :
549 &hwsetup.reply.sync_low[toff];
550
551 if (bs->valid) {
552 xm->xm_mode |= PERIPH_CAP_SYNC;
553 period = (bs->period * 50) + 20;
554 offset = bs->offset;
555
556 /*
557 * On boards that can do Fast and Ultra, use the Inquire Period
558 * command to get the period.
559 */
560 if (sc->sc_firmware[0] >= '3') {
561 rlen = sizeof(hwperiod.reply) +
562 ((sc->sc_flags & BHAF_WIDE) ?
563 sizeof(hwperiod.reply_w) : 0);
564 hwperiod.cmd.opcode = BHA_INQUIRE_PERIOD;
565 hwperiod.cmd.len = rlen;
566 bha_cmd(sc->sc_iot, sc->sc_ioh, sc->sc_dev.dv_xname,
567 sizeof(hwperiod.cmd), (u_char *)&hwperiod.cmd,
568 rlen, (u_char *)&hwperiod.reply);
569
570 if (xm->xm_target > 7)
571 period = hwperiod.reply_w.period[toff];
572 else
573 period = hwperiod.reply.period[toff];
574
575 period *= 10;
576 }
577
578 xm->xm_period =
579 scsipi_sync_period_to_factor(period * 10);
580 xm->xm_offset = offset;
581 }
582
583 /*
584 * Now check for tagged queueing support.
585 *
586 * XXX Check `tags permitted' in the config info.
587 */
588 if (sc->sc_flags & BHAF_TAGGED_QUEUEING)
589 xm->xm_mode |= PERIPH_CAP_TQING;
590
591 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, xm);
592 }
593
594 /*
595 * bha_done:
596 *
597 * A CCB has completed execution. Pass the status back to the
598 * upper layer.
599 */
600 void
601 bha_done(sc, ccb)
602 struct bha_softc *sc;
603 struct bha_ccb *ccb;
604 {
605 bus_dma_tag_t dmat = sc->sc_dmat;
606 struct scsipi_xfer *xs = ccb->xs;
607
608 SC_DEBUG(xs->xs_periph, SCSIPI_DB2, ("bha_done\n"));
609
610 #ifdef BHADIAG
611 if (ccb->flags & CCB_SENDING) {
612 printf("%s: exiting ccb still in transit!\n",
613 sc->sc_dev.dv_xname);
614 Debugger();
615 return;
616 }
617 #endif
618 if ((ccb->flags & CCB_ALLOC) == 0) {
619 printf("%s: exiting ccb not allocated!\n",
620 sc->sc_dev.dv_xname);
621 Debugger();
622 return;
623 }
624
625 /*
626 * If we were a data transfer, unload the map that described
627 * the data buffer.
628 */
629 if (xs->datalen) {
630 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
631 ccb->dmamap_xfer->dm_mapsize,
632 (xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMASYNC_POSTREAD :
633 BUS_DMASYNC_POSTWRITE);
634 bus_dmamap_unload(dmat, ccb->dmamap_xfer);
635 }
636
637 if (xs->error == XS_NOERROR) {
638 if (ccb->host_stat != BHA_OK) {
639 switch (ccb->host_stat) {
640 case BHA_SEL_TIMEOUT: /* No response */
641 xs->error = XS_SELTIMEOUT;
642 break;
643 default: /* Other scsi protocol messes */
644 printf("%s: host_stat %x\n",
645 sc->sc_dev.dv_xname, ccb->host_stat);
646 xs->error = XS_DRIVER_STUFFUP;
647 break;
648 }
649 } else if (ccb->target_stat != SCSI_OK) {
650 switch (ccb->target_stat) {
651 case SCSI_CHECK:
652 memcpy(&xs->sense.scsi_sense,
653 &ccb->scsi_sense,
654 sizeof(xs->sense.scsi_sense));
655 xs->error = XS_SENSE;
656 break;
657 case SCSI_BUSY:
658 xs->error = XS_BUSY;
659 break;
660 default:
661 printf("%s: target_stat %x\n",
662 sc->sc_dev.dv_xname, ccb->target_stat);
663 xs->error = XS_DRIVER_STUFFUP;
664 break;
665 }
666 } else
667 xs->resid = 0;
668 }
669
670 bha_free_ccb(sc, ccb);
671 scsipi_done(xs);
672 }
673
674 /*
675 * bha_poll:
676 *
677 * Poll for completion of the specified job.
678 */
679 int
680 bha_poll(sc, xs, count)
681 struct bha_softc *sc;
682 struct scsipi_xfer *xs;
683 int count;
684 {
685 bus_space_tag_t iot = sc->sc_iot;
686 bus_space_handle_t ioh = sc->sc_ioh;
687
688 /* timeouts are in msec, so we loop in 1000 usec cycles */
689 while (count) {
690 /*
691 * If we had interrupts enabled, would we
692 * have got an interrupt?
693 */
694 if (bus_space_read_1(iot, ioh, BHA_INTR_PORT) &
695 BHA_INTR_ANYINTR)
696 bha_intr(sc);
697 if (xs->xs_status & XS_STS_DONE)
698 return (0);
699 delay(1000); /* only happens in boot so ok */
700 count--;
701 }
702 return (1);
703 }
704
705 /*
706 * bha_timeout:
707 *
708 * CCB timeout handler.
709 */
710 void
711 bha_timeout(arg)
712 void *arg;
713 {
714 struct bha_ccb *ccb = arg;
715 struct scsipi_xfer *xs = ccb->xs;
716 struct scsipi_periph *periph = xs->xs_periph;
717 struct bha_softc *sc =
718 (void *)periph->periph_channel->chan_adapter->adapt_dev;
719 int s;
720
721 scsipi_printaddr(periph);
722 printf("timed out");
723
724 s = splbio();
725
726 #ifdef BHADIAG
727 /*
728 * If the ccb's mbx is not free, then the board has gone Far East?
729 */
730 bha_collect_mbo(sc);
731 if (ccb->flags & CCB_SENDING) {
732 printf("%s: not taking commands!\n", sc->sc_dev.dv_xname);
733 Debugger();
734 }
735 #endif
736
737 /*
738 * If it has been through before, then
739 * a previous abort has failed, don't
740 * try abort again
741 */
742 if (ccb->flags & CCB_ABORT) {
743 /* abort timed out */
744 printf(" AGAIN\n");
745 /* XXX Must reset! */
746 } else {
747 /* abort the operation that has timed out */
748 printf("\n");
749 ccb->xs->error = XS_TIMEOUT;
750 ccb->timeout = BHA_ABORT_TIMEOUT;
751 ccb->flags |= CCB_ABORT;
752 bha_queue_ccb(sc, ccb);
753 }
754
755 splx(s);
756 }
757
758 /*****************************************************************************
759 * Misc. subroutines.
760 *****************************************************************************/
761
762 /*
763 * bha_cmd:
764 *
765 * Send a command to the Buglogic controller.
766 */
767 int
768 bha_cmd(iot, ioh, name, icnt, ibuf, ocnt, obuf)
769 bus_space_tag_t iot;
770 bus_space_handle_t ioh;
771 char *name;
772 int icnt, ocnt;
773 u_char *ibuf, *obuf;
774 {
775 int i;
776 int wait;
777 u_char sts;
778 u_char opcode = ibuf[0];
779
780 /*
781 * Calculate a reasonable timeout for the command.
782 */
783 switch (opcode) {
784 case BHA_INQUIRE_DEVICES:
785 case BHA_INQUIRE_DEVICES_2:
786 wait = 90 * 20000;
787 break;
788 default:
789 wait = 1 * 20000;
790 break;
791 }
792
793 /*
794 * Wait for the adapter to go idle, unless it's one of
795 * the commands which don't need this
796 */
797 if (opcode != BHA_MBO_INTR_EN) {
798 for (i = 20000; i; i--) { /* 1 sec? */
799 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
800 if (sts & BHA_STAT_IDLE)
801 break;
802 delay(50);
803 }
804 if (!i) {
805 printf("%s: bha_cmd, host not idle(0x%x)\n",
806 name, sts);
807 return (1);
808 }
809 }
810
811 /*
812 * Now that it is idle, if we expect output, preflush the
813 * queue feeding to us.
814 */
815 if (ocnt) {
816 while ((bus_space_read_1(iot, ioh, BHA_STAT_PORT)) &
817 BHA_STAT_DF)
818 bus_space_read_1(iot, ioh, BHA_DATA_PORT);
819 }
820
821 /*
822 * Output the command and the number of arguments given
823 * for each byte, first check the port is empty.
824 */
825 while (icnt--) {
826 for (i = wait; i; i--) {
827 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
828 if (!(sts & BHA_STAT_CDF))
829 break;
830 delay(50);
831 }
832 if (!i) {
833 if (opcode != BHA_INQUIRE_REVISION)
834 printf("%s: bha_cmd, cmd/data port full\n",
835 name);
836 goto bad;
837 }
838 bus_space_write_1(iot, ioh, BHA_CMD_PORT, *ibuf++);
839 }
840
841 /*
842 * If we expect input, loop that many times, each time,
843 * looking for the data register to have valid data
844 */
845 while (ocnt--) {
846 for (i = wait; i; i--) {
847 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
848 if (sts & BHA_STAT_DF)
849 break;
850 delay(50);
851 }
852 if (!i) {
853 #ifdef BHADEBUG
854 if (opcode != BHA_INQUIRE_REVISION)
855 printf("%s: bha_cmd, cmd/data port empty %d\n",
856 name, ocnt);
857 #endif /* BHADEBUG */
858 goto bad;
859 }
860 *obuf++ = bus_space_read_1(iot, ioh, BHA_DATA_PORT);
861 }
862
863 /*
864 * Wait for the board to report a finished instruction.
865 * We may get an extra interrupt for the HACC signal, but this is
866 * unimportant.
867 */
868 if (opcode != BHA_MBO_INTR_EN && opcode != BHA_MODIFY_IOPORT) {
869 for (i = 20000; i; i--) { /* 1 sec? */
870 sts = bus_space_read_1(iot, ioh, BHA_INTR_PORT);
871 /* XXX Need to save this in the interrupt handler? */
872 if (sts & BHA_INTR_HACC)
873 break;
874 delay(50);
875 }
876 if (!i) {
877 printf("%s: bha_cmd, host not finished(0x%x)\n",
878 name, sts);
879 return (1);
880 }
881 }
882 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_IRST);
883 return (0);
884
885 bad:
886 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_SRST);
887 return (1);
888 }
889
890 /*
891 * bha_find:
892 *
893 * Find the board.
894 */
895 int
896 bha_find(iot, ioh)
897 bus_space_tag_t iot;
898 bus_space_handle_t ioh;
899 {
900 int i;
901 u_char sts;
902 struct bha_extended_inquire inquire;
903
904 /* Check something is at the ports we need to access */
905 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
906 if (sts == 0xFF)
907 return (0);
908
909 /*
910 * Reset board, If it doesn't respond, assume
911 * that it's not there.. good for the probe
912 */
913
914 bus_space_write_1(iot, ioh, BHA_CTRL_PORT,
915 BHA_CTRL_HRST | BHA_CTRL_SRST);
916
917 delay(100);
918 for (i = BHA_RESET_TIMEOUT; i; i--) {
919 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT);
920 if (sts == (BHA_STAT_IDLE | BHA_STAT_INIT))
921 break;
922 delay(1000);
923 }
924 if (!i) {
925 #ifdef BHADEBUG
926 if (bha_debug)
927 printf("bha_find: No answer from buslogic board\n");
928 #endif /* BHADEBUG */
929 return (0);
930 }
931
932 /*
933 * The BusLogic cards implement an Adaptec 1542 (aha)-compatible
934 * interface. The native bha interface is not compatible with
935 * an aha. 1542. We need to ensure that we never match an
936 * Adaptec 1542. We must also avoid sending Adaptec-compatible
937 * commands to a real bha, lest it go into 1542 emulation mode.
938 * (On an indirect bus like ISA, we should always probe for BusLogic
939 * interfaces before Adaptec interfaces).
940 */
941
942 /*
943 * Make sure we don't match an AHA-1542A or AHA-1542B, by checking
944 * for an extended-geometry register. The 1542[AB] don't have one.
945 */
946 sts = bus_space_read_1(iot, ioh, BHA_EXTGEOM_PORT);
947 if (sts == 0xFF)
948 return (0);
949
950 /*
951 * Check that we actually know how to use this board.
952 */
953 delay(1000);
954 inquire.cmd.opcode = BHA_INQUIRE_EXTENDED;
955 inquire.cmd.len = sizeof(inquire.reply);
956 i = bha_cmd(iot, ioh, "(bha_find)",
957 sizeof(inquire.cmd), (u_char *)&inquire.cmd,
958 sizeof(inquire.reply), (u_char *)&inquire.reply);
959
960 /*
961 * Some 1542Cs (CP, perhaps not CF, may depend on firmware rev)
962 * have the extended-geometry register and also respond to
963 * BHA_INQUIRE_EXTENDED. Make sure we never match such cards,
964 * by checking the size of the reply is what a BusLogic card returns.
965 */
966 if (i) {
967 #ifdef BHADEBUG
968 printf("bha_find: board returned %d instead of %d to %s\n",
969 i, sizeof(inquire.reply), "INQUIRE_EXTENDED");
970 #endif
971 return (0);
972 }
973
974 /* OK, we know we've found a buslogic adaptor. */
975
976 switch (inquire.reply.bus_type) {
977 case BHA_BUS_TYPE_24BIT:
978 case BHA_BUS_TYPE_32BIT:
979 break;
980 case BHA_BUS_TYPE_MCA:
981 /* We don't grok MicroChannel (yet). */
982 return (0);
983 default:
984 printf("bha_find: illegal bus type %c\n",
985 inquire.reply.bus_type);
986 return (0);
987 }
988
989 return (1);
990 }
991
992
993 /*
994 * bha_inquire_config:
995 *
996 * Determine irq/drq.
997 */
998 int
999 bha_inquire_config(bus_space_tag_t iot, bus_space_handle_t ioh,
1000 struct bha_probe_data *sc)
1001 {
1002 int irq, drq;
1003 struct bha_config config;
1004
1005 /*
1006 * Assume we have a board at this stage setup dma channel from
1007 * jumpers and save int level
1008 */
1009 delay(1000);
1010 config.cmd.opcode = BHA_INQUIRE_CONFIG;
1011 bha_cmd(iot, ioh, "(bha_inquire_config)",
1012 sizeof(config.cmd), (u_char *)&config.cmd,
1013 sizeof(config.reply), (u_char *)&config.reply);
1014 switch (config.reply.chan) {
1015 case EISADMA:
1016 drq = -1;
1017 break;
1018 case CHAN0:
1019 drq = 0;
1020 break;
1021 case CHAN5:
1022 drq = 5;
1023 break;
1024 case CHAN6:
1025 drq = 6;
1026 break;
1027 case CHAN7:
1028 drq = 7;
1029 break;
1030 default:
1031 printf("bha: illegal drq setting %x\n",
1032 config.reply.chan);
1033 return (0);
1034 }
1035
1036 switch (config.reply.intr) {
1037 case INT9:
1038 irq = 9;
1039 break;
1040 case INT10:
1041 irq = 10;
1042 break;
1043 case INT11:
1044 irq = 11;
1045 break;
1046 case INT12:
1047 irq = 12;
1048 break;
1049 case INT14:
1050 irq = 14;
1051 break;
1052 case INT15:
1053 irq = 15;
1054 break;
1055 default:
1056 printf("bha: illegal irq setting %x\n",
1057 config.reply.intr);
1058 return (0);
1059 }
1060
1061 /* if we want to fill in softc, do so now */
1062 if (sc != NULL) {
1063 sc->sc_irq = irq;
1064 sc->sc_drq = drq;
1065 }
1066
1067 return (1);
1068 }
1069
1070 int
1071 bha_probe_inquiry(bus_space_tag_t iot, bus_space_handle_t ioh,
1072 struct bha_probe_data *bpd)
1073 {
1074 return bha_find(iot, ioh) && bha_inquire_config(iot, ioh, bpd);
1075 }
1076
1077 /*
1078 * bha_disable_isacompat:
1079 *
1080 * Disable the ISA-compatiblity ioports on PCI bha devices,
1081 * to ensure they're not autoconfigured a second time as an ISA bha.
1082 */
1083 int
1084 bha_disable_isacompat(sc)
1085 struct bha_softc *sc;
1086 {
1087 struct bha_isadisable isa_disable;
1088
1089 isa_disable.cmd.opcode = BHA_MODIFY_IOPORT;
1090 isa_disable.cmd.modifier = BHA_IOMODIFY_DISABLE1;
1091 bha_cmd(sc->sc_iot, sc->sc_ioh, sc->sc_dev.dv_xname,
1092 sizeof(isa_disable.cmd), (u_char*)&isa_disable.cmd,
1093 0, (u_char *)0);
1094 return (0);
1095 }
1096
1097 /*
1098 * bha_info:
1099 *
1100 * Get information about the board, and report it. We
1101 * return the initial number of CCBs, 0 if we failed.
1102 */
1103 int
1104 bha_info(sc)
1105 struct bha_softc *sc;
1106 {
1107 bus_space_tag_t iot = sc->sc_iot;
1108 bus_space_handle_t ioh = sc->sc_ioh;
1109 struct bha_extended_inquire inquire;
1110 struct bha_config config;
1111 struct bha_devices devices;
1112 struct bha_setup setup;
1113 struct bha_model model;
1114 struct bha_revision revision;
1115 struct bha_digit digit;
1116 int i, j, initial_ccbs, rlen;
1117 char *name = sc->sc_dev.dv_xname;
1118 char *p;
1119
1120 /*
1121 * Fetch the extended inquire information.
1122 */
1123 inquire.cmd.opcode = BHA_INQUIRE_EXTENDED;
1124 inquire.cmd.len = sizeof(inquire.reply);
1125 bha_cmd(iot, ioh, name,
1126 sizeof(inquire.cmd), (u_char *)&inquire.cmd,
1127 sizeof(inquire.reply), (u_char *)&inquire.reply);
1128
1129 /*
1130 * Fetch the configuration information.
1131 */
1132 config.cmd.opcode = BHA_INQUIRE_CONFIG;
1133 bha_cmd(iot, ioh, name,
1134 sizeof(config.cmd), (u_char *)&config.cmd,
1135 sizeof(config.reply), (u_char *)&config.reply);
1136
1137 sc->sc_scsi_id = config.reply.scsi_dev;
1138
1139 /*
1140 * Get the firmware revision.
1141 */
1142 p = sc->sc_firmware;
1143 revision.cmd.opcode = BHA_INQUIRE_REVISION;
1144 bha_cmd(iot, ioh, name,
1145 sizeof(revision.cmd), (u_char *)&revision.cmd,
1146 sizeof(revision.reply), (u_char *)&revision.reply);
1147 *p++ = revision.reply.firm_revision;
1148 *p++ = '.';
1149 *p++ = revision.reply.firm_version;
1150 digit.cmd.opcode = BHA_INQUIRE_REVISION_3;
1151 bha_cmd(iot, ioh, name,
1152 sizeof(digit.cmd), (u_char *)&digit.cmd,
1153 sizeof(digit.reply), (u_char *)&digit.reply);
1154 *p++ = digit.reply.digit;
1155 if (revision.reply.firm_revision >= '3' ||
1156 (revision.reply.firm_revision == '3' &&
1157 revision.reply.firm_version >= '3')) {
1158 digit.cmd.opcode = BHA_INQUIRE_REVISION_4;
1159 bha_cmd(iot, ioh, name,
1160 sizeof(digit.cmd), (u_char *)&digit.cmd,
1161 sizeof(digit.reply), (u_char *)&digit.reply);
1162 *p++ = digit.reply.digit;
1163 }
1164 while (p > sc->sc_firmware && (p[-1] == ' ' || p[-1] == '\0'))
1165 p--;
1166 *p = '\0';
1167
1168 /*
1169 * Get the model number.
1170 *
1171 * Some boards do not handle the Inquire Board Model Number
1172 * command correctly, or don't give correct information.
1173 *
1174 * So, we use the Firmware Revision and Extended Setup
1175 * information to fixup the model number in these cases.
1176 *
1177 * The firmware version indicates:
1178 *
1179 * 5.xx BusLogic "W" Series Host Adapters
1180 * BT-948/958/958D
1181 *
1182 * 4.xx BusLogic "C" Series Host Adapters
1183 * BT-946C/956C/956CD/747C/757C/757CD/445C/545C/540CF
1184 *
1185 * 3.xx BusLogic "S" Series Host Adapters
1186 * BT-747S/747D/757S/757D/445S/545S/542D
1187 * BT-542B/742A (revision H)
1188 *
1189 * 2.xx BusLogic "A" Series Host Adapters
1190 * BT-542B/742A (revision G and below)
1191 *
1192 * 0.xx AMI FastDisk VLB/EISA BusLogic Clone Host Adapter
1193 */
1194 if (inquire.reply.bus_type == BHA_BUS_TYPE_24BIT &&
1195 sc->sc_firmware[0] < '3')
1196 sprintf(sc->sc_model, "542B");
1197 else if (inquire.reply.bus_type == BHA_BUS_TYPE_32BIT &&
1198 sc->sc_firmware[0] == '2' &&
1199 (sc->sc_firmware[2] == '1' ||
1200 (sc->sc_firmware[2] == '2' && sc->sc_firmware[3] == '0')))
1201 sprintf(sc->sc_model, "742A");
1202 else if (inquire.reply.bus_type == BHA_BUS_TYPE_32BIT &&
1203 sc->sc_firmware[0] == '0')
1204 sprintf(sc->sc_model, "747A");
1205 else {
1206 p = sc->sc_model;
1207 model.cmd.opcode = BHA_INQUIRE_MODEL;
1208 model.cmd.len = sizeof(model.reply);
1209 bha_cmd(iot, ioh, name,
1210 sizeof(model.cmd), (u_char *)&model.cmd,
1211 sizeof(model.reply), (u_char *)&model.reply);
1212 *p++ = model.reply.id[0];
1213 *p++ = model.reply.id[1];
1214 *p++ = model.reply.id[2];
1215 *p++ = model.reply.id[3];
1216 while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0'))
1217 p--;
1218 *p++ = model.reply.version[0];
1219 *p++ = model.reply.version[1];
1220 while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0'))
1221 p--;
1222 *p = '\0';
1223 }
1224
1225 /* Enable round-robin scheme - appeared at firmware rev. 3.31. */
1226 if (strcmp(sc->sc_firmware, "3.31") >= 0)
1227 sc->sc_flags |= BHAF_STRICT_ROUND_ROBIN;
1228
1229 /*
1230 * Determine some characteristics about our bus.
1231 */
1232 if (inquire.reply.scsi_flags & BHA_SCSI_WIDE)
1233 sc->sc_flags |= BHAF_WIDE;
1234 if (inquire.reply.scsi_flags & BHA_SCSI_DIFFERENTIAL)
1235 sc->sc_flags |= BHAF_DIFFERENTIAL;
1236 if (inquire.reply.scsi_flags & BHA_SCSI_ULTRA)
1237 sc->sc_flags |= BHAF_ULTRA;
1238
1239 /*
1240 * Determine some characterists of the board.
1241 */
1242 sc->sc_max_dmaseg = inquire.reply.sg_limit;
1243
1244 /*
1245 * Determine the maximum CCB count and whether or not
1246 * tagged queueing is available on this host adapter.
1247 *
1248 * Tagged queueing works on:
1249 *
1250 * "W" Series adapters
1251 * "C" Series adapters with firmware >= 4.22
1252 * "S" Series adapters with firmware >= 3.35
1253 *
1254 * The internal CCB counts are:
1255 *
1256 * 192 BT-948/958/958D
1257 * 100 BT-946C/956C/956CD/747C/757C/757CD/445C
1258 * 50 BT-545C/540CF
1259 * 30 BT-747S/747D/757S/757D/445S/545S/542D/542B/742A
1260 */
1261 switch (sc->sc_firmware[0]) {
1262 case '5':
1263 sc->sc_max_ccbs = 192;
1264 sc->sc_flags |= BHAF_TAGGED_QUEUEING;
1265 break;
1266
1267 case '4':
1268 if (sc->sc_model[0] == '5')
1269 sc->sc_max_ccbs = 50;
1270 else
1271 sc->sc_max_ccbs = 100;
1272 if (strcmp(sc->sc_firmware, "4.22") >= 0)
1273 sc->sc_flags |= BHAF_TAGGED_QUEUEING;
1274 break;
1275
1276 case '3':
1277 if (strcmp(sc->sc_firmware, "3.35") >= 0)
1278 sc->sc_flags |= BHAF_TAGGED_QUEUEING;
1279 /* FALLTHROUGH */
1280
1281 default:
1282 sc->sc_max_ccbs = 30;
1283 }
1284
1285 /*
1286 * Set the mailbox count to precisely the number of HW CCBs
1287 * available. A mailbox isn't required while a CCB is executing,
1288 * but this allows us to actually enqueue up to our resource
1289 * limit.
1290 *
1291 * This will keep the mailbox count small on boards which don't
1292 * have strict round-robin (they have to scan the entire set of
1293 * mailboxes each time they run a command).
1294 */
1295 sc->sc_mbox_count = sc->sc_max_ccbs;
1296
1297 /*
1298 * Obtain setup information.
1299 */
1300 rlen = sizeof(setup.reply) +
1301 ((sc->sc_flags & BHAF_WIDE) ? sizeof(setup.reply_w) : 0);
1302 setup.cmd.opcode = BHA_INQUIRE_SETUP;
1303 setup.cmd.len = rlen;
1304 bha_cmd(iot, ioh, name,
1305 sizeof(setup.cmd), (u_char *)&setup.cmd,
1306 rlen, (u_char *)&setup.reply);
1307
1308 printf("%s: model BT-%s, firmware %s\n", sc->sc_dev.dv_xname,
1309 sc->sc_model, sc->sc_firmware);
1310
1311 printf("%s: %d H/W CCBs", sc->sc_dev.dv_xname, sc->sc_max_ccbs);
1312 if (setup.reply.sync_neg)
1313 printf(", sync");
1314 if (setup.reply.parity)
1315 printf(", parity");
1316 if (sc->sc_flags & BHAF_TAGGED_QUEUEING)
1317 printf(", tagged queueing");
1318 if (sc->sc_flags & BHAF_WIDE_LUN)
1319 printf(", wide LUN support");
1320 printf("\n");
1321
1322 /*
1323 * Poll targets 0 - 7.
1324 */
1325 devices.cmd.opcode = BHA_INQUIRE_DEVICES;
1326 bha_cmd(iot, ioh, name,
1327 sizeof(devices.cmd), (u_char *)&devices.cmd,
1328 sizeof(devices.reply), (u_char *)&devices.reply);
1329
1330 /* Count installed units. */
1331 initial_ccbs = 0;
1332 for (i = 0; i < 8; i++) {
1333 for (j = 0; j < 8; j++) {
1334 if (((devices.reply.lun_map[i] >> j) & 1) == 1)
1335 initial_ccbs++;
1336 }
1337 }
1338
1339 /*
1340 * Poll targets 8 - 15 if we have a wide bus.
1341 */
1342 if (sc->sc_flags & BHAF_WIDE) {
1343 devices.cmd.opcode = BHA_INQUIRE_DEVICES_2;
1344 bha_cmd(iot, ioh, name,
1345 sizeof(devices.cmd), (u_char *)&devices.cmd,
1346 sizeof(devices.reply), (u_char *)&devices.reply);
1347
1348 for (i = 0; i < 8; i++) {
1349 for (j = 0; j < 8; j++) {
1350 if (((devices.reply.lun_map[i] >> j) & 1) == 1)
1351 initial_ccbs++;
1352 }
1353 }
1354 }
1355
1356 /*
1357 * Double the initial CCB count, for good measure.
1358 */
1359 initial_ccbs *= 2;
1360
1361 /*
1362 * Sanity check the initial CCB count; don't create more than
1363 * we can enqueue (sc_max_ccbs), and make sure there are some
1364 * at all.
1365 */
1366 if (initial_ccbs > sc->sc_max_ccbs)
1367 initial_ccbs = sc->sc_max_ccbs;
1368 if (initial_ccbs == 0)
1369 initial_ccbs = 2;
1370
1371 return (initial_ccbs);
1372 }
1373
1374 /*
1375 * bha_init:
1376 *
1377 * Initialize the board.
1378 */
1379 int
1380 bha_init(sc)
1381 struct bha_softc *sc;
1382 {
1383 char *name = sc->sc_dev.dv_xname;
1384 struct bha_toggle toggle;
1385 struct bha_mailbox mailbox;
1386 struct bha_mbx_out *mbo;
1387 struct bha_mbx_in *mbi;
1388 int i;
1389
1390 /*
1391 * Set up the mailbox. We always run the mailbox in round-robin.
1392 */
1393 for (i = 0; i < sc->sc_mbox_count; i++) {
1394 mbo = &sc->sc_mbo[i];
1395 mbi = &sc->sc_mbi[i];
1396
1397 mbo->cmd = BHA_MBO_FREE;
1398 BHA_MBO_SYNC(sc, mbo, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1399
1400 mbi->comp_stat = BHA_MBI_FREE;
1401 BHA_MBI_SYNC(sc, mbi, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1402 }
1403
1404 sc->sc_cmbo = sc->sc_tmbo = &sc->sc_mbo[0];
1405 sc->sc_tmbi = &sc->sc_mbi[0];
1406
1407 sc->sc_mbofull = 0;
1408
1409 /*
1410 * If the board supports strict round-robin, enable that.
1411 */
1412 if (sc->sc_flags & BHAF_STRICT_ROUND_ROBIN) {
1413 toggle.cmd.opcode = BHA_ROUND_ROBIN;
1414 toggle.cmd.enable = 1;
1415 bha_cmd(sc->sc_iot, sc->sc_ioh, name,
1416 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
1417 0, NULL);
1418 }
1419
1420 /*
1421 * Give the mailbox to the board.
1422 */
1423 mailbox.cmd.opcode = BHA_MBX_INIT_EXTENDED;
1424 mailbox.cmd.nmbx = sc->sc_mbox_count;
1425 ltophys(sc->sc_dmamap_mbox->dm_segs[0].ds_addr, mailbox.cmd.addr);
1426 bha_cmd(sc->sc_iot, sc->sc_ioh, name,
1427 sizeof(mailbox.cmd), (u_char *)&mailbox.cmd,
1428 0, (u_char *)0);
1429
1430 return (0);
1431 }
1432
1433 /*****************************************************************************
1434 * CCB execution engine
1435 *****************************************************************************/
1436
1437 /*
1438 * bha_queue_ccb:
1439 *
1440 * Queue a CCB to be sent to the controller, and send it if possible.
1441 */
1442 void
1443 bha_queue_ccb(sc, ccb)
1444 struct bha_softc *sc;
1445 struct bha_ccb *ccb;
1446 {
1447
1448 TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
1449 bha_start_ccbs(sc);
1450 }
1451
1452 /*
1453 * bha_start_ccbs:
1454 *
1455 * Send as many CCBs as we have empty mailboxes for.
1456 */
1457 void
1458 bha_start_ccbs(sc)
1459 struct bha_softc *sc;
1460 {
1461 bus_space_tag_t iot = sc->sc_iot;
1462 bus_space_handle_t ioh = sc->sc_ioh;
1463 struct bha_ccb_group *bcg;
1464 struct bha_mbx_out *mbo;
1465 struct bha_ccb *ccb;
1466
1467 mbo = sc->sc_tmbo;
1468
1469 while ((ccb = TAILQ_FIRST(&sc->sc_waiting_ccb)) != NULL) {
1470 if (sc->sc_mbofull >= sc->sc_mbox_count) {
1471 #ifdef DIAGNOSTIC
1472 if (sc->sc_mbofull > sc->sc_mbox_count)
1473 panic("bha_start_ccbs: mbofull > mbox_count");
1474 #endif
1475 /*
1476 * No mailboxes available; attempt to collect ones
1477 * that have already been used.
1478 */
1479 bha_collect_mbo(sc);
1480 if (sc->sc_mbofull == sc->sc_mbox_count) {
1481 /*
1482 * Still no more available; have the
1483 * controller interrupt us when it
1484 * frees one.
1485 */
1486 struct bha_toggle toggle;
1487
1488 toggle.cmd.opcode = BHA_MBO_INTR_EN;
1489 toggle.cmd.enable = 1;
1490 bha_cmd(iot, ioh, sc->sc_dev.dv_xname,
1491 sizeof(toggle.cmd), (u_char *)&toggle.cmd,
1492 0, (u_char *)0);
1493 break;
1494 }
1495 }
1496
1497 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
1498 #ifdef BHADIAG
1499 ccb->flags |= CCB_SENDING;
1500 #endif
1501
1502 /*
1503 * Put the CCB in the mailbox.
1504 */
1505 bcg = BHA_CCB_GROUP(ccb);
1506 ltophys(bcg->bcg_dmamap->dm_segs[0].ds_addr +
1507 BHA_CCB_OFFSET(ccb), mbo->ccb_addr);
1508 if (ccb->flags & CCB_ABORT)
1509 mbo->cmd = BHA_MBO_ABORT;
1510 else
1511 mbo->cmd = BHA_MBO_START;
1512
1513 BHA_MBO_SYNC(sc, mbo,
1514 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1515
1516 /* Tell the card to poll immediately. */
1517 bus_space_write_1(iot, ioh, BHA_CMD_PORT, BHA_START_SCSI);
1518
1519 if ((ccb->xs->xs_control & XS_CTL_POLL) == 0)
1520 callout_reset(&ccb->xs->xs_callout,
1521 (ccb->timeout * hz) / 1000, bha_timeout, ccb);
1522
1523 ++sc->sc_mbofull;
1524 mbo = bha_nextmbo(sc, mbo);
1525 }
1526
1527 sc->sc_tmbo = mbo;
1528 }
1529
1530 /*
1531 * bha_finish_ccbs:
1532 *
1533 * Finalize the execution of CCBs in our incoming mailbox.
1534 */
1535 void
1536 bha_finish_ccbs(sc)
1537 struct bha_softc *sc;
1538 {
1539 struct bha_mbx_in *mbi;
1540 struct bha_ccb *ccb;
1541 int i;
1542
1543 mbi = sc->sc_tmbi;
1544
1545 BHA_MBI_SYNC(sc, mbi, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1546
1547 if (mbi->comp_stat == BHA_MBI_FREE) {
1548 for (i = 0; i < sc->sc_mbox_count; i++) {
1549 if (mbi->comp_stat != BHA_MBI_FREE) {
1550 #ifdef BHADIAG
1551 /*
1552 * This can happen in normal operation if
1553 * we use all mailbox slots.
1554 */
1555 printf("%s: mbi not in round-robin order\n",
1556 sc->sc_dev.dv_xname);
1557 #endif
1558 goto again;
1559 }
1560 mbi = bha_nextmbi(sc, mbi);
1561 BHA_MBI_SYNC(sc, mbi,
1562 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1563 }
1564 #ifdef BHADIAGnot
1565 printf("%s: mbi interrupt with no full mailboxes\n",
1566 sc->sc_dev.dv_xname);
1567 #endif
1568 return;
1569 }
1570
1571 again:
1572 do {
1573 ccb = bha_ccb_phys_kv(sc, phystol(mbi->ccb_addr));
1574 if (ccb == NULL) {
1575 printf("%s: bad mbi ccb pointer 0x%08x; skipping\n",
1576 sc->sc_dev.dv_xname, phystol(mbi->ccb_addr));
1577 goto next;
1578 }
1579
1580 BHA_CCB_SYNC(sc, ccb,
1581 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1582
1583 #ifdef BHADEBUG
1584 if (bha_debug) {
1585 struct scsi_generic *cmd = &ccb->scsi_cmd;
1586 printf("op=%x %x %x %x %x %x\n",
1587 cmd->opcode, cmd->bytes[0], cmd->bytes[1],
1588 cmd->bytes[2], cmd->bytes[3], cmd->bytes[4]);
1589 printf("comp_stat %x for mbi addr = 0x%p, ",
1590 mbi->comp_stat, mbi);
1591 printf("ccb addr = %p\n", ccb);
1592 }
1593 #endif /* BHADEBUG */
1594
1595 switch (mbi->comp_stat) {
1596 case BHA_MBI_OK:
1597 case BHA_MBI_ERROR:
1598 if ((ccb->flags & CCB_ABORT) != 0) {
1599 /*
1600 * If we already started an abort, wait for it
1601 * to complete before clearing the CCB. We
1602 * could instead just clear CCB_SENDING, but
1603 * what if the mailbox was already received?
1604 * The worst that happens here is that we clear
1605 * the CCB a bit later than we need to. BFD.
1606 */
1607 goto next;
1608 }
1609 break;
1610
1611 case BHA_MBI_ABORT:
1612 case BHA_MBI_UNKNOWN:
1613 /*
1614 * Even if the CCB wasn't found, we clear it anyway.
1615 * See preceeding comment.
1616 */
1617 break;
1618
1619 default:
1620 printf("%s: bad mbi comp_stat %02x; skipping\n",
1621 sc->sc_dev.dv_xname, mbi->comp_stat);
1622 goto next;
1623 }
1624
1625 callout_stop(&ccb->xs->xs_callout);
1626 bha_done(sc, ccb);
1627
1628 next:
1629 mbi->comp_stat = BHA_MBI_FREE;
1630 BHA_CCB_SYNC(sc, ccb,
1631 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1632
1633 mbi = bha_nextmbi(sc, mbi);
1634 BHA_MBI_SYNC(sc, mbi,
1635 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1636 } while (mbi->comp_stat != BHA_MBI_FREE);
1637
1638 sc->sc_tmbi = mbi;
1639 }
1640
1641 /*****************************************************************************
1642 * Mailbox management functions.
1643 *****************************************************************************/
1644
1645 /*
1646 * bha_create_mailbox:
1647 *
1648 * Create the mailbox structures. Helper function for bha_attach().
1649 *
1650 * NOTE: The Buslogic hardware only gets one DMA address for the
1651 * mailbox! It expects:
1652 *
1653 * mailbox_out[mailbox_size]
1654 * mailbox_in[mailbox_size]
1655 */
1656 int
1657 bha_create_mailbox(sc)
1658 struct bha_softc *sc;
1659 {
1660 bus_dma_segment_t seg;
1661 size_t size;
1662 int error, rseg;
1663
1664 size = (sizeof(struct bha_mbx_out) * sc->sc_mbox_count) +
1665 (sizeof(struct bha_mbx_in) * sc->sc_mbox_count);
1666
1667 error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg,
1668 1, &rseg, sc->sc_dmaflags);
1669 if (error) {
1670 printf("%s: unable to allocate mailboxes, error = %d\n",
1671 sc->sc_dev.dv_xname, error);
1672 goto bad_0;
1673 }
1674
1675 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
1676 (caddr_t *)&sc->sc_mbo, sc->sc_dmaflags | BUS_DMA_COHERENT);
1677 if (error) {
1678 printf("%s: unable to map mailboxes, error = %d\n",
1679 sc->sc_dev.dv_xname, error);
1680 goto bad_1;
1681 }
1682
1683 memset(sc->sc_mbo, 0, size);
1684
1685 error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
1686 sc->sc_dmaflags, &sc->sc_dmamap_mbox);
1687 if (error) {
1688 printf("%s: unable to create mailbox DMA map, error = %d\n",
1689 sc->sc_dev.dv_xname, error);
1690 goto bad_2;
1691 }
1692
1693 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_mbox,
1694 sc->sc_mbo, size, NULL, 0);
1695 if (error) {
1696 printf("%s: unable to load mailbox DMA map, error = %d\n",
1697 sc->sc_dev.dv_xname, error);
1698 goto bad_3;
1699 }
1700
1701 sc->sc_mbi = (struct bha_mbx_in *)(sc->sc_mbo + sc->sc_mbox_count);
1702
1703 return (0);
1704
1705 bad_3:
1706 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap_mbox);
1707 bad_2:
1708 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_mbo, size);
1709 bad_1:
1710 bus_dmamem_free(sc->sc_dmat, &seg, rseg);
1711 bad_0:
1712 return (error);
1713 }
1714
1715 /*
1716 * bha_collect_mbo:
1717 *
1718 * Garbage collect mailboxes that are no longer in use.
1719 */
1720 void
1721 bha_collect_mbo(sc)
1722 struct bha_softc *sc;
1723 {
1724 struct bha_mbx_out *mbo;
1725 #ifdef BHADIAG
1726 struct bha_ccb *ccb;
1727 #endif
1728
1729 mbo = sc->sc_cmbo;
1730
1731 while (sc->sc_mbofull > 0) {
1732 BHA_MBO_SYNC(sc, mbo,
1733 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1734 if (mbo->cmd != BHA_MBO_FREE)
1735 break;
1736
1737 #ifdef BHADIAG
1738 ccb = bha_ccb_phys_kv(sc, phystol(mbo->ccb_addr));
1739 ccb->flags &= ~CCB_SENDING;
1740 #endif
1741
1742 --sc->sc_mbofull;
1743 mbo = bha_nextmbo(sc, mbo);
1744 }
1745
1746 sc->sc_cmbo = mbo;
1747 }
1748
1749 /*****************************************************************************
1750 * CCB management functions
1751 *****************************************************************************/
1752
1753 __inline void bha_reset_ccb __P((struct bha_ccb *));
1754
1755 __inline void
1756 bha_reset_ccb(ccb)
1757 struct bha_ccb *ccb;
1758 {
1759
1760 ccb->flags = 0;
1761 }
1762
1763 /*
1764 * bha_create_ccbs:
1765 *
1766 * Create a set of CCBs.
1767 *
1768 * We determine the target CCB count, and then keep creating them
1769 * until we reach the target, or fail. CCBs that are allocated
1770 * but not "created" are left on the allocating list.
1771 */
1772 void
1773 bha_create_ccbs(sc, count)
1774 struct bha_softc *sc;
1775 int count;
1776 {
1777 struct bha_ccb_group *bcg;
1778 struct bha_ccb *ccb;
1779 bus_dma_segment_t seg;
1780 bus_dmamap_t ccbmap;
1781 int target, i, error, rseg;
1782
1783 /*
1784 * If the current CCB count is already the max number we're
1785 * allowed to have, bail out now.
1786 */
1787 if (sc->sc_cur_ccbs == sc->sc_max_ccbs)
1788 return;
1789
1790 /*
1791 * Compute our target count, and clamp it down to the max
1792 * number we're allowed to have.
1793 */
1794 target = sc->sc_cur_ccbs + count;
1795 if (target > sc->sc_max_ccbs)
1796 target = sc->sc_max_ccbs;
1797
1798 /*
1799 * If there are CCBs on the allocating list, don't allocate a
1800 * CCB group yet.
1801 */
1802 if (TAILQ_FIRST(&sc->sc_allocating_ccbs) != NULL)
1803 goto have_allocating_ccbs;
1804
1805 allocate_group:
1806 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE,
1807 PAGE_SIZE, 0, &seg, 1, &rseg, sc->sc_dmaflags | BUS_DMA_NOWAIT);
1808 if (error) {
1809 printf("%s: unable to allocate CCB group, error = %d\n",
1810 sc->sc_dev.dv_xname, error);
1811 goto bad_0;
1812 }
1813
1814 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE,
1815 (caddr_t *)&bcg,
1816 sc->sc_dmaflags | BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
1817 if (error) {
1818 printf("%s: unable to map CCB group, error = %d\n",
1819 sc->sc_dev.dv_xname, error);
1820 goto bad_1;
1821 }
1822
1823 memset(bcg, 0, PAGE_SIZE);
1824
1825 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE,
1826 1, PAGE_SIZE, 0, sc->sc_dmaflags | BUS_DMA_NOWAIT, &ccbmap);
1827 if (error) {
1828 printf("%s: unable to create CCB group DMA map, error = %d\n",
1829 sc->sc_dev.dv_xname, error);
1830 goto bad_2;
1831 }
1832
1833 error = bus_dmamap_load(sc->sc_dmat, ccbmap, bcg, PAGE_SIZE, NULL,
1834 sc->sc_dmaflags | BUS_DMA_NOWAIT);
1835 if (error) {
1836 printf("%s: unable to load CCB group DMA map, error = %d\n",
1837 sc->sc_dev.dv_xname, error);
1838 goto bad_3;
1839 }
1840
1841 bcg->bcg_dmamap = ccbmap;
1842
1843 #ifdef DIAGNOSTIC
1844 if (BHA_CCB_GROUP(&bcg->bcg_ccbs[0]) !=
1845 BHA_CCB_GROUP(&bcg->bcg_ccbs[bha_ccbs_per_group - 1]))
1846 panic("bha_create_ccbs: CCB group size botch");
1847 #endif
1848
1849 /*
1850 * Add all of the CCBs in this group to the allocating list.
1851 */
1852 for (i = 0; i < bha_ccbs_per_group; i++) {
1853 ccb = &bcg->bcg_ccbs[i];
1854 TAILQ_INSERT_TAIL(&sc->sc_allocating_ccbs, ccb, chain);
1855 }
1856
1857 have_allocating_ccbs:
1858 /*
1859 * Loop over the allocating list until we reach our CCB target.
1860 * If we run out on the list, we'll allocate another group's
1861 * worth.
1862 */
1863 while (sc->sc_cur_ccbs < target) {
1864 ccb = TAILQ_FIRST(&sc->sc_allocating_ccbs);
1865 if (ccb == NULL)
1866 goto allocate_group;
1867 if (bha_init_ccb(sc, ccb) != 0) {
1868 /*
1869 * We were unable to initialize the CCB.
1870 * This is likely due to a resource shortage,
1871 * so bail out now.
1872 */
1873 return;
1874 }
1875 }
1876
1877 /*
1878 * If we got here, we've reached our target!
1879 */
1880 return;
1881
1882 bad_3:
1883 bus_dmamap_destroy(sc->sc_dmat, ccbmap);
1884 bad_2:
1885 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)bcg, PAGE_SIZE);
1886 bad_1:
1887 bus_dmamem_free(sc->sc_dmat, &seg, rseg);
1888 bad_0:
1889 return;
1890 }
1891
1892 /*
1893 * bha_init_ccb:
1894 *
1895 * Initialize a CCB; helper function for bha_create_ccbs().
1896 */
1897 int
1898 bha_init_ccb(sc, ccb)
1899 struct bha_softc *sc;
1900 struct bha_ccb *ccb;
1901 {
1902 struct bha_ccb_group *bcg = BHA_CCB_GROUP(ccb);
1903 int hashnum, error;
1904
1905 /*
1906 * Create the DMA map for this CCB.
1907 *
1908 * XXX ALLOCNOW is a hack to prevent bounce buffer shortages
1909 * XXX in the ISA case. A better solution is needed.
1910 */
1911 error = bus_dmamap_create(sc->sc_dmat, BHA_MAXXFER, BHA_NSEG,
1912 BHA_MAXXFER, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW | sc->sc_dmaflags,
1913 &ccb->dmamap_xfer);
1914 if (error) {
1915 printf("%s: unable to create CCB DMA map, error = %d\n",
1916 sc->sc_dev.dv_xname, error);
1917 return (error);
1918 }
1919
1920 TAILQ_REMOVE(&sc->sc_allocating_ccbs, ccb, chain);
1921
1922 /*
1923 * Put the CCB into the phystokv hash table.
1924 */
1925 ccb->hashkey = bcg->bcg_dmamap->dm_segs[0].ds_addr +
1926 BHA_CCB_OFFSET(ccb);
1927 hashnum = CCB_HASH(ccb->hashkey);
1928 ccb->nexthash = sc->sc_ccbhash[hashnum];
1929 sc->sc_ccbhash[hashnum] = ccb;
1930 bha_reset_ccb(ccb);
1931
1932 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
1933 sc->sc_cur_ccbs++;
1934
1935 return (0);
1936 }
1937
1938 /*
1939 * bha_get_ccb:
1940 *
1941 * Get a CCB for the SCSI operation. If there are none left,
1942 * wait until one becomes available, if we can.
1943 */
1944 struct bha_ccb *
1945 bha_get_ccb(sc)
1946 struct bha_softc *sc;
1947 {
1948 struct bha_ccb *ccb;
1949 int s;
1950
1951 s = splbio();
1952 ccb = TAILQ_FIRST(&sc->sc_free_ccb);
1953 if (ccb != NULL) {
1954 TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
1955 ccb->flags |= CCB_ALLOC;
1956 }
1957 splx(s);
1958 return (ccb);
1959 }
1960
1961 /*
1962 * bha_free_ccb:
1963 *
1964 * Put a CCB back onto the free list.
1965 */
1966 void
1967 bha_free_ccb(sc, ccb)
1968 struct bha_softc *sc;
1969 struct bha_ccb *ccb;
1970 {
1971 int s;
1972
1973 s = splbio();
1974 bha_reset_ccb(ccb);
1975 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
1976 splx(s);
1977 }
1978
1979 /*
1980 * bha_ccb_phys_kv:
1981 *
1982 * Given a CCB DMA address, locate the CCB in kernel virtual space.
1983 */
1984 struct bha_ccb *
1985 bha_ccb_phys_kv(sc, ccb_phys)
1986 struct bha_softc *sc;
1987 bus_addr_t ccb_phys;
1988 {
1989 int hashnum = CCB_HASH(ccb_phys);
1990 struct bha_ccb *ccb = sc->sc_ccbhash[hashnum];
1991
1992 while (ccb) {
1993 if (ccb->hashkey == ccb_phys)
1994 break;
1995 ccb = ccb->nexthash;
1996 }
1997 return (ccb);
1998 }
1999